swap, amd64 - increase maximum swap space to 1TB x 4
[dragonfly.git] / sys / platform / pc64 / amd64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
48ffc236
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
d7f50089 9 * All rights reserved.
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10 *
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
14 *
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15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
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18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
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21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 41 * SUCH DAMAGE.
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42 *
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
d7f50089 44 * $FreeBSD: src/sys/i386/i386/pmap.c,v 1.250.2.18 2002/03/06 22:48:53 silby Exp $
c8fe38ae 45 * $DragonFly: src/sys/platform/pc64/amd64/pmap.c,v 1.3 2008/08/29 17:07:10 dillon Exp $
d7f50089 46 */
c8fe38ae 47
d7f50089 48/*
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49 * Manages physical address maps.
50 *
51 * In addition to hardware address maps, this
52 * module is called upon to provide software-use-only
53 * maps which may or may not be stored in the same
54 * form as hardware maps. These pseudo-maps are
55 * used to store intermediate results from copy
56 * operations to and from address spaces.
57 *
58 * Since the information managed by this module is
59 * also stored by the logical address mapping module,
60 * this module may throw away valid virtual-to-physical
61 * mappings at almost any time. However, invalidations
62 * of virtual-to-physical mappings must be done as
63 * requested.
64 *
65 * In order to cope with hardware architectures which
66 * make virtual-to-physical map invalidates expensive,
67 * this module may delay invalidate or reduced protection
68 * operations until such time as they are actually
69 * necessary. This module is given full information as
70 * to which processors are currently using which maps,
71 * and to when physical maps must be made correct.
72 */
73
74#if JG
75#include "opt_disable_pse.h"
76#include "opt_pmap.h"
77#endif
78#include "opt_msgbuf.h"
d7f50089 79
c8fe38ae 80#include <sys/param.h>
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81#include <sys/systm.h>
82#include <sys/kernel.h>
d7f50089 83#include <sys/proc.h>
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84#include <sys/msgbuf.h>
85#include <sys/vmmeter.h>
86#include <sys/mman.h>
d7f50089 87
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88#include <vm/vm.h>
89#include <vm/vm_param.h>
90#include <sys/sysctl.h>
91#include <sys/lock.h>
d7f50089 92#include <vm/vm_kern.h>
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93#include <vm/vm_page.h>
94#include <vm/vm_map.h>
d7f50089 95#include <vm/vm_object.h>
c8fe38ae 96#include <vm/vm_extern.h>
d7f50089 97#include <vm/vm_pageout.h>
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98#include <vm/vm_pager.h>
99#include <vm/vm_zone.h>
100
101#include <sys/user.h>
102#include <sys/thread2.h>
103#include <sys/sysref2.h>
d7f50089 104
c8fe38ae 105#include <machine/cputypes.h>
d7f50089 106#include <machine/md_var.h>
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107#include <machine/specialreg.h>
108#include <machine/smp.h>
109#include <machine_base/apic/apicreg.h>
d7f50089 110#include <machine/globaldata.h>
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111#include <machine/pmap.h>
112#include <machine/pmap_inval.h>
113
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114#include <ddb/ddb.h>
115
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116#define PMAP_KEEP_PDIRS
117#ifndef PMAP_SHPGPERPROC
118#define PMAP_SHPGPERPROC 200
119#endif
120
121#if defined(DIAGNOSTIC)
122#define PMAP_DIAGNOSTIC
123#endif
124
125#define MINPV 2048
126
127#if !defined(PMAP_DIAGNOSTIC)
128#define PMAP_INLINE __inline
129#else
130#define PMAP_INLINE
131#endif
132
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133/* JGPMAP32 */
134#define PTDPTDI 0
135
136#define READY0
137#define READY1
138#define READY2
139#define READY3
140#define READY4
141#define READY5
142
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143/*
144 * Get PDEs and PTEs for user/kernel address space
145 */
48ffc236 146#if JGPMAP32
c8fe38ae 147#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
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148#endif
149static pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va);
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150#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
151
152#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
153#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
154#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
155#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
156#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
157
158
159/*
160 * Given a map and a machine independent protection code,
161 * convert to a vax protection code.
162 */
163#define pte_prot(m, p) \
164 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
165static int protection_codes[8];
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166
167struct pmap kernel_pmap;
c8fe38ae 168static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 169
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170vm_paddr_t avail_start; /* PA of first available physical page */
171vm_paddr_t avail_end; /* PA of last available physical page */
172vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
173vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
174vm_offset_t KvaStart; /* VA start of KVA space */
175vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
176vm_offset_t KvaSize; /* max size of kernel virtual address space */
177static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
178static int pgeflag; /* PG_G or-in */
179static int pseflag; /* PG_PS or-in */
d7f50089 180
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181static vm_object_t kptobj;
182
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183static int ndmpdp;
184static vm_paddr_t dmaplimit;
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185static int nkpt;
186vm_offset_t kernel_vm_end;
d7f50089 187
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188static uint64_t KPDphys; /* phys addr of kernel level 2 */
189uint64_t KPDPphys; /* phys addr of kernel level 3 */
190uint64_t KPML4phys; /* phys addr of kernel level 4 */
191
192static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
193static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
194
d7f50089 195/*
c8fe38ae 196 * Data for the pv entry allocation mechanism
d7f50089 197 */
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198static vm_zone_t pvzone;
199static struct vm_zone pvzone_store;
200static struct vm_object pvzone_obj;
201static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0;
202static int pmap_pagedaemon_waken = 0;
203static struct pv_entry *pvinit;
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204
205/*
c8fe38ae 206 * All those kernel PT submaps that BSD is so fond of
d7f50089 207 */
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208pt_entry_t *CMAP1 = 0, *ptmmap;
209caddr_t CADDR1 = 0, ptvmmap = 0;
210static pt_entry_t *msgbufmap;
211struct msgbuf *msgbufp=0;
d7f50089 212
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213/*
214 * Crashdump maps.
d7f50089 215 */
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216static pt_entry_t *pt_crashdumpmap;
217static caddr_t crashdumpmap;
218
219extern uint64_t KPTphys;
220extern pt_entry_t *SMPpt;
221extern uint64_t SMPptpa;
222
223#define DISABLE_PSE
224
225static PMAP_INLINE void free_pv_entry (pv_entry_t pv);
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226static pv_entry_t get_pv_entry (void);
227static void i386_protection_init (void);
228static __inline void pmap_clearbit (vm_page_t m, int bit);
229
230static void pmap_remove_all (vm_page_t m);
231static void pmap_enter_quick (pmap_t pmap, vm_offset_t va, vm_page_t m);
232static int pmap_remove_pte (struct pmap *pmap, pt_entry_t *ptq,
233 vm_offset_t sva, pmap_inval_info_t info);
234static void pmap_remove_page (struct pmap *pmap,
235 vm_offset_t va, pmap_inval_info_t info);
236static int pmap_remove_entry (struct pmap *pmap, vm_page_t m,
237 vm_offset_t va, pmap_inval_info_t info);
238static boolean_t pmap_testbit (vm_page_t m, int bit);
239static void pmap_insert_entry (pmap_t pmap, vm_offset_t va,
240 vm_page_t mpte, vm_page_t m);
241
242static vm_page_t pmap_allocpte (pmap_t pmap, vm_offset_t va);
243
244static int pmap_release_free_page (pmap_t pmap, vm_page_t p);
245static vm_page_t _pmap_allocpte (pmap_t pmap, vm_pindex_t ptepindex);
246static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
247static vm_page_t pmap_page_lookup (vm_object_t object, vm_pindex_t pindex);
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248static int pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
249 pmap_inval_info_t info);
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250static int pmap_unuse_pt (pmap_t, vm_offset_t, vm_page_t, pmap_inval_info_t);
251static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
252
253static unsigned pdir4mb;
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254
255/*
c8fe38ae 256 * Move the kernel virtual free pointer to the next
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257 * 2MB. This is used to help improve performance
258 * by using a large (2MB) page for much of the kernel
c8fe38ae 259 * (.text, .data, .bss)
d7f50089 260 */
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261static vm_offset_t
262pmap_kmem_choose(vm_offset_t addr)
f9cc0f15 263READY2
d7f50089 264{
c8fe38ae 265 vm_offset_t newaddr = addr;
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266
267 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 268 return newaddr;
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269}
270
d7f50089 271/*
c8fe38ae 272 * pmap_pte_quick:
d7f50089 273 *
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274 * Super fast pmap_pte routine best used when scanning the pv lists.
275 * This eliminates many course-grained invltlb calls. Note that many of
276 * the pv list scans are across different pmaps and it is very wasteful
277 * to do an entire invltlb when checking a single mapping.
278 *
279 * Should only be called while in a critical section.
280 */
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281static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
282
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283static pt_entry_t *
284pmap_pte_quick(pmap_t pmap, vm_offset_t va)
48ffc236 285READY0
c8fe38ae 286{
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287 return pmap_pte(pmap, va);
288}
289
290/* Return a non-clipped PD index for a given VA */
291static __inline vm_pindex_t
292pmap_pde_pindex(vm_offset_t va)
293READY1
294{
295 return va >> PDRSHIFT;
296}
297
298/* Return various clipped indexes for a given VA */
299static __inline vm_pindex_t
300pmap_pte_index(vm_offset_t va)
301READY1
302{
303
304 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
305}
306
307static __inline vm_pindex_t
308pmap_pde_index(vm_offset_t va)
309READY1
310{
311
312 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
313}
314
315static __inline vm_pindex_t
316pmap_pdpe_index(vm_offset_t va)
317READY1
318{
319
320 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
321}
322
323static __inline vm_pindex_t
324pmap_pml4e_index(vm_offset_t va)
325READY1
326{
327
328 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
329}
330
331/* Return a pointer to the PML4 slot that corresponds to a VA */
332static __inline pml4_entry_t *
333pmap_pml4e(pmap_t pmap, vm_offset_t va)
334READY1
335{
336
337 return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
338}
339
340/* Return a pointer to the PDP slot that corresponds to a VA */
341static __inline pdp_entry_t *
342pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
343READY1
344{
345 pdp_entry_t *pdpe;
346
347 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
348 return (&pdpe[pmap_pdpe_index(va)]);
349}
350
351/* Return a pointer to the PDP slot that corresponds to a VA */
352static __inline pdp_entry_t *
353pmap_pdpe(pmap_t pmap, vm_offset_t va)
354READY1
355{
356 pml4_entry_t *pml4e;
357
358 pml4e = pmap_pml4e(pmap, va);
359 if ((*pml4e & PG_V) == 0)
360 return NULL;
361 return (pmap_pml4e_to_pdpe(pml4e, va));
362}
363
364/* Return a pointer to the PD slot that corresponds to a VA */
365static __inline pd_entry_t *
366pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
367READY1
368{
369 pd_entry_t *pde;
370
371 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
372 return (&pde[pmap_pde_index(va)]);
373}
374
375/* Return a pointer to the PD slot that corresponds to a VA */
376static __inline pd_entry_t *
377pmap_pde(pmap_t pmap, vm_offset_t va)
378READY1
379{
380 pdp_entry_t *pdpe;
381
382 pdpe = pmap_pdpe(pmap, va);
383 if (pdpe == NULL || (*pdpe & PG_V) == 0)
384 return NULL;
385 return (pmap_pdpe_to_pde(pdpe, va));
386}
387
388/* Return a pointer to the PT slot that corresponds to a VA */
389static __inline pt_entry_t *
390pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
391READY1
392{
393 pt_entry_t *pte;
394
395 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
396 return (&pte[pmap_pte_index(va)]);
397}
398
399/* Return a pointer to the PT slot that corresponds to a VA */
400static __inline pt_entry_t *
401pmap_pte(pmap_t pmap, vm_offset_t va)
402READY1
403{
404 pd_entry_t *pde;
405
406 pde = pmap_pde(pmap, va);
407 if (pde == NULL || (*pde & PG_V) == 0)
408 return NULL;
409 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
410 return ((pt_entry_t *)pde);
411 return (pmap_pde_to_pte(pde, va));
412}
413
414
415PMAP_INLINE pt_entry_t *
416vtopte(vm_offset_t va)
417READY1
418{
419 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
420
421 return (PTmap + ((va >> PAGE_SHIFT) & mask));
c8fe38ae 422}
d7f50089 423
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424static __inline pd_entry_t *
425vtopde(vm_offset_t va)
426READY1
427{
428 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
429
430 return (PDmap + ((va >> PDRSHIFT) & mask));
431}
c8fe38ae 432
48ffc236 433static uint64_t
c8fe38ae 434allocpages(vm_paddr_t *firstaddr, int n)
48ffc236 435READY1
d7f50089 436{
48ffc236 437 uint64_t ret;
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438
439 ret = *firstaddr;
440 bzero((void *)ret, n * PAGE_SIZE);
441 *firstaddr += n * PAGE_SIZE;
442 return (ret);
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443}
444
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445void
446create_pagetables(vm_paddr_t *firstaddr)
48ffc236 447READY0
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448{
449 int i;
450 int count;
451 uint64_t cpu0pp, cpu0idlestk;
452 int idlestk_page_offset = offsetof(struct privatespace, idlestack) / PAGE_SIZE;
453
454 /* we are running (mostly) V=P at this point */
455
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456 /* Allocate pages */
457 KPTphys = allocpages(firstaddr, NKPT);
458 KPML4phys = allocpages(firstaddr, 1);
459 KPDPphys = allocpages(firstaddr, NKPML4E);
460 KPDphys = allocpages(firstaddr, NKPDPE);
461
462 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
463 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
464 ndmpdp = 4;
465 DMPDPphys = allocpages(firstaddr, NDMPML4E);
466 if ((amd_feature & AMDID_PAGE1GB) == 0)
467 DMPDphys = allocpages(firstaddr, ndmpdp);
468 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
469
470 /* Fill in the underlying page table pages */
471 /* Read-only from zero to physfree */
472 /* XXX not fully used, underneath 2M pages */
473 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
474 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
475 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
476 }
477
478 /* Now map the page tables at their location within PTmap */
479 for (i = 0; i < NKPT; i++) {
480 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
481 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
482 }
483
484 /* Map from zero to end of allocations under 2M pages */
485 /* This replaces some of the KPTphys entries above */
486 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
487 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
488 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
489 }
490
491 /* And connect up the PD to the PDP */
492 for (i = 0; i < NKPDPE; i++) {
493 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys +
494 (i << PAGE_SHIFT);
495 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
496 }
497
498 /* Now set up the direct map space using either 2MB or 1GB pages */
499 /* Preset PG_M and PG_A because demotion expects it */
500 if ((amd_feature & AMDID_PAGE1GB) == 0) {
501 for (i = 0; i < NPDEPG * ndmpdp; i++) {
502 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
503 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
504 PG_G | PG_M | PG_A;
505 }
506 /* And the direct map space's PDP */
507 for (i = 0; i < ndmpdp; i++) {
508 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
509 (i << PAGE_SHIFT);
510 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
511 }
512 } else {
513 for (i = 0; i < ndmpdp; i++) {
514 ((pdp_entry_t *)DMPDPphys)[i] =
515 (vm_paddr_t)i << PDPSHIFT;
516 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
517 PG_G | PG_M | PG_A;
518 }
519 }
520
521 /* And recursively map PML4 to itself in order to get PTmap */
522 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
523 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
524
525 /* Connect the Direct Map slot up to the PML4 */
526 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
527 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
528
529 /* Connect the KVA slot up to the PML4 */
530 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
531 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
532#if JGPMAP32
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533 common_lvl4_phys = allocpages(firstaddr, 1); /* 512 512G mappings */
534 common_lvl3_phys = allocpages(firstaddr, 1); /* 512 1G mappings */
535 KPTphys = allocpages(firstaddr, NKPT); /* kernel page table */
536 IdlePTD = allocpages(firstaddr, 1); /* kernel page dir */
537 cpu0pp = allocpages(firstaddr, MDGLOBALDATA_BASEALLOC_PAGES);
538 cpu0idlestk = allocpages(firstaddr, UPAGES);
539 SMPptpa = allocpages(firstaddr, 1);
540 SMPpt = (void *)(SMPptpa + KERNBASE);
541
542
543 /*
544 * Load kernel page table with kernel memory mappings
545 */
546 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
547 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
548 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V;
549 }
550
551#ifndef JG
552 for (i = 0; i < NKPT; i++) {
553 ((pd_entry_t *)IdlePTD)[i] = KPTphys + (i << PAGE_SHIFT);
554 ((pd_entry_t *)IdlePTD)[i] |= PG_RW | PG_V;
555 }
556#endif
557
558 /*
559 * Set up the kernel page table itself.
560 */
561 for (i = 0; i < NKPT; i++) {
562 ((pd_entry_t *)IdlePTD)[KPTDI + i] = KPTphys + (i << PAGE_SHIFT);
563 ((pd_entry_t *)IdlePTD)[KPTDI + i] |= PG_RW | PG_V;
564 }
565
566#ifndef JG
567 count = ISA_HOLE_LENGTH >> PAGE_SHIFT;
568 for (i = 0; i < count; i++) {
569 ((pt_entry_t *)KPTphys)[amd64_btop(ISA_HOLE_START) + i] = \
570 (ISA_HOLE_START + i * PAGE_SIZE) | PG_RW | PG_V;
571 }
572#endif
573
574 /*
575 * Self-mapping
576 */
577 ((pd_entry_t *)IdlePTD)[PTDPTDI] = (pd_entry_t)IdlePTD | PG_RW | PG_V;
578
579 /*
580 * Map CPU_prvspace[0].mdglobaldata
581 */
582 for (i = 0; i < MDGLOBALDATA_BASEALLOC_PAGES; i++) {
583 ((pt_entry_t *)SMPptpa)[i] = \
584 (cpu0pp + i * PAGE_SIZE) | PG_RW | PG_V;
585 }
586
587 /*
588 * Map CPU_prvspace[0].idlestack
589 */
590 for (i = 0; i < UPAGES; i++) {
591 ((pt_entry_t *)SMPptpa)[idlestk_page_offset + i] = \
592 (cpu0idlestk + i * PAGE_SIZE) | PG_RW | PG_V;
593 }
594
595 /*
596 * Link SMPpt.
597 */
598 ((pd_entry_t *)IdlePTD)[MPPTDI] = SMPptpa | PG_RW | PG_V;
599
600 /*
601 * PML4 maps level 3
602 */
603 ((pml4_entry_t *)common_lvl4_phys)[LINKPML4I] = common_lvl3_phys | PG_RW | PG_V | PG_U;
604
605 /*
606 * location of "virtual CR3" - a PDP entry that is loaded
607 * with a PD physical address (+ page attributes).
608 * Matt: location of user page directory entry (representing 1G)
609 */
610 link_pdpe = &((pdp_entry_t *)common_lvl3_phys)[LINKPDPI];
48ffc236 611#endif /* JGPMAP32 */
c8fe38ae
MD
612}
613
48ffc236 614READY0
c8fe38ae
MD
615void
616init_paging(vm_paddr_t *firstaddr) {
617 create_pagetables(firstaddr);
618
48ffc236 619#if JGPMAP32
c8fe38ae
MD
620 /* switch to the newly created page table */
621 *link_pdpe = IdlePTD | PG_RW | PG_V | PG_U;
622 load_cr3(common_lvl4_phys);
623 link_pdpe = (void *)((char *)link_pdpe + KERNBASE);
624
625 KvaStart = (vm_offset_t)VADDR(PTDPTDI, 0);
626 KvaEnd = (vm_offset_t)VADDR(APTDPTDI, 0);
627 KvaSize = KvaEnd - KvaStart;
48ffc236 628#endif
d7f50089
YY
629}
630
631/*
c8fe38ae
MD
632 * Bootstrap the system enough to run with virtual memory.
633 *
634 * On the i386 this is called after mapping has already been enabled
635 * and just syncs the pmap module with what has already been done.
636 * [We can't call it easily with mapping off since the kernel is not
637 * mapped with PA == VA, hence we would have to relocate every address
638 * from the linked base (virtual) address "KERNBASE" to the actual
639 * (physical) address starting relative to 0]
d7f50089
YY
640 */
641void
48ffc236
JG
642pmap_bootstrap(vm_paddr_t *firstaddr)
643READY0
c8fe38ae
MD
644{
645 vm_offset_t va;
646 pt_entry_t *pte;
647 struct mdglobaldata *gd;
648 int i;
649 int pg;
650
48ffc236
JG
651 KvaStart = VM_MIN_KERNEL_ADDRESS;
652 KvaEnd = VM_MAX_KERNEL_ADDRESS;
653 KvaSize = KvaEnd - KvaStart;
654
c8fe38ae
MD
655 avail_start = *firstaddr;
656
657 /*
48ffc236 658 * Create an initial set of page tables to run the kernel in.
c8fe38ae 659 */
48ffc236
JG
660 create_pagetables(firstaddr);
661
c8fe38ae
MD
662 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
663 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
664
665 virtual_end = VM_MAX_KERNEL_ADDRESS;
666
667 /* XXX do %cr0 as well */
668 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
669 load_cr3(KPML4phys);
c8fe38ae
MD
670
671 /*
672 * Initialize protection array.
673 */
674 i386_protection_init();
675
676 /*
677 * The kernel's pmap is statically allocated so we don't have to use
678 * pmap_create, which is unlikely to work correctly at this part of
679 * the boot sequence (XXX and which no longer exists).
680 */
48ffc236 681#if JGPMAP32
c8fe38ae 682 kernel_pmap.pm_pdir = (pd_entry_t *)(PTOV_OFFSET + (uint64_t)IdlePTD);
48ffc236
JG
683#endif
684 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
685 kernel_pmap.pm_count = 1;
686 kernel_pmap.pm_active = (cpumask_t)-1; /* don't allow deactivation */
687 TAILQ_INIT(&kernel_pmap.pm_pvlist);
688 nkpt = NKPT;
689
690 /*
691 * Reserve some special page table entries/VA space for temporary
692 * mapping of pages.
693 */
694#define SYSMAP(c, p, v, n) \
695 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
696
697 va = virtual_start;
48ffc236 698#ifdef JG
c8fe38ae 699 pte = (pt_entry_t *) pmap_pte(&kernel_pmap, va);
48ffc236
JG
700#else
701 pte = vtopte(va);
702#endif
c8fe38ae
MD
703
704 /*
705 * CMAP1/CMAP2 are used for zeroing and copying pages.
706 */
707 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
708
709 /*
710 * Crashdump maps.
711 */
712 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
713
714 /*
715 * ptvmmap is used for reading arbitrary physical pages via
716 * /dev/mem.
717 */
718 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
719
720 /*
721 * msgbufp is used to map the system message buffer.
722 * XXX msgbufmap is not used.
723 */
724 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
725 atop(round_page(MSGBUF_SIZE)))
726
727 virtual_start = va;
728
729 *CMAP1 = 0;
48ffc236 730#if JGPMAP32
c8fe38ae
MD
731 for (i = 0; i < NKPT; i++)
732 PTD[i] = 0;
48ffc236 733#endif
c8fe38ae
MD
734
735 /*
736 * PG_G is terribly broken on SMP because we IPI invltlb's in some
737 * cases rather then invl1pg. Actually, I don't even know why it
738 * works under UP because self-referential page table mappings
739 */
740#ifdef SMP
741 pgeflag = 0;
742#else
743 if (cpu_feature & CPUID_PGE)
744 pgeflag = PG_G;
745#endif
746
747/*
748 * Initialize the 4MB page size flag
749 */
750 pseflag = 0;
751/*
752 * The 4MB page version of the initial
753 * kernel page mapping.
754 */
755 pdir4mb = 0;
756
757#if !defined(DISABLE_PSE)
758 if (cpu_feature & CPUID_PSE) {
759 pt_entry_t ptditmp;
760 /*
761 * Note that we have enabled PSE mode
762 */
763 pseflag = PG_PS;
764 ptditmp = *(PTmap + amd64_btop(KERNBASE));
765 ptditmp &= ~(NBPDR - 1);
766 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
767 pdir4mb = ptditmp;
768
769#ifndef SMP
770 /*
771 * Enable the PSE mode. If we are SMP we can't do this
772 * now because the APs will not be able to use it when
773 * they boot up.
774 */
775 load_cr4(rcr4() | CR4_PSE);
776
777 /*
778 * We can do the mapping here for the single processor
779 * case. We simply ignore the old page table page from
780 * now on.
781 */
782 /*
783 * For SMP, we still need 4K pages to bootstrap APs,
784 * PSE will be enabled as soon as all APs are up.
785 */
786 PTD[KPTDI] = (pd_entry_t)ptditmp;
48ffc236 787#if JGPMAP32
c8fe38ae 788 kernel_pmap.pm_pdir[KPTDI] = (pd_entry_t)ptditmp;
48ffc236 789#endif
c8fe38ae
MD
790 cpu_invltlb();
791#endif
792 }
793#endif
794#ifdef SMP
795 if (cpu_apic_address == 0)
796 panic("pmap_bootstrap: no local apic!");
797
057877ac 798#if JGPMAP32
c8fe38ae
MD
799 /* local apic is mapped on last page */
800 SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag |
801 (cpu_apic_address & PG_FRAME));
057877ac 802#endif
c8fe38ae
MD
803#endif
804
805 /*
806 * We need to finish setting up the globaldata page for the BSP.
807 * locore has already populated the page table for the mdglobaldata
808 * portion.
809 */
810 pg = MDGLOBALDATA_BASEALLOC_PAGES;
811 gd = &CPU_prvspace[0].mdglobaldata;
812 gd->gd_CMAP1 = &SMPpt[pg + 0];
813 gd->gd_CMAP2 = &SMPpt[pg + 1];
814 gd->gd_CMAP3 = &SMPpt[pg + 2];
815 gd->gd_PMAP1 = &SMPpt[pg + 3];
816 gd->gd_CADDR1 = CPU_prvspace[0].CPAGE1;
817 gd->gd_CADDR2 = CPU_prvspace[0].CPAGE2;
818 gd->gd_CADDR3 = CPU_prvspace[0].CPAGE3;
819 gd->gd_PADDR1 = (pt_entry_t *)CPU_prvspace[0].PPAGE1;
820
821 cpu_invltlb();
d7f50089
YY
822}
823
c8fe38ae 824#ifdef SMP
d7f50089 825/*
c8fe38ae 826 * Set 4mb pdir for mp startup
d7f50089
YY
827 */
828void
c8fe38ae 829pmap_set_opt(void)
48ffc236 830READY0
c8fe38ae
MD
831{
832 if (pseflag && (cpu_feature & CPUID_PSE)) {
833 load_cr4(rcr4() | CR4_PSE);
834 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
48ffc236 835#if JGPMAP32
c8fe38ae
MD
836 kernel_pmap.pm_pdir[KPTDI] =
837 PTD[KPTDI] = (pd_entry_t)pdir4mb;
48ffc236 838#endif
c8fe38ae
MD
839 cpu_invltlb();
840 }
841 }
d7f50089 842}
c8fe38ae 843#endif
d7f50089 844
c8fe38ae
MD
845/*
846 * Initialize the pmap module.
847 * Called by vm_init, to initialize any structures that the pmap
848 * system needs to map virtual memory.
849 * pmap_init has been enhanced to support in a fairly consistant
850 * way, discontiguous physical memory.
d7f50089
YY
851 */
852void
c8fe38ae 853pmap_init(void)
48ffc236 854READY0
d7f50089 855{
c8fe38ae
MD
856 int i;
857 int initial_pvs;
858
859 /*
860 * object for kernel page table pages
861 */
48ffc236
JG
862 /* JG I think the number can be arbitrary */
863 kptobj = vm_object_allocate(OBJT_DEFAULT, 5);
c8fe38ae
MD
864
865 /*
866 * Allocate memory for random pmap data structures. Includes the
867 * pv_head_table.
868 */
869
870 for(i = 0; i < vm_page_array_size; i++) {
871 vm_page_t m;
872
873 m = &vm_page_array[i];
874 TAILQ_INIT(&m->md.pv_list);
875 m->md.pv_list_count = 0;
876 }
877
878 /*
879 * init the pv free list
880 */
881 initial_pvs = vm_page_array_size;
882 if (initial_pvs < MINPV)
883 initial_pvs = MINPV;
884 pvzone = &pvzone_store;
885 pvinit = (struct pv_entry *) kmem_alloc(&kernel_map,
886 initial_pvs * sizeof (struct pv_entry));
887 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry), pvinit,
888 initial_pvs);
889
890 /*
891 * Now it is safe to enable pv_table recording.
892 */
893 pmap_initialized = TRUE;
d887674b 894#ifdef SMP
057877ac 895 lapic = pmap_mapdev_uncacheable(cpu_apic_address, sizeof(struct LAPIC));
d887674b 896#endif
d7f50089
YY
897}
898
c8fe38ae
MD
899/*
900 * Initialize the address space (zone) for the pv_entries. Set a
901 * high water mark so that the system can recover from excessive
902 * numbers of pv entries.
903 */
d7f50089 904void
c8fe38ae 905pmap_init2(void)
48ffc236 906READY0
d7f50089 907{
c8fe38ae
MD
908 int shpgperproc = PMAP_SHPGPERPROC;
909
910 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
911 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
912 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
913 pv_entry_high_water = 9 * (pv_entry_max / 10);
914 zinitna(pvzone, &pvzone_obj, NULL, 0, pv_entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
915}
916
c8fe38ae
MD
917
918/***************************************************
919 * Low level helper routines.....
920 ***************************************************/
921
922#if defined(PMAP_DIAGNOSTIC)
d7f50089
YY
923
924/*
c8fe38ae
MD
925 * This code checks for non-writeable/modified pages.
926 * This should be an invalid condition.
d7f50089 927 */
c8fe38ae 928static int
48ffc236
JG
929pmap_nw_modified(pt_entry_t pte)
930READY1
d7f50089 931{
c8fe38ae
MD
932 if ((pte & (PG_M|PG_RW)) == PG_M)
933 return 1;
934 else
935 return 0;
d7f50089 936}
c8fe38ae
MD
937#endif
938
d7f50089 939
c8fe38ae
MD
940/*
941 * this routine defines the region(s) of memory that should
942 * not be tested for the modified bit.
943 */
944static PMAP_INLINE int
945pmap_track_modified(vm_offset_t va)
48ffc236 946READY0
d7f50089 947{
c8fe38ae
MD
948 if ((va < clean_sva) || (va >= clean_eva))
949 return 1;
950 else
951 return 0;
d7f50089
YY
952}
953
d7f50089 954/*
c8fe38ae
MD
955 * pmap_extract:
956 *
957 * Extract the physical page address associated with the map/VA pair.
958 *
959 * This function may not be called from an interrupt if the pmap is
960 * not kernel_pmap.
d7f50089 961 */
c8fe38ae
MD
962vm_paddr_t
963pmap_extract(pmap_t pmap, vm_offset_t va)
48ffc236 964READY1
d7f50089 965{
48ffc236
JG
966 vm_paddr_t rtval;
967 pt_entry_t *pte;
968 pd_entry_t pde, *pdep;
c8fe38ae 969
48ffc236
JG
970 rtval = 0;
971 pdep = pmap_pde(pmap, va);
972 if (pdep != NULL) {
973 pde = *pdep;
974 if (pde) {
975 if ((pde & PG_PS) != 0) {
976 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
977 } else {
978 pte = pmap_pde_to_pte(pdep, va);
979 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
980 }
c8fe38ae 981 }
c8fe38ae 982 }
48ffc236
JG
983 return rtval;
984}
985
986/*
987 * Routine: pmap_kextract
988 * Function:
989 * Extract the physical page address associated
990 * kernel virtual address.
991 */
992vm_paddr_t
993pmap_kextract(vm_offset_t va)
994READY1
995{
996 pd_entry_t pde;
997 vm_paddr_t pa;
998
999 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
1000 pa = DMAP_TO_PHYS(va);
1001 } else {
1002 pde = *vtopde(va);
1003 if (pde & PG_PS) {
1004 pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
1005 } else {
1006 /*
1007 * Beware of a concurrent promotion that changes the
1008 * PDE at this point! For example, vtopte() must not
1009 * be used to access the PTE because it would use the
1010 * new PDE. It is, however, safe to use the old PDE
1011 * because the page table page is preserved by the
1012 * promotion.
1013 */
1014 pa = *pmap_pde_to_pte(&pde, va);
1015 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
1016 }
1017 }
1018 return pa;
d7f50089
YY
1019}
1020
c8fe38ae
MD
1021/***************************************************
1022 * Low level mapping routines.....
1023 ***************************************************/
1024
d7f50089 1025/*
c8fe38ae
MD
1026 * Routine: pmap_kenter
1027 * Function:
1028 * Add a wired page to the KVA
1029 * NOTE! note that in order for the mapping to take effect -- you
1030 * should do an invltlb after doing the pmap_kenter().
d7f50089 1031 */
c8fe38ae 1032void
d7f50089 1033pmap_kenter(vm_offset_t va, vm_paddr_t pa)
48ffc236 1034READY1
d7f50089 1035{
c8fe38ae
MD
1036 pt_entry_t *pte;
1037 pt_entry_t npte;
1038 pmap_inval_info info;
1039
1040 pmap_inval_init(&info);
1041 npte = pa | PG_RW | PG_V | pgeflag;
1042 pte = vtopte(va);
1043 pmap_inval_add(&info, &kernel_pmap, va);
1044 *pte = npte;
1045 pmap_inval_flush(&info);
d7f50089
YY
1046}
1047
1048/*
c8fe38ae
MD
1049 * Routine: pmap_kenter_quick
1050 * Function:
1051 * Similar to pmap_kenter(), except we only invalidate the
1052 * mapping on the current CPU.
d7f50089 1053 */
c8fe38ae
MD
1054void
1055pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
48ffc236 1056READY1
c8fe38ae
MD
1057{
1058 pt_entry_t *pte;
1059 pt_entry_t npte;
1060
1061 npte = pa | PG_RW | PG_V | pgeflag;
1062 pte = vtopte(va);
1063 *pte = npte;
1064 cpu_invlpg((void *)va);
1065}
1066
d7f50089
YY
1067void
1068pmap_kenter_sync(vm_offset_t va)
48ffc236 1069READY1
d7f50089 1070{
c8fe38ae
MD
1071 pmap_inval_info info;
1072
1073 pmap_inval_init(&info);
1074 pmap_inval_add(&info, &kernel_pmap, va);
1075 pmap_inval_flush(&info);
d7f50089
YY
1076}
1077
d7f50089
YY
1078void
1079pmap_kenter_sync_quick(vm_offset_t va)
48ffc236 1080READY1
d7f50089 1081{
c8fe38ae 1082 cpu_invlpg((void *)va);
d7f50089
YY
1083}
1084
d7f50089 1085/*
c8fe38ae 1086 * remove a page from the kernel pagetables
d7f50089
YY
1087 */
1088void
c8fe38ae 1089pmap_kremove(vm_offset_t va)
48ffc236 1090READY1
d7f50089 1091{
c8fe38ae
MD
1092 pt_entry_t *pte;
1093 pmap_inval_info info;
1094
1095 pmap_inval_init(&info);
1096 pte = vtopte(va);
1097 pmap_inval_add(&info, &kernel_pmap, va);
1098 *pte = 0;
1099 pmap_inval_flush(&info);
1100}
1101
1102void
1103pmap_kremove_quick(vm_offset_t va)
48ffc236 1104READY1
c8fe38ae
MD
1105{
1106 pt_entry_t *pte;
1107 pte = vtopte(va);
1108 *pte = 0;
1109 cpu_invlpg((void *)va);
d7f50089
YY
1110}
1111
1112/*
c8fe38ae 1113 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
1114 */
1115void
c8fe38ae 1116pmap_kmodify_rw(vm_offset_t va)
48ffc236 1117READY1
d7f50089 1118{
c8fe38ae
MD
1119 *vtopte(va) |= PG_RW;
1120 cpu_invlpg((void *)va);
d7f50089
YY
1121}
1122
c8fe38ae
MD
1123void
1124pmap_kmodify_nc(vm_offset_t va)
48ffc236 1125READY1
c8fe38ae
MD
1126{
1127 *vtopte(va) |= PG_N;
1128 cpu_invlpg((void *)va);
1129}
d7f50089
YY
1130
1131/*
c8fe38ae
MD
1132 * Used to map a range of physical addresses into kernel
1133 * virtual address space.
1134 *
1135 * For now, VM is already on, we only need to map the
1136 * specified memory.
d7f50089
YY
1137 */
1138vm_offset_t
1139pmap_map(vm_offset_t virt, vm_paddr_t start, vm_paddr_t end, int prot)
8fdd3267 1140READY3
d7f50089 1141{
8fdd3267 1142 return PHYS_TO_DMAP(start);
d7f50089
YY
1143}
1144
c8fe38ae 1145
d7f50089 1146/*
c8fe38ae
MD
1147 * Add a list of wired pages to the kva
1148 * this routine is only used for temporary
1149 * kernel mappings that do not need to have
1150 * page modification or references recorded.
1151 * Note that old mappings are simply written
1152 * over. The page *must* be wired.
d7f50089
YY
1153 */
1154void
c8fe38ae 1155pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
48ffc236 1156READY1
d7f50089 1157{
c8fe38ae
MD
1158 vm_offset_t end_va;
1159
1160 end_va = va + count * PAGE_SIZE;
1161
1162 while (va < end_va) {
1163 pt_entry_t *pte;
1164
1165 pte = vtopte(va);
1166 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1167 cpu_invlpg((void *)va);
1168 va += PAGE_SIZE;
1169 m++;
1170 }
1171#ifdef SMP
1172 smp_invltlb(); /* XXX */
1173#endif
1174}
1175
1176void
1177pmap_qenter2(vm_offset_t va, vm_page_t *m, int count, cpumask_t *mask)
48ffc236 1178READY1
c8fe38ae
MD
1179{
1180 vm_offset_t end_va;
1181 cpumask_t cmask = mycpu->gd_cpumask;
1182
1183 end_va = va + count * PAGE_SIZE;
1184
1185 while (va < end_va) {
1186 pt_entry_t *pte;
1187 pt_entry_t pteval;
1188
1189 /*
1190 * Install the new PTE. If the pte changed from the prior
1191 * mapping we must reset the cpu mask and invalidate the page.
1192 * If the pte is the same but we have not seen it on the
1193 * current cpu, invlpg the existing mapping. Otherwise the
1194 * entry is optimal and no invalidation is required.
1195 */
1196 pte = vtopte(va);
1197 pteval = VM_PAGE_TO_PHYS(*m) | PG_A | PG_RW | PG_V | pgeflag;
1198 if (*pte != pteval) {
1199 *mask = 0;
1200 *pte = pteval;
1201 cpu_invlpg((void *)va);
1202 } else if ((*mask & cmask) == 0) {
1203 cpu_invlpg((void *)va);
1204 }
1205 va += PAGE_SIZE;
1206 m++;
1207 }
1208 *mask |= cmask;
d7f50089
YY
1209}
1210
1211/*
7155fc7d 1212 * This routine jerks page mappings from the
c8fe38ae 1213 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1214 *
1215 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1216 */
c8fe38ae
MD
1217void
1218pmap_qremove(vm_offset_t va, int count)
48ffc236 1219READY1
d7f50089 1220{
c8fe38ae
MD
1221 vm_offset_t end_va;
1222
48ffc236 1223 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1224
1225 while (va < end_va) {
1226 pt_entry_t *pte;
1227
1228 pte = vtopte(va);
1229 *pte = 0;
1230 cpu_invlpg((void *)va);
1231 va += PAGE_SIZE;
1232 }
1233#ifdef SMP
1234 smp_invltlb();
1235#endif
d7f50089
YY
1236}
1237
1238/*
c8fe38ae
MD
1239 * This routine works like vm_page_lookup() but also blocks as long as the
1240 * page is busy. This routine does not busy the page it returns.
1241 *
1242 * Unless the caller is managing objects whos pages are in a known state,
1243 * the call should be made with a critical section held so the page's object
1244 * association remains valid on return.
d7f50089 1245 */
c8fe38ae
MD
1246static vm_page_t
1247pmap_page_lookup(vm_object_t object, vm_pindex_t pindex)
48ffc236 1248READY1
d7f50089 1249{
c8fe38ae
MD
1250 vm_page_t m;
1251
1252 do {
1253 m = vm_page_lookup(object, pindex);
1254 } while (m && vm_page_sleep_busy(m, FALSE, "pplookp"));
1255
1256 return(m);
d7f50089
YY
1257}
1258
1259/*
c8fe38ae
MD
1260 * Create a new thread and optionally associate it with a (new) process.
1261 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1262 */
1263void
c8fe38ae 1264pmap_init_thread(thread_t td)
48ffc236 1265READY1
d7f50089 1266{
c8fe38ae
MD
1267 /* enforce pcb placement */
1268 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
1269 td->td_savefpu = &td->td_pcb->pcb_save;
48ffc236 1270 td->td_sp = (char *)td->td_pcb - 16; /* JG is -16 needed on amd64? */
d7f50089
YY
1271}
1272
1273/*
c8fe38ae 1274 * This routine directly affects the fork perf for a process.
d7f50089
YY
1275 */
1276void
c8fe38ae 1277pmap_init_proc(struct proc *p)
48ffc236 1278READY1
d7f50089
YY
1279{
1280}
1281
1282/*
c8fe38ae
MD
1283 * Dispose the UPAGES for a process that has exited.
1284 * This routine directly impacts the exit perf of a process.
d7f50089
YY
1285 */
1286void
c8fe38ae 1287pmap_dispose_proc(struct proc *p)
48ffc236 1288READY1
d7f50089 1289{
c8fe38ae 1290 KASSERT(p->p_lock == 0, ("attempt to dispose referenced proc! %p", p));
d7f50089
YY
1291}
1292
c8fe38ae
MD
1293/***************************************************
1294 * Page table page management routines.....
1295 ***************************************************/
1296
d7f50089 1297/*
c8fe38ae
MD
1298 * This routine unholds page table pages, and if the hold count
1299 * drops to zero, then it decrements the wire count.
d7f50089 1300 */
c8fe38ae 1301static int
48ffc236
JG
1302_pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, pmap_inval_info_t info)
1303READY1
c8fe38ae
MD
1304{
1305 /*
1306 * Wait until we can busy the page ourselves. We cannot have
1307 * any active flushes if we block.
1308 */
1309 if (m->flags & PG_BUSY) {
1310 pmap_inval_flush(info);
1311 while (vm_page_sleep_busy(m, FALSE, "pmuwpt"))
1312 ;
1313 }
1314 KASSERT(m->queue == PQ_NONE,
1315 ("_pmap_unwire_pte_hold: %p->queue != PQ_NONE", m));
1316
1317 if (m->hold_count == 1) {
1318 /*
1319 * Unmap the page table page
1320 */
1321 vm_page_busy(m);
1322 pmap_inval_add(info, pmap, -1);
48ffc236
JG
1323
1324 if (m->pindex >= (NUPDE + NUPDPE)) {
1325 /* PDP page */
1326 pml4_entry_t *pml4;
1327 pml4 = pmap_pml4e(pmap, va);
1328 *pml4 = 0;
1329 } else if (m->pindex >= NUPDE) {
1330 /* PD page */
1331 pdp_entry_t *pdp;
1332 pdp = pmap_pdpe(pmap, va);
1333 *pdp = 0;
1334 } else {
3535204a 1335 /* PT page */
48ffc236
JG
1336 pd_entry_t *pd;
1337 pd = pmap_pde(pmap, va);
1338 *pd = 0;
1339 }
c8fe38ae
MD
1340
1341 KKASSERT(pmap->pm_stats.resident_count > 0);
1342 --pmap->pm_stats.resident_count;
1343
1344 if (pmap->pm_ptphint == m)
1345 pmap->pm_ptphint = NULL;
1346
48ffc236
JG
1347 if (m->pindex < NUPDE) {
1348 /* We just released a PT, unhold the matching PD */
1349 vm_page_t pdpg;
1350
1351 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
1352 pmap_unwire_pte_hold(pmap, va, pdpg, info);
1353 }
1354 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
1355 /* We just released a PD, unhold the matching PDP */
1356 vm_page_t pdppg;
1357
1358 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
1359 pmap_unwire_pte_hold(pmap, va, pdppg, info);
1360 }
48ffc236 1361
c8fe38ae
MD
1362 /*
1363 * This was our last hold, the page had better be unwired
1364 * after we decrement wire_count.
1365 *
1366 * FUTURE NOTE: shared page directory page could result in
1367 * multiple wire counts.
1368 */
1369 vm_page_unhold(m);
1370 --m->wire_count;
1371 KKASSERT(m->wire_count == 0);
1372 --vmstats.v_wire_count;
1373 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1374 vm_page_flash(m);
1375 vm_page_free_zero(m);
1376 return 1;
1377 } else {
1b2e0b92 1378 /* JG Can we get here? */
c8fe38ae
MD
1379 KKASSERT(m->hold_count > 1);
1380 vm_page_unhold(m);
1381 return 0;
1382 }
1383}
1384
1385static PMAP_INLINE int
48ffc236
JG
1386pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, pmap_inval_info_t info)
1387READY1
d7f50089 1388{
c8fe38ae
MD
1389 KKASSERT(m->hold_count > 0);
1390 if (m->hold_count > 1) {
1391 vm_page_unhold(m);
1392 return 0;
1393 } else {
48ffc236 1394 return _pmap_unwire_pte_hold(pmap, va, m, info);
c8fe38ae 1395 }
d7f50089
YY
1396}
1397
c8fe38ae
MD
1398/*
1399 * After removing a page table entry, this routine is used to
1400 * conditionally free the page, and manage the hold/wire counts.
d7f50089 1401 */
c8fe38ae
MD
1402static int
1403pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte,
1404 pmap_inval_info_t info)
48ffc236 1405READY1
c8fe38ae 1406{
48ffc236 1407 /* JG Use FreeBSD/amd64 or FreeBSD/i386 ptepde approaches? */
c8fe38ae 1408 vm_pindex_t ptepindex;
48ffc236 1409 if (va >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
1410 return 0;
1411
1412 if (mpte == NULL) {
48ffc236
JG
1413 ptepindex = pmap_pde_pindex(va);
1414#if JGHINT
c8fe38ae
MD
1415 if (pmap->pm_ptphint &&
1416 (pmap->pm_ptphint->pindex == ptepindex)) {
1417 mpte = pmap->pm_ptphint;
1418 } else {
48ffc236 1419#endif
c8fe38ae 1420 pmap_inval_flush(info);
48ffc236 1421 mpte = pmap_page_lookup(pmap->pm_pteobj, ptepindex);
c8fe38ae 1422 pmap->pm_ptphint = mpte;
48ffc236 1423#if JGHINT
c8fe38ae 1424 }
48ffc236 1425#endif
c8fe38ae
MD
1426 }
1427
48ffc236 1428 return pmap_unwire_pte_hold(pmap, va, mpte, info);
c8fe38ae 1429}
d7f50089
YY
1430
1431/*
c8fe38ae
MD
1432 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1433 * it, and IdlePTD, represents the template used to update all other pmaps.
1434 *
1435 * On architectures where the kernel pmap is not integrated into the user
1436 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1437 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1438 */
1439void
c8fe38ae 1440pmap_pinit0(struct pmap *pmap)
48ffc236 1441READY1
d7f50089 1442{
48ffc236 1443#if JGPMAP32
c8fe38ae
MD
1444 pmap->pm_pdir =
1445 (pd_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
1446 pmap_kenter((vm_offset_t)pmap->pm_pdir, (vm_offset_t) IdlePTD);
48ffc236
JG
1447#endif
1448 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1449 pmap->pm_count = 1;
1450 pmap->pm_active = 0;
1451 pmap->pm_ptphint = NULL;
1452 TAILQ_INIT(&pmap->pm_pvlist);
1453 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1454}
1455
1456/*
c8fe38ae
MD
1457 * Initialize a preallocated and zeroed pmap structure,
1458 * such as one in a vmspace structure.
d7f50089
YY
1459 */
1460void
c8fe38ae 1461pmap_pinit(struct pmap *pmap)
48ffc236 1462READY1
d7f50089 1463{
c8fe38ae
MD
1464 vm_page_t ptdpg;
1465
1466 /*
1467 * No need to allocate page table space yet but we do need a valid
1468 * page directory table.
1469 */
48ffc236
JG
1470 if (pmap->pm_pml4 == NULL) {
1471 pmap->pm_pml4 =
1472 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1473 }
1474
1475 /*
1476 * Allocate an object for the ptes
1477 */
1478 if (pmap->pm_pteobj == NULL)
0a5c555b 1479 pmap->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, NUPDE + NUPDPE + PML4PML4I + 1);
c8fe38ae
MD
1480
1481 /*
1482 * Allocate the page directory page, unless we already have
1483 * one cached. If we used the cached page the wire_count will
1484 * already be set appropriately.
1485 */
1486 if ((ptdpg = pmap->pm_pdirm) == NULL) {
0a5c555b 1487 ptdpg = vm_page_grab(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I,
c8fe38ae
MD
1488 VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1489 pmap->pm_pdirm = ptdpg;
1490 vm_page_flag_clear(ptdpg, PG_MAPPED | PG_BUSY);
1491 ptdpg->valid = VM_PAGE_BITS_ALL;
1492 ptdpg->wire_count = 1;
1493 ++vmstats.v_wire_count;
48ffc236 1494 pmap_kenter((vm_offset_t)pmap->pm_pml4, VM_PAGE_TO_PHYS(ptdpg));
c8fe38ae
MD
1495 }
1496 if ((ptdpg->flags & PG_ZERO) == 0)
48ffc236 1497 bzero(pmap->pm_pml4, PAGE_SIZE);
c8fe38ae 1498
48ffc236
JG
1499 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
1500 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
c8fe38ae
MD
1501
1502 /* install self-referential address mapping entry */
48ffc236 1503 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(ptdpg) | PG_V | PG_RW | PG_A | PG_M;
c8fe38ae
MD
1504
1505 pmap->pm_count = 1;
1506 pmap->pm_active = 0;
1507 pmap->pm_ptphint = NULL;
1508 TAILQ_INIT(&pmap->pm_pvlist);
1509 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1510 pmap->pm_stats.resident_count = 1;
d7f50089
YY
1511}
1512
1513/*
c8fe38ae
MD
1514 * Clean up a pmap structure so it can be physically freed. This routine
1515 * is called by the vmspace dtor function. A great deal of pmap data is
1516 * left passively mapped to improve vmspace management so we have a bit
1517 * of cleanup work to do here.
d7f50089
YY
1518 */
1519void
c8fe38ae 1520pmap_puninit(pmap_t pmap)
48ffc236 1521READY1
d7f50089 1522{
c8fe38ae
MD
1523 vm_page_t p;
1524
1525 KKASSERT(pmap->pm_active == 0);
1526 if ((p = pmap->pm_pdirm) != NULL) {
48ffc236
JG
1527 KKASSERT(pmap->pm_pml4 != NULL);
1528 KKASSERT(pmap->pm_pml4 != (PTOV_OFFSET + KPML4phys));
1529 pmap_kremove((vm_offset_t)pmap->pm_pml4);
c8fe38ae
MD
1530 p->wire_count--;
1531 vmstats.v_wire_count--;
1532 KKASSERT((p->flags & PG_BUSY) == 0);
1533 vm_page_busy(p);
1534 vm_page_free_zero(p);
1535 pmap->pm_pdirm = NULL;
1536 }
48ffc236
JG
1537 if (pmap->pm_pml4) {
1538 KKASSERT(pmap->pm_pml4 != (PTOV_OFFSET + KPML4phys));
1539 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1540 pmap->pm_pml4 = NULL;
c8fe38ae
MD
1541 }
1542 if (pmap->pm_pteobj) {
1543 vm_object_deallocate(pmap->pm_pteobj);
1544 pmap->pm_pteobj = NULL;
1545 }
d7f50089
YY
1546}
1547
1548/*
c8fe38ae
MD
1549 * Wire in kernel global address entries. To avoid a race condition
1550 * between pmap initialization and pmap_growkernel, this procedure
1551 * adds the pmap to the master list (which growkernel scans to update),
1552 * then copies the template.
d7f50089
YY
1553 */
1554void
c8fe38ae 1555pmap_pinit2(struct pmap *pmap)
48ffc236 1556READY0
d7f50089 1557{
c8fe38ae
MD
1558 crit_enter();
1559 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
1560 /* XXX copies current process, does not fill in MPPTDI */
48ffc236 1561#if JGPMAP32
c8fe38ae 1562 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * PTESIZE);
48ffc236 1563#endif
c8fe38ae 1564 crit_exit();
d7f50089
YY
1565}
1566
1567/*
c8fe38ae
MD
1568 * Attempt to release and free a vm_page in a pmap. Returns 1 on success,
1569 * 0 on failure (if the procedure had to sleep).
d7f50089 1570 *
c8fe38ae
MD
1571 * When asked to remove the page directory page itself, we actually just
1572 * leave it cached so we do not have to incur the SMP inval overhead of
1573 * removing the kernel mapping. pmap_puninit() will take care of it.
d7f50089
YY
1574 */
1575static int
c8fe38ae 1576pmap_release_free_page(struct pmap *pmap, vm_page_t p)
48ffc236 1577READY1
d7f50089 1578{
48ffc236 1579 pml4_entry_t *pml4 = pmap->pm_pml4;
c8fe38ae
MD
1580 /*
1581 * This code optimizes the case of freeing non-busy
1582 * page-table pages. Those pages are zero now, and
1583 * might as well be placed directly into the zero queue.
1584 */
1585 if (vm_page_sleep_busy(p, FALSE, "pmaprl"))
d7f50089 1586 return 0;
d7f50089 1587
c8fe38ae
MD
1588 vm_page_busy(p);
1589
1590 /*
1591 * Remove the page table page from the processes address space.
1592 */
4a4ea614
MD
1593 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1594 /*
1595 * We are the pml4 table itself.
1596 */
1597 /* XXX anything to do here? */
1598 } else if (p->pindex >= (NUPDE + NUPDPE)) {
1b2e0b92
JG
1599 /*
1600 * We are a PDP page.
1601 * We look for the PML4 entry that points to us.
1602 */
1603 vm_page_t m4 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I);
1604 KKASSERT(m4 != NULL);
1605 pml4_entry_t *pml4 = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m4));
1606 int idx = (p->pindex - (NUPDE + NUPDPE)) % NPML4EPG;
1607 KKASSERT(pml4[idx] != 0);
1608 pml4[idx] = 0;
1609 m4->hold_count--;
1610 /* JG What about wire_count? */
1611 } else if (p->pindex >= NUPDE) {
1612 /*
1613 * We are a PD page.
1614 * We look for the PDP entry that points to us.
1615 */
1616 vm_page_t m3 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + (p->pindex - NUPDE) / NPDPEPG);
1617 KKASSERT(m3 != NULL);
1618 pdp_entry_t *pdp = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m3));
1619 int idx = (p->pindex - NUPDE) % NPDPEPG;
1620 KKASSERT(pdp[idx] != 0);
1621 pdp[idx] = 0;
1622 m3->hold_count--;
1623 /* JG What about wire_count? */
1624 } else {
1625 /* We are a PT page.
1626 * We look for the PD entry that points to us.
1627 */
1628 vm_page_t m2 = vm_page_lookup(pmap->pm_pteobj, NUPDE + p->pindex / NPDEPG);
1629 KKASSERT(m2 != NULL);
1630 pd_entry_t *pd = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m2));
1631 int idx = p->pindex % NPDEPG;
1632 pd[idx] = 0;
1633 m2->hold_count--;
1634 /* JG What about wire_count? */
1635 }
c8fe38ae
MD
1636 KKASSERT(pmap->pm_stats.resident_count > 0);
1637 --pmap->pm_stats.resident_count;
1638
1639 if (p->hold_count) {
1640 panic("pmap_release: freeing held page table page");
1641 }
1642 if (pmap->pm_ptphint && (pmap->pm_ptphint->pindex == p->pindex))
1643 pmap->pm_ptphint = NULL;
1644
1b2e0b92
JG
1645 /*
1646 * We leave the top-level page table page cached, wired, and mapped in
1647 * the pmap until the dtor function (pmap_puninit()) gets called.
1648 * However, still clean it up so we can set PG_ZERO.
1649 */
1650 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1651 bzero(pmap->pm_pml4, PAGE_SIZE);
1652 vm_page_flag_set(p, PG_ZERO);
1653 vm_page_wakeup(p);
1654 } else {
1655 p->wire_count--;
1656 vmstats.v_wire_count--;
1657 /* JG eventually revert to using vm_page_free_zero() */
1658 vm_page_free(p);
1659 }
c8fe38ae
MD
1660 return 1;
1661}
d7f50089
YY
1662
1663/*
c8fe38ae
MD
1664 * this routine is called if the page table page is not
1665 * mapped correctly.
d7f50089
YY
1666 */
1667static vm_page_t
c8fe38ae 1668_pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex)
48ffc236 1669READY1
c8fe38ae 1670{
48ffc236 1671 vm_page_t m, pdppg, pdpg;
c8fe38ae
MD
1672
1673 /*
1674 * Find or fabricate a new pagetable page
1675 */
1676 m = vm_page_grab(pmap->pm_pteobj, ptepindex,
1677 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
1678
48ffc236
JG
1679
1680 if ((m->flags & PG_ZERO) == 0) {
1681 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1682 }
1683
c8fe38ae
MD
1684 KASSERT(m->queue == PQ_NONE,
1685 ("_pmap_allocpte: %p->queue != PQ_NONE", m));
1686
1687 /*
1688 * Increment the hold count for the page we will be returning to
1689 * the caller.
1690 */
1691 m->hold_count++;
1692
1693 /*
1694 * It is possible that someone else got in and mapped by the page
1695 * directory page while we were blocked, if so just unbusy and
1696 * return the held page.
1697 */
48ffc236 1698#if JGPMAP32
c8fe38ae
MD
1699 if ((ptepa = pmap->pm_pdir[ptepindex]) != 0) {
1700 KKASSERT((ptepa & PG_FRAME) == VM_PAGE_TO_PHYS(m));
1701 vm_page_wakeup(m);
1702 return(m);
1703 }
48ffc236 1704#endif
c8fe38ae
MD
1705
1706 if (m->wire_count == 0)
1707 vmstats.v_wire_count++;
1708 m->wire_count++;
1709
1710
1711 /*
1712 * Map the pagetable page into the process address space, if
1713 * it isn't already there.
1714 */
1715
1716 ++pmap->pm_stats.resident_count;
1717
48ffc236 1718#if JGPMAP32
c8fe38ae
MD
1719 ptepa = VM_PAGE_TO_PHYS(m);
1720 pmap->pm_pdir[ptepindex] =
1721 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
48ffc236
JG
1722#endif
1723 if (ptepindex >= (NUPDE + NUPDPE)) {
1724 pml4_entry_t *pml4;
1725 vm_pindex_t pml4index;
1726
3535204a 1727 /* Wire up a new PDP page */
48ffc236
JG
1728 pml4index = ptepindex - (NUPDE + NUPDPE);
1729 pml4 = &pmap->pm_pml4[pml4index];
1730 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
1731
1732 } else if (ptepindex >= NUPDE) {
1733 vm_pindex_t pml4index;
1734 vm_pindex_t pdpindex;
1735 pml4_entry_t *pml4;
1736 pdp_entry_t *pdp;
1737
3535204a 1738 /* Wire up a new PD page */
48ffc236
JG
1739 pdpindex = ptepindex - NUPDE;
1740 pml4index = pdpindex >> NPML4EPGSHIFT;
1741
1742 pml4 = &pmap->pm_pml4[pml4index];
1743 if ((*pml4 & PG_V) == 0) {
9f5109e6 1744 /* Have to allocate a new PDP page, recurse */
48ffc236
JG
1745 if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index)
1746 == NULL) {
1747 --m->wire_count;
1748 vm_page_free(m);
1749 return (NULL);
1750 }
1751 } else {
9f5109e6 1752 /* Add reference to the PDP page */
48ffc236 1753 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
1b2e0b92 1754 pdppg->hold_count++;
48ffc236
JG
1755 }
1756 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
c8fe38ae 1757
48ffc236
JG
1758 /* Now find the pdp page */
1759 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1b2e0b92 1760 KKASSERT(*pdp == 0); /* JG DEBUG64 */
48ffc236 1761 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
c8fe38ae 1762
48ffc236
JG
1763 } else {
1764 vm_pindex_t pml4index;
1765 vm_pindex_t pdpindex;
1766 pml4_entry_t *pml4;
1767 pdp_entry_t *pdp;
1768 pd_entry_t *pd;
1769
3535204a 1770 /* Wire up a new PT page */
48ffc236
JG
1771 pdpindex = ptepindex >> NPDPEPGSHIFT;
1772 pml4index = pdpindex >> NPML4EPGSHIFT;
1773
1774 /* First, find the pdp and check that its valid. */
1775 pml4 = &pmap->pm_pml4[pml4index];
1776 if ((*pml4 & PG_V) == 0) {
9f5109e6
JG
1777 /* We miss a PDP page. We ultimately need a PD page.
1778 * Recursively allocating a PD page will allocate
1779 * the missing PDP page and will also allocate
1780 * the PD page we need.
1781 */
1782 /* Have to allocate a new PD page, recurse */
48ffc236
JG
1783 if (_pmap_allocpte(pmap, NUPDE + pdpindex)
1784 == NULL) {
1785 --m->wire_count;
1786 vm_page_free(m);
1787 return (NULL);
1788 }
1789 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1790 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
c8fe38ae 1791 } else {
48ffc236
JG
1792 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1793 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1794 if ((*pdp & PG_V) == 0) {
9f5109e6 1795 /* Have to allocate a new PD page, recurse */
48ffc236
JG
1796 if (_pmap_allocpte(pmap, NUPDE + pdpindex)
1797 == NULL) {
1798 --m->wire_count;
1799 vm_page_free(m);
1800 return (NULL);
1801 }
1802 } else {
9f5109e6 1803 /* Add reference to the PD page */
48ffc236 1804 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1b2e0b92 1805 pdpg->hold_count++;
48ffc236 1806 }
c8fe38ae 1807 }
48ffc236
JG
1808 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
1809
1810 /* Now we know where the page directory page is */
1811 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
1b2e0b92 1812 KKASSERT(*pd == 0); /* JG DEBUG64 */
48ffc236 1813 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
c8fe38ae
MD
1814 }
1815
48ffc236
JG
1816
1817 /*
1818 * Set the page table hint
1819 */
1820 pmap->pm_ptphint = m;
1821
c8fe38ae
MD
1822 m->valid = VM_PAGE_BITS_ALL;
1823 vm_page_flag_clear(m, PG_ZERO);
1824 vm_page_flag_set(m, PG_MAPPED);
1825 vm_page_wakeup(m);
1826
1827 return m;
1828}
1829
1830static vm_page_t
1831pmap_allocpte(pmap_t pmap, vm_offset_t va)
48ffc236 1832READY1
d7f50089 1833{
c8fe38ae 1834 vm_pindex_t ptepindex;
48ffc236 1835 pd_entry_t *pd;
c8fe38ae
MD
1836 vm_page_t m;
1837
1838 /*
1839 * Calculate pagetable page index
1840 */
48ffc236 1841 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
1842
1843 /*
1844 * Get the page directory entry
1845 */
48ffc236 1846 pd = pmap_pde(pmap, va);
c8fe38ae
MD
1847
1848 /*
48ffc236 1849 * This supports switching from a 2MB page to a
c8fe38ae
MD
1850 * normal 4K page.
1851 */
48ffc236 1852 if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
1b2e0b92 1853 panic("no promotion/demotion yet");
48ffc236
JG
1854 *pd = 0;
1855 pd = NULL;
c8fe38ae
MD
1856 cpu_invltlb();
1857 smp_invltlb();
1858 }
1859
1860 /*
1861 * If the page table page is mapped, we just increment the
1862 * hold count, and activate it.
1863 */
48ffc236
JG
1864 if (pd != NULL && (*pd & PG_V) != 0) {
1865 /* YYY hint is used here on i386 */
1866 m = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
1867 pmap->pm_ptphint = m;
c8fe38ae
MD
1868 m->hold_count++;
1869 return m;
1870 }
1871 /*
1872 * Here if the pte page isn't mapped, or if it has been deallocated.
1873 */
1874 return _pmap_allocpte(pmap, ptepindex);
d7f50089
YY
1875}
1876
c8fe38ae
MD
1877
1878/***************************************************
1879 * Pmap allocation/deallocation routines.
1880 ***************************************************/
1881
d7f50089 1882/*
c8fe38ae
MD
1883 * Release any resources held by the given physical map.
1884 * Called when a pmap initialized by pmap_pinit is being released.
1885 * Should only be called if the map contains no valid mappings.
d7f50089 1886 */
c8fe38ae 1887static int pmap_release_callback(struct vm_page *p, void *data);
d7f50089 1888
c8fe38ae
MD
1889void
1890pmap_release(struct pmap *pmap)
48ffc236 1891READY1
d7f50089 1892{
c8fe38ae
MD
1893 vm_object_t object = pmap->pm_pteobj;
1894 struct rb_vm_page_scan_info info;
1895
1896 KASSERT(pmap->pm_active == 0, ("pmap still active! %08x", pmap->pm_active));
1897#if defined(DIAGNOSTIC)
1898 if (object->ref_count != 1)
1899 panic("pmap_release: pteobj reference count != 1");
1900#endif
1901
1902 info.pmap = pmap;
1903 info.object = object;
1904 crit_enter();
1905 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1906 crit_exit();
1907
1908 do {
1909 crit_enter();
1910 info.error = 0;
1911 info.mpte = NULL;
1912 info.limit = object->generation;
1913
1914 vm_page_rb_tree_RB_SCAN(&object->rb_memq, NULL,
1915 pmap_release_callback, &info);
1916 if (info.error == 0 && info.mpte) {
1917 if (!pmap_release_free_page(pmap, info.mpte))
1918 info.error = 1;
1919 }
1920 crit_exit();
1921 } while (info.error);
d7f50089
YY
1922}
1923
d7f50089 1924static int
c8fe38ae 1925pmap_release_callback(struct vm_page *p, void *data)
48ffc236 1926READY1
d7f50089 1927{
c8fe38ae
MD
1928 struct rb_vm_page_scan_info *info = data;
1929
0a5c555b 1930 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
c8fe38ae
MD
1931 info->mpte = p;
1932 return(0);
1933 }
1934 if (!pmap_release_free_page(info->pmap, p)) {
1935 info->error = 1;
1936 return(-1);
1937 }
1938 if (info->object->generation != info->limit) {
1939 info->error = 1;
1940 return(-1);
1941 }
1942 return(0);
d7f50089
YY
1943}
1944
1945/*
c8fe38ae 1946 * Grow the number of kernel page table entries, if needed.
d7f50089 1947 */
c8fe38ae
MD
1948
1949void
1950pmap_growkernel(vm_offset_t addr)
48ffc236 1951READY1
d7f50089 1952{
48ffc236 1953 vm_paddr_t paddr;
c8fe38ae
MD
1954 struct pmap *pmap;
1955 vm_offset_t ptppaddr;
1956 vm_page_t nkpg;
48ffc236
JG
1957 pd_entry_t *pde, newpdir;
1958 pdp_entry_t newpdp;
c8fe38ae
MD
1959
1960 crit_enter();
1961 if (kernel_vm_end == 0) {
1962 kernel_vm_end = KERNBASE;
1963 nkpt = 0;
48ffc236 1964 while ((*pmap_pde(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
c8fe38ae
MD
1965 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1966 nkpt++;
48ffc236
JG
1967 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1968 kernel_vm_end = kernel_map.max_offset;
1969 break;
1970 }
c8fe38ae
MD
1971 }
1972 }
48ffc236
JG
1973 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1974 if (addr - 1 >= kernel_map.max_offset)
1975 addr = kernel_map.max_offset;
c8fe38ae 1976 while (kernel_vm_end < addr) {
48ffc236
JG
1977 pde = pmap_pde(&kernel_pmap, kernel_vm_end);
1978 if (pde == NULL) {
1979 /* We need a new PDP entry */
1980 nkpg = vm_page_alloc(kptobj, nkpt,
1981 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM
1982 | VM_ALLOC_INTERRUPT);
1983 if (nkpg == NULL)
1984 panic("pmap_growkernel: no memory to grow kernel");
1985 if ((nkpg->flags & PG_ZERO) == 0)
1986 pmap_zero_page(nkpg);
1987 paddr = VM_PAGE_TO_PHYS(nkpg);
1988 newpdp = (pdp_entry_t)
1989 (paddr | PG_V | PG_RW | PG_A | PG_M);
1990 *pmap_pdpe(&kernel_pmap, kernel_vm_end) = newpdp;
1991 continue; /* try again */
1992 }
1993 if ((*pde & PG_V) != 0) {
c8fe38ae 1994 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
48ffc236
JG
1995 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1996 kernel_vm_end = kernel_map.max_offset;
1997 break;
1998 }
c8fe38ae
MD
1999 continue;
2000 }
2001
2002 /*
2003 * This index is bogus, but out of the way
2004 */
48ffc236 2005 nkpg = vm_page_alloc(kptobj, nkpt,
c8fe38ae
MD
2006 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM | VM_ALLOC_INTERRUPT);
2007 if (nkpg == NULL)
2008 panic("pmap_growkernel: no memory to grow kernel");
2009
2010 vm_page_wire(nkpg);
2011 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2012 pmap_zero_page(ptppaddr);
2013 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
c8fe38ae
MD
2014 *pmap_pde(&kernel_pmap, kernel_vm_end) = newpdir;
2015 nkpt++;
2016
48ffc236
JG
2017 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
2018 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
2019 kernel_vm_end = kernel_map.max_offset;
2020 break;
c8fe38ae 2021 }
c8fe38ae
MD
2022 }
2023 crit_exit();
d7f50089
YY
2024}
2025
2026/*
c8fe38ae
MD
2027 * Retire the given physical map from service.
2028 * Should only be called if the map contains
2029 * no valid mappings.
d7f50089 2030 */
c8fe38ae
MD
2031void
2032pmap_destroy(pmap_t pmap)
48ffc236 2033READY0
d7f50089 2034{
c8fe38ae
MD
2035 int count;
2036
2037 if (pmap == NULL)
2038 return;
2039
2040 count = --pmap->pm_count;
2041 if (count == 0) {
2042 pmap_release(pmap);
2043 panic("destroying a pmap is not yet implemented");
2044 }
d7f50089
YY
2045}
2046
2047/*
c8fe38ae 2048 * Add a reference to the specified pmap.
d7f50089 2049 */
c8fe38ae
MD
2050void
2051pmap_reference(pmap_t pmap)
48ffc236 2052READY2
d7f50089 2053{
c8fe38ae
MD
2054 if (pmap != NULL) {
2055 pmap->pm_count++;
2056 }
d7f50089
YY
2057}
2058
c8fe38ae
MD
2059/***************************************************
2060* page management routines.
2061 ***************************************************/
d7f50089
YY
2062
2063/*
2064 * free the pv_entry back to the free list. This function may be
2065 * called from an interrupt.
2066 */
c8fe38ae 2067static PMAP_INLINE void
d7f50089 2068free_pv_entry(pv_entry_t pv)
48ffc236 2069READY2
d7f50089 2070{
c8fe38ae 2071 pv_entry_count--;
48ffc236 2072 KKASSERT(pv_entry_count >= 0);
c8fe38ae 2073 zfree(pvzone, pv);
d7f50089
YY
2074}
2075
2076/*
2077 * get a new pv_entry, allocating a block from the system
2078 * when needed. This function may be called from an interrupt.
2079 */
2080static pv_entry_t
2081get_pv_entry(void)
48ffc236 2082READY2
d7f50089 2083{
c8fe38ae
MD
2084 pv_entry_count++;
2085 if (pv_entry_high_water &&
48ffc236
JG
2086 (pv_entry_count > pv_entry_high_water) &&
2087 (pmap_pagedaemon_waken == 0)) {
c8fe38ae 2088 pmap_pagedaemon_waken = 1;
48ffc236 2089 wakeup(&vm_pages_needed);
c8fe38ae
MD
2090 }
2091 return zalloc(pvzone);
d7f50089
YY
2092}
2093
2094/*
2095 * This routine is very drastic, but can save the system
2096 * in a pinch.
2097 */
2098void
2099pmap_collect(void)
48ffc236 2100READY0
d7f50089 2101{
c8fe38ae
MD
2102 int i;
2103 vm_page_t m;
2104 static int warningdone=0;
2105
2106 if (pmap_pagedaemon_waken == 0)
2107 return;
2108
2109 if (warningdone < 5) {
2110 kprintf("pmap_collect: collecting pv entries -- suggest increasing PMAP_SHPGPERPROC\n");
2111 warningdone++;
2112 }
2113
2114 for(i = 0; i < vm_page_array_size; i++) {
2115 m = &vm_page_array[i];
2116 if (m->wire_count || m->hold_count || m->busy ||
2117 (m->flags & PG_BUSY))
2118 continue;
2119 pmap_remove_all(m);
2120 }
48ffc236 2121 pmap_pagedaemon_waken = 0;
d7f50089
YY
2122}
2123
c8fe38ae 2124
d7f50089
YY
2125/*
2126 * If it is the first entry on the list, it is actually
2127 * in the header and we must copy the following entry up
2128 * to the header. Otherwise we must search the list for
2129 * the entry. In either case we free the now unused entry.
2130 */
2131static int
c8fe38ae
MD
2132pmap_remove_entry(struct pmap *pmap, vm_page_t m,
2133 vm_offset_t va, pmap_inval_info_t info)
48ffc236 2134READY1
c8fe38ae
MD
2135{
2136 pv_entry_t pv;
2137 int rtval;
2138
2139 crit_enter();
2140 if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
2141 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2142 if (pmap == pv->pv_pmap && va == pv->pv_va)
2143 break;
2144 }
2145 } else {
2146 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
2147 if (va == pv->pv_va)
2148 break;
2149 }
2150 }
2151
2152 rtval = 0;
48ffc236 2153 /* JGXXX When can 'pv' be NULL? */
c8fe38ae
MD
2154 if (pv) {
2155 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2156 m->md.pv_list_count--;
48ffc236 2157 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2158 if (TAILQ_EMPTY(&m->md.pv_list))
2159 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2160 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
2161 ++pmap->pm_generation;
2162 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem, info);
2163 free_pv_entry(pv);
2164 }
2165 crit_exit();
2166 return rtval;
d7f50089
YY
2167}
2168
2169/*
c8fe38ae
MD
2170 * Create a pv entry for page at pa for
2171 * (pmap, va).
d7f50089
YY
2172 */
2173static void
2174pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m)
48ffc236 2175READY1
d7f50089 2176{
c8fe38ae
MD
2177 pv_entry_t pv;
2178
2179 crit_enter();
2180 pv = get_pv_entry();
2181 pv->pv_va = va;
2182 pv->pv_pmap = pmap;
2183 pv->pv_ptem = mpte;
2184
2185 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
2186 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2187 m->md.pv_list_count++;
2188
2189 crit_exit();
d7f50089
YY
2190}
2191
2192/*
2193 * pmap_remove_pte: do the things to unmap a page in a process
2194 */
2195static int
c8fe38ae
MD
2196pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
2197 pmap_inval_info_t info)
48ffc236 2198READY1
c8fe38ae
MD
2199{
2200 pt_entry_t oldpte;
2201 vm_page_t m;
2202
2203 pmap_inval_add(info, pmap, va);
2204 oldpte = pte_load_clear(ptq);
2205 if (oldpte & PG_W)
2206 pmap->pm_stats.wired_count -= 1;
2207 /*
2208 * Machines that don't support invlpg, also don't support
2209 * PG_G. XXX PG_G is disabled for SMP so don't worry about
2210 * the SMP case.
2211 */
2212 if (oldpte & PG_G)
2213 cpu_invlpg((void *)va);
2214 KKASSERT(pmap->pm_stats.resident_count > 0);
2215 --pmap->pm_stats.resident_count;
2216 if (oldpte & PG_MANAGED) {
2217 m = PHYS_TO_VM_PAGE(oldpte);
2218 if (oldpte & PG_M) {
2219#if defined(PMAP_DIAGNOSTIC)
2220 if (pmap_nw_modified((pt_entry_t) oldpte)) {
2221 kprintf(
48ffc236 2222 "pmap_remove: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2223 va, oldpte);
2224 }
2225#endif
2226 if (pmap_track_modified(va))
2227 vm_page_dirty(m);
2228 }
2229 if (oldpte & PG_A)
2230 vm_page_flag_set(m, PG_REFERENCED);
2231 return pmap_remove_entry(pmap, m, va, info);
2232 } else {
2233 return pmap_unuse_pt(pmap, va, NULL, info);
2234 }
2235
d7f50089
YY
2236 return 0;
2237}
2238
2239/*
2240 * pmap_remove_page:
2241 *
2242 * Remove a single page from a process address space.
2243 *
2244 * This function may not be called from an interrupt if the pmap is
2245 * not kernel_pmap.
2246 */
2247static void
c8fe38ae 2248pmap_remove_page(struct pmap *pmap, vm_offset_t va, pmap_inval_info_t info)
48ffc236 2249READY1
c8fe38ae 2250{
48ffc236 2251 pt_entry_t *pte;
c8fe38ae 2252
48ffc236
JG
2253 pte = pmap_pte(pmap, va);
2254 if (pte == NULL)
2255 return;
2256 if ((*pte & PG_V) == 0)
2257 return;
2258 pmap_remove_pte(pmap, pte, va, info);
d7f50089
YY
2259}
2260
2261/*
2262 * pmap_remove:
2263 *
2264 * Remove the given range of addresses from the specified map.
2265 *
2266 * It is assumed that the start and end are properly
2267 * rounded to the page size.
2268 *
2269 * This function may not be called from an interrupt if the pmap is
2270 * not kernel_pmap.
2271 */
2272void
2273pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
48ffc236 2274READY1
d7f50089 2275{
48ffc236
JG
2276 vm_offset_t va_next;
2277 pml4_entry_t *pml4e;
2278 pdp_entry_t *pdpe;
2279 pd_entry_t ptpaddr, *pde;
2280 pt_entry_t *pte;
c8fe38ae
MD
2281 struct pmap_inval_info info;
2282
2283 if (pmap == NULL)
2284 return;
2285
2286 if (pmap->pm_stats.resident_count == 0)
2287 return;
2288
2289 pmap_inval_init(&info);
2290
2291 /*
2292 * special handling of removing one page. a very
2293 * common operation and easy to short circuit some
2294 * code.
2295 */
48ffc236
JG
2296 if (sva + PAGE_SIZE == eva) {
2297 pde = pmap_pde(pmap, sva);
2298 if (pde && (*pde & PG_PS) == 0) {
2299 pmap_remove_page(pmap, sva, &info);
2300 pmap_inval_flush(&info);
2301 return;
2302 }
c8fe38ae
MD
2303 }
2304
48ffc236
JG
2305 for (; sva < eva; sva = va_next) {
2306 pml4e = pmap_pml4e(pmap, sva);
2307 if ((*pml4e & PG_V) == 0) {
2308 va_next = (sva + NBPML4) & ~PML4MASK;
2309 if (va_next < sva)
2310 va_next = eva;
2311 continue;
2312 }
c8fe38ae 2313
48ffc236
JG
2314 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2315 if ((*pdpe & PG_V) == 0) {
2316 va_next = (sva + NBPDP) & ~PDPMASK;
2317 if (va_next < sva)
2318 va_next = eva;
2319 continue;
2320 }
c8fe38ae
MD
2321
2322 /*
2323 * Calculate index for next page table.
2324 */
48ffc236
JG
2325 va_next = (sva + NBPDR) & ~PDRMASK;
2326 if (va_next < sva)
2327 va_next = eva;
c8fe38ae 2328
48ffc236
JG
2329 pde = pmap_pdpe_to_pde(pdpe, sva);
2330 ptpaddr = *pde;
c8fe38ae
MD
2331
2332 /*
48ffc236 2333 * Weed out invalid mappings.
c8fe38ae
MD
2334 */
2335 if (ptpaddr == 0)
2336 continue;
2337
48ffc236
JG
2338 /*
2339 * Check for large page.
2340 */
2341 if ((ptpaddr & PG_PS) != 0) {
2342 /* JG FreeBSD has more complex treatment here */
2343 pmap_inval_add(&info, pmap, -1);
2344 *pde = 0;
2345 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2346 continue;
2347 }
2348
c8fe38ae
MD
2349 /*
2350 * Limit our scan to either the end of the va represented
2351 * by the current page table page, or to the end of the
2352 * range being removed.
2353 */
48ffc236
JG
2354 if (va_next > eva)
2355 va_next = eva;
c8fe38ae
MD
2356
2357 /*
2358 * NOTE: pmap_remove_pte() can block.
2359 */
48ffc236
JG
2360 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2361 sva += PAGE_SIZE) {
2362 if (*pte == 0)
c8fe38ae 2363 continue;
48ffc236 2364 if (pmap_remove_pte(pmap, pte, sva, &info))
c8fe38ae
MD
2365 break;
2366 }
2367 }
2368 pmap_inval_flush(&info);
d7f50089
YY
2369}
2370
2371/*
2372 * pmap_remove_all:
2373 *
c8fe38ae
MD
2374 * Removes this physical page from all physical maps in which it resides.
2375 * Reflects back modify bits to the pager.
d7f50089 2376 *
c8fe38ae 2377 * This routine may not be called from an interrupt.
d7f50089 2378 */
c8fe38ae 2379
d7f50089
YY
2380static void
2381pmap_remove_all(vm_page_t m)
48ffc236 2382READY1
d7f50089 2383{
c8fe38ae
MD
2384 struct pmap_inval_info info;
2385 pt_entry_t *pte, tpte;
2386 pv_entry_t pv;
2387
2388 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2389 return;
2390
2391 pmap_inval_init(&info);
2392 crit_enter();
2393 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2394 KKASSERT(pv->pv_pmap->pm_stats.resident_count > 0);
2395 --pv->pv_pmap->pm_stats.resident_count;
2396
2397 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
2398 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
2399 tpte = pte_load_clear(pte);
2400
2401 if (tpte & PG_W)
2402 pv->pv_pmap->pm_stats.wired_count--;
2403
2404 if (tpte & PG_A)
2405 vm_page_flag_set(m, PG_REFERENCED);
2406
2407 /*
2408 * Update the vm_page_t clean and reference bits.
2409 */
2410 if (tpte & PG_M) {
2411#if defined(PMAP_DIAGNOSTIC)
48ffc236 2412 if (pmap_nw_modified(tpte)) {
c8fe38ae 2413 kprintf(
48ffc236 2414 "pmap_remove_all: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2415 pv->pv_va, tpte);
2416 }
2417#endif
2418 if (pmap_track_modified(pv->pv_va))
2419 vm_page_dirty(m);
2420 }
2421 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2422 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist);
2423 ++pv->pv_pmap->pm_generation;
2424 m->md.pv_list_count--;
48ffc236 2425 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2426 if (TAILQ_EMPTY(&m->md.pv_list))
2427 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2428 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem, &info);
2429 free_pv_entry(pv);
2430 }
2431 crit_exit();
2432 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
2433 pmap_inval_flush(&info);
d7f50089
YY
2434}
2435
2436/*
2437 * pmap_protect:
2438 *
2439 * Set the physical protection on the specified range of this map
2440 * as requested.
2441 *
2442 * This function may not be called from an interrupt if the map is
2443 * not the kernel_pmap.
2444 */
2445void
2446pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
48ffc236 2447READY1
d7f50089 2448{
48ffc236
JG
2449 vm_offset_t va_next;
2450 pml4_entry_t *pml4e;
2451 pdp_entry_t *pdpe;
2452 pd_entry_t ptpaddr, *pde;
2453 pt_entry_t *pte;
c8fe38ae
MD
2454 pmap_inval_info info;
2455
48ffc236
JG
2456 /* JG review for NX */
2457
c8fe38ae
MD
2458 if (pmap == NULL)
2459 return;
2460
2461 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2462 pmap_remove(pmap, sva, eva);
2463 return;
2464 }
2465
2466 if (prot & VM_PROT_WRITE)
2467 return;
2468
2469 pmap_inval_init(&info);
2470
48ffc236 2471 for (; sva < eva; sva = va_next) {
c8fe38ae 2472
48ffc236
JG
2473 pml4e = pmap_pml4e(pmap, sva);
2474 if ((*pml4e & PG_V) == 0) {
2475 va_next = (sva + NBPML4) & ~PML4MASK;
2476 if (va_next < sva)
2477 va_next = eva;
2478 continue;
2479 }
c8fe38ae 2480
48ffc236
JG
2481 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2482 if ((*pdpe & PG_V) == 0) {
2483 va_next = (sva + NBPDP) & ~PDPMASK;
2484 if (va_next < sva)
2485 va_next = eva;
2486 continue;
2487 }
c8fe38ae 2488
48ffc236
JG
2489 va_next = (sva + NBPDR) & ~PDRMASK;
2490 if (va_next < sva)
2491 va_next = eva;
c8fe38ae 2492
48ffc236
JG
2493 pde = pmap_pdpe_to_pde(pdpe, sva);
2494 ptpaddr = *pde;
c8fe38ae 2495
48ffc236
JG
2496 /*
2497 * Check for large page.
2498 */
2499 if ((ptpaddr & PG_PS) != 0) {
c8fe38ae 2500 pmap_inval_add(&info, pmap, -1);
48ffc236 2501 *pde &= ~(PG_M|PG_RW);
c8fe38ae
MD
2502 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2503 continue;
2504 }
2505
2506 /*
2507 * Weed out invalid mappings. Note: we assume that the page
2508 * directory table is always allocated, and in kernel virtual.
2509 */
2510 if (ptpaddr == 0)
2511 continue;
2512
48ffc236
JG
2513 if (va_next > eva)
2514 va_next = eva;
c8fe38ae 2515
48ffc236
JG
2516 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2517 sva += PAGE_SIZE) {
2518 pt_entry_t obits, pbits;
c8fe38ae
MD
2519 vm_page_t m;
2520
2521 /*
2522 * XXX non-optimal. Note also that there can be
2523 * no pmap_inval_flush() calls until after we modify
2524 * ptbase[sindex] (or otherwise we have to do another
2525 * pmap_inval_add() call).
2526 */
48ffc236
JG
2527 pmap_inval_add(&info, pmap, sva);
2528 obits = pbits = *pte;
2529 if ((pbits & PG_V) == 0)
2530 continue;
c8fe38ae
MD
2531 if (pbits & PG_MANAGED) {
2532 m = NULL;
2533 if (pbits & PG_A) {
48ffc236 2534 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2535 vm_page_flag_set(m, PG_REFERENCED);
2536 pbits &= ~PG_A;
2537 }
2538 if (pbits & PG_M) {
48ffc236 2539 if (pmap_track_modified(sva)) {
c8fe38ae 2540 if (m == NULL)
3cfe1a9f 2541 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2542 vm_page_dirty(m);
2543 pbits &= ~PG_M;
2544 }
2545 }
2546 }
2547
2548 pbits &= ~PG_RW;
2549
48ffc236
JG
2550 if (pbits != obits) {
2551 *pte = pbits;
c8fe38ae
MD
2552 }
2553 }
2554 }
2555 pmap_inval_flush(&info);
d7f50089
YY
2556}
2557
2558/*
c8fe38ae
MD
2559 * Insert the given physical page (p) at
2560 * the specified virtual address (v) in the
2561 * target physical map with the protection requested.
d7f50089 2562 *
c8fe38ae
MD
2563 * If specified, the page will be wired down, meaning
2564 * that the related pte can not be reclaimed.
d7f50089 2565 *
c8fe38ae
MD
2566 * NB: This is the only routine which MAY NOT lazy-evaluate
2567 * or lose information. That is, this routine must actually
2568 * insert this page into the given map NOW.
d7f50089
YY
2569 */
2570void
2571pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2572 boolean_t wired)
48ffc236 2573READY1
d7f50089 2574{
c8fe38ae 2575 vm_paddr_t pa;
48ffc236 2576 pd_entry_t *pde;
c8fe38ae
MD
2577 pt_entry_t *pte;
2578 vm_paddr_t opa;
48ffc236 2579 pt_entry_t origpte, newpte;
c8fe38ae
MD
2580 vm_page_t mpte;
2581 pmap_inval_info info;
2582
2583 if (pmap == NULL)
2584 return;
2585
48ffc236 2586 va = trunc_page(va);
c8fe38ae
MD
2587#ifdef PMAP_DIAGNOSTIC
2588 if (va >= KvaEnd)
2589 panic("pmap_enter: toobig");
2590 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
48ffc236 2591 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
c8fe38ae
MD
2592#endif
2593 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2594 kprintf("Warning: pmap_enter called on UVA with kernel_pmap\n");
48ffc236
JG
2595#ifdef DDB
2596 db_print_backtrace();
2597#endif
c8fe38ae
MD
2598 }
2599 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2600 kprintf("Warning: pmap_enter called on KVA without kernel_pmap\n");
48ffc236
JG
2601#ifdef DDB
2602 db_print_backtrace();
2603#endif
c8fe38ae
MD
2604 }
2605
2606 /*
2607 * In the case that a page table page is not
2608 * resident, we are creating it here.
2609 */
48ffc236 2610 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2611 mpte = pmap_allocpte(pmap, va);
2612 else
2613 mpte = NULL;
2614
2615 pmap_inval_init(&info);
48ffc236
JG
2616 pde = pmap_pde(pmap, va);
2617 if (pde != NULL && (*pde & PG_V) != 0) {
2618 if ((*pde & PG_PS) != 0)
2619 panic("pmap_enter: attempted pmap_enter on 2MB page");
2620 pte = pmap_pde_to_pte(pde, va);
2621 } else
2622 panic("pmap_enter: invalid page directory va=%#lx", va);
2623
2624 KKASSERT(pte != NULL);
2625 pa = VM_PAGE_TO_PHYS(m);
48ffc236 2626 origpte = *pte;
c8fe38ae
MD
2627 opa = origpte & PG_FRAME;
2628
c8fe38ae
MD
2629 /*
2630 * Mapping has not changed, must be protection or wiring change.
2631 */
2632 if (origpte && (opa == pa)) {
2633 /*
2634 * Wiring change, just update stats. We don't worry about
2635 * wiring PT pages as they remain resident as long as there
2636 * are valid mappings in them. Hence, if a user page is wired,
2637 * the PT page will be also.
2638 */
2639 if (wired && ((origpte & PG_W) == 0))
2640 pmap->pm_stats.wired_count++;
2641 else if (!wired && (origpte & PG_W))
2642 pmap->pm_stats.wired_count--;
2643
2644#if defined(PMAP_DIAGNOSTIC)
48ffc236 2645 if (pmap_nw_modified(origpte)) {
c8fe38ae 2646 kprintf(
48ffc236 2647 "pmap_enter: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2648 va, origpte);
2649 }
2650#endif
2651
2652 /*
2653 * Remove the extra pte reference. Note that we cannot
2654 * optimize the RO->RW case because we have adjusted the
2655 * wiring count above and may need to adjust the wiring
2656 * bits below.
2657 */
2658 if (mpte)
2659 mpte->hold_count--;
2660
2661 /*
2662 * We might be turning off write access to the page,
2663 * so we go ahead and sense modify status.
2664 */
2665 if (origpte & PG_MANAGED) {
2666 if ((origpte & PG_M) && pmap_track_modified(va)) {
2667 vm_page_t om;
2668 om = PHYS_TO_VM_PAGE(opa);
2669 vm_page_dirty(om);
2670 }
2671 pa |= PG_MANAGED;
2672 KKASSERT(m->flags & PG_MAPPED);
2673 }
2674 goto validate;
2675 }
2676 /*
2677 * Mapping has changed, invalidate old range and fall through to
2678 * handle validating new mapping.
2679 */
2680 if (opa) {
2681 int err;
2682 err = pmap_remove_pte(pmap, pte, va, &info);
2683 if (err)
48ffc236 2684 panic("pmap_enter: pte vanished, va: 0x%lx", va);
c8fe38ae
MD
2685 }
2686
2687 /*
2688 * Enter on the PV list if part of our managed memory. Note that we
2689 * raise IPL while manipulating pv_table since pmap_enter can be
2690 * called at interrupt time.
2691 */
2692 if (pmap_initialized &&
2693 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2694 pmap_insert_entry(pmap, va, mpte, m);
2695 pa |= PG_MANAGED;
2696 vm_page_flag_set(m, PG_MAPPED);
2697 }
2698
2699 /*
2700 * Increment counters
2701 */
2702 ++pmap->pm_stats.resident_count;
2703 if (wired)
2704 pmap->pm_stats.wired_count++;
2705
2706validate:
2707 /*
2708 * Now validate mapping with desired protection/wiring.
2709 */
48ffc236 2710 newpte = (pt_entry_t) (pa | pte_prot(pmap, prot) | PG_V);
c8fe38ae
MD
2711
2712 if (wired)
2713 newpte |= PG_W;
48ffc236 2714 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2715 newpte |= PG_U;
2716 if (pmap == &kernel_pmap)
2717 newpte |= pgeflag;
2718
2719 /*
2720 * if the mapping or permission bits are different, we need
2721 * to update the pte.
2722 */
2723 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2724 pmap_inval_add(&info, pmap, va);
2725 *pte = newpte | PG_A;
2726 if (newpte & PG_RW)
2727 vm_page_flag_set(m, PG_WRITEABLE);
2728 }
2729 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
2730 pmap_inval_flush(&info);
d7f50089
YY
2731}
2732
2733/*
c8fe38ae
MD
2734 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
2735 * This code also assumes that the pmap has no pre-existing entry for this
2736 * VA.
d7f50089 2737 *
c8fe38ae 2738 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 2739 */
c8fe38ae
MD
2740static void
2741pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
48ffc236 2742READY1
d7f50089 2743{
c8fe38ae
MD
2744 pt_entry_t *pte;
2745 vm_paddr_t pa;
2746 vm_page_t mpte;
2747 vm_pindex_t ptepindex;
48ffc236 2748 pd_entry_t *ptepa;
c8fe38ae
MD
2749 pmap_inval_info info;
2750
2751 pmap_inval_init(&info);
2752
2753 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2754 kprintf("Warning: pmap_enter_quick called on UVA with kernel_pmap\n");
48ffc236
JG
2755#ifdef DDB
2756 db_print_backtrace();
2757#endif
c8fe38ae
MD
2758 }
2759 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2760 kprintf("Warning: pmap_enter_quick called on KVA without kernel_pmap\n");
48ffc236
JG
2761#ifdef DDB
2762 db_print_backtrace();
2763#endif
c8fe38ae
MD
2764 }
2765
2766 KKASSERT(va < UPT_MIN_ADDRESS); /* assert used on user pmaps only */
2767
2768 /*
2769 * Calculate the page table page (mpte), allocating it if necessary.
2770 *
2771 * A held page table page (mpte), or NULL, is passed onto the
2772 * section following.
2773 */
48ffc236 2774 if (va < VM_MAX_USER_ADDRESS) {
c8fe38ae
MD
2775 /*
2776 * Calculate pagetable page index
2777 */
48ffc236 2778 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
2779
2780 do {
2781 /*
2782 * Get the page directory entry
2783 */
48ffc236 2784 ptepa = pmap_pde(pmap, va);
c8fe38ae
MD
2785
2786 /*
2787 * If the page table page is mapped, we just increment
2788 * the hold count, and activate it.
2789 */
48ffc236
JG
2790 if (ptepa && (*ptepa & PG_V) != 0) {
2791 if (*ptepa & PG_PS)
2792 panic("pmap_enter_quick: unexpected mapping into 2MB page");
2793// if (pmap->pm_ptphint &&
2794// (pmap->pm_ptphint->pindex == ptepindex)) {
2795// mpte = pmap->pm_ptphint;
2796// } else {
c8fe38ae
MD
2797 mpte = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
2798 pmap->pm_ptphint = mpte;
48ffc236 2799// }
c8fe38ae
MD
2800 if (mpte)
2801 mpte->hold_count++;
2802 } else {
2803 mpte = _pmap_allocpte(pmap, ptepindex);
2804 }
2805 } while (mpte == NULL);
2806 } else {
2807 mpte = NULL;
2808 /* this code path is not yet used */
2809 }
2810
2811 /*
2812 * With a valid (and held) page directory page, we can just use
2813 * vtopte() to get to the pte. If the pte is already present
2814 * we do not disturb it.
2815 */
2816 pte = vtopte(va);
2817 if (*pte & PG_V) {
2818 if (mpte)
48ffc236 2819 pmap_unwire_pte_hold(pmap, va, mpte, &info);
c8fe38ae
MD
2820 pa = VM_PAGE_TO_PHYS(m);
2821 KKASSERT(((*pte ^ pa) & PG_FRAME) == 0);
2822 return;
2823 }
2824
2825 /*
2826 * Enter on the PV list if part of our managed memory
2827 */
2828 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2829 pmap_insert_entry(pmap, va, mpte, m);
2830 vm_page_flag_set(m, PG_MAPPED);
2831 }
2832
2833 /*
2834 * Increment counters
2835 */
2836 ++pmap->pm_stats.resident_count;
2837
2838 pa = VM_PAGE_TO_PHYS(m);
2839
2840 /*
2841 * Now validate mapping with RO protection
2842 */
2843 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2844 *pte = pa | PG_V | PG_U;
2845 else
2846 *pte = pa | PG_V | PG_U | PG_MANAGED;
2847/* pmap_inval_add(&info, pmap, va); shouldn't be needed inval->valid */
2848 pmap_inval_flush(&info);
d7f50089
YY
2849}
2850
2851/*
c8fe38ae
MD
2852 * Make a temporary mapping for a physical address. This is only intended
2853 * to be used for panic dumps.
d7f50089 2854 */
48ffc236 2855/* JG Needed on amd64? */
c8fe38ae
MD
2856void *
2857pmap_kenter_temporary(vm_paddr_t pa, int i)
48ffc236 2858READY2
d7f50089 2859{
c8fe38ae
MD
2860 pmap_kenter((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
2861 return ((void *)crashdumpmap);
d7f50089
YY
2862}
2863
c8fe38ae
MD
2864#define MAX_INIT_PT (96)
2865
d7f50089
YY
2866/*
2867 * This routine preloads the ptes for a given object into the specified pmap.
2868 * This eliminates the blast of soft faults on process startup and
2869 * immediately after an mmap.
2870 */
2871static int pmap_object_init_pt_callback(vm_page_t p, void *data);
2872
2873void
2874pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
2875 vm_object_t object, vm_pindex_t pindex,
2876 vm_size_t size, int limit)
48ffc236 2877READY1
d7f50089 2878{
c8fe38ae
MD
2879 struct rb_vm_page_scan_info info;
2880 struct lwp *lp;
48ffc236 2881 vm_size_t psize;
c8fe38ae
MD
2882
2883 /*
2884 * We can't preinit if read access isn't set or there is no pmap
2885 * or object.
2886 */
2887 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
2888 return;
2889
2890 /*
2891 * We can't preinit if the pmap is not the current pmap
2892 */
2893 lp = curthread->td_lwp;
2894 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
2895 return;
2896
2897 psize = amd64_btop(size);
2898
2899 if ((object->type != OBJT_VNODE) ||
2900 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
2901 (object->resident_page_count > MAX_INIT_PT))) {
2902 return;
2903 }
2904
2905 if (psize + pindex > object->size) {
2906 if (object->size < pindex)
2907 return;
2908 psize = object->size - pindex;
2909 }
2910
2911 if (psize == 0)
2912 return;
2913
2914 /*
2915 * Use a red-black scan to traverse the requested range and load
2916 * any valid pages found into the pmap.
2917 *
2918 * We cannot safely scan the object's memq unless we are in a
2919 * critical section since interrupts can remove pages from objects.
2920 */
2921 info.start_pindex = pindex;
2922 info.end_pindex = pindex + psize - 1;
2923 info.limit = limit;
2924 info.mpte = NULL;
2925 info.addr = addr;
2926 info.pmap = pmap;
2927
2928 crit_enter();
2929 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
2930 pmap_object_init_pt_callback, &info);
2931 crit_exit();
d7f50089
YY
2932}
2933
2934static
2935int
2936pmap_object_init_pt_callback(vm_page_t p, void *data)
48ffc236 2937READY1
d7f50089 2938{
c8fe38ae
MD
2939 struct rb_vm_page_scan_info *info = data;
2940 vm_pindex_t rel_index;
2941 /*
2942 * don't allow an madvise to blow away our really
2943 * free pages allocating pv entries.
2944 */
2945 if ((info->limit & MAP_PREFAULT_MADVISE) &&
2946 vmstats.v_free_count < vmstats.v_free_reserved) {
2947 return(-1);
2948 }
2949 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2950 (p->busy == 0) && (p->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2951 if ((p->queue - p->pc) == PQ_CACHE)
2952 vm_page_deactivate(p);
2953 vm_page_busy(p);
2954 rel_index = p->pindex - info->start_pindex;
2955 pmap_enter_quick(info->pmap,
2956 info->addr + amd64_ptob(rel_index), p);
2957 vm_page_wakeup(p);
2958 }
d7f50089
YY
2959 return(0);
2960}
2961
2962/*
2963 * pmap_prefault provides a quick way of clustering pagefaults into a
2964 * processes address space. It is a "cousin" of pmap_object_init_pt,
2965 * except it runs at page fault time instead of mmap time.
2966 */
2967#define PFBAK 4
2968#define PFFOR 4
2969#define PAGEORDER_SIZE (PFBAK+PFFOR)
2970
2971static int pmap_prefault_pageorder[] = {
2972 -PAGE_SIZE, PAGE_SIZE,
2973 -2 * PAGE_SIZE, 2 * PAGE_SIZE,
2974 -3 * PAGE_SIZE, 3 * PAGE_SIZE,
2975 -4 * PAGE_SIZE, 4 * PAGE_SIZE
2976};
2977
2978void
2979pmap_prefault(pmap_t pmap, vm_offset_t addra, vm_map_entry_t entry)
48ffc236 2980READY0
d7f50089 2981{
c8fe38ae
MD
2982 int i;
2983 vm_offset_t starta;
2984 vm_offset_t addr;
2985 vm_pindex_t pindex;
2986 vm_page_t m;
2987 vm_object_t object;
2988 struct lwp *lp;
2989
2990 /*
2991 * We do not currently prefault mappings that use virtual page
2992 * tables. We do not prefault foreign pmaps.
2993 */
2994 if (entry->maptype == VM_MAPTYPE_VPAGETABLE)
2995 return;
2996 lp = curthread->td_lwp;
2997 if (lp == NULL || (pmap != vmspace_pmap(lp->lwp_vmspace)))
2998 return;
2999
3000 object = entry->object.vm_object;
3001
3002 starta = addra - PFBAK * PAGE_SIZE;
3003 if (starta < entry->start)
3004 starta = entry->start;
3005 else if (starta > addra)
3006 starta = 0;
3007
3008 /*
3009 * critical section protection is required to maintain the
3010 * page/object association, interrupts can free pages and remove
3011 * them from their objects.
3012 */
3013 crit_enter();
3014 for (i = 0; i < PAGEORDER_SIZE; i++) {
3015 vm_object_t lobject;
3016 pt_entry_t *pte;
3017
3018 addr = addra + pmap_prefault_pageorder[i];
3019 if (addr > addra + (PFFOR * PAGE_SIZE))
3020 addr = 0;
3021
3022 if (addr < starta || addr >= entry->end)
3023 continue;
3024
3025 if ((*pmap_pde(pmap, addr)) == 0)
3026 continue;
3027
3028 pte = vtopte(addr);
3029 if (*pte)
3030 continue;
3031
3032 pindex = ((addr - entry->start) + entry->offset) >> PAGE_SHIFT;
3033 lobject = object;
3034
3035 for (m = vm_page_lookup(lobject, pindex);
3036 (!m && (lobject->type == OBJT_DEFAULT) &&
3037 (lobject->backing_object));
3038 lobject = lobject->backing_object
3039 ) {
3040 if (lobject->backing_object_offset & PAGE_MASK)
3041 break;
3042 pindex += (lobject->backing_object_offset >> PAGE_SHIFT);
3043 m = vm_page_lookup(lobject->backing_object, pindex);
3044 }
3045
3046 /*
3047 * give-up when a page is not in memory
3048 */
3049 if (m == NULL)
3050 break;
3051
3052 if (((m->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
3053 (m->busy == 0) &&
3054 (m->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
3055
3056 if ((m->queue - m->pc) == PQ_CACHE) {
3057 vm_page_deactivate(m);
3058 }
3059 vm_page_busy(m);
3060 pmap_enter_quick(pmap, addr, m);
3061 vm_page_wakeup(m);
3062 }
3063 }
3064 crit_exit();
d7f50089
YY
3065}
3066
3067/*
3068 * Routine: pmap_change_wiring
3069 * Function: Change the wiring attribute for a map/virtual-address
3070 * pair.
3071 * In/out conditions:
3072 * The mapping must already exist in the pmap.
3073 */
3074void
3075pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
48ffc236 3076READY0
d7f50089 3077{
c8fe38ae
MD
3078 pt_entry_t *pte;
3079
3080 if (pmap == NULL)
3081 return;
3082
3083 pte = pmap_pte(pmap, va);
3084
3085 if (wired && !pmap_pte_w(pte))
3086 pmap->pm_stats.wired_count++;
3087 else if (!wired && pmap_pte_w(pte))
3088 pmap->pm_stats.wired_count--;
3089
3090 /*
3091 * Wiring is not a hardware characteristic so there is no need to
3092 * invalidate TLB. However, in an SMP environment we must use
3093 * a locked bus cycle to update the pte (if we are not using
3094 * the pmap_inval_*() API that is)... it's ok to do this for simple
3095 * wiring changes.
3096 */
3097#ifdef SMP
3098 if (wired)
71577ce5 3099 atomic_set_long(pte, PG_W);
c8fe38ae 3100 else
71577ce5 3101 atomic_clear_long(pte, PG_W);
c8fe38ae
MD
3102#else
3103 if (wired)
71577ce5 3104 atomic_set_long_nonlocked(pte, PG_W);
c8fe38ae 3105 else
71577ce5 3106 atomic_clear_long_nonlocked(pte, PG_W);
c8fe38ae 3107#endif
d7f50089
YY
3108}
3109
c8fe38ae
MD
3110
3111
d7f50089
YY
3112/*
3113 * Copy the range specified by src_addr/len
3114 * from the source map to the range dst_addr/len
3115 * in the destination map.
3116 *
3117 * This routine is only advisory and need not do anything.
3118 */
3119void
3120pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
3121 vm_size_t len, vm_offset_t src_addr)
48ffc236 3122READY0
d7f50089 3123{
c8fe38ae
MD
3124 pmap_inval_info info;
3125 vm_offset_t addr;
3126 vm_offset_t end_addr = src_addr + len;
3127 vm_offset_t pdnxt;
3128 pd_entry_t src_frame, dst_frame;
3129 vm_page_t m;
3130
3131 if (dst_addr != src_addr)
3132 return;
3133 /*
3134 * XXX BUGGY. Amoung other things srcmpte is assumed to remain
3135 * valid through blocking calls, and that's just not going to
3136 * be the case.
3137 *
3138 * FIXME!
3139 */
3140 return;
3141
48ffc236 3142#if JGPMAP32
c8fe38ae
MD
3143 src_frame = src_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
3144 if (src_frame != (PTDpde & PG_FRAME)) {
3145 return;
3146 }
3147
3148 dst_frame = dst_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
3149 if (dst_frame != (APTDpde & PG_FRAME)) {
3150 APTDpde = (pd_entry_t) (dst_frame | PG_RW | PG_V);
3151 /* The page directory is not shared between CPUs */
3152 cpu_invltlb();
3153 }
48ffc236 3154#endif
c8fe38ae
MD
3155 pmap_inval_init(&info);
3156 pmap_inval_add(&info, dst_pmap, -1);
3157 pmap_inval_add(&info, src_pmap, -1);
3158
3159 /*
3160 * critical section protection is required to maintain the page/object
3161 * association, interrupts can free pages and remove them from
3162 * their objects.
3163 */
3164 crit_enter();
3165 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3166 pt_entry_t *src_pte, *dst_pte;
3167 vm_page_t dstmpte, srcmpte;
3168 vm_offset_t srcptepaddr;
3169 vm_pindex_t ptepindex;
3170
3171 if (addr >= UPT_MIN_ADDRESS)
3172 panic("pmap_copy: invalid to pmap_copy page tables\n");
3173
3174 /*
3175 * Don't let optional prefaulting of pages make us go
3176 * way below the low water mark of free pages or way
3177 * above high water mark of used pv entries.
3178 */
3179 if (vmstats.v_free_count < vmstats.v_free_reserved ||
3180 pv_entry_count > pv_entry_high_water)
3181 break;
3182
3183 pdnxt = ((addr + PAGE_SIZE*NPTEPG) & ~(PAGE_SIZE*NPTEPG - 1));
3184 ptepindex = addr >> PDRSHIFT;
3185
48ffc236 3186#if JGPMAP32
c8fe38ae 3187 srcptepaddr = (vm_offset_t) src_pmap->pm_pdir[ptepindex];
48ffc236 3188#endif
c8fe38ae
MD
3189 if (srcptepaddr == 0)
3190 continue;
3191
3192 if (srcptepaddr & PG_PS) {
48ffc236 3193#if JGPMAP32
c8fe38ae
MD
3194 if (dst_pmap->pm_pdir[ptepindex] == 0) {
3195 dst_pmap->pm_pdir[ptepindex] = (pd_entry_t) srcptepaddr;
3196 dst_pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3197 }
48ffc236 3198#endif
c8fe38ae
MD
3199 continue;
3200 }
3201
3202 srcmpte = vm_page_lookup(src_pmap->pm_pteobj, ptepindex);
3203 if ((srcmpte == NULL) || (srcmpte->hold_count == 0) ||
3204 (srcmpte->flags & PG_BUSY)) {
3205 continue;
3206 }
3207
3208 if (pdnxt > end_addr)
3209 pdnxt = end_addr;
3210
3211 src_pte = vtopte(addr);
48ffc236 3212#if JGPMAP32
c8fe38ae 3213 dst_pte = avtopte(addr);
48ffc236 3214#endif
c8fe38ae
MD
3215 while (addr < pdnxt) {
3216 pt_entry_t ptetemp;
3217
3218 ptetemp = *src_pte;
3219 /*
3220 * we only virtual copy managed pages
3221 */
3222 if ((ptetemp & PG_MANAGED) != 0) {
3223 /*
3224 * We have to check after allocpte for the
3225 * pte still being around... allocpte can
3226 * block.
3227 *
3228 * pmap_allocpte() can block. If we lose
3229 * our page directory mappings we stop.
3230 */
3231 dstmpte = pmap_allocpte(dst_pmap, addr);
3232
48ffc236 3233#if JGPMAP32
c8fe38ae
MD
3234 if (src_frame != (PTDpde & PG_FRAME) ||
3235 dst_frame != (APTDpde & PG_FRAME)
3236 ) {
3237 kprintf("WARNING: pmap_copy: detected and corrected race\n");
3238 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3239 goto failed;
3240 } else if ((*dst_pte == 0) &&
3241 (ptetemp = *src_pte) != 0 &&
3242 (ptetemp & PG_MANAGED)) {
3243 /*
3244 * Clear the modified and
3245 * accessed (referenced) bits
3246 * during the copy.
3247 */
3248 m = PHYS_TO_VM_PAGE(ptetemp);
3249 *dst_pte = ptetemp & ~(PG_M | PG_A);
3250 ++dst_pmap->pm_stats.resident_count;
3251 pmap_insert_entry(dst_pmap, addr,
3252 dstmpte, m);
3253 KKASSERT(m->flags & PG_MAPPED);
3254 } else {
3255 kprintf("WARNING: pmap_copy: dst_pte race detected and corrected\n");
3256 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3257 goto failed;
3258 }
48ffc236 3259#endif
c8fe38ae
MD
3260 if (dstmpte->hold_count >= srcmpte->hold_count)
3261 break;
3262 }
3263 addr += PAGE_SIZE;
3264 src_pte++;
3265 dst_pte++;
3266 }
3267 }
3268failed:
3269 crit_exit();
3270 pmap_inval_flush(&info);
d7f50089
YY
3271}
3272
3273/*
3274 * pmap_zero_page:
3275 *
48ffc236 3276 * Zero the specified physical page.
d7f50089
YY
3277 *
3278 * This function may be called from an interrupt and no locking is
3279 * required.
3280 */
3281void
3282pmap_zero_page(vm_paddr_t phys)
48ffc236 3283READY1
d7f50089 3284{
48ffc236 3285 vm_offset_t va = PHYS_TO_DMAP(phys);
c8fe38ae 3286
48ffc236 3287 pagezero((void *)va);
d7f50089
YY
3288}
3289
3290/*
3291 * pmap_page_assertzero:
3292 *
3293 * Assert that a page is empty, panic if it isn't.
3294 */
3295void
3296pmap_page_assertzero(vm_paddr_t phys)
48ffc236 3297READY1
d7f50089 3298{
c8fe38ae
MD
3299 struct mdglobaldata *gd = mdcpu;
3300 int i;
3301
3302 crit_enter();
48ffc236
JG
3303 vm_offset_t virt = PHYS_TO_DMAP(phys);
3304
c8fe38ae 3305 for (i = 0; i < PAGE_SIZE; i += sizeof(int)) {
48ffc236 3306 if (*(int *)((char *)virt + i) != 0) {
c8fe38ae 3307 panic("pmap_page_assertzero() @ %p not zero!\n",
48ffc236 3308 (void *)virt);
c8fe38ae
MD
3309 }
3310 }
c8fe38ae 3311 crit_exit();
d7f50089
YY
3312}
3313
3314/*
3315 * pmap_zero_page:
3316 *
3317 * Zero part of a physical page by mapping it into memory and clearing
3318 * its contents with bzero.
3319 *
3320 * off and size may not cover an area beyond a single hardware page.
3321 */
3322void
3323pmap_zero_page_area(vm_paddr_t phys, int off, int size)
48ffc236 3324READY1
d7f50089 3325{
c8fe38ae
MD
3326 struct mdglobaldata *gd = mdcpu;
3327
3328 crit_enter();
48ffc236
JG
3329 vm_offset_t virt = PHYS_TO_DMAP(phys);
3330 bzero((char *)virt + off, size);
c8fe38ae 3331 crit_exit();
d7f50089
YY
3332}
3333
3334/*
3335 * pmap_copy_page:
3336 *
3337 * Copy the physical page from the source PA to the target PA.
3338 * This function may be called from an interrupt. No locking
3339 * is required.
3340 */
3341void
3342pmap_copy_page(vm_paddr_t src, vm_paddr_t dst)
48ffc236 3343READY1
d7f50089 3344{
48ffc236 3345 vm_offset_t src_virt, dst_virt;
c8fe38ae
MD
3346
3347 crit_enter();
48ffc236
JG
3348 src_virt = PHYS_TO_DMAP(src);
3349 dst_virt = PHYS_TO_DMAP(dst);
3350 bcopy(src_virt, dst_virt, PAGE_SIZE);
c8fe38ae 3351 crit_exit();
d7f50089
YY
3352}
3353
3354/*
3355 * pmap_copy_page_frag:
3356 *
3357 * Copy the physical page from the source PA to the target PA.
3358 * This function may be called from an interrupt. No locking
3359 * is required.
3360 */
3361void
3362pmap_copy_page_frag(vm_paddr_t src, vm_paddr_t dst, size_t bytes)
48ffc236 3363READY1
d7f50089 3364{
48ffc236 3365 vm_offset_t src_virt, dst_virt;
c8fe38ae
MD
3366
3367 crit_enter();
48ffc236
JG
3368 src_virt = PHYS_TO_DMAP(src);
3369 dst_virt = PHYS_TO_DMAP(dst);
3370 bcopy((char *)src_virt + (src & PAGE_MASK),
3371 (char *)dst_virt + (dst & PAGE_MASK),
c8fe38ae 3372 bytes);
c8fe38ae 3373 crit_exit();
d7f50089
YY
3374}
3375
3376/*
3377 * Returns true if the pmap's pv is one of the first
3378 * 16 pvs linked to from this page. This count may
3379 * be changed upwards or downwards in the future; it
3380 * is only necessary that true be returned for a small
3381 * subset of pmaps for proper page aging.
3382 */
3383boolean_t
3384pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
48ffc236 3385READY2
d7f50089 3386{
c8fe38ae
MD
3387 pv_entry_t pv;
3388 int loops = 0;
3389
3390 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3391 return FALSE;
3392
3393 crit_enter();
3394
3395 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3396 if (pv->pv_pmap == pmap) {
3397 crit_exit();
3398 return TRUE;
3399 }
3400 loops++;
3401 if (loops >= 16)
3402 break;
3403 }
3404 crit_exit();
d7f50089
YY
3405 return (FALSE);
3406}
3407
3408/*
3409 * Remove all pages from specified address space
3410 * this aids process exit speeds. Also, this code
3411 * is special cased for current process only, but
3412 * can have the more generic (and slightly slower)
3413 * mode enabled. This is much faster than pmap_remove
3414 * in the case of running down an entire address space.
3415 */
3416void
3417pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
48ffc236 3418READY1
d7f50089 3419{
c8fe38ae
MD
3420 struct lwp *lp;
3421 pt_entry_t *pte, tpte;
3422 pv_entry_t pv, npv;
3423 vm_page_t m;
3424 pmap_inval_info info;
3425 int iscurrentpmap;
48ffc236 3426 int save_generation;
c8fe38ae
MD
3427
3428 lp = curthread->td_lwp;
3429 if (lp && pmap == vmspace_pmap(lp->lwp_vmspace))
3430 iscurrentpmap = 1;
3431 else
3432 iscurrentpmap = 0;
3433
3434 pmap_inval_init(&info);
3435 crit_enter();
3436 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
3437 if (pv->pv_va >= eva || pv->pv_va < sva) {
3438 npv = TAILQ_NEXT(pv, pv_plist);
3439 continue;
3440 }
3441
3442 KKASSERT(pmap == pv->pv_pmap);
3443
3444 if (iscurrentpmap)
3445 pte = vtopte(pv->pv_va);
3446 else
3447 pte = pmap_pte_quick(pmap, pv->pv_va);
3448 if (pmap->pm_active)
3449 pmap_inval_add(&info, pmap, pv->pv_va);
3450
3451 /*
3452 * We cannot remove wired pages from a process' mapping
3453 * at this time
3454 */
3455 if (*pte & PG_W) {
3456 npv = TAILQ_NEXT(pv, pv_plist);
3457 continue;
3458 }
3459 tpte = pte_load_clear(pte);
3460
48ffc236 3461 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
c8fe38ae
MD
3462
3463 KASSERT(m < &vm_page_array[vm_page_array_size],
48ffc236 3464 ("pmap_remove_pages: bad tpte %lx", tpte));
c8fe38ae
MD
3465
3466 KKASSERT(pmap->pm_stats.resident_count > 0);
3467 --pmap->pm_stats.resident_count;
3468
3469 /*
3470 * Update the vm_page_t clean and reference bits.
3471 */
3472 if (tpte & PG_M) {
3473 vm_page_dirty(m);
3474 }
3475
3476 npv = TAILQ_NEXT(pv, pv_plist);
3477 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
3478 save_generation = ++pmap->pm_generation;
3479
3480 m->md.pv_list_count--;
3481 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3482 if (TAILQ_EMPTY(&m->md.pv_list))
3483 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
3484
3485 pmap_unuse_pt(pmap, pv->pv_va, pv->pv_ptem, &info);
3486 free_pv_entry(pv);
3487
3488 /*
3489 * Restart the scan if we blocked during the unuse or free
3490 * calls and other removals were made.
3491 */
3492 if (save_generation != pmap->pm_generation) {
3493 kprintf("Warning: pmap_remove_pages race-A avoided\n");
3494 pv = TAILQ_FIRST(&pmap->pm_pvlist);
3495 }
3496 }
3497 pmap_inval_flush(&info);
3498 crit_exit();
d7f50089
YY
3499}
3500
3501/*
c8fe38ae
MD
3502 * pmap_testbit tests bits in pte's
3503 * note that the testbit/clearbit routines are inline,
3504 * and a lot of things compile-time evaluate.
d7f50089
YY
3505 */
3506static boolean_t
3507pmap_testbit(vm_page_t m, int bit)
48ffc236 3508READY1
d7f50089 3509{
c8fe38ae
MD
3510 pv_entry_t pv;
3511 pt_entry_t *pte;
3512
3513 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3514 return FALSE;
3515
3516 if (TAILQ_FIRST(&m->md.pv_list) == NULL)
3517 return FALSE;
3518
3519 crit_enter();
3520
3521 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3522 /*
3523 * if the bit being tested is the modified bit, then
3524 * mark clean_map and ptes as never
3525 * modified.
3526 */
3527 if (bit & (PG_A|PG_M)) {
3528 if (!pmap_track_modified(pv->pv_va))
3529 continue;
3530 }
3531
3532#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3533 if (pv->pv_pmap == NULL) {
3534 kprintf("Null pmap (tb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3535 continue;
3536 }
3537#endif
3538 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3539 if (*pte & bit) {
3540 crit_exit();
3541 return TRUE;
3542 }
3543 }
3544 crit_exit();
d7f50089
YY
3545 return (FALSE);
3546}
3547
3548/*
c8fe38ae 3549 * this routine is used to modify bits in ptes
d7f50089
YY
3550 */
3551static __inline void
3552pmap_clearbit(vm_page_t m, int bit)
48ffc236 3553READY1
d7f50089 3554{
c8fe38ae
MD
3555 struct pmap_inval_info info;
3556 pv_entry_t pv;
3557 pt_entry_t *pte;
3558 pt_entry_t pbits;
3559
3560 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3561 return;
3562
3563 pmap_inval_init(&info);
3564 crit_enter();
3565
3566 /*
3567 * Loop over all current mappings setting/clearing as appropos If
3568 * setting RO do we need to clear the VAC?
3569 */
3570 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3571 /*
3572 * don't write protect pager mappings
3573 */
3574 if (bit == PG_RW) {
3575 if (!pmap_track_modified(pv->pv_va))
3576 continue;
3577 }
3578
3579#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3580 if (pv->pv_pmap == NULL) {
3581 kprintf("Null pmap (cb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3582 continue;
3583 }
3584#endif
3585
3586 /*
3587 * Careful here. We can use a locked bus instruction to
3588 * clear PG_A or PG_M safely but we need to synchronize
3589 * with the target cpus when we mess with PG_RW.
3590 *
3591 * We do not have to force synchronization when clearing
3592 * PG_M even for PTEs generated via virtual memory maps,
3593 * because the virtual kernel will invalidate the pmap
3594 * entry when/if it needs to resynchronize the Modify bit.
3595 */
3596 if (bit & PG_RW)
3597 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
3598 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3599again:
3600 pbits = *pte;
3601 if (pbits & bit) {
3602 if (bit == PG_RW) {
3603 if (pbits & PG_M) {
3604 vm_page_dirty(m);
48ffc236 3605 atomic_clear_long(pte, PG_M|PG_RW);
c8fe38ae
MD
3606 } else {
3607 /*
3608 * The cpu may be trying to set PG_M
3609 * simultaniously with our clearing
3610 * of PG_RW.
3611 */
48ffc236 3612 if (!atomic_cmpset_long(pte, pbits,
c8fe38ae
MD
3613 pbits & ~PG_RW))
3614 goto again;
3615 }
3616 } else if (bit == PG_M) {
3617 /*
3618 * We could also clear PG_RW here to force
3619 * a fault on write to redetect PG_M for
3620 * virtual kernels, but it isn't necessary
3621 * since virtual kernels invalidate