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- For 350 chips, don't set various INTR bits in TX control word; turning INTR
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
984263bc
MD		 1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
7a2a04db 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.44 2008/05/23 15:34:03 sephe Exp $
984263bc
MD		 34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
984263bc
MD		 95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
41d6c56f 103#include <sys/thread2.h>
984263bc
MD		 104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
984263bc 108#include <sys/rman.h>
984263bc
MD		 109#include <sys/malloc.h>
110
111#include <net/if.h>
38de8487 112#include <net/ifq_var.h>
984263bc
MD		 113#include <net/if_arp.h>
114#include <net/ethernet.h>
115#include <net/if_dl.h>
116#include <net/if_types.h>
984263bc 117#include <net/if_media.h>
f8ef32e3
JS		 118#include <netproto/802_11/ieee80211.h>
119#include <netproto/802_11/ieee80211_ioctl.h>
984263bc
MD		 120
121#ifdef INET
122#include <netinet/in.h>
123#include <netinet/in_systm.h>
124#include <netinet/in_var.h>
125#include <netinet/ip.h>
126#endif
127
128#include <net/bpf.h>
129
130#include <machine/md_var.h>
131
1f2de5d4
MD		 132#include "if_aironet_ieee.h"
133#include "if_anreg.h"
984263bc 134
984263bc 135/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 136static void an_reset (struct an_softc *);
1c70eebf 137static int an_init_mpi350_desc (struct an_softc *);
bd4539cc
JH		 138static int an_ioctl (struct ifnet *, u_long, caddr_t,
139 struct ucred *);
b5101a88
RG		 140static void an_init (void *);
141static int an_init_tx_ring (struct an_softc *);
142static void an_start (struct ifnet *);
143static void an_watchdog (struct ifnet *);
144static void an_rxeof (struct an_softc *);
145static void an_txeof (struct an_softc *, int);
146
147static void an_promisc (struct an_softc *, int);
148static int an_cmd (struct an_softc *, int, int);
149static int an_cmd_struct (struct an_softc *, struct an_command *,
150 struct an_reply *);
151static int an_read_record (struct an_softc *, struct an_ltv_gen *);
152static int an_write_record (struct an_softc *, struct an_ltv_gen *);
153static int an_read_data (struct an_softc *, int,
154 int, caddr_t, int);
155static int an_write_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_seek (struct an_softc *, int, int, int);
158static int an_alloc_nicmem (struct an_softc *, int, int *);
159static int an_dma_malloc (struct an_softc *, bus_size_t,
160 struct an_dma_alloc *, int);
161static void an_dma_free (struct an_softc *,
162 struct an_dma_alloc *);
163static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
164static void an_stats_update (void *);
165static void an_setdef (struct an_softc *, struct an_req *);
984263bc 166#ifdef ANCACHE
3013ac0e
JS		 167static void an_cache_store (struct an_softc *, struct mbuf *,
168 uint8_t, uint8_t);
984263bc
MD		 169#endif
170
171/* function definitions for use with the Cisco's Linux configuration
172 utilities
173*/
174
b5101a88
RG		 175static int readrids (struct ifnet*, struct aironet_ioctl*);
176static int writerids (struct ifnet*, struct aironet_ioctl*);
177static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 178
b5101a88
RG		 179static int cmdreset (struct ifnet *);
180static int setflashmode (struct ifnet *);
181static int flashgchar (struct ifnet *,int,int);
182static int flashpchar (struct ifnet *,int,int);
183static int flashputbuf (struct ifnet *);
184static int flashrestart (struct ifnet *);
185static int WaitBusy (struct ifnet *, int);
186static int unstickbusy (struct ifnet *);
984263bc 187
b5101a88
RG		 188static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
189 char *);
984263bc 190
b5101a88
RG		 191static int an_media_change (struct ifnet *);
192static void an_media_status (struct ifnet *, struct ifmediareq *);
984263bc
MD		 193
194static int an_dump = 0;
195static int an_cache_mode = 0;
196
197#define DBM 0
198#define PERCENT 1
199#define RAW 2
200
201static char an_conf[256];
202static char an_conf_cache[256];
203
32832096
MD		 204DECLARE_DUMMY_MODULE(if_an);
205
984263bc
MD		 206/* sysctl vars */
207
208SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
209
210static int
211sysctl_an_dump(SYSCTL_HANDLER_ARGS)
212{
213 int error, r, last;
214 char *s = an_conf;
215
216 last = an_dump;
217
218 switch (an_dump) {
219 case 0:
220 strcpy(an_conf, "off");
221 break;
222 case 1:
223 strcpy(an_conf, "type");
224 break;
225 case 2:
226 strcpy(an_conf, "dump");
227 break;
228 default:
f8c7a42d 229 ksnprintf(an_conf, 5, "%x", an_dump);
984263bc
MD		 230 break;
231 }
232
233 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
234
235 if (strncmp(an_conf,"off", 3) == 0) {
236 an_dump = 0;
237 }
238 if (strncmp(an_conf,"dump", 4) == 0) {
239 an_dump = 1;
240 }
241 if (strncmp(an_conf,"type", 4) == 0) {
242 an_dump = 2;
243 }
244 if (*s == 'f') {
245 r = 0;
246 for (;;s++) {
247 if ((*s >= '0') && (*s <= '9')) {
248 r = r * 16 + (*s - '0');
249 } else if ((*s >= 'a') && (*s <= 'f')) {
250 r = r * 16 + (*s - 'a' + 10);
251 } else {
252 break;
253 }
254 }
255 an_dump = r;
256 }
257 if (an_dump != last)
e3869ec7 258 kprintf("Sysctl changed for Aironet driver\n");
984263bc
MD		 259
260 return error;
261}
262
263SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
264 0, sizeof(an_conf), sysctl_an_dump, "A", "");
265
266static int
267sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
268{
269 int error, last;
270
271 last = an_cache_mode;
272
273 switch (an_cache_mode) {
274 case 1:
275 strcpy(an_conf_cache, "per");
276 break;
277 case 2:
278 strcpy(an_conf_cache, "raw");
279 break;
280 default:
281 strcpy(an_conf_cache, "dbm");
282 break;
283 }
284
285 error = sysctl_handle_string(oidp, an_conf_cache,
286 sizeof(an_conf_cache), req);
287
288 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
289 an_cache_mode = 0;
290 }
291 if (strncmp(an_conf_cache,"per", 3) == 0) {
292 an_cache_mode = 1;
293 }
294 if (strncmp(an_conf_cache,"raw", 3) == 0) {
295 an_cache_mode = 2;
296 }
297
298 return error;
299}
300
301SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
302 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
303
304/*
305 * We probe for an Aironet 4500/4800 card by attempting to
306 * read the default SSID list. On reset, the first entry in
307 * the SSID list will contain the name "tsunami." If we don't
308 * find this, then there's no card present.
309 */
310int
c436375a 311an_probe(device_t dev)
984263bc
MD		 312{
313 struct an_softc *sc = device_get_softc(dev);
537b8fd3 314 struct an_ltv_ssidlist_new ssid;
984263bc
MD		 315 int error;
316
317 bzero((char *)&ssid, sizeof(ssid));
318
319 error = an_alloc_port(dev, 0, AN_IOSIZ);
902f6373
JS		 320 if (error)
321 return (error);
984263bc
MD		 322
323 /* can't do autoprobing */
324 if (rman_get_start(sc->port_res) == -1)
902f6373 325 return(ENXIO);
984263bc
MD		 326
327 /*
328 * We need to fake up a softc structure long enough
329 * to be able to issue commands and call some of the
330 * other routines.
331 */
332 sc->an_bhandle = rman_get_bushandle(sc->port_res);
333 sc->an_btag = rman_get_bustag(sc->port_res);
984263bc
MD		 334
335 ssid.an_len = sizeof(ssid);
336 ssid.an_type = AN_RID_SSIDLIST;
337
338 /* Make sure interrupts are disabled. */
537b8fd3 339 sc->mpi350 = 0;
984263bc
MD		 340 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
341 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
342
1c70eebf
JS		 343 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
344 device_get_unit(dev));
984263bc 345 an_reset(sc);
984263bc
MD		 346
347 if (an_cmd(sc, AN_CMD_READCFG, 0))
902f6373 348 return(ENXIO);
984263bc
MD		 349
350 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
902f6373 351 return(ENXIO);
984263bc
MD		 352
353 /* See if the ssid matches what we expect ... but doesn't have to */
537b8fd3 354 if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID))
902f6373 355 return(ENXIO);
984263bc 356
902f6373 357 return(0);
984263bc
MD		 358}
359
360/*
361 * Allocate a port resource with the given resource id.
362 */
363int
c436375a 364an_alloc_port(device_t dev, int rid, int size)
984263bc
MD		 365{
366 struct an_softc *sc = device_get_softc(dev);
367 struct resource *res;
368
369 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
370 0ul, ~0ul, size, RF_ACTIVE);
371 if (res) {
372 sc->port_rid = rid;
373 sc->port_res = res;
374 return (0);
375 } else {
376 return (ENOENT);
377 }
378}
379
380/*
381 * Allocate a memory resource with the given resource id.
382 */
c436375a
SW		 383int
384an_alloc_memory(device_t dev, int rid, int size)
984263bc
MD		 385{
386 struct an_softc *sc = device_get_softc(dev);
387 struct resource *res;
388
389 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
390 0ul, ~0ul, size, RF_ACTIVE);
391 if (res) {
392 sc->mem_rid = rid;
393 sc->mem_res = res;
394 sc->mem_used = size;
395 return (0);
396 } else {
397 return (ENOENT);
398 }
399}
400
401/*
402 * Allocate a auxilary memory resource with the given resource id.
403 */
7b9f668c
SW		 404int
405an_alloc_aux_memory(device_t dev, int rid, int size)
984263bc
MD		 406{
407 struct an_softc *sc = device_get_softc(dev);
408 struct resource *res;
409
410 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
411 0ul, ~0ul, size, RF_ACTIVE);
412 if (res) {
413 sc->mem_aux_rid = rid;
414 sc->mem_aux_res = res;
415 sc->mem_aux_used = size;
416 return (0);
417 } else {
418 return (ENOENT);
419 }
420}
421
422/*
423 * Allocate an irq resource with the given resource id.
424 */
425int
c436375a 426an_alloc_irq(device_t dev, int rid, int flags)
984263bc
MD		 427{
428 struct an_softc *sc = device_get_softc(dev);
429 struct resource *res;
430
4e6d744d
JS		 431 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
432 (RF_ACTIVE | flags));
984263bc
MD		 433 if (res) {
434 sc->irq_rid = rid;
435 sc->irq_res = res;
436 return (0);
437 } else {
438 return (ENOENT);
439 }
440}
441
442static void
c436375a 443an_dma_malloc_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
984263bc
MD		 444{
445 bus_addr_t *paddr = (bus_addr_t*) arg;
446 *paddr = segs->ds_addr;
447}
448
449/*
450 * Alloc DMA memory and set the pointer to it
451 */
452static int
c436375a
SW		 453an_dma_malloc(struct an_softc *sc, bus_size_t size, struct an_dma_alloc *dma,
454 int mapflags)
984263bc
MD		 455{
456 int r;
457
c45c9d6a 458 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
984263bc
MD		 459 if (r != 0)
460 goto fail_0;
461
462 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 463 BUS_DMA_WAITOK, &dma->an_dma_map);
984263bc
MD		 464 if (r != 0)
465 goto fail_1;
466
467 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
468 size,
469 an_dma_malloc_cb,
470 &dma->an_dma_paddr,
c45c9d6a 471 mapflags);
984263bc
MD		 472 if (r != 0)
473 goto fail_2;
474
475 dma->an_dma_size = size;
476 return (0);
477
478fail_2:
479 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
480fail_1:
481 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
482fail_0:
483 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
484 dma->an_dma_map = NULL;
485 return (r);
486}
487
488static void
c436375a 489an_dma_free(struct an_softc *sc, struct an_dma_alloc *dma)
984263bc
MD		 490{
491 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
492 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
b92f9c1c 493 dma->an_dma_vaddr = NULL;
984263bc
MD		 494 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
495}
496
497/*
498 * Release all resources
499 */
500void
c436375a 501an_release_resources(device_t dev)
984263bc
MD		 502{
503 struct an_softc *sc = device_get_softc(dev);
504 int i;
505
506 if (sc->port_res) {
507 bus_release_resource(dev, SYS_RES_IOPORT,
508 sc->port_rid, sc->port_res);
509 sc->port_res = 0;
510 }
511 if (sc->mem_res) {
512 bus_release_resource(dev, SYS_RES_MEMORY,
513 sc->mem_rid, sc->mem_res);
514 sc->mem_res = 0;
515 }
516 if (sc->mem_aux_res) {
517 bus_release_resource(dev, SYS_RES_MEMORY,
518 sc->mem_aux_rid, sc->mem_aux_res);
519 sc->mem_aux_res = 0;
520 }
521 if (sc->irq_res) {
522 bus_release_resource(dev, SYS_RES_IRQ,
523 sc->irq_rid, sc->irq_res);
524 sc->irq_res = 0;
525 }
526 if (sc->an_rid_buffer.an_dma_paddr) {
527 an_dma_free(sc, &sc->an_rid_buffer);
528 }
529 for (i = 0; i < AN_MAX_RX_DESC; i++)
530 if (sc->an_rx_buffer[i].an_dma_paddr) {
531 an_dma_free(sc, &sc->an_rx_buffer[i]);
532 }
533 for (i = 0; i < AN_MAX_TX_DESC; i++)
534 if (sc->an_tx_buffer[i].an_dma_paddr) {
535 an_dma_free(sc, &sc->an_tx_buffer[i]);
536 }
537 if (sc->an_dtag) {
538 bus_dma_tag_destroy(sc->an_dtag);
539 }
540
541}
542
543int
c436375a 544an_init_mpi350_desc(struct an_softc *sc)
984263bc
MD		 545{
546 struct an_command cmd_struct;
547 struct an_reply reply;
548 struct an_card_rid_desc an_rid_desc;
549 struct an_card_rx_desc an_rx_desc;
550 struct an_card_tx_desc an_tx_desc;
551 int i, desc;
552
553 if(!sc->an_rid_buffer.an_dma_paddr)
554 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
555 &sc->an_rid_buffer, 0);
556 for (i = 0; i < AN_MAX_RX_DESC; i++)
557 if(!sc->an_rx_buffer[i].an_dma_paddr)
558 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
559 &sc->an_rx_buffer[i], 0);
560 for (i = 0; i < AN_MAX_TX_DESC; i++)
561 if(!sc->an_tx_buffer[i].an_dma_paddr)
562 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
563 &sc->an_tx_buffer[i], 0);
564
565 /*
566 * Allocate RX descriptor
567 */
568 bzero(&reply,sizeof(reply));
569 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
570 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
571 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
572 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
573 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS		 574 if_printf(&sc->arpcom.ac_if,
575 "failed to allocate RX descriptor\n");
984263bc
MD		 576 return(EIO);
577 }
578
579 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
580 bzero(&an_rx_desc, sizeof(an_rx_desc));
581 an_rx_desc.an_valid = 1;
582 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
583 an_rx_desc.an_done = 0;
584 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
585
586 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
587 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
588 + (desc * sizeof(an_rx_desc))
589 + (i * 4),
590 ((u_int32_t*)&an_rx_desc)[i]);
591 }
592
593 /*
594 * Allocate TX descriptor
595 */
596
597 bzero(&reply,sizeof(reply));
598 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
599 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
600 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
601 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
602 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS		 603 if_printf(&sc->arpcom.ac_if,
604 "failed to allocate TX descriptor\n");
984263bc
MD		 605 return(EIO);
606 }
607
608 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
609 bzero(&an_tx_desc, sizeof(an_tx_desc));
610 an_tx_desc.an_offset = 0;
611 an_tx_desc.an_eoc = 0;
612 an_tx_desc.an_valid = 0;
613 an_tx_desc.an_len = 0;
614 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
615
616 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
617 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
618 + (desc * sizeof(an_tx_desc))
619 + (i * 4),
620 ((u_int32_t*)&an_tx_desc)[i]);
621 }
622
623 /*
624 * Allocate RID descriptor
625 */
626
627 bzero(&reply,sizeof(reply));
628 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
629 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
630 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
631 cmd_struct.an_parm2 = 1;
632 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS		 633 if_printf(&sc->arpcom.ac_if,
634 "failed to allocate host descriptor\n");
984263bc
MD		 635 return(EIO);
636 }
637
638 bzero(&an_rid_desc, sizeof(an_rid_desc));
639 an_rid_desc.an_valid = 1;
640 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
641 an_rid_desc.an_rid = 0;
642 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
643
644 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
645 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
646 ((u_int32_t*)&an_rid_desc)[i]);
647
648 return(0);
649}
650
651int
c436375a 652an_attach(struct an_softc *sc, device_t dev, int flags)
984263bc
MD		 653{
654 struct ifnet *ifp = &sc->arpcom.ac_if;
655 int error;
656
89c0f216 657 callout_init(&sc->an_stat_timer);
984263bc
MD		 658 sc->an_associated = 0;
659 sc->an_monitor = 0;
660 sc->an_was_monitor = 0;
661 sc->an_flash_buffer = NULL;
662
1c70eebf
JS		 663 ifp->if_softc = sc;
664 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
665
984263bc
MD		 666 /* Reset the NIC. */
667 an_reset(sc);
668 if (sc->mpi350) {
669 error = an_init_mpi350_desc(sc);
670 if (error)
671 return(error);
672 }
673
674 /* Load factory config */
675 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 676 device_printf(dev, "failed to load config data\n");
984263bc
MD		 677 return(EIO);
678 }
679
680 /* Read the current configuration */
681 sc->an_config.an_type = AN_RID_GENCONFIG;
682 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
683 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 684 device_printf(dev, "read record failed\n");
984263bc
MD		 685 return(EIO);
686 }
687
688 /* Read the card capabilities */
689 sc->an_caps.an_type = AN_RID_CAPABILITIES;
690 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
691 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 692 device_printf(dev, "read record failed\n");
984263bc
MD		 693 return(EIO);
694 }
695
696 /* Read ssid list */
697 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 698 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 699 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 700 device_printf(dev, "read record failed\n");
984263bc
MD		 701 return(EIO);
702 }
703
704 /* Read AP list */
705 sc->an_aplist.an_type = AN_RID_APLIST;
706 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
707 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 708 device_printf(dev, "read record failed\n");
984263bc
MD		 709 return(EIO);
710 }
711
712#ifdef ANCACHE
713 /* Read the RSSI <-> dBm map */
714 sc->an_have_rssimap = 0;
715 if (sc->an_caps.an_softcaps & 8) {
716 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
717 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
718 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 719 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 720 } else {
1c70eebf 721 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD		 722 sc->an_have_rssimap = 1;
723 }
724 } else {
1c70eebf 725 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD		 726 }
727#endif
728
984263bc
MD		 729 ifp->if_mtu = ETHERMTU;
730 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
731 ifp->if_ioctl = an_ioctl;
984263bc
MD		 732 ifp->if_start = an_start;
733 ifp->if_watchdog = an_watchdog;
734 ifp->if_init = an_init;
735 ifp->if_baudrate = 10000000;
38de8487
JS		 736 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
737 ifq_set_ready(&ifp->if_snd);
984263bc
MD		 738
739 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
740 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
741 sizeof(AN_DEFAULT_NODENAME) - 1);
742
537b8fd3
JS		 743 bzero(sc->an_ssidlist.an_entry[0].an_ssid,
744 sizeof(sc->an_ssidlist.an_entry[0].an_ssid));
745 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid,
746 sizeof(AN_DEFAULT_NETNAME) - 1);
747 sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME);
984263bc
MD		 748
749 sc->an_config.an_opmode =
750 AN_OPMODE_INFRASTRUCTURE_STATION;
751
752 sc->an_tx_rate = 0;
753 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
754
755 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
756#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
757 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
758 IFM_IEEE80211_ADHOC, 0), 0);
759 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
760 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
761 IFM_IEEE80211_ADHOC, 0), 0);
762 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
763 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
764 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
765 IFM_IEEE80211_ADHOC, 0), 0);
766 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
767 }
768 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
769 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
770 IFM_IEEE80211_ADHOC, 0), 0);
771 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
772 }
773 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
774 IFM_IEEE80211_ADHOC, 0), 0);
775 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
776#undef ADD
777 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
778 0, 0));
779
780 /*
781 * Call MI attach routine.
782 */
78195a76 783 ether_ifattach(ifp, sc->an_caps.an_oemaddr, NULL);
984263bc
MD		 784
785 return(0);
786}
787
fcb0f42c
JS		 788int
789an_detach(device_t dev)
790{
791 struct an_softc *sc = device_get_softc(dev);
792 struct ifnet *ifp = &sc->arpcom.ac_if;
793
78195a76 794 lwkt_serialize_enter(ifp->if_serializer);
fcb0f42c 795 an_stop(sc);
cdf89432
SZ		 796 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
797 lwkt_serialize_exit(ifp->if_serializer);
798
fcb0f42c
JS		 799 ifmedia_removeall(&sc->an_ifmedia);
800 ether_ifdetach(ifp);
fcb0f42c
JS		 801 an_release_resources(dev);
802 return 0;
803}
804
984263bc 805static void
c436375a 806an_rxeof(struct an_softc *sc)
984263bc
MD		 807{
808 struct ifnet *ifp;
809 struct ether_header *eh;
810 struct ieee80211_frame *ih;
811 struct an_rxframe rx_frame;
812 struct an_rxframe_802_3 rx_frame_802_3;
813 struct mbuf *m;
814 int len, id, error = 0, i, count = 0;
815 int ieee80211_header_len;
816 u_char *bpf_buf;
817 u_short fc1;
818 struct an_card_rx_desc an_rx_desc;
819 u_int8_t *buf;
820
821 ifp = &sc->arpcom.ac_if;
822
823 if (!sc->mpi350) {
824 id = CSR_READ_2(sc, AN_RX_FID);
825
826 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
827 /* read raw 802.11 packet */
828 bpf_buf = sc->buf_802_11;
829
830 /* read header */
831 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
832 sizeof(rx_frame))) {
833 ifp->if_ierrors++;
834 return;
835 }
836
837 /*
838 * skip beacon by default since this increases the
839 * system load a lot
840 */
841
842 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
843 (rx_frame.an_frame_ctl &
844 IEEE80211_FC0_SUBTYPE_BEACON)) {
845 return;
846 }
847
848 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
849 len = rx_frame.an_rx_payload_len
850 + sizeof(rx_frame);
851 /* Check for insane frame length */
852 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS		 853 if_printf(ifp,
854 "oversized packet received "
855 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD		 856 ifp->if_ierrors++;
857 return;
858 }
859
860 bcopy((char *)&rx_frame,
861 bpf_buf, sizeof(rx_frame));
862
863 error = an_read_data(sc, id, sizeof(rx_frame),
864 (caddr_t)bpf_buf+sizeof(rx_frame),
865 rx_frame.an_rx_payload_len);
866 } else {
867 fc1=rx_frame.an_frame_ctl >> 8;
868 ieee80211_header_len =
869 sizeof(struct ieee80211_frame);
870 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
871 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
872 ieee80211_header_len += ETHER_ADDR_LEN;
873 }
874
875 len = rx_frame.an_rx_payload_len
876 + ieee80211_header_len;
877 /* Check for insane frame length */
878 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS		 879 if_printf(ifp,
880 "oversized packet received "
881 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD		 882 ifp->if_ierrors++;
883 return;
884 }
885
886 ih = (struct ieee80211_frame *)bpf_buf;
887
888 bcopy((char *)&rx_frame.an_frame_ctl,
889 (char *)ih, ieee80211_header_len);
890
891 error = an_read_data(sc, id, sizeof(rx_frame) +
892 rx_frame.an_gaplen,
893 (caddr_t)ih +ieee80211_header_len,
894 rx_frame.an_rx_payload_len);
895 }
7600679e 896 BPF_TAP(ifp, bpf_buf, len);
984263bc 897 } else {
17b71a59 898 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD		 899 if (m == NULL) {
900 ifp->if_ierrors++;
901 return;
902 }
984263bc
MD		 903 m->m_pkthdr.rcvif = ifp;
904 /* Read Ethernet encapsulated packet */
905
906#ifdef ANCACHE
907 /* Read NIC frame header */
908 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
909 sizeof(rx_frame))) {
910 ifp->if_ierrors++;
911 return;
912 }
913#endif
914 /* Read in the 802_3 frame header */
915 if (an_read_data(sc, id, 0x34,
916 (caddr_t)&rx_frame_802_3,
917 sizeof(rx_frame_802_3))) {
918 ifp->if_ierrors++;
919 return;
920 }
921 if (rx_frame_802_3.an_rx_802_3_status != 0) {
922 ifp->if_ierrors++;
923 return;
924 }
925 /* Check for insane frame length */
926 len = rx_frame_802_3.an_rx_802_3_payload_len;
927 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS		 928 if_printf(ifp,
929 "oversized packet received (%d, %d)\n",
930 len, MCLBYTES);
984263bc
MD		 931 ifp->if_ierrors++;
932 return;
933 }
934 m->m_pkthdr.len = m->m_len =
935 rx_frame_802_3.an_rx_802_3_payload_len + 12;
936
937 eh = mtod(m, struct ether_header *);
938
939 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
940 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
941 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
942 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
943
944 /* in mbuf header type is just before payload */
945 error = an_read_data(sc, id, 0x44,
946 (caddr_t)&(eh->ether_type),
947 rx_frame_802_3.an_rx_802_3_payload_len);
948
949 if (error) {
950 m_freem(m);
951 ifp->if_ierrors++;
952 return;
953 }
954 ifp->if_ipackets++;
955
984263bc 956#ifdef ANCACHE
3013ac0e 957 an_cache_store(sc, m,
984263bc
MD		 958 rx_frame.an_rx_signal_strength,
959 rx_frame.an_rsvd0);
960#endif
78195a76 961 ifp->if_input(ifp, m);
984263bc
MD		 962 }
963
964 } else { /* MPI-350 */
965 for (count = 0; count < AN_MAX_RX_DESC; count++){
966 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
967 ((u_int32_t*)&an_rx_desc)[i]
968 = CSR_MEM_AUX_READ_4(sc,
969 AN_RX_DESC_OFFSET
970 + (count * sizeof(an_rx_desc))
971 + (i * 4));
972
973 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
974 buf = sc->an_rx_buffer[count].an_dma_vaddr;
975
17b71a59 976 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD		 977 if (m == NULL) {
978 ifp->if_ierrors++;
979 return;
980 }
984263bc
MD		 981 m->m_pkthdr.rcvif = ifp;
982 /* Read Ethernet encapsulated packet */
983
984 /*
985 * No ANCACHE support since we just get back
986 * an Ethernet packet no 802.11 info
987 */
988#if 0
989#ifdef ANCACHE
990 /* Read NIC frame header */
991 bcopy(buf, (caddr_t)&rx_frame,
992 sizeof(rx_frame));
993#endif
994#endif
995 /* Check for insane frame length */
996 len = an_rx_desc.an_len + 12;
997 if (len > MCLBYTES) {
1c70eebf
JS		 998 if_printf(ifp,
999 "oversized packet received "
1000 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD		 1001 ifp->if_ierrors++;
1002 return;
1003 }
1004
1005 m->m_pkthdr.len = m->m_len =
1006 an_rx_desc.an_len + 12;
1007
1008 eh = mtod(m, struct ether_header *);
1009
1010 bcopy(buf, (char *)eh,
1011 m->m_pkthdr.len);
1012
1013 ifp->if_ipackets++;
1014
984263bc
MD		 1015#if 0
1016#ifdef ANCACHE
3013ac0e 1017 an_cache_store(sc, m,
984263bc
MD		 1018 rx_frame.an_rx_signal_strength,
1019 rx_frame.an_rsvd0);
1020#endif
1021#endif
78195a76 1022 ifp->if_input(ifp, m);
984263bc
MD		 1023
1024 an_rx_desc.an_valid = 1;
1025 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1026 an_rx_desc.an_done = 0;
1027 an_rx_desc.an_phys =
1028 sc->an_rx_buffer[count].an_dma_paddr;
1029
1030 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1031 CSR_MEM_AUX_WRITE_4(sc,
1032 AN_RX_DESC_OFFSET
1033 + (count * sizeof(an_rx_desc))
1034 + (i * 4),
1035 ((u_int32_t*)&an_rx_desc)[i]);
1036
1037 } else {
1c70eebf
JS		 1038 if_printf(ifp, "Didn't get valid RX packet "
1039 "%x %x %d\n",
1040 an_rx_desc.an_done,
1041 an_rx_desc.an_valid,
1042 an_rx_desc.an_len);
984263bc
MD		 1043 }
1044 }
1045 }
1046}
1047
1048static void
c436375a 1049an_txeof(struct an_softc *sc, int status)
984263bc
MD		 1050{
1051 struct ifnet *ifp;
1052 int id, i;
1053
1054 ifp = &sc->arpcom.ac_if;
1055
1056 ifp->if_timer = 0;
1057 ifp->if_flags &= ~IFF_OACTIVE;
1058
1059 if (!sc->mpi350) {
537b8fd3 1060 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
984263bc
MD		 1061
1062 if (status & AN_EV_TX_EXC) {
1063 ifp->if_oerrors++;
1064 } else
1065 ifp->if_opackets++;
1066
1067 for (i = 0; i < AN_TX_RING_CNT; i++) {
1068 if (id == sc->an_rdata.an_tx_ring[i]) {
1069 sc->an_rdata.an_tx_ring[i] = 0;
1070 break;
1071 }
1072 }
1073
1074 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1075 } else { /* MPI 350 */
537b8fd3
JS		 1076 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
1077 if (!sc->an_rdata.an_tx_empty){
1078 if (status & AN_EV_TX_EXC) {
1079 ifp->if_oerrors++;
1080 } else
1081 ifp->if_opackets++;
1082 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1083 if (sc->an_rdata.an_tx_prod ==
1084 sc->an_rdata.an_tx_cons)
1085 sc->an_rdata.an_tx_empty = 1;
1086 }
984263bc 1087 }
984263bc
MD		 1088}
1089
1090/*
1091 * We abuse the stats updater to check the current NIC status. This
1092 * is important because we don't want to allow transmissions until
1093 * the NIC has synchronized to the current cell (either as the master
1094 * in an ad-hoc group, or as a station connected to an access point).
1095 */
1096static void
c436375a 1097an_stats_update(void *xsc)
984263bc
MD		 1098{
1099 struct an_softc *sc;
1100 struct ifnet *ifp;
984263bc
MD		 1101
1102 sc = xsc;
1103 ifp = &sc->arpcom.ac_if;
1104
78195a76 1105 lwkt_serialize_enter(sc->arpcom.ac_if.if_serializer);
41d6c56f 1106
984263bc
MD		 1107 sc->an_status.an_type = AN_RID_STATUS;
1108 sc->an_status.an_len = sizeof(struct an_ltv_status);
1109 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1110
1111 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1112 sc->an_associated = 1;
1113 else
1114 sc->an_associated = 0;
1115
41d6c56f
JS		 1116 /* Don't do this while we're not transmitting */
1117 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
1118 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1119 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1120 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
984263bc
MD		 1121 }
1122
89c0f216 1123 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 1124
78195a76 1125 lwkt_serialize_exit(sc->arpcom.ac_if.if_serializer);
984263bc
MD		 1126}
1127
1128void
c436375a 1129an_intr(void *xsc)
984263bc
MD		 1130{
1131 struct an_softc *sc;
1132 struct ifnet *ifp;
1133 u_int16_t status;
1134
1135 sc = (struct an_softc*)xsc;
1136
984263bc
MD		 1137 ifp = &sc->arpcom.ac_if;
1138
1139 /* Disable interrupts. */
1140 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1141
1142 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
537b8fd3 1143 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350));
984263bc 1144
537b8fd3
JS		 1145 if (status & AN_EV_MIC)
1146 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC);
984263bc
MD		 1147
1148 if (status & AN_EV_LINKSTAT) {
1149 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1150 == AN_LINKSTAT_ASSOCIATED)
1151 sc->an_associated = 1;
1152 else
1153 sc->an_associated = 0;
1154 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1155 }
1156
1157 if (status & AN_EV_RX) {
1158 an_rxeof(sc);
1159 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1160 }
1161
537b8fd3
JS		 1162 if (sc->mpi350 && status & AN_EV_TX_CPY) {
1163 an_txeof(sc, status);
1164 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_CPY);
1165 }
1166
984263bc
MD		 1167 if (status & AN_EV_TX) {
1168 an_txeof(sc, status);
1169 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1170 }
1171
1172 if (status & AN_EV_TX_EXC) {
1173 an_txeof(sc, status);
1174 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1175 }
1176
1177 if (status & AN_EV_ALLOC)
1178 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1179
1180 /* Re-enable interrupts. */
537b8fd3 1181 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc 1182
38de8487 1183 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
9db4b353 1184 if_devstart(ifp);
984263bc
MD		 1185}
1186
1187static int
c436375a
SW		 1188an_cmd_struct(struct an_softc *sc, struct an_command *cmd,
1189 struct an_reply *reply)
984263bc
MD		 1190{
1191 int i;
1192
1193 for (i = 0; i != AN_TIMEOUT; i++) {
1194 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1195 DELAY(1000);
1196 } else
1197 break;
1198 }
1199 if( i == AN_TIMEOUT) {
e3869ec7 1200 kprintf("BUSY\n");
984263bc
MD		 1201 return(ETIMEDOUT);
1202 }
1203
1204 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1205 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1206 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1207 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1208
1209 for (i = 0; i < AN_TIMEOUT; i++) {
1210 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1211 break;
1212 DELAY(1000);
1213 }
1214
1215 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1216 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1217 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1218 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1219
1220 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1221 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1222
1223 /* Ack the command */
1224 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1225
1226 if (i == AN_TIMEOUT)
1227 return(ETIMEDOUT);
1228
1229 return(0);
1230}
1231
1232static int
c436375a 1233an_cmd(struct an_softc *sc, int cmd, int val)
984263bc
MD		 1234{
1235 int i, s = 0;
1236
1237 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1238 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1239 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1240 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1241
1242 for (i = 0; i < AN_TIMEOUT; i++) {
1243 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1244 break;
1245 else {
1246 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1247 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1248 }
1249 }
1250
1251 for (i = 0; i < AN_TIMEOUT; i++) {
1252 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1253 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1254 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1255 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1256 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1257 break;
1258 }
1259
1260 /* Ack the command */
1261 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1262
1263 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1264 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1265
1266 if (i == AN_TIMEOUT)
1267 return(ETIMEDOUT);
1268
1269 return(0);
1270}
1271
1272/*
1273 * This reset sequence may look a little strange, but this is the
1274 * most reliable method I've found to really kick the NIC in the
1275 * head and force it to reboot correctly.
1276 */
1277static void
c436375a 1278an_reset(struct an_softc *sc)
984263bc 1279{
984263bc
MD		 1280 an_cmd(sc, AN_CMD_ENABLE, 0);
1281 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1282 an_cmd(sc, AN_CMD_NOOP2, 0);
1283
1284 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1285 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD		 1286
1287 an_cmd(sc, AN_CMD_DISABLE, 0);
1288
1289 return;
1290}
1291
1292/*
1293 * Read an LTV record from the NIC.
1294 */
1295static int
c436375a 1296an_read_record(struct an_softc *sc, struct an_ltv_gen *ltv)
984263bc
MD		 1297{
1298 struct an_ltv_gen *an_ltv;
1299 struct an_card_rid_desc an_rid_desc;
1300 struct an_command cmd;
1301 struct an_reply reply;
1302 u_int16_t *ptr;
1303 u_int8_t *ptr2;
1304 int i, len;
1305
1306 if (ltv->an_len < 4 || ltv->an_type == 0)
1307 return(EINVAL);
1308
1309 if (!sc->mpi350){
1310 /* Tell the NIC to enter record read mode. */
1311 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1312 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD		 1313 return(EIO);
1314 }
1315
1316 /* Seek to the record. */
1317 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1318 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD		 1319 return(EIO);
1320 }
1321
1322 /*
1323 * Read the length and record type and make sure they
1324 * match what we expect (this verifies that we have enough
1325 * room to hold all of the returned data).
1326 * Length includes type but not length.
1327 */
1328 len = CSR_READ_2(sc, AN_DATA1);
1329 if (len > (ltv->an_len - 2)) {
1c70eebf
JS		 1330 if_printf(&sc->arpcom.ac_if,
1331 "record length mismatch -- expected %d, "
1332 "got %d for Rid %x\n",
1333 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD		 1334 len = ltv->an_len - 2;
1335 } else {
1336 ltv->an_len = len + 2;
1337 }
1338
1339 /* Now read the data. */
1340 len -= 2; /* skip the type */
1341 ptr = &ltv->an_val;
1342 for (i = len; i > 1; i -= 2)
1343 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1344 if (i) {
1345 ptr2 = (u_int8_t *)ptr;
1346 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1347 }
1348 } else { /* MPI-350 */
b92f9c1c
JS		 1349 if (sc->an_rid_buffer.an_dma_vaddr == NULL)
1350 return(EIO);
984263bc
MD		 1351 an_rid_desc.an_valid = 1;
1352 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1353 an_rid_desc.an_rid = 0;
1354 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1355 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1356
1357 bzero(&cmd, sizeof(cmd));
1358 bzero(&reply, sizeof(reply));
1359 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1360 cmd.an_parm0 = ltv->an_type;
1361
1362 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1363 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1364 ((u_int32_t*)&an_rid_desc)[i]);
1365
1366 if (an_cmd_struct(sc, &cmd, &reply)
1367 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS		 1368 if_printf(&sc->arpcom.ac_if,
1369 "failed to read RID %x %x %x %x %x, %d\n",
1370 ltv->an_type,
1371 reply.an_status,
1372 reply.an_resp0,
1373 reply.an_resp1,
1374 reply.an_resp2,
1375 i);
984263bc
MD		 1376 return(EIO);
1377 }
1378
1379 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1380 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1381 an_rid_desc.an_len = an_ltv->an_len;
1382 }
1383
b92f9c1c
JS		 1384 len = an_rid_desc.an_len;
1385 if (len > (ltv->an_len - 2)) {
1386 if_printf(&sc->arpcom.ac_if,
1387 "record length mismatch -- expected %d, "
1388 "got %d for Rid %x\n",
1389 ltv->an_len - 2, len, ltv->an_type);
1390 len = ltv->an_len - 2;
1391 } else {
1392 ltv->an_len = len + 2;
1393 }
1394 bcopy(&an_ltv->an_type, &ltv->an_val, len);
984263bc
MD		 1395 }
1396
1397 if (an_dump)
1398 an_dump_record(sc, ltv, "Read");
1399
1400 return(0);
1401}
1402
1403/*
1404 * Same as read, except we inject data instead of reading it.
1405 */
1406static int
c436375a 1407an_write_record(struct an_softc *sc, struct an_ltv_gen *ltv)
984263bc
MD		 1408{
1409 struct an_card_rid_desc an_rid_desc;
1410 struct an_command cmd;
1411 struct an_reply reply;
984263bc
MD		 1412 u_int16_t *ptr;
1413 u_int8_t *ptr2;
1414 int i, len;
1415
1416 if (an_dump)
1417 an_dump_record(sc, ltv, "Write");
1418
1419 if (!sc->mpi350){
1420 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1421 return(EIO);
1422
1423 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1424 return(EIO);
1425
1426 /*
1427 * Length includes type but not length.
1428 */
1429 len = ltv->an_len - 2;
1430 CSR_WRITE_2(sc, AN_DATA1, len);
1431
1432 len -= 2; /* skip the type */
1433 ptr = &ltv->an_val;
1434 for (i = len; i > 1; i -= 2)
1435 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1436 if (i) {
1437 ptr2 = (u_int8_t *)ptr;
1438 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1439 }
1440
1441 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1442 return(EIO);
1443 } else {
1444 /* MPI-350 */
1445
1446 for (i = 0; i != AN_TIMEOUT; i++) {
1447 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1448 & AN_CMD_BUSY) {
1449 DELAY(10);
1450 } else
1451 break;
1452 }
1453 if (i == AN_TIMEOUT) {
e3869ec7 1454 kprintf("BUSY\n");
984263bc
MD		 1455 }
1456
1457 an_rid_desc.an_valid = 1;
1458 an_rid_desc.an_len = ltv->an_len - 2;
1459 an_rid_desc.an_rid = ltv->an_type;
1460 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1461
1462 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1463 an_rid_desc.an_len);
1464
1465 bzero(&cmd,sizeof(cmd));
1466 bzero(&reply,sizeof(reply));
1467 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1468 cmd.an_parm0 = ltv->an_type;
1469
1470 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1471 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1472 ((u_int32_t*)&an_rid_desc)[i]);
1473
1474 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS		 1475 if_printf(&sc->arpcom.ac_if,
1476 "failed to write RID 1 %x %x %x %x %x, %d\n",
1477 ltv->an_type,
984263bc
MD		 1478 reply.an_status,
1479 reply.an_resp0,
1480 reply.an_resp1,
1481 reply.an_resp2,
1482 i);
1483 return(EIO);
1484 }
1485
984263bc 1486 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS		 1487 if_printf(&sc->arpcom.ac_if,
1488 "failed to write RID 2 %x %x %x %x %x, %d\n",
1489 ltv->an_type,
984263bc
MD		 1490 reply.an_status,
1491 reply.an_resp0,
1492 reply.an_resp1,
1493 reply.an_resp2,
1494 i);
1495 return(EIO);
1496 }
1497 }
1498
1499 return(0);
1500}
1501
1502static void
c436375a 1503an_dump_record(struct an_softc *sc, struct an_ltv_gen *ltv, char *string)
984263bc
MD		 1504{
1505 u_int8_t *ptr2;
1506 int len;
1507 int i;
1508 int count = 0;
1509 char buf[17], temp;
1510
1511 len = ltv->an_len - 4;
1c70eebf
JS		 1512 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1513 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD		 1514
1515 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1516 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD		 1517 bzero(buf,sizeof(buf));
1518
1519 ptr2 = (u_int8_t *)&ltv->an_val;
1520 for (i = len; i > 0; i--) {
e3869ec7 1521 kprintf("%02x ", *ptr2);
984263bc
MD		 1522
1523 temp = *ptr2++;
1524 if (temp >= ' ' && temp <= '~')
1525 buf[count] = temp;
1526 else if (temp >= 'A' && temp <= 'Z')
1527 buf[count] = temp;
1528 else
1529 buf[count] = '.';
1530 if (++count == 16) {
1531 count = 0;
e3869ec7 1532 kprintf("%s\n",buf);
1c70eebf 1533 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD		 1534 bzero(buf,sizeof(buf));
1535 }
1536 }
1537 for (; count != 16; count++) {
e3869ec7 1538 kprintf(" ");
984263bc 1539 }
e3869ec7 1540 kprintf(" %s\n",buf);
984263bc
MD		 1541 }
1542}
1543
1544static int
c436375a 1545an_seek(struct an_softc *sc, int id, int off, int chan)
984263bc
MD		 1546{
1547 int i;
1548 int selreg, offreg;
1549
1550 switch (chan) {
1551 case AN_BAP0:
1552 selreg = AN_SEL0;
1553 offreg = AN_OFF0;
1554 break;
1555 case AN_BAP1:
1556 selreg = AN_SEL1;
1557 offreg = AN_OFF1;
1558 break;
1559 default:
1c70eebf 1560 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD		 1561 return(EIO);
1562 }
1563
1564 CSR_WRITE_2(sc, selreg, id);
1565 CSR_WRITE_2(sc, offreg, off);
1566
1567 for (i = 0; i < AN_TIMEOUT; i++) {
1568 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1569 break;
1570 }
1571
1572 if (i == AN_TIMEOUT)
1573 return(ETIMEDOUT);
1574
1575 return(0);
1576}
1577
1578static int
c436375a 1579an_read_data(struct an_softc *sc, int id, int off, caddr_t buf, int len)
984263bc
MD		 1580{
1581 int i;
1582 u_int16_t *ptr;
1583 u_int8_t *ptr2;
1584
1585 if (off != -1) {
1586 if (an_seek(sc, id, off, AN_BAP1))
1587 return(EIO);
1588 }
1589
1590 ptr = (u_int16_t *)buf;
1591 for (i = len; i > 1; i -= 2)
1592 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1593 if (i) {
1594 ptr2 = (u_int8_t *)ptr;
1595 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1596 }
1597
1598 return(0);
1599}
1600
1601static int
c436375a 1602an_write_data(struct an_softc *sc, int id, int off, caddr_t buf, int len)
984263bc
MD		 1603{
1604 int i;
1605 u_int16_t *ptr;
1606 u_int8_t *ptr2;
1607
1608 if (off != -1) {
1609 if (an_seek(sc, id, off, AN_BAP0))
1610 return(EIO);
1611 }
1612
1613 ptr = (u_int16_t *)buf;
1614 for (i = len; i > 1; i -= 2)
1615 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1616 if (i) {
1617 ptr2 = (u_int8_t *)ptr;
1618 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1619 }
1620
1621 return(0);
1622}
1623
1624/*
1625 * Allocate a region of memory inside the NIC and zero
1626 * it out.
1627 */
1628static int
c436375a 1629an_alloc_nicmem(struct an_softc *sc, int len, int *id)
984263bc
MD		 1630{
1631 int i;
1632
1633 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS		 1634 if_printf(&sc->arpcom.ac_if,
1635 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD		 1636 return(ENOMEM);
1637 }
1638
1639 for (i = 0; i < AN_TIMEOUT; i++) {
1640 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1641 break;
1642 }
1643
1644 if (i == AN_TIMEOUT)
1645 return(ETIMEDOUT);
1646
1647 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1648 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1649
1650 if (an_seek(sc, *id, 0, AN_BAP0))
1651 return(EIO);
1652
1653 for (i = 0; i < len / 2; i++)
1654 CSR_WRITE_2(sc, AN_DATA0, 0);
1655
1656 return(0);
1657}
1658
1659static void
c436375a 1660an_setdef(struct an_softc *sc, struct an_req *areq)
984263bc 1661{
984263bc
MD		 1662 struct ifnet *ifp;
1663 struct an_ltv_genconfig *cfg;
537b8fd3 1664 struct an_ltv_ssidlist_new *ssid;
984263bc
MD		 1665 struct an_ltv_aplist *ap;
1666 struct an_ltv_gen *sp;
1667
1668 ifp = &sc->arpcom.ac_if;
1669
1670 switch (areq->an_type) {
1671 case AN_RID_GENCONFIG:
1672 cfg = (struct an_ltv_genconfig *)areq;
1673
984263bc
MD		 1674 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1675 ETHER_ADDR_LEN);
f2682cb9 1676 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD		 1677
1678 bcopy((char *)cfg, (char *)&sc->an_config,
1679 sizeof(struct an_ltv_genconfig));
1680 break;
1681 case AN_RID_SSIDLIST:
537b8fd3 1682 ssid = (struct an_ltv_ssidlist_new *)areq;
984263bc 1683 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
537b8fd3 1684 sizeof(struct an_ltv_ssidlist_new));
984263bc
MD		 1685 break;
1686 case AN_RID_APLIST:
1687 ap = (struct an_ltv_aplist *)areq;
1688 bcopy((char *)ap, (char *)&sc->an_aplist,
1689 sizeof(struct an_ltv_aplist));
1690 break;
1691 case AN_RID_TX_SPEED:
1692 sp = (struct an_ltv_gen *)areq;
1693 sc->an_tx_rate = sp->an_val;
1694
1695 /* Read the current configuration */
1696 sc->an_config.an_type = AN_RID_GENCONFIG;
1697 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1698 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1699 cfg = &sc->an_config;
1700
1701 /* clear other rates and set the only one we want */
1702 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1703 cfg->an_rates[0] = sc->an_tx_rate;
1704
1705 /* Save the new rate */
1706 sc->an_config.an_type = AN_RID_GENCONFIG;
1707 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1708 break;
1709 case AN_RID_WEP_TEMP:
1710 /* Cache the temp keys */
1711 bcopy(areq,
1712 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1713 sizeof(struct an_ltv_key));
1714 case AN_RID_WEP_PERM:
1715 case AN_RID_LEAPUSERNAME:
1716 case AN_RID_LEAPPASSWORD:
537b8fd3
JS		 1717 an_init(sc);
1718
984263bc
MD		 1719 /* Disable the MAC. */
1720 an_cmd(sc, AN_CMD_DISABLE, 0);
1721
1722 /* Write the key */
1723 an_write_record(sc, (struct an_ltv_gen *)areq);
1724
1725 /* Turn the MAC back on. */
1726 an_cmd(sc, AN_CMD_ENABLE, 0);
1727
1728 break;
1729 case AN_RID_MONITOR_MODE:
1730 cfg = (struct an_ltv_genconfig *)areq;
1731 bpfdetach(ifp);
1732 if (ng_ether_detach_p != NULL)
1733 (*ng_ether_detach_p) (ifp);
1734 sc->an_monitor = cfg->an_len;
1735
1736 if (sc->an_monitor & AN_MONITOR) {
1737 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1738 bpfattach(ifp, DLT_AIRONET_HEADER,
1739 sizeof(struct ether_header));
1740 } else {
1741 bpfattach(ifp, DLT_IEEE802_11,
1742 sizeof(struct ether_header));
1743 }
1744 } else {
1745 bpfattach(ifp, DLT_EN10MB,
1746 sizeof(struct ether_header));
1747 if (ng_ether_attach_p != NULL)
1748 (*ng_ether_attach_p) (ifp);
1749 }
1750 break;
1751 default:
1c70eebf 1752 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc 1753 return;
984263bc
MD		 1754 }
1755
1756
1757 /* Reinitialize the card. */
1758 if (ifp->if_flags)
1759 an_init(sc);
1760
1761 return;
1762}
1763
1764/*
1765 * Derived from Linux driver to enable promiscious mode.
1766 */
1767
1768static void
c436375a 1769an_promisc(struct an_softc *sc, int promisc)
984263bc
MD		 1770{
1771 if (sc->an_was_monitor)
1772 an_reset(sc);
1c70eebf
JS		 1773 if (sc->mpi350)
1774 an_init_mpi350_desc(sc);
984263bc
MD		 1775 if (sc->an_monitor || sc->an_was_monitor)
1776 an_init(sc);
1777
1778 sc->an_was_monitor = sc->an_monitor;
1779 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1780
1781 return;
1782}
1783
1784static int
c436375a 1785an_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
984263bc 1786{
41d6c56f 1787 int error = 0;
984263bc 1788 int len;
537b8fd3 1789 int i, max;
984263bc
MD		 1790 struct an_softc *sc;
1791 struct ifreq *ifr;
984263bc
MD		 1792 struct ieee80211req *ireq;
1793 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1794 u_int8_t *tmpptr;
1795 struct an_ltv_genconfig *config;
1796 struct an_ltv_key *key;
1797 struct an_ltv_status *status;
537b8fd3 1798 struct an_ltv_ssidlist_new *ssids;
984263bc
MD		 1799 int mode;
1800 struct aironet_ioctl l_ioctl;
1801
1802 sc = ifp->if_softc;
984263bc
MD		 1803 ifr = (struct ifreq *)data;
1804 ireq = (struct ieee80211req *)data;
1805
1806 config = (struct an_ltv_genconfig *)&sc->areq;
1807 key = (struct an_ltv_key *)&sc->areq;
1808 status = (struct an_ltv_status *)&sc->areq;
537b8fd3 1809 ssids = (struct an_ltv_ssidlist_new *)&sc->areq;
984263bc 1810
984263bc 1811 switch (command) {
984263bc
MD		 1812 case SIOCSIFFLAGS:
1813 if (ifp->if_flags & IFF_UP) {
1814 if (ifp->if_flags & IFF_RUNNING &&
1815 ifp->if_flags & IFF_PROMISC &&
1816 !(sc->an_if_flags & IFF_PROMISC)) {
1817 an_promisc(sc, 1);
1818 } else if (ifp->if_flags & IFF_RUNNING &&
1819 !(ifp->if_flags & IFF_PROMISC) &&
1820 sc->an_if_flags & IFF_PROMISC) {
1821 an_promisc(sc, 0);
1822 } else
1823 an_init(sc);
1824 } else {
1825 if (ifp->if_flags & IFF_RUNNING)
1826 an_stop(sc);
1827 }
1828 sc->an_if_flags = ifp->if_flags;
1829 error = 0;
1830 break;
1831 case SIOCSIFMEDIA:
1832 case SIOCGIFMEDIA:
1833 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1834 break;
1835 case SIOCADDMULTI:
1836 case SIOCDELMULTI:
1837 /* The Aironet has no multicast filter. */
1838 error = 0;
1839 break;
1840 case SIOCGAIRONET:
1841 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1842 if (error != 0)
1843 break;
1844#ifdef ANCACHE
1845 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1846 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD		 1847 if (error)
1848 break;
1849 sc->an_sigitems = sc->an_nextitem = 0;
1850 break;
1851 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1852 char *pt = (char *)&sc->areq.an_val;
1853 bcopy((char *)&sc->an_sigitems, (char *)pt,
1854 sizeof(int));
1855 pt += sizeof(int);
1856 sc->areq.an_len = sizeof(int) / 2;
1857 bcopy((char *)&sc->an_sigcache, (char *)pt,
1858 sizeof(struct an_sigcache) * sc->an_sigitems);
1859 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1860 sc->an_sigitems) / 2) + 1;
1861 } else
1862#endif
1863 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1864 error = EINVAL;
1865 break;
1866 }
1867 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1868 break;
1869 case SIOCSAIRONET:
bd4539cc 1870 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1871 break;
984263bc
MD		 1872 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1873 if (error != 0)
1874 break;
1875 an_setdef(sc, &sc->areq);
1876 break;
1877 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1878 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1879 break;
984263bc
MD		 1880 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1881 mode = l_ioctl.command;
1882
1883 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1884 error = readrids(ifp, &l_ioctl);
1885 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1886 error = writerids(ifp, &l_ioctl);
1887 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1888 error = flashcard(ifp, &l_ioctl);
1889 } else {
1890 error =-1;
1891 }
1892
1893 /* copy out the updated command info */
1894 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1895
1896 break;
1897 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1898 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1899 break;
984263bc
MD		 1900 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1901 l_ioctl.command = 0;
1902 error = AIROMAGIC;
1903 copyout(&error, l_ioctl.data, sizeof(error));
1904 error = 0;
1905 break;
1906 case SIOCG80211:
1907 sc->areq.an_len = sizeof(sc->areq);
1908 /* was that a good idea DJA we are doing a short-cut */
1909 switch (ireq->i_type) {
1910 case IEEE80211_IOC_SSID:
1911 if (ireq->i_val == -1) {
1912 sc->areq.an_type = AN_RID_STATUS;
1913 if (an_read_record(sc,
1914 (struct an_ltv_gen *)&sc->areq)) {
1915 error = EINVAL;
1916 break;
1917 }
1918 len = status->an_ssidlen;
1919 tmpptr = status->an_ssid;
1920 } else if (ireq->i_val >= 0) {
1921 sc->areq.an_type = AN_RID_SSIDLIST;
1922 if (an_read_record(sc,
1923 (struct an_ltv_gen *)&sc->areq)) {
1924 error = EINVAL;
1925 break;
1926 }
537b8fd3
JS		 1927 max = (sc->areq.an_len - 4)
1928 / sizeof(struct an_ltv_ssid_entry);
1929 if ( max > MAX_SSIDS ) {
e3869ec7 1930 kprintf("To many SSIDs only using "
537b8fd3
JS		 1931 "%d of %d\n",
1932 MAX_SSIDS, max);
1933 max = MAX_SSIDS;
1934 }
1935 if (ireq->i_val > max) {
984263bc
MD		 1936 error = EINVAL;
1937 break;
537b8fd3
JS		 1938 } else {
1939 len = ssids->an_entry[ireq->i_val].an_len;
1940 tmpptr = ssids->an_entry[ireq->i_val].an_ssid;
984263bc
MD		 1941 }
1942 } else {
1943 error = EINVAL;
1944 break;
1945 }
1946 if (len > IEEE80211_NWID_LEN) {
1947 error = EINVAL;
1948 break;
1949 }
1950 ireq->i_len = len;
1951 bzero(tmpstr, IEEE80211_NWID_LEN);
1952 bcopy(tmpptr, tmpstr, len);
1953 error = copyout(tmpstr, ireq->i_data,
1954 IEEE80211_NWID_LEN);
1955 break;
1956 case IEEE80211_IOC_NUMSSIDS:
537b8fd3
JS		 1957 sc->areq.an_len = sizeof(sc->areq);
1958 sc->areq.an_type = AN_RID_SSIDLIST;
1959 if (an_read_record(sc,
1960 (struct an_ltv_gen *)&sc->areq)) {
1961 error = EINVAL;
1962 break;
1963 }
1964 max = (sc->areq.an_len - 4)
1965 / sizeof(struct an_ltv_ssid_entry);
1966 if (max > MAX_SSIDS) {
e3869ec7 1967 kprintf("To many SSIDs only using "
537b8fd3
JS		 1968 "%d of %d\n",
1969 MAX_SSIDS, max);
1970 max = MAX_SSIDS;
1971 }
1972 ireq->i_val = max;
984263bc
MD		 1973 break;
1974 case IEEE80211_IOC_WEP:
1975 sc->areq.an_type = AN_RID_ACTUALCFG;
1976 if (an_read_record(sc,
1977 (struct an_ltv_gen *)&sc->areq)) {
1978 error = EINVAL;
1979 break;
1980 }
1981 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
1982 if (config->an_authtype &
1983 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
1984 ireq->i_val = IEEE80211_WEP_MIXED;
1985 else
1986 ireq->i_val = IEEE80211_WEP_ON;
1987 } else {
1988 ireq->i_val = IEEE80211_WEP_OFF;
1989 }
1990 break;
1991 case IEEE80211_IOC_WEPKEY:
1992 /*
1993 * XXX: I'm not entierly convinced this is
1994 * correct, but it's what is implemented in
1995 * ancontrol so it will have to do until we get
1996 * access to actual Cisco code.
1997 */
1998 if (ireq->i_val < 0 || ireq->i_val > 8) {
1999 error = EINVAL;
2000 break;
2001 }
2002 len = 0;
2003 if (ireq->i_val < 5) {
2004 sc->areq.an_type = AN_RID_WEP_TEMP;
2005 for (i = 0; i < 5; i++) {
2006 if (an_read_record(sc,
2007 (struct an_ltv_gen *)&sc->areq)) {
2008 error = EINVAL;
2009 break;
2010 }
2011 if (key->kindex == 0xffff)
2012 break;
2013 if (key->kindex == ireq->i_val)
2014 len = key->klen;
2015 /* Required to get next entry */
2016 sc->areq.an_type = AN_RID_WEP_PERM;
2017 }
2018 if (error != 0)
2019 break;
2020 }
2021 /* We aren't allowed to read the value of the
2022 * key from the card so we just output zeros
2023 * like we would if we could read the card, but
2024 * denied the user access.
2025 */
2026 bzero(tmpstr, len);
2027 ireq->i_len = len;
2028 error = copyout(tmpstr, ireq->i_data, len);
2029 break;
2030 case IEEE80211_IOC_NUMWEPKEYS:
2031 ireq->i_val = 9; /* include home key */
2032 break;
2033 case IEEE80211_IOC_WEPTXKEY:
2034 /*
2035 * For some strange reason, you have to read all
2036 * keys before you can read the txkey.
2037 */
2038 sc->areq.an_type = AN_RID_WEP_TEMP;
2039 for (i = 0; i < 5; i++) {
2040 if (an_read_record(sc,
2041 (struct an_ltv_gen *) &sc->areq)) {
2042 error = EINVAL;
2043 break;
2044 }
2045 if (key->kindex == 0xffff)
2046 break;
2047 /* Required to get next entry */
2048 sc->areq.an_type = AN_RID_WEP_PERM;
2049 }
2050 if (error != 0)
2051 break;
2052
2053 sc->areq.an_type = AN_RID_WEP_PERM;
2054 key->kindex = 0xffff;
2055 if (an_read_record(sc,
2056 (struct an_ltv_gen *)&sc->areq)) {
2057 error = EINVAL;
2058 break;
2059 }
2060 ireq->i_val = key->mac[0];
2061 /*
2062 * Check for home mode. Map home mode into
2063 * 5th key since that is how it is stored on
2064 * the card
2065 */
2066 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2067 sc->areq.an_type = AN_RID_GENCONFIG;
2068 if (an_read_record(sc,
2069 (struct an_ltv_gen *)&sc->areq)) {
2070 error = EINVAL;
2071 break;
2072 }
2073 if (config->an_home_product & AN_HOME_NETWORK)
2074 ireq->i_val = 4;
2075 break;
2076 case IEEE80211_IOC_AUTHMODE:
2077 sc->areq.an_type = AN_RID_ACTUALCFG;
2078 if (an_read_record(sc,
2079 (struct an_ltv_gen *)&sc->areq)) {
2080 error = EINVAL;
2081 break;
2082 }
2083 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2084 AN_AUTHTYPE_NONE) {
2085 ireq->i_val = IEEE80211_AUTH_NONE;
2086 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2087 AN_AUTHTYPE_OPEN) {
2088 ireq->i_val = IEEE80211_AUTH_OPEN;
2089 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2090 AN_AUTHTYPE_SHAREDKEY) {
2091 ireq->i_val = IEEE80211_AUTH_SHARED;
2092 } else
2093 error = EINVAL;
2094 break;
2095 case IEEE80211_IOC_STATIONNAME:
2096 sc->areq.an_type = AN_RID_ACTUALCFG;
2097 if (an_read_record(sc,
2098 (struct an_ltv_gen *)&sc->areq)) {
2099 error = EINVAL;
2100 break;
2101 }
2102 ireq->i_len = sizeof(config->an_nodename);
2103 tmpptr = config->an_nodename;
2104 bzero(tmpstr, IEEE80211_NWID_LEN);
2105 bcopy(tmpptr, tmpstr, ireq->i_len);
2106 error = copyout(tmpstr, ireq->i_data,
2107 IEEE80211_NWID_LEN);
2108 break;
2109 case IEEE80211_IOC_CHANNEL:
2110 sc->areq.an_type = AN_RID_STATUS;
2111 if (an_read_record(sc,
2112 (struct an_ltv_gen *)&sc->areq)) {
2113 error = EINVAL;
2114 break;
2115 }
2116 ireq->i_val = status->an_cur_channel;
2117 break;
2118 case IEEE80211_IOC_POWERSAVE:
2119 sc->areq.an_type = AN_RID_ACTUALCFG;
2120 if (an_read_record(sc,
2121 (struct an_ltv_gen *)&sc->areq)) {
2122 error = EINVAL;
2123 break;
2124 }
2125 if (config->an_psave_mode == AN_PSAVE_NONE) {
2126 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2127 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2128 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2129 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2130 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2131 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2132 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2133 } else
2134 error = EINVAL;
2135 break;
2136 case IEEE80211_IOC_POWERSAVESLEEP:
2137 sc->areq.an_type = AN_RID_ACTUALCFG;
2138 if (an_read_record(sc,
2139 (struct an_ltv_gen *)&sc->areq)) {
2140 error = EINVAL;
2141 break;
2142 }
2143 ireq->i_val = config->an_listen_interval;
2144 break;
2145 }
2146 break;
2147 case SIOCS80211:
bd4539cc 2148 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 2149 break;
984263bc
MD		 2150 sc->areq.an_len = sizeof(sc->areq);
2151 /*
2152 * We need a config structure for everything but the WEP
2153 * key management and SSIDs so we get it now so avoid
2154 * duplicating this code every time.
2155 */
2156 if (ireq->i_type != IEEE80211_IOC_SSID &&
2157 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2158 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2159 sc->areq.an_type = AN_RID_GENCONFIG;
2160 if (an_read_record(sc,
2161 (struct an_ltv_gen *)&sc->areq)) {
2162 error = EINVAL;
2163 break;
2164 }
2165 }
2166 switch (ireq->i_type) {
2167 case IEEE80211_IOC_SSID:
537b8fd3 2168 sc->areq.an_len = sizeof(sc->areq);
984263bc
MD		 2169 sc->areq.an_type = AN_RID_SSIDLIST;
2170 if (an_read_record(sc,
2171 (struct an_ltv_gen *)&sc->areq)) {
2172 error = EINVAL;
2173 break;
2174 }
2175 if (ireq->i_len > IEEE80211_NWID_LEN) {
2176 error = EINVAL;
2177 break;
2178 }
537b8fd3
JS		 2179 max = (sc->areq.an_len - 4)
2180 / sizeof(struct an_ltv_ssid_entry);
2181 if (max > MAX_SSIDS) {
e3869ec7 2182 kprintf("To many SSIDs only using "
537b8fd3
JS		 2183 "%d of %d\n",
2184 MAX_SSIDS, max);
2185 max = MAX_SSIDS;
984263bc 2186 }
537b8fd3
JS		 2187 if (ireq->i_val > max) {
2188 error = EINVAL;
2189 break;
2190 } else {
2191 error = copyin(ireq->i_data,
2192 ssids->an_entry[ireq->i_val].an_ssid,
2193 ireq->i_len);
2194 ssids->an_entry[ireq->i_val].an_len
2195 = ireq->i_len;
2196 break;
2197 }
984263bc
MD		 2198 break;
2199 case IEEE80211_IOC_WEP:
2200 switch (ireq->i_val) {
2201 case IEEE80211_WEP_OFF:
2202 config->an_authtype &=
2203 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2204 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2205 break;
2206 case IEEE80211_WEP_ON:
2207 config->an_authtype |=
2208 AN_AUTHTYPE_PRIVACY_IN_USE;
2209 config->an_authtype &=
2210 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2211 break;
2212 case IEEE80211_WEP_MIXED:
2213 config->an_authtype |=
2214 AN_AUTHTYPE_PRIVACY_IN_USE |
2215 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2216 break;
2217 default:
2218 error = EINVAL;
2219 break;
2220 }
2221 break;
2222 case IEEE80211_IOC_WEPKEY:
2223 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2224 ireq->i_len > 13) {
2225 error = EINVAL;
2226 break;
2227 }
2228 error = copyin(ireq->i_data, tmpstr, 13);
2229 if (error != 0)
2230 break;
2231 /*
2232 * Map the 9th key into the home mode
2233 * since that is how it is stored on
2234 * the card
2235 */
2236 bzero(&sc->areq, sizeof(struct an_ltv_key));
2237 sc->areq.an_len = sizeof(struct an_ltv_key);
2238 key->mac[0] = 1; /* The others are 0. */
2239 if (ireq->i_val < 4) {
2240 sc->areq.an_type = AN_RID_WEP_TEMP;
2241 key->kindex = ireq->i_val;
2242 } else {
2243 sc->areq.an_type = AN_RID_WEP_PERM;
2244 key->kindex = ireq->i_val - 4;
2245 }
2246 key->klen = ireq->i_len;
2247 bcopy(tmpstr, key->key, key->klen);
2248 break;
2249 case IEEE80211_IOC_WEPTXKEY:
2250 if (ireq->i_val < 0 || ireq->i_val > 4) {
2251 error = EINVAL;
2252 break;
2253 }
2254
2255 /*
2256 * Map the 5th key into the home mode
2257 * since that is how it is stored on
2258 * the card
2259 */
2260 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2261 sc->areq.an_type = AN_RID_ACTUALCFG;
2262 if (an_read_record(sc,
2263 (struct an_ltv_gen *)&sc->areq)) {
2264 error = EINVAL;
2265 break;
2266 }
2267 if (ireq->i_val == 4) {
2268 config->an_home_product |= AN_HOME_NETWORK;
2269 ireq->i_val = 0;
2270 } else {
2271 config->an_home_product &= ~AN_HOME_NETWORK;
2272 }
2273
2274 sc->an_config.an_home_product
2275 = config->an_home_product;
2276
2277 /* update configuration */
2278 an_init(sc);
2279
2280 bzero(&sc->areq, sizeof(struct an_ltv_key));
2281 sc->areq.an_len = sizeof(struct an_ltv_key);
2282 sc->areq.an_type = AN_RID_WEP_PERM;
2283 key->kindex = 0xffff;
2284 key->mac[0] = ireq->i_val;
2285 break;
2286 case IEEE80211_IOC_AUTHMODE:
2287 switch (ireq->i_val) {
2288 case IEEE80211_AUTH_NONE:
2289 config->an_authtype = AN_AUTHTYPE_NONE |
2290 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2291 break;
2292 case IEEE80211_AUTH_OPEN:
2293 config->an_authtype = AN_AUTHTYPE_OPEN |
2294 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2295 break;
2296 case IEEE80211_AUTH_SHARED:
2297 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2298 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2299 break;
2300 default:
2301 error = EINVAL;
2302 }
2303 break;
2304 case IEEE80211_IOC_STATIONNAME:
2305 if (ireq->i_len > 16) {
2306 error = EINVAL;
2307 break;
2308 }
2309 bzero(config->an_nodename, 16);
2310 error = copyin(ireq->i_data,
2311 config->an_nodename, ireq->i_len);
2312 break;
2313 case IEEE80211_IOC_CHANNEL:
2314 /*
2315 * The actual range is 1-14, but if you set it
2316 * to 0 you get the default so we let that work
2317 * too.
2318 */
2319 if (ireq->i_val < 0 || ireq->i_val >14) {
2320 error = EINVAL;
2321 break;
2322 }
2323 config->an_ds_channel = ireq->i_val;
2324 break;
2325 case IEEE80211_IOC_POWERSAVE:
2326 switch (ireq->i_val) {
2327 case IEEE80211_POWERSAVE_OFF:
2328 config->an_psave_mode = AN_PSAVE_NONE;
2329 break;
2330 case IEEE80211_POWERSAVE_CAM:
2331 config->an_psave_mode = AN_PSAVE_CAM;
2332 break;
2333 case IEEE80211_POWERSAVE_PSP:
2334 config->an_psave_mode = AN_PSAVE_PSP;
2335 break;
2336 case IEEE80211_POWERSAVE_PSP_CAM:
2337 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2338 break;
2339 default:
2340 error = EINVAL;
2341 break;
2342 }
2343 break;
2344 case IEEE80211_IOC_POWERSAVESLEEP:
2345 config->an_listen_interval = ireq->i_val;
2346 break;
2347 }
2348
2349 if (!error)
2350 an_setdef(sc, &sc->areq);
2351 break;
2352 default:
4cde4dd5 2353 error = ether_ioctl(ifp, command, data);
984263bc
MD		 2354 break;
2355 }
41d6c56f 2356
984263bc
MD		 2357 return(error != 0);
2358}
2359
2360static int
c436375a 2361an_init_tx_ring(struct an_softc *sc)
984263bc
MD		 2362{
2363 int i;
2364 int id;
2365
984263bc
MD		 2366 if (!sc->mpi350) {
2367 for (i = 0; i < AN_TX_RING_CNT; i++) {
2368 if (an_alloc_nicmem(sc, 1518 +
2369 0x44, &id))
2370 return(ENOMEM);
2371 sc->an_rdata.an_tx_fids[i] = id;
2372 sc->an_rdata.an_tx_ring[i] = 0;
2373 }
2374 }
2375
2376 sc->an_rdata.an_tx_prod = 0;
2377 sc->an_rdata.an_tx_cons = 0;
2378 sc->an_rdata.an_tx_empty = 1;
2379
2380 return(0);
2381}
2382
2383static void
c436375a 2384an_init(void *xsc)
984263bc
MD		 2385{
2386 struct an_softc *sc = xsc;
2387 struct ifnet *ifp = &sc->arpcom.ac_if;
984263bc 2388
984263bc
MD		 2389 if (ifp->if_flags & IFF_RUNNING)
2390 an_stop(sc);
2391
2392 sc->an_associated = 0;
2393
2394 /* Allocate the TX buffers */
2395 if (an_init_tx_ring(sc)) {
2396 an_reset(sc);
2397 if (sc->mpi350)
2398 an_init_mpi350_desc(sc);
2399 if (an_init_tx_ring(sc)) {
1c70eebf 2400 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD		 2401 return;
2402 }
2403 }
2404
2405 /* Set our MAC address. */
2406 bcopy((char *)&sc->arpcom.ac_enaddr,
2407 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2408
2409 if (ifp->if_flags & IFF_BROADCAST)
2410 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2411 else
2412 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2413
2414 if (ifp->if_flags & IFF_MULTICAST)
2415 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2416
2417 if (ifp->if_flags & IFF_PROMISC) {
2418 if (sc->an_monitor & AN_MONITOR) {
2419 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2420 sc->an_config.an_rxmode |=
2421 AN_RXMODE_80211_MONITOR_ANYBSS |
2422 AN_RXMODE_NO_8023_HEADER;
2423 } else {
2424 sc->an_config.an_rxmode |=
2425 AN_RXMODE_80211_MONITOR_CURBSS |
2426 AN_RXMODE_NO_8023_HEADER;
2427 }
2428 }
2429 }
2430
2431 if (sc->an_have_rssimap)
2432 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2433
2434 /* Set the ssid list */
2435 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 2436 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 2437 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 2438 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD		 2439 return;
2440 }
2441
2442 /* Set the AP list */
2443 sc->an_aplist.an_type = AN_RID_APLIST;
2444 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2445 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 2446 if_printf(ifp, "failed to set AP list\n");
984263bc
MD		 2447 return;
2448 }
2449
2450 /* Set the configuration in the NIC */
2451 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2452 sc->an_config.an_type = AN_RID_GENCONFIG;
2453 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 2454 if_printf(ifp, "failed to set configuration\n");
984263bc
MD		 2455 return;
2456 }
2457
2458 /* Enable the MAC */
2459 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
1c70eebf 2460 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD		 2461 return;
2462 }
2463
2464 if (ifp->if_flags & IFF_PROMISC)
2465 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2466
2467 /* enable interrupts */
537b8fd3 2468 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD		 2469
2470 ifp->if_flags |= IFF_RUNNING;
2471 ifp->if_flags &= ~IFF_OACTIVE;
2472
89c0f216 2473 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD		 2474}
2475
2476static void
c436375a 2477an_start(struct ifnet *ifp)
984263bc
MD		 2478{
2479 struct an_softc *sc;
2480 struct mbuf *m0 = NULL;
2481 struct an_txframe_802_3 tx_frame_802_3;
2482 struct ether_header *eh;
7a2a04db 2483 int id, idx, i, ready;
984263bc
MD		 2484 unsigned char txcontrol;
2485 struct an_card_tx_desc an_tx_desc;
984263bc
MD		 2486 u_int8_t *buf;
2487
2488 sc = ifp->if_softc;
2489
984263bc
MD		 2490 if (ifp->if_flags & IFF_OACTIVE)
2491 return;
2492
9db4b353
SZ		 2493 if (!sc->an_associated) {
2494 ifq_purge(&ifp->if_snd);
984263bc 2495 return;
9db4b353 2496 }
984263bc
MD		 2497
2498 /* We can't send in monitor mode so toss any attempts. */
2499 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2500 ifq_purge(&ifp->if_snd);
984263bc
MD		 2501 return;
2502 }
2503
7a2a04db 2504 ready = 0;
984263bc
MD		 2505 idx = sc->an_rdata.an_tx_prod;
2506
2507 if (!sc->mpi350) {
2508 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2509
2510 while (sc->an_rdata.an_tx_ring[idx] == 0) {
7a2a04db 2511 ready = 1;
d2c71fa0 2512 m0 = ifq_dequeue(&ifp->if_snd, NULL);
984263bc
MD		 2513 if (m0 == NULL)
2514 break;
2515
2516 id = sc->an_rdata.an_tx_fids[idx];
2517 eh = mtod(m0, struct ether_header *);
2518
2519 bcopy((char *)&eh->ether_dhost,
2520 (char *)&tx_frame_802_3.an_tx_dst_addr,
2521 ETHER_ADDR_LEN);
2522 bcopy((char *)&eh->ether_shost,
2523 (char *)&tx_frame_802_3.an_tx_src_addr,
2524 ETHER_ADDR_LEN);
2525
2526 /* minus src/dest mac & type */
2527 tx_frame_802_3.an_tx_802_3_payload_len =
2528 m0->m_pkthdr.len - 12;
2529
2530 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2531 tx_frame_802_3.an_tx_802_3_payload_len,
2532 (caddr_t)&sc->an_txbuf);
2533
7a2a04db 2534 txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350);
984263bc
MD		 2535 /* write the txcontrol only */
2536 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2537 sizeof(txcontrol));
2538
2539 /* 802_3 header */
2540 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2541 sizeof(struct an_txframe_802_3));
2542
2543 /* in mbuf header type is just before payload */
2544 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2545 tx_frame_802_3.an_tx_802_3_payload_len);
2546
7600679e 2547 BPF_MTAP(ifp, m0);
984263bc
MD		 2548
2549 m_freem(m0);
2550 m0 = NULL;
2551
2552 sc->an_rdata.an_tx_ring[idx] = id;
2553 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2554 if_printf(ifp, "xmit failed\n");
984263bc
MD		 2555
2556 AN_INC(idx, AN_TX_RING_CNT);
537b8fd3
JS		 2557
2558 /*
2559 * Set a timeout in case the chip goes out to lunch.
2560 */
2561 ifp->if_timer = 5;
984263bc
MD		 2562 }
2563 } else { /* MPI-350 */
2da352b0
JS		 2564 /* Disable interrupts. */
2565 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2566
984263bc 2567 while (sc->an_rdata.an_tx_empty ||
7a2a04db
SZ		 2568 idx != sc->an_rdata.an_tx_cons) {
2569 ready = 1;
d2c71fa0 2570 m0 = ifq_dequeue(&ifp->if_snd, NULL);
7a2a04db 2571 if (m0 == NULL)
984263bc 2572 break;
7a2a04db 2573
984263bc
MD		 2574 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2575
2576 eh = mtod(m0, struct ether_header *);
2577
2578 /* DJA optimize this to limit bcopy */
2579 bcopy((char *)&eh->ether_dhost,
2580 (char *)&tx_frame_802_3.an_tx_dst_addr,
2581 ETHER_ADDR_LEN);
2582 bcopy((char *)&eh->ether_shost,
2583 (char *)&tx_frame_802_3.an_tx_src_addr,
2584 ETHER_ADDR_LEN);
2585
2586 /* minus src/dest mac & type */
2587 tx_frame_802_3.an_tx_802_3_payload_len =
2588 m0->m_pkthdr.len - 12;
2589
2590 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2591 tx_frame_802_3.an_tx_802_3_payload_len,
2592 (caddr_t)&sc->an_txbuf);
2593
7a2a04db 2594 txcontrol = AN_TXCTL_8023 | AN_TXCTL_HW(sc->mpi350);
984263bc
MD		 2595 /* write the txcontrol only */
2596 bcopy((caddr_t)&txcontrol, &buf[0x08],
2597 sizeof(txcontrol));
2598
2599 /* 802_3 header */
2600 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2601 sizeof(struct an_txframe_802_3));
2602
2603 /* in mbuf header type is just before payload */
2604 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2605 tx_frame_802_3.an_tx_802_3_payload_len);
2606
2607
2608 bzero(&an_tx_desc, sizeof(an_tx_desc));
2609 an_tx_desc.an_offset = 0;
2610 an_tx_desc.an_eoc = 1;
2611 an_tx_desc.an_valid = 1;
2612 an_tx_desc.an_len = 0x44 +
2613 tx_frame_802_3.an_tx_802_3_payload_len;
2614 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
7a2a04db 2615 for (i = sizeof(an_tx_desc) / 4 - 1; i >= 0 ; --i) {
537b8fd3
JS		 2616 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
2617 /* zero for now */
2618 + (0 * sizeof(an_tx_desc))
2619 + (i * 4),
2620 ((u_int32_t*)&an_tx_desc)[i]);
2621 }
984263bc 2622
7600679e 2623 BPF_MTAP(ifp, m0);
984263bc
MD		 2624
2625 m_freem(m0);
2626 m0 = NULL;
2627
984263bc
MD		 2628 AN_INC(idx, AN_MAX_TX_DESC);
2629 sc->an_rdata.an_tx_empty = 0;
537b8fd3
JS		 2630
2631 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2632
2633 /*
2634 * Set a timeout in case the chip goes out to lunch.
2635 */
2636 ifp->if_timer = 5;
984263bc 2637 }
2da352b0
JS		 2638
2639 /* Re-enable interrupts. */
2640 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD		 2641 }
2642
7a2a04db 2643 if (!ready)
984263bc
MD		 2644 ifp->if_flags |= IFF_OACTIVE;
2645
2646 sc->an_rdata.an_tx_prod = idx;
984263bc
MD		 2647}
2648
2649void
c436375a 2650an_stop(struct an_softc *sc)
984263bc
MD		 2651{
2652 struct ifnet *ifp;
2653 int i;
984263bc 2654
984263bc
MD		 2655 ifp = &sc->arpcom.ac_if;
2656
2657 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2658 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2659 an_cmd(sc, AN_CMD_DISABLE, 0);
2660
2661 for (i = 0; i < AN_TX_RING_CNT; i++)
2662 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2663
89c0f216 2664 callout_stop(&sc->an_stat_timer);
984263bc
MD		 2665
2666 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2667
2668 if (sc->an_flash_buffer) {
efda3bd0 2669 kfree(sc->an_flash_buffer, M_DEVBUF);
984263bc
MD		 2670 sc->an_flash_buffer = NULL;
2671 }
984263bc
MD		 2672}
2673
2674static void
c436375a 2675an_watchdog(struct ifnet *ifp)
984263bc
MD		 2676{
2677 struct an_softc *sc;
984263bc
MD		 2678
2679 sc = ifp->if_softc;
984263bc
MD		 2680
2681 an_reset(sc);
2682 if (sc->mpi350)
2683 an_init_mpi350_desc(sc);
2684 an_init(sc);
2685
2686 ifp->if_oerrors++;
984263bc 2687
41d6c56f 2688 if_printf(ifp, "device timeout\n");
984263bc
MD		 2689}
2690
2691void
c436375a 2692an_shutdown(device_t dev)
984263bc
MD		 2693{
2694 struct an_softc *sc;
2695
2696 sc = device_get_softc(dev);
2697 an_stop(sc);
2698
2699 return;
2700}
2701
2702void
c436375a 2703an_resume(device_t dev)
984263bc 2704{
9db4b353
SZ		 2705 struct an_softc *sc = device_get_softc(dev);
2706 struct ifnet *ifp = &sc->arpcom.ac_if;
2707 int i;
984263bc 2708
9db4b353 2709 lwkt_serialize_enter(ifp->if_serializer);
984263bc
MD		 2710
2711 an_reset(sc);
2712 if (sc->mpi350)
2713 an_init_mpi350_desc(sc);
2714 an_init(sc);
2715
2716 /* Recovery temporary keys */
2717 for (i = 0; i < 4; i++) {
2718 sc->areq.an_type = AN_RID_WEP_TEMP;
2719 sc->areq.an_len = sizeof(struct an_ltv_key);
2720 bcopy(&sc->an_temp_keys[i],
2721 &sc->areq, sizeof(struct an_ltv_key));
2722 an_setdef(sc, &sc->areq);
2723 }
2724
2725 if (ifp->if_flags & IFF_UP)
9db4b353 2726 if_devstart(ifp);
984263bc 2727
9db4b353 2728 lwkt_serialize_exit(ifp->if_serializer);
984263bc
MD		 2729}
2730
2731#ifdef ANCACHE
2732/* Aironet signal strength cache code.
2733 * store signal/noise/quality on per MAC src basis in
2734 * a small fixed cache. The cache wraps if > MAX slots
2735 * used. The cache may be zeroed out to start over.
2736 * Two simple filters exist to reduce computation:
2737 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2738 * to ignore some packets. It defaults to ip only.
2739 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2740 * 2. multicast/broadcast only. This may be used to
2741 * ignore unicast packets and only cache signal strength
2742 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2743 * beacons and not unicast traffic.
2744 *
2745 * The cache stores (MAC src(index), IP src (major clue), signal,
2746 * quality, noise)
2747 *
2748 * No apologies for storing IP src here. It's easy and saves much
2749 * trouble elsewhere. The cache is assumed to be INET dependent,
2750 * although it need not be.
2751 *
2752 * Note: the Aironet only has a single byte of signal strength value
2753 * in the rx frame header, and it's not scaled to anything sensible.
2754 * This is kind of lame, but it's all we've got.
2755 */
2756
2757#ifdef documentation
2758
2759int an_sigitems; /* number of cached entries */
2760struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2761int an_nextitem; /* index/# of entries */
2762
2763
2764#endif
2765
2766/* control variables for cache filtering. Basic idea is
2767 * to reduce cost (e.g., to only Mobile-IP agent beacons
2768 * which are broadcast or multicast). Still you might
2769 * want to measure signal strength anth unicast ping packets
2770 * on a pt. to pt. ant. setup.
2771 */
2772/* set true if you want to limit cache items to broadcast/mcast
2773 * only packets (not unicast). Useful for mobile-ip beacons which
2774 * are broadcast/multicast at network layer. Default is all packets
2775 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2776 */
2777static int an_cache_mcastonly = 0;
2778SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2779 &an_cache_mcastonly, 0, "");
2780
2781/* set true if you want to limit cache items to IP packets only
2782*/
2783static int an_cache_iponly = 1;
2784SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2785 &an_cache_iponly, 0, "");
2786
2787/*
2788 * an_cache_store, per rx packet store signal
2789 * strength in MAC (src) indexed cache.
2790 */
2791static void
c436375a
SW		 2792an_cache_store (struct an_softc *sc, struct mbuf *m, u_int8_t rx_rssi,
2793 u_int8_t rx_quality)
984263bc 2794{
3013ac0e
JS		 2795 struct ether_header *eh = mtod(m, struct ether_header *);
2796 struct ip *ip = NULL;
984263bc
MD		 2797 int i;
2798 static int cache_slot = 0; /* use this cache entry */
2799 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD		 2800
2801 /* filters:
2802 * 1. ip only
2803 * 2. configurable filter to throw out unicast packets,
2804 * keep multicast only.
2805 */
2806
3013ac0e
JS		 2807 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2808 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2809 else if (an_cache_iponly)
984263bc 2810 return;
984263bc
MD		 2811
2812 /* filter for broadcast/multicast only
2813 */
2814 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2815 return;
2816 }
2817
2818#ifdef SIGDEBUG
1c70eebf
JS		 2819 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2820 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD		 2821#endif
2822
984263bc
MD		 2823 /* do a linear search for a matching MAC address
2824 * in the cache table
2825 * . MAC address is 6 bytes,
2826 * . var w_nextitem holds total number of entries already cached
2827 */
2828 for (i = 0; i < sc->an_nextitem; i++) {
2829 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2830 /* Match!,
2831 * so we already have this entry,
2832 * update the data
2833 */
2834 break;
2835 }
2836 }
2837
2838 /* did we find a matching mac address?
2839 * if yes, then overwrite a previously existing cache entry
2840 */
2841 if (i < sc->an_nextitem ) {
2842 cache_slot = i;
2843 }
2844 /* else, have a new address entry,so
2845 * add this new entry,
2846 * if table full, then we need to replace LRU entry
2847 */
2848 else {
2849
2850 /* check for space in cache table
2851 * note: an_nextitem also holds number of entries
2852 * added in the cache table
2853 */
2854 if ( sc->an_nextitem < MAXANCACHE ) {
2855 cache_slot = sc->an_nextitem;
2856 sc->an_nextitem++;
2857 sc->an_sigitems = sc->an_nextitem;
2858 }
2859 /* no space found, so simply wrap anth wrap index
2860 * and "zap" the next entry
2861 */
2862 else {
2863 if (wrapindex == MAXANCACHE) {
2864 wrapindex = 0;
2865 }
2866 cache_slot = wrapindex++;
2867 }
2868 }
2869
2870 /* invariant: cache_slot now points at some slot
2871 * in cache.
2872 */
2873 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2874 log(LOG_ERR, "an_cache_store, bad index: %d of "
2875 "[0..%d], gross cache error\n",
2876 cache_slot, MAXANCACHE);
2877 return;
2878 }
2879
2880 /* store items in cache
2881 * .ip source address
2882 * .mac src
2883 * .signal, etc.
2884 */
3013ac0e 2885 if (ip != NULL) {
984263bc
MD		 2886 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2887 }
2888 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2889
2890
2891 switch (an_cache_mode) {
2892 case DBM:
2893 if (sc->an_have_rssimap) {
2894 sc->an_sigcache[cache_slot].signal =
2895 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2896 sc->an_sigcache[cache_slot].quality =
2897 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2898 } else {
2899 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2900 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2901 }
2902 break;
2903 case PERCENT:
2904 if (sc->an_have_rssimap) {
2905 sc->an_sigcache[cache_slot].signal =
2906 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2907 sc->an_sigcache[cache_slot].quality =
2908 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2909 } else {
2910 if (rx_rssi > 100)
2911 rx_rssi = 100;
2912 if (rx_quality > 100)
2913 rx_quality = 100;
2914 sc->an_sigcache[cache_slot].signal = rx_rssi;
2915 sc->an_sigcache[cache_slot].quality = rx_quality;
2916 }
2917 break;
2918 case RAW:
2919 sc->an_sigcache[cache_slot].signal = rx_rssi;
2920 sc->an_sigcache[cache_slot].quality = rx_quality;
2921 break;
2922 }
2923
2924 sc->an_sigcache[cache_slot].noise = 0;
2925
2926 return;
2927}
2928#endif
2929
2930static int
c436375a 2931an_media_change(struct ifnet *ifp)
984263bc
MD		 2932{
2933 struct an_softc *sc = ifp->if_softc;
2934 struct an_ltv_genconfig *cfg;
2935 int otype = sc->an_config.an_opmode;
2936 int orate = sc->an_tx_rate;
2937
984263bc
MD		 2938 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
2939 case IFM_IEEE80211_DS1:
2940 sc->an_tx_rate = AN_RATE_1MBPS;
2941 break;
2942 case IFM_IEEE80211_DS2:
2943 sc->an_tx_rate = AN_RATE_2MBPS;
2944 break;
2945 case IFM_IEEE80211_DS5:
2946 sc->an_tx_rate = AN_RATE_5_5MBPS;
2947 break;
2948 case IFM_IEEE80211_DS11:
2949 sc->an_tx_rate = AN_RATE_11MBPS;
2950 break;
2951 case IFM_AUTO:
2952 sc->an_tx_rate = 0;
2953 break;
2954 }
2955
2956 if (orate != sc->an_tx_rate) {
2957 /* Read the current configuration */
2958 sc->an_config.an_type = AN_RID_GENCONFIG;
2959 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2960 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
2961 cfg = &sc->an_config;
2962
2963 /* clear other rates and set the only one we want */
2964 bzero(cfg->an_rates, sizeof(cfg->an_rates));
2965 cfg->an_rates[0] = sc->an_tx_rate;
2966
2967 /* Save the new rate */
2968 sc->an_config.an_type = AN_RID_GENCONFIG;
2969 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2970 }
2971
537b8fd3
JS		 2972 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
2973 sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION;
2974 else
2975 sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION;
2976
984263bc
MD		 2977 if (otype != sc->an_config.an_opmode ||
2978 orate != sc->an_tx_rate)
2979 an_init(sc);
2980
2981 return(0);
2982}
2983
2984static void
c436375a 2985an_media_status(struct ifnet *ifp, struct ifmediareq *imr)
984263bc
MD		 2986{
2987 struct an_ltv_status status;
2988 struct an_softc *sc = ifp->if_softc;
2989
2990 status.an_len = sizeof(status);
2991 status.an_type = AN_RID_STATUS;
2992 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
2993 /* If the status read fails, just lie. */
2994 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
2995 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
2996 }
2997
2998 if (sc->an_tx_rate == 0) {
2999 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3000 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3001 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3002 switch (status.an_current_tx_rate) {
3003 case AN_RATE_1MBPS:
3004 imr->ifm_active |= IFM_IEEE80211_DS1;
3005 break;
3006 case AN_RATE_2MBPS:
3007 imr->ifm_active |= IFM_IEEE80211_DS2;
3008 break;
3009 case AN_RATE_5_5MBPS:
3010 imr->ifm_active |= IFM_IEEE80211_DS5;
3011 break;
3012 case AN_RATE_11MBPS:
3013 imr->ifm_active |= IFM_IEEE80211_DS11;
3014 break;
3015 }
3016 } else {
3017 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3018 }
3019
3020 imr->ifm_status = IFM_AVALID;
3021 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3022 imr->ifm_status |= IFM_ACTIVE;
3023}
3024
3025/********************** Cisco utility support routines *************/
3026
3027/*
3028 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3029 * Linux driver
3030 */
3031
3032static int
c436375a 3033readrids(struct ifnet *ifp, struct aironet_ioctl *l_ioctl)
984263bc
MD		 3034{
3035 unsigned short rid;
3036 struct an_softc *sc;
3037
3038 switch (l_ioctl->command) {
3039 case AIROGCAP:
3040 rid = AN_RID_CAPABILITIES;
3041 break;
3042 case AIROGCFG:
3043 rid = AN_RID_GENCONFIG;
3044 break;
3045 case AIROGSLIST:
3046 rid = AN_RID_SSIDLIST;
3047 break;
3048 case AIROGVLIST:
3049 rid = AN_RID_APLIST;
3050 break;
3051 case AIROGDRVNAM:
3052 rid = AN_RID_DRVNAME;
3053 break;
3054 case AIROGEHTENC:
3055 rid = AN_RID_ENCAPPROTO;
3056 break;
3057 case AIROGWEPKTMP:
3058 rid = AN_RID_WEP_TEMP;
3059 break;
3060 case AIROGWEPKNV:
3061 rid = AN_RID_WEP_PERM;
3062 break;
3063 case AIROGSTAT:
3064 rid = AN_RID_STATUS;
3065 break;
3066 case AIROGSTATSD32:
3067 rid = AN_RID_32BITS_DELTA;
3068 break;
3069 case AIROGSTATSC32:
3070 rid = AN_RID_32BITS_CUM;
3071 break;
3072 default:
3073 rid = 999;
3074 break;
3075 }
3076
3077 if (rid == 999) /* Is bad command */
3078 return -EINVAL;
3079
3080 sc = ifp->if_softc;
3081 sc->areq.an_len = AN_MAX_DATALEN;
3082 sc->areq.an_type = rid;
3083
3084 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3085
3086 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3087
3088 /* the data contains the length at first */
3089 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3090 sizeof(sc->areq.an_len))) {
3091 return -EFAULT;
3092 }
3093 /* Just copy the data back */
3094 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3095 l_ioctl->len)) {
3096 return -EFAULT;
3097 }
3098 return 0;
3099}
3100
3101static int
c436375a 3102writerids(struct ifnet *ifp, struct aironet_ioctl *l_ioctl)
984263bc
MD		 3103{
3104 struct an_softc *sc;
3105 int rid, command;
3106
3107 sc = ifp->if_softc;
3108 rid = 0;
3109 command = l_ioctl->command;
3110
3111 switch (command) {
3112 case AIROPSIDS:
3113 rid = AN_RID_SSIDLIST;
3114 break;
3115 case AIROPCAP:
3116 rid = AN_RID_CAPABILITIES;
3117 break;
3118 case AIROPAPLIST:
3119 rid = AN_RID_APLIST;
3120 break;
3121 case AIROPCFG:
3122 rid = AN_RID_GENCONFIG;
3123 break;
3124 case AIROPMACON:
3125 an_cmd(sc, AN_CMD_ENABLE, 0);
3126 return 0;
3127 break;
3128 case AIROPMACOFF:
3129 an_cmd(sc, AN_CMD_DISABLE, 0);
3130 return 0;
3131 break;
3132 case AIROPSTCLR:
3133 /*
3134 * This command merely clears the counts does not actually
3135 * store any data only reads rid. But as it changes the cards
3136 * state, I put it in the writerid routines.
3137 */
3138
3139 rid = AN_RID_32BITS_DELTACLR;
3140 sc = ifp->if_softc;
3141 sc->areq.an_len = AN_MAX_DATALEN;
3142 sc->areq.an_type = rid;
3143
3144 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3145 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3146
3147 /* the data contains the length at first */
3148 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3149 sizeof(sc->areq.an_len))) {
3150 return -EFAULT;
3151 }
3152 /* Just copy the data */
3153 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3154 l_ioctl->len)) {
3155 return -EFAULT;
3156 }
3157 return 0;
3158 break;
3159 case AIROPWEPKEY:
3160 rid = AN_RID_WEP_TEMP;
3161 break;
3162 case AIROPWEPKEYNV:
3163 rid = AN_RID_WEP_PERM;
3164 break;
3165 case AIROPLEAPUSR:
3166 rid = AN_RID_LEAPUSERNAME;
3167 break;
3168 case AIROPLEAPPWD:
3169 rid = AN_RID_LEAPPASSWORD;
3170 break;
3171 default:
3172 return -EOPNOTSUPP;
3173 }
3174
3175 if (rid) {
3176 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3177 return -EINVAL;
3178 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3179 sc->areq.an_type = rid;
3180
3181 /* Just copy the data back */
3182 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3183 l_ioctl->len);
3184
3185 an_cmd(sc, AN_CMD_DISABLE, 0);
3186 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3187 an_cmd(sc, AN_CMD_ENABLE, 0);
3188 return 0;
3189 }
3190 return -EOPNOTSUPP;
3191}
3192
3193/*
3194 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3195 * Linux driver
3196 */
3197
377d4740 3198#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD		 3199#define FLASH_COMMAND 0x7e7e
3200#define FLASH_SIZE 32 * 1024
3201
3202static int
c436375a 3203unstickbusy(struct ifnet *ifp)
984263bc
MD		 3204{
3205 struct an_softc *sc = ifp->if_softc;
3206
3207 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3208 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3209 AN_EV_CLR_STUCK_BUSY);
3210 return 1;
3211 }
3212 return 0;
3213}
3214
3215/*
3216 * Wait for busy completion from card wait for delay uSec's Return true for
3217 * success meaning command reg is clear
3218 */
3219
3220static int
c436375a 3221WaitBusy(struct ifnet *ifp, int uSec)
984263bc
MD		 3222{
3223 int statword = 0xffff;
3224 int delay = 0;
3225 struct an_softc *sc = ifp->if_softc;
3226
3227 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3228 FLASH_DELAY(10);
3229 delay += 10;
3230 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3231
3232 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3233 unstickbusy(ifp);
3234 }
3235 }
3236
3237 return 0 == (AN_CMD_BUSY & statword);
3238}
3239
3240/*
3241 * STEP 1) Disable MAC and do soft reset on card.
3242 */
3243
3244static int
c436375a 3245cmdreset(struct ifnet *ifp)
984263bc
MD		 3246{
3247 int status;
3248 struct an_softc *sc = ifp->if_softc;
3249
3250 an_stop(sc);
3251
3252 an_cmd(sc, AN_CMD_DISABLE, 0);
3253
3254 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3255 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD		 3256 return -EBUSY;
3257 }
3258 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3259
3260 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3261
3262
3263 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3264 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD		 3265 return -EBUSY;
3266 }
3267 return 0;
3268}
3269
3270/*
3271 * STEP 2) Put the card in legendary flash mode
3272 */
3273
3274static int
c436375a 3275setflashmode(struct ifnet *ifp)
984263bc
MD		 3276{
3277 int status;
3278 struct an_softc *sc = ifp->if_softc;
3279
3280 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3281 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3282 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3283 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3284
3285 /*
3286 * mdelay(500); // 500ms delay
3287 */
3288
3289 FLASH_DELAY(500);
3290
3291 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
e3869ec7 3292 kprintf("Waitbusy hang after setflash mode\n");
984263bc
MD		 3293 return -EIO;
3294 }
3295 return 0;
3296}
3297
3298/*
3299 * Get a character from the card matching matchbyte Step 3)
3300 */
3301
3302static int
c436375a 3303flashgchar(struct ifnet *ifp, int matchbyte, int dwelltime)
984263bc
MD		 3304{
3305 int rchar;
3306 unsigned char rbyte = 0;
3307 int success = -1;
3308 struct an_softc *sc = ifp->if_softc;
3309
3310
3311 do {
3312 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3313
3314 if (dwelltime && !(0x8000 & rchar)) {
3315 dwelltime -= 10;
3316 FLASH_DELAY(10);
3317 continue;
3318 }
3319 rbyte = 0xff & rchar;
3320
3321 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3322 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3323 success = 1;
3324 break;
3325 }
3326 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3327 break;
3328 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3329
3330 } while (dwelltime > 0);
3331 return success;
3332}
3333
3334/*
3335 * Put character to SWS0 wait for dwelltime x 50us for echo .
3336 */
3337
3338static int
c436375a 3339flashpchar(struct ifnet *ifp, int byte, int dwelltime)
984263bc
MD		 3340{
3341 int echo;
3342 int pollbusy, waittime;
3343 struct an_softc *sc = ifp->if_softc;
3344
3345 byte |= 0x8000;
3346
3347 if (dwelltime == 0)
3348 dwelltime = 200;
3349
3350 waittime = dwelltime;
3351
3352 /*
3353 * Wait for busy bit d15 to go false indicating buffer empty
3354 */
3355 do {
3356 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3357
3358 if (pollbusy & 0x8000) {
3359 FLASH_DELAY(50);
3360 waittime -= 50;
3361 continue;
3362 } else
3363 break;
3364 }
3365 while (waittime >= 0);
3366
3367 /* timeout for busy clear wait */
3368
3369 if (waittime <= 0) {
1c70eebf 3370 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD		 3371 return -1;
3372 }
3373 /*
3374 * Port is clear now write byte and wait for it to echo back
3375 */
3376 do {
3377 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3378 FLASH_DELAY(50);
3379 dwelltime -= 50;
3380 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3381 } while (dwelltime >= 0 && echo != byte);
3382
3383
3384 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3385
3386 return echo == byte;
3387}
3388
3389/*
3390 * Transfer 32k of firmware data from user buffer to our buffer and send to
3391 * the card
3392 */
3393
3394static int
c436375a 3395flashputbuf(struct ifnet *ifp)
984263bc
MD		 3396{
3397 unsigned short *bufp;
3398 int nwords;
3399 struct an_softc *sc = ifp->if_softc;
3400
3401 /* Write stuff */
3402
3403 bufp = sc->an_flash_buffer;
3404
3405 if (!sc->mpi350) {
3406 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3407 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3408
3409 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3410 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3411 }
3412 } else {
3413 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3414 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3415 ((u_int32_t *)bufp)[nwords] & 0xffff);
3416 }
3417 }
3418
3419 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3420
3421 return 0;
3422}
3423
3424/*
3425 * After flashing restart the card.
3426 */
3427
3428static int
c436375a 3429flashrestart(struct ifnet *ifp)
984263bc
MD		 3430{
3431 int status = 0;
3432 struct an_softc *sc = ifp->if_softc;
3433
3434 FLASH_DELAY(1024); /* Added 12/7/00 */
3435
3436 an_init(sc);
3437
3438 FLASH_DELAY(1024); /* Added 12/7/00 */
3439 return status;
3440}
3441
3442/*
3443 * Entry point for flash ioclt.
3444 */
3445
3446static int
c436375a 3447flashcard(struct ifnet *ifp, struct aironet_ioctl *l_ioctl)
984263bc
MD		 3448{
3449 int z = 0, status;
3450 struct an_softc *sc;
3451
3452 sc = ifp->if_softc;
3453 if (sc->mpi350) {
1c70eebf 3454 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD		 3455 return(-1);
3456 }
3457 status = l_ioctl->command;
3458
3459 switch (l_ioctl->command) {
3460 case AIROFLSHRST:
3461 return cmdreset(ifp);
3462 break;
3463 case AIROFLSHSTFL:
3464 if (sc->an_flash_buffer) {
efda3bd0 3465 kfree(sc->an_flash_buffer, M_DEVBUF);
984263bc
MD		 3466 sc->an_flash_buffer = NULL;
3467 }
efda3bd0 3468 sc->an_flash_buffer = kmalloc(FLASH_SIZE, M_DEVBUF, 0);
984263bc
MD		 3469 if (sc->an_flash_buffer)
3470 return setflashmode(ifp);
3471 else
3472 return ENOBUFS;
3473 break;
3474 case AIROFLSHGCHR: /* Get char from aux */
3475 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3476 z = *(int *)&sc->areq;
3477 if ((status = flashgchar(ifp, z, 8000)) == 1)
3478 return 0;
3479 else
3480 return -1;
3481 break;
3482 case AIROFLSHPCHR: /* Send char to card. */
3483 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3484 z = *(int *)&sc->areq;
3485 if ((status = flashpchar(ifp, z, 8000)) == -1)
3486 return -EIO;
3487 else
3488 return 0;
3489 break;
3490 case AIROFLPUTBUF: /* Send 32k to card */
3491 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS		 3492 if_printf(ifp, "Buffer to big, %x %x\n",
3493 l_ioctl->len, FLASH_SIZE);
984263bc
MD		 3494 return -EINVAL;
3495 }
3496 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3497
3498 if ((status = flashputbuf(ifp)) != 0)
3499 return -EIO;
3500 else
3501 return 0;
3502 break;
3503 case AIRORESTART:
3504 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3505 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD		 3506 return -EIO;
3507 } else
3508 return 0;
3509
3510 break;
3511 default:
3512 return -EINVAL;
3513 }
3514
3515 return -EINVAL;
3516}
DragonFly Project GIT Source repo