Remove upc_{control,register} syscalls and everything that has to do with it.
[dragonfly.git] / sys / platform / vkernel / i386 / cpu_regs.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (C) 1994, David Greenman
4 * Copyright (c) 1982, 1987, 1990, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
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40 */
41
6f7b98e0 42#include "use_npx.h"
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43#include "opt_compat.h"
44#include "opt_ddb.h"
45#include "opt_directio.h"
46#include "opt_inet.h"
47#include "opt_ipx.h"
48#include "opt_msgbuf.h"
49#include "opt_swap.h"
50
51#include <sys/param.h>
52#include <sys/systm.h>
53#include <sys/sysproto.h>
54#include <sys/signalvar.h>
55#include <sys/kernel.h>
56#include <sys/linker.h>
57#include <sys/malloc.h>
58#include <sys/proc.h>
59#include <sys/buf.h>
60#include <sys/reboot.h>
61#include <sys/mbuf.h>
62#include <sys/msgbuf.h>
63#include <sys/sysent.h>
64#include <sys/sysctl.h>
65#include <sys/vmmeter.h>
66#include <sys/bus.h>
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67#include <sys/usched.h>
68#include <sys/reg.h>
69
70#include <vm/vm.h>
71#include <vm/vm_param.h>
72#include <sys/lock.h>
73#include <vm/vm_kern.h>
74#include <vm/vm_object.h>
75#include <vm/vm_page.h>
76#include <vm/vm_map.h>
77#include <vm/vm_pager.h>
78#include <vm/vm_extern.h>
79
80#include <sys/thread2.h>
684a93c4 81#include <sys/mplock2.h>
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82
83#include <sys/user.h>
84#include <sys/exec.h>
85#include <sys/cons.h>
86
87#include <ddb/ddb.h>
88
89#include <machine/cpu.h>
90#include <machine/clock.h>
91#include <machine/specialreg.h>
92#include <machine/md_var.h>
93#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
94#include <machine/globaldata.h> /* CPU_prvspace */
95#include <machine/smp.h>
96#ifdef PERFMON
97#include <machine/perfmon.h>
98#endif
99#include <machine/cputypes.h>
100
101#include <bus/isa/rtc.h>
102#include <machine/vm86.h>
103#include <sys/random.h>
104#include <sys/ptrace.h>
105#include <machine/sigframe.h>
b402c633 106#include <unistd.h> /* umtx_* functions */
b68e846f 107#include <pthread.h> /* pthread_yield */
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108
109extern void dblfault_handler (void);
110
111#ifndef CPU_DISABLE_SSE
112static void set_fpregs_xmm (struct save87 *, struct savexmm *);
113static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
114#endif /* CPU_DISABLE_SSE */
115#ifdef DIRECTIO
116extern void ffs_rawread_setup(void);
117#endif /* DIRECTIO */
118
6f7b98e0 119int64_t tsc_offsets[MAXCPU];
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120
121#if defined(SWTCH_OPTIM_STATS)
122extern int swtch_optim_stats;
123SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
124 CTLFLAG_RD, &swtch_optim_stats, 0, "");
125SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
126 CTLFLAG_RD, &tlb_flush_count, 0, "");
127#endif
128
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129static int
130sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
131{
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132 u_long pmem = ctob(physmem);
133
134 int error = sysctl_handle_long(oidp, &pmem, 0, req);
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135 return (error);
136}
137
39d69dae 138SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
9b9532a0 139 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
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140
141static int
142sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
143{
144 int error = sysctl_handle_int(oidp, 0,
71152ac6 145 ctob((int)Maxmem - vmstats.v_wire_count), req);
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146 return (error);
147}
148
149SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
150 0, 0, sysctl_hw_usermem, "IU", "");
151
201b3f37 152SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, "");
44afc5dc 153
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154#if 0
155
156static int
157sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
158{
159 int error;
160
161 /* Unwind the buffer, so that it's linear (possibly starting with
162 * some initial nulls).
163 */
164 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
165 msgbufp->msg_size-msgbufp->msg_bufr,req);
166 if(error) return(error);
167 if(msgbufp->msg_bufr>0) {
168 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
169 msgbufp->msg_bufr,req);
170 }
171 return(error);
172}
173
174SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
175 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
176
177static int msgbuf_clear;
178
179static int
180sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
181{
182 int error;
183 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
184 req);
185 if (!error && req->newptr) {
186 /* Clear the buffer and reset write pointer */
187 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
188 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
189 msgbuf_clear=0;
190 }
191 return (error);
192}
193
194SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
195 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
196 "Clear kernel message buffer");
197
198#endif
199
200/*
201 * Send an interrupt to process.
202 *
203 * Stack is set up to allow sigcode stored
204 * at top to call routine, followed by kcall
205 * to sigreturn routine below. After sigreturn
206 * resets the signal mask, the stack, and the
207 * frame pointer, it returns to the user
208 * specified pc, psl.
209 */
210void
211sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
212{
213 struct lwp *lp = curthread->td_lwp;
214 struct proc *p = lp->lwp_proc;
215 struct trapframe *regs;
216 struct sigacts *psp = p->p_sigacts;
217 struct sigframe sf, *sfp;
218 int oonstack;
219
220 regs = lp->lwp_md.md_regs;
221 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
222
223 /* save user context */
224 bzero(&sf, sizeof(struct sigframe));
225 sf.sf_uc.uc_sigmask = *mask;
226 sf.sf_uc.uc_stack = lp->lwp_sigstk;
227 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
4e7c41c5 228 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
6f7b98e0 229
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230 /* make the size of the saved context visible to userland */
231 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
232
6f7b98e0 233 /* Allocate and validate space for the signal handler context. */
4643740a 234 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
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235 SIGISMEMBER(psp->ps_sigonstack, sig)) {
236 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
237 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
238 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
239 }
240 else
241 sfp = (struct sigframe *)regs->tf_esp - 1;
242
243 /* Translate the signal is appropriate */
244 if (p->p_sysent->sv_sigtbl) {
245 if (sig <= p->p_sysent->sv_sigsize)
246 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
247 }
248
249 /* Build the argument list for the signal handler. */
250 sf.sf_signum = sig;
251 sf.sf_ucontext = (register_t)&sfp->sf_uc;
252 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
253 /* Signal handler installed with SA_SIGINFO. */
254 sf.sf_siginfo = (register_t)&sfp->sf_si;
255 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
256
257 /* fill siginfo structure */
258 sf.sf_si.si_signo = sig;
259 sf.sf_si.si_code = code;
bd764d12 260 sf.sf_si.si_addr = (void*)regs->tf_err;
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261 }
262 else {
263 /* Old FreeBSD-style arguments. */
264 sf.sf_siginfo = code;
bd764d12 265 sf.sf_addr = regs->tf_err;
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266 sf.sf_ahu.sf_handler = catcher;
267 }
268
269#if 0
270 /*
271 * If we're a vm86 process, we want to save the segment registers.
272 * We also change eflags to be our emulated eflags, not the actual
273 * eflags.
274 */
275 if (regs->tf_eflags & PSL_VM) {
276 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
277 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
278
279 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
280 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
281 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
282 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
283
284 if (vm86->vm86_has_vme == 0)
285 sf.sf_uc.uc_mcontext.mc_eflags =
286 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
287 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
288
289 /*
290 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
291 * syscalls made by the signal handler. This just avoids
292 * wasting time for our lazy fixup of such faults. PSL_NT
293 * does nothing in vm86 mode, but vm86 programs can set it
294 * almost legitimately in probes for old cpu types.
295 */
296 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
297 }
298#endif
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299
300 /*
301 * Save the FPU state and reinit the FP unit
302 */
303 npxpush(&sf.sf_uc.uc_mcontext);
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304
305 /*
306 * Copy the sigframe out to the user's stack.
307 */
308 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
309 /*
310 * Something is wrong with the stack pointer.
311 * ...Kill the process.
312 */
b276424c 313 sigexit(lp, SIGILL);
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314 }
315
316 regs->tf_esp = (int)sfp;
317 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
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318
319 /*
320 * i386 abi specifies that the direction flag must be cleared
321 * on function entry
322 */
323 regs->tf_eflags &= ~(PSL_T|PSL_D);
324
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325 regs->tf_cs = _ucodesel;
326 regs->tf_ds = _udatasel;
327 regs->tf_es = _udatasel;
328 if (regs->tf_trapno == T_PROTFLT) {
329 regs->tf_fs = _udatasel;
330 regs->tf_gs = _udatasel;
331 }
332 regs->tf_ss = _udatasel;
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333}
334
335/*
336 * Sanitize the trapframe for a virtual kernel passing control to a custom
337 * VM context.
338 *
339 * Allow userland to set or maintain PSL_RF, the resume flag. This flag
340 * basically controls whether the return PC should skip the first instruction
341 * (as in an explicit system call) or re-execute it (as in an exception).
342 */
343int
344cpu_sanitize_frame(struct trapframe *frame)
345{
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346 frame->tf_cs = _ucodesel;
347 frame->tf_ds = _udatasel;
348 frame->tf_es = _udatasel;
349#if 0
350 frame->tf_fs = _udatasel;
351 frame->tf_gs = _udatasel;
352#endif
353 frame->tf_ss = _udatasel;
354 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
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355 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
356 return(0);
357}
358
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359int
360cpu_sanitize_tls(struct savetls *tls)
361{
362 struct segment_descriptor *desc;
363 int i;
364
365 for (i = 0; i < NGTLS; ++i) {
366 desc = &tls->tls[i];
367 if (desc->sd_dpl == 0 && desc->sd_type == 0)
368 continue;
369 if (desc->sd_def32 == 0)
370 return(ENXIO);
371 if (desc->sd_type != SDT_MEMRWA)
372 return(ENXIO);
373 if (desc->sd_dpl != SEL_UPL)
374 return(ENXIO);
375 if (desc->sd_xx != 0 || desc->sd_p != 1)
376 return(ENXIO);
377 }
378 return(0);
379}
380
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381/*
382 * sigreturn(ucontext_t *sigcntxp)
383 *
384 * System call to cleanup state after a signal
385 * has been taken. Reset signal mask and
386 * stack state from context left by sendsig (above).
387 * Return to previous pc and psl as specified by
388 * context left by sendsig. Check carefully to
389 * make sure that the user has not modified the
390 * state to gain improper privileges.
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391 *
392 * MPSAFE
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393 */
394#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
395#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
396
397int
398sys_sigreturn(struct sigreturn_args *uap)
399{
400 struct lwp *lp = curthread->td_lwp;
401 struct trapframe *regs;
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402 ucontext_t ucp;
403 int cs;
404 int eflags;
405 int error;
6f7b98e0 406
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407 error = copyin(uap->sigcntxp, &ucp, sizeof(ucp));
408 if (error)
409 return (error);
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410
411 regs = lp->lwp_md.md_regs;
aaf8b91f 412 eflags = ucp.uc_mcontext.mc_eflags;
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413
414#if 0
415 if (eflags & PSL_VM) {
416 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
417 struct vm86_kernel *vm86;
418
419 /*
420 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
421 * set up the vm86 area, and we can't enter vm86 mode.
422 */
423 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
424 return (EINVAL);
425 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
426 if (vm86->vm86_inited == 0)
427 return (EINVAL);
428
429 /* go back to user mode if both flags are set */
430 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
431 trapsignal(lp->lwp_proc, SIGBUS, 0);
432
433 if (vm86->vm86_has_vme) {
434 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
435 (eflags & VME_USERCHANGE) | PSL_VM;
436 } else {
437 vm86->vm86_eflags = eflags; /* save VIF, VIP */
438 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
439 }
aaf8b91f 440 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
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441 tf->tf_eflags = eflags;
442 tf->tf_vm86_ds = tf->tf_ds;
443 tf->tf_vm86_es = tf->tf_es;
444 tf->tf_vm86_fs = tf->tf_fs;
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445 tf->tf_vm86_gs = tf->tf_gs;
446 tf->tf_ds = _udatasel;
447 tf->tf_es = _udatasel;
448#if 0
449 tf->tf_fs = _udatasel;
450 tf->tf_gs = _udatasel;
451#endif
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452 } else
453#endif
454 {
455 /*
456 * Don't allow users to change privileged or reserved flags.
457 */
458 /*
459 * XXX do allow users to change the privileged flag PSL_RF.
460 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
461 * should sometimes set it there too. tf_eflags is kept in
462 * the signal context during signal handling and there is no
463 * other place to remember it, so the PSL_RF bit may be
464 * corrupted by the signal handler without us knowing.
465 * Corruption of the PSL_RF bit at worst causes one more or
466 * one less debugger trap, so allowing it is fairly harmless.
467 */
468 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
469 kprintf("sigreturn: eflags = 0x%x\n", eflags);
470 return(EINVAL);
471 }
472
473 /*
474 * Don't allow users to load a valid privileged %cs. Let the
475 * hardware check for invalid selectors, excess privilege in
476 * other selectors, invalid %eip's and invalid %esp's.
477 */
aaf8b91f 478 cs = ucp.uc_mcontext.mc_cs;
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479 if (!CS_SECURE(cs)) {
480 kprintf("sigreturn: cs = 0x%x\n", cs);
08f2f1bb 481 trapsignal(lp, SIGBUS, T_PROTFLT);
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482 return(EINVAL);
483 }
aaf8b91f 484 bcopy(&ucp.uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
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485 }
486
4b486183 487 /*
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488 * Restore the FPU state from the frame
489 */
3919ced0 490 crit_enter();
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491 npxpop(&ucp.uc_mcontext);
492
aaf8b91f 493 if (ucp.uc_mcontext.mc_onstack & 1)
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494 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
495 else
496 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
497
aaf8b91f 498 lp->lwp_sigmask = ucp.uc_sigmask;
6f7b98e0 499 SIG_CANTMASK(lp->lwp_sigmask);
3919ced0 500 crit_exit();
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501 return(EJUSTRETURN);
502}
503
504/*
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505 * cpu_idle() represents the idle LWKT. You cannot return from this function
506 * (unless you want to blow things up!). Instead we look for runnable threads
507 * and loop or halt as appropriate. Giant is not held on entry to the thread.
508 *
509 * The main loop is entered with a critical section held, we must release
510 * the critical section before doing anything else. lwkt_switch() will
511 * check for pending interrupts due to entering and exiting its own
512 * critical section.
513 *
514 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
b12defdc 515 * to wake a HLTed cpu up.
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516 */
517static int cpu_idle_hlt = 1;
518static int cpu_idle_hltcnt;
519static int cpu_idle_spincnt;
520SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
521 &cpu_idle_hlt, 0, "Idle loop HLT enable");
522SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
523 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
524SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
525 &cpu_idle_spincnt, 0, "Idle loop entry spins");
526
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527void
528cpu_idle(void)
529{
530 struct thread *td = curthread;
b402c633 531 struct mdglobaldata *gd = mdcpu;
c5724852 532 int reqflags;
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533
534 crit_exit();
f9235b6d 535 KKASSERT(td->td_critcount == 0);
792a98ed 536 cpu_enable_intr();
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537 for (;;) {
538 /*
539 * See if there are any LWKTs ready to go.
540 */
541 lwkt_switch();
542
543 /*
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544 * The idle loop halts only if no threads are scheduleable
545 * and no signals have occured.
6f7b98e0 546 */
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547 if (cpu_idle_hlt &&
548 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
6f7b98e0 549 splz();
b5d16701 550 KKASSERT(MP_LOCK_HELD() == 0);
cbdd23b1 551 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
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552#ifdef DEBUGIDLE
553 struct timeval tv1, tv2;
554 gettimeofday(&tv1, NULL);
555#endif
c5724852 556 reqflags = gd->mi.gd_reqflags &
cbdd23b1 557 ~RQF_IDLECHECK_WK_MASK;
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558 umtx_sleep(&gd->mi.gd_reqflags, reqflags,
559 1000000);
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560#ifdef DEBUGIDLE
561 gettimeofday(&tv2, NULL);
562 if (tv2.tv_usec - tv1.tv_usec +
563 (tv2.tv_sec - tv1.tv_sec) * 1000000
564 > 500000) {
565 kprintf("cpu %d idlelock %08x %08x\n",
566 gd->mi.gd_cpuid,
f9235b6d 567 gd->mi.gd_reqflags,
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568 gd->gd_fpending);
569 }
570#endif
571 }
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572 ++cpu_idle_hltcnt;
573 } else {
6f7b98e0 574 splz();
6f7b98e0 575 __asm __volatile("pause");
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576 ++cpu_idle_spincnt;
577 }
578 }
579}
580
b402c633 581/*
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582 * Called by the spinlock code with or without a critical section held
583 * when a spinlock is found to be seriously constested.
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584 *
585 * We need to enter a critical section to prevent signals from recursing
586 * into pthreads.
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587 */
588void
589cpu_spinlock_contested(void)
590{
c5724852 591 cpu_pause();
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592}
593
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594/*
595 * Clear registers on exec
596 */
597void
08f2f1bb 598exec_setregs(u_long entry, u_long stack, u_long ps_strings)
6f7b98e0 599{
08f2f1bb
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600 struct thread *td = curthread;
601 struct lwp *lp = td->td_lwp;
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602 struct trapframe *regs = lp->lwp_md.md_regs;
603 struct pcb *pcb = lp->lwp_thread->td_pcb;
604
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605 /* was i386_user_cleanup() in NetBSD */
606 user_ldt_free(pcb);
607
608 bzero((char *)regs, sizeof(struct trapframe));
609 regs->tf_eip = entry;
610 regs->tf_esp = stack;
611 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
612 regs->tf_ss = 0;
613 regs->tf_ds = 0;
614 regs->tf_es = 0;
615 regs->tf_fs = 0;
4e7c41c5 616 regs->tf_gs = 0;
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617 regs->tf_cs = 0;
618
619 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
620 regs->tf_ebx = ps_strings;
621
622 /*
623 * Reset the hardware debug registers if they were in use.
624 * They won't have any meaning for the newly exec'd process.
625 */
626 if (pcb->pcb_flags & PCB_DBREGS) {
627 pcb->pcb_dr0 = 0;
628 pcb->pcb_dr1 = 0;
629 pcb->pcb_dr2 = 0;
630 pcb->pcb_dr3 = 0;
631 pcb->pcb_dr6 = 0;
632 pcb->pcb_dr7 = 0;
08f2f1bb 633 if (pcb == td->td_pcb) {
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634 /*
635 * Clear the debug registers on the running
636 * CPU, otherwise they will end up affecting
637 * the next process we switch to.
638 */
639 reset_dbregs();
640 }
641 pcb->pcb_flags &= ~PCB_DBREGS;
642 }
643
644 /*
645 * Initialize the math emulator (if any) for the current process.
646 * Actually, just clear the bit that says that the emulator has
647 * been initialized. Initialization is delayed until the process
648 * traps to the emulator (if it is done at all) mainly because
649 * emulators don't provide an entry point for initialization.
650 */
08f2f1bb 651 pcb->pcb_flags &= ~FP_SOFTFP;
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652
653 /*
654 * note: do not set CR0_TS here. npxinit() must do it after clearing
655 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
656 * in npxdna().
657 */
658 crit_enter();
659#if 0
660 load_cr0(rcr0() | CR0_MP);
661#endif
662
663#if NNPX > 0
664 /* Initialize the npx (if any) for the current process. */
665 npxinit(__INITIAL_NPXCW__);
666#endif
667 crit_exit();
668
669 /*
670 * note: linux emulator needs edx to be 0x0 on entry, which is
671 * handled in execve simply by setting the 64 bit syscall
672 * return value to 0.
673 */
674}
675
676void
677cpu_setregs(void)
678{
679#if 0
680 unsigned int cr0;
681
682 cr0 = rcr0();
683 cr0 |= CR0_NE; /* Done by npxinit() */
684 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
4db955e1 685 cr0 |= CR0_WP | CR0_AM;
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686 load_cr0(cr0);
687 load_gs(_udatasel);
688#endif
689}
690
691static int
692sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
693{
694 int error;
695 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
696 req);
697 if (!error && req->newptr)
698 resettodr();
699 return (error);
700}
701
702SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
703 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
704
705extern u_long bootdev; /* not a cdev_t - encoding is different */
706SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
707 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
708
709/*
710 * Initialize 386 and configure to run kernel
711 */
712
713/*
714 * Initialize segments & interrupt table
715 */
716
717extern struct user *proc0paddr;
718
719#if 0
720
721extern inthand_t
722 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
723 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
724 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
725 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
726 IDTVEC(xmm), IDTVEC(syscall),
727 IDTVEC(rsvd0);
728extern inthand_t
729 IDTVEC(int0x80_syscall);
730
731#endif
732
733#ifdef DEBUG_INTERRUPTS
734extern inthand_t *Xrsvdary[256];
735#endif
736
737int
08f2f1bb 738ptrace_set_pc(struct lwp *lp, unsigned long addr)
6f7b98e0 739{
08f2f1bb 740 lp->lwp_md.md_regs->tf_eip = addr;
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741 return (0);
742}
743
744int
745ptrace_single_step(struct lwp *lp)
746{
747 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
748 return (0);
749}
750
751int
752fill_regs(struct lwp *lp, struct reg *regs)
753{
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754 struct trapframe *tp;
755
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756 if ((tp = lp->lwp_md.md_regs) == NULL)
757 return EINVAL;
4e7c41c5 758 regs->r_gs = tp->tf_gs;
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759 regs->r_fs = tp->tf_fs;
760 regs->r_es = tp->tf_es;
761 regs->r_ds = tp->tf_ds;
762 regs->r_edi = tp->tf_edi;
763 regs->r_esi = tp->tf_esi;
764 regs->r_ebp = tp->tf_ebp;
765 regs->r_ebx = tp->tf_ebx;
766 regs->r_edx = tp->tf_edx;
767 regs->r_ecx = tp->tf_ecx;
768 regs->r_eax = tp->tf_eax;
769 regs->r_eip = tp->tf_eip;
770 regs->r_cs = tp->tf_cs;
771 regs->r_eflags = tp->tf_eflags;
772 regs->r_esp = tp->tf_esp;
773 regs->r_ss = tp->tf_ss;
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774 return (0);
775}
776
777int
778set_regs(struct lwp *lp, struct reg *regs)
779{
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780 struct trapframe *tp;
781
782 tp = lp->lwp_md.md_regs;
783 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
784 !CS_SECURE(regs->r_cs))
785 return (EINVAL);
4e7c41c5 786 tp->tf_gs = regs->r_gs;
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787 tp->tf_fs = regs->r_fs;
788 tp->tf_es = regs->r_es;
789 tp->tf_ds = regs->r_ds;
790 tp->tf_edi = regs->r_edi;
791 tp->tf_esi = regs->r_esi;
792 tp->tf_ebp = regs->r_ebp;
793 tp->tf_ebx = regs->r_ebx;
794 tp->tf_edx = regs->r_edx;
795 tp->tf_ecx = regs->r_ecx;
796 tp->tf_eax = regs->r_eax;
797 tp->tf_eip = regs->r_eip;
798 tp->tf_cs = regs->r_cs;
799 tp->tf_eflags = regs->r_eflags;
800 tp->tf_esp = regs->r_esp;
801 tp->tf_ss = regs->r_ss;
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802 return (0);
803}
804
805#ifndef CPU_DISABLE_SSE
806static void
807fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
808{
809 struct env87 *penv_87 = &sv_87->sv_env;
810 struct envxmm *penv_xmm = &sv_xmm->sv_env;
811 int i;
812
813 /* FPU control/status */
814 penv_87->en_cw = penv_xmm->en_cw;
815 penv_87->en_sw = penv_xmm->en_sw;
816 penv_87->en_tw = penv_xmm->en_tw;
817 penv_87->en_fip = penv_xmm->en_fip;
818 penv_87->en_fcs = penv_xmm->en_fcs;
819 penv_87->en_opcode = penv_xmm->en_opcode;
820 penv_87->en_foo = penv_xmm->en_foo;
821 penv_87->en_fos = penv_xmm->en_fos;
822
823 /* FPU registers */
824 for (i = 0; i < 8; ++i)
825 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
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826}
827
828static void
829set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
830{
831 struct env87 *penv_87 = &sv_87->sv_env;
832 struct envxmm *penv_xmm = &sv_xmm->sv_env;
833 int i;
834
835 /* FPU control/status */
836 penv_xmm->en_cw = penv_87->en_cw;
837 penv_xmm->en_sw = penv_87->en_sw;
838 penv_xmm->en_tw = penv_87->en_tw;
839 penv_xmm->en_fip = penv_87->en_fip;
840 penv_xmm->en_fcs = penv_87->en_fcs;
841 penv_xmm->en_opcode = penv_87->en_opcode;
842 penv_xmm->en_foo = penv_87->en_foo;
843 penv_xmm->en_fos = penv_87->en_fos;
844
845 /* FPU registers */
846 for (i = 0; i < 8; ++i)
847 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
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848}
849#endif /* CPU_DISABLE_SSE */
850
851int
852fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
853{
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854 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
855 return EINVAL;
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856#ifndef CPU_DISABLE_SSE
857 if (cpu_fxsr) {
858 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
859 (struct save87 *)fpregs);
860 return (0);
861 }
862#endif /* CPU_DISABLE_SSE */
863 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
864 return (0);
865}
866
867int
868set_fpregs(struct lwp *lp, struct fpreg *fpregs)
869{
870#ifndef CPU_DISABLE_SSE
871 if (cpu_fxsr) {
872 set_fpregs_xmm((struct save87 *)fpregs,
873 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
874 return (0);
875 }
876#endif /* CPU_DISABLE_SSE */
877 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
878 return (0);
879}
880
881int
882fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
883{
956a62ec 884 return (ENOSYS);
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885}
886
887int
888set_dbregs(struct lwp *lp, struct dbreg *dbregs)
889{
956a62ec 890 return (ENOSYS);
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891}
892
893#if 0
894/*
895 * Return > 0 if a hardware breakpoint has been hit, and the
896 * breakpoint was in user space. Return 0, otherwise.
897 */
898int
899user_dbreg_trap(void)
900{
901 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
902 u_int32_t bp; /* breakpoint bits extracted from dr6 */
903 int nbp; /* number of breakpoints that triggered */
904 caddr_t addr[4]; /* breakpoint addresses */
905 int i;
906
907 dr7 = rdr7();
908 if ((dr7 & 0x000000ff) == 0) {
909 /*
910 * all GE and LE bits in the dr7 register are zero,
911 * thus the trap couldn't have been caused by the
912 * hardware debug registers
913 */
914 return 0;
915 }
916
917 nbp = 0;
918 dr6 = rdr6();
919 bp = dr6 & 0x0000000f;
920
921 if (!bp) {
922 /*
923 * None of the breakpoint bits are set meaning this
924 * trap was not caused by any of the debug registers
925 */
926 return 0;
927 }
928
929 /*
930 * at least one of the breakpoints were hit, check to see
931 * which ones and if any of them are user space addresses
932 */
933
934 if (bp & 0x01) {
935 addr[nbp++] = (caddr_t)rdr0();
936 }
937 if (bp & 0x02) {
938 addr[nbp++] = (caddr_t)rdr1();
939 }
940 if (bp & 0x04) {
941 addr[nbp++] = (caddr_t)rdr2();
942 }
943 if (bp & 0x08) {
944 addr[nbp++] = (caddr_t)rdr3();
945 }
946
947 for (i=0; i<nbp; i++) {
948 if (addr[i] <
949 (caddr_t)VM_MAX_USER_ADDRESS) {
950 /*
951 * addr[i] is in user space
952 */
953 return nbp;
954 }
955 }
956
957 /*
958 * None of the breakpoints are in user space.
959 */
960 return 0;
961}
962
963#endif
964
514621ec
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965void
966identcpu(void)
967{
968 int regs[4];
969
970 do_cpuid(1, regs);
971 cpu_feature = regs[3];
972}
973
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974
975#ifndef DDB
976void
977Debugger(const char *msg)
978{
979 kprintf("Debugger(\"%s\") called.\n", msg);
980}
981#endif /* no DDB */
982