LINT build test. Aggregated source code adjustments to bring most of the
[dragonfly.git] / sys / dev / misc / tw / tw.c
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1/*-
2 * Copyright (c) 1992, 1993, 1995 Eugene W. Stark
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Eugene W. Stark.
16 * 4. The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY EUGENE W. STARK (THE AUTHOR) ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
23 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 *
31 * $FreeBSD: src/sys/i386/isa/tw.c,v 1.38 2000/01/29 16:00:32 peter Exp $
7b95be2a 32 * $DragonFly: src/sys/dev/misc/tw/tw.c,v 1.5 2003/07/21 07:57:45 dillon Exp $
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33 *
34 */
35
36#include "tw.h"
37
38/*
39 * Driver configuration parameters
40 */
41
42/*
43 * Time for 1/2 of a power line cycle, in microseconds.
44 * Change this to 10000 for 50Hz power. Phil Sampson
45 * (vk2jnt@gw.vk2jnt.ampr.org OR sampson@gidday.enet.dec.com)
46 * reports that this works (at least in Australia) using a
47 * TW7223 module (a local version of the TW523).
48 */
49#define HALFCYCLE 8333 /* 1/2 cycle = 8333us at 60Hz */
50
51/*
52 * Undefine the following if you don't have the high-resolution "microtime"
53 * routines (leave defined for FreeBSD, which has them).
54 */
55#define HIRESTIME
56
57/*
58 * End of driver configuration parameters
59 */
60
61/*
62 * FreeBSD Device Driver for X-10 POWERHOUSE (tm)
63 * Two-Way Power Line Interface, Model #TW523
64 *
65 * written by Eugene W. Stark (stark@cs.sunysb.edu)
66 * December 2, 1992
67 *
68 * NOTES:
69 *
70 * The TW523 is a carrier-current modem for home control/automation purposes.
71 * It is made by:
72 *
73 * X-10 Inc.
74 * 185A LeGrand Ave.
75 * Northvale, NJ 07647
76 * USA
77 * (201) 784-9700 or 1-800-526-0027
78 *
79 * X-10 Home Controls Inc.
80 * 1200 Aerowood Drive, Unit 20
81 * Mississauga, Ontario
82 * (416) 624-4446 or 1-800-387-3346
83 *
84 * The TW523 is designed for communications using the X-10 protocol,
85 * which is compatible with a number of home control systems, including
86 * Radio Shack "Plug 'n Power(tm)" and Stanley "Lightmaker(tm)."
87 * I bought my TW523 from:
88 *
89 * Home Control Concepts
90 * 9353-C Activity Road
91 * San Diego, CA 92126
92 * (619) 693-8887
93 *
94 * They supplied me with the TW523 (which has an RJ-11 four-wire modular
95 * telephone connector), a modular cable, an RJ-11 to DB-25 connector with
96 * internal wiring, documentation from X-10 on the TW523 (very good),
97 * an instruction manual by Home Control Concepts (not very informative),
98 * and a floppy disk containing binary object code of some demonstration/test
99 * programs and of a C function library suitable for controlling the TW523
100 * by an IBM PC under MS-DOS (not useful to me other than to verify that
101 * the unit worked). I suggest saving money and buying the bare TW523
102 * rather than the TW523 development kit (what I bought), because if you
103 * are running FreeBSD you don't really care about the DOS binaries.
104 *
105 * The interface to the TW-523 consists of four wires on the RJ-11 connector,
106 * which are jumpered to somewhat more wires on the DB-25 connector, which
107 * in turn is intended to plug into the PC parallel printer port. I dismantled
108 * the DB-25 connector to find out what they had done:
109 *
110 * Signal RJ-11 pin DB-25 pin(s) Parallel Port
111 * Transmit TX 4 (Y) 2, 4, 6, 8 Data out
112 * Receive RX 3 (G) 10, 14 -ACK, -AutoFeed
113 * Common 2 (R) 25 Common
114 * Zero crossing 1 (B) 17 or 12 -Select or +PaperEnd
115 *
116 * NOTE: In the original cable I have (which I am still using, May, 1997)
117 * the Zero crossing signal goes to pin 17 (-Select) on the parallel port.
118 * In retrospect, this doesn't make a whole lot of sense, given that the
119 * -Select signal propagates the other direction. Indeed, some people have
120 * reported problems with this, and have had success using pin 12 (+PaperEnd)
121 * instead. This driver searches for the zero crossing signal on either
122 * pin 17 or pin 12, so it should work with either cable configuration.
123 * My suggestion would be to start by making the cable so that the zero
124 * crossing signal goes to pin 12 on the parallel port.
125 *
126 * The zero crossing signal is used to synchronize transmission to the
127 * zero crossings of the AC line, as detailed in the X-10 documentation.
128 * It would be nice if one could generate interrupts with this signal,
129 * however one needs interrupts on both the rising and falling edges,
130 * and the -ACK signal to the parallel port interrupts only on the falling
131 * edge, so it can't be done without additional hardware.
132 *
133 * In this driver, the transmit function is performed in a non-interrupt-driven
134 * fashion, by polling the zero crossing signal to determine when a transition
135 * has occurred. This wastes CPU time during transmission, but it seems like
136 * the best that can be done without additional hardware. One problem with
137 * the scheme is that preemption of the CPU during transmission can cause loss
138 * of sync. The driver tries to catch this, by noticing that a long delay
139 * loop has somehow become foreshortened, and the transmission is aborted with
140 * an error return. It is up to the user level software to handle this
141 * situation (most likely by retrying the transmission).
142 */
143
144#include <sys/param.h>
145#include <sys/systm.h>
146#include <sys/conf.h>
147#include <sys/kernel.h>
148#include <sys/uio.h>
149#include <sys/syslog.h>
150#include <sys/select.h>
151#include <sys/poll.h>
152#define MIN(a,b) ((a)<(b)?(a):(b))
153
154#ifdef HIRESTIME
155#include <sys/time.h>
156#endif /* HIRESTIME */
157
158#include <i386/isa/isa_device.h>
159
160/*
161 * Transmission is done by calling write() to send three byte packets of data.
162 * The first byte contains a four bit house code (0=A to 15=P).
163 * The second byte contains five bit unit/key code (0=unit 1 to 15=unit 16,
164 * 16=All Units Off to 31 = Status Request). The third byte specifies
165 * the number of times the packet is to be transmitted without any
166 * gaps between successive transmissions. Normally this is 2, as per
167 * the X-10 documentation, but sometimes (e.g. for bright and dim codes)
168 * it can be another value. Each call to write can specify an arbitrary
169 * number of data bytes. An incomplete packet is buffered until a subsequent
170 * call to write() provides data to complete it. At most one packet will
171 * actually be processed in any call to write(). Successive calls to write()
172 * leave a three-cycle gap between transmissions, per the X-10 documentation.
173 *
174 * Reception is done using read().
175 * The driver produces a series of three-character packets.
176 * In each packet, the first character consists of flags,
177 * the second character is a four bit house code (0-15),
178 * and the third character is a five bit key/function code (0-31).
179 * The flags are the following:
180 */
181
182#define TW_RCV_LOCAL 1 /* The packet arrived during a local transmission */
183#define TW_RCV_ERROR 2 /* An invalid/corrupted packet was received */
184
185/*
186 * IBM PC parallel port definitions relevant to TW523
187 */
188
189#define tw_data 0 /* Data to tw523 (R/W) */
190
191#define tw_status 1 /* Status of tw523 (R) */
192#define TWS_RDATA 0x40 /* tw523 receive data */
193#define TWS_OUT 0x20 /* pin 12, out of paper */
194
195#define tw_control 2 /* Control tw523 (R/W) */
196#define TWC_SYNC 0x08 /* tw523 sync (pin 17) */
197#define TWC_ENA 0x10 /* tw523 interrupt enable */
198
199/*
200 * Miscellaneous defines
201 */
202
203#define TWUNIT(dev) (minor(dev)) /* Extract unit number from device */
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204
205static int twprobe(struct isa_device *idp);
206static int twattach(struct isa_device *idp);
207
208struct isa_driver twdriver = {
209 twprobe, twattach, "tw"
210};
211
212static d_open_t twopen;
213static d_close_t twclose;
214static d_read_t twread;
215static d_write_t twwrite;
216static d_poll_t twpoll;
217
218#define CDEV_MAJOR 19
219static struct cdevsw tw_cdevsw = {
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220 /* name */ "tw",
221 /* maj */ CDEV_MAJOR,
222 /* flags */ 0,
223 /* port */ NULL,
224 /* autoq */ 0,
225
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226 /* open */ twopen,
227 /* close */ twclose,
228 /* read */ twread,
229 /* write */ twwrite,
230 /* ioctl */ noioctl,
231 /* poll */ twpoll,
232 /* mmap */ nommap,
233 /* strategy */ nostrategy,
984263bc 234 /* dump */ nodump,
fabb8ceb 235 /* psize */ nopsize
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236};
237
238/*
239 * Software control structure for TW523
240 */
241
242#define TWS_XMITTING 1 /* Transmission in progress */
243#define TWS_RCVING 2 /* Reception in progress */
244#define TWS_WANT 4 /* A process wants received data */
245#define TWS_OPEN 8 /* Is it currently open? */
246
247#define TW_SIZE 3*60 /* Enough for about 10 sec. of input */
248#define TW_MIN_DELAY 1500 /* Ignore interrupts of lesser latency */
249
250static struct tw_sc {
251 u_int sc_port; /* I/O Port */
252 u_int sc_state; /* Current software control state */
253 struct selinfo sc_selp; /* Information for select() */
254 u_char sc_xphase; /* Current state of sync (for transmitter) */
255 u_char sc_rphase; /* Current state of sync (for receiver) */
256 u_char sc_flags; /* Flags for current reception */
257 short sc_rcount; /* Number of bits received so far */
258 int sc_bits; /* Bits received so far */
259 u_char sc_pkt[3]; /* Packet not yet transmitted */
260 short sc_pktsize; /* How many bytes in the packet? */
261 u_char sc_buf[TW_SIZE]; /* We buffer our own input */
262 int sc_nextin; /* Next free slot in circular buffer */
263 int sc_nextout; /* First used slot in circular buffer */
264 /* Callout for canceling our abortrcv timeout */
265 struct callout_handle abortrcv_ch;
266#ifdef HIRESTIME
267 int sc_xtimes[22]; /* Times for bits in current xmit packet */
268 int sc_rtimes[22]; /* Times for bits in current rcv packet */
269 int sc_no_rcv; /* number of interrupts received */
270#define SC_RCV_TIME_LEN 128
271 int sc_rcv_time[SC_RCV_TIME_LEN]; /* usec time stamp on interrupt */
272#endif /* HIRESTIME */
273} tw_sc[NTW];
274
275static int tw_zcport; /* offset of port for zero crossing signal */
276static int tw_zcmask; /* mask for the zero crossing signal */
277
278static void twdelay25(void);
279static void twdelayn(int n);
280static void twsetuptimes(int *a);
281static int wait_for_zero(struct tw_sc *sc);
282static int twputpkt(struct tw_sc *sc, u_char *p);
283static ointhand2_t twintr;
284static int twgetbytes(struct tw_sc *sc, u_char *p, int cnt);
285static timeout_t twabortrcv;
286static int twsend(struct tw_sc *sc, int h, int k, int cnt);
287static int next_zero(struct tw_sc *sc);
288static int twchecktime(int target, int tol);
289static void twdebugtimes(struct tw_sc *sc);
290
291/*
292 * Counter value for delay loop.
293 * It is adjusted by twprobe so that the delay loop takes about 25us.
294 */
295
296#define TWDELAYCOUNT 161 /* Works on my 486DX/33 */
297static int twdelaycount;
298
299/*
300 * Twdelay25 is used for very short delays of about 25us.
301 * It is implemented with a calibrated delay loop, and should be
302 * fairly accurate ... unless we are preempted by an interrupt.
303 *
304 * We use this to wait for zero crossings because the X-10 specs say we
305 * are supposed to assert carrier within 25us when one happens.
306 * I don't really believe we can do this, but the X-10 devices seem to be
307 * fairly forgiving.
308 */
309
310static void twdelay25(void)
311{
312 int cnt;
313 for(cnt = twdelaycount; cnt; cnt--); /* Should take about 25us */
314}
315
316/*
317 * Twdelayn is used to time the length of the 1ms carrier pulse.
318 * This is not very critical, but if we have high-resolution time-of-day
319 * we check it every apparent 200us to make sure we don't get too far off
320 * if we happen to be interrupted during the delay.
321 */
322
323static void twdelayn(int n)
324{
325#ifdef HIRESTIME
326 int t, d;
327 struct timeval tv;
328 microtime(&tv);
329 t = tv.tv_usec;
330 t += n;
331#endif /* HIRESTIME */
332 while(n > 0) {
333 twdelay25();
334 n -= 25;
335#ifdef HIRESTIME
336 if((n & 0x7) == 0) {
337 microtime(&tv);
338 d = tv.tv_usec - t;
339 if(d >= 0 && d < 1000000) return;
340 }
341#endif /* HIRESTIME */
342 }
343}
344
345static int twprobe(idp)
346 struct isa_device *idp;
347{
348 struct tw_sc sc;
349 int d;
350 int tries;
351 static int once;
352
353 if (!once++)
354 cdevsw_add(&tw_cdevsw);
355 sc.sc_port = idp->id_iobase;
356 /* Search for the zero crossing signal at ports, bit combinations. */
357 tw_zcport = tw_control;
358 tw_zcmask = TWC_SYNC;
359 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
360 if(wait_for_zero(&sc) < 0) {
361 tw_zcport = tw_status;
362 tw_zcmask = TWS_OUT;
363 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
364 }
365 if(wait_for_zero(&sc) < 0)
366 return(0);
367 /*
368 * Iteratively check the timing of a few sync transitions, and adjust
369 * the loop delay counter, if necessary, to bring the timing reported
370 * by wait_for_zero() close to HALFCYCLE. Give up if anything
371 * ridiculous happens.
372 */
373 if(twdelaycount == 0) { /* Only adjust timing for first unit */
374 twdelaycount = TWDELAYCOUNT;
375 for(tries = 0; tries < 10; tries++) {
376 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
377 if(wait_for_zero(&sc) >= 0) {
378 d = wait_for_zero(&sc);
379 if(d <= HALFCYCLE/100 || d >= HALFCYCLE*100) {
380 twdelaycount = 0;
381 return(0);
382 }
383 twdelaycount = (twdelaycount * d)/HALFCYCLE;
384 }
385 }
386 }
387 /*
388 * Now do a final check, just to make sure
389 */
390 sc.sc_xphase = inb(idp->id_iobase + tw_zcport) & tw_zcmask;
391 if(wait_for_zero(&sc) >= 0) {
392 d = wait_for_zero(&sc);
393 if(d <= (HALFCYCLE * 110)/100 && d >= (HALFCYCLE * 90)/100) return(8);
394 }
395 return(0);
396}
397
398static int twattach(idp)
399 struct isa_device *idp;
400{
401 struct tw_sc *sc;
402 int unit;
403
404 idp->id_ointr = twintr;
405 sc = &tw_sc[unit = idp->id_unit];
406 sc->sc_port = idp->id_iobase;
407 sc->sc_state = 0;
408 sc->sc_rcount = 0;
409 callout_handle_init(&sc->abortrcv_ch);
410 make_dev(&tw_cdevsw, unit, 0, 0, 0600, "tw%d", unit);
411 return (1);
412}
413
7b95be2a 414int twopen(dev, flag, mode, td)
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415 dev_t dev;
416 int flag;
417 int mode;
7b95be2a 418 struct thread *td;
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419{
420 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
421 int s;
422
423 s = spltty();
424 if(sc->sc_state == 0) {
425 sc->sc_state = TWS_OPEN;
426 sc->sc_nextin = sc->sc_nextout = 0;
427 sc->sc_pktsize = 0;
428 outb(sc->sc_port+tw_control, TWC_ENA);
429 }
430 splx(s);
431 return(0);
432}
433
7b95be2a 434int twclose(dev, flag, mode, td)
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435 dev_t dev;
436 int flag;
437 int mode;
7b95be2a 438 struct thread *td;
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439{
440 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
441 int s;
442
443 s = spltty();
444 sc->sc_state = 0;
445 outb(sc->sc_port+tw_control, 0);
446 splx(s);
447 return(0);
448}
449
450int twread(dev, uio, ioflag)
451 dev_t dev;
452 struct uio *uio;
453 int ioflag;
454{
455 u_char buf[3];
456 struct tw_sc *sc = &tw_sc[TWUNIT(dev)];
457 int error, cnt, s;
458
459 s = spltty();
460 cnt = MIN(uio->uio_resid, 3);
461 if((error = twgetbytes(sc, buf, cnt)) == 0) {
462 error = uiomove(buf, cnt, uio);
463 }
464 splx(s);
465 return(error);
466}
467
468int twwrite(dev, uio, ioflag)
469 dev_t dev;
470 struct uio *uio;
471 int ioflag;
472{
473 struct tw_sc *sc;
474 int house, key, reps;
475 int s, error;
476 int cnt;
477
478 sc = &tw_sc[TWUNIT(dev)];
479 /*
480 * Note: Although I had intended to allow concurrent transmitters,
481 * there is a potential problem here if two processes both write
482 * into the sc_pkt buffer at the same time. The following code
483 * is an additional critical section that needs to be synchronized.
484 */
485 s = spltty();
486 cnt = MIN(3 - sc->sc_pktsize, uio->uio_resid);
487 error = uiomove(&(sc->sc_pkt[sc->sc_pktsize]), cnt, uio);
488 if(error) {
489 splx(s);
490 return(error);
491 }
492 sc->sc_pktsize += cnt;
493 if(sc->sc_pktsize < 3) { /* Only transmit 3-byte packets */
494 splx(s);
495 return(0);
496 }
497 sc->sc_pktsize = 0;
498 /*
499 * Collect house code, key code, and rep count, and check for sanity.
500 */
501 house = sc->sc_pkt[0];
502 key = sc->sc_pkt[1];
503 reps = sc->sc_pkt[2];
504 if(house >= 16 || key >= 32) {
505 splx(s);
506 return(ENODEV);
507 }
508 /*
509 * Synchronize with the receiver operating in the bottom half, and
510 * also with concurrent transmitters.
511 * We don't want to interfere with a packet currently being received,
512 * and we would like the receiver to recognize when a packet has
513 * originated locally.
514 */
515 while(sc->sc_state & (TWS_RCVING | TWS_XMITTING)) {
377d4740 516 error = tsleep((caddr_t)sc, PCATCH, "twwrite", 0);
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517 if(error) {
518 splx(s);
519 return(error);
520 }
521 }
522 sc->sc_state |= TWS_XMITTING;
523 /*
524 * Everything looks OK, let's do the transmission.
525 */
526 splx(s); /* Enable interrupts because this takes a LONG time */
527 error = twsend(sc, house, key, reps);
528 s = spltty();
529 sc->sc_state &= ~TWS_XMITTING;
530 wakeup((caddr_t)sc);
531 splx(s);
532 if(error) return(EIO);
533 else return(0);
534}
535
536/*
537 * Determine if there is data available for reading
538 */
539
7b95be2a 540int twpoll(dev, events, td)
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541 dev_t dev;
542 int events;
7b95be2a 543 struct thread *td;
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544{
545 struct tw_sc *sc;
546 int s;
547 int revents = 0;
548
549 sc = &tw_sc[TWUNIT(dev)];
550 s = spltty();
551 /* XXX is this correct? the original code didn't test select rw mode!! */
552 if (events & (POLLIN | POLLRDNORM)) {
553 if(sc->sc_nextin != sc->sc_nextout)
554 revents |= events & (POLLIN | POLLRDNORM);
555 else
7b95be2a 556 selrecord(td, &sc->sc_selp);
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557 }
558 splx(s);
559 return(revents);
560}
561
562/*
563 * X-10 Protocol
564 */
565
566#define X10_START_LENGTH 4
567static char X10_START[] = { 1, 1, 1, 0 };
568
569/*
570 * Each bit of the 4-bit house code and 5-bit key code
571 * is transmitted twice, once in true form, and then in
572 * complemented form. This is already taken into account
573 * in the following tables.
574 */
575
576#define X10_HOUSE_LENGTH 8
577static char X10_HOUSE[16][8] = {
578 0, 1, 1, 0, 1, 0, 0, 1, /* A = 0110 */
579 1, 0, 1, 0, 1, 0, 0, 1, /* B = 1110 */
580 0, 1, 0, 1, 1, 0, 0, 1, /* C = 0010 */
581 1, 0, 0, 1, 1, 0, 0, 1, /* D = 1010 */
582 0, 1, 0, 1, 0, 1, 1, 0, /* E = 0001 */
583 1, 0, 0, 1, 0, 1, 1, 0, /* F = 1001 */
584 0, 1, 1, 0, 0, 1, 1, 0, /* G = 0101 */
585 1, 0, 1, 0, 0, 1, 1, 0, /* H = 1101 */
586 0, 1, 1, 0, 1, 0, 1, 0, /* I = 0111 */
587 1, 0, 1, 0, 1, 0, 1, 0, /* J = 1111 */
588 0, 1, 0, 1, 1, 0, 1, 0, /* K = 0011 */
589 1, 0, 0, 1, 1, 0, 1, 0, /* L = 1011 */
590 0, 1, 0, 1, 0, 1, 0, 1, /* M = 0000 */
591 1, 0, 0, 1, 0, 1, 0, 1, /* N = 1000 */
592 0, 1, 1, 0, 0, 1, 0, 1, /* O = 0100 */
593 1, 0, 1, 0, 0, 1, 0, 1 /* P = 1100 */
594};
595
596#define X10_KEY_LENGTH 10
597static char X10_KEY[32][10] = {
598 0, 1, 1, 0, 1, 0, 0, 1, 0, 1, /* 01100 => 1 */
599 1, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 11100 => 2 */
600 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, /* 00100 => 3 */
601 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, /* 10100 => 4 */
602 0, 1, 0, 1, 0, 1, 1, 0, 0, 1, /* 00010 => 5 */
603 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, /* 10010 => 6 */
604 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, /* 01010 => 7 */
605 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, /* 11010 => 8 */
606 0, 1, 1, 0, 1, 0, 1, 0, 0, 1, /* 01110 => 9 */
607 1, 0, 1, 0, 1, 0, 1, 0, 0, 1, /* 11110 => 10 */
608 0, 1, 0, 1, 1, 0, 1, 0, 0, 1, /* 00110 => 11 */
609 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, /* 10110 => 12 */
610 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, /* 00000 => 13 */
611 1, 0, 0, 1, 0, 1, 0, 1, 0, 1, /* 10000 => 14 */
612 0, 1, 1, 0, 0, 1, 0, 1, 0, 1, /* 01000 => 15 */
613 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, /* 11000 => 16 */
614 0, 1, 0, 1, 0, 1, 0, 1, 1, 0, /* 00001 => All Units Off */
615 0, 1, 0, 1, 0, 1, 1, 0, 1, 0, /* 00011 => All Units On */
616 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, /* 00101 => On */
617 0, 1, 0, 1, 1, 0, 1, 0, 1, 0, /* 00111 => Off */
618 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, /* 01001 => Dim */
619 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, /* 01011 => Bright */
620 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, /* 01101 => All LIGHTS Off */
621 0, 1, 1, 0, 1, 0, 1, 0, 1, 0, /* 01111 => Extended Code */
622 1, 0, 0, 1, 0, 1, 0, 1, 1, 0, /* 10001 => Hail Request */
623 1, 0, 0, 1, 0, 1, 1, 0, 1, 0, /* 10011 => Hail Acknowledge */
624 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, /* 10101 => Preset Dim 0 */
625 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, /* 10111 => Preset Dim 1 */
626 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, /* 11000 => Extended Data (analog) */
627 1, 0, 1, 0, 0, 1, 1, 0, 1, 0, /* 11011 => Status = on */
628 1, 0, 1, 0, 1, 0, 0, 1, 1, 0, /* 11101 => Status = off */
629 1, 0, 1, 0, 1, 0, 1, 0, 1, 0 /* 11111 => Status request */
630};
631
632/*
633 * Tables for mapping received X-10 code back to house/key number.
634 */
635
636static short X10_HOUSE_INV[16] = {
637 12, 4, 2, 10, 14, 6, 0, 8,
638 13, 5, 3, 11, 15, 7, 1, 9
639};
640
641static short X10_KEY_INV[32] = {
642 12, 16, 4, 17, 2, 18, 10, 19,
643 14, 20, 6, 21, 0, 22, 8, 23,
644 13, 24, 5, 25, 3, 26, 11, 27,
645 15, 28, 7, 29, 1, 30, 9, 31
646};
647
648static char *X10_KEY_LABEL[32] = {
649 "1",
650 "2",
651 "3",
652 "4",
653 "5",
654 "6",
655 "7",
656 "8",
657 "9",
658 "10",
659 "11",
660 "12",
661 "13",
662 "14",
663 "15",
664 "16",
665 "All Units Off",
666 "All Units On",
667 "On",
668 "Off",
669 "Dim",
670 "Bright",
671 "All LIGHTS Off",
672 "Extended Code",
673 "Hail Request",
674 "Hail Acknowledge",
675 "Preset Dim 0",
676 "Preset Dim 1",
677 "Extended Data (analog)",
678 "Status = on",
679 "Status = off",
680 "Status request"
681};
682/*
683 * Transmit a packet containing house code h and key code k
684 */
685
686#define TWRETRY 10 /* Try 10 times to sync with AC line */
687
688static int twsend(sc, h, k, cnt)
689struct tw_sc *sc;
690int h, k, cnt;
691{
692 int i;
693 int port = sc->sc_port;
694
695 /*
696 * Make sure we get a reliable sync with a power line zero crossing
697 */
698 for(i = 0; i < TWRETRY; i++) {
699 if(wait_for_zero(sc) > 100) goto insync;
700 }
701 log(LOG_ERR, "TWXMIT: failed to sync.\n");
702 return(-1);
703
704 insync:
705 /*
706 * Be sure to leave 3 cycles space between transmissions
707 */
708 for(i = 6; i > 0; i--)
709 if(next_zero(sc) < 0) return(-1);
710 /*
711 * The packet is transmitted cnt times, with no gaps.
712 */
713 while(cnt--) {
714 /*
715 * Transmit the start code
716 */
717 for(i = 0; i < X10_START_LENGTH; i++) {
718 outb(port+tw_data, X10_START[i] ? 0xff : 0x00); /* Waste no time! */
719#ifdef HIRESTIME
720 if(i == 0) twsetuptimes(sc->sc_xtimes);
721 if(twchecktime(sc->sc_xtimes[i], HALFCYCLE/20) == 0) {
722 outb(port+tw_data, 0);
723 return(-1);
724 }
725#endif /* HIRESTIME */
726 twdelayn(1000); /* 1ms pulse width */
727 outb(port+tw_data, 0);
728 if(next_zero(sc) < 0) return(-1);
729 }
730 /*
731 * Transmit the house code
732 */
733 for(i = 0; i < X10_HOUSE_LENGTH; i++) {
734 outb(port+tw_data, X10_HOUSE[h][i] ? 0xff : 0x00); /* Waste no time! */
735#ifdef HIRESTIME
736 if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH], HALFCYCLE/20) == 0) {
737 outb(port+tw_data, 0);
738 return(-1);
739 }
740#endif /* HIRESTIME */
741 twdelayn(1000); /* 1ms pulse width */
742 outb(port+tw_data, 0);
743 if(next_zero(sc) < 0) return(-1);
744 }
745 /*
746 * Transmit the unit/key code
747 */
748 for(i = 0; i < X10_KEY_LENGTH; i++) {
749 outb(port+tw_data, X10_KEY[k][i] ? 0xff : 0x00);
750#ifdef HIRESTIME
751 if(twchecktime(sc->sc_xtimes[i+X10_START_LENGTH+X10_HOUSE_LENGTH],
752 HALFCYCLE/20) == 0) {
753 outb(port+tw_data, 0);
754 return(-1);
755 }
756#endif /* HIRESTIME */
757 twdelayn(1000); /* 1ms pulse width */
758 outb(port+tw_data, 0);
759 if(next_zero(sc) < 0) return(-1);
760 }
761 }
762 return(0);
763}
764
765/*
766 * Waste CPU cycles to get in sync with a power line zero crossing.
767 * The value returned is roughly how many microseconds we wasted before
768 * seeing the transition. To avoid wasting time forever, we give up after
769 * waiting patiently for 1/4 sec (15 power line cycles at 60 Hz),
770 * which is more than the 11 cycles it takes to transmit a full
771 * X-10 packet.
772 */
773
774static int wait_for_zero(sc)
775struct tw_sc *sc;
776{
777 int i, old, new, max;
778 int port = sc->sc_port + tw_zcport;
779
780 old = sc->sc_xphase;
781 max = 10000; /* 10000 * 25us = 0.25 sec */
782 i = 0;
783 while(max--) {
784 new = inb(port) & tw_zcmask;
785 if(new != old) {
786 sc->sc_xphase = new;
787 return(i*25);
788 }
789 i++;
790 twdelay25();
791 }
792 return(-1);
793}
794
795/*
796 * Wait for the next zero crossing transition, and if we don't have
797 * high-resolution time-of-day, check to see that the zero crossing
798 * appears to be arriving on schedule.
799 * We expect to be waiting almost a full half-cycle (8.333ms-1ms = 7.333ms).
800 * If we don't seem to wait very long, something is wrong (like we got
801 * preempted!) and we should abort the transmission because
802 * there's no telling how long it's really been since the
803 * last bit was transmitted.
804 */
805
806static int next_zero(sc)
807struct tw_sc *sc;
808{
809 int d;
810#ifdef HIRESTIME
811 if((d = wait_for_zero(sc)) < 0) {
812#else
813 if((d = wait_for_zero(sc)) < 6000 || d > 8500) {
814 /* No less than 6.0ms, no more than 8.5ms */
815#endif /* HIRESTIME */
816 log(LOG_ERR, "TWXMIT framing error: %d\n", d);
817 return(-1);
818 }
819 return(0);
820}
821
822/*
823 * Put a three-byte packet into the circular buffer
824 * Should be called at priority spltty()
825 */
826
827static int twputpkt(sc, p)
828struct tw_sc *sc;
829u_char *p;
830{
831 int i, next;
832
833 for(i = 0; i < 3; i++) {
834 next = sc->sc_nextin+1;
835 if(next >= TW_SIZE) next = 0;
836 if(next == sc->sc_nextout) { /* Buffer full */
837/*
838 log(LOG_ERR, "TWRCV: Buffer overrun\n");
839 */
840 return(1);
841 }
842 sc->sc_buf[sc->sc_nextin] = *p++;
843 sc->sc_nextin = next;
844 }
845 if(sc->sc_state & TWS_WANT) {
846 sc->sc_state &= ~TWS_WANT;
847 wakeup((caddr_t)(&sc->sc_buf));
848 }
849 selwakeup(&sc->sc_selp);
850 return(0);
851}
852
853/*
854 * Get bytes from the circular buffer
855 * Should be called at priority spltty()
856 */
857
858static int twgetbytes(sc, p, cnt)
859struct tw_sc *sc;
860u_char *p;
861int cnt;
862{
863 int error;
864
865 while(cnt--) {
866 while(sc->sc_nextin == sc->sc_nextout) { /* Buffer empty */
867 sc->sc_state |= TWS_WANT;
377d4740 868 error = tsleep((caddr_t)(&sc->sc_buf), PCATCH, "twread", 0);
984263bc
MD
869 if(error) {
870 return(error);
871 }
872 }
873 *p++ = sc->sc_buf[sc->sc_nextout++];
874 if(sc->sc_nextout >= TW_SIZE) sc->sc_nextout = 0;
875 }
876 return(0);
877}
878
879/*
880 * Abort reception that has failed to complete in the required time.
881 */
882
883static void
884twabortrcv(arg)
885 void *arg;
886{
887 struct tw_sc *sc = arg;
888 int s;
889 u_char pkt[3];
890
891 s = spltty();
892 sc->sc_state &= ~TWS_RCVING;
893 /* simply ignore single isolated interrupts. */
894 if (sc->sc_no_rcv > 1) {
895 sc->sc_flags |= TW_RCV_ERROR;
896 pkt[0] = sc->sc_flags;
897 pkt[1] = pkt[2] = 0;
898 twputpkt(sc, pkt);
899 log(LOG_ERR, "TWRCV: aborting (%x, %d)\n", sc->sc_bits, sc->sc_rcount);
900 twdebugtimes(sc);
901 }
902 wakeup((caddr_t)sc);
903 splx(s);
904}
905
906static int
907tw_is_within(int value, int expected, int tolerance)
908{
909 int diff;
910 diff = value - expected;
911 if (diff < 0)
912 diff *= -1;
913 if (diff < tolerance)
914 return 1;
915 return 0;
916}
917
918/*
919 * This routine handles interrupts that occur when there is a falling
920 * transition on the RX input. There isn't going to be a transition
921 * on every bit (some are zero), but if we are smart and keep track of
922 * how long it's been since the last interrupt (via the zero crossing
923 * detect line and/or high-resolution time-of-day routine), we can
924 * reconstruct the transmission without having to poll.
925 */
926
927static void twintr(unit)
928int unit;
929{
930 struct tw_sc *sc = &tw_sc[unit];
931 int port;
932 int newphase;
933 u_char pkt[3];
934 int delay = 0;
935 struct timeval tv;
936
937 port = sc->sc_port;
938 /*
939 * Ignore any interrupts that occur if the device is not open.
940 */
941 if(sc->sc_state == 0) return;
942 newphase = inb(port + tw_zcport) & tw_zcmask;
943 microtime(&tv);
944
945 /*
946 * NEW PACKET:
947 * If we aren't currently receiving a packet, set up a new packet
948 * and put in the first "1" bit that has just arrived.
949 * Arrange for the reception to be aborted if too much time goes by.
950 */
951 if((sc->sc_state & TWS_RCVING) == 0) {
952#ifdef HIRESTIME
953 twsetuptimes(sc->sc_rtimes);
954#endif /* HIRESTIME */
955 sc->sc_state |= TWS_RCVING;
956 sc->sc_rcount = 1;
957 if(sc->sc_state & TWS_XMITTING) sc->sc_flags = TW_RCV_LOCAL;
958 else sc->sc_flags = 0;
959 sc->sc_bits = 0;
960 sc->sc_rphase = newphase;
961 /* 3 cycles of silence = 3/60 = 1/20 = 50 msec */
962 sc->abortrcv_ch = timeout(twabortrcv, (caddr_t)sc, hz/20);
963 sc->sc_rcv_time[0] = tv.tv_usec;
964 sc->sc_no_rcv = 1;
965 return;
966 }
967 untimeout(twabortrcv, (caddr_t)sc, sc->abortrcv_ch);
968 sc->abortrcv_ch = timeout(twabortrcv, (caddr_t)sc, hz/20);
969 newphase = inb(port + tw_zcport) & tw_zcmask;
970
971 /* enforce a minimum delay since the last interrupt */
972 delay = tv.tv_usec - sc->sc_rcv_time[sc->sc_no_rcv - 1];
973 if (delay < 0)
974 delay += 1000000;
975 if (delay < TW_MIN_DELAY)
976 return;
977
978 sc->sc_rcv_time[sc->sc_no_rcv] = tv.tv_usec;
979 if (sc->sc_rcv_time[sc->sc_no_rcv] < sc->sc_rcv_time[0])
980 sc->sc_rcv_time[sc->sc_no_rcv] += 1000000;
981 sc->sc_no_rcv++;
982
983 /*
984 * START CODE:
985 * The second and third bits are a special case.
986 */
987 if (sc->sc_rcount < 3) {
988 if (
989#ifdef HIRESTIME
990 tw_is_within(delay, HALFCYCLE, HALFCYCLE / 6)
991#else
992 newphase != sc->sc_rphase
993#endif
994 ) {
995 sc->sc_rcount++;
996 } else {
997 /*
998 * Invalid start code -- abort reception.
999 */
1000 sc->sc_state &= ~TWS_RCVING;
1001 sc->sc_flags |= TW_RCV_ERROR;
1002 untimeout(twabortrcv, (caddr_t)sc, sc->abortrcv_ch);
1003 log(LOG_ERR, "TWRCV: Invalid start code\n");
1004 twdebugtimes(sc);
1005 sc->sc_no_rcv = 0;
1006 return;
1007 }
1008 if(sc->sc_rcount == 3) {
1009 /*
1010 * We've gotten three "1" bits in a row. The start code
1011 * is really 1110, but this might be followed by a zero
1012 * bit from the house code, so if we wait any longer we
1013 * might be confused about the first house code bit.
1014 * So, we guess that the start code is correct and insert
1015 * the trailing zero without actually having seen it.
1016 * We don't change sc_rphase in this case, because two
1017 * bit arrivals in a row preserve parity.
1018 */
1019 sc->sc_rcount++;
1020 return;
1021 }
1022 /*
1023 * Update sc_rphase to the current phase before returning.
1024 */
1025 sc->sc_rphase = newphase;
1026 return;
1027 }
1028 /*
1029 * GENERAL CASE:
1030 * Now figure out what the current bit is that just arrived.
1031 * The X-10 protocol transmits each data bit twice: once in
1032 * true form and once in complemented form on the next half
1033 * cycle. So, there will be at least one interrupt per bit.
1034 * By comparing the phase we see at the time of the interrupt
1035 * with the saved sc_rphase, we can tell on which half cycle
1036 * the interrupt occrred. This assumes, of course, that the
1037 * packet is well-formed. We do the best we can at trying to
1038 * catch errors by aborting if too much time has gone by, and
1039 * by tossing out a packet if too many bits arrive, but the
1040 * whole scheme is probably not as robust as if we had a nice
1041 * interrupt on every half cycle of the power line.
1042 * If we have high-resolution time-of-day routines, then we
1043 * can do a bit more sanity checking.
1044 */
1045
1046 /*
1047 * A complete packet is 22 half cycles.
1048 */
1049 if(sc->sc_rcount <= 20) {
1050#ifdef HIRESTIME
1051 int bit = 0, last_bit;
1052 if (sc->sc_rcount == 4)
1053 last_bit = 1; /* Start (1110) ends in 10, a 'one' code. */
1054 else
1055 last_bit = sc->sc_bits & 0x1;
1056 if ( ( (last_bit == 1)
1057 && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6)))
1058 || ( (last_bit == 0)
1059 && (tw_is_within(delay, HALFCYCLE * 1, HALFCYCLE / 6))))
1060 bit = 1;
1061 else if ( ( (last_bit == 1)
1062 && (tw_is_within(delay, HALFCYCLE * 3, HALFCYCLE / 6)))
1063 || ( (last_bit == 0)
1064 && (tw_is_within(delay, HALFCYCLE * 2, HALFCYCLE / 6))))
1065 bit = 0;
1066 else {
1067 sc->sc_flags |= TW_RCV_ERROR;
1068 log(LOG_ERR, "TWRCV: %d cycle after %d bit, delay %d%%\n",
1069 sc->sc_rcount, last_bit, 100 * delay / HALFCYCLE);
1070 }
1071 sc->sc_bits = (sc->sc_bits << 1) | bit;
1072#else
1073 sc->sc_bits = (sc->sc_bits << 1)
1074 | ((newphase == sc->sc_rphase) ? 0x0 : 0x1);
1075#endif /* HIRESTIME */
1076 sc->sc_rcount += 2;
1077 }
1078 if(sc->sc_rcount >= 22 || sc->sc_flags & TW_RCV_ERROR) {
1079 if(sc->sc_rcount != 22) {
1080 sc->sc_flags |= TW_RCV_ERROR;
1081 pkt[0] = sc->sc_flags;
1082 pkt[1] = pkt[2] = 0;
1083 } else {
1084 pkt[0] = sc->sc_flags;
1085 pkt[1] = X10_HOUSE_INV[(sc->sc_bits & 0x1e0) >> 5];
1086 pkt[2] = X10_KEY_INV[sc->sc_bits & 0x1f];
1087 }
1088 sc->sc_state &= ~TWS_RCVING;
1089 twputpkt(sc, pkt);
1090 untimeout(twabortrcv, (caddr_t)sc, sc->abortrcv_ch);
1091 if(sc->sc_flags & TW_RCV_ERROR) {
1092 log(LOG_ERR, "TWRCV: invalid packet: (%d, %x) %c %s\n",
1093 sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]);
1094 twdebugtimes(sc);
1095 } else {
1096/* log(LOG_ERR, "TWRCV: valid packet: (%d, %x) %c %s\n",
1097 sc->sc_rcount, sc->sc_bits, 'A' + pkt[1], X10_KEY_LABEL[pkt[2]]); */
1098 }
1099 sc->sc_rcount = 0;
1100 wakeup((caddr_t)sc);
1101 }
1102}
1103
1104static void twdebugtimes(struct tw_sc *sc)
1105{
1106 int i;
1107 for (i = 0; (i < sc->sc_no_rcv) && (i < SC_RCV_TIME_LEN); i++)
1108 log(LOG_ERR, "TWRCV: interrupt %2d: %d\t%d%%\n", i, sc->sc_rcv_time[i],
1109 (sc->sc_rcv_time[i] - sc->sc_rcv_time[(i?i-1:0)])*100/HALFCYCLE);
1110}
1111
1112#ifdef HIRESTIME
1113/*
1114 * Initialize an array of 22 times, starting from the current
1115 * microtime and continuing for the next 21 half cycles.
1116 * We use the times as a reference to make sure transmission
1117 * or reception is on schedule.
1118 */
1119
1120static void twsetuptimes(int *a)
1121{
1122 struct timeval tv;
1123 int i, t;
1124
1125 microtime(&tv);
1126 t = tv.tv_usec;
1127 for(i = 0; i < 22; i++) {
1128 *a++ = t;
1129 t += HALFCYCLE;
1130 if(t >= 1000000) t -= 1000000;
1131 }
1132}
1133
1134/*
1135 * Check the current time against a slot in a previously set up
1136 * timing array, and make sure that it looks like we are still
1137 * on schedule.
1138 */
1139
1140static int twchecktime(int target, int tol)
1141{
1142 struct timeval tv;
1143 int t, d;
1144
1145 microtime(&tv);
1146 t = tv.tv_usec;
1147 d = (target - t) >= 0 ? (target - t) : (t - target);
1148 if(d > 500000) d = 1000000-d;
1149 if(d <= tol && d >= -tol) {
1150 return(1);
1151 } else {
1152 return(0);
1153 }
1154}
1155#endif /* HIRESTIME */