Move sys/buf2.h and sys/thread2.h into the #ifdef _KERNEL section.
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
41d6c56f 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.25 2005/06/06 16:32:28 joerg Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
41d6c56f 103#include <sys/thread2.h>
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104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
108#include <machine/bus.h>
109#include <sys/rman.h>
110#include <machine/resource.h>
111#include <sys/malloc.h>
112
113#include <net/if.h>
38de8487 114#include <net/ifq_var.h>
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115#include <net/if_arp.h>
116#include <net/ethernet.h>
117#include <net/if_dl.h>
118#include <net/if_types.h>
984263bc 119#include <net/if_media.h>
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120#include <netproto/802_11/ieee80211.h>
121#include <netproto/802_11/ieee80211_ioctl.h>
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122
123#ifdef INET
124#include <netinet/in.h>
125#include <netinet/in_systm.h>
126#include <netinet/in_var.h>
127#include <netinet/ip.h>
128#endif
129
130#include <net/bpf.h>
131
132#include <machine/md_var.h>
133
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134#include "if_aironet_ieee.h"
135#include "if_anreg.h"
984263bc 136
984263bc 137/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 138static void an_reset (struct an_softc *);
1c70eebf 139static int an_init_mpi350_desc (struct an_softc *);
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140static int an_ioctl (struct ifnet *, u_long, caddr_t,
141 struct ucred *);
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142static void an_init (void *);
143static int an_init_tx_ring (struct an_softc *);
144static void an_start (struct ifnet *);
145static void an_watchdog (struct ifnet *);
146static void an_rxeof (struct an_softc *);
147static void an_txeof (struct an_softc *, int);
148
149static void an_promisc (struct an_softc *, int);
150static int an_cmd (struct an_softc *, int, int);
151static int an_cmd_struct (struct an_softc *, struct an_command *,
152 struct an_reply *);
153static int an_read_record (struct an_softc *, struct an_ltv_gen *);
154static int an_write_record (struct an_softc *, struct an_ltv_gen *);
155static int an_read_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_write_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_seek (struct an_softc *, int, int, int);
160static int an_alloc_nicmem (struct an_softc *, int, int *);
161static int an_dma_malloc (struct an_softc *, bus_size_t,
162 struct an_dma_alloc *, int);
163static void an_dma_free (struct an_softc *,
164 struct an_dma_alloc *);
165static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
166static void an_stats_update (void *);
167static void an_setdef (struct an_softc *, struct an_req *);
984263bc 168#ifdef ANCACHE
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169static void an_cache_store (struct an_softc *, struct mbuf *,
170 uint8_t, uint8_t);
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171#endif
172
173/* function definitions for use with the Cisco's Linux configuration
174 utilities
175*/
176
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177static int readrids (struct ifnet*, struct aironet_ioctl*);
178static int writerids (struct ifnet*, struct aironet_ioctl*);
179static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 180
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181static int cmdreset (struct ifnet *);
182static int setflashmode (struct ifnet *);
183static int flashgchar (struct ifnet *,int,int);
184static int flashpchar (struct ifnet *,int,int);
185static int flashputbuf (struct ifnet *);
186static int flashrestart (struct ifnet *);
187static int WaitBusy (struct ifnet *, int);
188static int unstickbusy (struct ifnet *);
984263bc 189
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190static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
191 char *);
984263bc 192
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193static int an_media_change (struct ifnet *);
194static void an_media_status (struct ifnet *, struct ifmediareq *);
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195
196static int an_dump = 0;
197static int an_cache_mode = 0;
198
199#define DBM 0
200#define PERCENT 1
201#define RAW 2
202
203static char an_conf[256];
204static char an_conf_cache[256];
205
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206DECLARE_DUMMY_MODULE(if_an);
207
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208/* sysctl vars */
209
210SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
211
212static int
213sysctl_an_dump(SYSCTL_HANDLER_ARGS)
214{
215 int error, r, last;
216 char *s = an_conf;
217
218 last = an_dump;
219
220 switch (an_dump) {
221 case 0:
222 strcpy(an_conf, "off");
223 break;
224 case 1:
225 strcpy(an_conf, "type");
226 break;
227 case 2:
228 strcpy(an_conf, "dump");
229 break;
230 default:
231 snprintf(an_conf, 5, "%x", an_dump);
232 break;
233 }
234
235 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
236
237 if (strncmp(an_conf,"off", 3) == 0) {
238 an_dump = 0;
239 }
240 if (strncmp(an_conf,"dump", 4) == 0) {
241 an_dump = 1;
242 }
243 if (strncmp(an_conf,"type", 4) == 0) {
244 an_dump = 2;
245 }
246 if (*s == 'f') {
247 r = 0;
248 for (;;s++) {
249 if ((*s >= '0') && (*s <= '9')) {
250 r = r * 16 + (*s - '0');
251 } else if ((*s >= 'a') && (*s <= 'f')) {
252 r = r * 16 + (*s - 'a' + 10);
253 } else {
254 break;
255 }
256 }
257 an_dump = r;
258 }
259 if (an_dump != last)
260 printf("Sysctl changed for Aironet driver\n");
261
262 return error;
263}
264
265SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
266 0, sizeof(an_conf), sysctl_an_dump, "A", "");
267
268static int
269sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
270{
271 int error, last;
272
273 last = an_cache_mode;
274
275 switch (an_cache_mode) {
276 case 1:
277 strcpy(an_conf_cache, "per");
278 break;
279 case 2:
280 strcpy(an_conf_cache, "raw");
281 break;
282 default:
283 strcpy(an_conf_cache, "dbm");
284 break;
285 }
286
287 error = sysctl_handle_string(oidp, an_conf_cache,
288 sizeof(an_conf_cache), req);
289
290 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
291 an_cache_mode = 0;
292 }
293 if (strncmp(an_conf_cache,"per", 3) == 0) {
294 an_cache_mode = 1;
295 }
296 if (strncmp(an_conf_cache,"raw", 3) == 0) {
297 an_cache_mode = 2;
298 }
299
300 return error;
301}
302
303SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
304 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
305
306/*
307 * We probe for an Aironet 4500/4800 card by attempting to
308 * read the default SSID list. On reset, the first entry in
309 * the SSID list will contain the name "tsunami." If we don't
310 * find this, then there's no card present.
311 */
312int
313an_probe(dev)
314 device_t dev;
315{
316 struct an_softc *sc = device_get_softc(dev);
317 struct an_ltv_ssidlist ssid;
318 int error;
319
320 bzero((char *)&ssid, sizeof(ssid));
321
322 error = an_alloc_port(dev, 0, AN_IOSIZ);
323 if (error != 0)
324 return (0);
325
326 /* can't do autoprobing */
327 if (rman_get_start(sc->port_res) == -1)
328 return(0);
329
330 /*
331 * We need to fake up a softc structure long enough
332 * to be able to issue commands and call some of the
333 * other routines.
334 */
335 sc->an_bhandle = rman_get_bushandle(sc->port_res);
336 sc->an_btag = rman_get_bustag(sc->port_res);
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337
338 ssid.an_len = sizeof(ssid);
339 ssid.an_type = AN_RID_SSIDLIST;
340
341 /* Make sure interrupts are disabled. */
342 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
343 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
344
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345 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
346 device_get_unit(dev));
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347 an_reset(sc);
348 /* No need for an_init_mpi350_desc since it will be done in attach */
349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
351 return(0);
352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
354 return(0);
355
356 /* See if the ssid matches what we expect ... but doesn't have to */
357 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
358 return(0);
359
360 return(AN_IOSIZ);
361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
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438 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
439 (RF_ACTIVE | flags));
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440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
c45c9d6a 472 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
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473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 477 BUS_DMA_WAITOK, &dma->an_dma_map);
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478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
c45c9d6a 485 mapflags);
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486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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591 if_printf(&sc->arpcom.ac_if,
592 "failed to allocate RX descriptor\n");
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593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
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620 if_printf(&sc->arpcom.ac_if,
621 "failed to allocate TX descriptor\n");
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622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
650 if_printf(&sc->arpcom.ac_if,
651 "failed to allocate host descriptor\n");
984263bc
MD
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
1c70eebf 669an_attach(sc, dev, flags)
984263bc 670 struct an_softc *sc;
1c70eebf 671 device_t dev;
984263bc
MD
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
984263bc
MD
678 sc->an_associated = 0;
679 sc->an_monitor = 0;
680 sc->an_was_monitor = 0;
681 sc->an_flash_buffer = NULL;
682
1c70eebf
JS
683 ifp->if_softc = sc;
684 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
685
984263bc
MD
686 /* Reset the NIC. */
687 an_reset(sc);
688 if (sc->mpi350) {
689 error = an_init_mpi350_desc(sc);
690 if (error)
691 return(error);
692 }
693
694 /* Load factory config */
695 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 696 device_printf(dev, "failed to load config data\n");
984263bc
MD
697 return(EIO);
698 }
699
700 /* Read the current configuration */
701 sc->an_config.an_type = AN_RID_GENCONFIG;
702 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
703 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 704 device_printf(dev, "read record failed\n");
984263bc
MD
705 return(EIO);
706 }
707
708 /* Read the card capabilities */
709 sc->an_caps.an_type = AN_RID_CAPABILITIES;
710 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
711 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 712 device_printf(dev, "read record failed\n");
984263bc
MD
713 return(EIO);
714 }
715
716 /* Read ssid list */
717 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
718 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
719 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 720 device_printf(dev, "read record failed\n");
984263bc
MD
721 return(EIO);
722 }
723
724 /* Read AP list */
725 sc->an_aplist.an_type = AN_RID_APLIST;
726 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
727 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 728 device_printf(dev, "read record failed\n");
984263bc
MD
729 return(EIO);
730 }
731
732#ifdef ANCACHE
733 /* Read the RSSI <-> dBm map */
734 sc->an_have_rssimap = 0;
735 if (sc->an_caps.an_softcaps & 8) {
736 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
737 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
738 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 739 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 740 } else {
1c70eebf 741 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
742 sc->an_have_rssimap = 1;
743 }
744 } else {
1c70eebf 745 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
746 }
747#endif
748
984263bc
MD
749 ifp->if_mtu = ETHERMTU;
750 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
751 ifp->if_ioctl = an_ioctl;
984263bc
MD
752 ifp->if_start = an_start;
753 ifp->if_watchdog = an_watchdog;
754 ifp->if_init = an_init;
755 ifp->if_baudrate = 10000000;
38de8487
JS
756 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
757 ifq_set_ready(&ifp->if_snd);
984263bc
MD
758
759 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
760 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
761 sizeof(AN_DEFAULT_NODENAME) - 1);
762
763 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
764 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
765 sizeof(AN_DEFAULT_NETNAME) - 1);
766 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
767
768 sc->an_config.an_opmode =
769 AN_OPMODE_INFRASTRUCTURE_STATION;
770
771 sc->an_tx_rate = 0;
772 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
773
774 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
775#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
776 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
777 IFM_IEEE80211_ADHOC, 0), 0);
778 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
780 IFM_IEEE80211_ADHOC, 0), 0);
781 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
782 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
784 IFM_IEEE80211_ADHOC, 0), 0);
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
786 }
787 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
788 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
789 IFM_IEEE80211_ADHOC, 0), 0);
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
791 }
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
793 IFM_IEEE80211_ADHOC, 0), 0);
794 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
795#undef ADD
796 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
797 0, 0));
798
799 /*
800 * Call MI attach routine.
801 */
0a8b5977 802 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
MD
803
804 return(0);
805}
806
807static void
808an_rxeof(sc)
809 struct an_softc *sc;
810{
811 struct ifnet *ifp;
812 struct ether_header *eh;
813 struct ieee80211_frame *ih;
814 struct an_rxframe rx_frame;
815 struct an_rxframe_802_3 rx_frame_802_3;
816 struct mbuf *m;
817 int len, id, error = 0, i, count = 0;
818 int ieee80211_header_len;
819 u_char *bpf_buf;
820 u_short fc1;
821 struct an_card_rx_desc an_rx_desc;
822 u_int8_t *buf;
823
824 ifp = &sc->arpcom.ac_if;
825
826 if (!sc->mpi350) {
827 id = CSR_READ_2(sc, AN_RX_FID);
828
829 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
830 /* read raw 802.11 packet */
831 bpf_buf = sc->buf_802_11;
832
833 /* read header */
834 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
835 sizeof(rx_frame))) {
836 ifp->if_ierrors++;
837 return;
838 }
839
840 /*
841 * skip beacon by default since this increases the
842 * system load a lot
843 */
844
845 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
846 (rx_frame.an_frame_ctl &
847 IEEE80211_FC0_SUBTYPE_BEACON)) {
848 return;
849 }
850
851 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
852 len = rx_frame.an_rx_payload_len
853 + sizeof(rx_frame);
854 /* Check for insane frame length */
855 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
856 if_printf(ifp,
857 "oversized packet received "
858 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
859 ifp->if_ierrors++;
860 return;
861 }
862
863 bcopy((char *)&rx_frame,
864 bpf_buf, sizeof(rx_frame));
865
866 error = an_read_data(sc, id, sizeof(rx_frame),
867 (caddr_t)bpf_buf+sizeof(rx_frame),
868 rx_frame.an_rx_payload_len);
869 } else {
870 fc1=rx_frame.an_frame_ctl >> 8;
871 ieee80211_header_len =
872 sizeof(struct ieee80211_frame);
873 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
874 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
875 ieee80211_header_len += ETHER_ADDR_LEN;
876 }
877
878 len = rx_frame.an_rx_payload_len
879 + ieee80211_header_len;
880 /* Check for insane frame length */
881 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
882 if_printf(ifp,
883 "oversized packet received "
884 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
885 ifp->if_ierrors++;
886 return;
887 }
888
889 ih = (struct ieee80211_frame *)bpf_buf;
890
891 bcopy((char *)&rx_frame.an_frame_ctl,
892 (char *)ih, ieee80211_header_len);
893
894 error = an_read_data(sc, id, sizeof(rx_frame) +
895 rx_frame.an_gaplen,
896 (caddr_t)ih +ieee80211_header_len,
897 rx_frame.an_rx_payload_len);
898 }
7600679e 899 BPF_TAP(ifp, bpf_buf, len);
984263bc
MD
900 } else {
901 MGETHDR(m, M_NOWAIT, MT_DATA);
902 if (m == NULL) {
903 ifp->if_ierrors++;
904 return;
905 }
906 MCLGET(m, M_NOWAIT);
907 if (!(m->m_flags & M_EXT)) {
908 m_freem(m);
909 ifp->if_ierrors++;
910 return;
911 }
912 m->m_pkthdr.rcvif = ifp;
913 /* Read Ethernet encapsulated packet */
914
915#ifdef ANCACHE
916 /* Read NIC frame header */
917 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
918 sizeof(rx_frame))) {
919 ifp->if_ierrors++;
920 return;
921 }
922#endif
923 /* Read in the 802_3 frame header */
924 if (an_read_data(sc, id, 0x34,
925 (caddr_t)&rx_frame_802_3,
926 sizeof(rx_frame_802_3))) {
927 ifp->if_ierrors++;
928 return;
929 }
930 if (rx_frame_802_3.an_rx_802_3_status != 0) {
931 ifp->if_ierrors++;
932 return;
933 }
934 /* Check for insane frame length */
935 len = rx_frame_802_3.an_rx_802_3_payload_len;
936 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
937 if_printf(ifp,
938 "oversized packet received (%d, %d)\n",
939 len, MCLBYTES);
984263bc
MD
940 ifp->if_ierrors++;
941 return;
942 }
943 m->m_pkthdr.len = m->m_len =
944 rx_frame_802_3.an_rx_802_3_payload_len + 12;
945
946 eh = mtod(m, struct ether_header *);
947
948 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
949 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
950 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
951 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
952
953 /* in mbuf header type is just before payload */
954 error = an_read_data(sc, id, 0x44,
955 (caddr_t)&(eh->ether_type),
956 rx_frame_802_3.an_rx_802_3_payload_len);
957
958 if (error) {
959 m_freem(m);
960 ifp->if_ierrors++;
961 return;
962 }
963 ifp->if_ipackets++;
964
984263bc 965#ifdef ANCACHE
3013ac0e 966 an_cache_store(sc, m,
984263bc
MD
967 rx_frame.an_rx_signal_strength,
968 rx_frame.an_rsvd0);
969#endif
3013ac0e 970 (*ifp->if_input)(ifp, m);
984263bc
MD
971 }
972
973 } else { /* MPI-350 */
974 for (count = 0; count < AN_MAX_RX_DESC; count++){
975 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
976 ((u_int32_t*)&an_rx_desc)[i]
977 = CSR_MEM_AUX_READ_4(sc,
978 AN_RX_DESC_OFFSET
979 + (count * sizeof(an_rx_desc))
980 + (i * 4));
981
982 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
983 buf = sc->an_rx_buffer[count].an_dma_vaddr;
984
985 MGETHDR(m, M_NOWAIT, MT_DATA);
986 if (m == NULL) {
987 ifp->if_ierrors++;
988 return;
989 }
990 MCLGET(m, M_NOWAIT);
991 if (!(m->m_flags & M_EXT)) {
992 m_freem(m);
993 ifp->if_ierrors++;
994 return;
995 }
996 m->m_pkthdr.rcvif = ifp;
997 /* Read Ethernet encapsulated packet */
998
999 /*
1000 * No ANCACHE support since we just get back
1001 * an Ethernet packet no 802.11 info
1002 */
1003#if 0
1004#ifdef ANCACHE
1005 /* Read NIC frame header */
1006 bcopy(buf, (caddr_t)&rx_frame,
1007 sizeof(rx_frame));
1008#endif
1009#endif
1010 /* Check for insane frame length */
1011 len = an_rx_desc.an_len + 12;
1012 if (len > MCLBYTES) {
1c70eebf
JS
1013 if_printf(ifp,
1014 "oversized packet received "
1015 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1016 ifp->if_ierrors++;
1017 return;
1018 }
1019
1020 m->m_pkthdr.len = m->m_len =
1021 an_rx_desc.an_len + 12;
1022
1023 eh = mtod(m, struct ether_header *);
1024
1025 bcopy(buf, (char *)eh,
1026 m->m_pkthdr.len);
1027
1028 ifp->if_ipackets++;
1029
984263bc
MD
1030#if 0
1031#ifdef ANCACHE
3013ac0e 1032 an_cache_store(sc, m,
984263bc
MD
1033 rx_frame.an_rx_signal_strength,
1034 rx_frame.an_rsvd0);
1035#endif
1036#endif
3013ac0e 1037 (*ifp->if_input)(ifp, m);
984263bc
MD
1038
1039 an_rx_desc.an_valid = 1;
1040 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1041 an_rx_desc.an_done = 0;
1042 an_rx_desc.an_phys =
1043 sc->an_rx_buffer[count].an_dma_paddr;
1044
1045 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1046 CSR_MEM_AUX_WRITE_4(sc,
1047 AN_RX_DESC_OFFSET
1048 + (count * sizeof(an_rx_desc))
1049 + (i * 4),
1050 ((u_int32_t*)&an_rx_desc)[i]);
1051
1052 } else {
1c70eebf
JS
1053 if_printf(ifp, "Didn't get valid RX packet "
1054 "%x %x %d\n",
1055 an_rx_desc.an_done,
1056 an_rx_desc.an_valid,
1057 an_rx_desc.an_len);
984263bc
MD
1058 }
1059 }
1060 }
1061}
1062
1063static void
1064an_txeof(sc, status)
1065 struct an_softc *sc;
1066 int status;
1067{
1068 struct ifnet *ifp;
1069 int id, i;
1070
1071 ifp = &sc->arpcom.ac_if;
1072
1073 ifp->if_timer = 0;
1074 ifp->if_flags &= ~IFF_OACTIVE;
1075
1076 if (!sc->mpi350) {
1077 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1078
1079 if (status & AN_EV_TX_EXC) {
1080 ifp->if_oerrors++;
1081 } else
1082 ifp->if_opackets++;
1083
1084 for (i = 0; i < AN_TX_RING_CNT; i++) {
1085 if (id == sc->an_rdata.an_tx_ring[i]) {
1086 sc->an_rdata.an_tx_ring[i] = 0;
1087 break;
1088 }
1089 }
1090
1091 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1092 } else { /* MPI 350 */
1093 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1094 if (sc->an_rdata.an_tx_prod ==
1095 sc->an_rdata.an_tx_cons)
1096 sc->an_rdata.an_tx_empty = 1;
1097 }
1098
1099 return;
1100}
1101
1102/*
1103 * We abuse the stats updater to check the current NIC status. This
1104 * is important because we don't want to allow transmissions until
1105 * the NIC has synchronized to the current cell (either as the master
1106 * in an ad-hoc group, or as a station connected to an access point).
1107 */
1108static void
1109an_stats_update(xsc)
1110 void *xsc;
1111{
1112 struct an_softc *sc;
1113 struct ifnet *ifp;
984263bc
MD
1114
1115 sc = xsc;
1116 ifp = &sc->arpcom.ac_if;
1117
41d6c56f
JS
1118 crit_enter();
1119
984263bc
MD
1120 sc->an_status.an_type = AN_RID_STATUS;
1121 sc->an_status.an_len = sizeof(struct an_ltv_status);
1122 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1123
1124 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1125 sc->an_associated = 1;
1126 else
1127 sc->an_associated = 0;
1128
41d6c56f
JS
1129 /* Don't do this while we're not transmitting */
1130 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
1131 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1132 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1133 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
984263bc
MD
1134 }
1135
89c0f216 1136 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 1137
41d6c56f 1138 crit_exit();
984263bc
MD
1139}
1140
1141void
1142an_intr(xsc)
1143 void *xsc;
1144{
1145 struct an_softc *sc;
1146 struct ifnet *ifp;
1147 u_int16_t status;
1148
1149 sc = (struct an_softc*)xsc;
1150
984263bc
MD
1151 ifp = &sc->arpcom.ac_if;
1152
1153 /* Disable interrupts. */
1154 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1155
1156 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1157 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1158
1159 if (status & AN_EV_AWAKE) {
1160 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1161 }
1162
1163 if (status & AN_EV_LINKSTAT) {
1164 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1165 == AN_LINKSTAT_ASSOCIATED)
1166 sc->an_associated = 1;
1167 else
1168 sc->an_associated = 0;
1169 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1170 }
1171
1172 if (status & AN_EV_RX) {
1173 an_rxeof(sc);
1174 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1175 }
1176
1177 if (status & AN_EV_TX) {
1178 an_txeof(sc, status);
1179 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1180 }
1181
1182 if (status & AN_EV_TX_EXC) {
1183 an_txeof(sc, status);
1184 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1185 }
1186
1187 if (status & AN_EV_ALLOC)
1188 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1189
1190 /* Re-enable interrupts. */
1191 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1192
38de8487 1193 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1194 an_start(ifp);
1195
1196 return;
1197}
1198
1199static int
1200an_cmd_struct(sc, cmd, reply)
1201 struct an_softc *sc;
1202 struct an_command *cmd;
1203 struct an_reply *reply;
1204{
1205 int i;
1206
1207 for (i = 0; i != AN_TIMEOUT; i++) {
1208 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1209 DELAY(1000);
1210 } else
1211 break;
1212 }
1213 if( i == AN_TIMEOUT) {
1214 printf("BUSY\n");
1215 return(ETIMEDOUT);
1216 }
1217
1218 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1219 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1220 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1221 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1222
1223 for (i = 0; i < AN_TIMEOUT; i++) {
1224 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1225 break;
1226 DELAY(1000);
1227 }
1228
1229 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1230 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1231 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1232 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1233
1234 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1235 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1236
1237 /* Ack the command */
1238 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1239
1240 if (i == AN_TIMEOUT)
1241 return(ETIMEDOUT);
1242
1243 return(0);
1244}
1245
1246static int
1247an_cmd(sc, cmd, val)
1248 struct an_softc *sc;
1249 int cmd;
1250 int val;
1251{
1252 int i, s = 0;
1253
1254 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1255 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1256 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1257 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1258
1259 for (i = 0; i < AN_TIMEOUT; i++) {
1260 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1261 break;
1262 else {
1263 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1264 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1265 }
1266 }
1267
1268 for (i = 0; i < AN_TIMEOUT; i++) {
1269 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1270 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1271 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1272 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1273 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1274 break;
1275 }
1276
1277 /* Ack the command */
1278 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1279
1280 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1281 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1282
1283 if (i == AN_TIMEOUT)
1284 return(ETIMEDOUT);
1285
1286 return(0);
1287}
1288
1289/*
1290 * This reset sequence may look a little strange, but this is the
1291 * most reliable method I've found to really kick the NIC in the
1292 * head and force it to reboot correctly.
1293 */
1294static void
1295an_reset(sc)
1296 struct an_softc *sc;
1297{
984263bc
MD
1298 an_cmd(sc, AN_CMD_ENABLE, 0);
1299 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1300 an_cmd(sc, AN_CMD_NOOP2, 0);
1301
1302 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1303 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1304
1305 an_cmd(sc, AN_CMD_DISABLE, 0);
1306
1307 return;
1308}
1309
1310/*
1311 * Read an LTV record from the NIC.
1312 */
1313static int
1314an_read_record(sc, ltv)
1315 struct an_softc *sc;
1316 struct an_ltv_gen *ltv;
1317{
1318 struct an_ltv_gen *an_ltv;
1319 struct an_card_rid_desc an_rid_desc;
1320 struct an_command cmd;
1321 struct an_reply reply;
1322 u_int16_t *ptr;
1323 u_int8_t *ptr2;
1324 int i, len;
1325
1326 if (ltv->an_len < 4 || ltv->an_type == 0)
1327 return(EINVAL);
1328
1329 if (!sc->mpi350){
1330 /* Tell the NIC to enter record read mode. */
1331 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1332 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1333 return(EIO);
1334 }
1335
1336 /* Seek to the record. */
1337 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1338 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1339 return(EIO);
1340 }
1341
1342 /*
1343 * Read the length and record type and make sure they
1344 * match what we expect (this verifies that we have enough
1345 * room to hold all of the returned data).
1346 * Length includes type but not length.
1347 */
1348 len = CSR_READ_2(sc, AN_DATA1);
1349 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1350 if_printf(&sc->arpcom.ac_if,
1351 "record length mismatch -- expected %d, "
1352 "got %d for Rid %x\n",
1353 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1354 len = ltv->an_len - 2;
1355 } else {
1356 ltv->an_len = len + 2;
1357 }
1358
1359 /* Now read the data. */
1360 len -= 2; /* skip the type */
1361 ptr = &ltv->an_val;
1362 for (i = len; i > 1; i -= 2)
1363 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1364 if (i) {
1365 ptr2 = (u_int8_t *)ptr;
1366 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1367 }
1368 } else { /* MPI-350 */
1369 an_rid_desc.an_valid = 1;
1370 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1371 an_rid_desc.an_rid = 0;
1372 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1373 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1374
1375 bzero(&cmd, sizeof(cmd));
1376 bzero(&reply, sizeof(reply));
1377 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1378 cmd.an_parm0 = ltv->an_type;
1379
1380 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1381 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1382 ((u_int32_t*)&an_rid_desc)[i]);
1383
1384 if (an_cmd_struct(sc, &cmd, &reply)
1385 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1386 if_printf(&sc->arpcom.ac_if,
1387 "failed to read RID %x %x %x %x %x, %d\n",
1388 ltv->an_type,
1389 reply.an_status,
1390 reply.an_resp0,
1391 reply.an_resp1,
1392 reply.an_resp2,
1393 i);
984263bc
MD
1394 return(EIO);
1395 }
1396
1397 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1398 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1399 an_rid_desc.an_len = an_ltv->an_len;
1400 }
1401
1402 if (an_rid_desc.an_len > 2)
1403 bcopy(&an_ltv->an_type,
1404 &ltv->an_val,
1405 an_rid_desc.an_len - 2);
1406 ltv->an_len = an_rid_desc.an_len + 2;
1407 }
1408
1409 if (an_dump)
1410 an_dump_record(sc, ltv, "Read");
1411
1412 return(0);
1413}
1414
1415/*
1416 * Same as read, except we inject data instead of reading it.
1417 */
1418static int
1419an_write_record(sc, ltv)
1420 struct an_softc *sc;
1421 struct an_ltv_gen *ltv;
1422{
1423 struct an_card_rid_desc an_rid_desc;
1424 struct an_command cmd;
1425 struct an_reply reply;
1426 char *buf;
1427 u_int16_t *ptr;
1428 u_int8_t *ptr2;
1429 int i, len;
1430
1431 if (an_dump)
1432 an_dump_record(sc, ltv, "Write");
1433
1434 if (!sc->mpi350){
1435 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1436 return(EIO);
1437
1438 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1439 return(EIO);
1440
1441 /*
1442 * Length includes type but not length.
1443 */
1444 len = ltv->an_len - 2;
1445 CSR_WRITE_2(sc, AN_DATA1, len);
1446
1447 len -= 2; /* skip the type */
1448 ptr = &ltv->an_val;
1449 for (i = len; i > 1; i -= 2)
1450 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1451 if (i) {
1452 ptr2 = (u_int8_t *)ptr;
1453 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1454 }
1455
1456 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1457 return(EIO);
1458 } else {
1459 /* MPI-350 */
1460
1461 for (i = 0; i != AN_TIMEOUT; i++) {
1462 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1463 & AN_CMD_BUSY) {
1464 DELAY(10);
1465 } else
1466 break;
1467 }
1468 if (i == AN_TIMEOUT) {
1469 printf("BUSY\n");
1470 }
1471
1472 an_rid_desc.an_valid = 1;
1473 an_rid_desc.an_len = ltv->an_len - 2;
1474 an_rid_desc.an_rid = ltv->an_type;
1475 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1476
1477 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1478 an_rid_desc.an_len);
1479
1480 bzero(&cmd,sizeof(cmd));
1481 bzero(&reply,sizeof(reply));
1482 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1483 cmd.an_parm0 = ltv->an_type;
1484
1485 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1486 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1487 ((u_int32_t*)&an_rid_desc)[i]);
1488
1489 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1490 if_printf(&sc->arpcom.ac_if,
1491 "failed to write RID 1 %x %x %x %x %x, %d\n",
1492 ltv->an_type,
984263bc
MD
1493 reply.an_status,
1494 reply.an_resp0,
1495 reply.an_resp1,
1496 reply.an_resp2,
1497 i);
1498 return(EIO);
1499 }
1500
1501 ptr = (u_int16_t *)buf;
1502
1503 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1504 if_printf(&sc->arpcom.ac_if,
1505 "failed to write RID 2 %x %x %x %x %x, %d\n",
1506 ltv->an_type,
984263bc
MD
1507 reply.an_status,
1508 reply.an_resp0,
1509 reply.an_resp1,
1510 reply.an_resp2,
1511 i);
1512 return(EIO);
1513 }
1514 }
1515
1516 return(0);
1517}
1518
1519static void
1520an_dump_record(sc, ltv, string)
1521 struct an_softc *sc;
1522 struct an_ltv_gen *ltv;
1523 char *string;
1524{
1525 u_int8_t *ptr2;
1526 int len;
1527 int i;
1528 int count = 0;
1529 char buf[17], temp;
1530
1531 len = ltv->an_len - 4;
1c70eebf
JS
1532 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1533 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1534
1535 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1536 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1537 bzero(buf,sizeof(buf));
1538
1539 ptr2 = (u_int8_t *)&ltv->an_val;
1540 for (i = len; i > 0; i--) {
1541 printf("%02x ", *ptr2);
1542
1543 temp = *ptr2++;
1544 if (temp >= ' ' && temp <= '~')
1545 buf[count] = temp;
1546 else if (temp >= 'A' && temp <= 'Z')
1547 buf[count] = temp;
1548 else
1549 buf[count] = '.';
1550 if (++count == 16) {
1551 count = 0;
1552 printf("%s\n",buf);
1c70eebf 1553 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1554 bzero(buf,sizeof(buf));
1555 }
1556 }
1557 for (; count != 16; count++) {
1558 printf(" ");
1559 }
1560 printf(" %s\n",buf);
1561 }
1562}
1563
1564static int
1565an_seek(sc, id, off, chan)
1566 struct an_softc *sc;
1567 int id, off, chan;
1568{
1569 int i;
1570 int selreg, offreg;
1571
1572 switch (chan) {
1573 case AN_BAP0:
1574 selreg = AN_SEL0;
1575 offreg = AN_OFF0;
1576 break;
1577 case AN_BAP1:
1578 selreg = AN_SEL1;
1579 offreg = AN_OFF1;
1580 break;
1581 default:
1c70eebf 1582 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1583 return(EIO);
1584 }
1585
1586 CSR_WRITE_2(sc, selreg, id);
1587 CSR_WRITE_2(sc, offreg, off);
1588
1589 for (i = 0; i < AN_TIMEOUT; i++) {
1590 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1591 break;
1592 }
1593
1594 if (i == AN_TIMEOUT)
1595 return(ETIMEDOUT);
1596
1597 return(0);
1598}
1599
1600static int
1601an_read_data(sc, id, off, buf, len)
1602 struct an_softc *sc;
1603 int id, off;
1604 caddr_t buf;
1605 int len;
1606{
1607 int i;
1608 u_int16_t *ptr;
1609 u_int8_t *ptr2;
1610
1611 if (off != -1) {
1612 if (an_seek(sc, id, off, AN_BAP1))
1613 return(EIO);
1614 }
1615
1616 ptr = (u_int16_t *)buf;
1617 for (i = len; i > 1; i -= 2)
1618 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1619 if (i) {
1620 ptr2 = (u_int8_t *)ptr;
1621 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1622 }
1623
1624 return(0);
1625}
1626
1627static int
1628an_write_data(sc, id, off, buf, len)
1629 struct an_softc *sc;
1630 int id, off;
1631 caddr_t buf;
1632 int len;
1633{
1634 int i;
1635 u_int16_t *ptr;
1636 u_int8_t *ptr2;
1637
1638 if (off != -1) {
1639 if (an_seek(sc, id, off, AN_BAP0))
1640 return(EIO);
1641 }
1642
1643 ptr = (u_int16_t *)buf;
1644 for (i = len; i > 1; i -= 2)
1645 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1646 if (i) {
1647 ptr2 = (u_int8_t *)ptr;
1648 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1649 }
1650
1651 return(0);
1652}
1653
1654/*
1655 * Allocate a region of memory inside the NIC and zero
1656 * it out.
1657 */
1658static int
1659an_alloc_nicmem(sc, len, id)
1660 struct an_softc *sc;
1661 int len;
1662 int *id;
1663{
1664 int i;
1665
1666 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1667 if_printf(&sc->arpcom.ac_if,
1668 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1669 return(ENOMEM);
1670 }
1671
1672 for (i = 0; i < AN_TIMEOUT; i++) {
1673 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1674 break;
1675 }
1676
1677 if (i == AN_TIMEOUT)
1678 return(ETIMEDOUT);
1679
1680 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1681 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1682
1683 if (an_seek(sc, *id, 0, AN_BAP0))
1684 return(EIO);
1685
1686 for (i = 0; i < len / 2; i++)
1687 CSR_WRITE_2(sc, AN_DATA0, 0);
1688
1689 return(0);
1690}
1691
1692static void
1693an_setdef(sc, areq)
1694 struct an_softc *sc;
1695 struct an_req *areq;
1696{
984263bc
MD
1697 struct ifnet *ifp;
1698 struct an_ltv_genconfig *cfg;
1699 struct an_ltv_ssidlist *ssid;
1700 struct an_ltv_aplist *ap;
1701 struct an_ltv_gen *sp;
1702
1703 ifp = &sc->arpcom.ac_if;
1704
1705 switch (areq->an_type) {
1706 case AN_RID_GENCONFIG:
1707 cfg = (struct an_ltv_genconfig *)areq;
1708
984263bc
MD
1709 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1710 ETHER_ADDR_LEN);
f2682cb9 1711 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1712
1713 bcopy((char *)cfg, (char *)&sc->an_config,
1714 sizeof(struct an_ltv_genconfig));
1715 break;
1716 case AN_RID_SSIDLIST:
1717 ssid = (struct an_ltv_ssidlist *)areq;
1718 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1719 sizeof(struct an_ltv_ssidlist));
1720 break;
1721 case AN_RID_APLIST:
1722 ap = (struct an_ltv_aplist *)areq;
1723 bcopy((char *)ap, (char *)&sc->an_aplist,
1724 sizeof(struct an_ltv_aplist));
1725 break;
1726 case AN_RID_TX_SPEED:
1727 sp = (struct an_ltv_gen *)areq;
1728 sc->an_tx_rate = sp->an_val;
1729
1730 /* Read the current configuration */
1731 sc->an_config.an_type = AN_RID_GENCONFIG;
1732 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1733 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1734 cfg = &sc->an_config;
1735
1736 /* clear other rates and set the only one we want */
1737 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1738 cfg->an_rates[0] = sc->an_tx_rate;
1739
1740 /* Save the new rate */
1741 sc->an_config.an_type = AN_RID_GENCONFIG;
1742 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1743 break;
1744 case AN_RID_WEP_TEMP:
1745 /* Cache the temp keys */
1746 bcopy(areq,
1747 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1748 sizeof(struct an_ltv_key));
1749 case AN_RID_WEP_PERM:
1750 case AN_RID_LEAPUSERNAME:
1751 case AN_RID_LEAPPASSWORD:
1752 /* Disable the MAC. */
1753 an_cmd(sc, AN_CMD_DISABLE, 0);
1754
1755 /* Write the key */
1756 an_write_record(sc, (struct an_ltv_gen *)areq);
1757
1758 /* Turn the MAC back on. */
1759 an_cmd(sc, AN_CMD_ENABLE, 0);
1760
1761 break;
1762 case AN_RID_MONITOR_MODE:
1763 cfg = (struct an_ltv_genconfig *)areq;
1764 bpfdetach(ifp);
1765 if (ng_ether_detach_p != NULL)
1766 (*ng_ether_detach_p) (ifp);
1767 sc->an_monitor = cfg->an_len;
1768
1769 if (sc->an_monitor & AN_MONITOR) {
1770 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1771 bpfattach(ifp, DLT_AIRONET_HEADER,
1772 sizeof(struct ether_header));
1773 } else {
1774 bpfattach(ifp, DLT_IEEE802_11,
1775 sizeof(struct ether_header));
1776 }
1777 } else {
1778 bpfattach(ifp, DLT_EN10MB,
1779 sizeof(struct ether_header));
1780 if (ng_ether_attach_p != NULL)
1781 (*ng_ether_attach_p) (ifp);
1782 }
1783 break;
1784 default:
1c70eebf 1785 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc
MD
1786 return;
1787 break;
1788 }
1789
1790
1791 /* Reinitialize the card. */
1792 if (ifp->if_flags)
1793 an_init(sc);
1794
1795 return;
1796}
1797
1798/*
1799 * Derived from Linux driver to enable promiscious mode.
1800 */
1801
1802static void
1803an_promisc(sc, promisc)
1804 struct an_softc *sc;
1805 int promisc;
1806{
1807 if (sc->an_was_monitor)
1808 an_reset(sc);
1c70eebf
JS
1809 if (sc->mpi350)
1810 an_init_mpi350_desc(sc);
984263bc
MD
1811 if (sc->an_monitor || sc->an_was_monitor)
1812 an_init(sc);
1813
1814 sc->an_was_monitor = sc->an_monitor;
1815 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1816
1817 return;
1818}
1819
1820static int
bd4539cc 1821an_ioctl(ifp, command, data, cr)
984263bc
MD
1822 struct ifnet *ifp;
1823 u_long command;
1824 caddr_t data;
bd4539cc 1825 struct ucred *cr;
984263bc 1826{
41d6c56f 1827 int error = 0;
984263bc
MD
1828 int len;
1829 int i;
1830 struct an_softc *sc;
1831 struct ifreq *ifr;
984263bc
MD
1832 struct ieee80211req *ireq;
1833 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1834 u_int8_t *tmpptr;
1835 struct an_ltv_genconfig *config;
1836 struct an_ltv_key *key;
1837 struct an_ltv_status *status;
1838 struct an_ltv_ssidlist *ssids;
1839 int mode;
1840 struct aironet_ioctl l_ioctl;
1841
1842 sc = ifp->if_softc;
984263bc
MD
1843 ifr = (struct ifreq *)data;
1844 ireq = (struct ieee80211req *)data;
1845
41d6c56f
JS
1846 crit_enter();
1847
984263bc
MD
1848 config = (struct an_ltv_genconfig *)&sc->areq;
1849 key = (struct an_ltv_key *)&sc->areq;
1850 status = (struct an_ltv_status *)&sc->areq;
1851 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1852
984263bc 1853 switch (command) {
984263bc
MD
1854 case SIOCSIFFLAGS:
1855 if (ifp->if_flags & IFF_UP) {
1856 if (ifp->if_flags & IFF_RUNNING &&
1857 ifp->if_flags & IFF_PROMISC &&
1858 !(sc->an_if_flags & IFF_PROMISC)) {
1859 an_promisc(sc, 1);
1860 } else if (ifp->if_flags & IFF_RUNNING &&
1861 !(ifp->if_flags & IFF_PROMISC) &&
1862 sc->an_if_flags & IFF_PROMISC) {
1863 an_promisc(sc, 0);
1864 } else
1865 an_init(sc);
1866 } else {
1867 if (ifp->if_flags & IFF_RUNNING)
1868 an_stop(sc);
1869 }
1870 sc->an_if_flags = ifp->if_flags;
1871 error = 0;
1872 break;
1873 case SIOCSIFMEDIA:
1874 case SIOCGIFMEDIA:
1875 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1876 break;
1877 case SIOCADDMULTI:
1878 case SIOCDELMULTI:
1879 /* The Aironet has no multicast filter. */
1880 error = 0;
1881 break;
1882 case SIOCGAIRONET:
1883 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1884 if (error != 0)
1885 break;
1886#ifdef ANCACHE
1887 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1888 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1889 if (error)
1890 break;
1891 sc->an_sigitems = sc->an_nextitem = 0;
1892 break;
1893 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1894 char *pt = (char *)&sc->areq.an_val;
1895 bcopy((char *)&sc->an_sigitems, (char *)pt,
1896 sizeof(int));
1897 pt += sizeof(int);
1898 sc->areq.an_len = sizeof(int) / 2;
1899 bcopy((char *)&sc->an_sigcache, (char *)pt,
1900 sizeof(struct an_sigcache) * sc->an_sigitems);
1901 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1902 sc->an_sigitems) / 2) + 1;
1903 } else
1904#endif
1905 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1906 error = EINVAL;
1907 break;
1908 }
1909 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1910 break;
1911 case SIOCSAIRONET:
bd4539cc 1912 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1913 break;
984263bc
MD
1914 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1915 if (error != 0)
1916 break;
1917 an_setdef(sc, &sc->areq);
1918 break;
1919 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1920 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1921 break;
984263bc
MD
1922 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1923 mode = l_ioctl.command;
1924
1925 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1926 error = readrids(ifp, &l_ioctl);
1927 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1928 error = writerids(ifp, &l_ioctl);
1929 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1930 error = flashcard(ifp, &l_ioctl);
1931 } else {
1932 error =-1;
1933 }
1934
1935 /* copy out the updated command info */
1936 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1937
1938 break;
1939 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1940 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1941 break;
984263bc
MD
1942 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1943 l_ioctl.command = 0;
1944 error = AIROMAGIC;
1945 copyout(&error, l_ioctl.data, sizeof(error));
1946 error = 0;
1947 break;
1948 case SIOCG80211:
1949 sc->areq.an_len = sizeof(sc->areq);
1950 /* was that a good idea DJA we are doing a short-cut */
1951 switch (ireq->i_type) {
1952 case IEEE80211_IOC_SSID:
1953 if (ireq->i_val == -1) {
1954 sc->areq.an_type = AN_RID_STATUS;
1955 if (an_read_record(sc,
1956 (struct an_ltv_gen *)&sc->areq)) {
1957 error = EINVAL;
1958 break;
1959 }
1960 len = status->an_ssidlen;
1961 tmpptr = status->an_ssid;
1962 } else if (ireq->i_val >= 0) {
1963 sc->areq.an_type = AN_RID_SSIDLIST;
1964 if (an_read_record(sc,
1965 (struct an_ltv_gen *)&sc->areq)) {
1966 error = EINVAL;
1967 break;
1968 }
1969 if (ireq->i_val == 0) {
1970 len = ssids->an_ssid1_len;
1971 tmpptr = ssids->an_ssid1;
1972 } else if (ireq->i_val == 1) {
1973 len = ssids->an_ssid2_len;
1974 tmpptr = ssids->an_ssid2;
1975 } else if (ireq->i_val == 2) {
1976 len = ssids->an_ssid3_len;
1977 tmpptr = ssids->an_ssid3;
1978 } else {
1979 error = EINVAL;
1980 break;
1981 }
1982 } else {
1983 error = EINVAL;
1984 break;
1985 }
1986 if (len > IEEE80211_NWID_LEN) {
1987 error = EINVAL;
1988 break;
1989 }
1990 ireq->i_len = len;
1991 bzero(tmpstr, IEEE80211_NWID_LEN);
1992 bcopy(tmpptr, tmpstr, len);
1993 error = copyout(tmpstr, ireq->i_data,
1994 IEEE80211_NWID_LEN);
1995 break;
1996 case IEEE80211_IOC_NUMSSIDS:
1997 ireq->i_val = 3;
1998 break;
1999 case IEEE80211_IOC_WEP:
2000 sc->areq.an_type = AN_RID_ACTUALCFG;
2001 if (an_read_record(sc,
2002 (struct an_ltv_gen *)&sc->areq)) {
2003 error = EINVAL;
2004 break;
2005 }
2006 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2007 if (config->an_authtype &
2008 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2009 ireq->i_val = IEEE80211_WEP_MIXED;
2010 else
2011 ireq->i_val = IEEE80211_WEP_ON;
2012 } else {
2013 ireq->i_val = IEEE80211_WEP_OFF;
2014 }
2015 break;
2016 case IEEE80211_IOC_WEPKEY:
2017 /*
2018 * XXX: I'm not entierly convinced this is
2019 * correct, but it's what is implemented in
2020 * ancontrol so it will have to do until we get
2021 * access to actual Cisco code.
2022 */
2023 if (ireq->i_val < 0 || ireq->i_val > 8) {
2024 error = EINVAL;
2025 break;
2026 }
2027 len = 0;
2028 if (ireq->i_val < 5) {
2029 sc->areq.an_type = AN_RID_WEP_TEMP;
2030 for (i = 0; i < 5; i++) {
2031 if (an_read_record(sc,
2032 (struct an_ltv_gen *)&sc->areq)) {
2033 error = EINVAL;
2034 break;
2035 }
2036 if (key->kindex == 0xffff)
2037 break;
2038 if (key->kindex == ireq->i_val)
2039 len = key->klen;
2040 /* Required to get next entry */
2041 sc->areq.an_type = AN_RID_WEP_PERM;
2042 }
2043 if (error != 0)
2044 break;
2045 }
2046 /* We aren't allowed to read the value of the
2047 * key from the card so we just output zeros
2048 * like we would if we could read the card, but
2049 * denied the user access.
2050 */
2051 bzero(tmpstr, len);
2052 ireq->i_len = len;
2053 error = copyout(tmpstr, ireq->i_data, len);
2054 break;
2055 case IEEE80211_IOC_NUMWEPKEYS:
2056 ireq->i_val = 9; /* include home key */
2057 break;
2058 case IEEE80211_IOC_WEPTXKEY:
2059 /*
2060 * For some strange reason, you have to read all
2061 * keys before you can read the txkey.
2062 */
2063 sc->areq.an_type = AN_RID_WEP_TEMP;
2064 for (i = 0; i < 5; i++) {
2065 if (an_read_record(sc,
2066 (struct an_ltv_gen *) &sc->areq)) {
2067 error = EINVAL;
2068 break;
2069 }
2070 if (key->kindex == 0xffff)
2071 break;
2072 /* Required to get next entry */
2073 sc->areq.an_type = AN_RID_WEP_PERM;
2074 }
2075 if (error != 0)
2076 break;
2077
2078 sc->areq.an_type = AN_RID_WEP_PERM;
2079 key->kindex = 0xffff;
2080 if (an_read_record(sc,
2081 (struct an_ltv_gen *)&sc->areq)) {
2082 error = EINVAL;
2083 break;
2084 }
2085 ireq->i_val = key->mac[0];
2086 /*
2087 * Check for home mode. Map home mode into
2088 * 5th key since that is how it is stored on
2089 * the card
2090 */
2091 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2092 sc->areq.an_type = AN_RID_GENCONFIG;
2093 if (an_read_record(sc,
2094 (struct an_ltv_gen *)&sc->areq)) {
2095 error = EINVAL;
2096 break;
2097 }
2098 if (config->an_home_product & AN_HOME_NETWORK)
2099 ireq->i_val = 4;
2100 break;
2101 case IEEE80211_IOC_AUTHMODE:
2102 sc->areq.an_type = AN_RID_ACTUALCFG;
2103 if (an_read_record(sc,
2104 (struct an_ltv_gen *)&sc->areq)) {
2105 error = EINVAL;
2106 break;
2107 }
2108 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2109 AN_AUTHTYPE_NONE) {
2110 ireq->i_val = IEEE80211_AUTH_NONE;
2111 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2112 AN_AUTHTYPE_OPEN) {
2113 ireq->i_val = IEEE80211_AUTH_OPEN;
2114 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2115 AN_AUTHTYPE_SHAREDKEY) {
2116 ireq->i_val = IEEE80211_AUTH_SHARED;
2117 } else
2118 error = EINVAL;
2119 break;
2120 case IEEE80211_IOC_STATIONNAME:
2121 sc->areq.an_type = AN_RID_ACTUALCFG;
2122 if (an_read_record(sc,
2123 (struct an_ltv_gen *)&sc->areq)) {
2124 error = EINVAL;
2125 break;
2126 }
2127 ireq->i_len = sizeof(config->an_nodename);
2128 tmpptr = config->an_nodename;
2129 bzero(tmpstr, IEEE80211_NWID_LEN);
2130 bcopy(tmpptr, tmpstr, ireq->i_len);
2131 error = copyout(tmpstr, ireq->i_data,
2132 IEEE80211_NWID_LEN);
2133 break;
2134 case IEEE80211_IOC_CHANNEL:
2135 sc->areq.an_type = AN_RID_STATUS;
2136 if (an_read_record(sc,
2137 (struct an_ltv_gen *)&sc->areq)) {
2138 error = EINVAL;
2139 break;
2140 }
2141 ireq->i_val = status->an_cur_channel;
2142 break;
2143 case IEEE80211_IOC_POWERSAVE:
2144 sc->areq.an_type = AN_RID_ACTUALCFG;
2145 if (an_read_record(sc,
2146 (struct an_ltv_gen *)&sc->areq)) {
2147 error = EINVAL;
2148 break;
2149 }
2150 if (config->an_psave_mode == AN_PSAVE_NONE) {
2151 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2152 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2153 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2154 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2155 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2156 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2157 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2158 } else
2159 error = EINVAL;
2160 break;
2161 case IEEE80211_IOC_POWERSAVESLEEP:
2162 sc->areq.an_type = AN_RID_ACTUALCFG;
2163 if (an_read_record(sc,
2164 (struct an_ltv_gen *)&sc->areq)) {
2165 error = EINVAL;
2166 break;
2167 }
2168 ireq->i_val = config->an_listen_interval;
2169 break;
2170 }
2171 break;
2172 case SIOCS80211:
bd4539cc 2173 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 2174 break;
984263bc
MD
2175 sc->areq.an_len = sizeof(sc->areq);
2176 /*
2177 * We need a config structure for everything but the WEP
2178 * key management and SSIDs so we get it now so avoid
2179 * duplicating this code every time.
2180 */
2181 if (ireq->i_type != IEEE80211_IOC_SSID &&
2182 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2183 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2184 sc->areq.an_type = AN_RID_GENCONFIG;
2185 if (an_read_record(sc,
2186 (struct an_ltv_gen *)&sc->areq)) {
2187 error = EINVAL;
2188 break;
2189 }
2190 }
2191 switch (ireq->i_type) {
2192 case IEEE80211_IOC_SSID:
2193 sc->areq.an_type = AN_RID_SSIDLIST;
2194 if (an_read_record(sc,
2195 (struct an_ltv_gen *)&sc->areq)) {
2196 error = EINVAL;
2197 break;
2198 }
2199 if (ireq->i_len > IEEE80211_NWID_LEN) {
2200 error = EINVAL;
2201 break;
2202 }
2203 switch (ireq->i_val) {
2204 case 0:
2205 error = copyin(ireq->i_data,
2206 ssids->an_ssid1, ireq->i_len);
2207 ssids->an_ssid1_len = ireq->i_len;
2208 break;
2209 case 1:
2210 error = copyin(ireq->i_data,
2211 ssids->an_ssid2, ireq->i_len);
2212 ssids->an_ssid2_len = ireq->i_len;
2213 break;
2214 case 2:
2215 error = copyin(ireq->i_data,
2216 ssids->an_ssid3, ireq->i_len);
2217 ssids->an_ssid3_len = ireq->i_len;
2218 break;
2219 default:
2220 error = EINVAL;
2221 break;
2222 }
2223 break;
2224 case IEEE80211_IOC_WEP:
2225 switch (ireq->i_val) {
2226 case IEEE80211_WEP_OFF:
2227 config->an_authtype &=
2228 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2229 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2230 break;
2231 case IEEE80211_WEP_ON:
2232 config->an_authtype |=
2233 AN_AUTHTYPE_PRIVACY_IN_USE;
2234 config->an_authtype &=
2235 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2236 break;
2237 case IEEE80211_WEP_MIXED:
2238 config->an_authtype |=
2239 AN_AUTHTYPE_PRIVACY_IN_USE |
2240 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2241 break;
2242 default:
2243 error = EINVAL;
2244 break;
2245 }
2246 break;
2247 case IEEE80211_IOC_WEPKEY:
2248 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2249 ireq->i_len > 13) {
2250 error = EINVAL;
2251 break;
2252 }
2253 error = copyin(ireq->i_data, tmpstr, 13);
2254 if (error != 0)
2255 break;
2256 /*
2257 * Map the 9th key into the home mode
2258 * since that is how it is stored on
2259 * the card
2260 */
2261 bzero(&sc->areq, sizeof(struct an_ltv_key));
2262 sc->areq.an_len = sizeof(struct an_ltv_key);
2263 key->mac[0] = 1; /* The others are 0. */
2264 if (ireq->i_val < 4) {
2265 sc->areq.an_type = AN_RID_WEP_TEMP;
2266 key->kindex = ireq->i_val;
2267 } else {
2268 sc->areq.an_type = AN_RID_WEP_PERM;
2269 key->kindex = ireq->i_val - 4;
2270 }
2271 key->klen = ireq->i_len;
2272 bcopy(tmpstr, key->key, key->klen);
2273 break;
2274 case IEEE80211_IOC_WEPTXKEY:
2275 if (ireq->i_val < 0 || ireq->i_val > 4) {
2276 error = EINVAL;
2277 break;
2278 }
2279
2280 /*
2281 * Map the 5th key into the home mode
2282 * since that is how it is stored on
2283 * the card
2284 */
2285 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2286 sc->areq.an_type = AN_RID_ACTUALCFG;
2287 if (an_read_record(sc,
2288 (struct an_ltv_gen *)&sc->areq)) {
2289 error = EINVAL;
2290 break;
2291 }
2292 if (ireq->i_val == 4) {
2293 config->an_home_product |= AN_HOME_NETWORK;
2294 ireq->i_val = 0;
2295 } else {
2296 config->an_home_product &= ~AN_HOME_NETWORK;
2297 }
2298
2299 sc->an_config.an_home_product
2300 = config->an_home_product;
2301
2302 /* update configuration */
2303 an_init(sc);
2304
2305 bzero(&sc->areq, sizeof(struct an_ltv_key));
2306 sc->areq.an_len = sizeof(struct an_ltv_key);
2307 sc->areq.an_type = AN_RID_WEP_PERM;
2308 key->kindex = 0xffff;
2309 key->mac[0] = ireq->i_val;
2310 break;
2311 case IEEE80211_IOC_AUTHMODE:
2312 switch (ireq->i_val) {
2313 case IEEE80211_AUTH_NONE:
2314 config->an_authtype = AN_AUTHTYPE_NONE |
2315 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2316 break;
2317 case IEEE80211_AUTH_OPEN:
2318 config->an_authtype = AN_AUTHTYPE_OPEN |
2319 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2320 break;
2321 case IEEE80211_AUTH_SHARED:
2322 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2323 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2324 break;
2325 default:
2326 error = EINVAL;
2327 }
2328 break;
2329 case IEEE80211_IOC_STATIONNAME:
2330 if (ireq->i_len > 16) {
2331 error = EINVAL;
2332 break;
2333 }
2334 bzero(config->an_nodename, 16);
2335 error = copyin(ireq->i_data,
2336 config->an_nodename, ireq->i_len);
2337 break;
2338 case IEEE80211_IOC_CHANNEL:
2339 /*
2340 * The actual range is 1-14, but if you set it
2341 * to 0 you get the default so we let that work
2342 * too.
2343 */
2344 if (ireq->i_val < 0 || ireq->i_val >14) {
2345 error = EINVAL;
2346 break;
2347 }
2348 config->an_ds_channel = ireq->i_val;
2349 break;
2350 case IEEE80211_IOC_POWERSAVE:
2351 switch (ireq->i_val) {
2352 case IEEE80211_POWERSAVE_OFF:
2353 config->an_psave_mode = AN_PSAVE_NONE;
2354 break;
2355 case IEEE80211_POWERSAVE_CAM:
2356 config->an_psave_mode = AN_PSAVE_CAM;
2357 break;
2358 case IEEE80211_POWERSAVE_PSP:
2359 config->an_psave_mode = AN_PSAVE_PSP;
2360 break;
2361 case IEEE80211_POWERSAVE_PSP_CAM:
2362 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2363 break;
2364 default:
2365 error = EINVAL;
2366 break;
2367 }
2368 break;
2369 case IEEE80211_IOC_POWERSAVESLEEP:
2370 config->an_listen_interval = ireq->i_val;
2371 break;
2372 }
2373
2374 if (!error)
2375 an_setdef(sc, &sc->areq);
2376 break;
2377 default:
4cde4dd5 2378 error = ether_ioctl(ifp, command, data);
984263bc
MD
2379 break;
2380 }
41d6c56f
JS
2381
2382 crit_exit();
984263bc
MD
2383
2384 return(error != 0);
2385}
2386
2387static int
2388an_init_tx_ring(sc)
2389 struct an_softc *sc;
2390{
2391 int i;
2392 int id;
2393
984263bc
MD
2394 if (!sc->mpi350) {
2395 for (i = 0; i < AN_TX_RING_CNT; i++) {
2396 if (an_alloc_nicmem(sc, 1518 +
2397 0x44, &id))
2398 return(ENOMEM);
2399 sc->an_rdata.an_tx_fids[i] = id;
2400 sc->an_rdata.an_tx_ring[i] = 0;
2401 }
2402 }
2403
2404 sc->an_rdata.an_tx_prod = 0;
2405 sc->an_rdata.an_tx_cons = 0;
2406 sc->an_rdata.an_tx_empty = 1;
2407
2408 return(0);
2409}
2410
2411static void
2412an_init(xsc)
2413 void *xsc;
2414{
2415 struct an_softc *sc = xsc;
2416 struct ifnet *ifp = &sc->arpcom.ac_if;
984263bc 2417
41d6c56f 2418 crit_enter();
984263bc
MD
2419 if (ifp->if_flags & IFF_RUNNING)
2420 an_stop(sc);
2421
2422 sc->an_associated = 0;
2423
2424 /* Allocate the TX buffers */
2425 if (an_init_tx_ring(sc)) {
2426 an_reset(sc);
2427 if (sc->mpi350)
2428 an_init_mpi350_desc(sc);
2429 if (an_init_tx_ring(sc)) {
41d6c56f 2430 crit_exit();
1c70eebf 2431 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2432 return;
2433 }
2434 }
2435
2436 /* Set our MAC address. */
2437 bcopy((char *)&sc->arpcom.ac_enaddr,
2438 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2439
2440 if (ifp->if_flags & IFF_BROADCAST)
2441 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2442 else
2443 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2444
2445 if (ifp->if_flags & IFF_MULTICAST)
2446 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2447
2448 if (ifp->if_flags & IFF_PROMISC) {
2449 if (sc->an_monitor & AN_MONITOR) {
2450 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2451 sc->an_config.an_rxmode |=
2452 AN_RXMODE_80211_MONITOR_ANYBSS |
2453 AN_RXMODE_NO_8023_HEADER;
2454 } else {
2455 sc->an_config.an_rxmode |=
2456 AN_RXMODE_80211_MONITOR_CURBSS |
2457 AN_RXMODE_NO_8023_HEADER;
2458 }
2459 }
2460 }
2461
2462 if (sc->an_have_rssimap)
2463 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2464
2465 /* Set the ssid list */
2466 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2467 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2468 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
41d6c56f 2469 crit_exit();
1c70eebf 2470 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2471 return;
2472 }
2473
2474 /* Set the AP list */
2475 sc->an_aplist.an_type = AN_RID_APLIST;
2476 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2477 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
41d6c56f 2478 crit_exit();
1c70eebf 2479 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2480 return;
2481 }
2482
2483 /* Set the configuration in the NIC */
2484 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2485 sc->an_config.an_type = AN_RID_GENCONFIG;
2486 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
41d6c56f 2487 crit_exit();
1c70eebf 2488 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2489 return;
2490 }
2491
2492 /* Enable the MAC */
2493 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
41d6c56f 2494 crit_exit();
1c70eebf 2495 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2496 return;
2497 }
2498
2499 if (ifp->if_flags & IFF_PROMISC)
2500 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2501
2502 /* enable interrupts */
2503 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2504
2505 ifp->if_flags |= IFF_RUNNING;
2506 ifp->if_flags &= ~IFF_OACTIVE;
2507
89c0f216 2508 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 2509
41d6c56f 2510 crit_exit();
984263bc
MD
2511}
2512
2513static void
2514an_start(ifp)
2515 struct ifnet *ifp;
2516{
2517 struct an_softc *sc;
2518 struct mbuf *m0 = NULL;
2519 struct an_txframe_802_3 tx_frame_802_3;
2520 struct ether_header *eh;
2521 int id, idx, i;
2522 unsigned char txcontrol;
2523 struct an_card_tx_desc an_tx_desc;
2524 u_int8_t *ptr;
2525 u_int8_t *buf;
2526
2527 sc = ifp->if_softc;
2528
984263bc
MD
2529 if (ifp->if_flags & IFF_OACTIVE)
2530 return;
2531
2532 if (!sc->an_associated)
2533 return;
2534
2535 /* We can't send in monitor mode so toss any attempts. */
2536 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2537 ifq_purge(&ifp->if_snd);
984263bc
MD
2538 return;
2539 }
2540
2541 idx = sc->an_rdata.an_tx_prod;
2542
2543 if (!sc->mpi350) {
2544 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2545
2546 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2547 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2548 if (m0 == NULL)
2549 break;
2550
2551 id = sc->an_rdata.an_tx_fids[idx];
2552 eh = mtod(m0, struct ether_header *);
2553
2554 bcopy((char *)&eh->ether_dhost,
2555 (char *)&tx_frame_802_3.an_tx_dst_addr,
2556 ETHER_ADDR_LEN);
2557 bcopy((char *)&eh->ether_shost,
2558 (char *)&tx_frame_802_3.an_tx_src_addr,
2559 ETHER_ADDR_LEN);
2560
2561 /* minus src/dest mac & type */
2562 tx_frame_802_3.an_tx_802_3_payload_len =
2563 m0->m_pkthdr.len - 12;
2564
2565 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2566 tx_frame_802_3.an_tx_802_3_payload_len,
2567 (caddr_t)&sc->an_txbuf);
2568
2569 txcontrol = AN_TXCTL_8023;
2570 /* write the txcontrol only */
2571 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2572 sizeof(txcontrol));
2573
2574 /* 802_3 header */
2575 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2576 sizeof(struct an_txframe_802_3));
2577
2578 /* in mbuf header type is just before payload */
2579 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2580 tx_frame_802_3.an_tx_802_3_payload_len);
2581
7600679e 2582 BPF_MTAP(ifp, m0);
984263bc
MD
2583
2584 m_freem(m0);
2585 m0 = NULL;
2586
2587 sc->an_rdata.an_tx_ring[idx] = id;
2588 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2589 if_printf(ifp, "xmit failed\n");
984263bc
MD
2590
2591 AN_INC(idx, AN_TX_RING_CNT);
2592 }
2593 } else { /* MPI-350 */
2594 while (sc->an_rdata.an_tx_empty ||
2595 idx != sc->an_rdata.an_tx_cons) {
38de8487 2596 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2597 if (m0 == NULL) {
2598 break;
2599 }
2600 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2601
2602 eh = mtod(m0, struct ether_header *);
2603
2604 /* DJA optimize this to limit bcopy */
2605 bcopy((char *)&eh->ether_dhost,
2606 (char *)&tx_frame_802_3.an_tx_dst_addr,
2607 ETHER_ADDR_LEN);
2608 bcopy((char *)&eh->ether_shost,
2609 (char *)&tx_frame_802_3.an_tx_src_addr,
2610 ETHER_ADDR_LEN);
2611
2612 /* minus src/dest mac & type */
2613 tx_frame_802_3.an_tx_802_3_payload_len =
2614 m0->m_pkthdr.len - 12;
2615
2616 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2617 tx_frame_802_3.an_tx_802_3_payload_len,
2618 (caddr_t)&sc->an_txbuf);
2619
2620 txcontrol = AN_TXCTL_8023;
2621 /* write the txcontrol only */
2622 bcopy((caddr_t)&txcontrol, &buf[0x08],
2623 sizeof(txcontrol));
2624
2625 /* 802_3 header */
2626 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2627 sizeof(struct an_txframe_802_3));
2628
2629 /* in mbuf header type is just before payload */
2630 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2631 tx_frame_802_3.an_tx_802_3_payload_len);
2632
2633
2634 bzero(&an_tx_desc, sizeof(an_tx_desc));
2635 an_tx_desc.an_offset = 0;
2636 an_tx_desc.an_eoc = 1;
2637 an_tx_desc.an_valid = 1;
2638 an_tx_desc.an_len = 0x44 +
2639 tx_frame_802_3.an_tx_802_3_payload_len;
2640 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2641 ptr = (u_int8_t*)&an_tx_desc;
2642 for (i = 0; i < sizeof(an_tx_desc); i++) {
2643 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2644 ptr[i]);
2645 }
2646
7600679e 2647 BPF_MTAP(ifp, m0);
984263bc
MD
2648
2649 m_freem(m0);
2650 m0 = NULL;
2651
2652 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2653
2654 AN_INC(idx, AN_MAX_TX_DESC);
2655 sc->an_rdata.an_tx_empty = 0;
2656 }
2657 }
2658
2659 if (m0 != NULL)
2660 ifp->if_flags |= IFF_OACTIVE;
2661
2662 sc->an_rdata.an_tx_prod = idx;
2663
2664 /*
2665 * Set a timeout in case the chip goes out to lunch.
2666 */
2667 ifp->if_timer = 5;
2668
2669 return;
2670}
2671
2672void
2673an_stop(sc)
2674 struct an_softc *sc;
2675{
2676 struct ifnet *ifp;
2677 int i;
984263bc 2678
984263bc
MD
2679 ifp = &sc->arpcom.ac_if;
2680
41d6c56f
JS
2681 crit_enter();
2682
984263bc
MD
2683 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2684 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2685 an_cmd(sc, AN_CMD_DISABLE, 0);
2686
2687 for (i = 0; i < AN_TX_RING_CNT; i++)
2688 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2689
89c0f216 2690 callout_stop(&sc->an_stat_timer);
984263bc
MD
2691
2692 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2693
2694 if (sc->an_flash_buffer) {
2695 free(sc->an_flash_buffer, M_DEVBUF);
2696 sc->an_flash_buffer = NULL;
2697 }
2698
41d6c56f 2699 crit_exit();
984263bc
MD
2700}
2701
2702static void
2703an_watchdog(ifp)
2704 struct ifnet *ifp;
2705{
2706 struct an_softc *sc;
984263bc
MD
2707
2708 sc = ifp->if_softc;
984263bc 2709
41d6c56f 2710 crit_enter();
984263bc
MD
2711 an_reset(sc);
2712 if (sc->mpi350)
2713 an_init_mpi350_desc(sc);
2714 an_init(sc);
2715
2716 ifp->if_oerrors++;
41d6c56f 2717 crit_exit();
984263bc 2718
41d6c56f 2719 if_printf(ifp, "device timeout\n");
984263bc
MD
2720}
2721
2722void
2723an_shutdown(dev)
2724 device_t dev;
2725{
2726 struct an_softc *sc;
2727
2728 sc = device_get_softc(dev);
2729 an_stop(sc);
2730
2731 return;
2732}
2733
2734void
2735an_resume(dev)
2736 device_t dev;
2737{
2738 struct an_softc *sc;
2739 struct ifnet *ifp;
2740 int i;
2741
2742 sc = device_get_softc(dev);
2743 ifp = &sc->arpcom.ac_if;
2744
2745 an_reset(sc);
2746 if (sc->mpi350)
2747 an_init_mpi350_desc(sc);
2748 an_init(sc);
2749
2750 /* Recovery temporary keys */
2751 for (i = 0; i < 4; i++) {
2752 sc->areq.an_type = AN_RID_WEP_TEMP;
2753 sc->areq.an_len = sizeof(struct an_ltv_key);
2754 bcopy(&sc->an_temp_keys[i],
2755 &sc->areq, sizeof(struct an_ltv_key));
2756 an_setdef(sc, &sc->areq);
2757 }
2758
2759 if (ifp->if_flags & IFF_UP)
2760 an_start(ifp);
2761
2762 return;
2763}
2764
2765#ifdef ANCACHE
2766/* Aironet signal strength cache code.
2767 * store signal/noise/quality on per MAC src basis in
2768 * a small fixed cache. The cache wraps if > MAX slots
2769 * used. The cache may be zeroed out to start over.
2770 * Two simple filters exist to reduce computation:
2771 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2772 * to ignore some packets. It defaults to ip only.
2773 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2774 * 2. multicast/broadcast only. This may be used to
2775 * ignore unicast packets and only cache signal strength
2776 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2777 * beacons and not unicast traffic.
2778 *
2779 * The cache stores (MAC src(index), IP src (major clue), signal,
2780 * quality, noise)
2781 *
2782 * No apologies for storing IP src here. It's easy and saves much
2783 * trouble elsewhere. The cache is assumed to be INET dependent,
2784 * although it need not be.
2785 *
2786 * Note: the Aironet only has a single byte of signal strength value
2787 * in the rx frame header, and it's not scaled to anything sensible.
2788 * This is kind of lame, but it's all we've got.
2789 */
2790
2791#ifdef documentation
2792
2793int an_sigitems; /* number of cached entries */
2794struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2795int an_nextitem; /* index/# of entries */
2796
2797
2798#endif
2799
2800/* control variables for cache filtering. Basic idea is
2801 * to reduce cost (e.g., to only Mobile-IP agent beacons
2802 * which are broadcast or multicast). Still you might
2803 * want to measure signal strength anth unicast ping packets
2804 * on a pt. to pt. ant. setup.
2805 */
2806/* set true if you want to limit cache items to broadcast/mcast
2807 * only packets (not unicast). Useful for mobile-ip beacons which
2808 * are broadcast/multicast at network layer. Default is all packets
2809 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2810 */
2811static int an_cache_mcastonly = 0;
2812SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2813 &an_cache_mcastonly, 0, "");
2814
2815/* set true if you want to limit cache items to IP packets only
2816*/
2817static int an_cache_iponly = 1;
2818SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2819 &an_cache_iponly, 0, "");
2820
2821/*
2822 * an_cache_store, per rx packet store signal
2823 * strength in MAC (src) indexed cache.
2824 */
2825static void
3013ac0e 2826an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2827 struct an_softc *sc;
984263bc
MD
2828 struct mbuf *m;
2829 u_int8_t rx_rssi;
2830 u_int8_t rx_quality;
2831{
3013ac0e
JS
2832 struct ether_header *eh = mtod(m, struct ether_header *);
2833 struct ip *ip = NULL;
984263bc
MD
2834 int i;
2835 static int cache_slot = 0; /* use this cache entry */
2836 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2837
2838 /* filters:
2839 * 1. ip only
2840 * 2. configurable filter to throw out unicast packets,
2841 * keep multicast only.
2842 */
2843
3013ac0e
JS
2844 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2845 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2846 else if (an_cache_iponly)
984263bc 2847 return;
984263bc
MD
2848
2849 /* filter for broadcast/multicast only
2850 */
2851 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2852 return;
2853 }
2854
2855#ifdef SIGDEBUG
1c70eebf
JS
2856 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2857 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2858#endif
2859
984263bc
MD
2860 /* do a linear search for a matching MAC address
2861 * in the cache table
2862 * . MAC address is 6 bytes,
2863 * . var w_nextitem holds total number of entries already cached
2864 */
2865 for (i = 0; i < sc->an_nextitem; i++) {
2866 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2867 /* Match!,
2868 * so we already have this entry,
2869 * update the data
2870 */
2871 break;
2872 }
2873 }
2874
2875 /* did we find a matching mac address?
2876 * if yes, then overwrite a previously existing cache entry
2877 */
2878 if (i < sc->an_nextitem ) {
2879 cache_slot = i;
2880 }
2881 /* else, have a new address entry,so
2882 * add this new entry,
2883 * if table full, then we need to replace LRU entry
2884 */
2885 else {
2886
2887 /* check for space in cache table
2888 * note: an_nextitem also holds number of entries
2889 * added in the cache table
2890 */
2891 if ( sc->an_nextitem < MAXANCACHE ) {
2892 cache_slot = sc->an_nextitem;
2893 sc->an_nextitem++;
2894 sc->an_sigitems = sc->an_nextitem;
2895 }
2896 /* no space found, so simply wrap anth wrap index
2897 * and "zap" the next entry
2898 */
2899 else {
2900 if (wrapindex == MAXANCACHE) {
2901 wrapindex = 0;
2902 }
2903 cache_slot = wrapindex++;
2904 }
2905 }
2906
2907 /* invariant: cache_slot now points at some slot
2908 * in cache.
2909 */
2910 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2911 log(LOG_ERR, "an_cache_store, bad index: %d of "
2912 "[0..%d], gross cache error\n",
2913 cache_slot, MAXANCACHE);
2914 return;
2915 }
2916
2917 /* store items in cache
2918 * .ip source address
2919 * .mac src
2920 * .signal, etc.
2921 */
3013ac0e 2922 if (ip != NULL) {
984263bc
MD
2923 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2924 }
2925 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2926
2927
2928 switch (an_cache_mode) {
2929 case DBM:
2930 if (sc->an_have_rssimap) {
2931 sc->an_sigcache[cache_slot].signal =
2932 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2933 sc->an_sigcache[cache_slot].quality =
2934 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2935 } else {
2936 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2937 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2938 }
2939 break;
2940 case PERCENT:
2941 if (sc->an_have_rssimap) {
2942 sc->an_sigcache[cache_slot].signal =
2943 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2944 sc->an_sigcache[cache_slot].quality =
2945 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2946 } else {
2947 if (rx_rssi > 100)
2948 rx_rssi = 100;
2949 if (rx_quality > 100)
2950 rx_quality = 100;
2951 sc->an_sigcache[cache_slot].signal = rx_rssi;
2952 sc->an_sigcache[cache_slot].quality = rx_quality;
2953 }
2954 break;
2955 case RAW:
2956 sc->an_sigcache[cache_slot].signal = rx_rssi;
2957 sc->an_sigcache[cache_slot].quality = rx_quality;
2958 break;
2959 }
2960
2961 sc->an_sigcache[cache_slot].noise = 0;
2962
2963 return;
2964}
2965#endif
2966
2967static int
2968an_media_change(ifp)
2969 struct ifnet *ifp;
2970{
2971 struct an_softc *sc = ifp->if_softc;
2972 struct an_ltv_genconfig *cfg;
2973 int otype = sc->an_config.an_opmode;
2974 int orate = sc->an_tx_rate;
2975
2976 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
2977 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
2978 else
2979 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
2980
2981 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
2982 case IFM_IEEE80211_DS1:
2983 sc->an_tx_rate = AN_RATE_1MBPS;
2984 break;
2985 case IFM_IEEE80211_DS2:
2986 sc->an_tx_rate = AN_RATE_2MBPS;
2987 break;
2988 case IFM_IEEE80211_DS5:
2989 sc->an_tx_rate = AN_RATE_5_5MBPS;
2990 break;
2991 case IFM_IEEE80211_DS11:
2992 sc->an_tx_rate = AN_RATE_11MBPS;
2993 break;
2994 case IFM_AUTO:
2995 sc->an_tx_rate = 0;
2996 break;
2997 }
2998
2999 if (orate != sc->an_tx_rate) {
3000 /* Read the current configuration */
3001 sc->an_config.an_type = AN_RID_GENCONFIG;
3002 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3003 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3004 cfg = &sc->an_config;
3005
3006 /* clear other rates and set the only one we want */
3007 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3008 cfg->an_rates[0] = sc->an_tx_rate;
3009
3010 /* Save the new rate */
3011 sc->an_config.an_type = AN_RID_GENCONFIG;
3012 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3013 }
3014
3015 if (otype != sc->an_config.an_opmode ||
3016 orate != sc->an_tx_rate)
3017 an_init(sc);
3018
3019 return(0);
3020}
3021
3022static void
3023an_media_status(ifp, imr)
3024 struct ifnet *ifp;
3025 struct ifmediareq *imr;
3026{
3027 struct an_ltv_status status;
3028 struct an_softc *sc = ifp->if_softc;
3029
3030 status.an_len = sizeof(status);
3031 status.an_type = AN_RID_STATUS;
3032 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3033 /* If the status read fails, just lie. */
3034 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3035 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3036 }
3037
3038 if (sc->an_tx_rate == 0) {
3039 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3040 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3041 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3042 switch (status.an_current_tx_rate) {
3043 case AN_RATE_1MBPS:
3044 imr->ifm_active |= IFM_IEEE80211_DS1;
3045 break;
3046 case AN_RATE_2MBPS:
3047 imr->ifm_active |= IFM_IEEE80211_DS2;
3048 break;
3049 case AN_RATE_5_5MBPS:
3050 imr->ifm_active |= IFM_IEEE80211_DS5;
3051 break;
3052 case AN_RATE_11MBPS:
3053 imr->ifm_active |= IFM_IEEE80211_DS11;
3054 break;
3055 }
3056 } else {
3057 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3058 }
3059
3060 imr->ifm_status = IFM_AVALID;
3061 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3062 imr->ifm_status |= IFM_ACTIVE;
3063}
3064
3065/********************** Cisco utility support routines *************/
3066
3067/*
3068 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3069 * Linux driver
3070 */
3071
3072static int
3073readrids(ifp, l_ioctl)
3074 struct ifnet *ifp;
3075 struct aironet_ioctl *l_ioctl;
3076{
3077 unsigned short rid;
3078 struct an_softc *sc;
3079
3080 switch (l_ioctl->command) {
3081 case AIROGCAP:
3082 rid = AN_RID_CAPABILITIES;
3083 break;
3084 case AIROGCFG:
3085 rid = AN_RID_GENCONFIG;
3086 break;
3087 case AIROGSLIST:
3088 rid = AN_RID_SSIDLIST;
3089 break;
3090 case AIROGVLIST:
3091 rid = AN_RID_APLIST;
3092 break;
3093 case AIROGDRVNAM:
3094 rid = AN_RID_DRVNAME;
3095 break;
3096 case AIROGEHTENC:
3097 rid = AN_RID_ENCAPPROTO;
3098 break;
3099 case AIROGWEPKTMP:
3100 rid = AN_RID_WEP_TEMP;
3101 break;
3102 case AIROGWEPKNV:
3103 rid = AN_RID_WEP_PERM;
3104 break;
3105 case AIROGSTAT:
3106 rid = AN_RID_STATUS;
3107 break;
3108 case AIROGSTATSD32:
3109 rid = AN_RID_32BITS_DELTA;
3110 break;
3111 case AIROGSTATSC32:
3112 rid = AN_RID_32BITS_CUM;
3113 break;
3114 default:
3115 rid = 999;
3116 break;
3117 }
3118
3119 if (rid == 999) /* Is bad command */
3120 return -EINVAL;
3121
3122 sc = ifp->if_softc;
3123 sc->areq.an_len = AN_MAX_DATALEN;
3124 sc->areq.an_type = rid;
3125
3126 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3127
3128 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3129
3130 /* the data contains the length at first */
3131 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3132 sizeof(sc->areq.an_len))) {
3133 return -EFAULT;
3134 }
3135 /* Just copy the data back */
3136 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3137 l_ioctl->len)) {
3138 return -EFAULT;
3139 }
3140 return 0;
3141}
3142
3143static int
3144writerids(ifp, l_ioctl)
3145 struct ifnet *ifp;
3146 struct aironet_ioctl *l_ioctl;
3147{
3148 struct an_softc *sc;
3149 int rid, command;
3150
3151 sc = ifp->if_softc;
3152 rid = 0;
3153 command = l_ioctl->command;
3154
3155 switch (command) {
3156 case AIROPSIDS:
3157 rid = AN_RID_SSIDLIST;
3158 break;
3159 case AIROPCAP:
3160 rid = AN_RID_CAPABILITIES;
3161 break;
3162 case AIROPAPLIST:
3163 rid = AN_RID_APLIST;
3164 break;
3165 case AIROPCFG:
3166 rid = AN_RID_GENCONFIG;
3167 break;
3168 case AIROPMACON:
3169 an_cmd(sc, AN_CMD_ENABLE, 0);
3170 return 0;
3171 break;
3172 case AIROPMACOFF:
3173 an_cmd(sc, AN_CMD_DISABLE, 0);
3174 return 0;
3175 break;
3176 case AIROPSTCLR:
3177 /*
3178 * This command merely clears the counts does not actually
3179 * store any data only reads rid. But as it changes the cards
3180 * state, I put it in the writerid routines.
3181 */
3182
3183 rid = AN_RID_32BITS_DELTACLR;
3184 sc = ifp->if_softc;
3185 sc->areq.an_len = AN_MAX_DATALEN;
3186 sc->areq.an_type = rid;
3187
3188 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3189 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3190
3191 /* the data contains the length at first */
3192 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3193 sizeof(sc->areq.an_len))) {
3194 return -EFAULT;
3195 }
3196 /* Just copy the data */
3197 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3198 l_ioctl->len)) {
3199 return -EFAULT;
3200 }
3201 return 0;
3202 break;
3203 case AIROPWEPKEY:
3204 rid = AN_RID_WEP_TEMP;
3205 break;
3206 case AIROPWEPKEYNV:
3207 rid = AN_RID_WEP_PERM;
3208 break;
3209 case AIROPLEAPUSR:
3210 rid = AN_RID_LEAPUSERNAME;
3211 break;
3212 case AIROPLEAPPWD:
3213 rid = AN_RID_LEAPPASSWORD;
3214 break;
3215 default:
3216 return -EOPNOTSUPP;
3217 }
3218
3219 if (rid) {
3220 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3221 return -EINVAL;
3222 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3223 sc->areq.an_type = rid;
3224
3225 /* Just copy the data back */
3226 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3227 l_ioctl->len);
3228
3229 an_cmd(sc, AN_CMD_DISABLE, 0);
3230 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3231 an_cmd(sc, AN_CMD_ENABLE, 0);
3232 return 0;
3233 }
3234 return -EOPNOTSUPP;
3235}
3236
3237/*
3238 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3239 * Linux driver
3240 */
3241
377d4740 3242#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3243#define FLASH_COMMAND 0x7e7e
3244#define FLASH_SIZE 32 * 1024
3245
3246static int
3247unstickbusy(ifp)
3248 struct ifnet *ifp;
3249{
3250 struct an_softc *sc = ifp->if_softc;
3251
3252 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3253 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3254 AN_EV_CLR_STUCK_BUSY);
3255 return 1;
3256 }
3257 return 0;
3258}
3259
3260/*
3261 * Wait for busy completion from card wait for delay uSec's Return true for
3262 * success meaning command reg is clear
3263 */
3264
3265static int
3266WaitBusy(ifp, uSec)
3267 struct ifnet *ifp;
3268 int uSec;
3269{
3270 int statword = 0xffff;
3271 int delay = 0;
3272 struct an_softc *sc = ifp->if_softc;
3273
3274 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3275 FLASH_DELAY(10);
3276 delay += 10;
3277 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3278
3279 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3280 unstickbusy(ifp);
3281 }
3282 }
3283
3284 return 0 == (AN_CMD_BUSY & statword);
3285}
3286
3287/*
3288 * STEP 1) Disable MAC and do soft reset on card.
3289 */
3290
3291static int
3292cmdreset(ifp)
3293 struct ifnet *ifp;
3294{
3295 int status;
3296 struct an_softc *sc = ifp->if_softc;
3297
3298 an_stop(sc);
3299
3300 an_cmd(sc, AN_CMD_DISABLE, 0);
3301
3302 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3303 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3304 return -EBUSY;
3305 }
3306 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3307
3308 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3309
3310
3311 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3312 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3313 return -EBUSY;
3314 }
3315 return 0;
3316}
3317
3318/*
3319 * STEP 2) Put the card in legendary flash mode
3320 */
3321
3322static int
3323setflashmode(ifp)
3324 struct ifnet *ifp;
3325{
3326 int status;
3327 struct an_softc *sc = ifp->if_softc;
3328
3329 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3330 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3331 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3332 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3333
3334 /*
3335 * mdelay(500); // 500ms delay
3336 */
3337
3338 FLASH_DELAY(500);
3339
3340 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3341 printf("Waitbusy hang after setflash mode\n");
3342 return -EIO;
3343 }
3344 return 0;
3345}
3346
3347/*
3348 * Get a character from the card matching matchbyte Step 3)
3349 */
3350
3351static int
3352flashgchar(ifp, matchbyte, dwelltime)
3353 struct ifnet *ifp;
3354 int matchbyte;
3355 int dwelltime;
3356{
3357 int rchar;
3358 unsigned char rbyte = 0;
3359 int success = -1;
3360 struct an_softc *sc = ifp->if_softc;
3361
3362
3363 do {
3364 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3365
3366 if (dwelltime && !(0x8000 & rchar)) {
3367 dwelltime -= 10;
3368 FLASH_DELAY(10);
3369 continue;
3370 }
3371 rbyte = 0xff & rchar;
3372
3373 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3374 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3375 success = 1;
3376 break;
3377 }
3378 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3379 break;
3380 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3381
3382 } while (dwelltime > 0);
3383 return success;
3384}
3385
3386/*
3387 * Put character to SWS0 wait for dwelltime x 50us for echo .
3388 */
3389
3390static int
3391flashpchar(ifp, byte, dwelltime)
3392 struct ifnet *ifp;
3393 int byte;
3394 int dwelltime;
3395{
3396 int echo;
3397 int pollbusy, waittime;
3398 struct an_softc *sc = ifp->if_softc;
3399
3400 byte |= 0x8000;
3401
3402 if (dwelltime == 0)
3403 dwelltime = 200;
3404
3405 waittime = dwelltime;
3406
3407 /*
3408 * Wait for busy bit d15 to go false indicating buffer empty
3409 */
3410 do {
3411 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3412
3413 if (pollbusy & 0x8000) {
3414 FLASH_DELAY(50);
3415 waittime -= 50;
3416 continue;
3417 } else
3418 break;
3419 }
3420 while (waittime >= 0);
3421
3422 /* timeout for busy clear wait */
3423
3424 if (waittime <= 0) {
1c70eebf 3425 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3426 return -1;
3427 }
3428 /*
3429 * Port is clear now write byte and wait for it to echo back
3430 */
3431 do {
3432 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3433 FLASH_DELAY(50);
3434 dwelltime -= 50;
3435 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3436 } while (dwelltime >= 0 && echo != byte);
3437
3438
3439 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3440
3441 return echo == byte;
3442}
3443
3444/*
3445 * Transfer 32k of firmware data from user buffer to our buffer and send to
3446 * the card
3447 */
3448
3449static int
3450flashputbuf(ifp)
3451 struct ifnet *ifp;
3452{
3453 unsigned short *bufp;
3454 int nwords;
3455 struct an_softc *sc = ifp->if_softc;
3456
3457 /* Write stuff */
3458
3459 bufp = sc->an_flash_buffer;
3460
3461 if (!sc->mpi350) {
3462 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3463 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3464
3465 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3466 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3467 }
3468 } else {
3469 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3470 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3471 ((u_int32_t *)bufp)[nwords] & 0xffff);
3472 }
3473 }
3474
3475 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3476
3477 return 0;
3478}
3479
3480/*
3481 * After flashing restart the card.
3482 */
3483
3484static int
3485flashrestart(ifp)
3486 struct ifnet *ifp;
3487{
3488 int status = 0;
3489 struct an_softc *sc = ifp->if_softc;
3490
3491 FLASH_DELAY(1024); /* Added 12/7/00 */
3492
3493 an_init(sc);
3494
3495 FLASH_DELAY(1024); /* Added 12/7/00 */
3496 return status;
3497}
3498
3499/*
3500 * Entry point for flash ioclt.
3501 */
3502
3503static int
3504flashcard(ifp, l_ioctl)
3505 struct ifnet *ifp;
3506 struct aironet_ioctl *l_ioctl;
3507{
3508 int z = 0, status;
3509 struct an_softc *sc;
3510
3511 sc = ifp->if_softc;
3512 if (sc->mpi350) {
1c70eebf 3513 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3514 return(-1);
3515 }
3516 status = l_ioctl->command;
3517
3518 switch (l_ioctl->command) {
3519 case AIROFLSHRST:
3520 return cmdreset(ifp);
3521 break;
3522 case AIROFLSHSTFL:
3523 if (sc->an_flash_buffer) {
3524 free(sc->an_flash_buffer, M_DEVBUF);
3525 sc->an_flash_buffer = NULL;
3526 }
3527 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3528 if (sc->an_flash_buffer)
3529 return setflashmode(ifp);
3530 else
3531 return ENOBUFS;
3532 break;
3533 case AIROFLSHGCHR: /* Get char from aux */
3534 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3535 z = *(int *)&sc->areq;
3536 if ((status = flashgchar(ifp, z, 8000)) == 1)
3537 return 0;
3538 else
3539 return -1;
3540 break;
3541 case AIROFLSHPCHR: /* Send char to card. */
3542 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3543 z = *(int *)&sc->areq;
3544 if ((status = flashpchar(ifp, z, 8000)) == -1)
3545 return -EIO;
3546 else
3547 return 0;
3548 break;
3549 case AIROFLPUTBUF: /* Send 32k to card */
3550 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3551 if_printf(ifp, "Buffer to big, %x %x\n",
3552 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3553 return -EINVAL;
3554 }
3555 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3556
3557 if ((status = flashputbuf(ifp)) != 0)
3558 return -EIO;
3559 else
3560 return 0;
3561 break;
3562 case AIRORESTART:
3563 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3564 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3565 return -EIO;
3566 } else
3567 return 0;
3568
3569 break;
3570 default:
3571 return -EINVAL;
3572 }
3573
3574 return -EINVAL;
3575}