[dragonfly.git] / sys / dev / netif / ixgbe / ixgbe_osdep.h

/******************************************************************************

  Copyright (c) 2001-2012, Intel Corporation 
  All rights reserved.
  
  Redistribution and use in source and binary forms, with or without 
  modification, are permitted provided that the following conditions are met:
  
   1. Redistributions of source code must retain the above copyright notice, 
      this list of conditions and the following disclaimer.
  
   2. Redistributions in binary form must reproduce the above copyright 
      notice, this list of conditions and the following disclaimer in the 
      documentation and/or other materials provided with the distribution.
  
   3. Neither the name of the Intel Corporation nor the names of its 
      contributors may be used to endorse or promote products derived from 
      this software without specific prior written permission.
  
  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  POSSIBILITY OF SUCH DAMAGE.

******************************************************************************/
/*$FreeBSD: src/sys/dev/ixgbe/ixgbe_osdep.h,v 1.13 2012/07/05 20:51:44 jfv Exp $*/

#ifndef _IXGBE_OS_H_
#define _IXGBE_OS_H_

#include <sys/types.h>
#include <sys/param.h>
#include <sys/endian.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/protosw.h>
#include <sys/socket.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/rman.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/clock.h>
#include <bus/pci/pcivar.h>
#include <bus/pci/pcireg.h>

#define ASSERT(x) if(!(x)) panic("IXGBE: x")
#define EWARN(H, W, S) kprintf(W)

/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
#define usec_delay(x) DELAY(x)
#define msec_delay(x) DELAY(1000*(x))

#define DBG 0
#define MSGOUT(S, A, B)     kprintf(S "\n", A, B)
#define DEBUGFUNC(F)        DEBUGOUT(F);
#if DBG
	#define DEBUGOUT(S)         kprintf(S "\n")
	#define DEBUGOUT1(S,A)      kprintf(S "\n",A)
	#define DEBUGOUT2(S,A,B)    kprintf(S "\n",A,B)
	#define DEBUGOUT3(S,A,B,C)  kprintf(S "\n",A,B,C)
	#define DEBUGOUT4(S,A,B,C,D)  kprintf(S "\n",A,B,C,D)
	#define DEBUGOUT5(S,A,B,C,D,E)  kprintf(S "\n",A,B,C,D,E)
	#define DEBUGOUT6(S,A,B,C,D,E,F)  kprintf(S "\n",A,B,C,D,E,F)
	#define DEBUGOUT6(S,A,B,C,D,E,F)    kprintf(S "\n",A,B,C,D,E,F)
	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  kprintf(S "\n",A,B,C,D,E,F,G)
#else
	#define DEBUGOUT(S)
	#define DEBUGOUT1(S,A)
	#define DEBUGOUT2(S,A,B)
	#define DEBUGOUT3(S,A,B,C)
	#define DEBUGOUT4(S,A,B,C,D)
	#define DEBUGOUT5(S,A,B,C,D,E)
	#define DEBUGOUT6(S,A,B,C,D,E,F)
	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
#endif

#define FALSE               0
#define false               0 /* shared code requires this */
#define TRUE                1
#define true                1
#define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
#define PCI_COMMAND_REGISTER            PCIR_COMMAND

/* Bunch of defines for shared code bogosity */
#define UNREFERENCED_PARAMETER(_p)
#define UNREFERENCED_1PARAMETER(_p)
#define UNREFERENCED_2PARAMETER(_p, _q)
#define UNREFERENCED_3PARAMETER(_p, _q, _r)
#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)


#define IXGBE_NTOHL(_i)	ntohl(_i)
#define IXGBE_NTOHS(_i)	ntohs(_i)

/* XXX these need to be revisited */
#define IXGBE_CPU_TO_LE32 le32toh
#define IXGBE_LE32_TO_CPUS le32dec

typedef uint8_t		u8;
typedef int8_t		s8;
typedef uint16_t	u16;
typedef uint32_t	u32;
typedef int32_t		s32;
typedef uint64_t	u64;
#ifndef __bool_true_false_are_defined
typedef boolean_t	bool;
#endif

/* shared code requires this */
#define __le16  u16
#define __le32  u32
#define __le64  u64
#define __be16  u16
#define __be32  u32
#define __be64  u64

#define le16_to_cpu 

#if defined(__i386__) || defined(__amd64__)
#define wmb()	__asm volatile("sfence" ::: "memory")
#else
#define wmb()
#endif

#if defined(__i386__) || defined(__amd64__)
static __inline
void prefetch(void *x)
{
	__asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
}
#else
#define prefetch(x)
#endif

struct ixgbe_osdep
{
	bus_space_tag_t    mem_bus_space_tag;
	bus_space_handle_t mem_bus_space_handle;
	struct device     *dev;
};

/* These routines are needed by the shared code */
struct ixgbe_hw; 
extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg

extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg

#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)

#define IXGBE_READ_REG(a, reg) (\
   bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
                     ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
                     reg))

#define IXGBE_WRITE_REG(a, reg, value) (\
   bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
                     ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
                     reg, value))


#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
   bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
                     ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
                     (reg + ((offset) << 2))))

#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
      bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
                      ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
                      (reg + ((offset) << 2)), value))


#endif /* _IXGBE_OS_H_ */
Commit	Line	Data
9407f759 FT	1	/******************************************************************************
	2
	3	Copyright (c) 2001-2012, Intel Corporation
	4	All rights reserved.
	5
	6	Redistribution and use in source and binary forms, with or without
	7	modification, are permitted provided that the following conditions are met:
	8
	9	1. Redistributions of source code must retain the above copyright notice,
	10	this list of conditions and the following disclaimer.
	11
	12	2. Redistributions in binary form must reproduce the above copyright
	13	notice, this list of conditions and the following disclaimer in the
	14	documentation and/or other materials provided with the distribution.
	15
	16	3. Neither the name of the Intel Corporation nor the names of its
	17	contributors may be used to endorse or promote products derived from
	18	this software without specific prior written permission.
	19
	20	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	21	AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	22	IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	23	ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
	24	LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	25	CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	26	SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
	27	INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
	28	CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	29	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	30	POSSIBILITY OF SUCH DAMAGE.
	31
	32	******************************************************************************/
ce451236	33	/$FreeBSD: src/sys/dev/ixgbe/ixgbe_osdep.h,v 1.13 2012/07/05 20:51:44 jfv Exp $/
9407f759 FT	34
	35	#ifndef _IXGBE_OS_H_
	36	#define _IXGBE_OS_H_
	37
	38	#include <sys/types.h>
	39	#include <sys/param.h>
	40	#include <sys/endian.h>
	41	#include <sys/systm.h>
	42	#include <sys/mbuf.h>
	43	#include <sys/protosw.h>
	44	#include <sys/socket.h>
	45	#include <sys/malloc.h>
	46	#include <sys/kernel.h>
	47	#include <sys/bus.h>
	48	#include <sys/rman.h>
	49	#include <vm/vm.h>
	50	#include <vm/pmap.h>
	51	#include <machine/clock.h>
	52	#include <bus/pci/pcivar.h>
	53	#include <bus/pci/pcireg.h>
	54
	55	#define ASSERT(x) if(!(x)) panic("IXGBE: x")
ce451236	56	#define EWARN(H, W, S) kprintf(W)
9407f759 FT	57
	58	/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
	59	#define usec_delay(x) DELAY(x)
	60	#define msec_delay(x) DELAY(1000*(x))
	61
5b016eae FT	62	#define DBG 0
5b016eae FT	63	#define MSGOUT(S, A, B) kprintf(S "\n", A, B)
9407f759 FT	64	#define DEBUGFUNC(F) DEBUGOUT(F);
9407f759 FT	65	#if DBG
5b016eae FT	66	#define DEBUGOUT(S) kprintf(S "\n")
	67	#define DEBUGOUT1(S,A) kprintf(S "\n",A)
	68	#define DEBUGOUT2(S,A,B) kprintf(S "\n",A,B)
	69	#define DEBUGOUT3(S,A,B,C) kprintf(S "\n",A,B,C)
875952bd FT	70	#define DEBUGOUT4(S,A,B,C,D) kprintf(S "\n",A,B,C,D)
	71	#define DEBUGOUT5(S,A,B,C,D,E) kprintf(S "\n",A,B,C,D,E)
	72	#define DEBUGOUT6(S,A,B,C,D,E,F) kprintf(S "\n",A,B,C,D,E,F)
5b016eae FT	73	#define DEBUGOUT6(S,A,B,C,D,E,F) kprintf(S "\n",A,B,C,D,E,F)
5b016eae FT	74	#define DEBUGOUT7(S,A,B,C,D,E,F,G) kprintf(S "\n",A,B,C,D,E,F,G)
9407f759 FT	75	#else
	76	#define DEBUGOUT(S)
	77	#define DEBUGOUT1(S,A)
	78	#define DEBUGOUT2(S,A,B)
	79	#define DEBUGOUT3(S,A,B,C)
875952bd FT	80	#define DEBUGOUT4(S,A,B,C,D)
875952bd FT	81	#define DEBUGOUT5(S,A,B,C,D,E)
9407f759 FT	82	#define DEBUGOUT6(S,A,B,C,D,E,F)
	83	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
	84	#endif
	85
	86	#define FALSE 0
	87	#define false 0 /* shared code requires this */
	88	#define TRUE 1
	89	#define true 1
	90	#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
	91	#define PCI_COMMAND_REGISTER PCIR_COMMAND
	92
	93	/* Bunch of defines for shared code bogosity */
	94	#define UNREFERENCED_PARAMETER(_p)
	95	#define UNREFERENCED_1PARAMETER(_p)
	96	#define UNREFERENCED_2PARAMETER(_p, _q)
	97	#define UNREFERENCED_3PARAMETER(_p, _q, _r)
	98	#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
	99
	100
	101	#define IXGBE_NTOHL(_i) ntohl(_i)
	102	#define IXGBE_NTOHS(_i) ntohs(_i)
	103
	104	/* XXX these need to be revisited */
	105	#define IXGBE_CPU_TO_LE32 le32toh
	106	#define IXGBE_LE32_TO_CPUS le32dec
	107
	108	typedef uint8_t u8;
	109	typedef int8_t s8;
	110	typedef uint16_t u16;
	111	typedef uint32_t u32;
	112	typedef int32_t s32;
	113	typedef uint64_t u64;
	114	#ifndef __bool_true_false_are_defined
	115	typedef boolean_t bool;
	116	#endif
	117
ce451236 FT	118	/* shared code requires this */
	119	#define __le16 u16
	120	#define __le32 u32
	121	#define __le64 u64
	122	#define __be16 u16
	123	#define __be32 u32
	124	#define __be64 u64
	125
9407f759 FT	126	#define le16_to_cpu
9407f759 FT	127
9407f759	128	#if defined(__i386__) \|\| defined(__amd64__)
9407f759	129	#define wmb() __asm volatile("sfence" ::: "memory")
9407f759	130	#else
9407f759 FT	131	#define wmb()
9407f759 FT	132	#endif
9407f759 FT	133
	134	#if defined(__i386__) \|\| defined(__amd64__)
	135	static __inline
	136	void prefetch(void *x)
	137	{
	138	__asm volatile("prefetcht0 %0" :: "m" ((unsigned long )x));
	139	}
	140	#else
	141	#define prefetch(x)
	142	#endif
	143
	144	struct ixgbe_osdep
	145	{
	146	bus_space_tag_t mem_bus_space_tag;
	147	bus_space_handle_t mem_bus_space_handle;
	148	struct device *dev;
	149	};
	150
	151	/* These routines are needed by the shared code */
	152	struct ixgbe_hw;
	153	extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
	154	#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
	155
	156	extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
	157	#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
	158
	159	#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
	160
	161	#define IXGBE_READ_REG(a, reg) (\
	162	bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
	163	((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
	164	reg))
	165
	166	#define IXGBE_WRITE_REG(a, reg, value) (\
	167	bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
	168	((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
	169	reg, value))
	170
	171
	172	#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
	173	bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
	174	((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
	175	(reg + ((offset) << 2))))
	176
	177	#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
	178	bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
	179	((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
	180	(reg + ((offset) << 2)), value))
	181
	182
	183	#endif /* _IXGBE_OS_H_ */