Fix two bugs in split in split revealed after my optimization in
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
65957d54 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.39 2003/10/24 14:10:45 daver Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
57#include "opt_user_ldt.h"
58#include "opt_userconfig.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/sysproto.h>
63#include <sys/signalvar.h>
64#include <sys/kernel.h>
65#include <sys/linker.h>
66#include <sys/malloc.h>
67#include <sys/proc.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/mbuf.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
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105#ifdef SMP
106#include <machine/smp.h>
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107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
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115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
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118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
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181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
240int bootverbose = 0, Maxmem = 0;
241long dumplo;
242
243vm_offset_t phys_avail[10];
244
245/* must be 2 less so 0 0 can signal end of chunks */
246#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
247
248static vm_offset_t buffer_sva, buffer_eva;
249vm_offset_t clean_sva, clean_eva;
250static vm_offset_t pager_sva, pager_eva;
251static struct trapframe proc0_tf;
252
253static void
254cpu_startup(dummy)
255 void *dummy;
256{
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257 unsigned i;
258 caddr_t v;
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259 vm_offset_t maxaddr;
260 vm_size_t size = 0;
261 int firstaddr;
262 vm_offset_t minaddr;
263
264 if (boothowto & RB_VERBOSE)
265 bootverbose++;
266
267 /*
268 * Good {morning,afternoon,evening,night}.
269 */
270 printf("%s", version);
271 startrtclock();
272 printcpuinfo();
273 panicifcpuunsupported();
274#ifdef PERFMON
275 perfmon_init();
276#endif
277 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
278 /*
279 * Display any holes after the first chunk of extended memory.
280 */
281 if (bootverbose) {
282 int indx;
283
284 printf("Physical memory chunk(s):\n");
285 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
286 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
287
288 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
289 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
290 size1 / PAGE_SIZE);
291 }
292 }
293
294 /*
295 * Calculate callout wheel size
296 */
297 for (callwheelsize = 1, callwheelbits = 0;
298 callwheelsize < ncallout;
299 callwheelsize <<= 1, ++callwheelbits)
300 ;
301 callwheelmask = callwheelsize - 1;
302
303 /*
304 * Allocate space for system data structures.
305 * The first available kernel virtual address is in "v".
306 * As pages of kernel virtual memory are allocated, "v" is incremented.
307 * As pages of memory are allocated and cleared,
308 * "firstaddr" is incremented.
309 * An index into the kernel page table corresponding to the
310 * virtual memory address maintained in "v" is kept in "mapaddr".
311 */
312
313 /*
314 * Make two passes. The first pass calculates how much memory is
315 * needed and allocates it. The second pass assigns virtual
316 * addresses to the various data structures.
317 */
318 firstaddr = 0;
319again:
320 v = (caddr_t)firstaddr;
321
322#define valloc(name, type, num) \
323 (name) = (type *)v; v = (caddr_t)((name)+(num))
324#define valloclim(name, type, num, lim) \
325 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
326
327 valloc(callout, struct callout, ncallout);
328 valloc(callwheel, struct callout_tailq, callwheelsize);
329
330 /*
331 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
332 * For the first 64MB of ram nominally allocate sufficient buffers to
333 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
334 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
335 * the buffer cache we limit the eventual kva reservation to
336 * maxbcache bytes.
337 *
338 * factor represents the 1/4 x ram conversion.
339 */
340 if (nbuf == 0) {
341 int factor = 4 * BKVASIZE / 1024;
342 int kbytes = physmem * (PAGE_SIZE / 1024);
343
344 nbuf = 50;
345 if (kbytes > 4096)
346 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
347 if (kbytes > 65536)
348 nbuf += (kbytes - 65536) * 2 / (factor * 5);
349 if (maxbcache && nbuf > maxbcache / BKVASIZE)
350 nbuf = maxbcache / BKVASIZE;
351 }
352
353 /*
354 * Do not allow the buffer_map to be more then 1/2 the size of the
355 * kernel_map.
356 */
357 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
358 (BKVASIZE * 2)) {
359 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
360 (BKVASIZE * 2);
361 printf("Warning: nbufs capped at %d\n", nbuf);
362 }
363
364 nswbuf = max(min(nbuf/4, 256), 16);
365#ifdef NSWBUF_MIN
366 if (nswbuf < NSWBUF_MIN)
367 nswbuf = NSWBUF_MIN;
368#endif
369#ifdef DIRECTIO
370 ffs_rawread_setup();
371#endif
372
373 valloc(swbuf, struct buf, nswbuf);
374 valloc(buf, struct buf, nbuf);
375 v = bufhashinit(v);
376
377 /*
378 * End of first pass, size has been calculated so allocate memory
379 */
380 if (firstaddr == 0) {
381 size = (vm_size_t)(v - firstaddr);
382 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
383 if (firstaddr == 0)
384 panic("startup: no room for tables");
385 goto again;
386 }
387
388 /*
389 * End of second pass, addresses have been assigned
390 */
391 if ((vm_size_t)(v - firstaddr) != size)
392 panic("startup: table size inconsistency");
393
394 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
395 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
396 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
397 (nbuf*BKVASIZE));
398 buffer_map->system_map = 1;
399 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
400 (nswbuf*MAXPHYS) + pager_map_size);
401 pager_map->system_map = 1;
402 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
403 (16*(ARG_MAX+(PAGE_SIZE*3))));
404
405 /*
406 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
407 * we use the more space efficient malloc in place of kmem_alloc.
408 */
409 {
410 vm_offset_t mb_map_size;
411
412 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
413 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
414 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
415 bzero(mclrefcnt, mb_map_size / MCLBYTES);
ce634264 416 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
03aa8d99 417 &maxaddr, mb_map_size);
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418 mb_map->system_map = 1;
419 }
420
421 /*
422 * Initialize callouts
423 */
424 SLIST_INIT(&callfree);
425 for (i = 0; i < ncallout; i++) {
426 callout_init(&callout[i]);
427 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
428 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
429 }
430
431 for (i = 0; i < callwheelsize; i++) {
432 TAILQ_INIT(&callwheel[i]);
433 }
434
435#if defined(USERCONFIG)
436 userconfig();
437 cninit(); /* the preferred console may have changed */
438#endif
439
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440 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
441 ptoa(vmstats.v_free_count) / 1024);
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442
443 /*
444 * Set up buffers, so they can be used to read disk labels.
445 */
446 bufinit();
447 vm_pager_bufferinit();
448
449#ifdef SMP
450 /*
451 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
452 */
453 mp_start(); /* fire up the APs and APICs */
454 mp_announce();
455#endif /* SMP */
456 cpu_setregs();
457}
458
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459/*
460 * Send an interrupt to process.
461 *
462 * Stack is set up to allow sigcode stored
463 * at top to call routine, followed by kcall
464 * to sigreturn routine below. After sigreturn
465 * resets the signal mask, the stack, and the
466 * frame pointer, it returns to the user
467 * specified pc, psl.
468 */
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469void
470sendsig(catcher, sig, mask, code)
471 sig_t catcher;
472 int sig;
473 sigset_t *mask;
474 u_long code;
475{
476 struct proc *p = curproc;
477 struct trapframe *regs;
478 struct sigacts *psp = p->p_sigacts;
479 struct sigframe sf, *sfp;
480 int oonstack;
481
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482 regs = p->p_md.md_regs;
483 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
484
485 /* save user context */
486 bzero(&sf, sizeof(struct sigframe));
487 sf.sf_uc.uc_sigmask = *mask;
488 sf.sf_uc.uc_stack = p->p_sigstk;
489 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
490 sf.sf_uc.uc_mcontext.mc_gs = rgs();
491 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
492
493 /* Allocate and validate space for the signal handler context. */
494 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
495 SIGISMEMBER(psp->ps_sigonstack, sig)) {
496 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
497 p->p_sigstk.ss_size - sizeof(struct sigframe));
498 p->p_sigstk.ss_flags |= SS_ONSTACK;
499 }
500 else
501 sfp = (struct sigframe *)regs->tf_esp - 1;
502
503 /* Translate the signal is appropriate */
504 if (p->p_sysent->sv_sigtbl) {
505 if (sig <= p->p_sysent->sv_sigsize)
506 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
507 }
508
509 /* Build the argument list for the signal handler. */
510 sf.sf_signum = sig;
511 sf.sf_ucontext = (register_t)&sfp->sf_uc;
512 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
513 /* Signal handler installed with SA_SIGINFO. */
514 sf.sf_siginfo = (register_t)&sfp->sf_si;
515 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
516
517 /* fill siginfo structure */
518 sf.sf_si.si_signo = sig;
519 sf.sf_si.si_code = code;
520 sf.sf_si.si_addr = (void*)regs->tf_err;
521 }
522 else {
523 /* Old FreeBSD-style arguments. */
524 sf.sf_siginfo = code;
525 sf.sf_addr = regs->tf_err;
526 sf.sf_ahu.sf_handler = catcher;
527 }
528
529 /*
530 * If we're a vm86 process, we want to save the segment registers.
531 * We also change eflags to be our emulated eflags, not the actual
532 * eflags.
533 */
534 if (regs->tf_eflags & PSL_VM) {
535 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 536 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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537
538 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
539 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
540 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
541 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
542
543 if (vm86->vm86_has_vme == 0)
544 sf.sf_uc.uc_mcontext.mc_eflags =
545 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
546 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
547
548 /*
549 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
550 * syscalls made by the signal handler. This just avoids
551 * wasting time for our lazy fixup of such faults. PSL_NT
552 * does nothing in vm86 mode, but vm86 programs can set it
553 * almost legitimately in probes for old cpu types.
554 */
555 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
556 }
557
558 /*
559 * Copy the sigframe out to the user's stack.
560 */
561 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
562 /*
563 * Something is wrong with the stack pointer.
564 * ...Kill the process.
565 */
566 sigexit(p, SIGILL);
567 }
568
569 regs->tf_esp = (int)sfp;
570 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
571 regs->tf_eflags &= ~PSL_T;
572 regs->tf_cs = _ucodesel;
573 regs->tf_ds = _udatasel;
574 regs->tf_es = _udatasel;
575 regs->tf_fs = _udatasel;
576 load_gs(_udatasel);
577 regs->tf_ss = _udatasel;
578}
579
580/*
65957d54 581 * sigreturn(ucontext_t *sigcntxp)
41c20dac 582 *
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583 * System call to cleanup state after a signal
584 * has been taken. Reset signal mask and
585 * stack state from context left by sendsig (above).
586 * Return to previous pc and psl as specified by
587 * context left by sendsig. Check carefully to
588 * make sure that the user has not modified the
589 * state to gain improper privileges.
590 */
591#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
592#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
593
984263bc 594int
41c20dac 595sigreturn(struct sigreturn_args *uap)
984263bc 596{
41c20dac 597 struct proc *p = curproc;
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598 struct trapframe *regs;
599 ucontext_t *ucp;
600 int cs, eflags;
601
602 ucp = uap->sigcntxp;
603
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604 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
605 return (EFAULT);
606
607 regs = p->p_md.md_regs;
608 eflags = ucp->uc_mcontext.mc_eflags;
609
610 if (eflags & PSL_VM) {
611 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
612 struct vm86_kernel *vm86;
613
614 /*
615 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
616 * set up the vm86 area, and we can't enter vm86 mode.
617 */
b7c628e4 618 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 619 return (EINVAL);
b7c628e4 620 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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621 if (vm86->vm86_inited == 0)
622 return (EINVAL);
623
624 /* go back to user mode if both flags are set */
625 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
626 trapsignal(p, SIGBUS, 0);
627
628 if (vm86->vm86_has_vme) {
629 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
630 (eflags & VME_USERCHANGE) | PSL_VM;
631 } else {
632 vm86->vm86_eflags = eflags; /* save VIF, VIP */
633 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
634 }
635 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
636 tf->tf_eflags = eflags;
637 tf->tf_vm86_ds = tf->tf_ds;
638 tf->tf_vm86_es = tf->tf_es;
639 tf->tf_vm86_fs = tf->tf_fs;
640 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
641 tf->tf_ds = _udatasel;
642 tf->tf_es = _udatasel;
643 tf->tf_fs = _udatasel;
644 } else {
645 /*
646 * Don't allow users to change privileged or reserved flags.
647 */
648 /*
649 * XXX do allow users to change the privileged flag PSL_RF.
650 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
651 * should sometimes set it there too. tf_eflags is kept in
652 * the signal context during signal handling and there is no
653 * other place to remember it, so the PSL_RF bit may be
654 * corrupted by the signal handler without us knowing.
655 * Corruption of the PSL_RF bit at worst causes one more or
656 * one less debugger trap, so allowing it is fairly harmless.
657 */
658 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
659 printf("sigreturn: eflags = 0x%x\n", eflags);
660 return(EINVAL);
661 }
662
663 /*
664 * Don't allow users to load a valid privileged %cs. Let the
665 * hardware check for invalid selectors, excess privilege in
666 * other selectors, invalid %eip's and invalid %esp's.
667 */
668 cs = ucp->uc_mcontext.mc_cs;
669 if (!CS_SECURE(cs)) {
670 printf("sigreturn: cs = 0x%x\n", cs);
671 trapsignal(p, SIGBUS, T_PROTFLT);
672 return(EINVAL);
673 }
674 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
675 }
676
677 if (ucp->uc_mcontext.mc_onstack & 1)
678 p->p_sigstk.ss_flags |= SS_ONSTACK;
679 else
680 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
681
682 p->p_sigmask = ucp->uc_sigmask;
683 SIG_CANTMASK(p->p_sigmask);
684 return(EJUSTRETURN);
685}
686
687/*
688 * Machine dependent boot() routine
689 *
690 * I haven't seen anything to put here yet
691 * Possibly some stuff might be grafted back here from boot()
692 */
693void
694cpu_boot(int howto)
695{
696}
697
698/*
699 * Shutdown the CPU as much as possible
700 */
701void
702cpu_halt(void)
703{
704 for (;;)
705 __asm__ ("hlt");
706}
707
708/*
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709 * cpu_idle() represents the idle LWKT. You cannot return from this function
710 * (unless you want to blow things up!). Instead we look for runnable threads
711 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 712 *
26a0694b 713 * The main loop is entered with a critical section held, we must release
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714 * the critical section before doing anything else. lwkt_switch() will
715 * check for pending interrupts due to entering and exiting its own
716 * critical section.
26a0694b 717 *
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718 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
719 * to wake a HLTed cpu up. However, there are cases where the idlethread
720 * will be entered with the possibility that no IPI will occur and in such
721 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 722 */
96728c05 723static int cpu_idle_hlt = 1;
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724SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
725 &cpu_idle_hlt, 0, "Idle loop HLT enable");
726
727void
728cpu_idle(void)
729{
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730 struct thread *td = curthread;
731
26a0694b 732 crit_exit();
a2a5ad0d 733 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 734 for (;;) {
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735 /*
736 * See if there are any LWKTs ready to go.
737 */
8ad65e08 738 lwkt_switch();
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739
740 /*
741 * If we are going to halt call splz unconditionally after
742 * CLIing to catch any interrupt races. Note that we are
743 * at SPL0 and interrupts are enabled.
744 */
745 if (cpu_idle_hlt && !lwkt_runnable() &&
746 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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747 /*
748 * We must guarentee that hlt is exactly the instruction
749 * following the sti.
750 */
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751 __asm __volatile("cli");
752 splz();
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753 __asm __volatile("sti; hlt");
754 } else {
a2a5ad0d 755 td->td_flags &= ~TDF_IDLE_NOHLT;
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756 __asm __volatile("sti");
757 }
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758 }
759}
760
761/*
762 * Clear registers on exec
763 */
764void
765setregs(p, entry, stack, ps_strings)
766 struct proc *p;
767 u_long entry;
768 u_long stack;
769 u_long ps_strings;
770{
771 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 772 struct pcb *pcb = p->p_thread->td_pcb;
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773
774 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
775 pcb->pcb_gs = _udatasel;
776 load_gs(_udatasel);
777
778#ifdef USER_LDT
779 /* was i386_user_cleanup() in NetBSD */
780 user_ldt_free(pcb);
781#endif
782
783 bzero((char *)regs, sizeof(struct trapframe));
784 regs->tf_eip = entry;
785 regs->tf_esp = stack;
786 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
787 regs->tf_ss = _udatasel;
788 regs->tf_ds = _udatasel;
789 regs->tf_es = _udatasel;
790 regs->tf_fs = _udatasel;
791 regs->tf_cs = _ucodesel;
792
793 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
794 regs->tf_ebx = ps_strings;
795
796 /*
797 * Reset the hardware debug registers if they were in use.
798 * They won't have any meaning for the newly exec'd process.
799 */
800 if (pcb->pcb_flags & PCB_DBREGS) {
801 pcb->pcb_dr0 = 0;
802 pcb->pcb_dr1 = 0;
803 pcb->pcb_dr2 = 0;
804 pcb->pcb_dr3 = 0;
805 pcb->pcb_dr6 = 0;
806 pcb->pcb_dr7 = 0;
b7c628e4 807 if (pcb == curthread->td_pcb) {
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808 /*
809 * Clear the debug registers on the running
810 * CPU, otherwise they will end up affecting
811 * the next process we switch to.
812 */
813 reset_dbregs();
814 }
815 pcb->pcb_flags &= ~PCB_DBREGS;
816 }
817
818 /*
819 * Initialize the math emulator (if any) for the current process.
820 * Actually, just clear the bit that says that the emulator has
821 * been initialized. Initialization is delayed until the process
822 * traps to the emulator (if it is done at all) mainly because
823 * emulators don't provide an entry point for initialization.
824 */
b7c628e4 825 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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826
827 /*
828 * Arrange to trap the next npx or `fwait' instruction (see npx.c
829 * for why fwait must be trapped at least if there is an npx or an
830 * emulator). This is mainly to handle the case where npx0 is not
831 * configured, since the npx routines normally set up the trap
832 * otherwise. It should be done only at boot time, but doing it
833 * here allows modifying `npx_exists' for testing the emulator on
834 * systems with an npx.
835 */
836 load_cr0(rcr0() | CR0_MP | CR0_TS);
837
838#if NNPX > 0
839 /* Initialize the npx (if any) for the current process. */
840 npxinit(__INITIAL_NPXCW__);
841#endif
842
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843 /*
844 * note: linux emulator needs edx to be 0x0 on entry, which is
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845 * handled in execve simply by setting the 64 bit syscall
846 * return value to 0.
90b9818c 847 */
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848}
849
850void
851cpu_setregs(void)
852{
853 unsigned int cr0;
854
855 cr0 = rcr0();
856 cr0 |= CR0_NE; /* Done by npxinit() */
857 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
858#ifdef I386_CPU
859 if (cpu_class != CPUCLASS_386)
860#endif
861 cr0 |= CR0_WP | CR0_AM;
862 load_cr0(cr0);
863 load_gs(_udatasel);
864}
865
866static int
867sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
868{
869 int error;
870 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
871 req);
872 if (!error && req->newptr)
873 resettodr();
874 return (error);
875}
876
877SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
878 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
879
880SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
881 CTLFLAG_RW, &disable_rtc_set, 0, "");
882
883SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
884 CTLFLAG_RD, &bootinfo, bootinfo, "");
885
886SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
887 CTLFLAG_RW, &wall_cmos_clock, 0, "");
888
889extern u_long bootdev; /* not a dev_t - encoding is different */
890SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
891 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
892
893/*
894 * Initialize 386 and configure to run kernel
895 */
896
897/*
898 * Initialize segments & interrupt table
899 */
900
901int _default_ldt;
902union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
903static struct gate_descriptor idt0[NIDT];
904struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
905union descriptor ldt[NLDT]; /* local descriptor table */
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906
907/* table descriptors - used to load tables by cpu */
984263bc 908struct region_descriptor r_gdt, r_idt;
984263bc 909
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910#if defined(I586_CPU) && !defined(NO_F00F_HACK)
911extern int has_f00f_bug;
912#endif
913
914static struct i386tss dblfault_tss;
915static char dblfault_stack[PAGE_SIZE];
916
917extern struct user *proc0paddr;
918
919
920/* software prototypes -- in more palatable form */
921struct soft_segment_descriptor gdt_segs[] = {
922/* GNULL_SEL 0 Null Descriptor */
923{ 0x0, /* segment base address */
924 0x0, /* length */
925 0, /* segment type */
926 0, /* segment descriptor priority level */
927 0, /* segment descriptor present */
928 0, 0,
929 0, /* default 32 vs 16 bit size */
930 0 /* limit granularity (byte/page units)*/ },
931/* GCODE_SEL 1 Code Descriptor for kernel */
932{ 0x0, /* segment base address */
933 0xfffff, /* length - all address space */
934 SDT_MEMERA, /* segment type */
935 0, /* segment descriptor priority level */
936 1, /* segment descriptor present */
937 0, 0,
938 1, /* default 32 vs 16 bit size */
939 1 /* limit granularity (byte/page units)*/ },
940/* GDATA_SEL 2 Data Descriptor for kernel */
941{ 0x0, /* segment base address */
942 0xfffff, /* length - all address space */
943 SDT_MEMRWA, /* segment type */
944 0, /* segment descriptor priority level */
945 1, /* segment descriptor present */
946 0, 0,
947 1, /* default 32 vs 16 bit size */
948 1 /* limit granularity (byte/page units)*/ },
949/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
950{ 0x0, /* segment base address */
951 0xfffff, /* length - all address space */
952 SDT_MEMRWA, /* segment type */
953 0, /* segment descriptor priority level */
954 1, /* segment descriptor present */
955 0, 0,
956 1, /* default 32 vs 16 bit size */
957 1 /* limit granularity (byte/page units)*/ },
958/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
959{
960 0x0, /* segment base address */
961 sizeof(struct i386tss)-1,/* length - all address space */
962 SDT_SYS386TSS, /* segment type */
963 0, /* segment descriptor priority level */
964 1, /* segment descriptor present */
965 0, 0,
966 0, /* unused - default 32 vs 16 bit size */
967 0 /* limit granularity (byte/page units)*/ },
968/* GLDT_SEL 5 LDT Descriptor */
969{ (int) ldt, /* segment base address */
970 sizeof(ldt)-1, /* length - all address space */
971 SDT_SYSLDT, /* segment type */
972 SEL_UPL, /* segment descriptor priority level */
973 1, /* segment descriptor present */
974 0, 0,
975 0, /* unused - default 32 vs 16 bit size */
976 0 /* limit granularity (byte/page units)*/ },
977/* GUSERLDT_SEL 6 User LDT Descriptor per process */
978{ (int) ldt, /* segment base address */
979 (512 * sizeof(union descriptor)-1), /* length */
980 SDT_SYSLDT, /* segment type */
981 0, /* segment descriptor priority level */
982 1, /* segment descriptor present */
983 0, 0,
984 0, /* unused - default 32 vs 16 bit size */
985 0 /* limit granularity (byte/page units)*/ },
986/* GTGATE_SEL 7 Null Descriptor - Placeholder */
987{ 0x0, /* segment base address */
988 0x0, /* length - all address space */
989 0, /* segment type */
990 0, /* segment descriptor priority level */
991 0, /* segment descriptor present */
992 0, 0,
993 0, /* default 32 vs 16 bit size */
994 0 /* limit granularity (byte/page units)*/ },
995/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
996{ 0x400, /* segment base address */
997 0xfffff, /* length */
998 SDT_MEMRWA, /* segment type */
999 0, /* segment descriptor priority level */
1000 1, /* segment descriptor present */
1001 0, 0,
1002 1, /* default 32 vs 16 bit size */
1003 1 /* limit granularity (byte/page units)*/ },
1004/* GPANIC_SEL 9 Panic Tss Descriptor */
1005{ (int) &dblfault_tss, /* segment base address */
1006 sizeof(struct i386tss)-1,/* length - all address space */
1007 SDT_SYS386TSS, /* segment type */
1008 0, /* segment descriptor priority level */
1009 1, /* segment descriptor present */
1010 0, 0,
1011 0, /* unused - default 32 vs 16 bit size */
1012 0 /* limit granularity (byte/page units)*/ },
1013/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1014{ 0, /* segment base address (overwritten) */
1015 0xfffff, /* length */
1016 SDT_MEMERA, /* segment type */
1017 0, /* segment descriptor priority level */
1018 1, /* segment descriptor present */
1019 0, 0,
1020 0, /* default 32 vs 16 bit size */
1021 1 /* limit granularity (byte/page units)*/ },
1022/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1023{ 0, /* segment base address (overwritten) */
1024 0xfffff, /* length */
1025 SDT_MEMERA, /* segment type */
1026 0, /* segment descriptor priority level */
1027 1, /* segment descriptor present */
1028 0, 0,
1029 0, /* default 32 vs 16 bit size */
1030 1 /* limit granularity (byte/page units)*/ },
1031/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1032{ 0, /* segment base address (overwritten) */
1033 0xfffff, /* length */
1034 SDT_MEMRWA, /* segment type */
1035 0, /* segment descriptor priority level */
1036 1, /* segment descriptor present */
1037 0, 0,
1038 1, /* default 32 vs 16 bit size */
1039 1 /* limit granularity (byte/page units)*/ },
1040/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1041{ 0, /* segment base address (overwritten) */
1042 0xfffff, /* length */
1043 SDT_MEMRWA, /* segment type */
1044 0, /* segment descriptor priority level */
1045 1, /* segment descriptor present */
1046 0, 0,
1047 0, /* default 32 vs 16 bit size */
1048 1 /* limit granularity (byte/page units)*/ },
1049/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1050{ 0, /* segment base address (overwritten) */
1051 0xfffff, /* length */
1052 SDT_MEMRWA, /* segment type */
1053 0, /* segment descriptor priority level */
1054 1, /* segment descriptor present */
1055 0, 0,
1056 0, /* default 32 vs 16 bit size */
1057 1 /* limit granularity (byte/page units)*/ },
1058};
1059
1060static struct soft_segment_descriptor ldt_segs[] = {
1061 /* Null Descriptor - overwritten by call gate */
1062{ 0x0, /* segment base address */
1063 0x0, /* length - all address space */
1064 0, /* segment type */
1065 0, /* segment descriptor priority level */
1066 0, /* segment descriptor present */
1067 0, 0,
1068 0, /* default 32 vs 16 bit size */
1069 0 /* limit granularity (byte/page units)*/ },
1070 /* Null Descriptor - overwritten by call gate */
1071{ 0x0, /* segment base address */
1072 0x0, /* length - all address space */
1073 0, /* segment type */
1074 0, /* segment descriptor priority level */
1075 0, /* segment descriptor present */
1076 0, 0,
1077 0, /* default 32 vs 16 bit size */
1078 0 /* limit granularity (byte/page units)*/ },
1079 /* Null Descriptor - overwritten by call gate */
1080{ 0x0, /* segment base address */
1081 0x0, /* length - all address space */
1082 0, /* segment type */
1083 0, /* segment descriptor priority level */
1084 0, /* segment descriptor present */
1085 0, 0,
1086 0, /* default 32 vs 16 bit size */
1087 0 /* limit granularity (byte/page units)*/ },
1088 /* Code Descriptor for user */
1089{ 0x0, /* segment base address */
1090 0xfffff, /* length - all address space */
1091 SDT_MEMERA, /* segment type */
1092 SEL_UPL, /* segment descriptor priority level */
1093 1, /* segment descriptor present */
1094 0, 0,
1095 1, /* default 32 vs 16 bit size */
1096 1 /* limit granularity (byte/page units)*/ },
1097 /* Null Descriptor - overwritten by call gate */
1098{ 0x0, /* segment base address */
1099 0x0, /* length - all address space */
1100 0, /* segment type */
1101 0, /* segment descriptor priority level */
1102 0, /* segment descriptor present */
1103 0, 0,
1104 0, /* default 32 vs 16 bit size */
1105 0 /* limit granularity (byte/page units)*/ },
1106 /* Data Descriptor for user */
1107{ 0x0, /* segment base address */
1108 0xfffff, /* length - all address space */
1109 SDT_MEMRWA, /* segment type */
1110 SEL_UPL, /* segment descriptor priority level */
1111 1, /* segment descriptor present */
1112 0, 0,
1113 1, /* default 32 vs 16 bit size */
1114 1 /* limit granularity (byte/page units)*/ },
1115};
1116
1117void
1118setidt(idx, func, typ, dpl, selec)
1119 int idx;
1120 inthand_t *func;
1121 int typ;
1122 int dpl;
1123 int selec;
1124{
1125 struct gate_descriptor *ip;
1126
1127 ip = idt + idx;
1128 ip->gd_looffset = (int)func;
1129 ip->gd_selector = selec;
1130 ip->gd_stkcpy = 0;
1131 ip->gd_xx = 0;
1132 ip->gd_type = typ;
1133 ip->gd_dpl = dpl;
1134 ip->gd_p = 1;
1135 ip->gd_hioffset = ((int)func)>>16 ;
1136}
1137
1138#define IDTVEC(name) __CONCAT(X,name)
1139
1140extern inthand_t
1141 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1142 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1143 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1144 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
a64ba182
MD
1145 IDTVEC(xmm), IDTVEC(syscall);
1146extern inthand_t
1147 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
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1148
1149void
1150sdtossd(sd, ssd)
1151 struct segment_descriptor *sd;
1152 struct soft_segment_descriptor *ssd;
1153{
1154 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1155 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1156 ssd->ssd_type = sd->sd_type;
1157 ssd->ssd_dpl = sd->sd_dpl;
1158 ssd->ssd_p = sd->sd_p;
1159 ssd->ssd_def32 = sd->sd_def32;
1160 ssd->ssd_gran = sd->sd_gran;
1161}
1162
1163#define PHYSMAP_SIZE (2 * 8)
1164
1165/*
1166 * Populate the (physmap) array with base/bound pairs describing the
1167 * available physical memory in the system, then test this memory and
1168 * build the phys_avail array describing the actually-available memory.
1169 *
1170 * If we cannot accurately determine the physical memory map, then use
1171 * value from the 0xE801 call, and failing that, the RTC.
1172 *
1173 * Total memory size may be set by the kernel environment variable
1174 * hw.physmem or the compile-time define MAXMEM.
1175 */
1176static void
1177getmemsize(int first)
1178{
1179 int i, physmap_idx, pa_indx;
1180 int hasbrokenint12;
1181 u_int basemem, extmem;
1182 struct vm86frame vmf;
1183 struct vm86context vmc;
1184 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1185 pt_entry_t pte;
1186 const char *cp;
1187 struct {
1188 u_int64_t base;
1189 u_int64_t length;
1190 u_int32_t type;
1191 } *smap;
1192
1193 hasbrokenint12 = 0;
1194 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1195 bzero(&vmf, sizeof(struct vm86frame));
1196 bzero(physmap, sizeof(physmap));
1197 basemem = 0;
1198
1199 /*
1200 * Some newer BIOSes has broken INT 12H implementation which cause
1201 * kernel panic immediately. In this case, we need to scan SMAP
1202 * with INT 15:E820 first, then determine base memory size.
1203 */
1204 if (hasbrokenint12) {
1205 goto int15e820;
1206 }
1207
1208 /*
1209 * Perform "base memory" related probes & setup
1210 */
1211 vm86_intcall(0x12, &vmf);
1212 basemem = vmf.vmf_ax;
1213 if (basemem > 640) {
1214 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1215 basemem);
1216 basemem = 640;
1217 }
1218
1219 /*
1220 * XXX if biosbasemem is now < 640, there is a `hole'
1221 * between the end of base memory and the start of
1222 * ISA memory. The hole may be empty or it may
1223 * contain BIOS code or data. Map it read/write so
1224 * that the BIOS can write to it. (Memory from 0 to
1225 * the physical end of the kernel is mapped read-only
1226 * to begin with and then parts of it are remapped.
1227 * The parts that aren't remapped form holes that
1228 * remain read-only and are unused by the kernel.
1229 * The base memory area is below the physical end of
1230 * the kernel and right now forms a read-only hole.
1231 * The part of it from PAGE_SIZE to
1232 * (trunc_page(biosbasemem * 1024) - 1) will be
1233 * remapped and used by the kernel later.)
1234 *
1235 * This code is similar to the code used in
1236 * pmap_mapdev, but since no memory needs to be
1237 * allocated we simply change the mapping.
1238 */
1239 for (pa = trunc_page(basemem * 1024);
1240 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1241 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1242 *pte = pa | PG_RW | PG_V;
1243 }
1244
1245 /*
1246 * if basemem != 640, map pages r/w into vm86 page table so
1247 * that the bios can scribble on it.
1248 */
1249 pte = (pt_entry_t)vm86paddr;
1250 for (i = basemem / 4; i < 160; i++)
1251 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1252
1253int15e820:
1254 /*
1255 * map page 1 R/W into the kernel page table so we can use it
1256 * as a buffer. The kernel will unmap this page later.
1257 */
1258 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1259 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1260
1261 /*
1262 * get memory map with INT 15:E820
1263 */
1264#define SMAPSIZ sizeof(*smap)
1265#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1266
1267 vmc.npages = 0;
1268 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1269 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1270
1271 physmap_idx = 0;
1272 vmf.vmf_ebx = 0;
1273 do {
1274 vmf.vmf_eax = 0xE820;
1275 vmf.vmf_edx = SMAP_SIG;
1276 vmf.vmf_ecx = SMAPSIZ;
1277 i = vm86_datacall(0x15, &vmf, &vmc);
1278 if (i || vmf.vmf_eax != SMAP_SIG)
1279 break;
1280 if (boothowto & RB_VERBOSE)
1281 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1282 smap->type,
1283 *(u_int32_t *)((char *)&smap->base + 4),
1284 (u_int32_t)smap->base,
1285 *(u_int32_t *)((char *)&smap->length + 4),
1286 (u_int32_t)smap->length);
1287
1288 if (smap->type != 0x01)
1289 goto next_run;
1290
1291 if (smap->length == 0)
1292 goto next_run;
1293
1294 if (smap->base >= 0xffffffff) {
1295 printf("%uK of memory above 4GB ignored\n",
1296 (u_int)(smap->length / 1024));
1297 goto next_run;
1298 }
1299
1300 for (i = 0; i <= physmap_idx; i += 2) {
1301 if (smap->base < physmap[i + 1]) {
1302 if (boothowto & RB_VERBOSE)
1303 printf(
1304 "Overlapping or non-montonic memory region, ignoring second region\n");
1305 goto next_run;
1306 }
1307 }
1308
1309 if (smap->base == physmap[physmap_idx + 1]) {
1310 physmap[physmap_idx + 1] += smap->length;
1311 goto next_run;
1312 }
1313
1314 physmap_idx += 2;
1315 if (physmap_idx == PHYSMAP_SIZE) {
1316 printf(
1317 "Too many segments in the physical address map, giving up\n");
1318 break;
1319 }
1320 physmap[physmap_idx] = smap->base;
1321 physmap[physmap_idx + 1] = smap->base + smap->length;
1322next_run:
1323 } while (vmf.vmf_ebx != 0);
1324
1325 /*
1326 * Perform "base memory" related probes & setup based on SMAP
1327 */
1328 if (basemem == 0) {
1329 for (i = 0; i <= physmap_idx; i += 2) {
1330 if (physmap[i] == 0x00000000) {
1331 basemem = physmap[i + 1] / 1024;
1332 break;
1333 }
1334 }
1335
1336 if (basemem == 0) {
1337 basemem = 640;
1338 }
1339
1340 if (basemem > 640) {
1341 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1342 basemem);
1343 basemem = 640;
1344 }
1345
1346 for (pa = trunc_page(basemem * 1024);
1347 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1348 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1349 *pte = pa | PG_RW | PG_V;
1350 }
1351
1352 pte = (pt_entry_t)vm86paddr;
1353 for (i = basemem / 4; i < 160; i++)
1354 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1355 }
1356
1357 if (physmap[1] != 0)
1358 goto physmap_done;
1359
1360 /*
1361 * If we failed above, try memory map with INT 15:E801
1362 */
1363 vmf.vmf_ax = 0xE801;
1364 if (vm86_intcall(0x15, &vmf) == 0) {
1365 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1366 } else {
1367#if 0
1368 vmf.vmf_ah = 0x88;
1369 vm86_intcall(0x15, &vmf);
1370 extmem = vmf.vmf_ax;
1371#else
1372 /*
1373 * Prefer the RTC value for extended memory.
1374 */
1375 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1376#endif
1377 }
1378
1379 /*
1380 * Special hack for chipsets that still remap the 384k hole when
1381 * there's 16MB of memory - this really confuses people that
1382 * are trying to use bus mastering ISA controllers with the
1383 * "16MB limit"; they only have 16MB, but the remapping puts
1384 * them beyond the limit.
1385 *
1386 * If extended memory is between 15-16MB (16-17MB phys address range),
1387 * chop it to 15MB.
1388 */
1389 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1390 extmem = 15 * 1024;
1391
1392 physmap[0] = 0;
1393 physmap[1] = basemem * 1024;
1394 physmap_idx = 2;
1395 physmap[physmap_idx] = 0x100000;
1396 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1397
1398physmap_done:
1399 /*
1400 * Now, physmap contains a map of physical memory.
1401 */
1402
1403#ifdef SMP
17a9f566 1404 /* make hole for AP bootstrap code YYY */
984263bc
MD
1405 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1406
1407 /* look for the MP hardware - needed for apic addresses */
1408 mp_probe();
1409#endif
1410
1411 /*
1412 * Maxmem isn't the "maximum memory", it's one larger than the
1413 * highest page of the physical address space. It should be
1414 * called something like "Maxphyspage". We may adjust this
1415 * based on ``hw.physmem'' and the results of the memory test.
1416 */
1417 Maxmem = atop(physmap[physmap_idx + 1]);
1418
1419#ifdef MAXMEM
1420 Maxmem = MAXMEM / 4;
1421#endif
1422
1423 /*
eb7d35b8 1424 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1425 * for the appropriate modifiers. This overrides MAXMEM.
1426 */
1427 if ((cp = getenv("hw.physmem")) != NULL) {
1428 u_int64_t AllowMem, sanity;
1429 char *ep;
1430
1431 sanity = AllowMem = strtouq(cp, &ep, 0);
1432 if ((ep != cp) && (*ep != 0)) {
1433 switch(*ep) {
1434 case 'g':
1435 case 'G':
1436 AllowMem <<= 10;
1437 case 'm':
1438 case 'M':
1439 AllowMem <<= 10;
1440 case 'k':
1441 case 'K':
1442 AllowMem <<= 10;
1443 break;
1444 default:
1445 AllowMem = sanity = 0;
1446 }
1447 if (AllowMem < sanity)
1448 AllowMem = 0;
1449 }
1450 if (AllowMem == 0)
1451 printf("Ignoring invalid memory size of '%s'\n", cp);
1452 else
1453 Maxmem = atop(AllowMem);
1454 }
1455
1456 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1457 (boothowto & RB_VERBOSE))
1458 printf("Physical memory use set to %uK\n", Maxmem * 4);
1459
1460 /*
1461 * If Maxmem has been increased beyond what the system has detected,
1462 * extend the last memory segment to the new limit.
1463 */
1464 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1465 physmap[physmap_idx + 1] = ptoa(Maxmem);
1466
1467 /* call pmap initialization to make new kernel address space */
1468 pmap_bootstrap(first, 0);
1469
1470 /*
1471 * Size up each available chunk of physical memory.
1472 */
1473 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1474 pa_indx = 0;
1475 phys_avail[pa_indx++] = physmap[0];
1476 phys_avail[pa_indx] = physmap[0];
1477#if 0
1478 pte = (pt_entry_t)vtopte(KERNBASE);
1479#else
1480 pte = (pt_entry_t)CMAP1;
1481#endif
1482
1483 /*
1484 * physmap is in bytes, so when converting to page boundaries,
1485 * round up the start address and round down the end address.
1486 */
1487 for (i = 0; i <= physmap_idx; i += 2) {
1488 vm_offset_t end;
1489
1490 end = ptoa(Maxmem);
1491 if (physmap[i + 1] < end)
1492 end = trunc_page(physmap[i + 1]);
1493 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1494 int tmp, page_bad;
1495#if 0
1496 int *ptr = 0;
1497#else
1498 int *ptr = (int *)CADDR1;
1499#endif
1500
1501 /*
1502 * block out kernel memory as not available.
1503 */
1504 if (pa >= 0x100000 && pa < first)
1505 continue;
1506
1507 page_bad = FALSE;
1508
1509 /*
1510 * map page into kernel: valid, read/write,non-cacheable
1511 */
1512 *pte = pa | PG_V | PG_RW | PG_N;
1513 invltlb();
1514
1515 tmp = *(int *)ptr;
1516 /*
1517 * Test for alternating 1's and 0's
1518 */
1519 *(volatile int *)ptr = 0xaaaaaaaa;
1520 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1521 page_bad = TRUE;
1522 }
1523 /*
1524 * Test for alternating 0's and 1's
1525 */
1526 *(volatile int *)ptr = 0x55555555;
1527 if (*(volatile int *)ptr != 0x55555555) {
1528 page_bad = TRUE;
1529 }
1530 /*
1531 * Test for all 1's
1532 */
1533 *(volatile int *)ptr = 0xffffffff;
1534 if (*(volatile int *)ptr != 0xffffffff) {
1535 page_bad = TRUE;
1536 }
1537 /*
1538 * Test for all 0's
1539 */
1540 *(volatile int *)ptr = 0x0;
1541 if (*(volatile int *)ptr != 0x0) {
1542 page_bad = TRUE;
1543 }
1544 /*
1545 * Restore original value.
1546 */
1547 *(int *)ptr = tmp;
1548
1549 /*
1550 * Adjust array of valid/good pages.
1551 */
1552 if (page_bad == TRUE) {
1553 continue;
1554 }
1555 /*
1556 * If this good page is a continuation of the
1557 * previous set of good pages, then just increase
1558 * the end pointer. Otherwise start a new chunk.
1559 * Note that "end" points one higher than end,
1560 * making the range >= start and < end.
1561 * If we're also doing a speculative memory
1562 * test and we at or past the end, bump up Maxmem
1563 * so that we keep going. The first bad page
1564 * will terminate the loop.
1565 */
1566 if (phys_avail[pa_indx] == pa) {
1567 phys_avail[pa_indx] += PAGE_SIZE;
1568 } else {
1569 pa_indx++;
1570 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1571 printf("Too many holes in the physical address space, giving up\n");
1572 pa_indx--;
1573 break;
1574 }
1575 phys_avail[pa_indx++] = pa; /* start */
1576 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1577 }
1578 physmem++;
1579 }
1580 }
1581 *pte = 0;
1582 invltlb();
1583
1584 /*
1585 * XXX
1586 * The last chunk must contain at least one page plus the message
1587 * buffer to avoid complicating other code (message buffer address
1588 * calculation, etc.).
1589 */
1590 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1591 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1592 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1593 phys_avail[pa_indx--] = 0;
1594 phys_avail[pa_indx--] = 0;
1595 }
1596
1597 Maxmem = atop(phys_avail[pa_indx]);
1598
1599 /* Trim off space for the message buffer. */
1600 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1601
1602 avail_end = phys_avail[pa_indx];
1603}
1604
1605void
17a9f566 1606init386(int first)
984263bc
MD
1607{
1608 struct gate_descriptor *gdp;
1609 int gsel_tss, metadata_missing, off, x;
85100692 1610 struct mdglobaldata *gd;
984263bc
MD
1611
1612 /*
1613 * Prevent lowering of the ipl if we call tsleep() early.
1614 */
85100692 1615 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1616 bzero(gd, sizeof(*gd));
984263bc 1617
85100692 1618 gd->mi.gd_curthread = &thread0;
984263bc
MD
1619
1620 atdevbase = ISA_HOLE_START + KERNBASE;
1621
1622 metadata_missing = 0;
1623 if (bootinfo.bi_modulep) {
1624 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1625 preload_bootstrap_relocate(KERNBASE);
1626 } else {
1627 metadata_missing = 1;
1628 }
1629 if (bootinfo.bi_envp)
1630 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1631
4e8e646b
MD
1632 /* start with one cpu */
1633 ncpus = 1;
984263bc
MD
1634 /* Init basic tunables, hz etc */
1635 init_param1();
1636
1637 /*
1638 * make gdt memory segments, the code segment goes up to end of the
1639 * page with etext in it, the data segment goes to the end of
1640 * the address space
1641 */
1642 /*
1643 * XXX text protection is temporarily (?) disabled. The limit was
1644 * i386_btop(round_page(etext)) - 1.
1645 */
1646 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1647 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1648
984263bc
MD
1649 gdt_segs[GPRIV_SEL].ssd_limit =
1650 atop(sizeof(struct privatespace) - 1);
8ad65e08 1651 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1652 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1653 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1654
85100692 1655 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1656
84b592ba
MD
1657 /*
1658 * Note: on both UP and SMP curthread must be set non-NULL
1659 * early in the boot sequence because the system assumes
1660 * that 'curthread' is never NULL.
1661 */
984263bc
MD
1662
1663 for (x = 0; x < NGDT; x++) {
1664#ifdef BDE_DEBUGGER
1665 /* avoid overwriting db entries with APM ones */
1666 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1667 continue;
1668#endif
1669 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1670 }
1671
1672 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1673 r_gdt.rd_base = (int) gdt;
1674 lgdt(&r_gdt);
1675
73e4f7b9
MD
1676 mi_gdinit(&gd->mi, 0);
1677 cpu_gdinit(gd, 0);
1678 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1679 lwkt_set_comm(&thread0, "thread0");
1680 proc0.p_addr = (void *)thread0.td_kstack;
1681 proc0.p_thread = &thread0;
a2a5ad0d 1682 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
d9eea1a5 1683 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1684 thread0.td_proc = &proc0;
1685 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1686 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1687
984263bc
MD
1688 /* make ldt memory segments */
1689 /*
1690 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1691 * should be spelled ...MAX_USER...
1692 */
1693 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1694 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1695 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1696 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1697
1698 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1699 lldt(_default_ldt);
1700#ifdef USER_LDT
17a9f566 1701 gd->gd_currentldt = _default_ldt;
984263bc 1702#endif
8a8d5d85
MD
1703 /* spinlocks and the BGL */
1704 init_locks();
984263bc
MD
1705
1706 /* exceptions */
1707 for (x = 0; x < NIDT; x++)
1708 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1709 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1710 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1711 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1712 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1713 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1714 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1715 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1716 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1717 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1718 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1719 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1720 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1721 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1722 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1723 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1724 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1725 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1726 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1727 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1728 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1729 setidt(0x80, &IDTVEC(int0x80_syscall),
1730 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1731 setidt(0x81, &IDTVEC(int0x81_syscall),
1732 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1733
1734 r_idt.rd_limit = sizeof(idt0) - 1;
1735 r_idt.rd_base = (int) idt;
1736 lidt(&r_idt);
1737
1738 /*
1739 * Initialize the console before we print anything out.
1740 */
1741 cninit();
1742
1743 if (metadata_missing)
1744 printf("WARNING: loader(8) metadata is missing!\n");
1745
984263bc
MD
1746#if NISA >0
1747 isa_defaultirq();
1748#endif
1749 rand_initialize();
1750
1751#ifdef DDB
1752 kdb_init();
1753 if (boothowto & RB_KDB)
1754 Debugger("Boot flags requested debugger");
1755#endif
1756
1757 finishidentcpu(); /* Final stage of CPU initialization */
1758 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1759 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1760 initializecpu(); /* Initialize CPU registers */
1761
b7c628e4
MD
1762 /*
1763 * make an initial tss so cpu can get interrupt stack on syscall!
1764 * The 16 bytes is to save room for a VM86 context.
1765 */
17a9f566
MD
1766 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1767 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1768 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1769 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1770 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1771 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1772 ltr(gsel_tss);
1773
1774 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1775 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1776 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1777 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1778 dblfault_tss.tss_cr3 = (int)IdlePTD;
1779 dblfault_tss.tss_eip = (int) dblfault_handler;
1780 dblfault_tss.tss_eflags = PSL_KERNEL;
1781 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1782 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1783 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1784 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1785 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1786
1787 vm86_initialize();
1788 getmemsize(first);
1789 init_param2(physmem);
1790
1791 /* now running on new page tables, configured,and u/iom is accessible */
1792
1793 /* Map the message buffer. */
1794 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1795 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1796
1797 msgbufinit(msgbufp, MSGBUF_SIZE);
1798
1799 /* make a call gate to reenter kernel with */
1800 gdp = &ldt[LSYS5CALLS_SEL].gd;
1801
1802 x = (int) &IDTVEC(syscall);
1803 gdp->gd_looffset = x++;
1804 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1805 gdp->gd_stkcpy = 1;
1806 gdp->gd_type = SDT_SYS386CGT;
1807 gdp->gd_dpl = SEL_UPL;
1808 gdp->gd_p = 1;
1809 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1810
1811 /* XXX does this work? */
1812 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1813 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1814
1815 /* transfer to user mode */
1816
1817 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1818 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1819
1820 /* setup proc 0's pcb */
b7c628e4
MD
1821 thread0.td_pcb->pcb_flags = 0;
1822 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 1823 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
1824 proc0.p_md.md_regs = &proc0_tf;
1825}
1826
8ad65e08 1827/*
17a9f566
MD
1828 * Initialize machine-dependant portions of the global data structure.
1829 * Note that the global data area and cpu0's idlestack in the private
1830 * data space were allocated in locore.
ef0fdad1
MD
1831 *
1832 * Note: the idlethread's cpl is 0
73e4f7b9
MD
1833 *
1834 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
1835 */
1836void
85100692 1837cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
1838{
1839 char *sp;
8ad65e08 1840
7d0bac62 1841 if (cpu)
a2a5ad0d 1842 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 1843
85100692 1844 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
1845 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
1846 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1847 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1848 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1849 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
1850}
1851
12e4aaff
MD
1852struct globaldata *
1853globaldata_find(int cpu)
1854{
1855 KKASSERT(cpu >= 0 && cpu < ncpus);
1856 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1857}
1858
984263bc
MD
1859#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1860static void f00f_hack(void *unused);
1861SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1862
1863static void
17a9f566
MD
1864f00f_hack(void *unused)
1865{
984263bc 1866 struct gate_descriptor *new_idt;
984263bc
MD
1867 vm_offset_t tmp;
1868
1869 if (!has_f00f_bug)
1870 return;
1871
1872 printf("Intel Pentium detected, installing workaround for F00F bug\n");
1873
1874 r_idt.rd_limit = sizeof(idt0) - 1;
1875
1876 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
1877 if (tmp == 0)
1878 panic("kmem_alloc returned 0");
1879 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1880 panic("kmem_alloc returned non-page-aligned memory");
1881 /* Put the first seven entries in the lower page */
1882 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1883 bcopy(idt, new_idt, sizeof(idt0));
1884 r_idt.rd_base = (int)new_idt;
1885 lidt(&r_idt);
1886 idt = new_idt;
1887 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
1888 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1889 panic("vm_map_protect failed");
1890 return;
1891}
1892#endif /* defined(I586_CPU) && !NO_F00F_HACK */
1893
1894int
1895ptrace_set_pc(p, addr)
1896 struct proc *p;
1897 unsigned long addr;
1898{
1899 p->p_md.md_regs->tf_eip = addr;
1900 return (0);
1901}
1902
1903int
1904ptrace_single_step(p)
1905 struct proc *p;
1906{
1907 p->p_md.md_regs->tf_eflags |= PSL_T;
1908 return (0);
1909}
1910
1911int ptrace_read_u_check(p, addr, len)
1912 struct proc *p;
1913 vm_offset_t addr;
1914 size_t len;
1915{
1916 vm_offset_t gap;
1917
1918 if ((vm_offset_t) (addr + len) < addr)
1919 return EPERM;
1920 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
1921 return 0;
1922
1923 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
1924
1925 if ((vm_offset_t) addr < gap)
1926 return EPERM;
1927 if ((vm_offset_t) (addr + len) <=
1928 (vm_offset_t) (gap + sizeof(struct trapframe)))
1929 return 0;
1930 return EPERM;
1931}
1932
1933int ptrace_write_u(p, off, data)
1934 struct proc *p;
1935 vm_offset_t off;
1936 long data;
1937{
1938 struct trapframe frame_copy;
1939 vm_offset_t min;
1940 struct trapframe *tp;
1941
1942 /*
1943 * Privileged kernel state is scattered all over the user area.
1944 * Only allow write access to parts of regs and to fpregs.
1945 */
1946 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
1947 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
1948 tp = p->p_md.md_regs;
1949 frame_copy = *tp;
1950 *(int *)((char *)&frame_copy + (off - min)) = data;
1951 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
1952 !CS_SECURE(frame_copy.tf_cs))
1953 return (EINVAL);
1954 *(int*)((char *)p->p_addr + off) = data;
1955 return (0);
1956 }
b7c628e4
MD
1957
1958 /*
1959 * The PCB is at the end of the user area YYY
1960 */
1961 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
1962 min += offsetof(struct pcb, pcb_save);
984263bc
MD
1963 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
1964 *(int*)((char *)p->p_addr + off) = data;
1965 return (0);
1966 }
1967 return (EFAULT);
1968}
1969
1970int
1971fill_regs(p, regs)
1972 struct proc *p;
1973 struct reg *regs;
1974{
1975 struct pcb *pcb;
1976 struct trapframe *tp;
1977
1978 tp = p->p_md.md_regs;
1979 regs->r_fs = tp->tf_fs;
1980 regs->r_es = tp->tf_es;
1981 regs->r_ds = tp->tf_ds;
1982 regs->r_edi = tp->tf_edi;
1983 regs->r_esi = tp->tf_esi;
1984 regs->r_ebp = tp->tf_ebp;
1985 regs->r_ebx = tp->tf_ebx;
1986 regs->r_edx = tp->tf_edx;
1987 regs->r_ecx = tp->tf_ecx;
1988 regs->r_eax = tp->tf_eax;
1989 regs->r_eip = tp->tf_eip;
1990 regs->r_cs = tp->tf_cs;
1991 regs->r_eflags = tp->tf_eflags;
1992 regs->r_esp = tp->tf_esp;
1993 regs->r_ss = tp->tf_ss;
b7c628e4 1994 pcb = p->p_thread->td_pcb;
984263bc
MD
1995 regs->r_gs = pcb->pcb_gs;
1996 return (0);
1997}
1998
1999int
2000set_regs(p, regs)
2001 struct proc *p;
2002 struct reg *regs;
2003{
2004 struct pcb *pcb;
2005 struct trapframe *tp;
2006
2007 tp = p->p_md.md_regs;
2008 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2009 !CS_SECURE(regs->r_cs))
2010 return (EINVAL);
2011 tp->tf_fs = regs->r_fs;
2012 tp->tf_es = regs->r_es;
2013 tp->tf_ds = regs->r_ds;
2014 tp->tf_edi = regs->r_edi;
2015 tp->tf_esi = regs->r_esi;
2016 tp->tf_ebp = regs->r_ebp;
2017 tp->tf_ebx = regs->r_ebx;
2018 tp->tf_edx = regs->r_edx;
2019 tp->tf_ecx = regs->r_ecx;
2020 tp->tf_eax = regs->r_eax;
2021 tp->tf_eip = regs->r_eip;
2022 tp->tf_cs = regs->r_cs;
2023 tp->tf_eflags = regs->r_eflags;
2024 tp->tf_esp = regs->r_esp;
2025 tp->tf_ss = regs->r_ss;
b7c628e4 2026 pcb = p->p_thread->td_pcb;
984263bc
MD
2027 pcb->pcb_gs = regs->r_gs;
2028 return (0);
2029}
2030
642a6e88 2031#ifndef CPU_DISABLE_SSE
984263bc
MD
2032static void
2033fill_fpregs_xmm(sv_xmm, sv_87)
2034 struct savexmm *sv_xmm;
2035 struct save87 *sv_87;
2036{
c9faf524
RG
2037 struct env87 *penv_87 = &sv_87->sv_env;
2038 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2039 int i;
2040
2041 /* FPU control/status */
2042 penv_87->en_cw = penv_xmm->en_cw;
2043 penv_87->en_sw = penv_xmm->en_sw;
2044 penv_87->en_tw = penv_xmm->en_tw;
2045 penv_87->en_fip = penv_xmm->en_fip;
2046 penv_87->en_fcs = penv_xmm->en_fcs;
2047 penv_87->en_opcode = penv_xmm->en_opcode;
2048 penv_87->en_foo = penv_xmm->en_foo;
2049 penv_87->en_fos = penv_xmm->en_fos;
2050
2051 /* FPU registers */
2052 for (i = 0; i < 8; ++i)
2053 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2054
2055 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2056}
2057
2058static void
2059set_fpregs_xmm(sv_87, sv_xmm)
2060 struct save87 *sv_87;
2061 struct savexmm *sv_xmm;
2062{
c9faf524
RG
2063 struct env87 *penv_87 = &sv_87->sv_env;
2064 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2065 int i;
2066
2067 /* FPU control/status */
2068 penv_xmm->en_cw = penv_87->en_cw;
2069 penv_xmm->en_sw = penv_87->en_sw;
2070 penv_xmm->en_tw = penv_87->en_tw;
2071 penv_xmm->en_fip = penv_87->en_fip;
2072 penv_xmm->en_fcs = penv_87->en_fcs;
2073 penv_xmm->en_opcode = penv_87->en_opcode;
2074 penv_xmm->en_foo = penv_87->en_foo;
2075 penv_xmm->en_fos = penv_87->en_fos;
2076
2077 /* FPU registers */
2078 for (i = 0; i < 8; ++i)
2079 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2080
2081 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2082}
642a6e88 2083#endif /* CPU_DISABLE_SSE */
984263bc
MD
2084
2085int
2086fill_fpregs(p, fpregs)
2087 struct proc *p;
2088 struct fpreg *fpregs;
2089{
642a6e88 2090#ifndef CPU_DISABLE_SSE
984263bc 2091 if (cpu_fxsr) {
b7c628e4 2092 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2093 (struct save87 *)fpregs);
2094 return (0);
2095 }
642a6e88 2096#endif /* CPU_DISABLE_SSE */
b7c628e4 2097 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2098 return (0);
2099}
2100
2101int
2102set_fpregs(p, fpregs)
2103 struct proc *p;
2104 struct fpreg *fpregs;
2105{
642a6e88 2106#ifndef CPU_DISABLE_SSE
984263bc
MD
2107 if (cpu_fxsr) {
2108 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2109 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2110 return (0);
2111 }
642a6e88 2112#endif /* CPU_DISABLE_SSE */
b7c628e4 2113 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2114 return (0);
2115}
2116
2117int
2118fill_dbregs(p, dbregs)
2119 struct proc *p;
2120 struct dbreg *dbregs;
2121{
2122 struct pcb *pcb;
2123
2124 if (p == NULL) {
2125 dbregs->dr0 = rdr0();
2126 dbregs->dr1 = rdr1();
2127 dbregs->dr2 = rdr2();
2128 dbregs->dr3 = rdr3();
2129 dbregs->dr4 = rdr4();
2130 dbregs->dr5 = rdr5();
2131 dbregs->dr6 = rdr6();
2132 dbregs->dr7 = rdr7();
2133 }
2134 else {
b7c628e4 2135 pcb = p->p_thread->td_pcb;
984263bc
MD
2136 dbregs->dr0 = pcb->pcb_dr0;
2137 dbregs->dr1 = pcb->pcb_dr1;
2138 dbregs->dr2 = pcb->pcb_dr2;
2139 dbregs->dr3 = pcb->pcb_dr3;
2140 dbregs->dr4 = 0;
2141 dbregs->dr5 = 0;
2142 dbregs->dr6 = pcb->pcb_dr6;
2143 dbregs->dr7 = pcb->pcb_dr7;
2144 }
2145 return (0);
2146}
2147
2148int
2149set_dbregs(p, dbregs)
2150 struct proc *p;
2151 struct dbreg *dbregs;
2152{
2153 struct pcb *pcb;
2154 int i;
2155 u_int32_t mask1, mask2;
2156
2157 if (p == NULL) {
2158 load_dr0(dbregs->dr0);
2159 load_dr1(dbregs->dr1);
2160 load_dr2(dbregs->dr2);
2161 load_dr3(dbregs->dr3);
2162 load_dr4(dbregs->dr4);
2163 load_dr5(dbregs->dr5);
2164 load_dr6(dbregs->dr6);
2165 load_dr7(dbregs->dr7);
2166 }
2167 else {
2168 /*
2169 * Don't let an illegal value for dr7 get set. Specifically,
2170 * check for undefined settings. Setting these bit patterns
2171 * result in undefined behaviour and can lead to an unexpected
2172 * TRCTRAP.
2173 */
2174 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2175 i++, mask1 <<= 2, mask2 <<= 2)
2176 if ((dbregs->dr7 & mask1) == mask2)
2177 return (EINVAL);
2178
b7c628e4 2179 pcb = p->p_thread->td_pcb;
984263bc
MD
2180
2181 /*
2182 * Don't let a process set a breakpoint that is not within the
2183 * process's address space. If a process could do this, it
2184 * could halt the system by setting a breakpoint in the kernel
2185 * (if ddb was enabled). Thus, we need to check to make sure
2186 * that no breakpoints are being enabled for addresses outside
2187 * process's address space, unless, perhaps, we were called by
2188 * uid 0.
2189 *
2190 * XXX - what about when the watched area of the user's
2191 * address space is written into from within the kernel
2192 * ... wouldn't that still cause a breakpoint to be generated
2193 * from within kernel mode?
2194 */
2195
dadab5e9 2196 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2197 if (dbregs->dr7 & 0x3) {
2198 /* dr0 is enabled */
2199 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2200 return (EINVAL);
2201 }
2202
2203 if (dbregs->dr7 & (0x3<<2)) {
2204 /* dr1 is enabled */
2205 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2206 return (EINVAL);
2207 }
2208
2209 if (dbregs->dr7 & (0x3<<4)) {
2210 /* dr2 is enabled */
2211 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2212 return (EINVAL);
2213 }
2214
2215 if (dbregs->dr7 & (0x3<<6)) {
2216 /* dr3 is enabled */
2217 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2218 return (EINVAL);
2219 }
2220 }
2221
2222 pcb->pcb_dr0 = dbregs->dr0;
2223 pcb->pcb_dr1 = dbregs->dr1;
2224 pcb->pcb_dr2 = dbregs->dr2;
2225 pcb->pcb_dr3 = dbregs->dr3;
2226 pcb->pcb_dr6 = dbregs->dr6;
2227 pcb->pcb_dr7 = dbregs->dr7;
2228
2229 pcb->pcb_flags |= PCB_DBREGS;
2230 }
2231
2232 return (0);
2233}
2234
2235/*
2236 * Return > 0 if a hardware breakpoint has been hit, and the
2237 * breakpoint was in user space. Return 0, otherwise.
2238 */
2239int
2240user_dbreg_trap(void)
2241{
2242 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2243 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2244 int nbp; /* number of breakpoints that triggered */
2245 caddr_t addr[4]; /* breakpoint addresses */
2246 int i;
2247
2248 dr7 = rdr7();
2249 if ((dr7 & 0x000000ff) == 0) {
2250 /*
2251 * all GE and LE bits in the dr7 register are zero,
2252 * thus the trap couldn't have been caused by the
2253 * hardware debug registers
2254 */
2255 return 0;
2256 }
2257
2258 nbp = 0;
2259 dr6 = rdr6();
2260 bp = dr6 & 0x0000000f;
2261
2262 if (!bp) {
2263 /*
2264 * None of the breakpoint bits are set meaning this
2265 * trap was not caused by any of the debug registers
2266 */
2267 return 0;
2268 }
2269
2270 /*
2271 * at least one of the breakpoints were hit, check to see
2272 * which ones and if any of them are user space addresses
2273 */
2274
2275 if (bp & 0x01) {
2276 addr[nbp++] = (caddr_t)rdr0();
2277 }
2278 if (bp & 0x02) {
2279 addr[nbp++] = (caddr_t)rdr1();
2280 }
2281 if (bp & 0x04) {
2282 addr[nbp++] = (caddr_t)rdr2();
2283 }
2284 if (bp & 0x08) {
2285 addr[nbp++] = (caddr_t)rdr3();
2286 }
2287
2288 for (i=0; i<nbp; i++) {
2289 if (addr[i] <
2290 (caddr_t)VM_MAXUSER_ADDRESS) {
2291 /*
2292 * addr[i] is in user space
2293 */
2294 return nbp;
2295 }
2296 }
2297
2298 /*
2299 * None of the breakpoints are in user space.
2300 */
2301 return 0;
2302}
2303
2304
2305#ifndef DDB
2306void
2307Debugger(const char *msg)
2308{
2309 printf("Debugger(\"%s\") called.\n", msg);
2310}
2311#endif /* no DDB */
2312
2313#include <sys/disklabel.h>
2314
2315/*
2316 * Determine the size of the transfer, and make sure it is
2317 * within the boundaries of the partition. Adjust transfer
2318 * if needed, and signal errors or early completion.
2319 */
2320int
2321bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2322{
2323 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2324 int labelsect = lp->d_partitions[0].p_offset;
2325 int maxsz = p->p_size,
2326 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2327
2328 /* overwriting disk label ? */
2329 /* XXX should also protect bootstrap in first 8K */
2330 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2331#if LABELSECTOR != 0
2332 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2333#endif
2334 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2335 bp->b_error = EROFS;
2336 goto bad;
2337 }
2338
2339#if defined(DOSBBSECTOR) && defined(notyet)
2340 /* overwriting master boot record? */
2341 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2342 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2343 bp->b_error = EROFS;
2344 goto bad;
2345 }
2346#endif
2347
2348 /* beyond partition? */
2349 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2350 /* if exactly at end of disk, return an EOF */
2351 if (bp->b_blkno == maxsz) {
2352 bp->b_resid = bp->b_bcount;
2353 return(0);
2354 }
2355 /* or truncate if part of it fits */
2356 sz = maxsz - bp->b_blkno;
2357 if (sz <= 0) {
2358 bp->b_error = EINVAL;
2359 goto bad;
2360 }
2361 bp->b_bcount = sz << DEV_BSHIFT;
2362 }
2363
2364 bp->b_pblkno = bp->b_blkno + p->p_offset;
2365 return(1);
2366
2367bad:
2368 bp->b_flags |= B_ERROR;
2369 return(-1);
2370}
2371
2372#ifdef DDB
2373
2374/*
2375 * Provide inb() and outb() as functions. They are normally only
2376 * available as macros calling inlined functions, thus cannot be
2377 * called inside DDB.
2378 *
2379 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2380 */
2381
2382#undef inb
2383#undef outb
2384
2385/* silence compiler warnings */
2386u_char inb(u_int);
2387void outb(u_int, u_char);
2388
2389u_char
2390inb(u_int port)
2391{
2392 u_char data;
2393 /*
2394 * We use %%dx and not %1 here because i/o is done at %dx and not at
2395 * %edx, while gcc generates inferior code (movw instead of movl)
2396 * if we tell it to load (u_short) port.
2397 */
2398 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2399 return (data);
2400}
2401
2402void
2403outb(u_int port, u_char data)
2404{
2405 u_char al;
2406 /*
2407 * Use an unnecessary assignment to help gcc's register allocator.
2408 * This make a large difference for gcc-1.40 and a tiny difference
2409 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2410 * best results. gcc-2.6.0 can't handle this.
2411 */
2412 al = data;
2413 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2414}
2415
2416#endif /* DDB */
8a8d5d85
MD
2417
2418
2419
2420#include "opt_cpu.h"
2421#include "opt_htt.h"
2422#include "opt_user_ldt.h"
2423
2424
2425/*
2426 * initialize all the SMP locks
2427 */
2428
2429/* critical region around IO APIC, apic_imen */
2430struct spinlock imen_spinlock;
2431
2432/* Make FAST_INTR() routines sequential */
2433struct spinlock fast_intr_spinlock;
2434
2435/* critical region for old style disable_intr/enable_intr */
2436struct spinlock mpintr_spinlock;
2437
2438/* critical region around INTR() routines */
2439struct spinlock intr_spinlock;
2440
2441/* lock region used by kernel profiling */
2442struct spinlock mcount_spinlock;
2443
2444/* locks com (tty) data/hardware accesses: a FASTINTR() */
2445struct spinlock com_spinlock;
2446
2447/* locks kernel printfs */
2448struct spinlock cons_spinlock;
2449
2450/* lock regions around the clock hardware */
2451struct spinlock clock_spinlock;
2452
2453/* lock around the MP rendezvous */
2454struct spinlock smp_rv_spinlock;
2455
2456static void
2457init_locks(void)
2458{
2459 /*
2460 * mp_lock = 0; BSP already owns the MP lock
2461 */
2462 /*
2463 * Get the initial mp_lock with a count of 1 for the BSP.
2464 * This uses a LOGICAL cpu ID, ie BSP == 0.
2465 */
2466#ifdef SMP
2467 cpu_get_initial_mplock();
2468#endif
2469 spin_lock_init(&mcount_spinlock);
2470 spin_lock_init(&fast_intr_spinlock);
2471 spin_lock_init(&intr_spinlock);
2472 spin_lock_init(&mpintr_spinlock);
2473 spin_lock_init(&imen_spinlock);
2474 spin_lock_init(&smp_rv_spinlock);
2475 spin_lock_init(&com_spinlock);
2476 spin_lock_init(&clock_spinlock);
2477 spin_lock_init(&cons_spinlock);
2478}
2479