Import binutils-2.20
[dragonfly.git] / contrib / binutils-2.20 / gas / doc / c-m32c.texi
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1@c Copyright 2005, 2008
2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node M32C-Dependent
8@chapter M32C Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter M32C Dependent Features
13@end ifclear
14
15@cindex M32C support
16
17@code{@value{AS}} can assemble code for several different members of
18the Renesas M32C family. Normally the default is to assemble code for
19the M16C microprocessor. The @code{-m32c} option may be used to
20change the default to the M32C microprocessor.
21
22@menu
23* M32C-Opts:: M32C Options
24* M32C-Modifiers:: Symbolic Operand Modifiers
25@end menu
26
27@node M32C-Opts
28@section M32C Options
29
30@cindex options, M32C
31@cindex M32C options
32
33The Renesas M32C version of @code{@value{AS}} has these
34machine-dependent options:
35
36@table @code
37@item -m32c
38@cindex @samp{-m32c} option, M32C
39@cindex architecture options, M32C
40@cindex M32C architecture option
41Assemble M32C instructions.
42
43@item -m16c
44@cindex @samp{-m16c} option, M16C
45@cindex architecture options, M16C
46@cindex M16C architecture option
47Assemble M16C instructions (default).
48
49@item -relax
50Enable support for link-time relaxations.
51
52@item -h-tick-hex
53Support H'00 style hex constants in addition to 0x00 style.
54
55
56@end table
57
58@node M32C-Modifiers
59@section Symbolic Operand Modifiers
60
61@cindex M32C modifiers
62@cindex syntax, M32C
63
64The assembler supports several modifiers when using symbol addresses
65in M32C instruction operands. The general syntax is the following:
66
67@smallexample
68%modifier(symbol)
69@end smallexample
70
71@table @code
72@cindex symbol modifiers
73
74@item %dsp8
75@itemx %dsp16
76
77These modifiers override the assembler's assumptions about how big a
78symbol's address is. Normally, when it sees an operand like
79@samp{sym[a0]} it assumes @samp{sym} may require the widest
80displacement field (16 bits for @samp{-m16c}, 24 bits for
81@samp{-m32c}). These modifiers tell it to assume the address will fit
82in an 8 or 16 bit (respectively) unsigned displacement. Note that, of
83course, if it doesn't actually fit you will get linker errors. Example:
84
85@smallexample
86mov.w %dsp8(sym)[a0],r1
87mov.b #0,%dsp8(sym)[a0]
88@end smallexample
89
90@item %hi8
91
92This modifier allows you to load bits 16 through 23 of a 24 bit
93address into an 8 bit register. This is useful with, for example, the
94M16C @samp{smovf} instruction, which expects a 20 bit address in
95@samp{r1h} and @samp{a0}. Example:
96
97@smallexample
98mov.b #%hi8(sym),r1h
99mov.w #%lo16(sym),a0
100smovf.b
101@end smallexample
102
103@item %lo16
104
105Likewise, this modifier allows you to load bits 0 through 15 of a 24
106bit address into a 16 bit register.
107
108@item %hi16
109
110This modifier allows you to load bits 16 through 31 of a 32 bit
111address into a 16 bit register. While the M32C family only has 24
112bits of address space, it does support addresses in pairs of 16 bit
113registers (like @samp{a1a0} for the @samp{lde} instruction). This
114modifier is for loading the upper half in such cases. Example:
115
116@smallexample
117mov.w #%hi16(sym),a1
118mov.w #%lo16(sym),a0
119@dots{}
120lde.w [a1a0],r1
121@end smallexample
122
123@end table