Finish migrating the cpl into the thread structure.
[dragonfly.git] / sys / i386 / i386 / exception.s
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1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: src/sys/i386/i386/exception.s,v 1.65.2.3 2001/08/15 01:23:49 peter Exp $
8f41e33b 34 * $DragonFly: src/sys/i386/i386/Attic/exception.s,v 1.4 2003/06/22 08:54:18 dillon Exp $
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35 */
36
37#include "npx.h"
38
39#include <machine/asmacros.h>
40#include <machine/ipl.h>
41#include <machine/lock.h>
42#include <machine/psl.h>
43#include <machine/trap.h>
44#ifdef SMP
45#include <machine/smptests.h> /** various SMP options */
46#endif
47
48#include "assym.s"
49
50#ifdef SMP
51#define MOVL_KPSEL_EAX movl $KPSEL,%eax
52#else
53#define MOVL_KPSEL_EAX
54#endif
55#define SEL_RPL_MASK 0x0003
56
57 .text
58
59/*****************************************************************************/
60/* Trap handling */
61/*****************************************************************************/
62/*
63 * Trap and fault vector routines.
64 *
65 * Most traps are 'trap gates', SDT_SYS386TGT. A trap gate pushes state on
66 * the stack that mostly looks like an interrupt, but does not disable
67 * interrupts. A few of the traps we are use are interrupt gates,
68 * SDT_SYS386IGT, which are nearly the same thing except interrupts are
69 * disabled on entry.
70 *
71 * The cpu will push a certain amount of state onto the kernel stack for
72 * the current process. The amount of state depends on the type of trap
73 * and whether the trap crossed rings or not. See i386/include/frame.h.
74 * At the very least the current EFLAGS (status register, which includes
75 * the interrupt disable state prior to the trap), the code segment register,
76 * and the return instruction pointer are pushed by the cpu. The cpu
77 * will also push an 'error' code for certain traps. We push a dummy
78 * error code for those traps where the cpu doesn't in order to maintain
79 * a consistent frame. We also push a contrived 'trap number'.
80 *
81 * The cpu does not push the general registers, we must do that, and we
82 * must restore them prior to calling 'iret'. The cpu adjusts the %cs and
83 * %ss segment registers, but does not mess with %ds, %es, or %fs. Thus we
84 * must load them with appropriate values for supervisor mode operation.
85 *
86 * On entry to a trap or interrupt WE DO NOT OWN THE MP LOCK. This means
87 * that we must be careful in regards to accessing global variables. We
88 * save (push) the current cpl (our software interrupt disable mask), call
89 * the trap function, then call _doreti to restore the cpl and deal with
90 * ASTs (software interrupts). _doreti will determine if the restoration
91 * of the cpl unmasked any pending interrupts and will issue those interrupts
92 * synchronously prior to doing the iret.
93 *
94 * At the moment we must own the MP lock to do any cpl manipulation, which
95 * means we must own it prior to calling _doreti. The syscall case attempts
96 * to avoid this by handling a reduced set of cases itself and iret'ing.
97 */
98#define IDTVEC(name) ALIGN_TEXT; .globl __CONCAT(_X,name); \
99 .type __CONCAT(_X,name),@function; __CONCAT(_X,name):
100#define TRAP(a) pushl $(a) ; jmp _alltraps
101
102#ifdef BDE_DEBUGGER
103#define BDBTRAP(name) \
104 ss ; \
105 cmpb $0,_bdb_exists ; \
106 je 1f ; \
107 testb $SEL_RPL_MASK,4(%esp) ; \
108 jne 1f ; \
109 ss ; \
110 .globl __CONCAT(__CONCAT(bdb_,name),_ljmp); \
111__CONCAT(__CONCAT(bdb_,name),_ljmp): \
112 ljmp $0,$0 ; \
1131:
114#else
115#define BDBTRAP(name)
116#endif
117
118#define BPTTRAP(a) testl $PSL_I,4+8(%esp) ; je 1f ; sti ; 1: ; TRAP(a)
119
120MCOUNT_LABEL(user)
121MCOUNT_LABEL(btrap)
122
123IDTVEC(div)
124 pushl $0; TRAP(T_DIVIDE)
125IDTVEC(dbg)
126 BDBTRAP(dbg)
127 pushl $0; BPTTRAP(T_TRCTRAP)
128IDTVEC(nmi)
129 pushl $0; TRAP(T_NMI)
130IDTVEC(bpt)
131 BDBTRAP(bpt)
132 pushl $0; BPTTRAP(T_BPTFLT)
133IDTVEC(ofl)
134 pushl $0; TRAP(T_OFLOW)
135IDTVEC(bnd)
136 pushl $0; TRAP(T_BOUND)
137IDTVEC(ill)
138 pushl $0; TRAP(T_PRIVINFLT)
139IDTVEC(dna)
140 pushl $0; TRAP(T_DNA)
141IDTVEC(fpusegm)
142 pushl $0; TRAP(T_FPOPFLT)
143IDTVEC(tss)
144 TRAP(T_TSSFLT)
145IDTVEC(missing)
146 TRAP(T_SEGNPFLT)
147IDTVEC(stk)
148 TRAP(T_STKFLT)
149IDTVEC(prot)
150 TRAP(T_PROTFLT)
151IDTVEC(page)
152 TRAP(T_PAGEFLT)
153IDTVEC(mchk)
154 pushl $0; TRAP(T_MCHK)
155IDTVEC(rsvd)
156 pushl $0; TRAP(T_RESERVED)
157
158IDTVEC(fpu)
159#if NNPX > 0
160 /*
161 * Handle like an interrupt (except for accounting) so that we can
162 * call npx_intr to clear the error. It would be better to handle
163 * npx interrupts as traps. Nested interrupts would probably have
164 * to be converted to ASTs.
165 */
166 pushl $0 /* dummy error code */
167 pushl $0 /* dummy trap type */
168 pushal
169 pushl %ds
170 pushl %es /* now stack frame is a trap frame */
171 pushl %fs
172 mov $KDSEL,%ax
173 mov %ax,%ds
174 mov %ax,%es
175 MOVL_KPSEL_EAX
176 mov %ax,%fs
177 FAKE_MCOUNT(13*4(%esp))
178
179#ifdef SMP
180 MPLOCKED incl _cnt+V_TRAP
181 MP_LOCK
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182 movl _curthread,%eax /* save original cpl */
183 pushl TD_MACH+MTD_CPL(%eax)
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184 pushl $0 /* dummy unit to finish intr frame */
185#else /* SMP */
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186 movl _curthread,%eax /* save original cpl */
187 pushl TD_MACH+MTD_CPL(%eax)
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188 pushl $0 /* dummy unit to finish intr frame */
189 incl _cnt+V_TRAP
190#endif /* SMP */
191
192 call _npx_intr
193
194 incb _intr_nesting_level
195 MEXITCOUNT
196 jmp _doreti
197#else /* NNPX > 0 */
198 pushl $0; TRAP(T_ARITHTRAP)
199#endif /* NNPX > 0 */
200
201IDTVEC(align)
202 TRAP(T_ALIGNFLT)
203
204IDTVEC(xmm)
205 pushl $0; TRAP(T_XMMFLT)
206
207 /*
208 * _alltraps entry point. Interrupts are enabled if this was a trap
209 * gate (TGT), else disabled if this was an interrupt gate (IGT).
210 * Note that int0x80_syscall is a trap gate. Only page faults
211 * use an interrupt gate.
212 *
213 * Note that all calls to MP_LOCK must occur with interrupts enabled
214 * in order to be able to take IPI's while waiting for the lock.
215 */
216
217 SUPERALIGN_TEXT
218 .globl _alltraps
219 .type _alltraps,@function
220_alltraps:
221 pushal
222 pushl %ds
223 pushl %es
224 pushl %fs
225alltraps_with_regs_pushed:
226 mov $KDSEL,%ax
227 mov %ax,%ds
228 mov %ax,%es
229 MOVL_KPSEL_EAX
230 mov %ax,%fs
231 FAKE_MCOUNT(13*4(%esp))
232calltrap:
233 FAKE_MCOUNT(_btrap) /* init "from" _btrap -> calltrap */
234 MPLOCKED incl _cnt+V_TRAP
235 MP_LOCK
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236 movl _curthread,%eax /* keep orig cpl here during call */
237 movl TD_MACH+MTD_CPL(%eax),%ebx
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238 call _trap
239
240 /*
241 * Return via _doreti to handle ASTs. Have to change trap frame
242 * to interrupt frame.
243 */
244 pushl %ebx /* cpl to restore */
245 subl $4,%esp /* dummy unit to finish intr frame */
246 incb _intr_nesting_level
247 MEXITCOUNT
248 jmp _doreti
249
250/*
251 * SYSCALL CALL GATE (old entry point for a.out binaries)
252 *
253 * The intersegment call has been set up to specify one dummy parameter.
254 *
255 * This leaves a place to put eflags so that the call frame can be
256 * converted to a trap frame. Note that the eflags is (semi-)bogusly
257 * pushed into (what will be) tf_err and then copied later into the
258 * final spot. It has to be done this way because esp can't be just
259 * temporarily altered for the pushfl - an interrupt might come in
260 * and clobber the saved cs/eip.
261 *
262 * We do not obtain the MP lock, but the call to syscall2 might. If it
263 * does it will release the lock prior to returning.
264 */
265 SUPERALIGN_TEXT
266IDTVEC(syscall)
267 pushfl /* save eflags in tf_err for now */
268 subl $4,%esp /* skip over tf_trapno */
269 pushal
270 pushl %ds
271 pushl %es
272 pushl %fs
273 mov $KDSEL,%ax /* switch to kernel segments */
274 mov %ax,%ds
275 mov %ax,%es
276 MOVL_KPSEL_EAX
277 mov %ax,%fs
278 movl TF_ERR(%esp),%eax /* copy saved eflags to final spot */
279 movl %eax,TF_EFLAGS(%esp)
280 movl $7,TF_ERR(%esp) /* sizeof "lcall 7,0" */
281 FAKE_MCOUNT(13*4(%esp))
282 MPLOCKED incl _cnt+V_SYSCALL
283 call _syscall2
284 MEXITCOUNT
285 cli /* atomic astpending access */
286 cmpl $0,_astpending
287 je doreti_syscall_ret
288#ifdef SMP
289 MP_LOCK
290#endif
291 pushl $0 /* cpl to restore */
292 subl $4,%esp /* dummy unit for interrupt frame */
293 movb $1,_intr_nesting_level
294 jmp _doreti
295
296/*
297 * Call gate entry for FreeBSD ELF and Linux/NetBSD syscall (int 0x80)
298 *
299 * Even though the name says 'int0x80', this is actually a TGT (trap gate)
300 * rather then an IGT (interrupt gate). Thus interrupts are enabled on
301 * entry just as they are for a normal syscall.
302 *
303 * We do not obtain the MP lock, but the call to syscall2 might. If it
304 * does it will release the lock prior to returning.
305 */
306 SUPERALIGN_TEXT
307IDTVEC(int0x80_syscall)
308 subl $8,%esp /* skip over tf_trapno and tf_err */
309 pushal
310 pushl %ds
311 pushl %es
312 pushl %fs
313 mov $KDSEL,%ax /* switch to kernel segments */
314 mov %ax,%ds
315 mov %ax,%es
316 MOVL_KPSEL_EAX
317 mov %ax,%fs
318 movl $2,TF_ERR(%esp) /* sizeof "int 0x80" */
319 FAKE_MCOUNT(13*4(%esp))
320 MPLOCKED incl _cnt+V_SYSCALL
321 call _syscall2
322 MEXITCOUNT
323 cli /* atomic astpending access */
324 cmpl $0,_astpending
325 je doreti_syscall_ret
326#ifdef SMP
327 MP_LOCK
328#endif
329 pushl $0 /* cpl to restore */
330 subl $4,%esp /* dummy unit for interrupt frame */
331 movb $1,_intr_nesting_level
332 jmp _doreti
333
334ENTRY(fork_trampoline)
335 call _spl0
336
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337 movl _curthread,%eax /* YYY heavy weight process must */
338 pushl TD_PROC(%eax) /* YYY remove itself from runq because */
339 call remrunqueue /* LWKT restore func doesn't do that */
340 addl $4,%esp
341
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342#ifdef SMP
343 cmpl $0,_switchtime
344 jne 1f
345 movl $gd_switchtime,%eax
346 addl %fs:0,%eax
347 pushl %eax
348 call _microuptime
349 popl %edx
350 movl _ticks,%eax
351 movl %eax,_switchticks
3521:
353#endif
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354 /*
355 * cpu_set_fork_handler intercepts this function call to
356 * have this call a non-return function to stay in kernel mode.
357 * initproc has its own fork handler, but it does return.
358 */
359 pushl %ebx /* arg1 */
360 call *%esi /* function */
361 addl $4,%esp
362 /* cut from syscall */
363
364 /*
365 * Return via _doreti to handle ASTs.
366 */
367 pushl $0 /* cpl to restore */
368 subl $4,%esp /* dummy unit to finish intr frame */
369 movb $1,_intr_nesting_level
370 MEXITCOUNT
371 jmp _doreti
372
373
374/*
375 * Include vm86 call routines, which want to call _doreti.
376 */
377#include "i386/i386/vm86bios.s"
378
379/*
380 * Include what was once config+isa-dependent code.
381 * XXX it should be in a stand-alone file. It's still icu-dependent and
382 * belongs in i386/isa.
383 */
384#include "i386/isa/vector.s"
385
386/*
387 * Include what was once icu-dependent code.
388 * XXX it should be merged into this file (also move the definition of
389 * imen to vector.s or isa.c).
390 * Before including it, set up a normal asm environment so that vector.s
391 * doesn't have to know that stuff is included after it.
392 */
393 .data
394 ALIGN_DATA
395 .text
396 SUPERALIGN_TEXT
397#include "i386/isa/ipl.s"