Finish migrating the cpl into the thread structure.
[dragonfly.git] / sys / i386 / include / ipl.h
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1/*-
2 * Copyright (c) 1993 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * $FreeBSD: src/sys/i386/include/ipl.h,v 1.17.2.3 2002/12/17 18:04:02 sam Exp $
8f41e33b 34 * $DragonFly: src/sys/i386/include/Attic/ipl.h,v 1.3 2003/06/22 08:54:20 dillon Exp $
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35 */
36
37#ifndef _MACHINE_IPL_H_
38#define _MACHINE_IPL_H_
39
40#ifdef APIC_IO
41#include <i386/isa/apic_ipl.h>
42#else
43#include <i386/isa/icu_ipl.h>
44#endif
45
46/*
47 * Software interrupt bit numbers in priority order. The priority only
48 * determines which swi will be dispatched next; a higher priority swi
49 * may be dispatched when a nested h/w interrupt handler returns.
50 */
51#define SWI_TTY (NHWI + 0)
52#define SWI_NET (NHWI + 1)
53#define SWI_CAMNET (NHWI + 2)
54#define SWI_CRYPTO SWI_CAMNET
55#define SWI_CAMBIO (NHWI + 3)
56#define SWI_VM (NHWI + 4)
57#define SWI_TQ (NHWI + 5)
58#define SWI_CLOCK (NHWI + 6)
59#define NSWI 7
60
61/*
62 * Corresponding interrupt-pending bits for ipending.
63 */
64#define SWI_TTY_PENDING (1 << SWI_TTY)
65#define SWI_NET_PENDING (1 << SWI_NET)
66#define SWI_CAMNET_PENDING (1 << SWI_CAMNET)
67#define SWI_CRYPTO_PENDING SWI_CAMNET_PENDING
68#define SWI_CAMBIO_PENDING (1 << SWI_CAMBIO)
69#define SWI_VM_PENDING (1 << SWI_VM)
70#define SWI_TQ_PENDING (1 << SWI_TQ)
71#define SWI_CLOCK_PENDING (1 << SWI_CLOCK)
72
73/*
74 * Corresponding interrupt-disable masks for cpl. The ordering is now by
75 * inclusion (where each mask is considered as a set of bits). Everything
76 * except SWI_CLOCK_MASK includes SWI_LOW_MASK so that softclock() and low
77 * priority swi's don't run while other swi handlers are running and timeout
78 * routines can call swi handlers. SWI_TTY_MASK includes SWI_NET_MASK in
79 * case tty interrupts are processed at splsofttty() for a tty that is in
80 * SLIP or PPP line discipline (this is weaker than merging net_imask with
81 * tty_imask in isa.c - splimp() must mask hard and soft tty interrupts, but
82 * spltty() apparently only needs to mask soft net interrupts).
83 */
84#define SWI_TTY_MASK (SWI_TTY_PENDING | SWI_LOW_MASK | SWI_NET_MASK)
85#define SWI_CAMNET_MASK (SWI_CAMNET_PENDING | SWI_LOW_MASK)
86#define SWI_CRYPTO_MASK SWI_CAMNET_MASK
87#define SWI_CAMBIO_MASK (SWI_CAMBIO_PENDING | SWI_LOW_MASK)
88#define SWI_NET_MASK (SWI_NET_PENDING | SWI_LOW_MASK)
89#define SWI_VM_MASK (SWI_VM_PENDING | SWI_LOW_MASK)
90#define SWI_TQ_MASK (SWI_TQ_PENDING | SWI_LOW_MASK)
91#define SWI_CLOCK_MASK SWI_CLOCK_PENDING
92#define SWI_LOW_MASK (SWI_TQ_PENDING | SWI_CLOCK_MASK)
93#define SWI_MASK (~HWI_MASK)
94
95/*
96 * astpending bits
97 */
98#define AST_PENDING 0x00000001
99#define AST_RESCHED 0x00000002
100
101#ifndef LOCORE
102
103/*
104 * cpl is preserved by interrupt handlers so it is effectively nonvolatile.
105 * ipending and idelayed are changed by interrupt handlers so they are
106 * volatile.
107 */
108#ifdef notyet /* in <sys/interrupt.h> until pci drivers stop hacking on them */
109extern unsigned bio_imask; /* group of interrupts masked with splbio() */
110#endif
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111#ifdef SMP
112extern unsigned cil; /* current INTerrupt level mask */
113#endif
114extern volatile unsigned idelayed; /* interrupts to become pending */
115extern volatile unsigned ipending; /* active interrupts masked by cpl */
116#ifdef notyet /* in <sys/systm.h> until pci drivers stop hacking on them */
117extern unsigned net_imask; /* group of interrupts masked with splimp() */
118extern unsigned stat_imask; /* interrupts masked with splstatclock() */
119extern unsigned tty_imask; /* group of interrupts masked with spltty() */
120#endif
121
122#endif /* !LOCORE */
123
124#endif /* !_MACHINE_IPL_H_ */