Add parens for code readability (no functional change)
[dragonfly.git] / sys / i386 / i386 / swtch.s
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1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
f1d1c3fa 4 * LWKT threads Copyright (c) 2003 Matthew Dillon
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5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
7d0bac62 38 * $DragonFly: src/sys/i386/i386/Attic/swtch.s,v 1.10 2003/06/22 04:30:39 dillon Exp $
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39 */
40
41#include "npx.h"
42#include "opt_user_ldt.h"
43
44#include <sys/rtprio.h>
45
46#include <machine/asmacros.h>
47#include <machine/ipl.h>
48
49#ifdef SMP
50#include <machine/pmap.h>
51#include <machine/smptests.h> /** GRAB_LOPRIO */
52#include <machine/apic.h>
53#include <machine/lock.h>
54#endif /* SMP */
55
56#include "assym.s"
57
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58 .data
59
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60 .globl _panic
61
62#if defined(SWTCH_OPTIM_STATS)
63 .globl _swtch_optim_stats, _tlb_flush_count
64_swtch_optim_stats: .long 0 /* number of _swtch_optims */
65_tlb_flush_count: .long 0
66#endif
67
68 .text
69
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70
71/*
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72 * cpu_heavy_switch(next_thread)
73 *
74 * Switch from the current thread to a new thread. This entry
75 * is normally called via the thread->td_switch function, and will
76 * only be called when the current thread is a heavy weight process.
77 *
78 * YYY disable interrupts once giant is removed.
984263bc 79 */
8ad65e08 80ENTRY(cpu_heavy_switch)
84b592ba 81 movl _curthread,%ecx
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82 movl _cpl,%edx /* YYY temporary */
83 movl %edx,TD_MACH+MTD_CPL(%ecx) /* YYY temporary */
84b592ba 84 movl TD_PROC(%ecx),%ecx
984263bc 85
8ad65e08 86 cli
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87#ifdef SMP
88 movb P_ONCPU(%ecx), %al /* save "last" cpu */
89 movb %al, P_LASTCPU(%ecx)
90 movb $0xff, P_ONCPU(%ecx) /* "leave" the cpu */
91#endif /* SMP */
92 movl P_VMSPACE(%ecx), %edx
93#ifdef SMP
94 movl _cpuid, %eax
95#else
96 xorl %eax, %eax
97#endif /* SMP */
98 btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
99
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100 /*
101 * Save general regs
102 */
103 movl P_THREAD(%ecx),%edx
b7c628e4 104 movl TD_PCB(%edx),%edx
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105 movl (%esp),%eax /* Hardware registers */
106 movl %eax,PCB_EIP(%edx)
107 movl %ebx,PCB_EBX(%edx)
108 movl %esp,PCB_ESP(%edx)
109 movl %ebp,PCB_EBP(%edx)
110 movl %esi,PCB_ESI(%edx)
111 movl %edi,PCB_EDI(%edx)
112 movl %gs,PCB_GS(%edx)
113
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114 /*
115 * Push the LWKT switch restore function, which resumes a heavy
116 * weight process. Note that the LWKT switcher is based on
117 * TD_SP, while the heavy weight process switcher is based on
118 * PCB_ESP. TD_SP is usually one pointer pushed relative to
119 * PCB_ESP.
120 */
121 movl P_THREAD(%ecx),%eax
122 pushl $cpu_heavy_restore
123 movl %esp,TD_SP(%eax)
124
125 /*
126 * Save debug regs if necessary
127 */
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128 movb PCB_FLAGS(%edx),%al
129 andb $PCB_DBREGS,%al
130 jz 1f /* no, skip over */
131 movl %dr7,%eax /* yes, do the save */
132 movl %eax,PCB_DR7(%edx)
133 andl $0x0000fc00, %eax /* disable all watchpoints */
134 movl %eax,%dr7
135 movl %dr6,%eax
136 movl %eax,PCB_DR6(%edx)
137 movl %dr3,%eax
138 movl %eax,PCB_DR3(%edx)
139 movl %dr2,%eax
140 movl %eax,PCB_DR2(%edx)
141 movl %dr1,%eax
142 movl %eax,PCB_DR1(%edx)
143 movl %dr0,%eax
144 movl %eax,PCB_DR0(%edx)
1451:
146
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147 /*
148 * Save BGL nesting count. Note that we hold the BGL with a
149 * count of at least 1 on entry to cpu_heavy_switch().
150 */
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151#ifdef SMP
152 movl _mp_lock, %eax
153 /* XXX FIXME: we should be saving the local APIC TPR */
154#ifdef DIAGNOSTIC
155 cmpl $FREE_LOCK, %eax /* is it free? */
156 je badsw4 /* yes, bad medicine! */
157#endif /* DIAGNOSTIC */
158 andl $COUNT_FIELD, %eax /* clear CPU portion */
159 movl %eax, PCB_MPNEST(%edx) /* store it */
160#endif /* SMP */
161
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162 /*
163 * Save the FP state if we have used the FP.
164 */
984263bc 165#if NNPX > 0
263e4574 166 movl P_THREAD(%ecx),%ecx
af0bff84 167 cmpl %ecx,_npxthread
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168 jne 1f
169 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
170 pushl %edx
171 call _npxsave /* do it in a big C function */
172 popl %eax
1731:
af0bff84 174 /* %ecx,%edx trashed */
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175#endif /* NNPX > 0 */
176
84b592ba 177 /*
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178 * Switch to the next thread, which was passed as an argument
179 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
180 * the argument is at 8(%esp). Set the current thread, load the
181 * stack pointer, and 'ret' into the switch-restore function.
84b592ba 182 */
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183 movl 8(%esp),%eax
184 movl %eax,_curthread
185 movl TD_SP(%eax),%esp
186 ret
984263bc 187
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188/*
189 * cpu_exit_switch()
190 *
191 * The switch function is changed to this when a thread is going away
192 * for good. We have to ensure that the MMU state is not cached, and
193 * we don't bother saving the existing thread state before switching.
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194 *
195 * At this point we are in a critical section and this cpu owns the
196 * thread's token, which serves as an interlock until the switchout is
197 * complete.
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198 */
199ENTRY(cpu_exit_switch)
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200 /*
201 * Get us out of the vmspace
202 */
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203 movl _IdlePTD,%ecx
204 movl %cr3,%eax
205 cmpl %ecx,%eax
206 je 1f
207 movl %ecx,%cr3
ae8050a4 208 movl _curthread,%ecx
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210 /*
211 * Switch to the next thread.
212 */
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213 cli
214 movl 4(%esp),%eax
215 movl %eax,_curthread
216 movl TD_SP(%eax),%esp
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217
218 /*
219 * We are now effectively the next thread, transfer ownership to
220 * this thread and release the original thread's RW lock, which
221 * will allow it to be reaped. Messy but rock solid.
222 */
223 addl $TD_RWLOCK,%ecx
224 movl %eax,RW_OWNER(%ecx)
225 pushl %eax
226 pushl %ecx
227 call lwkt_exunlock
228 addl $4,%esp
229 popl %eax
230
231 /*
232 * Restore the next thread's state and resume it. Note: the
233 * restore function assumes that the next thread's address is
234 * in %eax.
235 */
8ad65e08 236 ret
984263bc 237
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238/*
239 * cpu_heavy_restore() (current thread in %eax on entry)
240 *
241 * Restore the thread after an LWKT switch. This entry is normally
242 * called via the LWKT switch restore function, which was pulled
243 * off the thread stack and jumped to.
244 *
245 * This entry is only called if the thread was previously saved
246 * using cpu_heavy_switch() (the heavy weight process thread switcher).
247 *
248 * YYY theoretically we do not have to restore everything here, a lot
249 * of this junk can wait until we return to usermode. But for now
250 * we restore everything.
251 *
252 * YYY STI/CLI sequencing.
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253 *
254 * YYY note: spl check is done in mi_switch when it splx()'s.
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255 */
256ENTRY(cpu_heavy_restore)
257 /* interrupts are disabled */
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258 movl TD_MACH+MTD_CPL(%eax),%edx
259 movl %edx,_cpl /* YYY temporary */
260 movl TD_PCB(%eax),%edx /* YYY temporary */
8ad65e08 261 movl TD_PROC(%eax),%ecx
984263bc 262#ifdef DIAGNOSTIC
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263 cmpb $SRUN,P_STAT(%ecx)
264 jne badsw2
265#endif
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266
267#if defined(SWTCH_OPTIM_STATS)
268 incl _swtch_optim_stats
269#endif
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270 /*
271 * Restore the MMU address space
272 */
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273 movl %cr3,%ebx
274 cmpl PCB_CR3(%edx),%ebx
275 je 4f
276#if defined(SWTCH_OPTIM_STATS)
277 decl _swtch_optim_stats
278 incl _tlb_flush_count
279#endif
280 movl PCB_CR3(%edx),%ebx
281 movl %ebx,%cr3
2824:
283
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284 /*
285 * Deal with the PCB extension, restore the private tss
286 */
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287#ifdef SMP
288 movl _cpuid, %esi
289#else
290 xorl %esi, %esi
291#endif
292 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
293 je 1f
294 btsl %esi, _private_tss /* mark use of private tss */
295 movl PCB_EXT(%edx), %edi /* new tss descriptor */
296 jmp 2f
2971:
298
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299 /*
300 * update common_tss.tss_esp0 pointer. This is the supervisor
301 * stack pointer on entry from user mode. Since the pcb is
302 * at the top of the supervisor stack esp0 starts just below it.
303 * We leave enough space for vm86 (16 bytes).
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304 *
305 * common_tss.tss_esp0 is needed when user mode traps into the
306 * kernel.
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307 */
308 leal -16(%edx),%ebx
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309 movl %ebx, _common_tss + TSS_ESP0
310
311 btrl %esi, _private_tss
312 jae 3f
313#ifdef SMP
314 movl $gd_common_tssd, %edi
315 addl %fs:0, %edi
316#else
317 movl $_common_tssd, %edi
318#endif
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319 /*
320 * Move the correct TSS descriptor into the GDT slot, then reload
321 * tr. YYY not sure what is going on here
322 */
984263bc 3232:
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324 movl _tss_gdt, %ebx /* entry in GDT */
325 movl 0(%edi), %eax
326 movl %eax, 0(%ebx)
327 movl 4(%edi), %eax
328 movl %eax, 4(%ebx)
329 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
330 ltr %si
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331
332 /*
333 * Tell the pmap that our cpu is using the VMSPACE now.
334 */
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3353:
336 movl P_VMSPACE(%ecx), %ebx
337#ifdef SMP
338 movl _cpuid, %eax
339#else
340 xorl %eax, %eax
341#endif
342 btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
343
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344 /*
345 * Restore general registers.
346 */
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347 movl PCB_EBX(%edx),%ebx
348 movl PCB_ESP(%edx),%esp
349 movl PCB_EBP(%edx),%ebp
350 movl PCB_ESI(%edx),%esi
351 movl PCB_EDI(%edx),%edi
352 movl PCB_EIP(%edx),%eax
353 movl %eax,(%esp)
354
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355 /*
356 * SMP ickyness to direct interrupts.
357 */
358
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359#ifdef SMP
360#ifdef GRAB_LOPRIO /* hold LOPRIO for INTs */
361#ifdef CHEAP_TPR
362 movl $0, lapic_tpr
363#else
364 andl $~APIC_TPR_PRIO, lapic_tpr
365#endif /** CHEAP_TPR */
366#endif /** GRAB_LOPRIO */
367 movl _cpuid,%eax
368 movb %al, P_ONCPU(%ecx)
369#endif /* SMP */
984263bc 370
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371 /*
372 * Restore the BGL nesting count. Note that the nesting count will
373 * be at least 1.
374 */
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375#ifdef SMP
376 movl _cpu_lockid, %eax
377 orl PCB_MPNEST(%edx), %eax /* add next count from PROC */
378 movl %eax, _mp_lock /* load the mp_lock */
379 /* XXX FIXME: we should be restoring the local APIC TPR */
380#endif /* SMP */
381
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382 /*
383 * Restore the user LDT if we have one
384 */
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385#ifdef USER_LDT
386 cmpl $0, PCB_USERLDT(%edx)
387 jnz 1f
388 movl __default_ldt,%eax
389 cmpl _currentldt,%eax
390 je 2f
391 lldt __default_ldt
392 movl %eax,_currentldt
393 jmp 2f
3941: pushl %edx
395 call _set_user_ldt
396 popl %edx
3972:
398#endif
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399 /*
400 * Restore the %gs segment register, which must be done after
401 * loading the user LDT. Since user processes can modify the
402 * register via procfs, this may result in a fault which is
403 * detected by checking the fault address against cpu_switch_load_gs
404 * in i386/i386/trap.c
405 */
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406 .globl cpu_switch_load_gs
407cpu_switch_load_gs:
408 movl PCB_GS(%edx),%gs
409
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410 /*
411 * Restore the DEBUG register state if necessary.
412 */
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413 movb PCB_FLAGS(%edx),%al
414 andb $PCB_DBREGS,%al
415 jz 1f /* no, skip over */
416 movl PCB_DR6(%edx),%eax /* yes, do the restore */
417 movl %eax,%dr6
418 movl PCB_DR3(%edx),%eax
419 movl %eax,%dr3
420 movl PCB_DR2(%edx),%eax
421 movl %eax,%dr2
422 movl PCB_DR1(%edx),%eax
423 movl %eax,%dr1
424 movl PCB_DR0(%edx),%eax
425 movl %eax,%dr0
426 movl %dr7,%eax /* load dr7 so as not to disturb */
427 andl $0x0000fc00,%eax /* reserved bits */
428 pushl %ebx
429 movl PCB_DR7(%edx),%ebx
430 andl $~0x0000fc00,%ebx
431 orl %ebx,%eax
432 popl %ebx
433 movl %eax,%dr7
4341:
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435#if 0
436 /*
437 * Remove the heavy weight process from the heavy weight queue.
438 * this will also have the side effect of removing the thread from
439 * the run queue. YYY temporary?
440 *
441 * LWKT threads stay on the run queue until explicitly removed.
442 */
443 pushl %ecx
444 call remrunqueue
445 addl $4,%esp
446#endif
984263bc 447
8ad65e08 448 sti /* XXX */
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449 ret
450
451CROSSJUMPTARGET(sw1a)
452
453#ifdef DIAGNOSTIC
454badsw1:
455 pushl $sw0_1
456 call _panic
457
458sw0_1: .asciz "cpu_switch: has wchan"
459
460badsw2:
461 pushl $sw0_2
462 call _panic
463
464sw0_2: .asciz "cpu_switch: not SRUN"
465#endif
466
467#if defined(SMP) && defined(DIAGNOSTIC)
468badsw4:
469 pushl $sw0_4
470 call _panic
471
472sw0_4: .asciz "cpu_switch: do not have lock"
473#endif /* SMP && DIAGNOSTIC */
474
475/*
476 * savectx(pcb)
477 * Update pcb, saving current processor state.
478 */
479ENTRY(savectx)
480 /* fetch PCB */
481 movl 4(%esp),%ecx
482
483 /* caller's return address - child won't execute this routine */
484 movl (%esp),%eax
485 movl %eax,PCB_EIP(%ecx)
486
487 movl %cr3,%eax
488 movl %eax,PCB_CR3(%ecx)
489
490 movl %ebx,PCB_EBX(%ecx)
491 movl %esp,PCB_ESP(%ecx)
492 movl %ebp,PCB_EBP(%ecx)
493 movl %esi,PCB_ESI(%ecx)
494 movl %edi,PCB_EDI(%ecx)
495 movl %gs,PCB_GS(%ecx)
496
497#if NNPX > 0
498 /*
af0bff84 499 * If npxthread == NULL, then the npx h/w state is irrelevant and the
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500 * state had better already be in the pcb. This is true for forks
501 * but not for dumps (the old book-keeping with FP flags in the pcb
502 * always lost for dumps because the dump pcb has 0 flags).
503 *
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504 * If npxthread != NULL, then we have to save the npx h/w state to
505 * npxthread's pcb and copy it to the requested pcb, or save to the
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506 * requested pcb and reload. Copying is easier because we would
507 * have to handle h/w bugs for reloading. We used to lose the
508 * parent's npx state for forks by forgetting to reload.
509 */
af0bff84 510 movl _npxthread,%eax
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511 testl %eax,%eax
512 je 1f
513
514 pushl %ecx
b7c628e4 515 movl TD_PCB(%eax),%eax
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516 leal PCB_SAVEFPU(%eax),%eax
517 pushl %eax
518 pushl %eax
519 call _npxsave
520 addl $4,%esp
521 popl %eax
522 popl %ecx
523
524 pushl $PCB_SAVEFPU_SIZE
525 leal PCB_SAVEFPU(%ecx),%ecx
526 pushl %ecx
527 pushl %eax
528 call _bcopy
529 addl $12,%esp
530#endif /* NNPX > 0 */
531
5321:
533 ret
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534
535/*
536 * cpu_idle_restore() (current thread in %eax on entry)
537 *
538 * Don't bother setting up any regs other then %ebp so backtraces
539 * don't die. This restore function is used to bootstrap into the
540 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
541 * switching.
542 */
543ENTRY(cpu_idle_restore)
544 movl $0,%ebp
545 pushl $0
546 jmp cpu_idle
547
548/*
549 * cpu_lwkt_switch()
550 *
551 * Standard LWKT switching function. Only non-scratch registers are
552 * saved and we don't bother with the MMU state or anything else.
553 * YYY BGL, SPL
554 */
555ENTRY(cpu_lwkt_switch)
556 movl 4(%esp),%eax
557 pushl %ebp
558 pushl %ebx
559 pushl %esi
560 pushl %edi
561 pushfl
562 movl _curthread,%ecx
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563 movl _cpl,%edx /* YYY temporary */
564 movl %edx,TD_MACH+MTD_CPL(%ecx) /* YYY temporary */
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565 pushl $cpu_lwkt_restore
566 cli
567 movl %esp,TD_SP(%ecx)
568 movl %eax,_curthread
569 movl TD_SP(%eax),%esp
570 ret
571
572/*
573 * cpu_idle_restore() (current thread in %eax on entry)
574 *
575 * Don't bother setting up any regs other then %ebp so backtraces
576 * don't die.
577 */
578ENTRY(cpu_lwkt_restore)
579 popfl
580 popl %edi
581 popl %esi
582 popl %ebx
583 popl %ebp
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584 movl TD_MACH+MTD_CPL(%eax),%ecx /* YYY temporary */
585 movl %ecx,_cpl /* YYY temporary */
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586 andl _ipending,%ecx /* YYY temporary */
587 je 1f
588 pushl %ecx
589 call splx /* YYY set gd_reqpri instead? */
590 addl $4,%esp
5911:
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592 ret
593