kernel - Make pcb_onfault more robust.
[dragonfly.git] / sys / kern / lwkt_ipiq.c
CommitLineData
3b6b7bd1 1/*
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2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
6 *
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7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
8c10bfcf 10 *
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11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3b6b7bd1 32 * SUCH DAMAGE.
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33 */
34
35/*
36 * This module implements IPI message queueing and the MI portion of IPI
37 * message processing.
38 */
39
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40#include "opt_ddb.h"
41
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42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/kernel.h>
45#include <sys/proc.h>
46#include <sys/rtprio.h>
47#include <sys/queue.h>
48#include <sys/thread2.h>
49#include <sys/sysctl.h>
ac72c7f4 50#include <sys/ktr.h>
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51#include <sys/kthread.h>
52#include <machine/cpu.h>
53#include <sys/lock.h>
54#include <sys/caps.h>
55
56#include <vm/vm.h>
57#include <vm/vm_param.h>
58#include <vm/vm_kern.h>
59#include <vm/vm_object.h>
60#include <vm/vm_page.h>
61#include <vm/vm_map.h>
62#include <vm/vm_pager.h>
63#include <vm/vm_extern.h>
64#include <vm/vm_zone.h>
65
66#include <machine/stdarg.h>
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67#include <machine/smp.h>
68#include <machine/atomic.h>
69
3b6b7bd1 70#ifdef SMP
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71static __int64_t ipiq_count; /* total calls to lwkt_send_ipiq*() */
72static __int64_t ipiq_fifofull; /* number of fifo full conditions detected */
73static __int64_t ipiq_avoided; /* interlock with target avoids cpu ipi */
74static __int64_t ipiq_passive; /* passive IPI messages */
75static __int64_t ipiq_cscount; /* number of cpu synchronizations */
d5b2d319 76static int ipiq_debug; /* set to 1 for debug */
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77#ifdef PANIC_DEBUG
78static int panic_ipiq_cpu = -1;
79static int panic_ipiq_count = 100;
80#endif
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81#endif
82
3b6b7bd1 83#ifdef SMP
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84SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_count, CTLFLAG_RW, &ipiq_count, 0,
85 "Number of IPI's sent");
86SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_fifofull, CTLFLAG_RW, &ipiq_fifofull, 0,
87 "Number of fifo full conditions detected");
88SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_avoided, CTLFLAG_RW, &ipiq_avoided, 0,
89 "Number of IPI's avoided by interlock with target cpu");
90SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_passive, CTLFLAG_RW, &ipiq_passive, 0,
91 "Number of passive IPI messages sent");
92SYSCTL_QUAD(_lwkt, OID_AUTO, ipiq_cscount, CTLFLAG_RW, &ipiq_cscount, 0,
93 "Number of cpu synchronizations");
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94SYSCTL_INT(_lwkt, OID_AUTO, ipiq_debug, CTLFLAG_RW, &ipiq_debug, 0,
95 "");
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96#ifdef PANIC_DEBUG
97SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_cpu, CTLFLAG_RW, &panic_ipiq_cpu, 0, "");
98SYSCTL_INT(_lwkt, OID_AUTO, panic_ipiq_count, CTLFLAG_RW, &panic_ipiq_count, 0, "");
99#endif
3b6b7bd1 100
a7adb95a 101#define IPIQ_STRING "func=%p arg1=%p arg2=%d scpu=%d dcpu=%d"
5bf48697 102#define IPIQ_ARGS void *func, void *arg1, int arg2, int scpu, int dcpu
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103
104#if !defined(KTR_IPIQ)
105#define KTR_IPIQ KTR_ALL
3b6b7bd1 106#endif
ac72c7f4 107KTR_INFO_MASTER(ipiq);
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108KTR_INFO(KTR_IPIQ, ipiq, send_norm, 0, IPIQ_STRING, IPIQ_ARGS);
109KTR_INFO(KTR_IPIQ, ipiq, send_pasv, 1, IPIQ_STRING, IPIQ_ARGS);
110KTR_INFO(KTR_IPIQ, ipiq, send_nbio, 2, IPIQ_STRING, IPIQ_ARGS);
111KTR_INFO(KTR_IPIQ, ipiq, send_fail, 3, IPIQ_STRING, IPIQ_ARGS);
112KTR_INFO(KTR_IPIQ, ipiq, receive, 4, IPIQ_STRING, IPIQ_ARGS);
113KTR_INFO(KTR_IPIQ, ipiq, sync_start, 5, "cpumask=%08lx", unsigned long mask);
114KTR_INFO(KTR_IPIQ, ipiq, sync_end, 6, "cpumask=%08lx", unsigned long mask);
115KTR_INFO(KTR_IPIQ, ipiq, cpu_send, 7, IPIQ_STRING, IPIQ_ARGS);
116KTR_INFO(KTR_IPIQ, ipiq, send_end, 8, IPIQ_STRING, IPIQ_ARGS);
ac72c7f4 117
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118#define logipiq(name, func, arg1, arg2, sgd, dgd) \
119 KTR_LOG(ipiq_ ## name, func, arg1, arg2, sgd->gd_cpuid, dgd->gd_cpuid)
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120#define logipiq2(name, arg) \
121 KTR_LOG(ipiq_ ## name, arg)
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122
123#endif /* SMP */
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124
125#ifdef SMP
126
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127static int lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
128 struct intrframe *frame);
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129static void lwkt_cpusync_remote1(lwkt_cpusync_t cs);
130static void lwkt_cpusync_remote2(lwkt_cpusync_t cs);
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131
132/*
133 * Send a function execution request to another cpu. The request is queued
134 * on the cpu<->cpu ipiq matrix. Each cpu owns a unique ipiq FIFO for every
135 * possible target cpu. The FIFO can be written.
136 *
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137 * If the FIFO fills up we have to enable interrupts to avoid an APIC
138 * deadlock and process pending IPIQs while waiting for it to empty.
139 * Otherwise we may soft-deadlock with another cpu whos FIFO is also full.
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140 *
141 * We can safely bump gd_intr_nesting_level because our crit_exit() at the
142 * end will take care of any pending interrupts.
143 *
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144 * The actual hardware IPI is avoided if the target cpu is already processing
145 * the queue from a prior IPI. It is possible to pipeline IPI messages
146 * very quickly between cpus due to the FIFO hysteresis.
147 *
148 * Need not be called from a critical section.
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149 */
150int
b8a98473 151lwkt_send_ipiq3(globaldata_t target, ipifunc3_t func, void *arg1, int arg2)
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152{
153 lwkt_ipiq_t ip;
154 int windex;
155 struct globaldata *gd = mycpu;
156
a7adb95a 157 logipiq(send_norm, func, arg1, arg2, gd, target);
ac72c7f4 158
3b6b7bd1 159 if (target == gd) {
b8a98473 160 func(arg1, arg2, NULL);
c92e86f1 161 logipiq(send_end, func, arg1, arg2, gd, target);
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162 return(0);
163 }
164 crit_enter();
165 ++gd->gd_intr_nesting_level;
166#ifdef INVARIANTS
167 if (gd->gd_intr_nesting_level > 20)
168 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
169#endif
f9235b6d 170 KKASSERT(curthread->td_critcount);
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171 ++ipiq_count;
172 ip = &gd->gd_ipiq[target->gd_cpuid];
173
174 /*
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175 * Do not allow the FIFO to become full. Interrupts must be physically
176 * enabled while we liveloop to avoid deadlocking the APIC.
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177 *
178 * The target ipiq may have gotten filled up due to passive IPIs and thus
179 * not be aware that its queue is too full, so be sure to issue an
180 * ipiq interrupt to the target cpu.
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181 */
182 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
46d4e165 183#if defined(__i386__)
4c9f5a7f 184 unsigned int eflags = read_eflags();
b2b3ffcd 185#elif defined(__x86_64__)
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186 unsigned long rflags = read_rflags();
187#endif
4c9f5a7f 188
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189 cpu_enable_intr();
190 ++ipiq_fifofull;
cfaeae2a 191 DEBUG_PUSH_INFO("send_ipiq3");
4c9f5a7f 192 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
b12defdc 193 if (atomic_poll_acquire_int(&target->gd_npoll)) {
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194 logipiq(cpu_send, func, arg1, arg2, gd, target);
195 cpu_send_ipiq(target->gd_cpuid);
196 }
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197 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
198 lwkt_process_ipiq();
da0b0e8b 199 cpu_pause();
4c9f5a7f 200 }
cfaeae2a 201 DEBUG_POP_INFO();
46d4e165 202#if defined(__i386__)
4c9f5a7f 203 write_eflags(eflags);
b2b3ffcd 204#elif defined(__x86_64__)
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205 write_rflags(rflags);
206#endif
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207 }
208
209 /*
210 * Queue the new message
3b6b7bd1 211 */
3b6b7bd1 212 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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213 ip->ip_info[windex].func = func;
214 ip->ip_info[windex].arg1 = arg1;
215 ip->ip_info[windex].arg2 = arg2;
35238fa5 216 cpu_sfence();
3b6b7bd1 217 ++ip->ip_windex;
b12defdc 218 atomic_set_cpumask(&target->gd_ipimask, gd->gd_cpumask);
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219
220 /*
221 * signal the target cpu that there is work pending.
222 */
b12defdc 223 if (atomic_poll_acquire_int(&target->gd_npoll)) {
866b61fb 224 logipiq(cpu_send, func, arg1, arg2, gd, target);
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225 cpu_send_ipiq(target->gd_cpuid);
226 } else {
da0b0e8b 227 ++ipiq_avoided;
4c9f5a7f 228 }
da0b0e8b 229 --gd->gd_intr_nesting_level;
4c9f5a7f 230 crit_exit();
c92e86f1 231 logipiq(send_end, func, arg1, arg2, gd, target);
da0b0e8b 232
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233 return(ip->ip_windex);
234}
235
236/*
237 * Similar to lwkt_send_ipiq() but this function does not actually initiate
238 * the IPI to the target cpu unless the FIFO has become too full, so it is
239 * very fast.
240 *
241 * This function is used for non-critical IPI messages, such as memory
242 * deallocations. The queue will typically be flushed by the target cpu at
243 * the next clock interrupt.
244 *
245 * Need not be called from a critical section.
246 */
247int
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248lwkt_send_ipiq3_passive(globaldata_t target, ipifunc3_t func,
249 void *arg1, int arg2)
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250{
251 lwkt_ipiq_t ip;
252 int windex;
253 struct globaldata *gd = mycpu;
254
255 KKASSERT(target != gd);
256 crit_enter();
257 ++gd->gd_intr_nesting_level;
da0b0e8b 258 logipiq(send_pasv, func, arg1, arg2, gd, target);
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259#ifdef INVARIANTS
260 if (gd->gd_intr_nesting_level > 20)
261 panic("lwkt_send_ipiq: TOO HEAVILY NESTED!");
262#endif
f9235b6d 263 KKASSERT(curthread->td_critcount);
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264 ++ipiq_count;
265 ++ipiq_passive;
266 ip = &gd->gd_ipiq[target->gd_cpuid];
267
268 /*
269 * Do not allow the FIFO to become full. Interrupts must be physically
270 * enabled while we liveloop to avoid deadlocking the APIC.
271 */
3b6b7bd1 272 if (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 2) {
46d4e165 273#if defined(__i386__)
3b6b7bd1 274 unsigned int eflags = read_eflags();
b2b3ffcd 275#elif defined(__x86_64__)
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JG
276 unsigned long rflags = read_rflags();
277#endif
4c9f5a7f 278
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279 cpu_enable_intr();
280 ++ipiq_fifofull;
cfaeae2a 281 DEBUG_PUSH_INFO("send_ipiq3_passive");
3b6b7bd1 282 while (ip->ip_windex - ip->ip_rindex > MAXCPUFIFO / 4) {
b12defdc 283 if (atomic_poll_acquire_int(&target->gd_npoll)) {
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284 logipiq(cpu_send, func, arg1, arg2, gd, target);
285 cpu_send_ipiq(target->gd_cpuid);
286 }
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287 KKASSERT(ip->ip_windex - ip->ip_rindex != MAXCPUFIFO - 1);
288 lwkt_process_ipiq();
da0b0e8b 289 cpu_pause();
3b6b7bd1 290 }
cfaeae2a 291 DEBUG_POP_INFO();
46d4e165 292#if defined(__i386__)
3b6b7bd1 293 write_eflags(eflags);
b2b3ffcd 294#elif defined(__x86_64__)
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295 write_rflags(rflags);
296#endif
3b6b7bd1 297 }
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298
299 /*
300 * Queue the new message
301 */
302 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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303 ip->ip_info[windex].func = func;
304 ip->ip_info[windex].arg1 = arg1;
305 ip->ip_info[windex].arg2 = arg2;
35238fa5 306 cpu_sfence();
4c9f5a7f 307 ++ip->ip_windex;
b12defdc 308 atomic_set_cpumask(&target->gd_ipimask, gd->gd_cpumask);
3b6b7bd1 309 --gd->gd_intr_nesting_level;
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310
311 /*
312 * Do not signal the target cpu, it will pick up the IPI when it next
313 * polls (typically on the next tick).
314 */
3b6b7bd1 315 crit_exit();
c92e86f1 316 logipiq(send_end, func, arg1, arg2, gd, target);
da0b0e8b 317
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318 return(ip->ip_windex);
319}
320
321/*
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322 * Send an IPI request without blocking, return 0 on success, ENOENT on
323 * failure. The actual queueing of the hardware IPI may still force us
324 * to spin and process incoming IPIs but that will eventually go away
325 * when we've gotten rid of the other general IPIs.
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326 */
327int
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328lwkt_send_ipiq3_nowait(globaldata_t target, ipifunc3_t func,
329 void *arg1, int arg2)
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330{
331 lwkt_ipiq_t ip;
332 int windex;
333 struct globaldata *gd = mycpu;
334
a7adb95a 335 logipiq(send_nbio, func, arg1, arg2, gd, target);
f9235b6d 336 KKASSERT(curthread->td_critcount);
41a01a4d 337 if (target == gd) {
b8a98473 338 func(arg1, arg2, NULL);
c92e86f1 339 logipiq(send_end, func, arg1, arg2, gd, target);
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340 return(0);
341 }
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342 crit_enter();
343 ++gd->gd_intr_nesting_level;
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344 ++ipiq_count;
345 ip = &gd->gd_ipiq[target->gd_cpuid];
346
ac72c7f4 347 if (ip->ip_windex - ip->ip_rindex >= MAXCPUFIFO * 2 / 3) {
a7adb95a 348 logipiq(send_fail, func, arg1, arg2, gd, target);
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349 --gd->gd_intr_nesting_level;
350 crit_exit();
41a01a4d 351 return(ENOENT);
ac72c7f4 352 }
41a01a4d 353 windex = ip->ip_windex & MAXCPUFIFO_MASK;
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354 ip->ip_info[windex].func = func;
355 ip->ip_info[windex].arg1 = arg1;
356 ip->ip_info[windex].arg2 = arg2;
35238fa5 357 cpu_sfence();
41a01a4d 358 ++ip->ip_windex;
b12defdc 359 atomic_set_cpumask(&target->gd_ipimask, gd->gd_cpumask);
4c9f5a7f 360
41a01a4d 361 /*
4c9f5a7f 362 * This isn't a passive IPI, we still have to signal the target cpu.
41a01a4d 363 */
b12defdc 364 if (atomic_poll_acquire_int(&target->gd_npoll)) {
866b61fb 365 logipiq(cpu_send, func, arg1, arg2, gd, target);
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366 cpu_send_ipiq(target->gd_cpuid);
367 } else {
da0b0e8b 368 ++ipiq_avoided;
4c9f5a7f 369 }
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370 --gd->gd_intr_nesting_level;
371 crit_exit();
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372
373 logipiq(send_end, func, arg1, arg2, gd, target);
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374 return(0);
375}
376
377/*
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378 * deprecated, used only by fast int forwarding.
379 */
380int
b8a98473 381lwkt_send_ipiq3_bycpu(int dcpu, ipifunc3_t func, void *arg1, int arg2)
3b6b7bd1 382{
b8a98473 383 return(lwkt_send_ipiq3(globaldata_find(dcpu), func, arg1, arg2));
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384}
385
386/*
387 * Send a message to several target cpus. Typically used for scheduling.
388 * The message will not be sent to stopped cpus.
389 */
390int
da23a592 391lwkt_send_ipiq3_mask(cpumask_t mask, ipifunc3_t func, void *arg1, int arg2)
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392{
393 int cpuid;
394 int count = 0;
395
396 mask &= ~stopped_cpus;
397 while (mask) {
da23a592 398 cpuid = BSFCPUMASK(mask);
b8a98473 399 lwkt_send_ipiq3(globaldata_find(cpuid), func, arg1, arg2);
da23a592 400 mask &= ~CPUMASK(cpuid);
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401 ++count;
402 }
403 return(count);
404}
405
406/*
407 * Wait for the remote cpu to finish processing a function.
408 *
409 * YYY we have to enable interrupts and process the IPIQ while waiting
410 * for it to empty or we may deadlock with another cpu. Create a CPU_*()
411 * function to do this! YYY we really should 'block' here.
412 *
413 * MUST be called from a critical section. This routine may be called
414 * from an interrupt (for example, if an interrupt wakes a foreign thread
415 * up).
416 */
417void
418lwkt_wait_ipiq(globaldata_t target, int seq)
419{
420 lwkt_ipiq_t ip;
421 int maxc = 100000000;
422
423 if (target != mycpu) {
424 ip = &mycpu->gd_ipiq[target->gd_cpuid];
425 if ((int)(ip->ip_xindex - seq) < 0) {
46d4e165 426#if defined(__i386__)
3b6b7bd1 427 unsigned int eflags = read_eflags();
b2b3ffcd 428#elif defined(__x86_64__)
46d4e165
JG
429 unsigned long rflags = read_rflags();
430#endif
3b6b7bd1 431 cpu_enable_intr();
cfaeae2a 432 DEBUG_PUSH_INFO("wait_ipiq");
3b6b7bd1 433 while ((int)(ip->ip_xindex - seq) < 0) {
41a01a4d 434 crit_enter();
3b6b7bd1 435 lwkt_process_ipiq();
41a01a4d 436 crit_exit();
3b6b7bd1 437 if (--maxc == 0)
6ea70f76 438 kprintf("LWKT_WAIT_IPIQ WARNING! %d wait %d (%d)\n", mycpu->gd_cpuid, target->gd_cpuid, ip->ip_xindex - seq);
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439 if (maxc < -1000000)
440 panic("LWKT_WAIT_IPIQ");
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441 /*
442 * xindex may be modified by another cpu, use a load fence
443 * to ensure that the loop does not use a speculative value
444 * (which may improve performance).
445 */
446 cpu_lfence();
3b6b7bd1 447 }
cfaeae2a 448 DEBUG_POP_INFO();
46d4e165 449#if defined(__i386__)
3b6b7bd1 450 write_eflags(eflags);
b2b3ffcd 451#elif defined(__x86_64__)
46d4e165
JG
452 write_rflags(rflags);
453#endif
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454 }
455 }
456}
457
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458int
459lwkt_seq_ipiq(globaldata_t target)
460{
461 lwkt_ipiq_t ip;
462
463 ip = &mycpu->gd_ipiq[target->gd_cpuid];
464 return(ip->ip_windex);
465}
466
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467/*
468 * Called from IPI interrupt (like a fast interrupt), which has placed
469 * us in a critical section. The MP lock may or may not be held.
470 * May also be called from doreti or splz, or be reentrantly called
b12defdc 471 * indirectly through the ip_info[].func we run.
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472 *
473 * There are two versions, one where no interrupt frame is available (when
474 * called from the send code and from splz, and one where an interrupt
475 * frame is available.
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476 *
477 * When the current cpu is mastering a cpusync we do NOT internally loop
478 * on the cpusyncq poll. We also do not re-flag a pending ipi due to
479 * the cpusyncq poll because this can cause doreti/splz to loop internally.
480 * The cpusync master's own loop must be allowed to run to avoid a deadlock.
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481 */
482void
483lwkt_process_ipiq(void)
484{
485 globaldata_t gd = mycpu;
ac72c7f4 486 globaldata_t sgd;
3b6b7bd1 487 lwkt_ipiq_t ip;
b12defdc 488 cpumask_t mask;
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489 int n;
490
da0b0e8b 491 ++gd->gd_processing_ipiq;
3b6b7bd1 492again:
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493 cpu_lfence();
494 mask = gd->gd_ipimask;
495 atomic_clear_cpumask(&gd->gd_ipimask, mask);
496 while (mask) {
497 n = BSFCPUMASK(mask);
3b6b7bd1 498 if (n != gd->gd_cpuid) {
ac72c7f4
MD
499 sgd = globaldata_find(n);
500 ip = sgd->gd_ipiq;
3b6b7bd1 501 if (ip != NULL) {
b8a98473 502 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], NULL))
3b6b7bd1
MD
503 ;
504 }
505 }
b12defdc 506 mask &= ~CPUMASK(n);
3b6b7bd1 507 }
c17a6852
MD
508
509 /*
510 * Process pending cpusyncs. If the current thread has a cpusync
511 * active cpusync we only run the list once and do not re-flag
512 * as the thread itself is processing its interlock.
513 */
da0b0e8b
MD
514 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, NULL)) {
515 if (gd->gd_curthread->td_cscount == 0)
516 goto again;
517 /* need_ipiq(); do not reflag */
3b6b7bd1 518 }
b12defdc
MD
519
520 /*
521 * Interlock to allow more IPI interrupts. Recheck ipimask after
522 * releasing gd_npoll.
523 */
524 if (gd->gd_ipimask)
525 goto again;
526 atomic_poll_release_int(&gd->gd_npoll);
527 cpu_mfence();
528 if (gd->gd_ipimask)
529 goto again;
da0b0e8b 530 --gd->gd_processing_ipiq;
3b6b7bd1
MD
531}
532
3b6b7bd1 533void
c7eb0589 534lwkt_process_ipiq_frame(struct intrframe *frame)
3b6b7bd1
MD
535{
536 globaldata_t gd = mycpu;
ac72c7f4 537 globaldata_t sgd;
3b6b7bd1 538 lwkt_ipiq_t ip;
b12defdc 539 cpumask_t mask;
3b6b7bd1
MD
540 int n;
541
542again:
b12defdc
MD
543 cpu_lfence();
544 mask = gd->gd_ipimask;
545 atomic_clear_cpumask(&gd->gd_ipimask, mask);
546 while (mask) {
547 n = BSFCPUMASK(mask);
3b6b7bd1 548 if (n != gd->gd_cpuid) {
ac72c7f4
MD
549 sgd = globaldata_find(n);
550 ip = sgd->gd_ipiq;
3b6b7bd1 551 if (ip != NULL) {
c7eb0589 552 while (lwkt_process_ipiq_core(sgd, &ip[gd->gd_cpuid], frame))
3b6b7bd1
MD
553 ;
554 }
555 }
b12defdc 556 mask &= ~CPUMASK(n);
3b6b7bd1
MD
557 }
558 if (gd->gd_cpusyncq.ip_rindex != gd->gd_cpusyncq.ip_windex) {
c7eb0589 559 if (lwkt_process_ipiq_core(gd, &gd->gd_cpusyncq, frame)) {
0f7a3396
MD
560 if (gd->gd_curthread->td_cscount == 0)
561 goto again;
da0b0e8b 562 /* need_ipiq(); do not reflag */
0f7a3396 563 }
3b6b7bd1 564 }
b12defdc
MD
565
566 /*
567 * Interlock to allow more IPI interrupts. Recheck ipimask after
568 * releasing gd_npoll.
569 */
570 if (gd->gd_ipimask)
571 goto again;
572 atomic_poll_release_int(&gd->gd_npoll);
573 cpu_mfence();
574 if (gd->gd_ipimask)
575 goto again;
3b6b7bd1 576}
3b6b7bd1 577
cfaeae2a
MD
578#if 0
579static int iqticks[SMP_MAXCPU];
580static int iqcount[SMP_MAXCPU];
581#endif
582#if 0
583static int iqterm[SMP_MAXCPU];
584#endif
585
3b6b7bd1 586static int
b8a98473
MD
587lwkt_process_ipiq_core(globaldata_t sgd, lwkt_ipiq_t ip,
588 struct intrframe *frame)
3b6b7bd1 589{
2de4f77e 590 globaldata_t mygd = mycpu;
3b6b7bd1 591 int ri;
35238fa5 592 int wi;
b8a98473
MD
593 ipifunc3_t copy_func;
594 void *copy_arg1;
595 int copy_arg2;
35238fa5 596
cfaeae2a
MD
597#if 0
598 if (iqticks[mygd->gd_cpuid] != ticks) {
599 iqticks[mygd->gd_cpuid] = ticks;
600 iqcount[mygd->gd_cpuid] = 0;
601 }
602 if (++iqcount[mygd->gd_cpuid] > 3000000) {
603 kprintf("cpu %d ipiq maxed cscount %d spin %d\n",
604 mygd->gd_cpuid,
605 mygd->gd_curthread->td_cscount,
0846e4ce 606 mygd->gd_spinlocks);
cfaeae2a
MD
607 iqcount[mygd->gd_cpuid] = 0;
608#if 0
609 if (++iqterm[mygd->gd_cpuid] > 10)
610 panic("cpu %d ipiq maxed", mygd->gd_cpuid);
611#endif
612 int i;
613 for (i = 0; i < ncpus; ++i) {
614 if (globaldata_find(i)->gd_infomsg)
615 kprintf(" %s", globaldata_find(i)->gd_infomsg);
616 }
617 kprintf("\n");
618 }
619#endif
620
35238fa5 621 /*
b12defdc
MD
622 * Clear the originating core from our ipimask, we will process all
623 * incoming messages.
624 *
35238fa5
MD
625 * Obtain the current write index, which is modified by a remote cpu.
626 * Issue a load fence to prevent speculative reads of e.g. data written
627 * by the other cpu prior to it updating the index.
628 */
f9235b6d 629 KKASSERT(curthread->td_critcount);
35238fa5
MD
630 wi = ip->ip_windex;
631 cpu_lfence();
2de4f77e 632 ++mygd->gd_intr_nesting_level;
35238fa5 633
3b6b7bd1 634 /*
562273ea
MD
635 * NOTE: xindex is only updated after we are sure the function has
636 * finished execution. Beware lwkt_process_ipiq() reentrancy!
637 * The function may send an IPI which may block/drain.
d64a7617 638 *
562273ea
MD
639 * NOTE: Due to additional IPI operations that the callback function
640 * may make, it is possible for both rindex and windex to advance and
641 * thus for rindex to advance passed our cached windex.
642 *
d5b2d319 643 * NOTE: A load fence is required to prevent speculative loads prior
562273ea 644 * to the loading of ip_rindex. Even though stores might be
d5b2d319
MD
645 * ordered, loads are probably not. A memory fence is required
646 * to prevent reordering of the loads after the ip_rindex update.
c17a6852
MD
647 *
648 * NOTE: Single pass only. Returns non-zero if the queue is not empty
649 * on return.
3b6b7bd1 650 */
d64a7617 651 while (wi - (ri = ip->ip_rindex) > 0) {
3b6b7bd1 652 ri &= MAXCPUFIFO_MASK;
d5b2d319 653 cpu_lfence();
b12defdc
MD
654 copy_func = ip->ip_info[ri].func;
655 copy_arg1 = ip->ip_info[ri].arg1;
656 copy_arg2 = ip->ip_info[ri].arg2;
d5b2d319 657 cpu_mfence();
728f6208 658 ++ip->ip_rindex;
562273ea
MD
659 KKASSERT((ip->ip_rindex & MAXCPUFIFO_MASK) ==
660 ((ri + 1) & MAXCPUFIFO_MASK));
a7adb95a 661 logipiq(receive, copy_func, copy_arg1, copy_arg2, sgd, mycpu);
d5b2d319
MD
662#ifdef INVARIANTS
663 if (ipiq_debug && (ip->ip_rindex & 0xFFFFFF) == 0) {
664 kprintf("cpu %d ipifunc %p %p %d (frame %p)\n",
665 mycpu->gd_cpuid,
666 copy_func, copy_arg1, copy_arg2,
667#if defined(__i386__)
668 (frame ? (void *)frame->if_eip : NULL));
669#elif defined(__amd64__)
670 (frame ? (void *)frame->if_rip : NULL));
671#else
672 NULL);
673#endif
674 }
675#endif
b8a98473 676 copy_func(copy_arg1, copy_arg2, frame);
35238fa5 677 cpu_sfence();
3b6b7bd1 678 ip->ip_xindex = ip->ip_rindex;
e8f15168
MD
679
680#ifdef PANIC_DEBUG
681 /*
682 * Simulate panics during the processing of an IPI
683 */
684 if (mycpu->gd_cpuid == panic_ipiq_cpu && panic_ipiq_count) {
685 if (--panic_ipiq_count == 0) {
686#ifdef DDB
687 Debugger("PANIC_DEBUG");
688#else
689 panic("PANIC_DEBUG");
690#endif
691 }
692 }
693#endif
3b6b7bd1 694 }
2de4f77e 695 --mygd->gd_intr_nesting_level;
4c9f5a7f
MD
696
697 /*
b12defdc 698 * Return non-zero if there is still more in the queue.
4c9f5a7f 699 */
da0b0e8b
MD
700 cpu_lfence();
701 return (ip->ip_rindex != ip->ip_windex);
3b6b7bd1
MD
702}
703
6c92c1f2
SZ
704static void
705lwkt_sync_ipiq(void *arg)
706{
5a1a2253 707 volatile cpumask_t *cpumask = arg;
6c92c1f2 708
da23a592 709 atomic_clear_cpumask(cpumask, mycpu->gd_cpumask);
6c92c1f2
SZ
710 if (*cpumask == 0)
711 wakeup(cpumask);
712}
713
714void
715lwkt_synchronize_ipiqs(const char *wmesg)
716{
5a1a2253 717 volatile cpumask_t other_cpumask;
6c92c1f2
SZ
718
719 other_cpumask = mycpu->gd_other_cpus & smp_active_mask;
5a1a2253
SZ
720 lwkt_send_ipiq_mask(other_cpumask, lwkt_sync_ipiq,
721 __DEVOLATILE(void *, &other_cpumask));
6c92c1f2 722
6c92c1f2 723 while (other_cpumask != 0) {
ae8e83e6 724 tsleep_interlock(&other_cpumask, 0);
6c92c1f2 725 if (other_cpumask != 0)
d9345d3a 726 tsleep(&other_cpumask, PINTERLOCKED, wmesg, 0);
6c92c1f2 727 }
6c92c1f2
SZ
728}
729
0f7a3396
MD
730#endif
731
3b6b7bd1
MD
732/*
733 * CPU Synchronization Support
5c71a36a 734 *
d5b2d319
MD
735 * lwkt_cpusync_interlock() - Place specified cpus in a quiescent state.
736 * The current cpu is placed in a hard critical
737 * section.
5c71a36a 738 *
d5b2d319
MD
739 * lwkt_cpusync_deinterlock() - Execute cs_func on specified cpus, including
740 * current cpu if specified, then return.
3b6b7bd1 741 */
3b6b7bd1 742void
d5b2d319 743lwkt_cpusync_simple(cpumask_t mask, cpusync_func_t func, void *arg)
5c71a36a 744{
d5b2d319 745 struct lwkt_cpusync cs;
5c71a36a 746
d5b2d319
MD
747 lwkt_cpusync_init(&cs, mask, func, arg);
748 lwkt_cpusync_interlock(&cs);
749 lwkt_cpusync_deinterlock(&cs);
3b6b7bd1
MD
750}
751
d5b2d319 752
5c71a36a 753void
d5b2d319 754lwkt_cpusync_interlock(lwkt_cpusync_t cs)
3b6b7bd1 755{
d5b2d319 756#ifdef SMP
b12defdc
MD
757#if 0
758 const char *smsg = "SMPSYNL";
759#endif
0f7a3396 760 globaldata_t gd = mycpu;
d5b2d319 761 cpumask_t mask;
0f7a3396 762
d5b2d319
MD
763 /*
764 * mask acknowledge (cs_mack): 0->mask for stage 1
765 *
766 * mack does not include the current cpu.
767 */
768 mask = cs->cs_mask & gd->gd_other_cpus & smp_active_mask;
769 cs->cs_mack = 0;
770 crit_enter_id("cpusync");
771 if (mask) {
cfaeae2a 772 DEBUG_PUSH_INFO("cpusync_interlock");
0f7a3396
MD
773 ++ipiq_cscount;
774 ++gd->gd_curthread->td_cscount;
d5b2d319 775 lwkt_send_ipiq_mask(mask, (ipifunc1_t)lwkt_cpusync_remote1, cs);
5bf48697 776 logipiq2(sync_start, (long)mask);
b12defdc
MD
777#if 0
778 if (gd->gd_curthread->td_wmesg == NULL)
779 gd->gd_curthread->td_wmesg = smsg;
780#endif
d5b2d319 781 while (cs->cs_mack != mask) {
0f7a3396 782 lwkt_process_ipiq();
d5b2d319 783 cpu_pause();
0f7a3396 784 }
b12defdc
MD
785#if 0
786 if (gd->gd_curthread->td_wmesg == smsg)
787 gd->gd_curthread->td_wmesg = NULL;
788#endif
cfaeae2a 789 DEBUG_POP_INFO();
3b6b7bd1 790 }
d5b2d319
MD
791#else
792 cs->cs_mack = 0;
0f7a3396 793#endif
3b6b7bd1
MD
794}
795
796/*
d5b2d319
MD
797 * Interlocked cpus have executed remote1 and are polling in remote2.
798 * To deinterlock we clear cs_mack and wait for the cpus to execute
799 * the func and set their bit in cs_mack again.
0f7a3396 800 *
3b6b7bd1
MD
801 */
802void
d5b2d319 803lwkt_cpusync_deinterlock(lwkt_cpusync_t cs)
3b6b7bd1 804{
0f7a3396 805 globaldata_t gd = mycpu;
0f7a3396 806#ifdef SMP
b12defdc
MD
807#if 0
808 const char *smsg = "SMPSYNU";
809#endif
d5b2d319
MD
810 cpumask_t mask;
811
812 /*
813 * mask acknowledge (cs_mack): mack->0->mack for stage 2
814 *
815 * Clearing cpu bits for polling cpus in cs_mack will cause them to
816 * execute stage 2, which executes the cs_func(cs_data) and then sets
817 * their bit in cs_mack again.
818 *
819 * mack does not include the current cpu.
820 */
821 mask = cs->cs_mack;
822 cpu_ccfence();
823 cs->cs_mack = 0;
cb31dff3 824 cpu_ccfence();
d5b2d319
MD
825 if (cs->cs_func && (cs->cs_mask & gd->gd_cpumask))
826 cs->cs_func(cs->cs_data);
827 if (mask) {
cfaeae2a 828 DEBUG_PUSH_INFO("cpusync_deinterlock");
b12defdc
MD
829#if 0
830 if (gd->gd_curthread->td_wmesg == NULL)
831 gd->gd_curthread->td_wmesg = smsg;
832#endif
d5b2d319 833 while (cs->cs_mack != mask) {
0f7a3396 834 lwkt_process_ipiq();
d5b2d319 835 cpu_pause();
0f7a3396 836 }
b12defdc
MD
837#if 0
838 if (gd->gd_curthread->td_wmesg == smsg)
839 gd->gd_curthread->td_wmesg = NULL;
840#endif
cfaeae2a
MD
841 DEBUG_POP_INFO();
842 /*
843 * cpusyncq ipis may be left queued without the RQF flag set due to
844 * a non-zero td_cscount, so be sure to process any laggards after
845 * decrementing td_cscount.
846 */
0f7a3396 847 --gd->gd_curthread->td_cscount;
d5b2d319 848 lwkt_process_ipiq();
5bf48697 849 logipiq2(sync_end, (long)mask);
3b6b7bd1 850 }
d5b2d319
MD
851 crit_exit_id("cpusync");
852#else
853 if (cs->cs_func && (cs->cs_mask & gd->gd_cpumask))
854 cs->cs_func(cs->cs_data);
0f7a3396 855#endif
3b6b7bd1
MD
856}
857
0f7a3396
MD
858#ifdef SMP
859
3b6b7bd1
MD
860/*
861 * helper IPI remote messaging function.
862 *
863 * Called on remote cpu when a new cpu synchronization request has been
864 * sent to us. Execute the run function and adjust cs_count, then requeue
865 * the request so we spin on it.
866 */
867static void
d5b2d319 868lwkt_cpusync_remote1(lwkt_cpusync_t cs)
3b6b7bd1 869{
d5b2d319
MD
870 globaldata_t gd = mycpu;
871
872 atomic_set_cpumask(&cs->cs_mack, gd->gd_cpumask);
873 lwkt_cpusync_remote2(cs);
3b6b7bd1
MD
874}
875
876/*
877 * helper IPI remote messaging function.
878 *
879 * Poll for the originator telling us to finish. If it hasn't, requeue
d5b2d319 880 * our request so we spin on it.
3b6b7bd1
MD
881 */
882static void
d5b2d319 883lwkt_cpusync_remote2(lwkt_cpusync_t cs)
3b6b7bd1 884{
d5b2d319
MD
885 globaldata_t gd = mycpu;
886
887 if ((cs->cs_mack & gd->gd_cpumask) == 0) {
888 if (cs->cs_func)
889 cs->cs_func(cs->cs_data);
890 atomic_set_cpumask(&cs->cs_mack, gd->gd_cpumask);
93ad6da2 891 /* cs can be ripped out at this point */
3b6b7bd1 892 } else {
3b6b7bd1
MD
893 lwkt_ipiq_t ip;
894 int wi;
895
896 ip = &gd->gd_cpusyncq;
897 wi = ip->ip_windex & MAXCPUFIFO_MASK;
b12defdc
MD
898 ip->ip_info[wi].func = (ipifunc3_t)(ipifunc1_t)lwkt_cpusync_remote2;
899 ip->ip_info[wi].arg1 = cs;
900 ip->ip_info[wi].arg2 = 0;
35238fa5 901 cpu_sfence();
c17a6852 902 KKASSERT(ip->ip_windex - ip->ip_rindex < MAXCPUFIFO);
3b6b7bd1 903 ++ip->ip_windex;
37494a7a 904 if (ipiq_debug && (ip->ip_windex & 0xFFFFFF) == 0) {
cfaeae2a
MD
905 kprintf("cpu %d cm=%016jx %016jx f=%p\n",
906 gd->gd_cpuid,
907 (intmax_t)cs->cs_mask, (intmax_t)cs->cs_mack,
908 cs->cs_func);
37494a7a 909 }
3b6b7bd1
MD
910 }
911}
912
3b6b7bd1 913#endif