| Commit | Line | Data |
|---|---|---|
| 984263bc | 1 | /* |
| 033a4603 | 2 | * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved. |
| ef0fdad1 | 3 | * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved. |
| 984263bc MD |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without | |
| 6 | * modification, are permitted provided that the following conditions | |
| 7 | * are met: | |
| 8 | * 1. Redistributions of source code must retain the above copyright | |
| 9 | * notice unmodified, this list of conditions, and the following | |
| 10 | * disclaimer. | |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
| 12 | * notice, this list of conditions and the following disclaimer in the | |
| 13 | * documentation and/or other materials provided with the distribution. | |
| 14 | * | |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
| 16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
| 17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
| 18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
| 20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| 21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
| 22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
| 24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 25 | * | |
| 26 | * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $ | |
| c2bfaa3d | 27 | * $DragonFly: src/sys/kern/kern_intr.c,v 1.55 2008/09/01 12:49:00 sephe Exp $ |
| 984263bc MD |
28 | * |
| 29 | */ | |
| 30 | ||
| 984263bc MD |
31 | #include <sys/param.h> |
| 32 | #include <sys/systm.h> | |
| 33 | #include <sys/malloc.h> | |
| 34 | #include <sys/kernel.h> | |
| 35 | #include <sys/sysctl.h> | |
| ef0fdad1 MD |
36 | #include <sys/thread.h> |
| 37 | #include <sys/proc.h> | |
| 38 | #include <sys/thread2.h> | |
| 7e071e7a | 39 | #include <sys/random.h> |
| 477d3c1c | 40 | #include <sys/serialize.h> |
| a7231bde | 41 | #include <sys/interrupt.h> |
| 477d3c1c | 42 | #include <sys/bus.h> |
| 37e7efec | 43 | #include <sys/machintr.h> |
| 984263bc | 44 | |
| 477d3c1c | 45 | #include <machine/frame.h> |
| 984263bc MD |
46 | |
| 47 | #include <sys/interrupt.h> | |
| 48 | ||
| 9d522d14 MD |
49 | struct info_info; |
| 50 | ||
| ef0fdad1 MD |
51 | typedef struct intrec { |
| 52 | struct intrec *next; | |
| 9d522d14 | 53 | struct intr_info *info; |
| ef0fdad1 MD |
54 | inthand2_t *handler; |
| 55 | void *argument; | |
| 477d3c1c | 56 | char *name; |
| ef0fdad1 | 57 | int intr; |
| 477d3c1c MD |
58 | int intr_flags; |
| 59 | struct lwkt_serialize *serializer; | |
| 60 | } *intrec_t; | |
| 61 | ||
| 62 | struct intr_info { | |
| 63 | intrec_t i_reclist; | |
| 64 | struct thread i_thread; | |
| 65 | struct random_softc i_random; | |
| 66 | int i_running; | |
| 862f2618 MD |
67 | long i_count; /* interrupts dispatched */ |
| 68 | int i_mplock_required; | |
| 477d3c1c MD |
69 | int i_fast; |
| 70 | int i_slow; | |
| f33e9c1c | 71 | int i_state; |
| b560de96 MD |
72 | int i_errorticks; |
| 73 | unsigned long i_straycount; | |
| 5f456c40 MD |
74 | } intr_info_ary[MAX_INTS]; |
| 75 | ||
| 76 | int max_installed_hard_intr; | |
| 77 | int max_installed_soft_intr; | |
| 477d3c1c | 78 | |
| a9d00ec1 MD |
79 | #define EMERGENCY_INTR_POLLING_FREQ_MAX 20000 |
| 80 | ||
| 81 | static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS); | |
| 82 | static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS); | |
| 83 | static void emergency_intr_timer_callback(systimer_t, struct intrframe *); | |
| 84 | static void ithread_handler(void *arg); | |
| 85 | static void ithread_emergency(void *arg); | |
| b560de96 | 86 | static void report_stray_interrupt(int intr, struct intr_info *info); |
| a9d00ec1 | 87 | |
| 477d3c1c | 88 | int intr_info_size = sizeof(intr_info_ary) / sizeof(intr_info_ary[0]); |
| 37d44089 | 89 | |
| a9d00ec1 MD |
90 | static struct systimer emergency_intr_timer; |
| 91 | static struct thread emergency_intr_thread; | |
| 92 | ||
| f33e9c1c MD |
93 | #define ISTATE_NOTHREAD 0 |
| 94 | #define ISTATE_NORMAL 1 | |
| 95 | #define ISTATE_LIVELOCKED 2 | |
| 37d44089 | 96 | |
| 0e6beaa3 | 97 | #ifdef SMP |
| c2bfaa3d | 98 | static int intr_mpsafe = 1; |
| 862f2618 MD |
99 | TUNABLE_INT("kern.intr_mpsafe", &intr_mpsafe); |
| 100 | SYSCTL_INT(_kern, OID_AUTO, intr_mpsafe, | |
| 101 | CTLFLAG_RW, &intr_mpsafe, 0, "Run INTR_MPSAFE handlers without the BGL"); | |
| 0e6beaa3 | 102 | #endif |
| b560de96 | 103 | static int livelock_limit = 40000; |
| 0e6beaa3 | 104 | static int livelock_lowater = 20000; |
| b560de96 | 105 | static int livelock_debug = -1; |
| 37d44089 MD |
106 | SYSCTL_INT(_kern, OID_AUTO, livelock_limit, |
| 107 | CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit"); | |
| f33e9c1c MD |
108 | SYSCTL_INT(_kern, OID_AUTO, livelock_lowater, |
| 109 | CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore"); | |
| b560de96 MD |
110 | SYSCTL_INT(_kern, OID_AUTO, livelock_debug, |
| 111 | CTLFLAG_RW, &livelock_debug, 0, "Livelock debug intr#"); | |
| 984263bc | 112 | |
| a9d00ec1 MD |
113 | static int emergency_intr_enable = 0; /* emergency interrupt polling */ |
| 114 | TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable); | |
| 115 | SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW, | |
| 116 | 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable"); | |
| 117 | ||
| 118 | static int emergency_intr_freq = 10; /* emergency polling frequency */ | |
| 119 | TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq); | |
| 120 | SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW, | |
| 121 | 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency"); | |
| 122 | ||
| 123 | /* | |
| 124 | * Sysctl support routines | |
| 125 | */ | |
| 126 | static int | |
| 127 | sysctl_emergency_enable(SYSCTL_HANDLER_ARGS) | |
| 128 | { | |
| 129 | int error, enabled; | |
| 130 | ||
| 131 | enabled = emergency_intr_enable; | |
| 132 | error = sysctl_handle_int(oidp, &enabled, 0, req); | |
| 133 | if (error || req->newptr == NULL) | |
| 134 | return error; | |
| 135 | emergency_intr_enable = enabled; | |
| 136 | if (emergency_intr_enable) { | |
| ba39e2e0 MD |
137 | systimer_adjust_periodic(&emergency_intr_timer, |
| 138 | emergency_intr_freq); | |
| a9d00ec1 | 139 | } else { |
| ba39e2e0 | 140 | systimer_adjust_periodic(&emergency_intr_timer, 1); |
| a9d00ec1 MD |
141 | } |
| 142 | return 0; | |
| 143 | } | |
| 144 | ||
| 145 | static int | |
| 146 | sysctl_emergency_freq(SYSCTL_HANDLER_ARGS) | |
| 147 | { | |
| 148 | int error, phz; | |
| 149 | ||
| 150 | phz = emergency_intr_freq; | |
| 151 | error = sysctl_handle_int(oidp, &phz, 0, req); | |
| 152 | if (error || req->newptr == NULL) | |
| 153 | return error; | |
| 154 | if (phz <= 0) | |
| 155 | return EINVAL; | |
| 156 | else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX) | |
| 157 | phz = EMERGENCY_INTR_POLLING_FREQ_MAX; | |
| 158 | ||
| 159 | emergency_intr_freq = phz; | |
| 160 | if (emergency_intr_enable) { | |
| ba39e2e0 MD |
161 | systimer_adjust_periodic(&emergency_intr_timer, |
| 162 | emergency_intr_freq); | |
| a9d00ec1 | 163 | } else { |
| ba39e2e0 | 164 | systimer_adjust_periodic(&emergency_intr_timer, 1); |
| a9d00ec1 MD |
165 | } |
| 166 | return 0; | |
| 167 | } | |
| 984263bc | 168 | |
| 45d76888 MD |
169 | /* |
| 170 | * Register an SWI or INTerrupt handler. | |
| 45d76888 | 171 | */ |
| 477d3c1c MD |
172 | void * |
| 173 | register_swi(int intr, inthand2_t *handler, void *arg, const char *name, | |
| 174 | struct lwkt_serialize *serializer) | |
| 984263bc | 175 | { |
| 5f456c40 | 176 | if (intr < FIRST_SOFTINT || intr >= MAX_INTS) |
| ef0fdad1 | 177 | panic("register_swi: bad intr %d", intr); |
| 477d3c1c | 178 | return(register_int(intr, handler, arg, name, serializer, 0)); |
| 984263bc MD |
179 | } |
| 180 | ||
| 477d3c1c MD |
181 | void * |
| 182 | register_int(int intr, inthand2_t *handler, void *arg, const char *name, | |
| 183 | struct lwkt_serialize *serializer, int intr_flags) | |
| 984263bc | 184 | { |
| 477d3c1c MD |
185 | struct intr_info *info; |
| 186 | struct intrec **list; | |
| 187 | intrec_t rec; | |
| db958607 SZ |
188 | int orig_cpuid = mycpuid, cpuid; |
| 189 | char envpath[32]; | |
| ef0fdad1 | 190 | |
| 5f456c40 | 191 | if (intr < 0 || intr >= MAX_INTS) |
| ef0fdad1 | 192 | panic("register_int: bad intr %d", intr); |
| 477d3c1c MD |
193 | if (name == NULL) |
| 194 | name = "???"; | |
| 195 | info = &intr_info_ary[intr]; | |
| 196 | ||
| 9d522d14 MD |
197 | /* |
| 198 | * Construct an interrupt handler record | |
| 199 | */ | |
| efda3bd0 MD |
200 | rec = kmalloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT); |
| 201 | rec->name = kmalloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT); | |
| 477d3c1c | 202 | strcpy(rec->name, name); |
| ef0fdad1 | 203 | |
| 9d522d14 | 204 | rec->info = info; |
| ef0fdad1 MD |
205 | rec->handler = handler; |
| 206 | rec->argument = arg; | |
| ef0fdad1 | 207 | rec->intr = intr; |
| 477d3c1c | 208 | rec->intr_flags = intr_flags; |
| ef0fdad1 | 209 | rec->next = NULL; |
| 477d3c1c | 210 | rec->serializer = serializer; |
| ef0fdad1 | 211 | |
| ef0fdad1 | 212 | /* |
| a9d00ec1 MD |
213 | * Create an emergency polling thread and set up a systimer to wake |
| 214 | * it up. | |
| 215 | */ | |
| 216 | if (emergency_intr_thread.td_kstack == NULL) { | |
| 217 | lwkt_create(ithread_emergency, NULL, NULL, | |
| 218 | &emergency_intr_thread, TDF_STOPREQ|TDF_INTTHREAD, -1, | |
| 219 | "ithread emerg"); | |
| 220 | systimer_init_periodic_nq(&emergency_intr_timer, | |
| 221 | emergency_intr_timer_callback, &emergency_intr_thread, | |
| 222 | (emergency_intr_enable ? emergency_intr_freq : 1)); | |
| 223 | } | |
| 224 | ||
| db958607 SZ |
225 | cpuid = orig_cpuid; |
| 226 | ksnprintf(envpath, sizeof(envpath), "hw.irq.%d.dest", intr); | |
| 227 | kgetenv_int(envpath, &cpuid); | |
| 228 | if (cpuid >= ncpus) | |
| 229 | cpuid = orig_cpuid; | |
| 230 | ||
| 231 | if (cpuid != orig_cpuid) | |
| 232 | lwkt_migratecpu(cpuid); | |
| 233 | ||
| a9d00ec1 | 234 | /* |
| ef0fdad1 | 235 | * Create an interrupt thread if necessary, leave it in an unscheduled |
| 45d76888 | 236 | * state. |
| ef0fdad1 | 237 | */ |
| f33e9c1c MD |
238 | if (info->i_state == ISTATE_NOTHREAD) { |
| 239 | info->i_state = ISTATE_NORMAL; | |
| 973c11b9 | 240 | lwkt_create((void *)ithread_handler, (void *)(intptr_t)intr, NULL, |
| 862f2618 | 241 | &info->i_thread, TDF_STOPREQ|TDF_INTTHREAD|TDF_MPSAFE, -1, |
| 75cdbe6c | 242 | "ithread %d", intr); |
| 5f456c40 | 243 | if (intr >= FIRST_SOFTINT) |
| 477d3c1c | 244 | lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM); |
| 4b5f931b | 245 | else |
| 477d3c1c MD |
246 | lwkt_setpri(&info->i_thread, TDPRI_INT_MED); |
| 247 | info->i_thread.td_preemptable = lwkt_preempt; | |
| ef0fdad1 MD |
248 | } |
| 249 | ||
| 9d522d14 MD |
250 | list = &info->i_reclist; |
| 251 | ||
| ef0fdad1 | 252 | /* |
| 9d522d14 | 253 | * Keep track of how many fast and slow interrupts we have. |
| 862f2618 MD |
254 | * Set i_mplock_required if any handler in the chain requires |
| 255 | * the MP lock to operate. | |
| ef0fdad1 | 256 | */ |
| 862f2618 MD |
257 | if ((intr_flags & INTR_MPSAFE) == 0) |
| 258 | info->i_mplock_required = 1; | |
| 9d522d14 MD |
259 | if (intr_flags & INTR_FAST) |
| 260 | ++info->i_fast; | |
| 261 | else | |
| 262 | ++info->i_slow; | |
| 263 | ||
| 264 | /* | |
| 8b3ec75a MD |
265 | * Enable random number generation keying off of this interrupt. |
| 266 | */ | |
| 267 | if ((intr_flags & INTR_NOENTROPY) == 0 && info->i_random.sc_enabled == 0) { | |
| 268 | info->i_random.sc_enabled = 1; | |
| 269 | info->i_random.sc_intr = intr; | |
| 270 | } | |
| 271 | ||
| 272 | /* | |
| 9d522d14 MD |
273 | * Add the record to the interrupt list. |
| 274 | */ | |
| 275 | crit_enter(); | |
| ef0fdad1 MD |
276 | while (*list != NULL) |
| 277 | list = &(*list)->next; | |
| 278 | *list = rec; | |
| 279 | crit_exit(); | |
| 5f456c40 MD |
280 | |
| 281 | /* | |
| 282 | * Update max_installed_hard_intr to make the emergency intr poll | |
| 283 | * a bit more efficient. | |
| 284 | */ | |
| 285 | if (intr < FIRST_SOFTINT) { | |
| 286 | if (max_installed_hard_intr <= intr) | |
| 287 | max_installed_hard_intr = intr + 1; | |
| 288 | } else { | |
| 289 | if (max_installed_soft_intr <= intr) | |
| 290 | max_installed_soft_intr = intr + 1; | |
| 291 | } | |
| 9d522d14 MD |
292 | |
| 293 | /* | |
| 294 | * Setup the machine level interrupt vector | |
| cd2cd928 MD |
295 | * |
| 296 | * XXX temporary workaround for some ACPI brokedness. ACPI installs | |
| 297 | * its interrupt too early, before the IOAPICs have been configured, | |
| 298 | * which means the IOAPIC is not enabled by the registration of the | |
| 299 | * ACPI interrupt. Anything else sharing that IRQ will wind up not | |
| 300 | * being enabled. Temporarily work around the problem by always | |
| 301 | * installing and enabling on every new interrupt handler, even | |
| 302 | * if one has already been setup on that irq. | |
| 9d522d14 | 303 | */ |
| cd2cd928 | 304 | if (intr < FIRST_SOFTINT /* && info->i_slow + info->i_fast == 1*/) { |
| 9d522d14 | 305 | if (machintr_vector_setup(intr, intr_flags)) |
| 6ea70f76 | 306 | kprintf("machintr_vector_setup: failed on irq %d\n", intr); |
| 9d522d14 MD |
307 | } |
| 308 | ||
| db958607 SZ |
309 | if (cpuid != orig_cpuid) |
| 310 | lwkt_migratecpu(orig_cpuid); | |
| 311 | ||
| 477d3c1c | 312 | return(rec); |
| ef0fdad1 | 313 | } |
| 984263bc | 314 | |
| 9d522d14 | 315 | void |
| 477d3c1c | 316 | unregister_swi(void *id) |
| ef0fdad1 | 317 | { |
| 9d522d14 | 318 | unregister_int(id); |
| 984263bc MD |
319 | } |
| 320 | ||
| 9d522d14 | 321 | void |
| 477d3c1c | 322 | unregister_int(void *id) |
| 984263bc | 323 | { |
| 477d3c1c MD |
324 | struct intr_info *info; |
| 325 | struct intrec **list; | |
| 326 | intrec_t rec; | |
| 327 | int intr; | |
| 328 | ||
| 329 | intr = ((intrec_t)id)->intr; | |
| ef0fdad1 | 330 | |
| 5f456c40 | 331 | if (intr < 0 || intr >= MAX_INTS) |
| ef0fdad1 | 332 | panic("register_int: bad intr %d", intr); |
| 477d3c1c MD |
333 | |
| 334 | info = &intr_info_ary[intr]; | |
| 335 | ||
| 336 | /* | |
| 9d522d14 MD |
337 | * Remove the interrupt descriptor, adjust the descriptor count, |
| 338 | * and teardown the machine level vector if this was the last interrupt. | |
| 477d3c1c | 339 | */ |
| ef0fdad1 | 340 | crit_enter(); |
| 477d3c1c | 341 | list = &info->i_reclist; |
| ef0fdad1 | 342 | while ((rec = *list) != NULL) { |
| 9d522d14 | 343 | if (rec == id) |
| ef0fdad1 | 344 | break; |
| ef0fdad1 MD |
345 | list = &rec->next; |
| 346 | } | |
| 9d522d14 | 347 | if (rec) { |
| acf7409e SZ |
348 | intrec_t rec0; |
| 349 | ||
| 9d522d14 MD |
350 | *list = rec->next; |
| 351 | if (rec->intr_flags & INTR_FAST) | |
| 352 | --info->i_fast; | |
| 353 | else | |
| 354 | --info->i_slow; | |
| e8727dce | 355 | if (intr < FIRST_SOFTINT && info->i_fast + info->i_slow == 0) |
| 9d522d14 | 356 | machintr_vector_teardown(intr); |
| 862f2618 | 357 | |
| acf7409e SZ |
358 | /* |
| 359 | * Clear i_mplock_required if no handlers in the chain require the | |
| 360 | * MP lock. | |
| 361 | */ | |
| 362 | for (rec0 = info->i_reclist; rec0; rec0 = rec0->next) { | |
| 363 | if ((rec0->intr_flags & INTR_MPSAFE) == 0) | |
| 364 | break; | |
| 365 | } | |
| 366 | if (rec0 == NULL) | |
| 862f2618 | 367 | info->i_mplock_required = 0; |
| acf7409e | 368 | } |
| 862f2618 | 369 | |
| ef0fdad1 | 370 | crit_exit(); |
| 477d3c1c MD |
371 | |
| 372 | /* | |
| 9d522d14 | 373 | * Free the record. |
| 477d3c1c | 374 | */ |
| ef0fdad1 | 375 | if (rec != NULL) { |
| efda3bd0 MD |
376 | kfree(rec->name, M_DEVBUF); |
| 377 | kfree(rec, M_DEVBUF); | |
| ef0fdad1 | 378 | } else { |
| 6ea70f76 | 379 | kprintf("warning: unregister_int: int %d handler for %s not found\n", |
| 477d3c1c | 380 | intr, ((intrec_t)id)->name); |
| ef0fdad1 | 381 | } |
| 477d3c1c MD |
382 | } |
| 383 | ||
| 384 | const char * | |
| 385 | get_registered_name(int intr) | |
| 386 | { | |
| 387 | intrec_t rec; | |
| 388 | ||
| 5f456c40 | 389 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
390 | panic("register_int: bad intr %d", intr); |
| 391 | ||
| 392 | if ((rec = intr_info_ary[intr].i_reclist) == NULL) | |
| 393 | return(NULL); | |
| 394 | else if (rec->next) | |
| 395 | return("mux"); | |
| 396 | else | |
| 397 | return(rec->name); | |
| 984263bc MD |
398 | } |
| 399 | ||
| 477d3c1c MD |
400 | int |
| 401 | count_registered_ints(int intr) | |
| 402 | { | |
| 403 | struct intr_info *info; | |
| 404 | ||
| 5f456c40 | 405 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
406 | panic("register_int: bad intr %d", intr); |
| 407 | info = &intr_info_ary[intr]; | |
| 408 | return(info->i_fast + info->i_slow); | |
| 409 | } | |
| 410 | ||
| 411 | long | |
| 412 | get_interrupt_counter(int intr) | |
| 413 | { | |
| 414 | struct intr_info *info; | |
| 415 | ||
| 5f456c40 | 416 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
417 | panic("register_int: bad intr %d", intr); |
| 418 | info = &intr_info_ary[intr]; | |
| 419 | return(info->i_count); | |
| 420 | } | |
| 421 | ||
| 422 | ||
| 4b5f931b MD |
423 | void |
| 424 | swi_setpriority(int intr, int pri) | |
| 425 | { | |
| 477d3c1c | 426 | struct intr_info *info; |
| 4b5f931b | 427 | |
| 5f456c40 | 428 | if (intr < FIRST_SOFTINT || intr >= MAX_INTS) |
| 4b5f931b | 429 | panic("register_swi: bad intr %d", intr); |
| 477d3c1c | 430 | info = &intr_info_ary[intr]; |
| f33e9c1c | 431 | if (info->i_state != ISTATE_NOTHREAD) |
| 477d3c1c | 432 | lwkt_setpri(&info->i_thread, pri); |
| 4b5f931b MD |
433 | } |
| 434 | ||
| 7e071e7a MD |
435 | void |
| 436 | register_randintr(int intr) | |
| 437 | { | |
| 477d3c1c MD |
438 | struct intr_info *info; |
| 439 | ||
| 5f456c40 | 440 | if (intr < 0 || intr >= MAX_INTS) |
| 417c990a | 441 | panic("register_randintr: bad intr %d", intr); |
| 477d3c1c MD |
442 | info = &intr_info_ary[intr]; |
| 443 | info->i_random.sc_intr = intr; | |
| 444 | info->i_random.sc_enabled = 1; | |
| 7e071e7a MD |
445 | } |
| 446 | ||
| 447 | void | |
| 448 | unregister_randintr(int intr) | |
| 449 | { | |
| 477d3c1c MD |
450 | struct intr_info *info; |
| 451 | ||
| 5f456c40 | 452 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
453 | panic("register_swi: bad intr %d", intr); |
| 454 | info = &intr_info_ary[intr]; | |
| 8b3ec75a | 455 | info->i_random.sc_enabled = -1; |
| 7e071e7a MD |
456 | } |
| 457 | ||
| 5f456c40 MD |
458 | int |
| 459 | next_registered_randintr(int intr) | |
| 460 | { | |
| 461 | struct intr_info *info; | |
| 462 | ||
| 463 | if (intr < 0 || intr >= MAX_INTS) | |
| 464 | panic("register_swi: bad intr %d", intr); | |
| 465 | while (intr < MAX_INTS) { | |
| 466 | info = &intr_info_ary[intr]; | |
| 8b3ec75a | 467 | if (info->i_random.sc_enabled > 0) |
| 5f456c40 MD |
468 | break; |
| 469 | ++intr; | |
| 470 | } | |
| 471 | return(intr); | |
| 472 | } | |
| 473 | ||
| ef0fdad1 | 474 | /* |
| b68b7282 MD |
475 | * Dispatch an interrupt. If there's nothing to do we have a stray |
| 476 | * interrupt and can just return, leaving the interrupt masked. | |
| 96728c05 | 477 | * |
| 477d3c1c | 478 | * We need to schedule the interrupt and set its i_running bit. If |
| 96728c05 MD |
479 | * we are not on the interrupt thread's cpu we have to send a message |
| 480 | * to the correct cpu that will issue the desired action (interlocking | |
| f33e9c1c MD |
481 | * with the interrupt thread's critical section). We do NOT attempt to |
| 482 | * reschedule interrupts whos i_running bit is already set because | |
| 483 | * this would prematurely wakeup a livelock-limited interrupt thread. | |
| 484 | * | |
| 485 | * i_running is only tested/set on the same cpu as the interrupt thread. | |
| 96728c05 MD |
486 | * |
| 487 | * We are NOT in a critical section, which will allow the scheduled | |
| 71ef2f5c | 488 | * interrupt to preempt us. The MP lock might *NOT* be held here. |
| ef0fdad1 | 489 | */ |
| b8a98473 MD |
490 | #ifdef SMP |
| 491 | ||
| 96728c05 MD |
492 | static void |
| 493 | sched_ithd_remote(void *arg) | |
| 494 | { | |
| 495 | sched_ithd((int)arg); | |
| 496 | } | |
| 497 | ||
| b8a98473 MD |
498 | #endif |
| 499 | ||
| ef0fdad1 MD |
500 | void |
| 501 | sched_ithd(int intr) | |
| 502 | { | |
| 477d3c1c | 503 | struct intr_info *info; |
| ef0fdad1 | 504 | |
| 477d3c1c MD |
505 | info = &intr_info_ary[intr]; |
| 506 | ||
| 507 | ++info->i_count; | |
| f33e9c1c | 508 | if (info->i_state != ISTATE_NOTHREAD) { |
| 477d3c1c | 509 | if (info->i_reclist == NULL) { |
| b560de96 | 510 | report_stray_interrupt(intr, info); |
| b68b7282 | 511 | } else { |
| b8a98473 | 512 | #ifdef SMP |
| 477d3c1c | 513 | if (info->i_thread.td_gd == mycpu) { |
| f33e9c1c MD |
514 | if (info->i_running == 0) { |
| 515 | info->i_running = 1; | |
| 516 | if (info->i_state != ISTATE_LIVELOCKED) | |
| 517 | lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */ | |
| 518 | } | |
| 96728c05 | 519 | } else { |
| 477d3c1c MD |
520 | lwkt_send_ipiq(info->i_thread.td_gd, |
| 521 | sched_ithd_remote, (void *)intr); | |
| 96728c05 | 522 | } |
| b8a98473 | 523 | #else |
| f33e9c1c MD |
524 | if (info->i_running == 0) { |
| 525 | info->i_running = 1; | |
| 526 | if (info->i_state != ISTATE_LIVELOCKED) | |
| 527 | lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */ | |
| 528 | } | |
| b8a98473 | 529 | #endif |
| b68b7282 | 530 | } |
| ef0fdad1 | 531 | } else { |
| b560de96 | 532 | report_stray_interrupt(intr, info); |
| ef0fdad1 MD |
533 | } |
| 534 | } | |
| 535 | ||
| b560de96 MD |
536 | static void |
| 537 | report_stray_interrupt(int intr, struct intr_info *info) | |
| 538 | { | |
| 539 | ++info->i_straycount; | |
| 540 | if (info->i_straycount < 10) { | |
| 541 | if (info->i_errorticks == ticks) | |
| 542 | return; | |
| 543 | info->i_errorticks = ticks; | |
| 544 | kprintf("sched_ithd: stray interrupt %d on cpu %d\n", | |
| 545 | intr, mycpuid); | |
| 7e88c0e6 | 546 | } else if (info->i_straycount == 10) { |
| b560de96 MD |
547 | kprintf("sched_ithd: %ld stray interrupts %d on cpu %d - " |
| 548 | "there will be no further reports\n", | |
| 549 | info->i_straycount, intr, mycpuid); | |
| 550 | } | |
| 551 | } | |
| 552 | ||
| b68b7282 | 553 | /* |
| 37d44089 MD |
554 | * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL |
| 555 | * might not be held). | |
| 556 | */ | |
| 557 | static void | |
| 477d3c1c | 558 | ithread_livelock_wakeup(systimer_t st) |
| 37d44089 | 559 | { |
| 477d3c1c | 560 | struct intr_info *info; |
| 37d44089 | 561 | |
| 973c11b9 | 562 | info = &intr_info_ary[(int)(intptr_t)st->data]; |
| f33e9c1c | 563 | if (info->i_state != ISTATE_NOTHREAD) |
| 477d3c1c | 564 | lwkt_schedule(&info->i_thread); |
| 37d44089 MD |
565 | } |
| 566 | ||
| 67b9bb39 | 567 | /* |
| 7bd34050 | 568 | * This function is called directly from the ICU or APIC vector code assembly |
| 477d3c1c MD |
569 | * to process an interrupt. The critical section and interrupt deferral |
| 570 | * checks have already been done but the function is entered WITHOUT | |
| 571 | * a critical section held. The BGL may or may not be held. | |
| 572 | * | |
| 573 | * Must return non-zero if we do not want the vector code to re-enable | |
| 574 | * the interrupt (which we don't if we have to schedule the interrupt) | |
| 67b9bb39 | 575 | */ |
| c7eb0589 | 576 | int ithread_fast_handler(struct intrframe *frame); |
| 477d3c1c MD |
577 | |
| 578 | int | |
| c7eb0589 | 579 | ithread_fast_handler(struct intrframe *frame) |
| 477d3c1c MD |
580 | { |
| 581 | int intr; | |
| 582 | struct intr_info *info; | |
| 583 | struct intrec **list; | |
| 584 | int must_schedule; | |
| 585 | #ifdef SMP | |
| 586 | int got_mplock; | |
| 587 | #endif | |
| 588 | intrec_t rec, next_rec; | |
| 589 | globaldata_t gd; | |
| 590 | ||
| c7eb0589 | 591 | intr = frame->if_vec; |
| 477d3c1c MD |
592 | gd = mycpu; |
| 593 | ||
| 594 | info = &intr_info_ary[intr]; | |
| 595 | ||
| 596 | /* | |
| 597 | * If we are not processing any FAST interrupts, just schedule the thing. | |
| 598 | * (since we aren't in a critical section, this can result in a | |
| 599 | * preemption) | |
| 3848f1c7 TS |
600 | * |
| 601 | * XXX Protect sched_ithd() call with gd_intr_nesting_level? Interrupts | |
| 602 | * aren't enabled, but still... | |
| 477d3c1c MD |
603 | */ |
| 604 | if (info->i_fast == 0) { | |
| 3848f1c7 | 605 | ++gd->gd_cnt.v_intr; |
| 477d3c1c MD |
606 | sched_ithd(intr); |
| 607 | return(1); | |
| 608 | } | |
| 609 | ||
| 610 | /* | |
| 611 | * This should not normally occur since interrupts ought to be | |
| 612 | * masked if the ithread has been scheduled or is running. | |
| 613 | */ | |
| 614 | if (info->i_running) | |
| 615 | return(1); | |
| 616 | ||
| 617 | /* | |
| 618 | * Bump the interrupt nesting level to process any FAST interrupts. | |
| 619 | * Obtain the MP lock as necessary. If the MP lock cannot be obtained, | |
| 620 | * schedule the interrupt thread to deal with the issue instead. | |
| 621 | * | |
| 622 | * To reduce overhead, just leave the MP lock held once it has been | |
| 623 | * obtained. | |
| 624 | */ | |
| 625 | crit_enter_gd(gd); | |
| 626 | ++gd->gd_intr_nesting_level; | |
| 627 | ++gd->gd_cnt.v_intr; | |
| 628 | must_schedule = info->i_slow; | |
| 629 | #ifdef SMP | |
| 630 | got_mplock = 0; | |
| 631 | #endif | |
| 632 | ||
| 633 | list = &info->i_reclist; | |
| 634 | for (rec = *list; rec; rec = next_rec) { | |
| 635 | next_rec = rec->next; /* rec may be invalid after call */ | |
| 636 | ||
| 637 | if (rec->intr_flags & INTR_FAST) { | |
| 638 | #ifdef SMP | |
| 639 | if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) { | |
| 640 | if (try_mplock() == 0) { | |
| afd7b1c0 MD |
641 | int owner; |
| 642 | ||
| 477d3c1c | 643 | /* |
| afd7b1c0 MD |
644 | * If we couldn't get the MP lock try to forward it |
| 645 | * to the cpu holding the MP lock, setting must_schedule | |
| 646 | * to -1 so we do not schedule and also do not unmask | |
| 647 | * the interrupt. Otherwise just schedule it. | |
| 477d3c1c | 648 | */ |
| afd7b1c0 MD |
649 | owner = owner_mplock(); |
| 650 | if (owner >= 0 && owner != gd->gd_cpuid) { | |
| 651 | lwkt_send_ipiq_bycpu(owner, forward_fastint_remote, | |
| 7e2d9bde | 652 | (void *)intr); |
| afd7b1c0 MD |
653 | must_schedule = -1; |
| 654 | ++gd->gd_cnt.v_forwarded_ints; | |
| 655 | } else { | |
| 656 | must_schedule = 1; | |
| 657 | } | |
| 477d3c1c MD |
658 | break; |
| 659 | } | |
| 660 | got_mplock = 1; | |
| 661 | } | |
| 662 | #endif | |
| 663 | if (rec->serializer) { | |
| 664 | must_schedule += lwkt_serialize_handler_try( | |
| 665 | rec->serializer, rec->handler, | |
| c7eb0589 | 666 | rec->argument, frame); |
| 477d3c1c | 667 | } else { |
| c7eb0589 | 668 | rec->handler(rec->argument, frame); |
| 477d3c1c MD |
669 | } |
| 670 | } | |
| 671 | } | |
| 672 | ||
| 673 | /* | |
| 674 | * Cleanup | |
| 675 | */ | |
| 676 | --gd->gd_intr_nesting_level; | |
| 677 | #ifdef SMP | |
| 678 | if (got_mplock) | |
| 679 | rel_mplock(); | |
| 680 | #endif | |
| 681 | crit_exit_gd(gd); | |
| 682 | ||
| 683 | /* | |
| 684 | * If we had a problem, schedule the thread to catch the missed | |
| 685 | * records (it will just re-run all of them). A return value of 0 | |
| 686 | * indicates that all handlers have been run and the interrupt can | |
| 687 | * be re-enabled, and a non-zero return indicates that the interrupt | |
| 688 | * thread controls re-enablement. | |
| 689 | */ | |
| afd7b1c0 | 690 | if (must_schedule > 0) |
| 477d3c1c | 691 | sched_ithd(intr); |
| afd7b1c0 | 692 | else if (must_schedule == 0) |
| 477d3c1c MD |
693 | ++info->i_count; |
| 694 | return(must_schedule); | |
| 695 | } | |
| 696 | ||
| 697 | #if 0 | |
| 698 | ||
| 699 | 6: ; \ | |
| 700 | /* could not get the MP lock, forward the interrupt */ \ | |
| 701 | movl mp_lock, %eax ; /* check race */ \ | |
| 702 | cmpl $MP_FREE_LOCK,%eax ; \ | |
| 703 | je 2b ; \ | |
| 704 | incl PCPU(cnt)+V_FORWARDED_INTS ; \ | |
| 705 | subl $12,%esp ; \ | |
| 706 | movl $irq_num,8(%esp) ; \ | |
| 707 | movl $forward_fastint_remote,4(%esp) ; \ | |
| 708 | movl %eax,(%esp) ; \ | |
| 709 | call lwkt_send_ipiq_bycpu ; \ | |
| 710 | addl $12,%esp ; \ | |
| 711 | jmp 5f ; | |
| 712 | ||
| 713 | #endif | |
| 67b9bb39 | 714 | |
| 37d44089 MD |
715 | |
| 716 | /* | |
| 45d76888 MD |
717 | * Interrupt threads run this as their main loop. |
| 718 | * | |
| 719 | * The handler begins execution outside a critical section and with the BGL | |
| 720 | * held. | |
| 37d44089 | 721 | * |
| 477d3c1c | 722 | * The i_running state starts at 0. When an interrupt occurs, the hardware |
| 37d44089 MD |
723 | * interrupt is disabled and sched_ithd() The HW interrupt remains disabled |
| 724 | * until all routines have run. We then call ithread_done() to reenable | |
| 45d76888 MD |
725 | * the HW interrupt and deschedule us until the next interrupt. |
| 726 | * | |
| 477d3c1c | 727 | * We are responsible for atomically checking i_running and ithread_done() |
| 45d76888 | 728 | * is responsible for atomically checking for platform-specific delayed |
| 477d3c1c | 729 | * interrupts. i_running for our irq is only set in the context of our cpu, |
| 45d76888 | 730 | * so a critical section is a sufficient interlock. |
| b68b7282 | 731 | */ |
| 93781523 MD |
732 | #define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */ |
| 733 | ||
| ef0fdad1 MD |
734 | static void |
| 735 | ithread_handler(void *arg) | |
| 736 | { | |
| 477d3c1c | 737 | struct intr_info *info; |
| f33e9c1c | 738 | int use_limit; |
| b560de96 | 739 | __uint32_t lseconds; |
| 477d3c1c | 740 | int intr; |
| 9d522d14 | 741 | int mpheld; |
| 477d3c1c MD |
742 | struct intrec **list; |
| 743 | intrec_t rec, nrec; | |
| f33e9c1c | 744 | globaldata_t gd; |
| 67b9bb39 | 745 | struct systimer ill_timer; /* enforced freq. timer */ |
| f33e9c1c | 746 | u_int ill_count; /* interrupt livelock counter */ |
| 45d76888 | 747 | |
| f33e9c1c | 748 | ill_count = 0; |
| 973c11b9 | 749 | intr = (int)(intptr_t)arg; |
| 477d3c1c MD |
750 | info = &intr_info_ary[intr]; |
| 751 | list = &info->i_reclist; | |
| 752 | gd = mycpu; | |
| b560de96 | 753 | lseconds = gd->gd_time_seconds; |
| 477d3c1c | 754 | |
| 45d76888 | 755 | /* |
| 862f2618 MD |
756 | * The loop must be entered with one critical section held. The thread |
| 757 | * is created with TDF_MPSAFE so the MP lock is not held on start. | |
| 45d76888 MD |
758 | */ |
| 759 | crit_enter_gd(gd); | |
| 862f2618 | 760 | mpheld = 0; |
| ef0fdad1 | 761 | |
| ef0fdad1 | 762 | for (;;) { |
| 93781523 | 763 | /* |
| 862f2618 MD |
764 | * The chain is only considered MPSAFE if all its interrupt handlers |
| 765 | * are MPSAFE. However, if intr_mpsafe has been turned off we | |
| 766 | * always operate with the BGL. | |
| 767 | */ | |
| 0e6beaa3 | 768 | #ifdef SMP |
| 862f2618 MD |
769 | if (intr_mpsafe == 0) { |
| 770 | if (mpheld == 0) { | |
| 771 | get_mplock(); | |
| 772 | mpheld = 1; | |
| 773 | } | |
| 774 | } else if (info->i_mplock_required != mpheld) { | |
| 775 | if (info->i_mplock_required) { | |
| 776 | KKASSERT(mpheld == 0); | |
| 777 | get_mplock(); | |
| 778 | mpheld = 1; | |
| 779 | } else { | |
| 780 | KKASSERT(mpheld != 0); | |
| 781 | rel_mplock(); | |
| 782 | mpheld = 0; | |
| 783 | } | |
| 784 | } | |
| 0e6beaa3 | 785 | #endif |
| 862f2618 MD |
786 | |
| 787 | /* | |
| f33e9c1c MD |
788 | * If an interrupt is pending, clear i_running and execute the |
| 789 | * handlers. Note that certain types of interrupts can re-trigger | |
| 790 | * and set i_running again. | |
| 45d76888 | 791 | * |
| f33e9c1c | 792 | * Each handler is run in a critical section. Note that we run both |
| 862f2618 | 793 | * FAST and SLOW designated service routines. |
| 93781523 | 794 | */ |
| f33e9c1c MD |
795 | if (info->i_running) { |
| 796 | ++ill_count; | |
| 797 | info->i_running = 0; | |
| 9d522d14 | 798 | |
| b560de96 MD |
799 | if (*list == NULL) |
| 800 | report_stray_interrupt(intr, info); | |
| 801 | ||
| f33e9c1c MD |
802 | for (rec = *list; rec; rec = nrec) { |
| 803 | nrec = rec->next; | |
| 804 | if (rec->serializer) { | |
| 805 | lwkt_serialize_handler_call(rec->serializer, rec->handler, | |
| 806 | rec->argument, NULL); | |
| 807 | } else { | |
| 808 | rec->handler(rec->argument, NULL); | |
| 809 | } | |
| 477d3c1c | 810 | } |
| ef0fdad1 | 811 | } |
| 37d44089 MD |
812 | |
| 813 | /* | |
| 814 | * This is our interrupt hook to add rate randomness to the random | |
| 815 | * number generator. | |
| 816 | */ | |
| 8b3ec75a | 817 | if (info->i_random.sc_enabled > 0) |
| 96728c05 | 818 | add_interrupt_randomness(intr); |
| 37d44089 MD |
819 | |
| 820 | /* | |
| f33e9c1c MD |
821 | * Unmask the interrupt to allow it to trigger again. This only |
| 822 | * applies to certain types of interrupts (typ level interrupts). | |
| 823 | * This can result in the interrupt retriggering, but the retrigger | |
| 824 | * will not be processed until we cycle our critical section. | |
| 363d922a MD |
825 | * |
| 826 | * Only unmask interrupts while handlers are installed. It is | |
| 827 | * possible to hit a situation where no handlers are installed | |
| 828 | * due to a device driver livelocking and then tearing down its | |
| 829 | * interrupt on close (the parallel bus being a good example). | |
| 37d44089 | 830 | */ |
| 363d922a | 831 | if (*list) |
| 37e7efec | 832 | machintr_intren(intr); |
| f33e9c1c MD |
833 | |
| 834 | /* | |
| 835 | * Do a quick exit/enter to catch any higher-priority interrupt | |
| 836 | * sources, such as the statclock, so thread time accounting | |
| 837 | * will still work. This may also cause an interrupt to re-trigger. | |
| 838 | */ | |
| 839 | crit_exit_gd(gd); | |
| 840 | crit_enter_gd(gd); | |
| 841 | ||
| 842 | /* | |
| 843 | * LIVELOCK STATE MACHINE | |
| 844 | */ | |
| 845 | switch(info->i_state) { | |
| 846 | case ISTATE_NORMAL: | |
| 847 | /* | |
| b560de96 | 848 | * Reset the count each second. |
| f33e9c1c | 849 | */ |
| b560de96 MD |
850 | if (lseconds != gd->gd_time_seconds) { |
| 851 | lseconds = gd->gd_time_seconds; | |
| 852 | ill_count = 0; | |
| f33e9c1c MD |
853 | } |
| 854 | ||
| 855 | /* | |
| 856 | * If we did not exceed the frequency limit, we are done. | |
| 857 | * If the interrupt has not retriggered we deschedule ourselves. | |
| 858 | */ | |
| 859 | if (ill_count <= livelock_limit) { | |
| 860 | if (info->i_running == 0) { | |
| 861 | lwkt_deschedule_self(gd->gd_curthread); | |
| 862 | lwkt_switch(); | |
| 863 | } | |
| 37d44089 | 864 | break; |
| f33e9c1c MD |
865 | } |
| 866 | ||
| 867 | /* | |
| 868 | * Otherwise we are livelocked. Set up a periodic systimer | |
| 869 | * to wake the thread up at the limit frequency. | |
| 870 | */ | |
| b560de96 | 871 | kprintf("intr %d at %d/%d hz, livelocked limit engaged!\n", |
| 59d9413f | 872 | intr, ill_count, livelock_limit); |
| f33e9c1c MD |
873 | info->i_state = ISTATE_LIVELOCKED; |
| 874 | if ((use_limit = livelock_limit) < 100) | |
| 875 | use_limit = 100; | |
| 876 | else if (use_limit > 500000) | |
| 877 | use_limit = 500000; | |
| 79b38af2 | 878 | systimer_init_periodic_nq(&ill_timer, ithread_livelock_wakeup, |
| 973c11b9 | 879 | (void *)(intptr_t)intr, use_limit); |
| 37d44089 | 880 | /* fall through */ |
| f33e9c1c | 881 | case ISTATE_LIVELOCKED: |
| 37d44089 | 882 | /* |
| f33e9c1c MD |
883 | * Wait for our periodic timer to go off. Since the interrupt |
| 884 | * has re-armed it can still set i_running, but it will not | |
| 885 | * reschedule us while we are in a livelocked state. | |
| 37d44089 | 886 | */ |
| f33e9c1c | 887 | lwkt_deschedule_self(gd->gd_curthread); |
| 37d44089 | 888 | lwkt_switch(); |
| 93781523 | 889 | |
| 37d44089 | 890 | /* |
| b560de96 MD |
891 | * Check once a second to see if the livelock condition no |
| 892 | * longer applies. | |
| 37d44089 | 893 | */ |
| b560de96 MD |
894 | if (lseconds != gd->gd_time_seconds) { |
| 895 | lseconds = gd->gd_time_seconds; | |
| f33e9c1c | 896 | if (ill_count < livelock_lowater) { |
| b560de96 MD |
897 | info->i_state = ISTATE_NORMAL; |
| 898 | systimer_del(&ill_timer); | |
| 899 | kprintf("intr %d at %d/%d hz, livelock removed\n", | |
| 900 | intr, ill_count, livelock_lowater); | |
| 901 | } else if (livelock_debug == intr || | |
| 902 | (bootverbose && cold)) { | |
| 903 | kprintf("intr %d at %d/%d hz, in livelock\n", | |
| 904 | intr, ill_count, livelock_lowater); | |
| f33e9c1c | 905 | } |
| b560de96 | 906 | ill_count = 0; |
| 37d44089 MD |
907 | } |
| 908 | break; | |
| 909 | } | |
| ef0fdad1 | 910 | } |
| e43a034f | 911 | /* not reached */ |
| ef0fdad1 MD |
912 | } |
| 913 | ||
| a9d00ec1 MD |
914 | /* |
| 915 | * Emergency interrupt polling thread. The thread begins execution | |
| 916 | * outside a critical section with the BGL held. | |
| 917 | * | |
| 918 | * If emergency interrupt polling is enabled, this thread will | |
| 919 | * execute all system interrupts not marked INTR_NOPOLL at the | |
| 920 | * specified polling frequency. | |
| 921 | * | |
| 922 | * WARNING! This thread runs *ALL* interrupt service routines that | |
| 923 | * are not marked INTR_NOPOLL, which basically means everything except | |
| 924 | * the 8254 clock interrupt and the ATA interrupt. It has very high | |
| 925 | * overhead and should only be used in situations where the machine | |
| 926 | * cannot otherwise be made to work. Due to the severe performance | |
| 927 | * degredation, it should not be enabled on production machines. | |
| 928 | */ | |
| 929 | static void | |
| 930 | ithread_emergency(void *arg __unused) | |
| 931 | { | |
| 932 | struct intr_info *info; | |
| 933 | intrec_t rec, nrec; | |
| 934 | int intr; | |
| 935 | ||
| 936 | for (;;) { | |
| 5f456c40 | 937 | for (intr = 0; intr < max_installed_hard_intr; ++intr) { |
| a9d00ec1 MD |
938 | info = &intr_info_ary[intr]; |
| 939 | for (rec = info->i_reclist; rec; rec = nrec) { | |
| 940 | if ((rec->intr_flags & INTR_NOPOLL) == 0) { | |
| 941 | if (rec->serializer) { | |
| 942 | lwkt_serialize_handler_call(rec->serializer, | |
| 943 | rec->handler, rec->argument, NULL); | |
| 944 | } else { | |
| 945 | rec->handler(rec->argument, NULL); | |
| 946 | } | |
| 947 | } | |
| 948 | nrec = rec->next; | |
| 949 | } | |
| 950 | } | |
| 951 | lwkt_deschedule_self(curthread); | |
| 952 | lwkt_switch(); | |
| 953 | } | |
| 954 | } | |
| 955 | ||
| 956 | /* | |
| 957 | * Systimer callback - schedule the emergency interrupt poll thread | |
| 958 | * if emergency polling is enabled. | |
| 959 | */ | |
| 960 | static | |
| 961 | void | |
| 962 | emergency_intr_timer_callback(systimer_t info, struct intrframe *frame __unused) | |
| 963 | { | |
| 964 | if (emergency_intr_enable) | |
| 965 | lwkt_schedule(info->data); | |
| 966 | } | |
| 967 | ||
| 9db4b353 SZ |
968 | int |
| 969 | ithread_cpuid(int intr) | |
| 970 | { | |
| 971 | const struct intr_info *info; | |
| 972 | ||
| 973 | KKASSERT(intr >= 0 && intr < MAX_INTS); | |
| 974 | info = &intr_info_ary[intr]; | |
| 975 | ||
| 976 | if (info->i_state == ISTATE_NOTHREAD) | |
| 977 | return -1; | |
| 978 | return info->i_thread.td_gd->gd_cpuid; | |
| 979 | } | |
| 980 | ||
| 984263bc MD |
981 | /* |
| 982 | * Sysctls used by systat and others: hw.intrnames and hw.intrcnt. | |
| 983 | * The data for this machine dependent, and the declarations are in machine | |
| 984 | * dependent code. The layout of intrnames and intrcnt however is machine | |
| 985 | * independent. | |
| 986 | * | |
| 987 | * We do not know the length of intrcnt and intrnames at compile time, so | |
| 988 | * calculate things at run time. | |
| 989 | */ | |
| 477d3c1c | 990 | |
| 984263bc MD |
991 | static int |
| 992 | sysctl_intrnames(SYSCTL_HANDLER_ARGS) | |
| 993 | { | |
| 477d3c1c MD |
994 | struct intr_info *info; |
| 995 | intrec_t rec; | |
| 996 | int error = 0; | |
| 997 | int len; | |
| 998 | int intr; | |
| 999 | char buf[64]; | |
| 1000 | ||
| 5f456c40 | 1001 | for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) { |
| 477d3c1c MD |
1002 | info = &intr_info_ary[intr]; |
| 1003 | ||
| 1004 | len = 0; | |
| 1005 | buf[0] = 0; | |
| 1006 | for (rec = info->i_reclist; rec; rec = rec->next) { | |
| f8c7a42d | 1007 | ksnprintf(buf + len, sizeof(buf) - len, "%s%s", |
| 477d3c1c MD |
1008 | (len ? "/" : ""), rec->name); |
| 1009 | len += strlen(buf + len); | |
| 1010 | } | |
| 1011 | if (len == 0) { | |
| f8c7a42d | 1012 | ksnprintf(buf, sizeof(buf), "irq%d", intr); |
| 477d3c1c MD |
1013 | len = strlen(buf); |
| 1014 | } | |
| 1015 | error = SYSCTL_OUT(req, buf, len + 1); | |
| 1016 | } | |
| 1017 | return (error); | |
| 984263bc MD |
1018 | } |
| 1019 | ||
| 477d3c1c | 1020 | |
| 984263bc MD |
1021 | SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD, |
| 1022 | NULL, 0, sysctl_intrnames, "", "Interrupt Names"); | |
| 1023 | ||
| 1024 | static int | |
| 1025 | sysctl_intrcnt(SYSCTL_HANDLER_ARGS) | |
| 1026 | { | |
| 477d3c1c MD |
1027 | struct intr_info *info; |
| 1028 | int error = 0; | |
| 1029 | int intr; | |
| 1030 | ||
| 5f456c40 | 1031 | for (intr = 0; intr < max_installed_hard_intr; ++intr) { |
| 477d3c1c MD |
1032 | info = &intr_info_ary[intr]; |
| 1033 | ||
| 1034 | error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count)); | |
| 1035 | if (error) | |
| 5f456c40 MD |
1036 | goto failed; |
| 1037 | } | |
| 1038 | for (intr = FIRST_SOFTINT; intr < max_installed_soft_intr; ++intr) { | |
| 1039 | info = &intr_info_ary[intr]; | |
| 1040 | ||
| 1041 | error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count)); | |
| 1042 | if (error) | |
| 1043 | goto failed; | |
| 477d3c1c | 1044 | } |
| 5f456c40 | 1045 | failed: |
| 477d3c1c | 1046 | return(error); |
| 984263bc MD |
1047 | } |
| 1048 | ||
| 1049 | SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD, | |
| 1050 | NULL, 0, sysctl_intrcnt, "", "Interrupt Counts"); | |
| 477d3c1c | 1051 |