Initial import from FreeBSD RELENG_4:
[dragonfly.git] / sys / dev / disk / mpt / mpt_pci.c
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1/* $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.3.2.3 2002/09/24 21:37:25 mjacob Exp $ */
2/*
3 * PCI specific probe and attach routines for LSI '909 FC adapters.
4 * FreeBSD Version.
5 *
6 * Copyright (c) 2000, 2001 by Greg Ansley
7 * Partially derived from Matt Jacob's ISP driver.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice immediately at the beginning of the file, without modification,
14 * this list of conditions, and the following disclaimer.
15 * 2. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
22 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30/*
31 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
32 */
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/bus.h>
39
40#include <pci/pcireg.h>
41#include <pci/pcivar.h>
42
43#include <machine/bus_memio.h>
44#include <machine/bus_pio.h>
45#include <machine/bus.h>
46#include <machine/resource.h>
47#include <sys/rman.h>
48#include <sys/malloc.h>
49
50#include <dev/mpt/mpt_freebsd.h>
51
52#ifndef PCI_VENDOR_LSI
53#define PCI_VENDOR_LSI 0x1000
54#endif
55
56#ifndef PCI_PRODUCT_LSI_FC909
57#define PCI_PRODUCT_LSI_FC909 0x0620
58#endif
59
60#ifndef PCI_PRODUCT_LSI_FC909A
61#define PCI_PRODUCT_LSI_FC909A 0x0621
62#endif
63
64#ifndef PCI_PRODUCT_LSI_FC919
65#define PCI_PRODUCT_LSI_FC919 0x0624
66#endif
67
68#ifndef PCI_PRODUCT_LSI_FC929
69#define PCI_PRODUCT_LSI_FC929 0x0622
70#endif
71
72#ifndef PCI_PRODUCT_LSI_1030
73#define PCI_PRODUCT_LSI_1030 0x0030
74#endif
75
76#ifndef PCIM_CMD_SERRESPEN
77#define PCIM_CMD_SERRESPEN 0x0100
78#endif
79
80
81
82#define MEM_MAP_REG 0x14
83#define MEM_MAP_SRAM 0x1C
84
85static int mpt_probe(device_t);
86static int mpt_attach(device_t);
87static void mpt_free_bus_resources(mpt_softc_t *mpt);
88static int mpt_detach(device_t);
89static int mpt_shutdown(device_t);
90static int mpt_dma_mem_alloc(mpt_softc_t *mpt);
91static void mpt_dma_mem_free(mpt_softc_t *mpt);
92static void mpt_read_config_regs(mpt_softc_t *mpt);
93static void mpt_pci_intr(void *);
94
95static device_method_t mpt_methods[] = {
96 /* Device interface */
97 DEVMETHOD(device_probe, mpt_probe),
98 DEVMETHOD(device_attach, mpt_attach),
99 DEVMETHOD(device_detach, mpt_detach),
100 DEVMETHOD(device_shutdown, mpt_shutdown),
101 { 0, 0 }
102};
103
104static driver_t mpt_driver = {
105 "mpt", mpt_methods, sizeof (mpt_softc_t)
106};
107static devclass_t mpt_devclass;
108DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, 0, 0);
109MODULE_VERSION(mpt, 1);
110
111int
112mpt_intr(void *dummy)
113{
114 int nrepl = 0;
115 u_int32_t reply;
116 mpt_softc_t *mpt = (mpt_softc_t *)dummy;
117
118 if ((mpt_read(mpt, MPT_OFFSET_INTR_STATUS) & MPT_INTR_REPLY_READY) == 0)
119 return (0);
120 reply = mpt_pop_reply_queue(mpt);
121 while (reply != MPT_REPLY_EMPTY) {
122 nrepl++;
123 if (mpt->verbose > 1) {
124 if ((reply & MPT_CONTEXT_REPLY) != 0) {
125 /* Address reply; IOC has something to say */
126 mpt_print_reply(MPT_REPLY_PTOV(mpt, reply));
127 } else {
128 /* Context reply ; all went well */
129 device_printf(mpt->dev,
130 "context %u reply OK\n", reply);
131 }
132 }
133 mpt_done(mpt, reply);
134 reply = mpt_pop_reply_queue(mpt);
135 }
136 return (nrepl != 0);
137}
138
139static int
140mpt_probe(device_t dev)
141{
142 char *desc;
143
144 if (pci_get_vendor(dev) != PCI_VENDOR_LSI)
145 return (ENXIO);
146
147 switch ((pci_get_device(dev) & ~1)) {
148 case PCI_PRODUCT_LSI_FC909:
149 desc = "LSILogic FC909 FC Adapter";
150 break;
151 case PCI_PRODUCT_LSI_FC909A:
152 desc = "LSILogic FC909A FC Adapter";
153 break;
154 case PCI_PRODUCT_LSI_FC919:
155 desc = "LSILogic FC919 FC Adapter";
156 break;
157 case PCI_PRODUCT_LSI_FC929:
158 desc = "LSILogic FC929 FC Adapter";
159 break;
160 case PCI_PRODUCT_LSI_1030:
161 desc = "LSILogic 1030 Ultra4 Adapter";
162 break;
163 default:
164 return (ENXIO);
165 }
166
167 device_set_desc(dev, desc);
168 return (0);
169}
170
171#ifdef RELENG_4
172static void
173mpt_set_options(mpt_softc_t *mpt)
174{
175 int bitmap;
176
177 bitmap = 0;
178 if (getenv_int("mpt_disable", &bitmap)) {
179 if (bitmap & (1 << mpt->unit)) {
180 mpt->disabled = 1;
181 }
182 }
183
184 bitmap = 0;
185 if (getenv_int("mpt_debug", &bitmap)) {
186 if (bitmap & (1 << mpt->unit)) {
187 mpt->verbose = 2;
188 }
189 }
190
191}
192#else
193static void
194mpt_set_options(mpt_softc_t *mpt)
195{
196 int tval;
197
198 tval = 0;
199 if (resource_int_value(device_get_name(mpt->dev),
200 device_get_unit(mpt->dev), "disable", &tval) == 0 && tval != 0) {
201 mpt->disabled = 1;
202 }
203 tval = 0;
204 if (resource_int_value(device_get_name(mpt->dev),
205 device_get_unit(mpt->dev), "debug", &tval) == 0 && tval != 0) {
206 mpt->verbose += tval;
207 }
208}
209#endif
210
211
212static void
213mpt_link_peer(mpt_softc_t *mpt)
214{
215 mpt_softc_t *mpt2;
216
217 if (mpt->unit == 0) {
218 return;
219 }
220
221 /*
222 * XXX: depends on probe order
223 */
224 mpt2 = (mpt_softc_t *) devclass_get_softc(mpt_devclass, mpt->unit-1);
225
226 if (mpt2 == NULL) {
227 return;
228 }
229 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
230 return;
231 }
232 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
233 return;
234 }
235 mpt->mpt2 = mpt2;
236 mpt2->mpt2 = mpt;
237 if (mpt->verbose) {
238 device_printf(mpt->dev, "linking with peer (mpt%d)\n",
239 device_get_unit(mpt2->dev));
240 }
241}
242
243
244static int
245mpt_attach(device_t dev)
246{
247 int iqd;
248 u_int32_t data, cmd;
249 mpt_softc_t *mpt;
250
251 /* Allocate the softc structure */
252 mpt = (mpt_softc_t*) device_get_softc(dev);
253 if (mpt == NULL) {
254 device_printf(dev, "cannot allocate softc\n");
255 return (ENOMEM);
256 }
257 bzero(mpt, sizeof (mpt_softc_t));
258 switch ((pci_get_device(dev) & ~1)) {
259 case PCI_PRODUCT_LSI_FC909:
260 case PCI_PRODUCT_LSI_FC909A:
261 case PCI_PRODUCT_LSI_FC919:
262 case PCI_PRODUCT_LSI_FC929:
263 mpt->is_fc = 1;
264 break;
265 default:
266 break;
267 }
268 mpt->dev = dev;
269 mpt->unit = device_get_unit(dev);
270 mpt_set_options(mpt);
271 mpt->verbose += (bootverbose != 0)? 1 : 0;
272
273 /* Make sure memory access decoders are enabled */
274 cmd = pci_read_config(dev, PCIR_COMMAND, 2);
275 if ((cmd & PCIM_CMD_MEMEN) == 0) {
276 device_printf(dev, "Memory accesses disabled");
277 goto bad;
278 }
279
280 /*
281 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
282 */
283 cmd |=
284 PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
285 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
286 pci_write_config(dev, PCIR_COMMAND, cmd, 2);
287
288 /*
289 * Make sure we've disabled the ROM.
290 */
291 data = pci_read_config(dev, PCIR_BIOS, 4);
292 data &= ~1;
293 pci_write_config(dev, PCIR_BIOS, data, 4);
294
295
296 /*
297 * Is this part a dual?
298 * If so, link with our partner (around yet)
299 */
300 if ((pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_FC929 ||
301 (pci_get_device(dev) & ~1) == PCI_PRODUCT_LSI_1030) {
302 mpt_link_peer(mpt);
303 }
304
305 /* Set up the memory regions */
306 /* Allocate kernel virtual memory for the 9x9's Mem0 region */
307 mpt->pci_reg_id = MEM_MAP_REG;
308 mpt->pci_reg = bus_alloc_resource(dev, SYS_RES_MEMORY,
309 &mpt->pci_reg_id, 0, ~0, 0, RF_ACTIVE);
310 if (mpt->pci_reg == NULL) {
311 device_printf(dev, "unable to map any ports\n");
312 goto bad;
313 }
314 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
315 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
316 /* Get the Physical Address */
317 mpt->pci_pa = rman_get_start(mpt->pci_reg);
318
319 /* Get a handle to the interrupt */
320 iqd = 0;
321 mpt->pci_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &iqd, 0, ~0,
322 1, RF_ACTIVE | RF_SHAREABLE);
323 if (mpt->pci_irq == NULL) {
324 device_printf(dev, "could not allocate interrupt\n");
325 goto bad;
326 }
327
328 /* Register the interrupt handler */
329 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
330 mpt, &mpt->ih)) {
331 device_printf(dev, "could not setup interrupt\n");
332 goto bad;
333 }
334
335 MPT_LOCK_SETUP(mpt);
336
337 /* Disable interrupts at the part */
338 mpt_disable_ints(mpt);
339
340 /* Allocate dma memory */
341 if (mpt_dma_mem_alloc(mpt)) {
342 device_printf(dev, "Could not allocate DMA memory\n");
343 goto bad;
344 }
345
346 /*
347 * Save the PCI config register values
348 *
349 * Hard resets are known to screw up the BAR for diagnostic
350 * memory accesses (Mem1).
351 *
352 * Using Mem1 is known to make the chip stop responding to
353 * configuration space transfers, so we need to save it now
354 */
355
356 mpt_read_config_regs(mpt);
357
358 /* Initialize the hardware */
359 if (mpt->disabled == 0) {
360 MPT_LOCK(mpt);
361 if (mpt_init(mpt, MPT_DB_INIT_HOST) != 0) {
362 MPT_UNLOCK(mpt);
363 goto bad;
364 }
365
366 /*
367 * Attach to CAM
368 */
369 MPTLOCK_2_CAMLOCK(mpt);
370 mpt_cam_attach(mpt);
371 CAMLOCK_2_MPTLOCK(mpt);
372 MPT_UNLOCK(mpt);
373 }
374
375 return (0);
376
377bad:
378 mpt_dma_mem_free(mpt);
379 mpt_free_bus_resources(mpt);
380
381 /*
382 * but return zero to preserve unit numbering
383 */
384 return (0);
385}
386
387/*
388 * Free bus resources
389 */
390static void
391mpt_free_bus_resources(mpt_softc_t *mpt)
392{
393 if (mpt->ih) {
394 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
395 mpt->ih = 0;
396 }
397
398 if (mpt->pci_irq) {
399 bus_release_resource(mpt->dev, SYS_RES_IRQ, 0, mpt->pci_irq);
400 mpt->pci_irq = 0;
401 }
402
403 if (mpt->pci_reg) {
404 bus_release_resource(mpt->dev, SYS_RES_MEMORY, mpt->pci_reg_id,
405 mpt->pci_reg);
406 mpt->pci_reg = 0;
407 }
408 MPT_LOCK_DESTROY(mpt);
409}
410
411
412/*
413 * Disconnect ourselves from the system.
414 */
415static int
416mpt_detach(device_t dev)
417{
418 mpt_softc_t *mpt;
419 mpt = (mpt_softc_t*) device_get_softc(dev);
420
421 device_printf(mpt->dev,"mpt_detach!\n");
422
423 if (mpt) {
424 mpt_disable_ints(mpt);
425 mpt_cam_detach(mpt);
426 mpt_reset(mpt);
427 mpt_dma_mem_free(mpt);
428 mpt_free_bus_resources(mpt);
429 }
430 return(0);
431}
432
433
434/*
435 * Disable the hardware
436 */
437static int
438mpt_shutdown(device_t dev)
439{
440 mpt_softc_t *mpt;
441 mpt = (mpt_softc_t*) device_get_softc(dev);
442
443 if (mpt) {
444 mpt_reset(mpt);
445 }
446 return(0);
447}
448
449
450struct imush {
451 mpt_softc_t *mpt;
452 int error;
453 u_int32_t phys;
454};
455
456static void
457mpt_map_rquest(void *arg, bus_dma_segment_t *segs, int nseg, int error)
458{
459 struct imush *imushp = (struct imush *) arg;
460 imushp->error = error;
461 imushp->phys = segs->ds_addr;
462}
463
464
465static int
466mpt_dma_mem_alloc(mpt_softc_t *mpt)
467{
468 int i, error;
469 u_char *vptr;
470 u_int32_t pptr, end;
471 size_t len;
472 struct imush im;
473 device_t dev = mpt->dev;
474
475 /* Check if we alreay have allocated the reply memory */
476 if (mpt->reply_phys != NULL) {
477 return 0;
478 }
479
480 len = sizeof (request_t *) * MPT_REQ_MEM_SIZE(mpt);
481#ifdef RELENG_4
482 mpt->request_pool = (request_t *) malloc(len, M_DEVBUF, M_WAITOK);
483 if (mpt->request_pool == NULL) {
484 device_printf(dev, "cannot allocate request pool\n");
485 return (1);
486 }
487 bzero(mpt->request_pool, len);
488#else
489 mpt->request_pool = (request_t *)
490 malloc(len, M_DEVBUF, M_WAITOK | M_ZERO);
491 if (mpt->request_pool == NULL) {
492 device_printf(dev, "cannot allocate request pool\n");
493 return (1);
494 }
495#endif
496
497 /*
498 * Create a dma tag for this device
499 *
500 * Align at page boundaries, limit to 32-bit addressing
501 * (The chip supports 64-bit addressing, but this driver doesn't)
502 */
503 if (bus_dma_tag_create(NULL, PAGE_SIZE, 0, BUS_SPACE_MAXADDR_32BIT,
504 BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE_32BIT,
505 BUS_SPACE_MAXSIZE_32BIT, BUS_SPACE_UNRESTRICTED, 0,
506 &mpt->parent_dmat) != 0) {
507 device_printf(dev, "cannot create parent dma tag\n");
508 return (1);
509 }
510
511 /* Create a child tag for reply buffers */
512 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
513 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
514 NULL, NULL, PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
515 &mpt->reply_dmat) != 0) {
516 device_printf(dev, "cannot create a dma tag for replies\n");
517 return (1);
518 }
519
520 /* Allocate some DMA accessable memory for replies */
521 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
522 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
523 device_printf(dev, "cannot allocate %d bytes of reply memory\n",
524 PAGE_SIZE);
525 return (1);
526 }
527
528 im.mpt = mpt;
529 im.error = 0;
530
531 /* Load and lock it into "bus space" */
532 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
533 PAGE_SIZE, mpt_map_rquest, &im, 0);
534
535 if (im.error) {
536 device_printf(dev,
537 "error %d loading dma map for DMA reply queue\n", im.error);
538 return (1);
539 }
540 mpt->reply_phys = im.phys;
541
542 /* Create a child tag for data buffers */
543 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
544 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
545 NULL, NULL, MAXBSIZE, MPT_SGL_MAX, BUS_SPACE_MAXSIZE_32BIT, 0,
546 &mpt->buffer_dmat) != 0) {
547 device_printf(dev,
548 "cannot create a dma tag for data buffers\n");
549 return (1);
550 }
551
552 /* Create a child tag for request buffers */
553 if (bus_dma_tag_create(mpt->parent_dmat, PAGE_SIZE,
554 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
555 NULL, NULL, MPT_REQ_MEM_SIZE(mpt), 1, BUS_SPACE_MAXSIZE_32BIT, 0,
556 &mpt->request_dmat) != 0) {
557 device_printf(dev, "cannot create a dma tag for requests\n");
558 return (1);
559 }
560
561 /* Allocate some DMA accessable memory for requests */
562 if (bus_dmamem_alloc(mpt->request_dmat, (void **)&mpt->request,
563 BUS_DMA_NOWAIT, &mpt->request_dmap) != 0) {
564 device_printf(dev,
565 "cannot allocate %d bytes of request memory\n",
566 MPT_REQ_MEM_SIZE(mpt));
567 return (1);
568 }
569
570 im.mpt = mpt;
571 im.error = 0;
572
573 /* Load and lock it into "bus space" */
574 bus_dmamap_load(mpt->request_dmat, mpt->request_dmap, mpt->request,
575 MPT_REQ_MEM_SIZE(mpt), mpt_map_rquest, &im, 0);
576
577 if (im.error) {
578 device_printf(dev,
579 "error %d loading dma map for DMA request queue\n",
580 im.error);
581 return (1);
582 }
583 mpt->request_phys = im.phys;
584
585 i = 0;
586 pptr = mpt->request_phys;
587 vptr = mpt->request;
588 end = pptr + MPT_REQ_MEM_SIZE(mpt);
589 while(pptr < end) {
590 request_t *req = &mpt->request_pool[i];
591 req->index = i++;
592
593 /* Store location of Request Data */
594 req->req_pbuf = pptr;
595 req->req_vbuf = vptr;
596
597 pptr += MPT_REQUEST_AREA;
598 vptr += MPT_REQUEST_AREA;
599
600 req->sense_pbuf = (pptr - MPT_SENSE_SIZE);
601 req->sense_vbuf = (vptr - MPT_SENSE_SIZE);
602
603 error = bus_dmamap_create(mpt->buffer_dmat, 0, &req->dmap);
604 if (error) {
605 device_printf(dev,
606 "error %d creating per-cmd DMA maps\n", error);
607 return (1);
608 }
609 }
610 return (0);
611}
612
613
614
615/* Deallocate memory that was allocated by mpt_dma_mem_alloc
616 */
617static void
618mpt_dma_mem_free(mpt_softc_t *mpt)
619{
620 int i;
621
622 /* Make sure we aren't double destroying */
623 if (mpt->reply_dmat == 0) {
624 if (mpt->verbose)
625 device_printf(mpt->dev,"Already released dma memory\n");
626 return;
627 }
628
629 for (i = 0; i < MPT_MAX_REQUESTS(mpt); i++) {
630 bus_dmamap_destroy(mpt->buffer_dmat, mpt->request_pool[i].dmap);
631 }
632 bus_dmamap_unload(mpt->request_dmat, mpt->request_dmap);
633 bus_dmamem_free(mpt->request_dmat, mpt->request, mpt->request_dmap);
634 bus_dma_tag_destroy(mpt->request_dmat);
635 bus_dma_tag_destroy(mpt->buffer_dmat);
636 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
637 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
638 bus_dma_tag_destroy(mpt->reply_dmat);
639 bus_dma_tag_destroy(mpt->parent_dmat);
640 mpt->reply_dmat = 0;
641 free(mpt->request_pool, M_DEVBUF);
642 mpt->request_pool = 0;
643
644}
645
646
647
648/* Reads modifiable (via PCI transactions) config registers */
649static void
650mpt_read_config_regs(mpt_softc_t *mpt)
651{
652 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
653 mpt->pci_cfg.LatencyTimer_LineSize =
654 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
655 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_MAPS, 4);
656 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0x4, 4);
657 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x8, 4);
658 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_MAPS+0xC, 4);
659 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_MAPS+0x10, 4);
660 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
661 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
662 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
663}
664
665/* Sets modifiable config registers */
666void
667mpt_set_config_regs(mpt_softc_t *mpt)
668{
669 u_int32_t val;
670
671#define MPT_CHECK(reg, offset, size) \
672 val = pci_read_config(mpt->dev, offset, size); \
673 if (mpt->pci_cfg.reg != val) { \
674 device_printf(mpt->dev, \
675 "Restoring " #reg " to 0x%X from 0x%X\n", \
676 mpt->pci_cfg.reg, val); \
677 }
678
679 if (mpt->verbose) {
680 MPT_CHECK(Command, PCIR_COMMAND, 2);
681 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
682 MPT_CHECK(IO_BAR, PCIR_MAPS, 4);
683 MPT_CHECK(Mem0_BAR[0], PCIR_MAPS+0x4, 4);
684 MPT_CHECK(Mem0_BAR[1], PCIR_MAPS+0x8, 4);
685 MPT_CHECK(Mem1_BAR[0], PCIR_MAPS+0xC, 4);
686 MPT_CHECK(Mem1_BAR[1], PCIR_MAPS+0x10, 4);
687 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
688 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
689 MPT_CHECK(PMCSR, 0x44, 4);
690 }
691#undef MPT_CHECK
692
693 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
694 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
695 mpt->pci_cfg.LatencyTimer_LineSize, 2);
696 pci_write_config(mpt->dev, PCIR_MAPS, mpt->pci_cfg.IO_BAR, 4);
697 pci_write_config(mpt->dev, PCIR_MAPS+0x4, mpt->pci_cfg.Mem0_BAR[0], 4);
698 pci_write_config(mpt->dev, PCIR_MAPS+0x8, mpt->pci_cfg.Mem0_BAR[1], 4);
699 pci_write_config(mpt->dev, PCIR_MAPS+0xC, mpt->pci_cfg.Mem1_BAR[0], 4);
700 pci_write_config(mpt->dev, PCIR_MAPS+0x10, mpt->pci_cfg.Mem1_BAR[1], 4);
701 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
702 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
703 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
704}
705
706static void
707mpt_pci_intr(void *arg)
708{
709 mpt_softc_t *mpt = arg;
710 MPT_LOCK(mpt);
711 (void) mpt_intr(mpt);
712 MPT_UNLOCK(mpt);
713}