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[dragonfly.git] / sys / dev / serial / cy / cy.c
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MD
1/*-
2 * cyclades cyclom-y serial driver
3 * Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993
4 *
5 * Copyright (c) 1993 Andrew Herbert.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name Andrew Herbert may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22 * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * $FreeBSD: src/sys/i386/isa/cy.c,v 1.97.2.2 2001/08/22 13:04:58 bde Exp $
31 */
32
33#include "opt_compat.h"
34#include "cy.h"
35
36/*
37 * TODO:
38 * Atomic COR change.
39 * Consoles.
40 */
41
42/*
43 * Temporary compile-time configuration options.
44 */
45#define RxFifoThreshold (CD1400_RX_FIFO_SIZE / 2)
46 /* Number of chars in the receiver FIFO before an
47 * an interrupt is generated. Should depend on
48 * line speed. Needs to be about 6 on a 486DX33
49 * for 4 active ports at 115200 bps. Why doesn't
50 * 10 work?
51 */
52#define PollMode /* Use polling-based irq service routine, not the
53 * hardware svcack lines. Must be defined for
54 * Cyclom-16Y boards. Less efficient for Cyclom-8Ys,
55 * and stops 4 * 115200 bps from working.
56 */
57#undef Smarts /* Enable slightly more CD1400 intelligence. Mainly
58 * the output CR/LF processing, plus we can avoid a
59 * few checks usually done in ttyinput().
60 *
61 * XXX not fully implemented, and not particularly
62 * worthwhile.
63 */
64#undef CyDebug /* Include debugging code (not very expensive). */
65
66/* These will go away. */
67#undef SOFT_CTS_OFLOW
68#define SOFT_HOTCHAR
69
70#include <sys/param.h>
71#include <sys/systm.h>
72#include <sys/tty.h>
73#include <sys/proc.h>
74#include <sys/conf.h>
75#include <sys/dkstat.h>
76#include <sys/fcntl.h>
77#include <sys/interrupt.h>
78#include <sys/kernel.h>
79#include <sys/malloc.h>
80#include <sys/syslog.h>
81#include <machine/clock.h>
82#include <machine/ipl.h>
83#ifndef SMP
84#include <machine/lock.h>
85#endif
86#include <machine/psl.h>
87
88#include <i386/isa/isa_device.h>
89#include <i386/isa/cyreg.h>
90#include <i386/isa/ic/cd1400.h>
91
92#ifdef SMP
93#define disable_intr() COM_DISABLE_INTR()
94#define enable_intr() COM_ENABLE_INTR()
95#endif /* SMP */
96
97/*
98 * Dictionary so that I can name everything *sio* or *com* to compare with
99 * sio.c. There is also lots of ugly formatting and unnecessary ifdefs to
100 * simplify the comparision. These will go away.
101 */
102#define LSR_BI CD1400_RDSR_BREAK
103#define LSR_FE CD1400_RDSR_FE
104#define LSR_OE CD1400_RDSR_OE
105#define LSR_PE CD1400_RDSR_PE
106#define MCR_DTR CD1400_MSVR2_DTR
107#define MCR_RTS CD1400_MSVR1_RTS
108#define MSR_CTS CD1400_MSVR2_CTS
109#define MSR_DCD CD1400_MSVR2_CD
110#define MSR_DSR CD1400_MSVR2_DSR
111#define MSR_RI CD1400_MSVR2_RI
112#define NSIO (NCY * CY_MAX_PORTS)
113#define comconsole cyconsole
114#define comdefaultrate cydefaultrate
115#define com_events cy_events
116#define comhardclose cyhardclose
117#define commctl cymctl
118#define comparam cyparam
119#define comspeed cyspeed
120#define comstart cystart
121#define comwakeup cywakeup
122#define nsio_tty ncy_tty
123#define p_com_addr p_cy_addr
124#define sioattach cyattach
125#define sioclose cyclose
126#define siodriver cydriver
127#define siodtrwakeup cydtrwakeup
128#define sioinput cyinput
129#define siointr cyintr
130#define siointr1 cyintr1
131#define sioioctl cyioctl
132#define sioopen cyopen
133#define siopoll cypoll
134#define sioprobe cyprobe
135#define siosettimeout cysettimeout
136#define siosetwater cysetwater
137#define comstop cystop
138#define siowrite cywrite
139#define sio_registered cy_registered
140#define sio_timeout cy_timeout
141#define sio_timeout_handle cy_timeout_handle
142#define sio_timeouts_until_log cy_timeouts_until_log
143#define sio_tty cy_tty
144
145#define CY_MAX_PORTS (CD1400_NO_OF_CHANNELS * CY_MAX_CD1400s)
146
147/* We encode the cyclom unit number (cyu) in spare bits in the IVR's. */
148#define CD1400_xIVR_CHAN_SHIFT 3
149#define CD1400_xIVR_CHAN 0x1F
150
151/*
152 * ETC states. com->etc may also contain a hardware ETC command value,
153 * meaning that execution of that command is pending.
154 */
155#define ETC_NONE 0 /* we depend on bzero() setting this */
156#define ETC_BREAK_STARTING 1
157#define ETC_BREAK_STARTED 2
158#define ETC_BREAK_ENDING 3
159#define ETC_BREAK_ENDED 4
160
161#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
162
163#define CALLOUT_MASK 0x80
164#define CONTROL_MASK 0x60
165#define CONTROL_INIT_STATE 0x20
166#define CONTROL_LOCK_STATE 0x40
167#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
168#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK)
169/*
170 * Not all of the magic is parametrized in the following macros. 16 and
171 * 0xff are related to the bitfields in a udev_t. CY_MAX_PORTS must be
172 * ((0xff & ~MINOR_MAGIC_MASK) + 1) for things to work.
173 */
174#define MINOR_TO_UNIT(mynor) (((mynor) >> 16) * CY_MAX_PORTS \
175 | (((mynor) & 0xff) & ~MINOR_MAGIC_MASK))
176#define UNIT_TO_MINOR(unit) (((unit) / CY_MAX_PORTS) << 16 \
177 | (((unit) & 0xff) & ~MINOR_MAGIC_MASK))
178
179/*
180 * com state bits.
181 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
182 * than the other bits so that they can be tested as a group without masking
183 * off the low bits.
184 *
185 * The following com and tty flags correspond closely:
186 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
187 * comstop())
188 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
189 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
190 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
191 * TS_FLUSH is not used.
192 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
193 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
194 */
195#define CS_BUSY 0x80 /* output in progress */
196#define CS_TTGO 0x40 /* output not stopped by XOFF */
197#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
198#define CS_CHECKMSR 1 /* check of MSR scheduled */
199#define CS_CTS_OFLOW 2 /* use CTS output flow control */
200#define CS_DTR_OFF 0x10 /* DTR held off */
201#define CS_ODONE 4 /* output completed */
202#define CS_RTS_IFLOW 8 /* use RTS input flow control */
203#define CSE_ODONE 1 /* output transmitted */
204
205static char const * const error_desc[] = {
206#define CE_OVERRUN 0
207 "silo overflow",
208#define CE_INTERRUPT_BUF_OVERFLOW 1
209 "interrupt-level buffer overflow",
210#define CE_TTY_BUF_OVERFLOW 2
211 "tty-level buffer overflow",
212};
213
214#define CE_NTYPES 3
215#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum])
216
217/* types. XXX - should be elsewhere */
218typedef u_char bool_t; /* boolean */
219typedef u_char volatile *cy_addr;
220
221/* queue of linear buffers */
222struct lbq {
223 u_char *l_head; /* next char to process */
224 u_char *l_tail; /* one past the last char to process */
225 struct lbq *l_next; /* next in queue */
226 bool_t l_queued; /* nonzero if queued */
227};
228
229/* com device structure */
230struct com_s {
231 u_char state; /* miscellaneous flag bits */
232 bool_t active_out; /* nonzero if the callout device is open */
233#if 0
234 u_char cfcr_image; /* copy of value written to CFCR */
235#endif
236 u_char etc; /* pending Embedded Transmit Command */
237 u_char extra_state; /* more flag bits, separate for order trick */
238#if 0
239 u_char fifo_image; /* copy of value written to FIFO */
240#endif
241 u_char gfrcr_image; /* copy of value read from GFRCR */
242#if 0
243 bool_t hasfifo; /* nonzero for 16550 UARTs */
244 bool_t loses_outints; /* nonzero if device loses output interrupts */
245#endif
246 u_char mcr_dtr; /* MCR bit that is wired to DTR */
247 u_char mcr_image; /* copy of value written to MCR */
248 u_char mcr_rts; /* MCR bit that is wired to RTS */
249#if 0
250#ifdef COM_MULTIPORT
251 bool_t multiport; /* is this unit part of a multiport device? */
252#endif /* COM_MULTIPORT */
253 bool_t no_irq; /* nonzero if irq is not attached */
254 bool_t poll; /* nonzero if polling is required */
255 bool_t poll_output; /* nonzero if polling for output is required */
256#endif
257 int unit; /* unit number */
258 int dtr_wait; /* time to hold DTR down on close (* 1/hz) */
259#if 0
260 u_int tx_fifo_size;
261#endif
262 u_int wopeners; /* # processes waiting for DCD in open() */
263
264 /*
265 * The high level of the driver never reads status registers directly
266 * because there would be too many side effects to handle conveniently.
267 * Instead, it reads copies of the registers stored here by the
268 * interrupt handler.
269 */
270 u_char last_modem_status; /* last MSR read by intr handler */
271 u_char prev_modem_status; /* last MSR handled by high level */
272
273 u_char hotchar; /* ldisc-specific char to be handled ASAP */
274 u_char *ibuf; /* start of input buffer */
275 u_char *ibufend; /* end of input buffer */
276 u_char *ibufold; /* old input buffer, to be freed */
277 u_char *ihighwater; /* threshold in input buffer */
278 u_char *iptr; /* next free spot in input buffer */
279 int ibufsize; /* size of ibuf (not include error bytes) */
280 int ierroff; /* offset of error bytes in ibuf */
281
282 struct lbq obufq; /* head of queue of output buffers */
283 struct lbq obufs[2]; /* output buffers */
284
285 int cy_align; /* index for register alignment */
286 cy_addr cy_iobase; /* base address of this port's cyclom */
287 cy_addr iobase; /* base address of this port's cd1400 */
288 int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
289
290 struct tty *tp; /* cross reference */
291
292 /* Initial state. */
293 struct termios it_in; /* should be in struct tty */
294 struct termios it_out;
295
296 /* Lock state. */
297 struct termios lt_in; /* should be in struct tty */
298 struct termios lt_out;
299
300 bool_t do_timestamp;
301 bool_t do_dcd_timestamp;
302 struct timeval timestamp;
303 struct timeval dcd_timestamp;
304
305 u_long bytes_in; /* statistics */
306 u_long bytes_out;
307 u_int delta_error_counts[CE_NTYPES];
308 u_long error_counts[CE_NTYPES];
309
310 u_int recv_exception; /* exception chars received */
311 u_int mdm; /* modem signal changes */
312#ifdef CyDebug
313 u_int start_count; /* no. of calls to comstart() */
314 u_int start_real; /* no. of calls that did something */
315#endif
316 u_char car; /* CD1400 CAR shadow (if first unit in cd) */
317 u_char channel_control;/* CD1400 CCR control command shadow */
318 u_char cor[3]; /* CD1400 COR1-3 shadows */
319 u_char intr_enable; /* CD1400 SRER shadow */
320
321 /*
322 * Data area for output buffers. Someday we should build the output
323 * buffer queue without copying data.
324 */
325 u_char obuf1[256];
326 u_char obuf2[256];
327};
328
329/* PCI driver entry point. */
330int cyattach_common __P((cy_addr cy_iobase, int cy_align));
331ointhand2_t siointr;
332
333static int cy_units __P((cy_addr cy_iobase, int cy_align));
334static int sioattach __P((struct isa_device *dev));
335static void cd1400_channel_cmd __P((struct com_s *com, int cmd));
336static void cd1400_channel_cmd_wait __P((struct com_s *com));
337static void cd_etc __P((struct com_s *com, int etc));
338static int cd_getreg __P((struct com_s *com, int reg));
339static void cd_setreg __P((struct com_s *com, int reg, int val));
340static timeout_t siodtrwakeup;
341static void comhardclose __P((struct com_s *com));
342static void sioinput __P((struct com_s *com));
343#if 0
344static void siointr1 __P((struct com_s *com));
345#endif
346static int commctl __P((struct com_s *com, int bits, int how));
347static int comparam __P((struct tty *tp, struct termios *t));
348static swihand_t siopoll;
349static int sioprobe __P((struct isa_device *dev));
350static void siosettimeout __P((void));
351static int siosetwater __P((struct com_s *com, speed_t speed));
352static int comspeed __P((speed_t speed, u_long cy_clock,
353 int *prescaler_io));
354static void comstart __P((struct tty *tp));
355static void comstop __P((struct tty *tp, int rw));
356static timeout_t comwakeup;
357static void disc_optim __P((struct tty *tp, struct termios *t,
358 struct com_s *com));
359
360#ifdef CyDebug
361void cystatus __P((int unit));
362#endif
363
364static char driver_name[] = "cy";
365
366/* table and macro for fast conversion from a unit number to its com struct */
367static struct com_s *p_com_addr[NSIO];
368#define com_addr(unit) (p_com_addr[unit])
369
370struct isa_driver siodriver = {
371 sioprobe, sioattach, driver_name
372};
373
374static d_open_t sioopen;
375static d_close_t sioclose;
376static d_write_t siowrite;
377static d_ioctl_t sioioctl;
378
379#define CDEV_MAJOR 48
380static struct cdevsw sio_cdevsw = {
381 /* open */ sioopen,
382 /* close */ sioclose,
383 /* read */ ttyread,
384 /* write */ siowrite,
385 /* ioctl */ sioioctl,
386 /* poll */ ttypoll,
387 /* mmap */ nommap,
388 /* strategy */ nostrategy,
389 /* name */ driver_name,
390 /* maj */ CDEV_MAJOR,
391 /* dump */ nodump,
392 /* psize */ nopsize,
393 /* flags */ D_TTY | D_KQFILTER,
394 /* bmaj */ -1,
395 /* kqfilter */ ttykqfilter,
396};
397
398static int comconsole = -1;
399static speed_t comdefaultrate = TTYDEF_SPEED;
400static u_int com_events; /* input chars + weighted output completions */
401static bool_t sio_registered;
402static int sio_timeout;
403static int sio_timeouts_until_log;
404static struct callout_handle sio_timeout_handle
405 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
406#if 0 /* XXX */
407static struct tty *sio_tty[NSIO];
408#else
409static struct tty sio_tty[NSIO];
410#endif
411static const int nsio_tty = NSIO;
412
413#ifdef CyDebug
414static u_int cd_inbs;
415static u_int cy_inbs;
416static u_int cd_outbs;
417static u_int cy_outbs;
418static u_int cy_svrr_probes;
419static u_int cy_timeouts;
420#endif
421
422static int cy_chip_offset[] = {
423 0x0000, 0x0400, 0x0800, 0x0c00, 0x0200, 0x0600, 0x0a00, 0x0e00,
424};
425static int cy_nr_cd1400s[NCY];
426static int cy_total_devices;
427#undef RxFifoThreshold
428static int volatile RxFifoThreshold = (CD1400_RX_FIFO_SIZE / 2);
429
430static int
431sioprobe(dev)
432 struct isa_device *dev;
433{
434 cy_addr iobase;
435
436 iobase = (cy_addr)dev->id_maddr;
437
438 /* Cyclom-16Y hardware reset (Cyclom-8Ys don't care) */
439 cy_inb(iobase, CY16_RESET, 0); /* XXX? */
440 DELAY(500); /* wait for the board to get its act together */
441
442 /* this is needed to get the board out of reset */
443 cy_outb(iobase, CY_CLEAR_INTR, 0, 0);
444 DELAY(500);
445
446 return (cy_units(iobase, 0) == 0 ? 0 : -1);
447}
448
449static int
450cy_units(cy_iobase, cy_align)
451 cy_addr cy_iobase;
452 int cy_align;
453{
454 int cyu;
455 u_char firmware_version;
456 int i;
457 cy_addr iobase;
458
459 for (cyu = 0; cyu < CY_MAX_CD1400s; ++cyu) {
460 iobase = cy_iobase + (cy_chip_offset[cyu] << cy_align);
461
462 /* wait for chip to become ready for new command */
463 for (i = 0; i < 10; i++) {
464 DELAY(50);
465 if (!cd_inb(iobase, CD1400_CCR, cy_align))
466 break;
467 }
468
469 /* clear the GFRCR register */
470 cd_outb(iobase, CD1400_GFRCR, cy_align, 0);
471
472 /* issue a reset command */
473 cd_outb(iobase, CD1400_CCR, cy_align,
474 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
475
476 /* wait for the CD1400 to initialize itself */
477 for (i = 0; i < 200; i++) {
478 DELAY(50);
479
480 /* retrieve firmware version */
481 firmware_version = cd_inb(iobase, CD1400_GFRCR,
482 cy_align);
483 if ((firmware_version & 0xf0) == 0x40)
484 break;
485 }
486
487 /*
488 * Anything in the 0x40-0x4F range is fine.
489 * If one CD1400 is bad then we don't support higher
490 * numbered good ones on this board.
491 */
492 if ((firmware_version & 0xf0) != 0x40)
493 break;
494 }
495 return (cyu);
496}
497
498static int
499sioattach(isdp)
500 struct isa_device *isdp;
501{
502 int adapter;
503
504 adapter = cyattach_common((cy_addr) isdp->id_maddr, 0);
505 if (adapter < 0)
506 return (0);
507
508 /*
509 * XXX
510 * This kludge is to allow ISA/PCI device specifications in the
511 * kernel config file to be in any order.
512 */
513 if (isdp->id_unit != adapter) {
514 printf("cy%d: attached as cy%d\n", isdp->id_unit, adapter);
515 isdp->id_unit = adapter; /* XXX */
516 }
517 isdp->id_ointr = siointr;
518 /* isdp->id_ri_flags |= RI_FAST; XXX unimplemented - use newbus! */
519 return (1);
520}
521
522int
523cyattach_common(cy_iobase, cy_align)
524 cy_addr cy_iobase;
525 int cy_align;
526{
527 int adapter;
528 int cyu;
529 u_char firmware_version;
530 cy_addr iobase;
531 int minorbase;
532 int ncyu;
533 int unit;
534
535 adapter = cy_total_devices;
536 if ((u_int)adapter >= NCY) {
537 printf(
538 "cy%d: can't attach adapter: insufficient cy devices configured\n",
539 adapter);
540 return (-1);
541 }
542 ncyu = cy_units(cy_iobase, cy_align);
543 if (ncyu == 0)
544 return (-1);
545 cy_nr_cd1400s[adapter] = ncyu;
546 cy_total_devices++;
547
548 unit = adapter * CY_MAX_PORTS;
549 for (cyu = 0; cyu < ncyu; ++cyu) {
550 int cdu;
551
552 iobase = (cy_addr) (cy_iobase
553 + (cy_chip_offset[cyu] << cy_align));
554 firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
555
556 /* Set up a receive timeout period of than 1+ ms. */
557 cd_outb(iobase, CD1400_PPR, cy_align,
558 howmany(CY_CLOCK(firmware_version)
559 / CD1400_PPR_PRESCALER, 1000));
560
561 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
562 struct com_s *com;
563 int s;
564
565 com = malloc(sizeof *com, M_DEVBUF, M_NOWAIT);
566 if (com == NULL)
567 break;
568 bzero(com, sizeof *com);
569 com->unit = unit;
570 com->gfrcr_image = firmware_version;
571 if (CY_RTS_DTR_SWAPPED(firmware_version)) {
572 com->mcr_dtr = MCR_RTS;
573 com->mcr_rts = MCR_DTR;
574 com->mcr_rts_reg = CD1400_MSVR2;
575 } else {
576 com->mcr_dtr = MCR_DTR;
577 com->mcr_rts = MCR_RTS;
578 com->mcr_rts_reg = CD1400_MSVR1;
579 }
580 com->dtr_wait = 3 * hz;
581 com->obufs[0].l_head = com->obuf1;
582 com->obufs[1].l_head = com->obuf2;
583
584 com->cy_align = cy_align;
585 com->cy_iobase = cy_iobase;
586 com->iobase = iobase;
587 com->car = ~CD1400_CAR_CHAN;
588
589 /*
590 * We don't use all the flags from <sys/ttydefaults.h> since they
591 * are only relevant for logins. It's important to have echo off
592 * initially so that the line doesn't start blathering before the
593 * echo flag can be turned off.
594 */
595 com->it_in.c_iflag = 0;
596 com->it_in.c_oflag = 0;
597 com->it_in.c_cflag = TTYDEF_CFLAG;
598 com->it_in.c_lflag = 0;
599 if (unit == comconsole) {
600 com->it_in.c_iflag = TTYDEF_IFLAG;
601 com->it_in.c_oflag = TTYDEF_OFLAG;
602 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
603 com->it_in.c_lflag = TTYDEF_LFLAG;
604 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
605 }
606 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
607 enable_intr();
608 free(com, M_DEVBUF);
609 return (0);
610 }
611 enable_intr();
612 termioschars(&com->it_in);
613 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
614 com->it_out = com->it_in;
615
616 s = spltty();
617 com_addr(unit) = com;
618 splx(s);
619
620 if (!sio_registered) {
621 cdevsw_add(&sio_cdevsw);
622 register_swi(SWI_TTY, siopoll);
623 sio_registered = TRUE;
624 }
625 minorbase = UNIT_TO_MINOR(unit);
626 make_dev(&sio_cdevsw, minorbase,
627 UID_ROOT, GID_WHEEL, 0600, "ttyc%r%r", adapter,
628 unit % CY_MAX_PORTS);
629 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE,
630 UID_ROOT, GID_WHEEL, 0600, "ttyic%r%r", adapter,
631 unit % CY_MAX_PORTS);
632 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE,
633 UID_ROOT, GID_WHEEL, 0600, "ttylc%r%r", adapter,
634 unit % CY_MAX_PORTS);
635 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
636 UID_UUCP, GID_DIALER, 0660, "cuac%r%r", adapter,
637 unit % CY_MAX_PORTS);
638 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
639 UID_UUCP, GID_DIALER, 0660, "cuaic%r%r", adapter,
640 unit % CY_MAX_PORTS);
641 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
642 UID_UUCP, GID_DIALER, 0660, "cualc%r%r", adapter,
643 unit % CY_MAX_PORTS);
644 }
645 }
646
647 /* ensure an edge for the next interrupt */
648 cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
649
650 return (adapter);
651}
652
653static int
654sioopen(dev, flag, mode, p)
655 dev_t dev;
656 int flag;
657 int mode;
658 struct proc *p;
659{
660 struct com_s *com;
661 int error;
662 int mynor;
663 int s;
664 struct tty *tp;
665 int unit;
666
667 mynor = minor(dev);
668 unit = MINOR_TO_UNIT(mynor);
669 if ((u_int) unit >= NSIO || (com = com_addr(unit)) == NULL)
670 return (ENXIO);
671 if (mynor & CONTROL_MASK)
672 return (0);
673#if 0 /* XXX */
674 tp = com->tp = sio_tty[unit] = ttymalloc(sio_tty[unit]);
675#else
676 tp = com->tp = &sio_tty[unit];
677#endif
678 dev->si_tty = tp;
679 s = spltty();
680 /*
681 * We jump to this label after all non-interrupted sleeps to pick
682 * up any changes of the device state.
683 */
684open_top:
685 while (com->state & CS_DTR_OFF) {
686 error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "cydtr", 0);
687 if (error != 0)
688 goto out;
689 }
690 if (tp->t_state & TS_ISOPEN) {
691 /*
692 * The device is open, so everything has been initialized.
693 * Handle conflicts.
694 */
695 if (mynor & CALLOUT_MASK) {
696 if (!com->active_out) {
697 error = EBUSY;
698 goto out;
699 }
700 } else {
701 if (com->active_out) {
702 if (flag & O_NONBLOCK) {
703 error = EBUSY;
704 goto out;
705 }
706 error = tsleep(&com->active_out,
707 TTIPRI | PCATCH, "cybi", 0);
708 if (error != 0)
709 goto out;
710 goto open_top;
711 }
712 }
713 if (tp->t_state & TS_XCLUDE &&
714 suser(p)) {
715 error = EBUSY;
716 goto out;
717 }
718 } else {
719 /*
720 * The device isn't open, so there are no conflicts.
721 * Initialize it. Initialization is done twice in many
722 * cases: to preempt sleeping callin opens if we are
723 * callout, and to complete a callin open after DCD rises.
724 */
725 tp->t_oproc = comstart;
726 tp->t_stop = comstop;
727 tp->t_param = comparam;
728 tp->t_dev = dev;
729 tp->t_termios = mynor & CALLOUT_MASK
730 ? com->it_out : com->it_in;
731
732 /* Encode per-board unit in LIVR for access in intr routines. */
733 cd_setreg(com, CD1400_LIVR,
734 (unit & CD1400_xIVR_CHAN) << CD1400_xIVR_CHAN_SHIFT);
735
736 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
737#if 0
738 com->poll = com->no_irq;
739 com->poll_output = com->loses_outints;
740#endif
741 ++com->wopeners;
742 error = comparam(tp, &tp->t_termios);
743 --com->wopeners;
744 if (error != 0)
745 goto out;
746#if 0
747 if (com->hasfifo) {
748 /*
749 * (Re)enable and flush fifos.
750 *
751 * Certain SMC chips cause problems if the fifos
752 * are enabled while input is ready. Turn off the
753 * fifo if necessary to clear the input. We test
754 * the input ready bit after enabling the fifos
755 * since we've already enabled them in comparam()
756 * and to handle races between enabling and fresh
757 * input.
758 */
759 while (TRUE) {
760 outb(iobase + com_fifo,
761 FIFO_RCV_RST | FIFO_XMT_RST
762 | com->fifo_image);
763 DELAY(100);
764 if (!(inb(com->line_status_port) & LSR_RXRDY))
765 break;
766 outb(iobase + com_fifo, 0);
767 DELAY(100);
768 (void) inb(com->data_port);
769 }
770 }
771
772 disable_intr();
773 (void) inb(com->line_status_port);
774 (void) inb(com->data_port);
775 com->prev_modem_status = com->last_modem_status
776 = inb(com->modem_status_port);
777 outb(iobase + com_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS
778 | IER_EMSC);
779 enable_intr();
780#else /* !0 */
781 /*
782 * Flush fifos. This requires a full channel reset which
783 * also disables the transmitter and receiver. Recover
784 * from this.
785 */
786 cd1400_channel_cmd(com,
787 CD1400_CCR_CMDRESET | CD1400_CCR_CHANRESET);
788 cd1400_channel_cmd(com, com->channel_control);
789
790 disable_intr();
791 com->prev_modem_status = com->last_modem_status
792 = cd_getreg(com, CD1400_MSVR2);
793 cd_setreg(com, CD1400_SRER,
794 com->intr_enable
795 = CD1400_SRER_MDMCH | CD1400_SRER_RXDATA);
796 enable_intr();
797#endif /* 0 */
798 /*
799 * Handle initial DCD. Callout devices get a fake initial
800 * DCD (trapdoor DCD). If we are callout, then any sleeping
801 * callin opens get woken up and resume sleeping on "cybi"
802 * instead of "cydcd".
803 */
804 /*
805 * XXX `mynor & CALLOUT_MASK' should be
806 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
807 * TRAPDOOR_CARRIER is the default initial state for callout
808 * devices and SOFT_CARRIER is like CLOCAL except it hides
809 * the true carrier.
810 */
811 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
812 (*linesw[tp->t_line].l_modem)(tp, 1);
813 }
814 /*
815 * Wait for DCD if necessary.
816 */
817 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
818 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
819 ++com->wopeners;
820 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "cydcd", 0);
821 --com->wopeners;
822 if (error != 0)
823 goto out;
824 goto open_top;
825 }
826 error = (*linesw[tp->t_line].l_open)(dev, tp);
827 disc_optim(tp, &tp->t_termios, com);
828 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
829 com->active_out = TRUE;
830 siosettimeout();
831out:
832 splx(s);
833 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
834 comhardclose(com);
835 return (error);
836}
837
838static int
839sioclose(dev, flag, mode, p)
840 dev_t dev;
841 int flag;
842 int mode;
843 struct proc *p;
844{
845 struct com_s *com;
846 int mynor;
847 int s;
848 struct tty *tp;
849
850 mynor = minor(dev);
851 if (mynor & CONTROL_MASK)
852 return (0);
853 com = com_addr(MINOR_TO_UNIT(mynor));
854 tp = com->tp;
855 s = spltty();
856 cd_etc(com, CD1400_ETC_STOPBREAK);
857 (*linesw[tp->t_line].l_close)(tp, flag);
858 disc_optim(tp, &tp->t_termios, com);
859 comstop(tp, FREAD | FWRITE);
860 comhardclose(com);
861 ttyclose(tp);
862 siosettimeout();
863 splx(s);
864#ifdef broken /* session holds a ref to the tty; can't deallocate */
865 ttyfree(tp);
866 com->tp = sio_tty[unit] = NULL;
867#endif
868 return (0);
869}
870
871static void
872comhardclose(com)
873 struct com_s *com;
874{
875 cy_addr iobase;
876 int s;
877 struct tty *tp;
878 int unit;
879
880 unit = com->unit;
881 iobase = com->iobase;
882 s = spltty();
883#if 0
884 com->poll = FALSE;
885 com->poll_output = FALSE;
886#endif
887 com->do_timestamp = 0;
888#if 0
889 outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
890#else
891 /* XXX */
892 disable_intr();
893 com->etc = ETC_NONE;
894 cd_setreg(com, CD1400_COR2, com->cor[1] &= ~CD1400_COR2_ETC);
895 enable_intr();
896 cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
897#endif
898
899 {
900#if 0
901 outb(iobase + com_ier, 0);
902#else
903 disable_intr();
904 cd_setreg(com, CD1400_SRER, com->intr_enable = 0);
905 enable_intr();
906#endif
907 tp = com->tp;
908 if ((tp->t_cflag & HUPCL)
909 /*
910 * XXX we will miss any carrier drop between here and the
911 * next open. Perhaps we should watch DCD even when the
912 * port is closed; it is not sufficient to check it at
913 * the next open because it might go up and down while
914 * we're not watching.
915 */
916 || (!com->active_out
917 && !(com->prev_modem_status & MSR_DCD)
918 && !(com->it_in.c_cflag & CLOCAL))
919 || !(tp->t_state & TS_ISOPEN)) {
920 (void)commctl(com, TIOCM_DTR, DMBIC);
921
922 /* Disable receiver (leave transmitter enabled). */
923 com->channel_control = CD1400_CCR_CMDCHANCTL
924 | CD1400_CCR_XMTEN
925 | CD1400_CCR_RCVDIS;
926 cd1400_channel_cmd(com, com->channel_control);
927
928 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
929 timeout(siodtrwakeup, com, com->dtr_wait);
930 com->state |= CS_DTR_OFF;
931 }
932 }
933 }
934#if 0
935 if (com->hasfifo) {
936 /*
937 * Disable fifos so that they are off after controlled
938 * reboots. Some BIOSes fail to detect 16550s when the
939 * fifos are enabled.
940 */
941 outb(iobase + com_fifo, 0);
942 }
943#endif
944 com->active_out = FALSE;
945 wakeup(&com->active_out);
946 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
947 splx(s);
948}
949
950static int
951siowrite(dev, uio, flag)
952 dev_t dev;
953 struct uio *uio;
954 int flag;
955{
956 int mynor;
957 struct tty *tp;
958 int unit;
959
960 mynor = minor(dev);
961 if (mynor & CONTROL_MASK)
962 return (ENODEV);
963
964 unit = MINOR_TO_UNIT(mynor);
965 tp = com_addr(unit)->tp;
966 /*
967 * (XXX) We disallow virtual consoles if the physical console is
968 * a serial port. This is in case there is a display attached that
969 * is not the console. In that situation we don't need/want the X
970 * server taking over the console.
971 */
972 if (constty != NULL && unit == comconsole)
973 constty = NULL;
974#ifdef Smarts
975 /* XXX duplicate ttwrite(), but without so much output processing on
976 * CR & LF chars. Hardly worth the effort, given that high-throughput
977 * sessions are raw anyhow.
978 */
979#else
980 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
981#endif
982}
983
984static void
985siodtrwakeup(chan)
986 void *chan;
987{
988 struct com_s *com;
989
990 com = (struct com_s *)chan;
991 com->state &= ~CS_DTR_OFF;
992 wakeup(&com->dtr_wait);
993}
994
995static void
996sioinput(com)
997 struct com_s *com;
998{
999 u_char *buf;
1000 int incc;
1001 u_char line_status;
1002 int recv_data;
1003 struct tty *tp;
1004
1005 buf = com->ibuf;
1006 tp = com->tp;
1007 if (!(tp->t_state & TS_ISOPEN)) {
1008 com_events -= (com->iptr - com->ibuf);
1009 com->iptr = com->ibuf;
1010 return;
1011 }
1012 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1013 /*
1014 * Avoid the grotesquely inefficient lineswitch routine
1015 * (ttyinput) in "raw" mode. It usually takes about 450
1016 * instructions (that's without canonical processing or echo!).
1017 * slinput is reasonably fast (usually 40 instructions plus
1018 * call overhead).
1019 */
1020 do {
1021 enable_intr();
1022 incc = com->iptr - buf;
1023 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1024 && (com->state & CS_RTS_IFLOW
1025 || tp->t_iflag & IXOFF)
1026 && !(tp->t_state & TS_TBLOCK))
1027 ttyblock(tp);
1028 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1029 += b_to_q((char *)buf, incc, &tp->t_rawq);
1030 buf += incc;
1031 tk_nin += incc;
1032 tk_rawcc += incc;
1033 tp->t_rawcc += incc;
1034 ttwakeup(tp);
1035 if (tp->t_state & TS_TTSTOP
1036 && (tp->t_iflag & IXANY
1037 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1038 tp->t_state &= ~TS_TTSTOP;
1039 tp->t_lflag &= ~FLUSHO;
1040 comstart(tp);
1041 }
1042 disable_intr();
1043 } while (buf < com->iptr);
1044 } else {
1045 do {
1046 enable_intr();
1047 line_status = buf[com->ierroff];
1048 recv_data = *buf++;
1049 if (line_status
1050 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1051 if (line_status & LSR_BI)
1052 recv_data |= TTY_BI;
1053 if (line_status & LSR_FE)
1054 recv_data |= TTY_FE;
1055 if (line_status & LSR_OE)
1056 recv_data |= TTY_OE;
1057 if (line_status & LSR_PE)
1058 recv_data |= TTY_PE;
1059 }
1060 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1061 disable_intr();
1062 } while (buf < com->iptr);
1063 }
1064 com_events -= (com->iptr - com->ibuf);
1065 com->iptr = com->ibuf;
1066
1067 /*
1068 * There is now room for another low-level buffer full of input,
1069 * so enable RTS if it is now disabled and there is room in the
1070 * high-level buffer.
1071 */
1072 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & com->mcr_rts) &&
1073 !(tp->t_state & TS_TBLOCK))
1074#if 0
1075 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1076#else
1077 cd_setreg(com, com->mcr_rts_reg,
1078 com->mcr_image |= com->mcr_rts);
1079#endif
1080}
1081
1082void
1083siointr(unit)
1084 int unit;
1085{
1086 int baseu;
1087 int cy_align;
1088 cy_addr cy_iobase;
1089 int cyu;
1090 cy_addr iobase;
1091 u_char status;
1092
1093 COM_LOCK(); /* XXX could this be placed down lower in the loop? */
1094
1095 baseu = unit * CY_MAX_PORTS;
1096 cy_align = com_addr(baseu)->cy_align;
1097 cy_iobase = com_addr(baseu)->cy_iobase;
1098
1099 /* check each CD1400 in turn */
1100 for (cyu = 0; cyu < cy_nr_cd1400s[unit]; ++cyu) {
1101 iobase = (cy_addr) (cy_iobase
1102 + (cy_chip_offset[cyu] << cy_align));
1103 /* poll to see if it has any work */
1104 status = cd_inb(iobase, CD1400_SVRR, cy_align);
1105 if (status == 0)
1106 continue;
1107#ifdef CyDebug
1108 ++cy_svrr_probes;
1109#endif
1110 /* service requests as appropriate, giving priority to RX */
1111 if (status & CD1400_SVRR_RXRDY) {
1112 struct com_s *com;
1113 u_int count;
1114 u_char *ioptr;
1115 u_char line_status;
1116 u_char recv_data;
1117 u_char serv_type;
1118#ifdef PollMode
1119 u_char save_rir;
1120#endif
1121
1122#ifdef PollMode
1123 save_rir = cd_inb(iobase, CD1400_RIR, cy_align);
1124
1125 /* enter rx service */
1126 cd_outb(iobase, CD1400_CAR, cy_align, save_rir);
1127 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1128 = save_rir & CD1400_CAR_CHAN;
1129
1130 serv_type = cd_inb(iobase, CD1400_RIVR, cy_align);
1131 com = com_addr(baseu
1132 + ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
1133 & CD1400_xIVR_CHAN));
1134#else
1135 /* ack receive service */
1136 serv_type = cy_inb(iobase, CY8_SVCACKR, cy_align);
1137
1138 com = com_addr(baseu +
1139 + ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
1140 & CD1400_xIVR_CHAN));
1141#endif
1142
1143 if (serv_type & CD1400_RIVR_EXCEPTION) {
1144 ++com->recv_exception;
1145 line_status = cd_inb(iobase, CD1400_RDSR, cy_align);
1146 /* break/unnattached error bits or real input? */
1147 recv_data = cd_inb(iobase, CD1400_RDSR, cy_align);
1148#ifndef SOFT_HOTCHAR
1149 if (line_status & CD1400_RDSR_SPECIAL
1150 && com->hotchar != 0)
1151 setsofttty();
1152#endif
1153#if 1 /* XXX "intelligent" PFO error handling would break O error handling */
1154 if (line_status & (LSR_PE|LSR_FE|LSR_BI)) {
1155 /*
1156 Don't store PE if IGNPAR and BI if IGNBRK,
1157 this hack allows "raw" tty optimization
1158 works even if IGN* is set.
1159 */
1160 if ( com->tp == NULL
1161 || !(com->tp->t_state & TS_ISOPEN)
1162 || ((line_status & (LSR_PE|LSR_FE))
1163 && (com->tp->t_iflag & IGNPAR))
1164 || ((line_status & LSR_BI)
1165 && (com->tp->t_iflag & IGNBRK)))
1166 goto cont;
1167 if ( (line_status & (LSR_PE|LSR_FE))
1168 && (com->tp->t_state & TS_CAN_BYPASS_L_RINT)
1169 && ((line_status & LSR_FE)
1170 || ((line_status & LSR_PE)
1171 && (com->tp->t_iflag & INPCK))))
1172 recv_data = 0;
1173 }
1174#endif /* 1 */
1175 ++com->bytes_in;
1176#ifdef SOFT_HOTCHAR
1177 if (com->hotchar != 0 && recv_data == com->hotchar)
1178 setsofttty();
1179#endif
1180 ioptr = com->iptr;
1181 if (ioptr >= com->ibufend)
1182 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1183 else {
1184 if (com->do_timestamp)
1185 microtime(&com->timestamp);
1186 ++com_events;
1187 ioptr[0] = recv_data;
1188 ioptr[com->ierroff] = line_status;
1189 com->iptr = ++ioptr;
1190 if (ioptr == com->ihighwater
1191 && com->state & CS_RTS_IFLOW)
1192#if 0
1193 outb(com->modem_ctl_port,
1194 com->mcr_image &= ~MCR_RTS);
1195#else
1196 cd_outb(iobase, com->mcr_rts_reg,
1197 cy_align,
1198 com->mcr_image &=
1199 ~com->mcr_rts);
1200#endif
1201 if (line_status & LSR_OE)
1202 CE_RECORD(com, CE_OVERRUN);
1203 }
1204 goto cont;
1205 } else {
1206 int ifree;
1207
1208 count = cd_inb(iobase, CD1400_RDCR, cy_align);
1209 if (!count)
1210 goto cont;
1211 com->bytes_in += count;
1212 ioptr = com->iptr;
1213 ifree = com->ibufend - ioptr;
1214 if (count > ifree) {
1215 count -= ifree;
1216 com_events += ifree;
1217 if (ifree != 0) {
1218 if (com->do_timestamp)
1219 microtime(&com->timestamp);
1220 do {
1221 recv_data = cd_inb(iobase,
1222 CD1400_RDSR,
1223 cy_align);
1224#ifdef SOFT_HOTCHAR
1225 if (com->hotchar != 0
1226 && recv_data
1227 == com->hotchar)
1228 setsofttty();
1229#endif
1230 ioptr[0] = recv_data;
1231 ioptr[com->ierroff] = 0;
1232 ++ioptr;
1233 } while (--ifree != 0);
1234 }
1235 com->delta_error_counts
1236 [CE_INTERRUPT_BUF_OVERFLOW] += count;
1237 do {
1238 recv_data = cd_inb(iobase, CD1400_RDSR,
1239 cy_align);
1240#ifdef SOFT_HOTCHAR
1241 if (com->hotchar != 0
1242 && recv_data == com->hotchar)
1243 setsofttty();
1244#endif
1245 } while (--count != 0);
1246 } else {
1247 if (com->do_timestamp)
1248 microtime(&com->timestamp);
1249 if (ioptr <= com->ihighwater
1250 && ioptr + count > com->ihighwater
1251 && com->state & CS_RTS_IFLOW)
1252#if 0
1253 outb(com->modem_ctl_port,
1254 com->mcr_image &= ~MCR_RTS);
1255#else
1256 cd_outb(iobase, com->mcr_rts_reg,
1257 cy_align,
1258 com->mcr_image
1259 &= ~com->mcr_rts);
1260#endif
1261 com_events += count;
1262 do {
1263 recv_data = cd_inb(iobase, CD1400_RDSR,
1264 cy_align);
1265#ifdef SOFT_HOTCHAR
1266 if (com->hotchar != 0
1267 && recv_data == com->hotchar)
1268 setsofttty();
1269#endif
1270 ioptr[0] = recv_data;
1271 ioptr[com->ierroff] = 0;
1272 ++ioptr;
1273 } while (--count != 0);
1274 }
1275 com->iptr = ioptr;
1276 }
1277cont:
1278
1279 /* terminate service context */
1280#ifdef PollMode
1281 cd_outb(iobase, CD1400_RIR, cy_align,
1282 save_rir
1283 & ~(CD1400_RIR_RDIREQ | CD1400_RIR_RBUSY));
1284#else
1285 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1286#endif
1287 }
1288 if (status & CD1400_SVRR_MDMCH) {
1289 struct com_s *com;
1290 u_char modem_status;
1291#ifdef PollMode
1292 u_char save_mir;
1293#else
1294 u_char vector;
1295#endif
1296
1297#ifdef PollMode
1298 save_mir = cd_inb(iobase, CD1400_MIR, cy_align);
1299
1300 /* enter modem service */
1301 cd_outb(iobase, CD1400_CAR, cy_align, save_mir);
1302 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1303 = save_mir & CD1400_CAR_CHAN;
1304
1305 com = com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS
1306 + (save_mir & CD1400_MIR_CHAN));
1307#else
1308 /* ack modem service */
1309 vector = cy_inb(iobase, CY8_SVCACKM, cy_align);
1310
1311 com = com_addr(baseu
1312 + ((vector >> CD1400_xIVR_CHAN_SHIFT)
1313 & CD1400_xIVR_CHAN));
1314#endif
1315 ++com->mdm;
1316 modem_status = cd_inb(iobase, CD1400_MSVR2, cy_align);
1317 if (modem_status != com->last_modem_status) {
1318 if (com->do_dcd_timestamp
1319 && !(com->last_modem_status & MSR_DCD)
1320 && modem_status & MSR_DCD)
1321 microtime(&com->dcd_timestamp);
1322
1323 /*
1324 * Schedule high level to handle DCD changes. Note
1325 * that we don't use the delta bits anywhere. Some
1326 * UARTs mess them up, and it's easy to remember the
1327 * previous bits and calculate the delta.
1328 */
1329 com->last_modem_status = modem_status;
1330 if (!(com->state & CS_CHECKMSR)) {
1331 com_events += LOTS_OF_EVENTS;
1332 com->state |= CS_CHECKMSR;
1333 setsofttty();
1334 }
1335
1336#ifdef SOFT_CTS_OFLOW
1337 /* handle CTS change immediately for crisp flow ctl */
1338 if (com->state & CS_CTS_OFLOW) {
1339 if (modem_status & MSR_CTS) {
1340 com->state |= CS_ODEVREADY;
1341 if (com->state >= (CS_BUSY | CS_TTGO
1342 | CS_ODEVREADY)
1343 && !(com->intr_enable
1344 & CD1400_SRER_TXRDY))
1345 cd_outb(iobase, CD1400_SRER,
1346 cy_align,
1347 com->intr_enable
1348 = com->intr_enable
1349 & ~CD1400_SRER_TXMPTY
1350 | CD1400_SRER_TXRDY);
1351 } else {
1352 com->state &= ~CS_ODEVREADY;
1353 if (com->intr_enable
1354 & CD1400_SRER_TXRDY)
1355 cd_outb(iobase, CD1400_SRER,
1356 cy_align,
1357 com->intr_enable
1358 = com->intr_enable
1359 & ~CD1400_SRER_TXRDY
1360 | CD1400_SRER_TXMPTY);
1361 }
1362 }
1363#endif
1364 }
1365
1366 /* terminate service context */
1367#ifdef PollMode
1368 cd_outb(iobase, CD1400_MIR, cy_align,
1369 save_mir
1370 & ~(CD1400_MIR_RDIREQ | CD1400_MIR_RBUSY));
1371#else
1372 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1373#endif
1374 }
1375 if (status & CD1400_SVRR_TXRDY) {
1376 struct com_s *com;
1377#ifdef PollMode
1378 u_char save_tir;
1379#else
1380 u_char vector;
1381#endif
1382
1383#ifdef PollMode
1384 save_tir = cd_inb(iobase, CD1400_TIR, cy_align);
1385
1386 /* enter tx service */
1387 cd_outb(iobase, CD1400_CAR, cy_align, save_tir);
1388 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1389 = save_tir & CD1400_CAR_CHAN;
1390
1391 com = com_addr(baseu
1392 + cyu * CD1400_NO_OF_CHANNELS
1393 + (save_tir & CD1400_TIR_CHAN));
1394#else
1395 /* ack transmit service */
1396 vector = cy_inb(iobase, CY8_SVCACKT, cy_align);
1397
1398 com = com_addr(baseu
1399 + ((vector >> CD1400_xIVR_CHAN_SHIFT)
1400 & CD1400_xIVR_CHAN));
1401#endif
1402
1403 if (com->etc != ETC_NONE) {
1404 if (com->intr_enable & CD1400_SRER_TXRDY) {
1405 /*
1406 * Here due to sloppy SRER_TXRDY
1407 * enabling. Ignore. Come back when
1408 * tx is empty.
1409 */
1410 cd_outb(iobase, CD1400_SRER, cy_align,
1411 com->intr_enable
1412 = (com->intr_enable
1413 & ~CD1400_SRER_TXRDY)
1414 | CD1400_SRER_TXMPTY);
1415 goto terminate_tx_service;
1416 }
1417 switch (com->etc) {
1418 case CD1400_ETC_SENDBREAK:
1419 case CD1400_ETC_STOPBREAK:
1420 /*
1421 * Start the command. Come back on
1422 * next tx empty interrupt, hopefully
1423 * after command has been executed.
1424 */
1425 cd_outb(iobase, CD1400_COR2, cy_align,
1426 com->cor[1] |= CD1400_COR2_ETC);
1427 cd_outb(iobase, CD1400_TDR, cy_align,
1428 CD1400_ETC_CMD);
1429 cd_outb(iobase, CD1400_TDR, cy_align,
1430 com->etc);
1431 if (com->etc == CD1400_ETC_SENDBREAK)
1432 com->etc = ETC_BREAK_STARTING;
1433 else
1434 com->etc = ETC_BREAK_ENDING;
1435 goto terminate_tx_service;
1436 case ETC_BREAK_STARTING:
1437 /*
1438 * BREAK is now on. Continue with
1439 * SRER_TXMPTY processing, hopefully
1440 * don't come back.
1441 */
1442 com->etc = ETC_BREAK_STARTED;
1443 break;
1444 case ETC_BREAK_STARTED:
1445 /*
1446 * Came back due to sloppy SRER_TXMPTY
1447 * enabling. Hope again.
1448 */
1449 break;
1450 case ETC_BREAK_ENDING:
1451 /*
1452 * BREAK is now off. Continue with
1453 * SRER_TXMPTY processing and don't
1454 * come back. The SWI handler will
1455 * restart tx interrupts if necessary.
1456 */
1457 cd_outb(iobase, CD1400_COR2, cy_align,
1458 com->cor[1]
1459 &= ~CD1400_COR2_ETC);
1460 com->etc = ETC_BREAK_ENDED;
1461 if (!(com->state & CS_ODONE)) {
1462 com_events += LOTS_OF_EVENTS;
1463 com->state |= CS_ODONE;
1464 setsofttty();
1465 }
1466 break;
1467 case ETC_BREAK_ENDED:
1468 /*
1469 * Shouldn't get here. Hope again.
1470 */
1471 break;
1472 }
1473 }
1474 if (com->intr_enable & CD1400_SRER_TXMPTY) {
1475 if (!(com->extra_state & CSE_ODONE)) {
1476 com_events += LOTS_OF_EVENTS;
1477 com->extra_state |= CSE_ODONE;
1478 setsofttty();
1479 }
1480 cd_outb(iobase, CD1400_SRER, cy_align,
1481 com->intr_enable
1482 &= ~CD1400_SRER_TXMPTY);
1483 goto terminate_tx_service;
1484 }
1485 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1486 u_char *ioptr;
1487 u_int ocount;
1488
1489 ioptr = com->obufq.l_head;
1490 ocount = com->obufq.l_tail - ioptr;
1491 if (ocount > CD1400_TX_FIFO_SIZE)
1492 ocount = CD1400_TX_FIFO_SIZE;
1493 com->bytes_out += ocount;
1494 do
1495 cd_outb(iobase, CD1400_TDR, cy_align,
1496 *ioptr++);
1497 while (--ocount != 0);
1498 com->obufq.l_head = ioptr;
1499 if (ioptr >= com->obufq.l_tail) {
1500 struct lbq *qp;
1501
1502 qp = com->obufq.l_next;
1503 qp->l_queued = FALSE;
1504 qp = qp->l_next;
1505 if (qp != NULL) {
1506 com->obufq.l_head = qp->l_head;
1507 com->obufq.l_tail = qp->l_tail;
1508 com->obufq.l_next = qp;
1509 } else {
1510 /* output just completed */
1511 com->state &= ~CS_BUSY;
1512
1513 /*
1514 * The setting of CSE_ODONE may be
1515 * stale here. We currently only
1516 * use it when CS_BUSY is set, and
1517 * fixing it when we clear CS_BUSY
1518 * is easiest.
1519 */
1520 if (com->extra_state & CSE_ODONE) {
1521 com_events -= LOTS_OF_EVENTS;
1522 com->extra_state &= ~CSE_ODONE;
1523 }
1524
1525 cd_outb(iobase, CD1400_SRER, cy_align,
1526 com->intr_enable
1527 = (com->intr_enable
1528 & ~CD1400_SRER_TXRDY)
1529 | CD1400_SRER_TXMPTY);
1530 }
1531 if (!(com->state & CS_ODONE)) {
1532 com_events += LOTS_OF_EVENTS;
1533 com->state |= CS_ODONE;
1534
1535 /* handle at high level ASAP */
1536 setsofttty();
1537 }
1538 }
1539 }
1540
1541 /* terminate service context */
1542terminate_tx_service:
1543#ifdef PollMode
1544 cd_outb(iobase, CD1400_TIR, cy_align,
1545 save_tir
1546 & ~(CD1400_TIR_RDIREQ | CD1400_TIR_RBUSY));
1547#else
1548 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1549#endif
1550 }
1551 }
1552
1553 /* ensure an edge for the next interrupt */
1554 cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
1555
1556 schedsofttty();
1557
1558 COM_UNLOCK();
1559}
1560
1561#if 0
1562static void
1563siointr1(com)
1564 struct com_s *com;
1565{
1566}
1567#endif
1568
1569static int
1570sioioctl(dev, cmd, data, flag, p)
1571 dev_t dev;
1572 u_long cmd;
1573 caddr_t data;
1574 int flag;
1575 struct proc *p;
1576{
1577 struct com_s *com;
1578 int error;
1579 int mynor;
1580 int s;
1581 struct tty *tp;
1582#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1583 int oldcmd;
1584 struct termios term;
1585#endif
1586
1587 mynor = minor(dev);
1588 com = com_addr(MINOR_TO_UNIT(mynor));
1589 if (mynor & CONTROL_MASK) {
1590 struct termios *ct;
1591
1592 switch (mynor & CONTROL_MASK) {
1593 case CONTROL_INIT_STATE:
1594 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1595 break;
1596 case CONTROL_LOCK_STATE:
1597 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1598 break;
1599 default:
1600 return (ENODEV); /* /dev/nodev */
1601 }
1602 switch (cmd) {
1603 case TIOCSETA:
1604 error = suser(p);
1605 if (error != 0)
1606 return (error);
1607 *ct = *(struct termios *)data;
1608 return (0);
1609 case TIOCGETA:
1610 *(struct termios *)data = *ct;
1611 return (0);
1612 case TIOCGETD:
1613 *(int *)data = TTYDISC;
1614 return (0);
1615 case TIOCGWINSZ:
1616 bzero(data, sizeof(struct winsize));
1617 return (0);
1618 default:
1619 return (ENOTTY);
1620 }
1621 }
1622 tp = com->tp;
1623#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1624 term = tp->t_termios;
1625 oldcmd = cmd;
1626 error = ttsetcompat(tp, &cmd, data, &term);
1627 if (error != 0)
1628 return (error);
1629 if (cmd != oldcmd)
1630 data = (caddr_t)&term;
1631#endif
1632 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
1633 int cc;
1634 struct termios *dt = (struct termios *)data;
1635 struct termios *lt = mynor & CALLOUT_MASK
1636 ? &com->lt_out : &com->lt_in;
1637
1638 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
1639 | (dt->c_iflag & ~lt->c_iflag);
1640 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
1641 | (dt->c_oflag & ~lt->c_oflag);
1642 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
1643 | (dt->c_cflag & ~lt->c_cflag);
1644 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
1645 | (dt->c_lflag & ~lt->c_lflag);
1646 for (cc = 0; cc < NCCS; ++cc)
1647 if (lt->c_cc[cc] != 0)
1648 dt->c_cc[cc] = tp->t_cc[cc];
1649 if (lt->c_ispeed != 0)
1650 dt->c_ispeed = tp->t_ispeed;
1651 if (lt->c_ospeed != 0)
1652 dt->c_ospeed = tp->t_ospeed;
1653 }
1654 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
1655 if (error != ENOIOCTL)
1656 return (error);
1657 s = spltty();
1658 error = ttioctl(tp, cmd, data, flag);
1659 disc_optim(tp, &tp->t_termios, com);
1660 if (error != ENOIOCTL) {
1661 splx(s);
1662 return (error);
1663 }
1664 switch (cmd) {
1665 case TIOCSBRK:
1666#if 0
1667 outb(iobase + com_cfcr, com->cfcr_image |= CFCR_SBREAK);
1668#else
1669 cd_etc(com, CD1400_ETC_SENDBREAK);
1670#endif
1671 break;
1672 case TIOCCBRK:
1673#if 0
1674 outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1675#else
1676 cd_etc(com, CD1400_ETC_STOPBREAK);
1677#endif
1678 break;
1679 case TIOCSDTR:
1680 (void)commctl(com, TIOCM_DTR, DMBIS);
1681 break;
1682 case TIOCCDTR:
1683 (void)commctl(com, TIOCM_DTR, DMBIC);
1684 break;
1685 /*
1686 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
1687 * changes get undone on the next call to comparam().
1688 */
1689 case TIOCMSET:
1690 (void)commctl(com, *(int *)data, DMSET);
1691 break;
1692 case TIOCMBIS:
1693 (void)commctl(com, *(int *)data, DMBIS);
1694 break;
1695 case TIOCMBIC:
1696 (void)commctl(com, *(int *)data, DMBIC);
1697 break;
1698 case TIOCMGET:
1699 *(int *)data = commctl(com, 0, DMGET);
1700 break;
1701 case TIOCMSDTRWAIT:
1702 /* must be root since the wait applies to following logins */
1703 error = suser(p);
1704 if (error != 0) {
1705 splx(s);
1706 return (error);
1707 }
1708 com->dtr_wait = *(int *)data * hz / 100;
1709 break;
1710 case TIOCMGDTRWAIT:
1711 *(int *)data = com->dtr_wait * 100 / hz;
1712 break;
1713 case TIOCTIMESTAMP:
1714 com->do_timestamp = TRUE;
1715 *(struct timeval *)data = com->timestamp;
1716 break;
1717 case TIOCDCDTIMESTAMP:
1718 com->do_dcd_timestamp = TRUE;
1719 *(struct timeval *)data = com->dcd_timestamp;
1720 break;
1721 default:
1722 splx(s);
1723 return (ENOTTY);
1724 }
1725 splx(s);
1726 return (0);
1727}
1728
1729static void
1730siopoll()
1731{
1732 int unit;
1733
1734#ifdef CyDebug
1735 ++cy_timeouts;
1736#endif
1737 if (com_events == 0)
1738 return;
1739repeat:
1740 for (unit = 0; unit < NSIO; ++unit) {
1741 struct com_s *com;
1742 int incc;
1743 struct tty *tp;
1744
1745 com = com_addr(unit);
1746 if (com == NULL)
1747 continue;
1748 tp = com->tp;
1749 if (tp == NULL) {
1750 /*
1751 * XXX forget any events related to closed devices
1752 * (actually never opened devices) so that we don't
1753 * loop.
1754 */
1755 disable_intr();
1756 incc = com->iptr - com->ibuf;
1757 com->iptr = com->ibuf;
1758 if (com->state & CS_CHECKMSR) {
1759 incc += LOTS_OF_EVENTS;
1760 com->state &= ~CS_CHECKMSR;
1761 }
1762 com_events -= incc;
1763 enable_intr();
1764 if (incc != 0)
1765 log(LOG_DEBUG,
1766 "sio%d: %d events for device with no tp\n",
1767 unit, incc);
1768 continue;
1769 }
1770 if (com->iptr != com->ibuf) {
1771 disable_intr();
1772 sioinput(com);
1773 enable_intr();
1774 }
1775 if (com->state & CS_CHECKMSR) {
1776 u_char delta_modem_status;
1777
1778 disable_intr();
1779 delta_modem_status = com->last_modem_status
1780 ^ com->prev_modem_status;
1781 com->prev_modem_status = com->last_modem_status;
1782 com_events -= LOTS_OF_EVENTS;
1783 com->state &= ~CS_CHECKMSR;
1784 enable_intr();
1785 if (delta_modem_status & MSR_DCD)
1786 (*linesw[tp->t_line].l_modem)
1787 (tp, com->prev_modem_status & MSR_DCD);
1788 }
1789 if (com->extra_state & CSE_ODONE) {
1790 disable_intr();
1791 com_events -= LOTS_OF_EVENTS;
1792 com->extra_state &= ~CSE_ODONE;
1793 enable_intr();
1794 if (!(com->state & CS_BUSY)) {
1795 tp->t_state &= ~TS_BUSY;
1796 ttwwakeup(com->tp);
1797 }
1798 if (com->etc != ETC_NONE) {
1799 if (com->etc == ETC_BREAK_ENDED)
1800 com->etc = ETC_NONE;
1801 wakeup(&com->etc);
1802 }
1803 }
1804 if (com->state & CS_ODONE) {
1805 disable_intr();
1806 com_events -= LOTS_OF_EVENTS;
1807 com->state &= ~CS_ODONE;
1808 enable_intr();
1809 (*linesw[tp->t_line].l_start)(tp);
1810 }
1811 if (com_events == 0)
1812 break;
1813 }
1814 if (com_events >= LOTS_OF_EVENTS)
1815 goto repeat;
1816}
1817
1818static int
1819comparam(tp, t)
1820 struct tty *tp;
1821 struct termios *t;
1822{
1823 int bits;
1824 int cflag;
1825 struct com_s *com;
1826 u_char cor_change;
1827 u_long cy_clock;
1828 int idivisor;
1829 int iflag;
1830 int iprescaler;
1831 int itimeout;
1832 int odivisor;
1833 int oprescaler;
1834 u_char opt;
1835 int s;
1836 int unit;
1837
1838 /* do historical conversions */
1839 if (t->c_ispeed == 0)
1840 t->c_ispeed = t->c_ospeed;
1841
1842 unit = DEV_TO_UNIT(tp->t_dev);
1843 com = com_addr(unit);
1844
1845 /* check requested parameters */
1846 cy_clock = CY_CLOCK(com->gfrcr_image);
1847 idivisor = comspeed(t->c_ispeed, cy_clock, &iprescaler);
1848 if (idivisor < 0)
1849 return (EINVAL);
1850 odivisor = comspeed(t->c_ospeed, cy_clock, &oprescaler);
1851 if (odivisor < 0)
1852 return (EINVAL);
1853
1854 /* parameters are OK, convert them to the com struct and the device */
1855 s = spltty();
1856 if (odivisor == 0)
1857 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
1858 else
1859 (void)commctl(com, TIOCM_DTR, DMBIS);
1860
1861 /*
1862 * This returns with interrupts disabled so that we can complete
1863 * the speed change atomically.
1864 */
1865 (void) siosetwater(com, t->c_ispeed);
1866
1867 /* XXX we don't actually change the speed atomically. */
1868 enable_intr();
1869
1870 if (idivisor != 0) {
1871 cd_setreg(com, CD1400_RBPR, idivisor);
1872 cd_setreg(com, CD1400_RCOR, iprescaler);
1873 }
1874 if (odivisor != 0) {
1875 cd_setreg(com, CD1400_TBPR, odivisor);
1876 cd_setreg(com, CD1400_TCOR, oprescaler);
1877 }
1878
1879 /*
1880 * channel control
1881 * receiver enable
1882 * transmitter enable (always set)
1883 */
1884 cflag = t->c_cflag;
1885 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN
1886 | (cflag & CREAD ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS);
1887 if (opt != com->channel_control) {
1888 com->channel_control = opt;
1889 cd1400_channel_cmd(com, opt);
1890 }
1891
1892#ifdef Smarts
1893 /* set special chars */
1894 /* XXX if one is _POSIX_VDISABLE, can't use some others */
1895 if (t->c_cc[VSTOP] != _POSIX_VDISABLE)
1896 cd_setreg(com, CD1400_SCHR1, t->c_cc[VSTOP]);
1897 if (t->c_cc[VSTART] != _POSIX_VDISABLE)
1898 cd_setreg(com, CD1400_SCHR2, t->c_cc[VSTART]);
1899 if (t->c_cc[VINTR] != _POSIX_VDISABLE)
1900 cd_setreg(com, CD1400_SCHR3, t->c_cc[VINTR]);
1901 if (t->c_cc[VSUSP] != _POSIX_VDISABLE)
1902 cd_setreg(com, CD1400_SCHR4, t->c_cc[VSUSP]);
1903#endif
1904
1905 /*
1906 * set channel option register 1 -
1907 * parity mode
1908 * stop bits
1909 * char length
1910 */
1911 opt = 0;
1912 /* parity */
1913 if (cflag & PARENB) {
1914 if (cflag & PARODD)
1915 opt |= CD1400_COR1_PARODD;
1916 opt |= CD1400_COR1_PARNORMAL;
1917 }
1918 iflag = t->c_iflag;
1919 if (!(iflag & INPCK))
1920 opt |= CD1400_COR1_NOINPCK;
1921 bits = 1 + 1;
1922 /* stop bits */
1923 if (cflag & CSTOPB) {
1924 ++bits;
1925 opt |= CD1400_COR1_STOP2;
1926 }
1927 /* char length */
1928 switch (cflag & CSIZE) {
1929 case CS5:
1930 bits += 5;
1931 opt |= CD1400_COR1_CS5;
1932 break;
1933 case CS6:
1934 bits += 6;
1935 opt |= CD1400_COR1_CS6;
1936 break;
1937 case CS7:
1938 bits += 7;
1939 opt |= CD1400_COR1_CS7;
1940 break;
1941 default:
1942 bits += 8;
1943 opt |= CD1400_COR1_CS8;
1944 break;
1945 }
1946 cor_change = 0;
1947 if (opt != com->cor[0]) {
1948 cor_change |= CD1400_CCR_COR1;
1949 cd_setreg(com, CD1400_COR1, com->cor[0] = opt);
1950 }
1951
1952 /*
1953 * Set receive time-out period, normally to max(one char time, 5 ms).
1954 */
1955 if (t->c_ispeed == 0)
1956 itimeout = cd_getreg(com, CD1400_RTPR);
1957 else {
1958 itimeout = (1000 * bits + t->c_ispeed - 1) / t->c_ispeed;
1959#ifdef SOFT_HOTCHAR
1960#define MIN_RTP 1
1961#else
1962#define MIN_RTP 5
1963#endif
1964 if (itimeout < MIN_RTP)
1965 itimeout = MIN_RTP;
1966 }
1967 if (!(t->c_lflag & ICANON) && t->c_cc[VMIN] != 0 && t->c_cc[VTIME] != 0
1968 && t->c_cc[VTIME] * 10 > itimeout)
1969 itimeout = t->c_cc[VTIME] * 10;
1970 if (itimeout > 255)
1971 itimeout = 255;
1972 cd_setreg(com, CD1400_RTPR, itimeout);
1973
1974 /*
1975 * set channel option register 2 -
1976 * flow control
1977 */
1978 opt = 0;
1979#ifdef Smarts
1980 if (iflag & IXANY)
1981 opt |= CD1400_COR2_IXANY;
1982 if (iflag & IXOFF)
1983 opt |= CD1400_COR2_IXOFF;
1984#endif
1985#ifndef SOFT_CTS_OFLOW
1986 if (cflag & CCTS_OFLOW)
1987 opt |= CD1400_COR2_CCTS_OFLOW;
1988#endif
1989 disable_intr();
1990 if (opt != com->cor[1]) {
1991 cor_change |= CD1400_CCR_COR2;
1992 cd_setreg(com, CD1400_COR2, com->cor[1] = opt);
1993 }
1994 enable_intr();
1995
1996 /*
1997 * set channel option register 3 -
1998 * receiver FIFO interrupt threshold
1999 * flow control
2000 */
2001 opt = RxFifoThreshold;
2002#ifdef Smarts
2003 if (t->c_lflag & ICANON)
2004 opt |= CD1400_COR3_SCD34; /* detect INTR & SUSP chars */
2005 if (iflag & IXOFF)
2006 /* detect and transparently handle START and STOP chars */
2007 opt |= CD1400_COR3_FCT | CD1400_COR3_SCD12;
2008#endif
2009 if (opt != com->cor[2]) {
2010 cor_change |= CD1400_CCR_COR3;
2011 cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
2012 }
2013
2014 /* notify the CD1400 if COR1-3 have changed */
2015 if (cor_change)
2016 cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | cor_change);
2017
2018 /*
2019 * set channel option register 4 -
2020 * CR/NL processing
2021 * break processing
2022 * received exception processing
2023 */
2024 opt = 0;
2025 if (iflag & IGNCR)
2026 opt |= CD1400_COR4_IGNCR;
2027#ifdef Smarts
2028 /*
2029 * we need a new ttyinput() for this, as we don't want to
2030 * have ICRNL && INLCR being done in both layers, or to have
2031 * synchronisation problems
2032 */
2033 if (iflag & ICRNL)
2034 opt |= CD1400_COR4_ICRNL;
2035 if (iflag & INLCR)
2036 opt |= CD1400_COR4_INLCR;
2037#endif
2038 if (iflag & IGNBRK)
2039 opt |= CD1400_COR4_IGNBRK | CD1400_COR4_NOBRKINT;
2040 /*
2041 * The `-ignbrk -brkint parmrk' case is not handled by the hardware,
2042 * so only tell the hardware about -brkint if -parmrk.
2043 */
2044 if (!(iflag & (BRKINT | PARMRK)))
2045 opt |= CD1400_COR4_NOBRKINT;
2046#if 0
2047 /* XXX using this "intelligence" breaks reporting of overruns. */
2048 if (iflag & IGNPAR)
2049 opt |= CD1400_COR4_PFO_DISCARD;
2050 else {
2051 if (iflag & PARMRK)
2052 opt |= CD1400_COR4_PFO_ESC;
2053 else
2054 opt |= CD1400_COR4_PFO_NUL;
2055 }
2056#else
2057 opt |= CD1400_COR4_PFO_EXCEPTION;
2058#endif
2059 cd_setreg(com, CD1400_COR4, opt);
2060
2061 /*
2062 * set channel option register 5 -
2063 */
2064 opt = 0;
2065 if (iflag & ISTRIP)
2066 opt |= CD1400_COR5_ISTRIP;
2067 if (t->c_iflag & IEXTEN)
2068 /* enable LNEXT (e.g. ctrl-v quoting) handling */
2069 opt |= CD1400_COR5_LNEXT;
2070#ifdef Smarts
2071 if (t->c_oflag & ONLCR)
2072 opt |= CD1400_COR5_ONLCR;
2073 if (t->c_oflag & OCRNL)
2074 opt |= CD1400_COR5_OCRNL;
2075#endif
2076 cd_setreg(com, CD1400_COR5, opt);
2077
2078 /*
2079 * We always generate modem status change interrupts for CD changes.
2080 * Among other things, this is necessary to track TS_CARR_ON for
2081 * pstat to print even when the driver doesn't care. CD changes
2082 * should be rare so interrupts for them are not worth extra code to
2083 * avoid. We avoid interrupts for other modem status changes (except
2084 * for CTS changes when SOFT_CTS_OFLOW is configured) since this is
2085 * simplest and best.
2086 */
2087
2088 /*
2089 * set modem change option register 1
2090 * generate modem interrupts on which 1 -> 0 input transitions
2091 * also controls auto-DTR output flow-control, which we don't use
2092 */
2093 opt = CD1400_MCOR1_CDzd;
2094#ifdef SOFT_CTS_OFLOW
2095 if (cflag & CCTS_OFLOW)
2096 opt |= CD1400_MCOR1_CTSzd;
2097#endif
2098 cd_setreg(com, CD1400_MCOR1, opt);
2099
2100 /*
2101 * set modem change option register 2
2102 * generate modem interrupts on specific 0 -> 1 input transitions
2103 */
2104 opt = CD1400_MCOR2_CDod;
2105#ifdef SOFT_CTS_OFLOW
2106 if (cflag & CCTS_OFLOW)
2107 opt |= CD1400_MCOR2_CTSod;
2108#endif
2109 cd_setreg(com, CD1400_MCOR2, opt);
2110
2111 /*
2112 * XXX should have done this long ago, but there is too much state
2113 * to change all atomically.
2114 */
2115 disable_intr();
2116
2117 com->state &= ~CS_TTGO;
2118 if (!(tp->t_state & TS_TTSTOP))
2119 com->state |= CS_TTGO;
2120 if (cflag & CRTS_IFLOW) {
2121 com->state |= CS_RTS_IFLOW;
2122 /*
2123 * If CS_RTS_IFLOW just changed from off to on, the change
2124 * needs to be propagated to MCR_RTS. This isn't urgent,
2125 * so do it later by calling comstart() instead of repeating
2126 * a lot of code from comstart() here.
2127 */
2128 } else if (com->state & CS_RTS_IFLOW) {
2129 com->state &= ~CS_RTS_IFLOW;
2130 /*
2131 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2132 * on here, since comstart() won't do it later.
2133 */
2134#if 0
2135 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2136#else
2137 cd_setreg(com, com->mcr_rts_reg,
2138 com->mcr_image |= com->mcr_rts);
2139#endif
2140 }
2141
2142 /*
2143 * Set up state to handle output flow control.
2144 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2145 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2146 */
2147 com->state |= CS_ODEVREADY;
2148#ifdef SOFT_CTS_OFLOW
2149 com->state &= ~CS_CTS_OFLOW;
2150 if (cflag & CCTS_OFLOW) {
2151 com->state |= CS_CTS_OFLOW;
2152 if (!(com->last_modem_status & MSR_CTS))
2153 com->state &= ~CS_ODEVREADY;
2154 }
2155#endif
2156 /* XXX shouldn't call functions while intrs are disabled. */
2157 disc_optim(tp, t, com);
2158#if 0
2159 /*
2160 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2161 * unconditionally, but that defeated the careful discarding of
2162 * stale input in sioopen().
2163 */
2164 if (com->state >= (CS_BUSY | CS_TTGO))
2165 siointr1(com);
2166#endif
2167 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
2168 if (!(com->intr_enable & CD1400_SRER_TXRDY))
2169 cd_setreg(com, CD1400_SRER,
2170 com->intr_enable
2171 = (com->intr_enable & ~CD1400_SRER_TXMPTY)
2172 | CD1400_SRER_TXRDY);
2173 } else {
2174 if (com->intr_enable & CD1400_SRER_TXRDY)
2175 cd_setreg(com, CD1400_SRER,
2176 com->intr_enable
2177 = (com->intr_enable & ~CD1400_SRER_TXRDY)
2178 | CD1400_SRER_TXMPTY);
2179 }
2180
2181 enable_intr();
2182 splx(s);
2183 comstart(tp);
2184 if (com->ibufold != NULL) {
2185 free(com->ibufold, M_DEVBUF);
2186 com->ibufold = NULL;
2187 }
2188 return (0);
2189}
2190
2191static int
2192siosetwater(com, speed)
2193 struct com_s *com;
2194 speed_t speed;
2195{
2196 int cp4ticks;
2197 u_char *ibuf;
2198 int ibufsize;
2199 struct tty *tp;
2200
2201 /*
2202 * Make the buffer size large enough to handle a softtty interrupt
2203 * latency of about 2 ticks without loss of throughput or data
2204 * (about 3 ticks if input flow control is not used or not honoured,
2205 * but a bit less for CS5-CS7 modes).
2206 */
2207 cp4ticks = speed / 10 / hz * 4;
2208 for (ibufsize = 128; ibufsize < cp4ticks;)
2209 ibufsize <<= 1;
2210 if (ibufsize == com->ibufsize) {
2211 disable_intr();
2212 return (0);
2213 }
2214
2215 /*
2216 * Allocate input buffer. The extra factor of 2 in the size is
2217 * to allow for an error byte for each input byte.
2218 */
2219 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2220 if (ibuf == NULL) {
2221 disable_intr();
2222 return (ENOMEM);
2223 }
2224
2225 /* Initialize non-critical variables. */
2226 com->ibufold = com->ibuf;
2227 com->ibufsize = ibufsize;
2228 tp = com->tp;
2229 if (tp != NULL) {
2230 tp->t_ififosize = 2 * ibufsize;
2231 tp->t_ispeedwat = (speed_t)-1;
2232 tp->t_ospeedwat = (speed_t)-1;
2233 }
2234
2235 /*
2236 * Read current input buffer, if any. Continue with interrupts
2237 * disabled.
2238 */
2239 disable_intr();
2240 if (com->iptr != com->ibuf)
2241 sioinput(com);
2242
2243 /*-
2244 * Initialize critical variables, including input buffer watermarks.
2245 * The external device is asked to stop sending when the buffer
2246 * exactly reaches high water, or when the high level requests it.
2247 * The high level is notified immediately (rather than at a later
2248 * clock tick) when this watermark is reached.
2249 * The buffer size is chosen so the watermark should almost never
2250 * be reached.
2251 * The low watermark is invisibly 0 since the buffer is always
2252 * emptied all at once.
2253 */
2254 com->iptr = com->ibuf = ibuf;
2255 com->ibufend = ibuf + ibufsize;
2256 com->ierroff = ibufsize;
2257 com->ihighwater = ibuf + 3 * ibufsize / 4;
2258 return (0);
2259}
2260
2261static void
2262comstart(tp)
2263 struct tty *tp;
2264{
2265 struct com_s *com;
2266 int s;
2267#ifdef CyDebug
2268 bool_t started;
2269#endif
2270 int unit;
2271
2272 unit = DEV_TO_UNIT(tp->t_dev);
2273 com = com_addr(unit);
2274 s = spltty();
2275
2276#ifdef CyDebug
2277 ++com->start_count;
2278 started = FALSE;
2279#endif
2280
2281 disable_intr();
2282 if (tp->t_state & TS_TTSTOP) {
2283 com->state &= ~CS_TTGO;
2284 if (com->intr_enable & CD1400_SRER_TXRDY)
2285 cd_setreg(com, CD1400_SRER,
2286 com->intr_enable
2287 = (com->intr_enable & ~CD1400_SRER_TXRDY)
2288 | CD1400_SRER_TXMPTY);
2289 } else {
2290 com->state |= CS_TTGO;
2291 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)
2292 && !(com->intr_enable & CD1400_SRER_TXRDY))
2293 cd_setreg(com, CD1400_SRER,
2294 com->intr_enable
2295 = (com->intr_enable & ~CD1400_SRER_TXMPTY)
2296 | CD1400_SRER_TXRDY);
2297 }
2298 if (tp->t_state & TS_TBLOCK) {
2299 if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
2300#if 0
2301 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2302#else
2303 cd_setreg(com, com->mcr_rts_reg,
2304 com->mcr_image &= ~com->mcr_rts);
2305#endif
2306 } else {
2307 if (!(com->mcr_image & com->mcr_rts)
2308 && com->iptr < com->ihighwater
2309 && com->state & CS_RTS_IFLOW)
2310#if 0
2311 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2312#else
2313 cd_setreg(com, com->mcr_rts_reg,
2314 com->mcr_image |= com->mcr_rts);
2315#endif
2316 }
2317 enable_intr();
2318 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2319 ttwwakeup(tp);
2320 splx(s);
2321 return;
2322 }
2323 if (tp->t_outq.c_cc != 0) {
2324 struct lbq *qp;
2325 struct lbq *next;
2326
2327 if (!com->obufs[0].l_queued) {
2328#ifdef CyDebug
2329 started = TRUE;
2330#endif
2331 com->obufs[0].l_tail
2332 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2333 sizeof com->obuf1);
2334 com->obufs[0].l_next = NULL;
2335 com->obufs[0].l_queued = TRUE;
2336 disable_intr();
2337 if (com->state & CS_BUSY) {
2338 qp = com->obufq.l_next;
2339 while ((next = qp->l_next) != NULL)
2340 qp = next;
2341 qp->l_next = &com->obufs[0];
2342 } else {
2343 com->obufq.l_head = com->obufs[0].l_head;
2344 com->obufq.l_tail = com->obufs[0].l_tail;
2345 com->obufq.l_next = &com->obufs[0];
2346 com->state |= CS_BUSY;
2347 if (com->state >= (CS_BUSY | CS_TTGO
2348 | CS_ODEVREADY))
2349 cd_setreg(com, CD1400_SRER,
2350 com->intr_enable
2351 = (com->intr_enable
2352 & ~CD1400_SRER_TXMPTY)
2353 | CD1400_SRER_TXRDY);
2354 }
2355 enable_intr();
2356 }
2357 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2358#ifdef CyDebug
2359 started = TRUE;
2360#endif
2361 com->obufs[1].l_tail
2362 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2363 sizeof com->obuf2);
2364 com->obufs[1].l_next = NULL;
2365 com->obufs[1].l_queued = TRUE;
2366 disable_intr();
2367 if (com->state & CS_BUSY) {
2368 qp = com->obufq.l_next;
2369 while ((next = qp->l_next) != NULL)
2370 qp = next;
2371 qp->l_next = &com->obufs[1];
2372 } else {
2373 com->obufq.l_head = com->obufs[1].l_head;
2374 com->obufq.l_tail = com->obufs[1].l_tail;
2375 com->obufq.l_next = &com->obufs[1];
2376 com->state |= CS_BUSY;
2377 if (com->state >= (CS_BUSY | CS_TTGO
2378 | CS_ODEVREADY))
2379 cd_setreg(com, CD1400_SRER,
2380 com->intr_enable
2381 = (com->intr_enable
2382 & ~CD1400_SRER_TXMPTY)
2383 | CD1400_SRER_TXRDY);
2384 }
2385 enable_intr();
2386 }
2387 tp->t_state |= TS_BUSY;
2388 }
2389#ifdef CyDebug
2390 if (started)
2391 ++com->start_real;
2392#endif
2393#if 0
2394 disable_intr();
2395 if (com->state >= (CS_BUSY | CS_TTGO))
2396 siointr1(com); /* fake interrupt to start output */
2397 enable_intr();
2398#endif
2399 ttwwakeup(tp);
2400 splx(s);
2401}
2402
2403static void
2404comstop(tp, rw)
2405 struct tty *tp;
2406 int rw;
2407{
2408 struct com_s *com;
2409 bool_t wakeup_etc;
2410
2411 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2412 wakeup_etc = FALSE;
2413 disable_intr();
2414 if (rw & FWRITE) {
2415 com->obufs[0].l_queued = FALSE;
2416 com->obufs[1].l_queued = FALSE;
2417 if (com->extra_state & CSE_ODONE) {
2418 com_events -= LOTS_OF_EVENTS;
2419 com->extra_state &= ~CSE_ODONE;
2420 if (com->etc != ETC_NONE) {
2421 if (com->etc == ETC_BREAK_ENDED)
2422 com->etc = ETC_NONE;
2423 wakeup_etc = TRUE;
2424 }
2425 }
2426 com->tp->t_state &= ~TS_BUSY;
2427 if (com->state & CS_ODONE)
2428 com_events -= LOTS_OF_EVENTS;
2429 com->state &= ~(CS_ODONE | CS_BUSY);
2430 }
2431 if (rw & FREAD) {
2432 /* XXX no way to reset only input fifo. */
2433 com_events -= (com->iptr - com->ibuf);
2434 com->iptr = com->ibuf;
2435 }
2436 enable_intr();
2437 if (wakeup_etc)
2438 wakeup(&com->etc);
2439 if (rw & FWRITE && com->etc == ETC_NONE)
2440 cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
2441 comstart(tp);
2442}
2443
2444static int
2445commctl(com, bits, how)
2446 struct com_s *com;
2447 int bits;
2448 int how;
2449{
2450 int mcr;
2451 int msr;
2452
2453 if (how == DMGET) {
2454 if (com->channel_control & CD1400_CCR_RCVEN)
2455 bits |= TIOCM_LE;
2456 mcr = com->mcr_image;
2457 if (mcr & com->mcr_dtr)
2458 bits |= TIOCM_DTR;
2459 if (mcr & com->mcr_rts)
2460 /* XXX wired on for Cyclom-8Ys */
2461 bits |= TIOCM_RTS;
2462
2463 /*
2464 * We must read the modem status from the hardware because
2465 * we don't generate modem status change interrupts for all
2466 * changes, so com->prev_modem_status is not guaranteed to
2467 * be up to date. This is safe, unlike for sio, because
2468 * reading the status register doesn't clear pending modem
2469 * status change interrupts.
2470 */
2471 msr = cd_getreg(com, CD1400_MSVR2);
2472
2473 if (msr & MSR_CTS)
2474 bits |= TIOCM_CTS;
2475 if (msr & MSR_DCD)
2476 bits |= TIOCM_CD;
2477 if (msr & MSR_DSR)
2478 bits |= TIOCM_DSR;
2479 if (msr & MSR_RI)
2480 /* XXX not connected except for Cyclom-16Y? */
2481 bits |= TIOCM_RI;
2482 return (bits);
2483 }
2484 mcr = 0;
2485 if (bits & TIOCM_DTR)
2486 mcr |= com->mcr_dtr;
2487 if (bits & TIOCM_RTS)
2488 mcr |= com->mcr_rts;
2489 disable_intr();
2490 switch (how) {
2491 case DMSET:
2492 com->mcr_image = mcr;
2493 cd_setreg(com, CD1400_MSVR1, mcr);
2494 cd_setreg(com, CD1400_MSVR2, mcr);
2495 break;
2496 case DMBIS:
2497 com->mcr_image = mcr = com->mcr_image | mcr;
2498 cd_setreg(com, CD1400_MSVR1, mcr);
2499 cd_setreg(com, CD1400_MSVR2, mcr);
2500 break;
2501 case DMBIC:
2502 com->mcr_image = mcr = com->mcr_image & ~mcr;
2503 cd_setreg(com, CD1400_MSVR1, mcr);
2504 cd_setreg(com, CD1400_MSVR2, mcr);
2505 break;
2506 }
2507 enable_intr();
2508 return (0);
2509}
2510
2511static void
2512siosettimeout()
2513{
2514 struct com_s *com;
2515 bool_t someopen;
2516 int unit;
2517
2518 /*
2519 * Set our timeout period to 1 second if no polled devices are open.
2520 * Otherwise set it to max(1/200, 1/hz).
2521 * Enable timeouts iff some device is open.
2522 */
2523 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2524 sio_timeout = hz;
2525 someopen = FALSE;
2526 for (unit = 0; unit < NSIO; ++unit) {
2527 com = com_addr(unit);
2528 if (com != NULL && com->tp != NULL
2529 && com->tp->t_state & TS_ISOPEN) {
2530 someopen = TRUE;
2531#if 0
2532 if (com->poll || com->poll_output) {
2533 sio_timeout = hz > 200 ? hz / 200 : 1;
2534 break;
2535 }
2536#endif
2537 }
2538 }
2539 if (someopen) {
2540 sio_timeouts_until_log = hz / sio_timeout;
2541 sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2542 sio_timeout);
2543 } else {
2544 /* Flush error messages, if any. */
2545 sio_timeouts_until_log = 1;
2546 comwakeup((void *)NULL);
2547 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2548 }
2549}
2550
2551static void
2552comwakeup(chan)
2553 void *chan;
2554{
2555 struct com_s *com;
2556 int unit;
2557
2558 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2559
2560#if 0
2561 /*
2562 * Recover from lost output interrupts.
2563 * Poll any lines that don't use interrupts.
2564 */
2565 for (unit = 0; unit < NSIO; ++unit) {
2566 com = com_addr(unit);
2567 if (com != NULL
2568 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2569 disable_intr();
2570 siointr1(com);
2571 enable_intr();
2572 }
2573 }
2574#endif
2575
2576 /*
2577 * Check for and log errors, but not too often.
2578 */
2579 if (--sio_timeouts_until_log > 0)
2580 return;
2581 sio_timeouts_until_log = hz / sio_timeout;
2582 for (unit = 0; unit < NSIO; ++unit) {
2583 int errnum;
2584
2585 com = com_addr(unit);
2586 if (com == NULL)
2587 continue;
2588 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2589 u_int delta;
2590 u_long total;
2591
2592 disable_intr();
2593 delta = com->delta_error_counts[errnum];
2594 com->delta_error_counts[errnum] = 0;
2595 enable_intr();
2596 if (delta == 0)
2597 continue;
2598 total = com->error_counts[errnum] += delta;
2599 log(LOG_ERR, "cy%d: %u more %s%s (total %lu)\n",
2600 unit, delta, error_desc[errnum],
2601 delta == 1 ? "" : "s", total);
2602 }
2603 }
2604}
2605
2606static void
2607disc_optim(tp, t, com)
2608 struct tty *tp;
2609 struct termios *t;
2610 struct com_s *com;
2611{
2612#ifndef SOFT_HOTCHAR
2613 u_char opt;
2614#endif
2615
2616 /*
2617 * XXX can skip a lot more cases if Smarts. Maybe
2618 * (IGNCR | ISTRIP | IXON) in c_iflag. But perhaps we
2619 * shouldn't skip if (TS_CNTTB | TS_LNCH) is set in t_state.
2620 */
2621 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2622 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2623 && (!(t->c_iflag & PARMRK)
2624 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2625 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2626 && linesw[tp->t_line].l_rint == ttyinput)
2627 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2628 else
2629 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2630 com->hotchar = linesw[tp->t_line].l_hotchar;
2631#ifndef SOFT_HOTCHAR
2632 opt = com->cor[2] & ~CD1400_COR3_SCD34;
2633 if (com->hotchar != 0) {
2634 cd_setreg(com, CD1400_SCHR3, com->hotchar);
2635 cd_setreg(com, CD1400_SCHR4, com->hotchar);
2636 opt |= CD1400_COR3_SCD34;
2637 }
2638 if (opt != com->cor[2]) {
2639 cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
2640 cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
2641 }
2642#endif
2643}
2644
2645#ifdef Smarts
2646/* standard line discipline input routine */
2647int
2648cyinput(c, tp)
2649 int c;
2650 struct tty *tp;
2651{
2652 /* XXX duplicate ttyinput(), but without the IXOFF/IXON/ISTRIP/IPARMRK
2653 * bits, as they are done by the CD1400. Hardly worth the effort,
2654 * given that high-throughput sessions are raw anyhow.
2655 */
2656}
2657#endif /* Smarts */
2658
2659static int
2660comspeed(speed, cy_clock, prescaler_io)
2661 speed_t speed;
2662 u_long cy_clock;
2663 int *prescaler_io;
2664{
2665 int actual;
2666 int error;
2667 int divider;
2668 int prescaler;
2669 int prescaler_unit;
2670
2671 if (speed == 0)
2672 return (0);
2673 if (speed < 0 || speed > 150000)
2674 return (-1);
2675
2676 /* determine which prescaler to use */
2677 for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
2678 prescaler_unit--, prescaler >>= 2) {
2679 if (cy_clock / prescaler / speed > 63)
2680 break;
2681 }
2682
2683 divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
2684 if (divider > 255)
2685 divider = 255;
2686 actual = cy_clock/prescaler/divider;
2687
2688 /* 10 times error in percent: */
2689 error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
2690
2691 /* 3.0% max error tolerance */
2692 if (error < -30 || error > 30)
2693 return (-1);
2694
2695#if 0
2696 printf("prescaler = %d (%d)\n", prescaler, prescaler_unit);
2697 printf("divider = %d (%x)\n", divider, divider);
2698 printf("actual = %d\n", actual);
2699 printf("error = %d\n", error);
2700#endif
2701
2702 *prescaler_io = prescaler_unit;
2703 return (divider);
2704}
2705
2706static void
2707cd1400_channel_cmd(com, cmd)
2708 struct com_s *com;
2709 int cmd;
2710{
2711 cd1400_channel_cmd_wait(com);
2712 cd_setreg(com, CD1400_CCR, cmd);
2713 cd1400_channel_cmd_wait(com);
2714}
2715
2716static void
2717cd1400_channel_cmd_wait(com)
2718 struct com_s *com;
2719{
2720 struct timeval start;
2721 struct timeval tv;
2722 long usec;
2723
2724 if (cd_getreg(com, CD1400_CCR) == 0)
2725 return;
2726 microtime(&start);
2727 for (;;) {
2728 if (cd_getreg(com, CD1400_CCR) == 0)
2729 return;
2730 microtime(&tv);
2731 usec = 1000000 * (tv.tv_sec - start.tv_sec) +
2732 tv.tv_usec - start.tv_usec;
2733 if (usec >= 5000) {
2734 log(LOG_ERR,
2735 "cy%d: channel command timeout (%ld usec)\n",
2736 com->unit, usec);
2737 return;
2738 }
2739 }
2740}
2741
2742static void
2743cd_etc(com, etc)
2744 struct com_s *com;
2745 int etc;
2746{
2747 /*
2748 * We can't change the hardware's ETC state while there are any
2749 * characters in the tx fifo, since those characters would be
2750 * interpreted as commands! Unputting characters from the fifo
2751 * is difficult, so we wait up to 12 character times for the fifo
2752 * to drain. The command will be delayed for up to 2 character
2753 * times for the tx to become empty. Unputting characters from
2754 * the tx holding and shift registers is impossible, so we wait
2755 * for the tx to become empty so that the command is sure to be
2756 * executed soon after we issue it.
2757 */
2758 disable_intr();
2759 if (com->etc == etc) {
2760 enable_intr();
2761 goto wait;
2762 }
2763 if ((etc == CD1400_ETC_SENDBREAK
2764 && (com->etc == ETC_BREAK_STARTING
2765 || com->etc == ETC_BREAK_STARTED))
2766 || (etc == CD1400_ETC_STOPBREAK
2767 && (com->etc == ETC_BREAK_ENDING || com->etc == ETC_BREAK_ENDED
2768 || com->etc == ETC_NONE))) {
2769 enable_intr();
2770 return;
2771 }
2772 com->etc = etc;
2773 cd_setreg(com, CD1400_SRER,
2774 com->intr_enable
2775 = (com->intr_enable & ~CD1400_SRER_TXRDY) | CD1400_SRER_TXMPTY);
2776 enable_intr();
2777wait:
2778 while (com->etc == etc
2779 && tsleep(&com->etc, TTIPRI | PCATCH, "cyetc", 0) == 0)
2780 continue;
2781}
2782
2783static int
2784cd_getreg(com, reg)
2785 struct com_s *com;
2786 int reg;
2787{
2788 struct com_s *basecom;
2789 u_char car;
2790 int cy_align;
2791 u_long ef;
2792 cy_addr iobase;
2793 int val;
2794
2795 basecom = com_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
2796 car = com->unit & CD1400_CAR_CHAN;
2797 cy_align = com->cy_align;
2798 iobase = com->iobase;
2799 ef = read_eflags();
2800 if (ef & PSL_I)
2801 disable_intr();
2802 if (basecom->car != car)
2803 cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
2804 val = cd_inb(iobase, reg, cy_align);
2805 if (ef & PSL_I)
2806 enable_intr();
2807 return (val);
2808}
2809
2810static void
2811cd_setreg(com, reg, val)
2812 struct com_s *com;
2813 int reg;
2814 int val;
2815{
2816 struct com_s *basecom;
2817 u_char car;
2818 int cy_align;
2819 u_long ef;
2820 cy_addr iobase;
2821
2822 basecom = com_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
2823 car = com->unit & CD1400_CAR_CHAN;
2824 cy_align = com->cy_align;
2825 iobase = com->iobase;
2826 ef = read_eflags();
2827 if (ef & PSL_I)
2828 disable_intr();
2829 if (basecom->car != car)
2830 cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
2831 cd_outb(iobase, reg, cy_align, val);
2832 if (ef & PSL_I)
2833 enable_intr();
2834}
2835
2836#ifdef CyDebug
2837/* useful in ddb */
2838void
2839cystatus(unit)
2840 int unit;
2841{
2842 struct com_s *com;
2843 cy_addr iobase;
2844 u_int ocount;
2845 struct tty *tp;
2846
2847 com = com_addr(unit);
2848 printf("info for channel %d\n", unit);
2849 printf("------------------\n");
2850 printf("total cyclom service probes:\t%d\n", cy_svrr_probes);
2851 printf("calls to upper layer:\t\t%d\n", cy_timeouts);
2852 if (com == NULL)
2853 return;
2854 iobase = com->iobase;
2855 printf("\n");
2856 printf("cd1400 base address:\\tt%p\n", iobase);
2857 printf("saved channel_control:\t\t0x%02x\n", com->channel_control);
2858 printf("saved cor1-3:\t\t\t0x%02x 0x%02x 0x%02x\n",
2859 com->cor[0], com->cor[1], com->cor[2]);
2860 printf("service request enable reg:\t0x%02x (0x%02x cached)\n",
2861 cd_getreg(com, CD1400_SRER), com->intr_enable);
2862 printf("service request register:\t0x%02x\n",
2863 cd_inb(iobase, CD1400_SVRR, com->cy_align));
2864 printf("modem status:\t\t\t0x%02x (0x%02x cached)\n",
2865 cd_getreg(com, CD1400_MSVR2), com->prev_modem_status);
2866 printf("rx/tx/mdm interrupt registers:\t0x%02x 0x%02x 0x%02x\n",
2867 cd_inb(iobase, CD1400_RIR, com->cy_align),
2868 cd_inb(iobase, CD1400_TIR, com->cy_align),
2869 cd_inb(iobase, CD1400_MIR, com->cy_align));
2870 printf("\n");
2871 printf("com state:\t\t\t0x%02x\n", com->state);
2872 printf("calls to comstart():\t\t%d (%d useful)\n",
2873 com->start_count, com->start_real);
2874 printf("rx buffer chars free:\t\t%d\n", com->iptr - com->ibuf);
2875 ocount = 0;
2876 if (com->obufs[0].l_queued)
2877 ocount += com->obufs[0].l_tail - com->obufs[0].l_head;
2878 if (com->obufs[1].l_queued)
2879 ocount += com->obufs[1].l_tail - com->obufs[1].l_head;
2880 printf("tx buffer chars:\t\t%u\n", ocount);
2881 printf("received chars:\t\t\t%d\n", com->bytes_in);
2882 printf("received exceptions:\t\t%d\n", com->recv_exception);
2883 printf("modem signal deltas:\t\t%d\n", com->mdm);
2884 printf("transmitted chars:\t\t%d\n", com->bytes_out);
2885 printf("\n");
2886 tp = com->tp;
2887 if (tp != NULL) {
2888 printf("tty state:\t\t\t0x%08x\n", tp->t_state);
2889 printf(
2890 "upper layer queue lengths:\t%d raw, %d canon, %d output\n",
2891 tp->t_rawq.c_cc, tp->t_canq.c_cc, tp->t_outq.c_cc);
2892 } else
2893 printf("tty state:\t\t\tclosed\n");
2894}
2895#endif /* CyDebug */