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[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
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MD
1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 */
40
41#include "apm.h"
42#include "ether.h"
43#include "npx.h"
44#include "opt_atalk.h"
45#include "opt_compat.h"
46#include "opt_cpu.h"
47#include "opt_ddb.h"
48#include "opt_directio.h"
49#include "opt_inet.h"
50#include "opt_ipx.h"
51#include "opt_maxmem.h"
52#include "opt_msgbuf.h"
53#include "opt_perfmon.h"
54#include "opt_swap.h"
55#include "opt_user_ldt.h"
56#include "opt_userconfig.h"
57
58#include <sys/param.h>
59#include <sys/systm.h>
60#include <sys/sysproto.h>
61#include <sys/signalvar.h>
62#include <sys/kernel.h>
63#include <sys/linker.h>
64#include <sys/malloc.h>
65#include <sys/proc.h>
66#include <sys/buf.h>
67#include <sys/reboot.h>
68#include <sys/callout.h>
69#include <sys/mbuf.h>
70#include <sys/msgbuf.h>
71#include <sys/sysent.h>
72#include <sys/sysctl.h>
73#include <sys/vmmeter.h>
74#include <sys/bus.h>
75
76#include <vm/vm.h>
77#include <vm/vm_param.h>
78#include <sys/lock.h>
79#include <vm/vm_kern.h>
80#include <vm/vm_object.h>
81#include <vm/vm_page.h>
82#include <vm/vm_map.h>
83#include <vm/vm_pager.h>
84#include <vm/vm_extern.h>
85
86#include <sys/user.h>
87#include <sys/exec.h>
88#include <sys/cons.h>
89
90#include <ddb/ddb.h>
91
92#include <net/netisr.h>
93
94#include <machine/cpu.h>
95#include <machine/reg.h>
96#include <machine/clock.h>
97#include <machine/specialreg.h>
98#include <machine/bootinfo.h>
99#include <machine/ipl.h>
100#include <machine/md_var.h>
101#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
102#ifdef SMP
103#include <machine/smp.h>
104#include <machine/globaldata.h>
105#endif
106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
112#include <i386/isa/isa_device.h>
113#endif
114#include <i386/isa/intr_machdep.h>
115#include <isa/rtc.h>
116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
121extern void init386 __P((int first));
122extern void dblfault_handler __P((void));
123
124extern void printcpuinfo(void); /* XXX header file */
125extern void finishidentcpu(void);
126extern void panicifcpuunsupported(void);
127extern void initializecpu(void);
128
129static void cpu_startup __P((void *));
130#ifdef CPU_ENABLE_SSE
131static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
132static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
133#endif /* CPU_ENABLE_SSE */
134#ifdef DIRECTIO
135extern void ffs_rawread_setup(void);
136#endif /* DIRECTIO */
137
138SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
139
140static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
141
142int _udatasel, _ucodesel;
143u_int atdevbase;
144
145#if defined(SWTCH_OPTIM_STATS)
146extern int swtch_optim_stats;
147SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
148 CTLFLAG_RD, &swtch_optim_stats, 0, "");
149SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
150 CTLFLAG_RD, &tlb_flush_count, 0, "");
151#endif
152
153#ifdef PC98
154static int ispc98 = 1;
155#else
156static int ispc98 = 0;
157#endif
158SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
159
160int physmem = 0;
161int cold = 1;
162
163static int
164sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
165{
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
167 return (error);
168}
169
170SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
172
173static int
174sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
175{
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - cnt.v_wire_count), req);
178 return (error);
179}
180
181SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
183
184static int
185sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
186{
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
189 return (error);
190}
191
192SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
194
195static int
196sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
197{
198 int error;
199
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
202 */
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
209 }
210 return(error);
211}
212
213SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
215
216static int msgbuf_clear;
217
218static int
219sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
220{
221 int error;
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
223 req);
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
228 msgbuf_clear=0;
229 }
230 return (error);
231}
232
233SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
236
237int bootverbose = 0, Maxmem = 0;
238long dumplo;
239
240vm_offset_t phys_avail[10];
241
242/* must be 2 less so 0 0 can signal end of chunks */
243#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
244
245static vm_offset_t buffer_sva, buffer_eva;
246vm_offset_t clean_sva, clean_eva;
247static vm_offset_t pager_sva, pager_eva;
248static struct trapframe proc0_tf;
249
250static void
251cpu_startup(dummy)
252 void *dummy;
253{
254 register unsigned i;
255 register caddr_t v;
256 vm_offset_t maxaddr;
257 vm_size_t size = 0;
258 int firstaddr;
259 vm_offset_t minaddr;
260
261 if (boothowto & RB_VERBOSE)
262 bootverbose++;
263
264 /*
265 * Good {morning,afternoon,evening,night}.
266 */
267 printf("%s", version);
268 startrtclock();
269 printcpuinfo();
270 panicifcpuunsupported();
271#ifdef PERFMON
272 perfmon_init();
273#endif
274 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
275 /*
276 * Display any holes after the first chunk of extended memory.
277 */
278 if (bootverbose) {
279 int indx;
280
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
283 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
284
285 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
286 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
287 size1 / PAGE_SIZE);
288 }
289 }
290
291 /*
292 * Calculate callout wheel size
293 */
294 for (callwheelsize = 1, callwheelbits = 0;
295 callwheelsize < ncallout;
296 callwheelsize <<= 1, ++callwheelbits)
297 ;
298 callwheelmask = callwheelsize - 1;
299
300 /*
301 * Allocate space for system data structures.
302 * The first available kernel virtual address is in "v".
303 * As pages of kernel virtual memory are allocated, "v" is incremented.
304 * As pages of memory are allocated and cleared,
305 * "firstaddr" is incremented.
306 * An index into the kernel page table corresponding to the
307 * virtual memory address maintained in "v" is kept in "mapaddr".
308 */
309
310 /*
311 * Make two passes. The first pass calculates how much memory is
312 * needed and allocates it. The second pass assigns virtual
313 * addresses to the various data structures.
314 */
315 firstaddr = 0;
316again:
317 v = (caddr_t)firstaddr;
318
319#define valloc(name, type, num) \
320 (name) = (type *)v; v = (caddr_t)((name)+(num))
321#define valloclim(name, type, num, lim) \
322 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
323
324 valloc(callout, struct callout, ncallout);
325 valloc(callwheel, struct callout_tailq, callwheelsize);
326
327 /*
328 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
329 * For the first 64MB of ram nominally allocate sufficient buffers to
330 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
331 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
332 * the buffer cache we limit the eventual kva reservation to
333 * maxbcache bytes.
334 *
335 * factor represents the 1/4 x ram conversion.
336 */
337 if (nbuf == 0) {
338 int factor = 4 * BKVASIZE / 1024;
339 int kbytes = physmem * (PAGE_SIZE / 1024);
340
341 nbuf = 50;
342 if (kbytes > 4096)
343 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
344 if (kbytes > 65536)
345 nbuf += (kbytes - 65536) * 2 / (factor * 5);
346 if (maxbcache && nbuf > maxbcache / BKVASIZE)
347 nbuf = maxbcache / BKVASIZE;
348 }
349
350 /*
351 * Do not allow the buffer_map to be more then 1/2 the size of the
352 * kernel_map.
353 */
354 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
355 (BKVASIZE * 2)) {
356 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
357 (BKVASIZE * 2);
358 printf("Warning: nbufs capped at %d\n", nbuf);
359 }
360
361 nswbuf = max(min(nbuf/4, 256), 16);
362#ifdef NSWBUF_MIN
363 if (nswbuf < NSWBUF_MIN)
364 nswbuf = NSWBUF_MIN;
365#endif
366#ifdef DIRECTIO
367 ffs_rawread_setup();
368#endif
369
370 valloc(swbuf, struct buf, nswbuf);
371 valloc(buf, struct buf, nbuf);
372 v = bufhashinit(v);
373
374 /*
375 * End of first pass, size has been calculated so allocate memory
376 */
377 if (firstaddr == 0) {
378 size = (vm_size_t)(v - firstaddr);
379 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
380 if (firstaddr == 0)
381 panic("startup: no room for tables");
382 goto again;
383 }
384
385 /*
386 * End of second pass, addresses have been assigned
387 */
388 if ((vm_size_t)(v - firstaddr) != size)
389 panic("startup: table size inconsistency");
390
391 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
392 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
393 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
394 (nbuf*BKVASIZE));
395 buffer_map->system_map = 1;
396 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
397 (nswbuf*MAXPHYS) + pager_map_size);
398 pager_map->system_map = 1;
399 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
400 (16*(ARG_MAX+(PAGE_SIZE*3))));
401
402 /*
403 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
404 * we use the more space efficient malloc in place of kmem_alloc.
405 */
406 {
407 vm_offset_t mb_map_size;
408
409 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
410 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
411 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
412 bzero(mclrefcnt, mb_map_size / MCLBYTES);
413 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
414 mb_map_size);
415 mb_map->system_map = 1;
416 }
417
418 /*
419 * Initialize callouts
420 */
421 SLIST_INIT(&callfree);
422 for (i = 0; i < ncallout; i++) {
423 callout_init(&callout[i]);
424 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
425 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
426 }
427
428 for (i = 0; i < callwheelsize; i++) {
429 TAILQ_INIT(&callwheel[i]);
430 }
431
432#if defined(USERCONFIG)
433 userconfig();
434 cninit(); /* the preferred console may have changed */
435#endif
436
437 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count),
438 ptoa(cnt.v_free_count) / 1024);
439
440 /*
441 * Set up buffers, so they can be used to read disk labels.
442 */
443 bufinit();
444 vm_pager_bufferinit();
445
446#ifdef SMP
447 /*
448 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
449 */
450 mp_start(); /* fire up the APs and APICs */
451 mp_announce();
452#endif /* SMP */
453 cpu_setregs();
454}
455
456int
457register_netisr(num, handler)
458 int num;
459 netisr_t *handler;
460{
461
462 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
463 printf("register_netisr: bad isr number: %d\n", num);
464 return (EINVAL);
465 }
466 netisrs[num] = handler;
467 return (0);
468}
469
470int
471unregister_netisr(num)
472 int num;
473{
474
475 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
476 printf("unregister_netisr: bad isr number: %d\n", num);
477 return (EINVAL);
478 }
479 netisrs[num] = NULL;
480 return (0);
481}
482
483/*
484 * Send an interrupt to process.
485 *
486 * Stack is set up to allow sigcode stored
487 * at top to call routine, followed by kcall
488 * to sigreturn routine below. After sigreturn
489 * resets the signal mask, the stack, and the
490 * frame pointer, it returns to the user
491 * specified pc, psl.
492 */
493static void
494osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
495{
496 register struct proc *p = curproc;
497 register struct trapframe *regs;
498 register struct osigframe *fp;
499 struct osigframe sf;
500 struct sigacts *psp = p->p_sigacts;
501 int oonstack;
502
503 regs = p->p_md.md_regs;
504 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
505
506 /* Allocate and validate space for the signal handler context. */
507 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
508 SIGISMEMBER(psp->ps_sigonstack, sig)) {
509 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
510 p->p_sigstk.ss_size - sizeof(struct osigframe));
511 p->p_sigstk.ss_flags |= SS_ONSTACK;
512 }
513 else
514 fp = (struct osigframe *)regs->tf_esp - 1;
515
516 /* Translate the signal if appropriate */
517 if (p->p_sysent->sv_sigtbl) {
518 if (sig <= p->p_sysent->sv_sigsize)
519 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
520 }
521
522 /* Build the argument list for the signal handler. */
523 sf.sf_signum = sig;
524 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
525 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
526 /* Signal handler installed with SA_SIGINFO. */
527 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
528 sf.sf_siginfo.si_signo = sig;
529 sf.sf_siginfo.si_code = code;
530 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
531 }
532 else {
533 /* Old FreeBSD-style arguments. */
534 sf.sf_arg2 = code;
535 sf.sf_addr = regs->tf_err;
536 sf.sf_ahu.sf_handler = catcher;
537 }
538
539 /* save scratch registers */
540 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
541 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
542 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
543 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
544 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
545 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
546 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
547 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
548 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
549 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
550 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
551 sf.sf_siginfo.si_sc.sc_gs = rgs();
552 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
553
554 /* Build the signal context to be used by sigreturn. */
555 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
556 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
557 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
558 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
559 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
560 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
561 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
562 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
563
564 /*
565 * If we're a vm86 process, we want to save the segment registers.
566 * We also change eflags to be our emulated eflags, not the actual
567 * eflags.
568 */
569 if (regs->tf_eflags & PSL_VM) {
570 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
571 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86;
572
573 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
574 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
575 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
576 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
577
578 if (vm86->vm86_has_vme == 0)
579 sf.sf_siginfo.si_sc.sc_ps =
580 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
581 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
582 /* see sendsig for comment */
583 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
584 }
585
586 /* Copy the sigframe out to the user's stack. */
587 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
588 /*
589 * Something is wrong with the stack pointer.
590 * ...Kill the process.
591 */
592 sigexit(p, SIGILL);
593 }
594
595 regs->tf_esp = (int)fp;
596 regs->tf_eip = PS_STRINGS - szosigcode;
597 regs->tf_eflags &= ~PSL_T;
598 regs->tf_cs = _ucodesel;
599 regs->tf_ds = _udatasel;
600 regs->tf_es = _udatasel;
601 regs->tf_fs = _udatasel;
602 load_gs(_udatasel);
603 regs->tf_ss = _udatasel;
604}
605
606void
607sendsig(catcher, sig, mask, code)
608 sig_t catcher;
609 int sig;
610 sigset_t *mask;
611 u_long code;
612{
613 struct proc *p = curproc;
614 struct trapframe *regs;
615 struct sigacts *psp = p->p_sigacts;
616 struct sigframe sf, *sfp;
617 int oonstack;
618
619 if (SIGISMEMBER(psp->ps_osigset, sig)) {
620 osendsig(catcher, sig, mask, code);
621 return;
622 }
623
624 regs = p->p_md.md_regs;
625 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
626
627 /* save user context */
628 bzero(&sf, sizeof(struct sigframe));
629 sf.sf_uc.uc_sigmask = *mask;
630 sf.sf_uc.uc_stack = p->p_sigstk;
631 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
632 sf.sf_uc.uc_mcontext.mc_gs = rgs();
633 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
634
635 /* Allocate and validate space for the signal handler context. */
636 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
637 SIGISMEMBER(psp->ps_sigonstack, sig)) {
638 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
639 p->p_sigstk.ss_size - sizeof(struct sigframe));
640 p->p_sigstk.ss_flags |= SS_ONSTACK;
641 }
642 else
643 sfp = (struct sigframe *)regs->tf_esp - 1;
644
645 /* Translate the signal is appropriate */
646 if (p->p_sysent->sv_sigtbl) {
647 if (sig <= p->p_sysent->sv_sigsize)
648 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
649 }
650
651 /* Build the argument list for the signal handler. */
652 sf.sf_signum = sig;
653 sf.sf_ucontext = (register_t)&sfp->sf_uc;
654 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
655 /* Signal handler installed with SA_SIGINFO. */
656 sf.sf_siginfo = (register_t)&sfp->sf_si;
657 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
658
659 /* fill siginfo structure */
660 sf.sf_si.si_signo = sig;
661 sf.sf_si.si_code = code;
662 sf.sf_si.si_addr = (void*)regs->tf_err;
663 }
664 else {
665 /* Old FreeBSD-style arguments. */
666 sf.sf_siginfo = code;
667 sf.sf_addr = regs->tf_err;
668 sf.sf_ahu.sf_handler = catcher;
669 }
670
671 /*
672 * If we're a vm86 process, we want to save the segment registers.
673 * We also change eflags to be our emulated eflags, not the actual
674 * eflags.
675 */
676 if (regs->tf_eflags & PSL_VM) {
677 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
678 struct vm86_kernel *vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86;
679
680 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
681 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
682 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
683 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
684
685 if (vm86->vm86_has_vme == 0)
686 sf.sf_uc.uc_mcontext.mc_eflags =
687 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
688 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
689
690 /*
691 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
692 * syscalls made by the signal handler. This just avoids
693 * wasting time for our lazy fixup of such faults. PSL_NT
694 * does nothing in vm86 mode, but vm86 programs can set it
695 * almost legitimately in probes for old cpu types.
696 */
697 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
698 }
699
700 /*
701 * Copy the sigframe out to the user's stack.
702 */
703 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
704 /*
705 * Something is wrong with the stack pointer.
706 * ...Kill the process.
707 */
708 sigexit(p, SIGILL);
709 }
710
711 regs->tf_esp = (int)sfp;
712 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
713 regs->tf_eflags &= ~PSL_T;
714 regs->tf_cs = _ucodesel;
715 regs->tf_ds = _udatasel;
716 regs->tf_es = _udatasel;
717 regs->tf_fs = _udatasel;
718 load_gs(_udatasel);
719 regs->tf_ss = _udatasel;
720}
721
722/*
723 * System call to cleanup state after a signal
724 * has been taken. Reset signal mask and
725 * stack state from context left by sendsig (above).
726 * Return to previous pc and psl as specified by
727 * context left by sendsig. Check carefully to
728 * make sure that the user has not modified the
729 * state to gain improper privileges.
730 */
731#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
732#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
733
734int
735osigreturn(p, uap)
736 struct proc *p;
737 struct osigreturn_args /* {
738 struct osigcontext *sigcntxp;
739 } */ *uap;
740{
741 register struct osigcontext *scp;
742 register struct trapframe *regs = p->p_md.md_regs;
743 int eflags;
744
745 scp = uap->sigcntxp;
746
747 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
748 return(EFAULT);
749
750 eflags = scp->sc_ps;
751 if (eflags & PSL_VM) {
752 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
753 struct vm86_kernel *vm86;
754
755 /*
756 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
757 * set up the vm86 area, and we can't enter vm86 mode.
758 */
759 if (p->p_addr->u_pcb.pcb_ext == 0)
760 return (EINVAL);
761 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86;
762 if (vm86->vm86_inited == 0)
763 return (EINVAL);
764
765 /* go back to user mode if both flags are set */
766 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
767 trapsignal(p, SIGBUS, 0);
768
769 if (vm86->vm86_has_vme) {
770 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
771 (eflags & VME_USERCHANGE) | PSL_VM;
772 } else {
773 vm86->vm86_eflags = eflags; /* save VIF, VIP */
774 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
775 }
776 tf->tf_vm86_ds = scp->sc_ds;
777 tf->tf_vm86_es = scp->sc_es;
778 tf->tf_vm86_fs = scp->sc_fs;
779 tf->tf_vm86_gs = scp->sc_gs;
780 tf->tf_ds = _udatasel;
781 tf->tf_es = _udatasel;
782 tf->tf_fs = _udatasel;
783 } else {
784 /*
785 * Don't allow users to change privileged or reserved flags.
786 */
787 /*
788 * XXX do allow users to change the privileged flag PSL_RF.
789 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
790 * should sometimes set it there too. tf_eflags is kept in
791 * the signal context during signal handling and there is no
792 * other place to remember it, so the PSL_RF bit may be
793 * corrupted by the signal handler without us knowing.
794 * Corruption of the PSL_RF bit at worst causes one more or
795 * one less debugger trap, so allowing it is fairly harmless.
796 */
797 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
798 return(EINVAL);
799 }
800
801 /*
802 * Don't allow users to load a valid privileged %cs. Let the
803 * hardware check for invalid selectors, excess privilege in
804 * other selectors, invalid %eip's and invalid %esp's.
805 */
806 if (!CS_SECURE(scp->sc_cs)) {
807 trapsignal(p, SIGBUS, T_PROTFLT);
808 return(EINVAL);
809 }
810 regs->tf_ds = scp->sc_ds;
811 regs->tf_es = scp->sc_es;
812 regs->tf_fs = scp->sc_fs;
813 }
814
815 /* restore scratch registers */
816 regs->tf_eax = scp->sc_eax;
817 regs->tf_ebx = scp->sc_ebx;
818 regs->tf_ecx = scp->sc_ecx;
819 regs->tf_edx = scp->sc_edx;
820 regs->tf_esi = scp->sc_esi;
821 regs->tf_edi = scp->sc_edi;
822 regs->tf_cs = scp->sc_cs;
823 regs->tf_ss = scp->sc_ss;
824 regs->tf_isp = scp->sc_isp;
825
826 if (scp->sc_onstack & 01)
827 p->p_sigstk.ss_flags |= SS_ONSTACK;
828 else
829 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
830
831 SIGSETOLD(p->p_sigmask, scp->sc_mask);
832 SIG_CANTMASK(p->p_sigmask);
833 regs->tf_ebp = scp->sc_fp;
834 regs->tf_esp = scp->sc_sp;
835 regs->tf_eip = scp->sc_pc;
836 regs->tf_eflags = eflags;
837 return(EJUSTRETURN);
838}
839
840int
841sigreturn(p, uap)
842 struct proc *p;
843 struct sigreturn_args /* {
844 ucontext_t *sigcntxp;
845 } */ *uap;
846{
847 struct trapframe *regs;
848 ucontext_t *ucp;
849 int cs, eflags;
850
851 ucp = uap->sigcntxp;
852
853 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
854 return (EFAULT);
855 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
856 return (osigreturn(p, (struct osigreturn_args *)uap));
857
858 /*
859 * Since ucp is not an osigcontext but a ucontext_t, we have to
860 * check again if all of it is accessible. A ucontext_t is
861 * much larger, so instead of just checking for the pointer
862 * being valid for the size of an osigcontext, now check for
863 * it being valid for a whole, new-style ucontext_t.
864 */
865 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
866 return (EFAULT);
867
868 regs = p->p_md.md_regs;
869 eflags = ucp->uc_mcontext.mc_eflags;
870
871 if (eflags & PSL_VM) {
872 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
873 struct vm86_kernel *vm86;
874
875 /*
876 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
877 * set up the vm86 area, and we can't enter vm86 mode.
878 */
879 if (p->p_addr->u_pcb.pcb_ext == 0)
880 return (EINVAL);
881 vm86 = &p->p_addr->u_pcb.pcb_ext->ext_vm86;
882 if (vm86->vm86_inited == 0)
883 return (EINVAL);
884
885 /* go back to user mode if both flags are set */
886 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
887 trapsignal(p, SIGBUS, 0);
888
889 if (vm86->vm86_has_vme) {
890 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
891 (eflags & VME_USERCHANGE) | PSL_VM;
892 } else {
893 vm86->vm86_eflags = eflags; /* save VIF, VIP */
894 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
895 }
896 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
897 tf->tf_eflags = eflags;
898 tf->tf_vm86_ds = tf->tf_ds;
899 tf->tf_vm86_es = tf->tf_es;
900 tf->tf_vm86_fs = tf->tf_fs;
901 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
902 tf->tf_ds = _udatasel;
903 tf->tf_es = _udatasel;
904 tf->tf_fs = _udatasel;
905 } else {
906 /*
907 * Don't allow users to change privileged or reserved flags.
908 */
909 /*
910 * XXX do allow users to change the privileged flag PSL_RF.
911 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
912 * should sometimes set it there too. tf_eflags is kept in
913 * the signal context during signal handling and there is no
914 * other place to remember it, so the PSL_RF bit may be
915 * corrupted by the signal handler without us knowing.
916 * Corruption of the PSL_RF bit at worst causes one more or
917 * one less debugger trap, so allowing it is fairly harmless.
918 */
919 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
920 printf("sigreturn: eflags = 0x%x\n", eflags);
921 return(EINVAL);
922 }
923
924 /*
925 * Don't allow users to load a valid privileged %cs. Let the
926 * hardware check for invalid selectors, excess privilege in
927 * other selectors, invalid %eip's and invalid %esp's.
928 */
929 cs = ucp->uc_mcontext.mc_cs;
930 if (!CS_SECURE(cs)) {
931 printf("sigreturn: cs = 0x%x\n", cs);
932 trapsignal(p, SIGBUS, T_PROTFLT);
933 return(EINVAL);
934 }
935 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
936 }
937
938 if (ucp->uc_mcontext.mc_onstack & 1)
939 p->p_sigstk.ss_flags |= SS_ONSTACK;
940 else
941 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
942
943 p->p_sigmask = ucp->uc_sigmask;
944 SIG_CANTMASK(p->p_sigmask);
945 return(EJUSTRETURN);
946}
947
948/*
949 * Machine dependent boot() routine
950 *
951 * I haven't seen anything to put here yet
952 * Possibly some stuff might be grafted back here from boot()
953 */
954void
955cpu_boot(int howto)
956{
957}
958
959/*
960 * Shutdown the CPU as much as possible
961 */
962void
963cpu_halt(void)
964{
965 for (;;)
966 __asm__ ("hlt");
967}
968
969/*
970 * Hook to idle the CPU when possible. This is disabled by default for
971 * the SMP case as there is a small window of opportunity whereby a ready
972 * process is delayed to the next clock tick. It should be safe to enable
973 * for SMP if power is a concern.
974 *
975 * On -stable, cpu_idle() is called with interrupts disabled and must
976 * return with them enabled.
977 */
978#ifdef SMP
979static int cpu_idle_hlt = 0;
980#else
981static int cpu_idle_hlt = 1;
982#endif
983SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
984 &cpu_idle_hlt, 0, "Idle loop HLT enable");
985
986void
987cpu_idle(void)
988{
989 if (cpu_idle_hlt) {
990 /*
991 * We must guarentee that hlt is exactly the instruction
992 * following the sti.
993 */
994 __asm __volatile("sti; hlt");
995 } else {
996 __asm __volatile("sti");
997 }
998}
999
1000/*
1001 * Clear registers on exec
1002 */
1003void
1004setregs(p, entry, stack, ps_strings)
1005 struct proc *p;
1006 u_long entry;
1007 u_long stack;
1008 u_long ps_strings;
1009{
1010 struct trapframe *regs = p->p_md.md_regs;
1011 struct pcb *pcb = &p->p_addr->u_pcb;
1012
1013 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1014 pcb->pcb_gs = _udatasel;
1015 load_gs(_udatasel);
1016
1017#ifdef USER_LDT
1018 /* was i386_user_cleanup() in NetBSD */
1019 user_ldt_free(pcb);
1020#endif
1021
1022 bzero((char *)regs, sizeof(struct trapframe));
1023 regs->tf_eip = entry;
1024 regs->tf_esp = stack;
1025 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1026 regs->tf_ss = _udatasel;
1027 regs->tf_ds = _udatasel;
1028 regs->tf_es = _udatasel;
1029 regs->tf_fs = _udatasel;
1030 regs->tf_cs = _ucodesel;
1031
1032 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1033 regs->tf_ebx = ps_strings;
1034
1035 /*
1036 * Reset the hardware debug registers if they were in use.
1037 * They won't have any meaning for the newly exec'd process.
1038 */
1039 if (pcb->pcb_flags & PCB_DBREGS) {
1040 pcb->pcb_dr0 = 0;
1041 pcb->pcb_dr1 = 0;
1042 pcb->pcb_dr2 = 0;
1043 pcb->pcb_dr3 = 0;
1044 pcb->pcb_dr6 = 0;
1045 pcb->pcb_dr7 = 0;
1046 if (pcb == curpcb) {
1047 /*
1048 * Clear the debug registers on the running
1049 * CPU, otherwise they will end up affecting
1050 * the next process we switch to.
1051 */
1052 reset_dbregs();
1053 }
1054 pcb->pcb_flags &= ~PCB_DBREGS;
1055 }
1056
1057 /*
1058 * Initialize the math emulator (if any) for the current process.
1059 * Actually, just clear the bit that says that the emulator has
1060 * been initialized. Initialization is delayed until the process
1061 * traps to the emulator (if it is done at all) mainly because
1062 * emulators don't provide an entry point for initialization.
1063 */
1064 p->p_addr->u_pcb.pcb_flags &= ~FP_SOFTFP;
1065
1066 /*
1067 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1068 * for why fwait must be trapped at least if there is an npx or an
1069 * emulator). This is mainly to handle the case where npx0 is not
1070 * configured, since the npx routines normally set up the trap
1071 * otherwise. It should be done only at boot time, but doing it
1072 * here allows modifying `npx_exists' for testing the emulator on
1073 * systems with an npx.
1074 */
1075 load_cr0(rcr0() | CR0_MP | CR0_TS);
1076
1077#if NNPX > 0
1078 /* Initialize the npx (if any) for the current process. */
1079 npxinit(__INITIAL_NPXCW__);
1080#endif
1081
1082 /*
1083 * XXX - Linux emulator
1084 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1085 * on it.
1086 */
1087 p->p_retval[1] = 0;
1088}
1089
1090void
1091cpu_setregs(void)
1092{
1093 unsigned int cr0;
1094
1095 cr0 = rcr0();
1096 cr0 |= CR0_NE; /* Done by npxinit() */
1097 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1098#ifdef I386_CPU
1099 if (cpu_class != CPUCLASS_386)
1100#endif
1101 cr0 |= CR0_WP | CR0_AM;
1102 load_cr0(cr0);
1103 load_gs(_udatasel);
1104}
1105
1106static int
1107sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1108{
1109 int error;
1110 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1111 req);
1112 if (!error && req->newptr)
1113 resettodr();
1114 return (error);
1115}
1116
1117SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1118 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1119
1120SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1121 CTLFLAG_RW, &disable_rtc_set, 0, "");
1122
1123SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1124 CTLFLAG_RD, &bootinfo, bootinfo, "");
1125
1126SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1127 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1128
1129extern u_long bootdev; /* not a dev_t - encoding is different */
1130SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1131 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1132
1133/*
1134 * Initialize 386 and configure to run kernel
1135 */
1136
1137/*
1138 * Initialize segments & interrupt table
1139 */
1140
1141int _default_ldt;
1142union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1143static struct gate_descriptor idt0[NIDT];
1144struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1145union descriptor ldt[NLDT]; /* local descriptor table */
1146#ifdef SMP
1147/* table descriptors - used to load tables by microp */
1148struct region_descriptor r_gdt, r_idt;
1149#endif
1150
1151#ifndef SMP
1152extern struct segment_descriptor common_tssd, *tss_gdt;
1153#endif
1154int private_tss; /* flag indicating private tss */
1155
1156#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1157extern int has_f00f_bug;
1158#endif
1159
1160static struct i386tss dblfault_tss;
1161static char dblfault_stack[PAGE_SIZE];
1162
1163extern struct user *proc0paddr;
1164
1165
1166/* software prototypes -- in more palatable form */
1167struct soft_segment_descriptor gdt_segs[] = {
1168/* GNULL_SEL 0 Null Descriptor */
1169{ 0x0, /* segment base address */
1170 0x0, /* length */
1171 0, /* segment type */
1172 0, /* segment descriptor priority level */
1173 0, /* segment descriptor present */
1174 0, 0,
1175 0, /* default 32 vs 16 bit size */
1176 0 /* limit granularity (byte/page units)*/ },
1177/* GCODE_SEL 1 Code Descriptor for kernel */
1178{ 0x0, /* segment base address */
1179 0xfffff, /* length - all address space */
1180 SDT_MEMERA, /* segment type */
1181 0, /* segment descriptor priority level */
1182 1, /* segment descriptor present */
1183 0, 0,
1184 1, /* default 32 vs 16 bit size */
1185 1 /* limit granularity (byte/page units)*/ },
1186/* GDATA_SEL 2 Data Descriptor for kernel */
1187{ 0x0, /* segment base address */
1188 0xfffff, /* length - all address space */
1189 SDT_MEMRWA, /* segment type */
1190 0, /* segment descriptor priority level */
1191 1, /* segment descriptor present */
1192 0, 0,
1193 1, /* default 32 vs 16 bit size */
1194 1 /* limit granularity (byte/page units)*/ },
1195/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1196{ 0x0, /* segment base address */
1197 0xfffff, /* length - all address space */
1198 SDT_MEMRWA, /* segment type */
1199 0, /* segment descriptor priority level */
1200 1, /* segment descriptor present */
1201 0, 0,
1202 1, /* default 32 vs 16 bit size */
1203 1 /* limit granularity (byte/page units)*/ },
1204/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1205{
1206 0x0, /* segment base address */
1207 sizeof(struct i386tss)-1,/* length - all address space */
1208 SDT_SYS386TSS, /* segment type */
1209 0, /* segment descriptor priority level */
1210 1, /* segment descriptor present */
1211 0, 0,
1212 0, /* unused - default 32 vs 16 bit size */
1213 0 /* limit granularity (byte/page units)*/ },
1214/* GLDT_SEL 5 LDT Descriptor */
1215{ (int) ldt, /* segment base address */
1216 sizeof(ldt)-1, /* length - all address space */
1217 SDT_SYSLDT, /* segment type */
1218 SEL_UPL, /* segment descriptor priority level */
1219 1, /* segment descriptor present */
1220 0, 0,
1221 0, /* unused - default 32 vs 16 bit size */
1222 0 /* limit granularity (byte/page units)*/ },
1223/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1224{ (int) ldt, /* segment base address */
1225 (512 * sizeof(union descriptor)-1), /* length */
1226 SDT_SYSLDT, /* segment type */
1227 0, /* segment descriptor priority level */
1228 1, /* segment descriptor present */
1229 0, 0,
1230 0, /* unused - default 32 vs 16 bit size */
1231 0 /* limit granularity (byte/page units)*/ },
1232/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1233{ 0x0, /* segment base address */
1234 0x0, /* length - all address space */
1235 0, /* segment type */
1236 0, /* segment descriptor priority level */
1237 0, /* segment descriptor present */
1238 0, 0,
1239 0, /* default 32 vs 16 bit size */
1240 0 /* limit granularity (byte/page units)*/ },
1241/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1242{ 0x400, /* segment base address */
1243 0xfffff, /* length */
1244 SDT_MEMRWA, /* segment type */
1245 0, /* segment descriptor priority level */
1246 1, /* segment descriptor present */
1247 0, 0,
1248 1, /* default 32 vs 16 bit size */
1249 1 /* limit granularity (byte/page units)*/ },
1250/* GPANIC_SEL 9 Panic Tss Descriptor */
1251{ (int) &dblfault_tss, /* segment base address */
1252 sizeof(struct i386tss)-1,/* length - all address space */
1253 SDT_SYS386TSS, /* segment type */
1254 0, /* segment descriptor priority level */
1255 1, /* segment descriptor present */
1256 0, 0,
1257 0, /* unused - default 32 vs 16 bit size */
1258 0 /* limit granularity (byte/page units)*/ },
1259/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1260{ 0, /* segment base address (overwritten) */
1261 0xfffff, /* length */
1262 SDT_MEMERA, /* segment type */
1263 0, /* segment descriptor priority level */
1264 1, /* segment descriptor present */
1265 0, 0,
1266 0, /* default 32 vs 16 bit size */
1267 1 /* limit granularity (byte/page units)*/ },
1268/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1269{ 0, /* segment base address (overwritten) */
1270 0xfffff, /* length */
1271 SDT_MEMERA, /* segment type */
1272 0, /* segment descriptor priority level */
1273 1, /* segment descriptor present */
1274 0, 0,
1275 0, /* default 32 vs 16 bit size */
1276 1 /* limit granularity (byte/page units)*/ },
1277/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1278{ 0, /* segment base address (overwritten) */
1279 0xfffff, /* length */
1280 SDT_MEMRWA, /* segment type */
1281 0, /* segment descriptor priority level */
1282 1, /* segment descriptor present */
1283 0, 0,
1284 1, /* default 32 vs 16 bit size */
1285 1 /* limit granularity (byte/page units)*/ },
1286/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1287{ 0, /* segment base address (overwritten) */
1288 0xfffff, /* length */
1289 SDT_MEMRWA, /* segment type */
1290 0, /* segment descriptor priority level */
1291 1, /* segment descriptor present */
1292 0, 0,
1293 0, /* default 32 vs 16 bit size */
1294 1 /* limit granularity (byte/page units)*/ },
1295/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1296{ 0, /* segment base address (overwritten) */
1297 0xfffff, /* length */
1298 SDT_MEMRWA, /* segment type */
1299 0, /* segment descriptor priority level */
1300 1, /* segment descriptor present */
1301 0, 0,
1302 0, /* default 32 vs 16 bit size */
1303 1 /* limit granularity (byte/page units)*/ },
1304};
1305
1306static struct soft_segment_descriptor ldt_segs[] = {
1307 /* Null Descriptor - overwritten by call gate */
1308{ 0x0, /* segment base address */
1309 0x0, /* length - all address space */
1310 0, /* segment type */
1311 0, /* segment descriptor priority level */
1312 0, /* segment descriptor present */
1313 0, 0,
1314 0, /* default 32 vs 16 bit size */
1315 0 /* limit granularity (byte/page units)*/ },
1316 /* Null Descriptor - overwritten by call gate */
1317{ 0x0, /* segment base address */
1318 0x0, /* length - all address space */
1319 0, /* segment type */
1320 0, /* segment descriptor priority level */
1321 0, /* segment descriptor present */
1322 0, 0,
1323 0, /* default 32 vs 16 bit size */
1324 0 /* limit granularity (byte/page units)*/ },
1325 /* Null Descriptor - overwritten by call gate */
1326{ 0x0, /* segment base address */
1327 0x0, /* length - all address space */
1328 0, /* segment type */
1329 0, /* segment descriptor priority level */
1330 0, /* segment descriptor present */
1331 0, 0,
1332 0, /* default 32 vs 16 bit size */
1333 0 /* limit granularity (byte/page units)*/ },
1334 /* Code Descriptor for user */
1335{ 0x0, /* segment base address */
1336 0xfffff, /* length - all address space */
1337 SDT_MEMERA, /* segment type */
1338 SEL_UPL, /* segment descriptor priority level */
1339 1, /* segment descriptor present */
1340 0, 0,
1341 1, /* default 32 vs 16 bit size */
1342 1 /* limit granularity (byte/page units)*/ },
1343 /* Null Descriptor - overwritten by call gate */
1344{ 0x0, /* segment base address */
1345 0x0, /* length - all address space */
1346 0, /* segment type */
1347 0, /* segment descriptor priority level */
1348 0, /* segment descriptor present */
1349 0, 0,
1350 0, /* default 32 vs 16 bit size */
1351 0 /* limit granularity (byte/page units)*/ },
1352 /* Data Descriptor for user */
1353{ 0x0, /* segment base address */
1354 0xfffff, /* length - all address space */
1355 SDT_MEMRWA, /* segment type */
1356 SEL_UPL, /* segment descriptor priority level */
1357 1, /* segment descriptor present */
1358 0, 0,
1359 1, /* default 32 vs 16 bit size */
1360 1 /* limit granularity (byte/page units)*/ },
1361};
1362
1363void
1364setidt(idx, func, typ, dpl, selec)
1365 int idx;
1366 inthand_t *func;
1367 int typ;
1368 int dpl;
1369 int selec;
1370{
1371 struct gate_descriptor *ip;
1372
1373 ip = idt + idx;
1374 ip->gd_looffset = (int)func;
1375 ip->gd_selector = selec;
1376 ip->gd_stkcpy = 0;
1377 ip->gd_xx = 0;
1378 ip->gd_type = typ;
1379 ip->gd_dpl = dpl;
1380 ip->gd_p = 1;
1381 ip->gd_hioffset = ((int)func)>>16 ;
1382}
1383
1384#define IDTVEC(name) __CONCAT(X,name)
1385
1386extern inthand_t
1387 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1388 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1389 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1390 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1391 IDTVEC(xmm), IDTVEC(syscall), IDTVEC(int0x80_syscall);
1392
1393void
1394sdtossd(sd, ssd)
1395 struct segment_descriptor *sd;
1396 struct soft_segment_descriptor *ssd;
1397{
1398 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1399 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1400 ssd->ssd_type = sd->sd_type;
1401 ssd->ssd_dpl = sd->sd_dpl;
1402 ssd->ssd_p = sd->sd_p;
1403 ssd->ssd_def32 = sd->sd_def32;
1404 ssd->ssd_gran = sd->sd_gran;
1405}
1406
1407#define PHYSMAP_SIZE (2 * 8)
1408
1409/*
1410 * Populate the (physmap) array with base/bound pairs describing the
1411 * available physical memory in the system, then test this memory and
1412 * build the phys_avail array describing the actually-available memory.
1413 *
1414 * If we cannot accurately determine the physical memory map, then use
1415 * value from the 0xE801 call, and failing that, the RTC.
1416 *
1417 * Total memory size may be set by the kernel environment variable
1418 * hw.physmem or the compile-time define MAXMEM.
1419 */
1420static void
1421getmemsize(int first)
1422{
1423 int i, physmap_idx, pa_indx;
1424 int hasbrokenint12;
1425 u_int basemem, extmem;
1426 struct vm86frame vmf;
1427 struct vm86context vmc;
1428 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1429 pt_entry_t pte;
1430 const char *cp;
1431 struct {
1432 u_int64_t base;
1433 u_int64_t length;
1434 u_int32_t type;
1435 } *smap;
1436
1437 hasbrokenint12 = 0;
1438 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1439 bzero(&vmf, sizeof(struct vm86frame));
1440 bzero(physmap, sizeof(physmap));
1441 basemem = 0;
1442
1443 /*
1444 * Some newer BIOSes has broken INT 12H implementation which cause
1445 * kernel panic immediately. In this case, we need to scan SMAP
1446 * with INT 15:E820 first, then determine base memory size.
1447 */
1448 if (hasbrokenint12) {
1449 goto int15e820;
1450 }
1451
1452 /*
1453 * Perform "base memory" related probes & setup
1454 */
1455 vm86_intcall(0x12, &vmf);
1456 basemem = vmf.vmf_ax;
1457 if (basemem > 640) {
1458 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1459 basemem);
1460 basemem = 640;
1461 }
1462
1463 /*
1464 * XXX if biosbasemem is now < 640, there is a `hole'
1465 * between the end of base memory and the start of
1466 * ISA memory. The hole may be empty or it may
1467 * contain BIOS code or data. Map it read/write so
1468 * that the BIOS can write to it. (Memory from 0 to
1469 * the physical end of the kernel is mapped read-only
1470 * to begin with and then parts of it are remapped.
1471 * The parts that aren't remapped form holes that
1472 * remain read-only and are unused by the kernel.
1473 * The base memory area is below the physical end of
1474 * the kernel and right now forms a read-only hole.
1475 * The part of it from PAGE_SIZE to
1476 * (trunc_page(biosbasemem * 1024) - 1) will be
1477 * remapped and used by the kernel later.)
1478 *
1479 * This code is similar to the code used in
1480 * pmap_mapdev, but since no memory needs to be
1481 * allocated we simply change the mapping.
1482 */
1483 for (pa = trunc_page(basemem * 1024);
1484 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1485 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1486 *pte = pa | PG_RW | PG_V;
1487 }
1488
1489 /*
1490 * if basemem != 640, map pages r/w into vm86 page table so
1491 * that the bios can scribble on it.
1492 */
1493 pte = (pt_entry_t)vm86paddr;
1494 for (i = basemem / 4; i < 160; i++)
1495 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1496
1497int15e820:
1498 /*
1499 * map page 1 R/W into the kernel page table so we can use it
1500 * as a buffer. The kernel will unmap this page later.
1501 */
1502 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1503 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1504
1505 /*
1506 * get memory map with INT 15:E820
1507 */
1508#define SMAPSIZ sizeof(*smap)
1509#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1510
1511 vmc.npages = 0;
1512 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1513 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1514
1515 physmap_idx = 0;
1516 vmf.vmf_ebx = 0;
1517 do {
1518 vmf.vmf_eax = 0xE820;
1519 vmf.vmf_edx = SMAP_SIG;
1520 vmf.vmf_ecx = SMAPSIZ;
1521 i = vm86_datacall(0x15, &vmf, &vmc);
1522 if (i || vmf.vmf_eax != SMAP_SIG)
1523 break;
1524 if (boothowto & RB_VERBOSE)
1525 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1526 smap->type,
1527 *(u_int32_t *)((char *)&smap->base + 4),
1528 (u_int32_t)smap->base,
1529 *(u_int32_t *)((char *)&smap->length + 4),
1530 (u_int32_t)smap->length);
1531
1532 if (smap->type != 0x01)
1533 goto next_run;
1534
1535 if (smap->length == 0)
1536 goto next_run;
1537
1538 if (smap->base >= 0xffffffff) {
1539 printf("%uK of memory above 4GB ignored\n",
1540 (u_int)(smap->length / 1024));
1541 goto next_run;
1542 }
1543
1544 for (i = 0; i <= physmap_idx; i += 2) {
1545 if (smap->base < physmap[i + 1]) {
1546 if (boothowto & RB_VERBOSE)
1547 printf(
1548 "Overlapping or non-montonic memory region, ignoring second region\n");
1549 goto next_run;
1550 }
1551 }
1552
1553 if (smap->base == physmap[physmap_idx + 1]) {
1554 physmap[physmap_idx + 1] += smap->length;
1555 goto next_run;
1556 }
1557
1558 physmap_idx += 2;
1559 if (physmap_idx == PHYSMAP_SIZE) {
1560 printf(
1561 "Too many segments in the physical address map, giving up\n");
1562 break;
1563 }
1564 physmap[physmap_idx] = smap->base;
1565 physmap[physmap_idx + 1] = smap->base + smap->length;
1566next_run:
1567 } while (vmf.vmf_ebx != 0);
1568
1569 /*
1570 * Perform "base memory" related probes & setup based on SMAP
1571 */
1572 if (basemem == 0) {
1573 for (i = 0; i <= physmap_idx; i += 2) {
1574 if (physmap[i] == 0x00000000) {
1575 basemem = physmap[i + 1] / 1024;
1576 break;
1577 }
1578 }
1579
1580 if (basemem == 0) {
1581 basemem = 640;
1582 }
1583
1584 if (basemem > 640) {
1585 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1586 basemem);
1587 basemem = 640;
1588 }
1589
1590 for (pa = trunc_page(basemem * 1024);
1591 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1592 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1593 *pte = pa | PG_RW | PG_V;
1594 }
1595
1596 pte = (pt_entry_t)vm86paddr;
1597 for (i = basemem / 4; i < 160; i++)
1598 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1599 }
1600
1601 if (physmap[1] != 0)
1602 goto physmap_done;
1603
1604 /*
1605 * If we failed above, try memory map with INT 15:E801
1606 */
1607 vmf.vmf_ax = 0xE801;
1608 if (vm86_intcall(0x15, &vmf) == 0) {
1609 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1610 } else {
1611#if 0
1612 vmf.vmf_ah = 0x88;
1613 vm86_intcall(0x15, &vmf);
1614 extmem = vmf.vmf_ax;
1615#else
1616 /*
1617 * Prefer the RTC value for extended memory.
1618 */
1619 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1620#endif
1621 }
1622
1623 /*
1624 * Special hack for chipsets that still remap the 384k hole when
1625 * there's 16MB of memory - this really confuses people that
1626 * are trying to use bus mastering ISA controllers with the
1627 * "16MB limit"; they only have 16MB, but the remapping puts
1628 * them beyond the limit.
1629 *
1630 * If extended memory is between 15-16MB (16-17MB phys address range),
1631 * chop it to 15MB.
1632 */
1633 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1634 extmem = 15 * 1024;
1635
1636 physmap[0] = 0;
1637 physmap[1] = basemem * 1024;
1638 physmap_idx = 2;
1639 physmap[physmap_idx] = 0x100000;
1640 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1641
1642physmap_done:
1643 /*
1644 * Now, physmap contains a map of physical memory.
1645 */
1646
1647#ifdef SMP
1648 /* make hole for AP bootstrap code */
1649 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1650
1651 /* look for the MP hardware - needed for apic addresses */
1652 mp_probe();
1653#endif
1654
1655 /*
1656 * Maxmem isn't the "maximum memory", it's one larger than the
1657 * highest page of the physical address space. It should be
1658 * called something like "Maxphyspage". We may adjust this
1659 * based on ``hw.physmem'' and the results of the memory test.
1660 */
1661 Maxmem = atop(physmap[physmap_idx + 1]);
1662
1663#ifdef MAXMEM
1664 Maxmem = MAXMEM / 4;
1665#endif
1666
1667 /*
1668 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1669 * for the appropriate modifiers. This overrides MAXMEM.
1670 */
1671 if ((cp = getenv("hw.physmem")) != NULL) {
1672 u_int64_t AllowMem, sanity;
1673 char *ep;
1674
1675 sanity = AllowMem = strtouq(cp, &ep, 0);
1676 if ((ep != cp) && (*ep != 0)) {
1677 switch(*ep) {
1678 case 'g':
1679 case 'G':
1680 AllowMem <<= 10;
1681 case 'm':
1682 case 'M':
1683 AllowMem <<= 10;
1684 case 'k':
1685 case 'K':
1686 AllowMem <<= 10;
1687 break;
1688 default:
1689 AllowMem = sanity = 0;
1690 }
1691 if (AllowMem < sanity)
1692 AllowMem = 0;
1693 }
1694 if (AllowMem == 0)
1695 printf("Ignoring invalid memory size of '%s'\n", cp);
1696 else
1697 Maxmem = atop(AllowMem);
1698 }
1699
1700 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1701 (boothowto & RB_VERBOSE))
1702 printf("Physical memory use set to %uK\n", Maxmem * 4);
1703
1704 /*
1705 * If Maxmem has been increased beyond what the system has detected,
1706 * extend the last memory segment to the new limit.
1707 */
1708 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1709 physmap[physmap_idx + 1] = ptoa(Maxmem);
1710
1711 /* call pmap initialization to make new kernel address space */
1712 pmap_bootstrap(first, 0);
1713
1714 /*
1715 * Size up each available chunk of physical memory.
1716 */
1717 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1718 pa_indx = 0;
1719 phys_avail[pa_indx++] = physmap[0];
1720 phys_avail[pa_indx] = physmap[0];
1721#if 0
1722 pte = (pt_entry_t)vtopte(KERNBASE);
1723#else
1724 pte = (pt_entry_t)CMAP1;
1725#endif
1726
1727 /*
1728 * physmap is in bytes, so when converting to page boundaries,
1729 * round up the start address and round down the end address.
1730 */
1731 for (i = 0; i <= physmap_idx; i += 2) {
1732 vm_offset_t end;
1733
1734 end = ptoa(Maxmem);
1735 if (physmap[i + 1] < end)
1736 end = trunc_page(physmap[i + 1]);
1737 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1738 int tmp, page_bad;
1739#if 0
1740 int *ptr = 0;
1741#else
1742 int *ptr = (int *)CADDR1;
1743#endif
1744
1745 /*
1746 * block out kernel memory as not available.
1747 */
1748 if (pa >= 0x100000 && pa < first)
1749 continue;
1750
1751 page_bad = FALSE;
1752
1753 /*
1754 * map page into kernel: valid, read/write,non-cacheable
1755 */
1756 *pte = pa | PG_V | PG_RW | PG_N;
1757 invltlb();
1758
1759 tmp = *(int *)ptr;
1760 /*
1761 * Test for alternating 1's and 0's
1762 */
1763 *(volatile int *)ptr = 0xaaaaaaaa;
1764 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1765 page_bad = TRUE;
1766 }
1767 /*
1768 * Test for alternating 0's and 1's
1769 */
1770 *(volatile int *)ptr = 0x55555555;
1771 if (*(volatile int *)ptr != 0x55555555) {
1772 page_bad = TRUE;
1773 }
1774 /*
1775 * Test for all 1's
1776 */
1777 *(volatile int *)ptr = 0xffffffff;
1778 if (*(volatile int *)ptr != 0xffffffff) {
1779 page_bad = TRUE;
1780 }
1781 /*
1782 * Test for all 0's
1783 */
1784 *(volatile int *)ptr = 0x0;
1785 if (*(volatile int *)ptr != 0x0) {
1786 page_bad = TRUE;
1787 }
1788 /*
1789 * Restore original value.
1790 */
1791 *(int *)ptr = tmp;
1792
1793 /*
1794 * Adjust array of valid/good pages.
1795 */
1796 if (page_bad == TRUE) {
1797 continue;
1798 }
1799 /*
1800 * If this good page is a continuation of the
1801 * previous set of good pages, then just increase
1802 * the end pointer. Otherwise start a new chunk.
1803 * Note that "end" points one higher than end,
1804 * making the range >= start and < end.
1805 * If we're also doing a speculative memory
1806 * test and we at or past the end, bump up Maxmem
1807 * so that we keep going. The first bad page
1808 * will terminate the loop.
1809 */
1810 if (phys_avail[pa_indx] == pa) {
1811 phys_avail[pa_indx] += PAGE_SIZE;
1812 } else {
1813 pa_indx++;
1814 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1815 printf("Too many holes in the physical address space, giving up\n");
1816 pa_indx--;
1817 break;
1818 }
1819 phys_avail[pa_indx++] = pa; /* start */
1820 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1821 }
1822 physmem++;
1823 }
1824 }
1825 *pte = 0;
1826 invltlb();
1827
1828 /*
1829 * XXX
1830 * The last chunk must contain at least one page plus the message
1831 * buffer to avoid complicating other code (message buffer address
1832 * calculation, etc.).
1833 */
1834 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1835 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1836 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1837 phys_avail[pa_indx--] = 0;
1838 phys_avail[pa_indx--] = 0;
1839 }
1840
1841 Maxmem = atop(phys_avail[pa_indx]);
1842
1843 /* Trim off space for the message buffer. */
1844 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1845
1846 avail_end = phys_avail[pa_indx];
1847}
1848
1849void
1850init386(first)
1851 int first;
1852{
1853 struct gate_descriptor *gdp;
1854 int gsel_tss, metadata_missing, off, x;
1855#ifndef SMP
1856 /* table descriptors - used to load tables by microp */
1857 struct region_descriptor r_gdt, r_idt;
1858#endif
1859
1860 /*
1861 * Prevent lowering of the ipl if we call tsleep() early.
1862 */
1863 safepri = cpl;
1864
1865 proc0.p_addr = proc0paddr;
1866
1867 atdevbase = ISA_HOLE_START + KERNBASE;
1868
1869 metadata_missing = 0;
1870 if (bootinfo.bi_modulep) {
1871 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1872 preload_bootstrap_relocate(KERNBASE);
1873 } else {
1874 metadata_missing = 1;
1875 }
1876 if (bootinfo.bi_envp)
1877 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1878
1879 /* Init basic tunables, hz etc */
1880 init_param1();
1881
1882 /*
1883 * make gdt memory segments, the code segment goes up to end of the
1884 * page with etext in it, the data segment goes to the end of
1885 * the address space
1886 */
1887 /*
1888 * XXX text protection is temporarily (?) disabled. The limit was
1889 * i386_btop(round_page(etext)) - 1.
1890 */
1891 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1892 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1893#ifdef SMP
1894 gdt_segs[GPRIV_SEL].ssd_limit =
1895 atop(sizeof(struct privatespace) - 1);
1896 gdt_segs[GPRIV_SEL].ssd_base = (int) &SMP_prvspace[0];
1897 gdt_segs[GPROC0_SEL].ssd_base =
1898 (int) &SMP_prvspace[0].globaldata.gd_common_tss;
1899 SMP_prvspace[0].globaldata.gd_prvspace = &SMP_prvspace[0];
1900#else
1901 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
1902 gdt_segs[GPROC0_SEL].ssd_base = (int) &common_tss;
1903#endif
1904
1905 for (x = 0; x < NGDT; x++) {
1906#ifdef BDE_DEBUGGER
1907 /* avoid overwriting db entries with APM ones */
1908 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1909 continue;
1910#endif
1911 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1912 }
1913
1914 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1915 r_gdt.rd_base = (int) gdt;
1916 lgdt(&r_gdt);
1917
1918 /* make ldt memory segments */
1919 /*
1920 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1921 * should be spelled ...MAX_USER...
1922 */
1923 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1924 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1925 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1926 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1927
1928 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1929 lldt(_default_ldt);
1930#ifdef USER_LDT
1931 currentldt = _default_ldt;
1932#endif
1933
1934 /* exceptions */
1935 for (x = 0; x < NIDT; x++)
1936 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1937 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1938 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1939 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1940 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1941 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1942 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1943 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1944 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1946 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1947 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1948 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1949 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1952 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1953 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(0x80, &IDTVEC(int0x80_syscall),
1958 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1959
1960 r_idt.rd_limit = sizeof(idt0) - 1;
1961 r_idt.rd_base = (int) idt;
1962 lidt(&r_idt);
1963
1964 /*
1965 * Initialize the console before we print anything out.
1966 */
1967 cninit();
1968
1969 if (metadata_missing)
1970 printf("WARNING: loader(8) metadata is missing!\n");
1971
1972#include "isa.h"
1973#if NISA >0
1974 isa_defaultirq();
1975#endif
1976 rand_initialize();
1977
1978#ifdef DDB
1979 kdb_init();
1980 if (boothowto & RB_KDB)
1981 Debugger("Boot flags requested debugger");
1982#endif
1983
1984 finishidentcpu(); /* Final stage of CPU initialization */
1985 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1986 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1987 initializecpu(); /* Initialize CPU registers */
1988
1989 /* make an initial tss so cpu can get interrupt stack on syscall! */
1990 common_tss.tss_esp0 = (int) proc0.p_addr + UPAGES*PAGE_SIZE - 16;
1991 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1992 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1993 private_tss = 0;
1994 tss_gdt = &gdt[GPROC0_SEL].sd;
1995 common_tssd = *tss_gdt;
1996 common_tss.tss_ioopt = (sizeof common_tss) << 16;
1997 ltr(gsel_tss);
1998
1999 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2000 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2001 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2002 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2003 dblfault_tss.tss_cr3 = (int)IdlePTD;
2004 dblfault_tss.tss_eip = (int) dblfault_handler;
2005 dblfault_tss.tss_eflags = PSL_KERNEL;
2006 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2007 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2008 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2009 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2010 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2011
2012 vm86_initialize();
2013 getmemsize(first);
2014 init_param2(physmem);
2015
2016 /* now running on new page tables, configured,and u/iom is accessible */
2017
2018 /* Map the message buffer. */
2019 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2020 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2021
2022 msgbufinit(msgbufp, MSGBUF_SIZE);
2023
2024 /* make a call gate to reenter kernel with */
2025 gdp = &ldt[LSYS5CALLS_SEL].gd;
2026
2027 x = (int) &IDTVEC(syscall);
2028 gdp->gd_looffset = x++;
2029 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2030 gdp->gd_stkcpy = 1;
2031 gdp->gd_type = SDT_SYS386CGT;
2032 gdp->gd_dpl = SEL_UPL;
2033 gdp->gd_p = 1;
2034 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2035
2036 /* XXX does this work? */
2037 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2038 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2039
2040 /* transfer to user mode */
2041
2042 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2043 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2044
2045 /* setup proc 0's pcb */
2046 proc0.p_addr->u_pcb.pcb_flags = 0;
2047 proc0.p_addr->u_pcb.pcb_cr3 = (int)IdlePTD;
2048#ifdef SMP
2049 proc0.p_addr->u_pcb.pcb_mpnest = 1;
2050#endif
2051 proc0.p_addr->u_pcb.pcb_ext = 0;
2052 proc0.p_md.md_regs = &proc0_tf;
2053}
2054
2055#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2056static void f00f_hack(void *unused);
2057SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2058
2059static void
2060f00f_hack(void *unused) {
2061 struct gate_descriptor *new_idt;
2062#ifndef SMP
2063 struct region_descriptor r_idt;
2064#endif
2065 vm_offset_t tmp;
2066
2067 if (!has_f00f_bug)
2068 return;
2069
2070 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2071
2072 r_idt.rd_limit = sizeof(idt0) - 1;
2073
2074 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2075 if (tmp == 0)
2076 panic("kmem_alloc returned 0");
2077 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2078 panic("kmem_alloc returned non-page-aligned memory");
2079 /* Put the first seven entries in the lower page */
2080 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2081 bcopy(idt, new_idt, sizeof(idt0));
2082 r_idt.rd_base = (int)new_idt;
2083 lidt(&r_idt);
2084 idt = new_idt;
2085 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2086 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2087 panic("vm_map_protect failed");
2088 return;
2089}
2090#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2091
2092int
2093ptrace_set_pc(p, addr)
2094 struct proc *p;
2095 unsigned long addr;
2096{
2097 p->p_md.md_regs->tf_eip = addr;
2098 return (0);
2099}
2100
2101int
2102ptrace_single_step(p)
2103 struct proc *p;
2104{
2105 p->p_md.md_regs->tf_eflags |= PSL_T;
2106 return (0);
2107}
2108
2109int ptrace_read_u_check(p, addr, len)
2110 struct proc *p;
2111 vm_offset_t addr;
2112 size_t len;
2113{
2114 vm_offset_t gap;
2115
2116 if ((vm_offset_t) (addr + len) < addr)
2117 return EPERM;
2118 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2119 return 0;
2120
2121 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2122
2123 if ((vm_offset_t) addr < gap)
2124 return EPERM;
2125 if ((vm_offset_t) (addr + len) <=
2126 (vm_offset_t) (gap + sizeof(struct trapframe)))
2127 return 0;
2128 return EPERM;
2129}
2130
2131int ptrace_write_u(p, off, data)
2132 struct proc *p;
2133 vm_offset_t off;
2134 long data;
2135{
2136 struct trapframe frame_copy;
2137 vm_offset_t min;
2138 struct trapframe *tp;
2139
2140 /*
2141 * Privileged kernel state is scattered all over the user area.
2142 * Only allow write access to parts of regs and to fpregs.
2143 */
2144 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2145 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2146 tp = p->p_md.md_regs;
2147 frame_copy = *tp;
2148 *(int *)((char *)&frame_copy + (off - min)) = data;
2149 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2150 !CS_SECURE(frame_copy.tf_cs))
2151 return (EINVAL);
2152 *(int*)((char *)p->p_addr + off) = data;
2153 return (0);
2154 }
2155 min = offsetof(struct user, u_pcb) + offsetof(struct pcb, pcb_save);
2156 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2157 *(int*)((char *)p->p_addr + off) = data;
2158 return (0);
2159 }
2160 return (EFAULT);
2161}
2162
2163int
2164fill_regs(p, regs)
2165 struct proc *p;
2166 struct reg *regs;
2167{
2168 struct pcb *pcb;
2169 struct trapframe *tp;
2170
2171 tp = p->p_md.md_regs;
2172 regs->r_fs = tp->tf_fs;
2173 regs->r_es = tp->tf_es;
2174 regs->r_ds = tp->tf_ds;
2175 regs->r_edi = tp->tf_edi;
2176 regs->r_esi = tp->tf_esi;
2177 regs->r_ebp = tp->tf_ebp;
2178 regs->r_ebx = tp->tf_ebx;
2179 regs->r_edx = tp->tf_edx;
2180 regs->r_ecx = tp->tf_ecx;
2181 regs->r_eax = tp->tf_eax;
2182 regs->r_eip = tp->tf_eip;
2183 regs->r_cs = tp->tf_cs;
2184 regs->r_eflags = tp->tf_eflags;
2185 regs->r_esp = tp->tf_esp;
2186 regs->r_ss = tp->tf_ss;
2187 pcb = &p->p_addr->u_pcb;
2188 regs->r_gs = pcb->pcb_gs;
2189 return (0);
2190}
2191
2192int
2193set_regs(p, regs)
2194 struct proc *p;
2195 struct reg *regs;
2196{
2197 struct pcb *pcb;
2198 struct trapframe *tp;
2199
2200 tp = p->p_md.md_regs;
2201 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2202 !CS_SECURE(regs->r_cs))
2203 return (EINVAL);
2204 tp->tf_fs = regs->r_fs;
2205 tp->tf_es = regs->r_es;
2206 tp->tf_ds = regs->r_ds;
2207 tp->tf_edi = regs->r_edi;
2208 tp->tf_esi = regs->r_esi;
2209 tp->tf_ebp = regs->r_ebp;
2210 tp->tf_ebx = regs->r_ebx;
2211 tp->tf_edx = regs->r_edx;
2212 tp->tf_ecx = regs->r_ecx;
2213 tp->tf_eax = regs->r_eax;
2214 tp->tf_eip = regs->r_eip;
2215 tp->tf_cs = regs->r_cs;
2216 tp->tf_eflags = regs->r_eflags;
2217 tp->tf_esp = regs->r_esp;
2218 tp->tf_ss = regs->r_ss;
2219 pcb = &p->p_addr->u_pcb;
2220 pcb->pcb_gs = regs->r_gs;
2221 return (0);
2222}
2223
2224#ifdef CPU_ENABLE_SSE
2225static void
2226fill_fpregs_xmm(sv_xmm, sv_87)
2227 struct savexmm *sv_xmm;
2228 struct save87 *sv_87;
2229{
2230 register struct env87 *penv_87 = &sv_87->sv_env;
2231 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2232 int i;
2233
2234 /* FPU control/status */
2235 penv_87->en_cw = penv_xmm->en_cw;
2236 penv_87->en_sw = penv_xmm->en_sw;
2237 penv_87->en_tw = penv_xmm->en_tw;
2238 penv_87->en_fip = penv_xmm->en_fip;
2239 penv_87->en_fcs = penv_xmm->en_fcs;
2240 penv_87->en_opcode = penv_xmm->en_opcode;
2241 penv_87->en_foo = penv_xmm->en_foo;
2242 penv_87->en_fos = penv_xmm->en_fos;
2243
2244 /* FPU registers */
2245 for (i = 0; i < 8; ++i)
2246 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2247
2248 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2249}
2250
2251static void
2252set_fpregs_xmm(sv_87, sv_xmm)
2253 struct save87 *sv_87;
2254 struct savexmm *sv_xmm;
2255{
2256 register struct env87 *penv_87 = &sv_87->sv_env;
2257 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2258 int i;
2259
2260 /* FPU control/status */
2261 penv_xmm->en_cw = penv_87->en_cw;
2262 penv_xmm->en_sw = penv_87->en_sw;
2263 penv_xmm->en_tw = penv_87->en_tw;
2264 penv_xmm->en_fip = penv_87->en_fip;
2265 penv_xmm->en_fcs = penv_87->en_fcs;
2266 penv_xmm->en_opcode = penv_87->en_opcode;
2267 penv_xmm->en_foo = penv_87->en_foo;
2268 penv_xmm->en_fos = penv_87->en_fos;
2269
2270 /* FPU registers */
2271 for (i = 0; i < 8; ++i)
2272 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2273
2274 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2275}
2276#endif /* CPU_ENABLE_SSE */
2277
2278int
2279fill_fpregs(p, fpregs)
2280 struct proc *p;
2281 struct fpreg *fpregs;
2282{
2283#ifdef CPU_ENABLE_SSE
2284 if (cpu_fxsr) {
2285 fill_fpregs_xmm(&p->p_addr->u_pcb.pcb_save.sv_xmm,
2286 (struct save87 *)fpregs);
2287 return (0);
2288 }
2289#endif /* CPU_ENABLE_SSE */
2290 bcopy(&p->p_addr->u_pcb.pcb_save.sv_87, fpregs, sizeof *fpregs);
2291 return (0);
2292}
2293
2294int
2295set_fpregs(p, fpregs)
2296 struct proc *p;
2297 struct fpreg *fpregs;
2298{
2299#ifdef CPU_ENABLE_SSE
2300 if (cpu_fxsr) {
2301 set_fpregs_xmm((struct save87 *)fpregs,
2302 &p->p_addr->u_pcb.pcb_save.sv_xmm);
2303 return (0);
2304 }
2305#endif /* CPU_ENABLE_SSE */
2306 bcopy(fpregs, &p->p_addr->u_pcb.pcb_save.sv_87, sizeof *fpregs);
2307 return (0);
2308}
2309
2310int
2311fill_dbregs(p, dbregs)
2312 struct proc *p;
2313 struct dbreg *dbregs;
2314{
2315 struct pcb *pcb;
2316
2317 if (p == NULL) {
2318 dbregs->dr0 = rdr0();
2319 dbregs->dr1 = rdr1();
2320 dbregs->dr2 = rdr2();
2321 dbregs->dr3 = rdr3();
2322 dbregs->dr4 = rdr4();
2323 dbregs->dr5 = rdr5();
2324 dbregs->dr6 = rdr6();
2325 dbregs->dr7 = rdr7();
2326 }
2327 else {
2328 pcb = &p->p_addr->u_pcb;
2329 dbregs->dr0 = pcb->pcb_dr0;
2330 dbregs->dr1 = pcb->pcb_dr1;
2331 dbregs->dr2 = pcb->pcb_dr2;
2332 dbregs->dr3 = pcb->pcb_dr3;
2333 dbregs->dr4 = 0;
2334 dbregs->dr5 = 0;
2335 dbregs->dr6 = pcb->pcb_dr6;
2336 dbregs->dr7 = pcb->pcb_dr7;
2337 }
2338 return (0);
2339}
2340
2341int
2342set_dbregs(p, dbregs)
2343 struct proc *p;
2344 struct dbreg *dbregs;
2345{
2346 struct pcb *pcb;
2347 int i;
2348 u_int32_t mask1, mask2;
2349
2350 if (p == NULL) {
2351 load_dr0(dbregs->dr0);
2352 load_dr1(dbregs->dr1);
2353 load_dr2(dbregs->dr2);
2354 load_dr3(dbregs->dr3);
2355 load_dr4(dbregs->dr4);
2356 load_dr5(dbregs->dr5);
2357 load_dr6(dbregs->dr6);
2358 load_dr7(dbregs->dr7);
2359 }
2360 else {
2361 /*
2362 * Don't let an illegal value for dr7 get set. Specifically,
2363 * check for undefined settings. Setting these bit patterns
2364 * result in undefined behaviour and can lead to an unexpected
2365 * TRCTRAP.
2366 */
2367 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2368 i++, mask1 <<= 2, mask2 <<= 2)
2369 if ((dbregs->dr7 & mask1) == mask2)
2370 return (EINVAL);
2371
2372 pcb = &p->p_addr->u_pcb;
2373
2374 /*
2375 * Don't let a process set a breakpoint that is not within the
2376 * process's address space. If a process could do this, it
2377 * could halt the system by setting a breakpoint in the kernel
2378 * (if ddb was enabled). Thus, we need to check to make sure
2379 * that no breakpoints are being enabled for addresses outside
2380 * process's address space, unless, perhaps, we were called by
2381 * uid 0.
2382 *
2383 * XXX - what about when the watched area of the user's
2384 * address space is written into from within the kernel
2385 * ... wouldn't that still cause a breakpoint to be generated
2386 * from within kernel mode?
2387 */
2388
2389 if (suser(p) != 0) {
2390 if (dbregs->dr7 & 0x3) {
2391 /* dr0 is enabled */
2392 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2393 return (EINVAL);
2394 }
2395
2396 if (dbregs->dr7 & (0x3<<2)) {
2397 /* dr1 is enabled */
2398 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2399 return (EINVAL);
2400 }
2401
2402 if (dbregs->dr7 & (0x3<<4)) {
2403 /* dr2 is enabled */
2404 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2405 return (EINVAL);
2406 }
2407
2408 if (dbregs->dr7 & (0x3<<6)) {
2409 /* dr3 is enabled */
2410 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2411 return (EINVAL);
2412 }
2413 }
2414
2415 pcb->pcb_dr0 = dbregs->dr0;
2416 pcb->pcb_dr1 = dbregs->dr1;
2417 pcb->pcb_dr2 = dbregs->dr2;
2418 pcb->pcb_dr3 = dbregs->dr3;
2419 pcb->pcb_dr6 = dbregs->dr6;
2420 pcb->pcb_dr7 = dbregs->dr7;
2421
2422 pcb->pcb_flags |= PCB_DBREGS;
2423 }
2424
2425 return (0);
2426}
2427
2428/*
2429 * Return > 0 if a hardware breakpoint has been hit, and the
2430 * breakpoint was in user space. Return 0, otherwise.
2431 */
2432int
2433user_dbreg_trap(void)
2434{
2435 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2436 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2437 int nbp; /* number of breakpoints that triggered */
2438 caddr_t addr[4]; /* breakpoint addresses */
2439 int i;
2440
2441 dr7 = rdr7();
2442 if ((dr7 & 0x000000ff) == 0) {
2443 /*
2444 * all GE and LE bits in the dr7 register are zero,
2445 * thus the trap couldn't have been caused by the
2446 * hardware debug registers
2447 */
2448 return 0;
2449 }
2450
2451 nbp = 0;
2452 dr6 = rdr6();
2453 bp = dr6 & 0x0000000f;
2454
2455 if (!bp) {
2456 /*
2457 * None of the breakpoint bits are set meaning this
2458 * trap was not caused by any of the debug registers
2459 */
2460 return 0;
2461 }
2462
2463 /*
2464 * at least one of the breakpoints were hit, check to see
2465 * which ones and if any of them are user space addresses
2466 */
2467
2468 if (bp & 0x01) {
2469 addr[nbp++] = (caddr_t)rdr0();
2470 }
2471 if (bp & 0x02) {
2472 addr[nbp++] = (caddr_t)rdr1();
2473 }
2474 if (bp & 0x04) {
2475 addr[nbp++] = (caddr_t)rdr2();
2476 }
2477 if (bp & 0x08) {
2478 addr[nbp++] = (caddr_t)rdr3();
2479 }
2480
2481 for (i=0; i<nbp; i++) {
2482 if (addr[i] <
2483 (caddr_t)VM_MAXUSER_ADDRESS) {
2484 /*
2485 * addr[i] is in user space
2486 */
2487 return nbp;
2488 }
2489 }
2490
2491 /*
2492 * None of the breakpoints are in user space.
2493 */
2494 return 0;
2495}
2496
2497
2498#ifndef DDB
2499void
2500Debugger(const char *msg)
2501{
2502 printf("Debugger(\"%s\") called.\n", msg);
2503}
2504#endif /* no DDB */
2505
2506#include <sys/disklabel.h>
2507
2508/*
2509 * Determine the size of the transfer, and make sure it is
2510 * within the boundaries of the partition. Adjust transfer
2511 * if needed, and signal errors or early completion.
2512 */
2513int
2514bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2515{
2516 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2517 int labelsect = lp->d_partitions[0].p_offset;
2518 int maxsz = p->p_size,
2519 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2520
2521 /* overwriting disk label ? */
2522 /* XXX should also protect bootstrap in first 8K */
2523 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2524#if LABELSECTOR != 0
2525 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2526#endif
2527 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2528 bp->b_error = EROFS;
2529 goto bad;
2530 }
2531
2532#if defined(DOSBBSECTOR) && defined(notyet)
2533 /* overwriting master boot record? */
2534 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2535 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2536 bp->b_error = EROFS;
2537 goto bad;
2538 }
2539#endif
2540
2541 /* beyond partition? */
2542 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2543 /* if exactly at end of disk, return an EOF */
2544 if (bp->b_blkno == maxsz) {
2545 bp->b_resid = bp->b_bcount;
2546 return(0);
2547 }
2548 /* or truncate if part of it fits */
2549 sz = maxsz - bp->b_blkno;
2550 if (sz <= 0) {
2551 bp->b_error = EINVAL;
2552 goto bad;
2553 }
2554 bp->b_bcount = sz << DEV_BSHIFT;
2555 }
2556
2557 bp->b_pblkno = bp->b_blkno + p->p_offset;
2558 return(1);
2559
2560bad:
2561 bp->b_flags |= B_ERROR;
2562 return(-1);
2563}
2564
2565#ifdef DDB
2566
2567/*
2568 * Provide inb() and outb() as functions. They are normally only
2569 * available as macros calling inlined functions, thus cannot be
2570 * called inside DDB.
2571 *
2572 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2573 */
2574
2575#undef inb
2576#undef outb
2577
2578/* silence compiler warnings */
2579u_char inb(u_int);
2580void outb(u_int, u_char);
2581
2582u_char
2583inb(u_int port)
2584{
2585 u_char data;
2586 /*
2587 * We use %%dx and not %1 here because i/o is done at %dx and not at
2588 * %edx, while gcc generates inferior code (movw instead of movl)
2589 * if we tell it to load (u_short) port.
2590 */
2591 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2592 return (data);
2593}
2594
2595void
2596outb(u_int port, u_char data)
2597{
2598 u_char al;
2599 /*
2600 * Use an unnecessary assignment to help gcc's register allocator.
2601 * This make a large difference for gcc-1.40 and a tiny difference
2602 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2603 * best results. gcc-2.6.0 can't handle this.
2604 */
2605 al = data;
2606 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2607}
2608
2609#endif /* DDB */