kernel - Add additional safety assertions in the pmap path
[dragonfly.git] / sys / platform / pc64 / x86_64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
48ffc236
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
701c977e 9 * Copyright (c) 2011 Matthew Dillon
d7f50089 10 * All rights reserved.
c8fe38ae
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11 *
12 * This code is derived from software contributed to Berkeley by
13 * the Systems Programming Group of the University of Utah Computer
14 * Science Department and William Jolitz of UUNET Technologies Inc.
15 *
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16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
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19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
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22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. All advertising materials mentioning features or use of this software
25 * must display the following acknowledgement:
26 * This product includes software developed by the University of
27 * California, Berkeley and its contributors.
28 * 4. Neither the name of the University nor the names of its contributors
29 * may be used to endorse or promote products derived from this software
30 * without specific prior written permission.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 42 * SUCH DAMAGE.
d7f50089
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43 */
44/*
90244566 45 * Manage physical address maps for x86-64 systems.
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46 */
47
48#if JG
49#include "opt_disable_pse.h"
50#include "opt_pmap.h"
51#endif
52#include "opt_msgbuf.h"
d7f50089 53
c8fe38ae 54#include <sys/param.h>
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55#include <sys/systm.h>
56#include <sys/kernel.h>
d7f50089 57#include <sys/proc.h>
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58#include <sys/msgbuf.h>
59#include <sys/vmmeter.h>
60#include <sys/mman.h>
d7f50089 61
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62#include <vm/vm.h>
63#include <vm/vm_param.h>
64#include <sys/sysctl.h>
65#include <sys/lock.h>
d7f50089 66#include <vm/vm_kern.h>
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67#include <vm/vm_page.h>
68#include <vm/vm_map.h>
d7f50089 69#include <vm/vm_object.h>
c8fe38ae 70#include <vm/vm_extern.h>
d7f50089 71#include <vm/vm_pageout.h>
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72#include <vm/vm_pager.h>
73#include <vm/vm_zone.h>
74
75#include <sys/user.h>
76#include <sys/thread2.h>
77#include <sys/sysref2.h>
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78#include <sys/spinlock2.h>
79#include <vm/vm_page2.h>
d7f50089 80
c8fe38ae 81#include <machine/cputypes.h>
d7f50089 82#include <machine/md_var.h>
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83#include <machine/specialreg.h>
84#include <machine/smp.h>
85#include <machine_base/apic/apicreg.h>
d7f50089 86#include <machine/globaldata.h>
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87#include <machine/pmap.h>
88#include <machine/pmap_inval.h>
7e9313e0 89#include <machine/inttypes.h>
c8fe38ae 90
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91#include <ddb/ddb.h>
92
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93#define PMAP_KEEP_PDIRS
94#ifndef PMAP_SHPGPERPROC
f1d3f422 95#define PMAP_SHPGPERPROC 2000
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96#endif
97
98#if defined(DIAGNOSTIC)
99#define PMAP_DIAGNOSTIC
100#endif
101
102#define MINPV 2048
103
c8fe38ae 104/*
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105 * pmap debugging will report who owns a pv lock when blocking.
106 */
107#ifdef PMAP_DEBUG
108
109#define PMAP_DEBUG_DECL ,const char *func, int lineno
110#define PMAP_DEBUG_ARGS , __func__, __LINE__
111#define PMAP_DEBUG_COPY , func, lineno
112
113#define pv_get(pmap, pindex) _pv_get(pmap, pindex \
114 PMAP_DEBUG_ARGS)
115#define pv_lock(pv) _pv_lock(pv \
116 PMAP_DEBUG_ARGS)
117#define pv_hold_try(pv) _pv_hold_try(pv \
118 PMAP_DEBUG_ARGS)
119#define pv_alloc(pmap, pindex, isnewp) _pv_alloc(pmap, pindex, isnewp \
120 PMAP_DEBUG_ARGS)
121
122#else
123
124#define PMAP_DEBUG_DECL
125#define PMAP_DEBUG_ARGS
126#define PMAP_DEBUG_COPY
127
128#define pv_get(pmap, pindex) _pv_get(pmap, pindex)
129#define pv_lock(pv) _pv_lock(pv)
130#define pv_hold_try(pv) _pv_hold_try(pv)
131#define pv_alloc(pmap, pindex, isnewp) _pv_alloc(pmap, pindex, isnewp)
132
133#endif
134
135/*
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136 * Get PDEs and PTEs for user/kernel address space
137 */
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138#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
139
140#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
141#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
142#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
143#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
144#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
145
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146/*
147 * Given a map and a machine independent protection code,
148 * convert to a vax protection code.
149 */
150#define pte_prot(m, p) \
151 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
152static int protection_codes[8];
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153
154struct pmap kernel_pmap;
c8fe38ae 155static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 156
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157vm_paddr_t avail_start; /* PA of first available physical page */
158vm_paddr_t avail_end; /* PA of last available physical page */
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159vm_offset_t virtual2_start; /* cutout free area prior to kernel start */
160vm_offset_t virtual2_end;
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161vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
162vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
163vm_offset_t KvaStart; /* VA start of KVA space */
164vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
165vm_offset_t KvaSize; /* max size of kernel virtual address space */
166static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
167static int pgeflag; /* PG_G or-in */
168static int pseflag; /* PG_PS or-in */
d7f50089 169
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170static int ndmpdp;
171static vm_paddr_t dmaplimit;
c8fe38ae 172static int nkpt;
791c6551 173vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
d7f50089 174
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175static uint64_t KPTbase;
176static uint64_t KPTphys;
48ffc236 177static uint64_t KPDphys; /* phys addr of kernel level 2 */
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178static uint64_t KPDbase; /* phys addr of kernel level 2 @ KERNBASE */
179uint64_t KPDPphys; /* phys addr of kernel level 3 */
180uint64_t KPML4phys; /* phys addr of kernel level 4 */
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181
182static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
183static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
184
d7f50089 185/*
c8fe38ae 186 * Data for the pv entry allocation mechanism
d7f50089 187 */
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188static vm_zone_t pvzone;
189static struct vm_zone pvzone_store;
190static struct vm_object pvzone_obj;
701c977e 191static int pv_entry_max=0, pv_entry_high_water=0;
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192static int pmap_pagedaemon_waken = 0;
193static struct pv_entry *pvinit;
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194
195/*
c8fe38ae 196 * All those kernel PT submaps that BSD is so fond of
d7f50089 197 */
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198pt_entry_t *CMAP1 = 0, *ptmmap;
199caddr_t CADDR1 = 0, ptvmmap = 0;
200static pt_entry_t *msgbufmap;
201struct msgbuf *msgbufp=0;
d7f50089 202
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203/*
204 * Crashdump maps.
d7f50089 205 */
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206static pt_entry_t *pt_crashdumpmap;
207static caddr_t crashdumpmap;
208
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209static int pmap_yield_count = 64;
210SYSCTL_INT(_machdep, OID_AUTO, pmap_yield_count, CTLFLAG_RW,
211 &pmap_yield_count, 0, "Yield during init_pt/release");
212
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213#define DISABLE_PSE
214
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215static void pv_hold(pv_entry_t pv);
216static int _pv_hold_try(pv_entry_t pv
217 PMAP_DEBUG_DECL);
218static void pv_drop(pv_entry_t pv);
219static void _pv_lock(pv_entry_t pv
220 PMAP_DEBUG_DECL);
221static void pv_unlock(pv_entry_t pv);
222static pv_entry_t _pv_alloc(pmap_t pmap, vm_pindex_t pindex, int *isnew
223 PMAP_DEBUG_DECL);
224static pv_entry_t _pv_get(pmap_t pmap, vm_pindex_t pindex
225 PMAP_DEBUG_DECL);
226static pv_entry_t pv_get_try(pmap_t pmap, vm_pindex_t pindex, int *errorp);
227static pv_entry_t pv_find(pmap_t pmap, vm_pindex_t pindex);
228static void pv_put(pv_entry_t pv);
229static void pv_free(pv_entry_t pv);
230static void *pv_pte_lookup(pv_entry_t pv, vm_pindex_t pindex);
231static pv_entry_t pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex,
232 pv_entry_t *pvpp);
233static void pmap_remove_pv_pte(pv_entry_t pv, pv_entry_t pvp,
234 struct pmap_inval_info *info);
52bb73bc 235static vm_page_t pmap_remove_pv_page(pv_entry_t pv);
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236
237static void pmap_remove_callback(pmap_t pmap, struct pmap_inval_info *info,
238 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
239 pt_entry_t *ptep, void *arg __unused);
240static void pmap_protect_callback(pmap_t pmap, struct pmap_inval_info *info,
241 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
242 pt_entry_t *ptep, void *arg __unused);
243
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244static void i386_protection_init (void);
245static void create_pagetables(vm_paddr_t *firstaddr);
246static void pmap_remove_all (vm_page_t m);
c8fe38ae 247static boolean_t pmap_testbit (vm_page_t m, int bit);
c8fe38ae 248
c8fe38ae 249static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
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250static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
251
252static unsigned pdir4mb;
d7f50089 253
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254static int
255pv_entry_compare(pv_entry_t pv1, pv_entry_t pv2)
256{
257 if (pv1->pv_pindex < pv2->pv_pindex)
258 return(-1);
259 if (pv1->pv_pindex > pv2->pv_pindex)
260 return(1);
261 return(0);
262}
263
264RB_GENERATE2(pv_entry_rb_tree, pv_entry, pv_entry,
265 pv_entry_compare, vm_pindex_t, pv_pindex);
266
d7f50089 267/*
c8fe38ae 268 * Move the kernel virtual free pointer to the next
f9cc0f15
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269 * 2MB. This is used to help improve performance
270 * by using a large (2MB) page for much of the kernel
c8fe38ae 271 * (.text, .data, .bss)
d7f50089 272 */
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273static
274vm_offset_t
c8fe38ae 275pmap_kmem_choose(vm_offset_t addr)
d7f50089 276{
c8fe38ae 277 vm_offset_t newaddr = addr;
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278
279 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 280 return newaddr;
d7f50089
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281}
282
d7f50089 283/*
c8fe38ae 284 * pmap_pte_quick:
d7f50089 285 *
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286 * Super fast pmap_pte routine best used when scanning the pv lists.
287 * This eliminates many course-grained invltlb calls. Note that many of
288 * the pv list scans are across different pmaps and it is very wasteful
289 * to do an entire invltlb when checking a single mapping.
c8fe38ae 290 */
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291static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
292
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293static
294pt_entry_t *
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295pmap_pte_quick(pmap_t pmap, vm_offset_t va)
296{
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297 return pmap_pte(pmap, va);
298}
299
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300/*
301 * Returns the pindex of a page table entry (representing a terminal page).
302 * There are NUPTE_TOTAL page table entries possible (a huge number)
303 *
304 * x86-64 has a 48-bit address space, where bit 47 is sign-extended out.
305 * We want to properly translate negative KVAs.
306 */
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307static __inline
308vm_pindex_t
701c977e 309pmap_pte_pindex(vm_offset_t va)
48ffc236 310{
701c977e 311 return ((va >> PAGE_SHIFT) & (NUPTE_TOTAL - 1));
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312}
313
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314/*
315 * Returns the pindex of a page table.
316 */
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317static __inline
318vm_pindex_t
701c977e 319pmap_pt_pindex(vm_offset_t va)
48ffc236 320{
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321 return (NUPTE_TOTAL + ((va >> PDRSHIFT) & (NUPT_TOTAL - 1)));
322}
48ffc236 323
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324/*
325 * Returns the pindex of a page directory.
326 */
327static __inline
328vm_pindex_t
329pmap_pd_pindex(vm_offset_t va)
330{
331 return (NUPTE_TOTAL + NUPT_TOTAL +
332 ((va >> PDPSHIFT) & (NUPD_TOTAL - 1)));
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333}
334
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335static __inline
336vm_pindex_t
701c977e 337pmap_pdp_pindex(vm_offset_t va)
48ffc236 338{
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339 return (NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL +
340 ((va >> PML4SHIFT) & (NUPDP_TOTAL - 1)));
341}
48ffc236 342
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343static __inline
344vm_pindex_t
345pmap_pml4_pindex(void)
346{
347 return (NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL + NUPDP_TOTAL);
48ffc236
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348}
349
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350/*
351 * Return various clipped indexes for a given VA
352 *
353 * Returns the index of a pte in a page table, representing a terminal
354 * page.
355 */
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356static __inline
357vm_pindex_t
701c977e 358pmap_pte_index(vm_offset_t va)
48ffc236 359{
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360 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
361}
48ffc236 362
701c977e
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363/*
364 * Returns the index of a pt in a page directory, representing a page
365 * table.
366 */
367static __inline
368vm_pindex_t
369pmap_pt_index(vm_offset_t va)
370{
371 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
48ffc236
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372}
373
701c977e
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374/*
375 * Returns the index of a pd in a page directory page, representing a page
376 * directory.
377 */
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378static __inline
379vm_pindex_t
701c977e 380pmap_pd_index(vm_offset_t va)
48ffc236 381{
701c977e
MD
382 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
383}
48ffc236 384
701c977e
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385/*
386 * Returns the index of a pdp in the pml4 table, representing a page
387 * directory page.
388 */
389static __inline
390vm_pindex_t
391pmap_pdp_index(vm_offset_t va)
392{
48ffc236
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393 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
394}
395
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396/*
397 * Generic procedure to index a pte from a pt, pd, or pdp.
398 */
399static
400void *
401pv_pte_lookup(pv_entry_t pv, vm_pindex_t pindex)
402{
403 pt_entry_t *pte;
404
405 pte = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pv->pv_m));
406 return(&pte[pindex]);
407}
408
409/*
410 * Return pointer to PDP slot in the PML4
411 */
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412static __inline
413pml4_entry_t *
701c977e 414pmap_pdp(pmap_t pmap, vm_offset_t va)
48ffc236 415{
701c977e 416 return (&pmap->pm_pml4[pmap_pdp_index(va)]);
48ffc236
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417}
418
701c977e
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419/*
420 * Return pointer to PD slot in the PDP given a pointer to the PDP
421 */
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422static __inline
423pdp_entry_t *
701c977e 424pmap_pdp_to_pd(pml4_entry_t *pdp, vm_offset_t va)
48ffc236 425{
701c977e 426 pdp_entry_t *pd;
48ffc236 427
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428 pd = (pdp_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
429 return (&pd[pmap_pd_index(va)]);
48ffc236
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430}
431
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432/*
433 * Return pointer to PD slot in the PDP
434 **/
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435static __inline
436pdp_entry_t *
701c977e 437pmap_pd(pmap_t pmap, vm_offset_t va)
48ffc236 438{
701c977e 439 pml4_entry_t *pdp;
48ffc236 440
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441 pdp = pmap_pdp(pmap, va);
442 if ((*pdp & PG_V) == 0)
48ffc236 443 return NULL;
701c977e 444 return (pmap_pdp_to_pd(pdp, va));
48ffc236
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445}
446
701c977e
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447/*
448 * Return pointer to PT slot in the PD given a pointer to the PD
449 */
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450static __inline
451pd_entry_t *
701c977e 452pmap_pd_to_pt(pdp_entry_t *pd, vm_offset_t va)
48ffc236 453{
701c977e 454 pd_entry_t *pt;
48ffc236 455
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456 pt = (pd_entry_t *)PHYS_TO_DMAP(*pd & PG_FRAME);
457 return (&pt[pmap_pt_index(va)]);
48ffc236
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458}
459
701c977e
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460/*
461 * Return pointer to PT slot in the PD
462 */
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463static __inline
464pd_entry_t *
701c977e 465pmap_pt(pmap_t pmap, vm_offset_t va)
48ffc236 466{
701c977e 467 pdp_entry_t *pd;
48ffc236 468
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MD
469 pd = pmap_pd(pmap, va);
470 if (pd == NULL || (*pd & PG_V) == 0)
48ffc236 471 return NULL;
701c977e 472 return (pmap_pd_to_pt(pd, va));
48ffc236
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473}
474
701c977e
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475/*
476 * Return pointer to PTE slot in the PT given a pointer to the PT
477 */
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478static __inline
479pt_entry_t *
701c977e 480pmap_pt_to_pte(pd_entry_t *pt, vm_offset_t va)
48ffc236
JG
481{
482 pt_entry_t *pte;
483
701c977e 484 pte = (pt_entry_t *)PHYS_TO_DMAP(*pt & PG_FRAME);
48ffc236
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485 return (&pte[pmap_pte_index(va)]);
486}
487
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488/*
489 * Return pointer to PTE slot in the PT
490 */
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491static __inline
492pt_entry_t *
48ffc236 493pmap_pte(pmap_t pmap, vm_offset_t va)
48ffc236 494{
701c977e 495 pd_entry_t *pt;
48ffc236 496
701c977e
MD
497 pt = pmap_pt(pmap, va);
498 if (pt == NULL || (*pt & PG_V) == 0)
499 return NULL;
500 if ((*pt & PG_PS) != 0)
501 return ((pt_entry_t *)pt);
502 return (pmap_pt_to_pte(pt, va));
48ffc236
JG
503}
504
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505/*
506 * Of all the layers (PTE, PT, PD, PDP, PML4) the best one to cache is
507 * the PT layer. This will speed up core pmap operations considerably.
508 */
bfc09ba0 509static __inline
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510void
511pv_cache(pv_entry_t pv, vm_pindex_t pindex)
48ffc236 512{
701c977e
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513 if (pindex >= pmap_pt_pindex(0) && pindex <= pmap_pd_pindex(0))
514 pv->pv_pmap->pm_pvhint = pv;
c8fe38ae 515}
d7f50089 516
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517
518/*
519 * KVM - return address of PT slot in PD
520 */
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521static __inline
522pd_entry_t *
701c977e 523vtopt(vm_offset_t va)
48ffc236 524{
b12defdc
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525 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT +
526 NPML4EPGSHIFT)) - 1);
48ffc236
JG
527
528 return (PDmap + ((va >> PDRSHIFT) & mask));
529}
c8fe38ae 530
701c977e
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531/*
532 * KVM - return address of PTE slot in PT
533 */
534static __inline
535pt_entry_t *
536vtopte(vm_offset_t va)
537{
538 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT +
539 NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
540
541 return (PTmap + ((va >> PAGE_SHIFT) & mask));
542}
543
48ffc236 544static uint64_t
8e5ea5f7 545allocpages(vm_paddr_t *firstaddr, long n)
d7f50089 546{
48ffc236 547 uint64_t ret;
c8fe38ae
MD
548
549 ret = *firstaddr;
550 bzero((void *)ret, n * PAGE_SIZE);
551 *firstaddr += n * PAGE_SIZE;
552 return (ret);
d7f50089
YY
553}
554
bfc09ba0 555static
c8fe38ae
MD
556void
557create_pagetables(vm_paddr_t *firstaddr)
558{
8e5ea5f7 559 long i; /* must be 64 bits */
da23a592
MD
560 long nkpt_base;
561 long nkpt_phys;
33fb3ba1 562 int j;
c8fe38ae 563
ad54aa11
MD
564 /*
565 * We are running (mostly) V=P at this point
566 *
567 * Calculate NKPT - number of kernel page tables. We have to
568 * accomodoate prealloction of the vm_page_array, dump bitmap,
569 * MSGBUF_SIZE, and other stuff. Be generous.
570 *
571 * Maxmem is in pages.
33fb3ba1
MD
572 *
573 * ndmpdp is the number of 1GB pages we wish to map.
ad54aa11 574 */
86dae8f1
MD
575 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
576 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
577 ndmpdp = 4;
33fb3ba1 578 KKASSERT(ndmpdp <= NKPDPE * NPDEPG);
86dae8f1 579
da23a592
MD
580 /*
581 * Starting at the beginning of kvm (not KERNBASE).
582 */
583 nkpt_phys = (Maxmem * sizeof(struct vm_page) + NBPDR - 1) / NBPDR;
584 nkpt_phys += (Maxmem * sizeof(struct pv_entry) + NBPDR - 1) / NBPDR;
33fb3ba1
MD
585 nkpt_phys += ((nkpt + nkpt + 1 + NKPML4E + NKPDPE + NDMPML4E +
586 ndmpdp) + 511) / 512;
da23a592
MD
587 nkpt_phys += 128;
588
589 /*
590 * Starting at KERNBASE - map 2G worth of page table pages.
591 * KERNBASE is offset -2G from the end of kvm.
592 */
593 nkpt_base = (NPDPEPG - KPDPI) * NPTEPG; /* typically 2 x 512 */
c8fe38ae 594
ad54aa11
MD
595 /*
596 * Allocate pages
597 */
da23a592
MD
598 KPTbase = allocpages(firstaddr, nkpt_base);
599 KPTphys = allocpages(firstaddr, nkpt_phys);
48ffc236
JG
600 KPML4phys = allocpages(firstaddr, 1);
601 KPDPphys = allocpages(firstaddr, NKPML4E);
da23a592 602 KPDphys = allocpages(firstaddr, NKPDPE);
791c6551
MD
603
604 /*
605 * Calculate the page directory base for KERNBASE,
606 * that is where we start populating the page table pages.
607 * Basically this is the end - 2.
608 */
791c6551 609 KPDbase = KPDphys + ((NKPDPE - (NPDPEPG - KPDPI)) << PAGE_SHIFT);
48ffc236 610
48ffc236
JG
611 DMPDPphys = allocpages(firstaddr, NDMPML4E);
612 if ((amd_feature & AMDID_PAGE1GB) == 0)
613 DMPDphys = allocpages(firstaddr, ndmpdp);
614 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
615
791c6551
MD
616 /*
617 * Fill in the underlying page table pages for the area around
618 * KERNBASE. This remaps low physical memory to KERNBASE.
619 *
620 * Read-only from zero to physfree
621 * XXX not fully used, underneath 2M pages
622 */
48ffc236 623 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
791c6551
MD
624 ((pt_entry_t *)KPTbase)[i] = i << PAGE_SHIFT;
625 ((pt_entry_t *)KPTbase)[i] |= PG_RW | PG_V | PG_G;
48ffc236
JG
626 }
627
791c6551
MD
628 /*
629 * Now map the initial kernel page tables. One block of page
630 * tables is placed at the beginning of kernel virtual memory,
631 * and another block is placed at KERNBASE to map the kernel binary,
632 * data, bss, and initial pre-allocations.
633 */
da23a592 634 for (i = 0; i < nkpt_base; i++) {
791c6551
MD
635 ((pd_entry_t *)KPDbase)[i] = KPTbase + (i << PAGE_SHIFT);
636 ((pd_entry_t *)KPDbase)[i] |= PG_RW | PG_V;
637 }
da23a592 638 for (i = 0; i < nkpt_phys; i++) {
48ffc236
JG
639 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
640 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
641 }
642
791c6551
MD
643 /*
644 * Map from zero to end of allocations using 2M pages as an
645 * optimization. This will bypass some of the KPTBase pages
646 * above in the KERNBASE area.
647 */
48ffc236 648 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
791c6551
MD
649 ((pd_entry_t *)KPDbase)[i] = i << PDRSHIFT;
650 ((pd_entry_t *)KPDbase)[i] |= PG_RW | PG_V | PG_PS | PG_G;
48ffc236
JG
651 }
652
791c6551
MD
653 /*
654 * And connect up the PD to the PDP. The kernel pmap is expected
655 * to pre-populate all of its PDs. See NKPDPE in vmparam.h.
656 */
48ffc236 657 for (i = 0; i < NKPDPE; i++) {
791c6551
MD
658 ((pdp_entry_t *)KPDPphys)[NPDPEPG - NKPDPE + i] =
659 KPDphys + (i << PAGE_SHIFT);
660 ((pdp_entry_t *)KPDPphys)[NPDPEPG - NKPDPE + i] |=
661 PG_RW | PG_V | PG_U;
48ffc236
JG
662 }
663
33fb3ba1
MD
664 /*
665 * Now set up the direct map space using either 2MB or 1GB pages
666 * Preset PG_M and PG_A because demotion expects it.
667 *
668 * When filling in entries in the PD pages make sure any excess
669 * entries are set to zero as we allocated enough PD pages
670 */
48ffc236
JG
671 if ((amd_feature & AMDID_PAGE1GB) == 0) {
672 for (i = 0; i < NPDEPG * ndmpdp; i++) {
8e5ea5f7 673 ((pd_entry_t *)DMPDphys)[i] = i << PDRSHIFT;
48ffc236 674 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
33fb3ba1 675 PG_G | PG_M | PG_A;
48ffc236 676 }
33fb3ba1
MD
677
678 /*
679 * And the direct map space's PDP
680 */
48ffc236
JG
681 for (i = 0; i < ndmpdp; i++) {
682 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
33fb3ba1 683 (i << PAGE_SHIFT);
48ffc236
JG
684 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
685 }
686 } else {
687 for (i = 0; i < ndmpdp; i++) {
688 ((pdp_entry_t *)DMPDPphys)[i] =
33fb3ba1 689 (vm_paddr_t)i << PDPSHIFT;
48ffc236 690 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
33fb3ba1 691 PG_G | PG_M | PG_A;
48ffc236
JG
692 }
693 }
694
695 /* And recursively map PML4 to itself in order to get PTmap */
696 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
697 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
698
33fb3ba1
MD
699 /*
700 * Connect the Direct Map slots up to the PML4
701 */
702 for (j = 0; j < NDMPML4E; ++j) {
703 ((pdp_entry_t *)KPML4phys)[DMPML4I + j] =
704 (DMPDPphys + ((vm_paddr_t)j << PML4SHIFT)) |
705 PG_RW | PG_V | PG_U;
706 }
48ffc236 707
33fb3ba1
MD
708 /*
709 * Connect the KVA slot up to the PML4
710 */
48ffc236
JG
711 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
712 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
c8fe38ae
MD
713}
714
d7f50089 715/*
c8fe38ae
MD
716 * Bootstrap the system enough to run with virtual memory.
717 *
718 * On the i386 this is called after mapping has already been enabled
719 * and just syncs the pmap module with what has already been done.
720 * [We can't call it easily with mapping off since the kernel is not
721 * mapped with PA == VA, hence we would have to relocate every address
722 * from the linked base (virtual) address "KERNBASE" to the actual
723 * (physical) address starting relative to 0]
d7f50089
YY
724 */
725void
48ffc236 726pmap_bootstrap(vm_paddr_t *firstaddr)
c8fe38ae
MD
727{
728 vm_offset_t va;
729 pt_entry_t *pte;
730 struct mdglobaldata *gd;
c8fe38ae
MD
731 int pg;
732
48ffc236
JG
733 KvaStart = VM_MIN_KERNEL_ADDRESS;
734 KvaEnd = VM_MAX_KERNEL_ADDRESS;
735 KvaSize = KvaEnd - KvaStart;
736
c8fe38ae
MD
737 avail_start = *firstaddr;
738
739 /*
48ffc236 740 * Create an initial set of page tables to run the kernel in.
c8fe38ae 741 */
48ffc236
JG
742 create_pagetables(firstaddr);
743
791c6551
MD
744 virtual2_start = KvaStart;
745 virtual2_end = PTOV_OFFSET;
746
c8fe38ae
MD
747 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
748 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
749
750 virtual_end = VM_MAX_KERNEL_ADDRESS;
751
752 /* XXX do %cr0 as well */
753 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
754 load_cr3(KPML4phys);
c8fe38ae
MD
755
756 /*
757 * Initialize protection array.
758 */
759 i386_protection_init();
760
761 /*
762 * The kernel's pmap is statically allocated so we don't have to use
763 * pmap_create, which is unlikely to work correctly at this part of
764 * the boot sequence (XXX and which no longer exists).
765 */
48ffc236 766 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae 767 kernel_pmap.pm_count = 1;
c2fb025d 768 kernel_pmap.pm_active = (cpumask_t)-1 & ~CPUMASK_LOCK;
701c977e 769 RB_INIT(&kernel_pmap.pm_pvroot);
b12defdc
MD
770 spin_init(&kernel_pmap.pm_spin);
771 lwkt_token_init(&kernel_pmap.pm_token, "kpmap_tok");
c8fe38ae
MD
772
773 /*
774 * Reserve some special page table entries/VA space for temporary
775 * mapping of pages.
776 */
777#define SYSMAP(c, p, v, n) \
778 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
779
780 va = virtual_start;
48ffc236 781 pte = vtopte(va);
c8fe38ae
MD
782
783 /*
784 * CMAP1/CMAP2 are used for zeroing and copying pages.
785 */
786 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
787
788 /*
789 * Crashdump maps.
790 */
791 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
792
793 /*
794 * ptvmmap is used for reading arbitrary physical pages via
795 * /dev/mem.
796 */
797 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
798
799 /*
800 * msgbufp is used to map the system message buffer.
801 * XXX msgbufmap is not used.
802 */
803 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
804 atop(round_page(MSGBUF_SIZE)))
805
806 virtual_start = va;
807
808 *CMAP1 = 0;
c8fe38ae
MD
809
810 /*
811 * PG_G is terribly broken on SMP because we IPI invltlb's in some
812 * cases rather then invl1pg. Actually, I don't even know why it
813 * works under UP because self-referential page table mappings
814 */
815#ifdef SMP
816 pgeflag = 0;
817#else
818 if (cpu_feature & CPUID_PGE)
819 pgeflag = PG_G;
820#endif
821
822/*
823 * Initialize the 4MB page size flag
824 */
825 pseflag = 0;
826/*
827 * The 4MB page version of the initial
828 * kernel page mapping.
829 */
830 pdir4mb = 0;
831
832#if !defined(DISABLE_PSE)
833 if (cpu_feature & CPUID_PSE) {
834 pt_entry_t ptditmp;
835 /*
836 * Note that we have enabled PSE mode
837 */
838 pseflag = PG_PS;
b2b3ffcd 839 ptditmp = *(PTmap + x86_64_btop(KERNBASE));
c8fe38ae
MD
840 ptditmp &= ~(NBPDR - 1);
841 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
842 pdir4mb = ptditmp;
843
844#ifndef SMP
845 /*
846 * Enable the PSE mode. If we are SMP we can't do this
847 * now because the APs will not be able to use it when
848 * they boot up.
849 */
850 load_cr4(rcr4() | CR4_PSE);
851
852 /*
853 * We can do the mapping here for the single processor
854 * case. We simply ignore the old page table page from
855 * now on.
856 */
857 /*
858 * For SMP, we still need 4K pages to bootstrap APs,
859 * PSE will be enabled as soon as all APs are up.
860 */
861 PTD[KPTDI] = (pd_entry_t)ptditmp;
c8fe38ae
MD
862 cpu_invltlb();
863#endif
864 }
865#endif
c8fe38ae
MD
866
867 /*
868 * We need to finish setting up the globaldata page for the BSP.
869 * locore has already populated the page table for the mdglobaldata
870 * portion.
871 */
872 pg = MDGLOBALDATA_BASEALLOC_PAGES;
873 gd = &CPU_prvspace[0].mdglobaldata;
c8fe38ae
MD
874
875 cpu_invltlb();
d7f50089
YY
876}
877
c8fe38ae 878#ifdef SMP
d7f50089 879/*
c8fe38ae 880 * Set 4mb pdir for mp startup
d7f50089
YY
881 */
882void
c8fe38ae
MD
883pmap_set_opt(void)
884{
885 if (pseflag && (cpu_feature & CPUID_PSE)) {
886 load_cr4(rcr4() | CR4_PSE);
887 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
c8fe38ae
MD
888 cpu_invltlb();
889 }
890 }
d7f50089 891}
c8fe38ae 892#endif
d7f50089 893
c8fe38ae
MD
894/*
895 * Initialize the pmap module.
896 * Called by vm_init, to initialize any structures that the pmap
897 * system needs to map virtual memory.
898 * pmap_init has been enhanced to support in a fairly consistant
899 * way, discontiguous physical memory.
d7f50089
YY
900 */
901void
c8fe38ae 902pmap_init(void)
d7f50089 903{
c8fe38ae
MD
904 int i;
905 int initial_pvs;
906
907 /*
c8fe38ae
MD
908 * Allocate memory for random pmap data structures. Includes the
909 * pv_head_table.
910 */
911
701c977e 912 for (i = 0; i < vm_page_array_size; i++) {
c8fe38ae
MD
913 vm_page_t m;
914
915 m = &vm_page_array[i];
916 TAILQ_INIT(&m->md.pv_list);
c8fe38ae
MD
917 }
918
919 /*
920 * init the pv free list
921 */
922 initial_pvs = vm_page_array_size;
923 if (initial_pvs < MINPV)
924 initial_pvs = MINPV;
925 pvzone = &pvzone_store;
948209ce
MD
926 pvinit = (void *)kmem_alloc(&kernel_map,
927 initial_pvs * sizeof (struct pv_entry));
928 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry),
929 pvinit, initial_pvs);
c8fe38ae
MD
930
931 /*
932 * Now it is safe to enable pv_table recording.
933 */
934 pmap_initialized = TRUE;
d7f50089
YY
935}
936
c8fe38ae
MD
937/*
938 * Initialize the address space (zone) for the pv_entries. Set a
939 * high water mark so that the system can recover from excessive
940 * numbers of pv entries.
941 */
d7f50089 942void
c8fe38ae 943pmap_init2(void)
d7f50089 944{
c8fe38ae 945 int shpgperproc = PMAP_SHPGPERPROC;
948209ce 946 int entry_max;
c8fe38ae
MD
947
948 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
949 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
950 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
951 pv_entry_high_water = 9 * (pv_entry_max / 10);
948209ce
MD
952
953 /*
954 * Subtract out pages already installed in the zone (hack)
955 */
956 entry_max = pv_entry_max - vm_page_array_size;
957 if (entry_max <= 0)
958 entry_max = 1;
959
960 zinitna(pvzone, &pvzone_obj, NULL, 0, entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
961}
962
c8fe38ae
MD
963
964/***************************************************
965 * Low level helper routines.....
966 ***************************************************/
967
c8fe38ae
MD
968/*
969 * this routine defines the region(s) of memory that should
970 * not be tested for the modified bit.
971 */
bfc09ba0
MD
972static __inline
973int
701c977e 974pmap_track_modified(vm_pindex_t pindex)
d7f50089 975{
701c977e 976 vm_offset_t va = (vm_offset_t)pindex << PAGE_SHIFT;
c8fe38ae
MD
977 if ((va < clean_sva) || (va >= clean_eva))
978 return 1;
979 else
980 return 0;
d7f50089
YY
981}
982
d7f50089 983/*
10d6182e 984 * Extract the physical page address associated with the map/VA pair.
701c977e 985 * The page must be wired for this to work reliably.
c8fe38ae 986 *
701c977e
MD
987 * XXX for the moment we're using pv_find() instead of pv_get(), as
988 * callers might be expecting non-blocking operation.
d7f50089 989 */
c8fe38ae
MD
990vm_paddr_t
991pmap_extract(pmap_t pmap, vm_offset_t va)
d7f50089 992{
48ffc236 993 vm_paddr_t rtval;
701c977e
MD
994 pv_entry_t pt_pv;
995 pt_entry_t *ptep;
c8fe38ae 996
48ffc236 997 rtval = 0;
701c977e
MD
998 if (va >= VM_MAX_USER_ADDRESS) {
999 /*
1000 * Kernel page directories might be direct-mapped and
1001 * there is typically no PV tracking of pte's
1002 */
1003 pd_entry_t *pt;
1004
1005 pt = pmap_pt(pmap, va);
1006 if (pt && (*pt & PG_V)) {
1007 if (*pt & PG_PS) {
1008 rtval = *pt & PG_PS_FRAME;
1009 rtval |= va & PDRMASK;
48ffc236 1010 } else {
701c977e
MD
1011 ptep = pmap_pt_to_pte(pt, va);
1012 if (*pt & PG_V) {
1013 rtval = *ptep & PG_FRAME;
1014 rtval |= va & PAGE_MASK;
1015 }
1016 }
1017 }
1018 } else {
1019 /*
1020 * User pages currently do not direct-map the page directory
1021 * and some pages might not used managed PVs. But all PT's
1022 * will have a PV.
1023 */
1024 pt_pv = pv_find(pmap, pmap_pt_pindex(va));
1025 if (pt_pv) {
1026 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
1027 if (*ptep & PG_V) {
1028 rtval = *ptep & PG_FRAME;
1029 rtval |= va & PAGE_MASK;
48ffc236 1030 }
701c977e 1031 pv_drop(pt_pv);
c8fe38ae 1032 }
c8fe38ae 1033 }
48ffc236
JG
1034 return rtval;
1035}
1036
1037/*
10d6182e 1038 * Extract the physical page address associated kernel virtual address.
48ffc236
JG
1039 */
1040vm_paddr_t
1041pmap_kextract(vm_offset_t va)
48ffc236 1042{
701c977e 1043 pd_entry_t pt; /* pt entry in pd */
48ffc236
JG
1044 vm_paddr_t pa;
1045
1046 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
1047 pa = DMAP_TO_PHYS(va);
1048 } else {
701c977e
MD
1049 pt = *vtopt(va);
1050 if (pt & PG_PS) {
1051 pa = (pt & PG_PS_FRAME) | (va & PDRMASK);
48ffc236
JG
1052 } else {
1053 /*
1054 * Beware of a concurrent promotion that changes the
1055 * PDE at this point! For example, vtopte() must not
1056 * be used to access the PTE because it would use the
1057 * new PDE. It is, however, safe to use the old PDE
1058 * because the page table page is preserved by the
1059 * promotion.
1060 */
701c977e 1061 pa = *pmap_pt_to_pte(&pt, va);
48ffc236
JG
1062 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
1063 }
1064 }
1065 return pa;
d7f50089
YY
1066}
1067
c8fe38ae
MD
1068/***************************************************
1069 * Low level mapping routines.....
1070 ***************************************************/
1071
d7f50089 1072/*
c8fe38ae
MD
1073 * Routine: pmap_kenter
1074 * Function:
1075 * Add a wired page to the KVA
1076 * NOTE! note that in order for the mapping to take effect -- you
1077 * should do an invltlb after doing the pmap_kenter().
d7f50089 1078 */
c8fe38ae 1079void
d7f50089
YY
1080pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1081{
c8fe38ae
MD
1082 pt_entry_t *pte;
1083 pt_entry_t npte;
1084 pmap_inval_info info;
1085
701c977e 1086 pmap_inval_init(&info); /* XXX remove */
c8fe38ae
MD
1087 npte = pa | PG_RW | PG_V | pgeflag;
1088 pte = vtopte(va);
701c977e 1089 pmap_inval_interlock(&info, &kernel_pmap, va); /* XXX remove */
c8fe38ae 1090 *pte = npte;
701c977e
MD
1091 pmap_inval_deinterlock(&info, &kernel_pmap); /* XXX remove */
1092 pmap_inval_done(&info); /* XXX remove */
d7f50089
YY
1093}
1094
1095/*
c8fe38ae
MD
1096 * Routine: pmap_kenter_quick
1097 * Function:
1098 * Similar to pmap_kenter(), except we only invalidate the
1099 * mapping on the current CPU.
d7f50089
YY
1100 */
1101void
c8fe38ae
MD
1102pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
1103{
1104 pt_entry_t *pte;
1105 pt_entry_t npte;
1106
1107 npte = pa | PG_RW | PG_V | pgeflag;
1108 pte = vtopte(va);
1109 *pte = npte;
1110 cpu_invlpg((void *)va);
1111}
1112
1113void
d7f50089
YY
1114pmap_kenter_sync(vm_offset_t va)
1115{
c8fe38ae
MD
1116 pmap_inval_info info;
1117
1118 pmap_inval_init(&info);
c2fb025d
MD
1119 pmap_inval_interlock(&info, &kernel_pmap, va);
1120 pmap_inval_deinterlock(&info, &kernel_pmap);
1121 pmap_inval_done(&info);
d7f50089
YY
1122}
1123
d7f50089
YY
1124void
1125pmap_kenter_sync_quick(vm_offset_t va)
1126{
c8fe38ae 1127 cpu_invlpg((void *)va);
d7f50089
YY
1128}
1129
d7f50089 1130/*
c8fe38ae 1131 * remove a page from the kernel pagetables
d7f50089
YY
1132 */
1133void
c8fe38ae 1134pmap_kremove(vm_offset_t va)
d7f50089 1135{
c8fe38ae
MD
1136 pt_entry_t *pte;
1137 pmap_inval_info info;
1138
1139 pmap_inval_init(&info);
1140 pte = vtopte(va);
c2fb025d 1141 pmap_inval_interlock(&info, &kernel_pmap, va);
52bb73bc 1142 (void)pte_load_clear(pte);
c2fb025d
MD
1143 pmap_inval_deinterlock(&info, &kernel_pmap);
1144 pmap_inval_done(&info);
c8fe38ae
MD
1145}
1146
1147void
1148pmap_kremove_quick(vm_offset_t va)
1149{
1150 pt_entry_t *pte;
1151 pte = vtopte(va);
52bb73bc 1152 (void)pte_load_clear(pte);
c8fe38ae 1153 cpu_invlpg((void *)va);
d7f50089
YY
1154}
1155
1156/*
c8fe38ae 1157 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
1158 */
1159void
c8fe38ae 1160pmap_kmodify_rw(vm_offset_t va)
d7f50089 1161{
701c977e 1162 atomic_set_long(vtopte(va), PG_RW);
c8fe38ae 1163 cpu_invlpg((void *)va);
d7f50089
YY
1164}
1165
c8fe38ae
MD
1166void
1167pmap_kmodify_nc(vm_offset_t va)
1168{
701c977e 1169 atomic_set_long(vtopte(va), PG_N);
c8fe38ae
MD
1170 cpu_invlpg((void *)va);
1171}
d7f50089
YY
1172
1173/*
ad54aa11
MD
1174 * Used to map a range of physical addresses into kernel virtual
1175 * address space during the low level boot, typically to map the
1176 * dump bitmap, message buffer, and vm_page_array.
c8fe38ae 1177 *
ad54aa11
MD
1178 * These mappings are typically made at some pointer after the end of the
1179 * kernel text+data.
1180 *
1181 * We could return PHYS_TO_DMAP(start) here and not allocate any
1182 * via (*virtp), but then kmem from userland and kernel dumps won't
1183 * have access to the related pointers.
d7f50089
YY
1184 */
1185vm_offset_t
8e5e6f1b 1186pmap_map(vm_offset_t *virtp, vm_paddr_t start, vm_paddr_t end, int prot)
d7f50089 1187{
ad54aa11
MD
1188 vm_offset_t va;
1189 vm_offset_t va_start;
1190
1191 /*return PHYS_TO_DMAP(start);*/
1192
1193 va_start = *virtp;
1194 va = va_start;
1195
1196 while (start < end) {
1197 pmap_kenter_quick(va, start);
1198 va += PAGE_SIZE;
1199 start += PAGE_SIZE;
1200 }
1201 *virtp = va;
1202 return va_start;
d7f50089
YY
1203}
1204
c8fe38ae 1205
d7f50089 1206/*
c8fe38ae
MD
1207 * Add a list of wired pages to the kva
1208 * this routine is only used for temporary
1209 * kernel mappings that do not need to have
1210 * page modification or references recorded.
1211 * Note that old mappings are simply written
1212 * over. The page *must* be wired.
d7f50089
YY
1213 */
1214void
c8fe38ae 1215pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
d7f50089 1216{
c8fe38ae
MD
1217 vm_offset_t end_va;
1218
1219 end_va = va + count * PAGE_SIZE;
1220
1221 while (va < end_va) {
1222 pt_entry_t *pte;
1223
1224 pte = vtopte(va);
1225 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1226 cpu_invlpg((void *)va);
1227 va += PAGE_SIZE;
1228 m++;
1229 }
7d4d6fdb 1230 smp_invltlb();
c8fe38ae
MD
1231}
1232
d7f50089 1233/*
7155fc7d 1234 * This routine jerks page mappings from the
c8fe38ae 1235 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1236 *
1237 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1238 */
c8fe38ae
MD
1239void
1240pmap_qremove(vm_offset_t va, int count)
d7f50089 1241{
c8fe38ae
MD
1242 vm_offset_t end_va;
1243
48ffc236 1244 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1245
1246 while (va < end_va) {
1247 pt_entry_t *pte;
1248
1249 pte = vtopte(va);
52bb73bc 1250 (void)pte_load_clear(pte);
c8fe38ae
MD
1251 cpu_invlpg((void *)va);
1252 va += PAGE_SIZE;
1253 }
c8fe38ae 1254 smp_invltlb();
d7f50089
YY
1255}
1256
1257/*
c8fe38ae
MD
1258 * Create a new thread and optionally associate it with a (new) process.
1259 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1260 */
1261void
c8fe38ae 1262pmap_init_thread(thread_t td)
d7f50089 1263{
d1368d1a 1264 /* enforce pcb placement & alignment */
c8fe38ae 1265 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
d1368d1a 1266 td->td_pcb = (struct pcb *)((intptr_t)td->td_pcb & ~(intptr_t)0xF);
c8fe38ae 1267 td->td_savefpu = &td->td_pcb->pcb_save;
d1368d1a 1268 td->td_sp = (char *)td->td_pcb; /* no -16 */
d7f50089
YY
1269}
1270
1271/*
c8fe38ae 1272 * This routine directly affects the fork perf for a process.
d7f50089
YY
1273 */
1274void
c8fe38ae 1275pmap_init_proc(struct proc *p)
d7f50089
YY
1276{
1277}
1278
1279/*
c8fe38ae
MD
1280 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1281 * it, and IdlePTD, represents the template used to update all other pmaps.
1282 *
1283 * On architectures where the kernel pmap is not integrated into the user
1284 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1285 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1286 */
1287void
c8fe38ae 1288pmap_pinit0(struct pmap *pmap)
d7f50089 1289{
48ffc236 1290 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1291 pmap->pm_count = 1;
1292 pmap->pm_active = 0;
701c977e
MD
1293 pmap->pm_pvhint = NULL;
1294 RB_INIT(&pmap->pm_pvroot);
b12defdc
MD
1295 spin_init(&pmap->pm_spin);
1296 lwkt_token_init(&pmap->pm_token, "pmap_tok");
c8fe38ae 1297 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1298}
1299
1300/*
c8fe38ae
MD
1301 * Initialize a preallocated and zeroed pmap structure,
1302 * such as one in a vmspace structure.
d7f50089
YY
1303 */
1304void
c8fe38ae 1305pmap_pinit(struct pmap *pmap)
d7f50089 1306{
701c977e 1307 pv_entry_t pv;
33fb3ba1 1308 int j;
701c977e
MD
1309
1310 /*
1311 * Misc initialization
1312 */
1313 pmap->pm_count = 1;
1314 pmap->pm_active = 0;
1315 pmap->pm_pvhint = NULL;
1316 if (pmap->pm_pmlpv == NULL) {
1317 RB_INIT(&pmap->pm_pvroot);
1318 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1319 spin_init(&pmap->pm_spin);
1320 lwkt_token_init(&pmap->pm_token, "pmap_tok");
1321 }
c8fe38ae
MD
1322
1323 /*
1324 * No need to allocate page table space yet but we do need a valid
1325 * page directory table.
1326 */
48ffc236
JG
1327 if (pmap->pm_pml4 == NULL) {
1328 pmap->pm_pml4 =
1329 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1330 }
1331
1332 /*
701c977e
MD
1333 * Allocate the page directory page, which wires it even though
1334 * it isn't being entered into some higher level page table (it
1335 * being the highest level). If one is already cached we don't
1336 * have to do anything.
c8fe38ae 1337 */
701c977e
MD
1338 if ((pv = pmap->pm_pmlpv) == NULL) {
1339 pv = pmap_allocpte(pmap, pmap_pml4_pindex(), NULL);
1340 pmap->pm_pmlpv = pv;
b12defdc 1341 pmap_kenter((vm_offset_t)pmap->pm_pml4,
701c977e
MD
1342 VM_PAGE_TO_PHYS(pv->pv_m));
1343 pv_put(pv);
33fb3ba1
MD
1344
1345 /*
1346 * Install DMAP and KMAP.
1347 */
1348 for (j = 0; j < NDMPML4E; ++j) {
1349 pmap->pm_pml4[DMPML4I + j] =
1350 (DMPDPphys + ((vm_paddr_t)j << PML4SHIFT)) |
1351 PG_RW | PG_V | PG_U;
1352 }
701c977e 1353 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
701c977e 1354
33fb3ba1
MD
1355 /*
1356 * install self-referential address mapping entry
1357 */
701c977e
MD
1358 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pv->pv_m) |
1359 PG_V | PG_RW | PG_A | PG_M;
1360 } else {
1361 KKASSERT(pv->pv_m->flags & PG_MAPPED);
1362 KKASSERT(pv->pv_m->flags & PG_WRITEABLE);
b12defdc 1363 }
993bac44
MD
1364 KKASSERT(pmap->pm_pml4[255] == 0);
1365 KKASSERT(RB_ROOT(&pmap->pm_pvroot) == pv);
1366 KKASSERT(pv->pv_entry.rbe_left == NULL);
1367 KKASSERT(pv->pv_entry.rbe_right == NULL);
d7f50089
YY
1368}
1369
1370/*
c8fe38ae
MD
1371 * Clean up a pmap structure so it can be physically freed. This routine
1372 * is called by the vmspace dtor function. A great deal of pmap data is
1373 * left passively mapped to improve vmspace management so we have a bit
1374 * of cleanup work to do here.
d7f50089
YY
1375 */
1376void
c8fe38ae 1377pmap_puninit(pmap_t pmap)
d7f50089 1378{
701c977e 1379 pv_entry_t pv;
c8fe38ae
MD
1380 vm_page_t p;
1381
1382 KKASSERT(pmap->pm_active == 0);
701c977e
MD
1383 if ((pv = pmap->pm_pmlpv) != NULL) {
1384 if (pv_hold_try(pv) == 0)
1385 pv_lock(pv);
52bb73bc 1386 p = pmap_remove_pv_page(pv);
701c977e 1387 pv_free(pv);
48ffc236 1388 pmap_kremove((vm_offset_t)pmap->pm_pml4);
b12defdc 1389 vm_page_busy_wait(p, FALSE, "pgpun");
701c977e 1390 KKASSERT(p->flags & (PG_FICTITIOUS|PG_UNMANAGED));
b12defdc 1391 vm_page_unwire(p, 0);
701c977e
MD
1392 vm_page_flag_clear(p, PG_MAPPED | PG_WRITEABLE);
1393
1394 /*
1395 * XXX eventually clean out PML4 static entries and
1396 * use vm_page_free_zero()
1397 */
1398 vm_page_free(p);
1399 pmap->pm_pmlpv = NULL;
c8fe38ae 1400 }
48ffc236 1401 if (pmap->pm_pml4) {
bfc09ba0 1402 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236
JG
1403 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1404 pmap->pm_pml4 = NULL;
c8fe38ae 1405 }
701c977e
MD
1406 KKASSERT(pmap->pm_stats.resident_count == 0);
1407 KKASSERT(pmap->pm_stats.wired_count == 0);
d7f50089
YY
1408}
1409
1410/*
c8fe38ae
MD
1411 * Wire in kernel global address entries. To avoid a race condition
1412 * between pmap initialization and pmap_growkernel, this procedure
1413 * adds the pmap to the master list (which growkernel scans to update),
1414 * then copies the template.
d7f50089
YY
1415 */
1416void
c8fe38ae 1417pmap_pinit2(struct pmap *pmap)
d7f50089 1418{
b12defdc
MD
1419 /*
1420 * XXX copies current process, does not fill in MPPTDI
1421 */
1422 spin_lock(&pmap_spin);
c8fe38ae 1423 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
b12defdc 1424 spin_unlock(&pmap_spin);
d7f50089
YY
1425}
1426
1427/*
701c977e
MD
1428 * This routine is called when various levels in the page table need to
1429 * be populated. This routine cannot fail.
d7f50089 1430 *
701c977e
MD
1431 * This function returns two locked pv_entry's, one representing the
1432 * requested pv and one representing the requested pv's parent pv. If
1433 * the pv did not previously exist it will be mapped into its parent
1434 * and wired, otherwise no additional wire count will be added.
d7f50089 1435 */
bfc09ba0 1436static
701c977e
MD
1437pv_entry_t
1438pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, pv_entry_t *pvpp)
d7f50089 1439{
701c977e
MD
1440 pt_entry_t *ptep;
1441 pv_entry_t pv;
1442 pv_entry_t pvp;
1443 vm_pindex_t pt_pindex;
1444 vm_page_t m;
1445 int isnew;
1446
c8fe38ae 1447 /*
701c977e
MD
1448 * If the pv already exists and we aren't being asked for the
1449 * parent page table page we can just return it. A locked+held pv
1450 * is returned.
c8fe38ae 1451 */
701c977e
MD
1452 pv = pv_alloc(pmap, ptepindex, &isnew);
1453 if (isnew == 0 && pvpp == NULL)
1454 return(pv);
1455
1456 /*
1457 * This is a new PV, we have to resolve its parent page table and
1458 * add an additional wiring to the page if necessary.
1459 */
1460
1461 /*
1462 * Special case terminal PVs. These are not page table pages so
1463 * no vm_page is allocated (the caller supplied the vm_page). If
1464 * pvpp is non-NULL we are being asked to also removed the pt_pv
1465 * for this pv.
1466 *
1467 * Note that pt_pv's are only returned for user VAs. We assert that
1468 * a pt_pv is not being requested for kernel VAs.
1469 */
1470 if (ptepindex < pmap_pt_pindex(0)) {
1471 if (ptepindex >= NUPTE_USER)
1472 KKASSERT(pvpp == NULL);
1473 else
1474 KKASSERT(pvpp != NULL);
1475 if (pvpp) {
1476 pt_pindex = NUPTE_TOTAL + (ptepindex >> NPTEPGSHIFT);
1477 pvp = pmap_allocpte(pmap, pt_pindex, NULL);
1478 if (isnew)
1479 vm_page_wire_quick(pvp->pv_m);
1480 *pvpp = pvp;
1481 } else {
1482 pvp = NULL;
1483 }
1484 return(pv);
b12defdc 1485 }
c8fe38ae
MD
1486
1487 /*
701c977e
MD
1488 * Non-terminal PVs allocate a VM page to represent the page table,
1489 * so we have to resolve pvp and calculate ptepindex for the pvp
1490 * and then for the page table entry index in the pvp for
1491 * fall-through.
c8fe38ae 1492 */
701c977e 1493 if (ptepindex < pmap_pd_pindex(0)) {
4a4ea614 1494 /*
701c977e 1495 * pv is PT, pvp is PD
4a4ea614 1496 */
701c977e
MD
1497 ptepindex = (ptepindex - pmap_pt_pindex(0)) >> NPDEPGSHIFT;
1498 ptepindex += NUPTE_TOTAL + NUPT_TOTAL;
1499 pvp = pmap_allocpte(pmap, ptepindex, NULL);
1500 if (!isnew)
1501 goto notnew;
1502
1b2e0b92 1503 /*
701c977e 1504 * PT index in PD
1b2e0b92 1505 */
701c977e
MD
1506 ptepindex = pv->pv_pindex - pmap_pt_pindex(0);
1507 ptepindex &= ((1ul << NPDEPGSHIFT) - 1);
1508 } else if (ptepindex < pmap_pdp_pindex(0)) {
1b2e0b92 1509 /*
701c977e 1510 * pv is PD, pvp is PDP
1b2e0b92 1511 */
701c977e
MD
1512 ptepindex = (ptepindex - pmap_pd_pindex(0)) >> NPDPEPGSHIFT;
1513 ptepindex += NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL;
1514 pvp = pmap_allocpte(pmap, ptepindex, NULL);
1515 if (!isnew)
1516 goto notnew;
1517
1518 /*
1519 * PD index in PDP
1520 */
1521 ptepindex = pv->pv_pindex - pmap_pd_pindex(0);
1522 ptepindex &= ((1ul << NPDPEPGSHIFT) - 1);
1523 } else if (ptepindex < pmap_pml4_pindex()) {
700e22f7 1524 /*
701c977e 1525 * pv is PDP, pvp is the root pml4 table
1b2e0b92 1526 */
701c977e
MD
1527 pvp = pmap_allocpte(pmap, pmap_pml4_pindex(), NULL);
1528 if (!isnew)
1529 goto notnew;
700e22f7 1530
701c977e
MD
1531 /*
1532 * PDP index in PML4
1533 */
1534 ptepindex = pv->pv_pindex - pmap_pdp_pindex(0);
1535 ptepindex &= ((1ul << NPML4EPGSHIFT) - 1);
1536 } else {
1537 /*
1538 * pv represents the top-level PML4, there is no parent.
1539 */
1540 pvp = NULL;
1541 if (!isnew)
1542 goto notnew;
1b2e0b92 1543 }
700e22f7
MD
1544
1545 /*
701c977e
MD
1546 * This code is only reached if isnew is TRUE and this is not a
1547 * terminal PV. We need to allocate a vm_page for the page table
1548 * at this level and enter it into the parent page table.
1549 *
1550 * page table pages are marked PG_WRITEABLE and PG_MAPPED.
1b2e0b92 1551 */
701c977e
MD
1552 for (;;) {
1553 m = vm_page_alloc(NULL, pv->pv_pindex,
1554 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM |
1555 VM_ALLOC_INTERRUPT);
1556 if (m)
1557 break;
1558 vm_wait(0);
1b2e0b92 1559 }
701c977e
MD
1560 vm_page_spin_lock(m);
1561 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1562 pv->pv_m = m;
1563 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
1564 vm_page_spin_unlock(m);
1565 vm_page_unmanage(m); /* m must be spinunlocked */
1566
1567 if ((m->flags & PG_ZERO) == 0) {
1568 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1569 }
1570#ifdef PMAP_DEBUG
1571 else {
1572 pmap_page_assertzero(VM_PAGE_TO_PHYS(m));
1573 }
1574#endif
1575 m->valid = VM_PAGE_BITS_ALL;
1576 vm_page_flag_clear(m, PG_ZERO);
1577 vm_page_wire(m); /* wire for mapping in parent */
1578
1579 /*
1580 * Wire the page into pvp, bump the wire-count for pvp's page table
1581 * page. Bump the resident_count for the pmap. There is no pvp
1582 * for the top level, address the pm_pml4[] array directly.
1583 *
1584 * If the caller wants the parent we return it, otherwise
1585 * we just put it away.
1586 *
1587 * No interlock is needed for pte 0 -> non-zero.
1588 */
1589 if (pvp) {
1590 vm_page_wire_quick(pvp->pv_m);
1591 ptep = pv_pte_lookup(pvp, ptepindex);
1592 KKASSERT((*ptep & PG_V) == 0);
1593 *ptep = VM_PAGE_TO_PHYS(m) | (PG_U | PG_RW | PG_V |
1594 PG_A | PG_M);
1595 }
1596 vm_page_wakeup(m);
1597notnew:
1598 if (pvpp)
1599 *pvpp = pvp;
1600 else if (pvp)
1601 pv_put(pvp);
1602 return (pv);
1603}
d7f50089
YY
1604
1605/*
701c977e
MD
1606 * Release any resources held by the given physical map.
1607 *
1608 * Called when a pmap initialized by pmap_pinit is being released. Should
1609 * only be called if the map contains no valid mappings.
b12defdc 1610 *
701c977e 1611 * Caller must hold pmap->pm_token
d7f50089 1612 */
701c977e
MD
1613struct pmap_release_info {
1614 pmap_t pmap;
1615 int retry;
1616};
1617
1618static int pmap_release_callback(pv_entry_t pv, void *data);
1619
1620void
1621pmap_release(struct pmap *pmap)
c8fe38ae 1622{
701c977e
MD
1623 struct pmap_release_info info;
1624
1625 KASSERT(pmap->pm_active == 0,
1626 ("pmap still active! %016jx", (uintmax_t)pmap->pm_active));
701c977e
MD
1627
1628 spin_lock(&pmap_spin);
1629 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1630 spin_unlock(&pmap_spin);
c8fe38ae
MD
1631
1632 /*
701c977e
MD
1633 * Pull pv's off the RB tree in order from low to high and release
1634 * each page.
c8fe38ae 1635 */
701c977e
MD
1636 info.pmap = pmap;
1637 do {
1638 info.retry = 0;
1639 spin_lock(&pmap->pm_spin);
1640 RB_SCAN(pv_entry_rb_tree, &pmap->pm_pvroot, NULL,
1641 pmap_release_callback, &info);
1642 spin_unlock(&pmap->pm_spin);
1643 } while (info.retry);
1644
a5fc46c9
MD
1645
1646 /*
701c977e
MD
1647 * One resident page (the pml4 page) should remain.
1648 * No wired pages should remain.
a5fc46c9 1649 */
701c977e
MD
1650 KKASSERT(pmap->pm_stats.resident_count == 1);
1651 KKASSERT(pmap->pm_stats.wired_count == 0);
1652}
1653
1654static int
1655pmap_release_callback(pv_entry_t pv, void *data)
1656{
1657 struct pmap_release_info *info = data;
1658 pmap_t pmap = info->pmap;
1659 vm_page_t p;
1660
1661 if (pv_hold_try(pv)) {
1662 spin_unlock(&pmap->pm_spin);
1663 } else {
1664 spin_unlock(&pmap->pm_spin);
1665 pv_lock(pv);
1666 if (pv->pv_pmap != pmap) {
1667 pv_put(pv);
1668 spin_lock(&pmap->pm_spin);
1669 info->retry = 1;
1670 return(-1);
a5fc46c9 1671 }
48ffc236
JG
1672 }
1673
701c977e
MD
1674 /*
1675 * The pmap is currently not spinlocked, pv is held+locked.
1676 * Remove the pv's page from its parent's page table. The
1677 * parent's page table page's wire_count will be decremented.
1678 */
1679 pmap_remove_pv_pte(pv, NULL, NULL);
c8fe38ae
MD
1680
1681 /*
701c977e
MD
1682 * Terminal pvs are unhooked from their vm_pages. Because
1683 * terminal pages aren't page table pages they aren't wired
1684 * by us, so we have to be sure not to unwire them either.
c8fe38ae 1685 */
701c977e 1686 if (pv->pv_pindex < pmap_pt_pindex(0)) {
52bb73bc 1687 pmap_remove_pv_page(pv);
701c977e
MD
1688 goto skip;
1689 }
c8fe38ae 1690
c8fe38ae 1691 /*
701c977e
MD
1692 * We leave the top-level page table page cached, wired, and
1693 * mapped in the pmap until the dtor function (pmap_puninit())
1694 * gets called.
e8510e54 1695 *
701c977e
MD
1696 * Since we are leaving the top-level pv intact we need
1697 * to break out of what would otherwise be an infinite loop.
c8fe38ae 1698 */
701c977e
MD
1699 if (pv->pv_pindex == pmap_pml4_pindex()) {
1700 pv_put(pv);
1701 spin_lock(&pmap->pm_spin);
1702 return(-1);
1703 }
1704
1705 /*
1706 * For page table pages (other than the top-level page),
1707 * remove and free the vm_page. The representitive mapping
1708 * removed above by pmap_remove_pv_pte() did not undo the
1709 * last wire_count so we have to do that as well.
1710 */
52bb73bc 1711 p = pmap_remove_pv_page(pv);
701c977e 1712 vm_page_busy_wait(p, FALSE, "pmaprl");
701c977e
MD
1713 if (p->wire_count != 1) {
1714 kprintf("p->wire_count was %016lx %d\n",
1715 pv->pv_pindex, p->wire_count);
1716 }
1717 KKASSERT(p->wire_count == 1);
1718 KKASSERT(p->flags & PG_UNMANAGED);
1719
1720 vm_page_unwire(p, 0);
1721 KKASSERT(p->wire_count == 0);
1722 /* JG eventually revert to using vm_page_free_zero() */
1723 vm_page_free(p);
1724skip:
1725 pv_free(pv);
1726 spin_lock(&pmap->pm_spin);
1727 return(0);
1728}
1729
1730/*
1731 * This function will remove the pte associated with a pv from its parent.
1732 * Terminal pv's are supported. The removal will be interlocked if info
1733 * is non-NULL. The caller must dispose of pv instead of just unlocking
1734 * it.
1735 *
1736 * The wire count will be dropped on the parent page table. The wire
1737 * count on the page being removed (pv->pv_m) from the parent page table
1738 * is NOT touched. Note that terminal pages will not have any additional
1739 * wire counts while page table pages will have at least one representing
1740 * the mapping, plus others representing sub-mappings.
1741 *
1742 * NOTE: Cannot be called on kernel page table pages, only KVM terminal
1743 * pages and user page table and terminal pages.
1744 *
1745 * The pv must be locked.
1746 *
1747 * XXX must lock parent pv's if they exist to remove pte XXX
1748 */
1749static
1750void
1751pmap_remove_pv_pte(pv_entry_t pv, pv_entry_t pvp, struct pmap_inval_info *info)
1752{
1753 vm_pindex_t ptepindex = pv->pv_pindex;
1754 pmap_t pmap = pv->pv_pmap;
1755 vm_page_t p;
1756 int gotpvp = 0;
48ffc236 1757
701c977e 1758 KKASSERT(pmap);
48ffc236 1759
701c977e 1760 if (ptepindex == pmap_pml4_pindex()) {
b12defdc 1761 /*
701c977e 1762 * We are the top level pml4 table, there is no parent.
b12defdc 1763 */
701c977e
MD
1764 p = pmap->pm_pmlpv->pv_m;
1765 } else if (ptepindex >= pmap_pdp_pindex(0)) {
e8510e54 1766 /*
701c977e
MD
1767 * Remove a PDP page from the pml4e. This can only occur
1768 * with user page tables. We do not have to lock the
1769 * pml4 PV so just ignore pvp.
e8510e54 1770 */
701c977e
MD
1771 vm_pindex_t pml4_pindex;
1772 vm_pindex_t pdp_index;
1773 pml4_entry_t *pdp;
1774
1775 pdp_index = ptepindex - pmap_pdp_pindex(0);
1776 if (pvp == NULL) {
1777 pml4_pindex = pmap_pml4_pindex();
1778 pvp = pv_get(pv->pv_pmap, pml4_pindex);
1779 gotpvp = 1;
e8510e54 1780 }
701c977e
MD
1781 pdp = &pmap->pm_pml4[pdp_index & ((1ul << NPML4EPGSHIFT) - 1)];
1782 KKASSERT((*pdp & PG_V) != 0);
1783 p = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1784 *pdp = 0;
1785 KKASSERT(info == NULL);
1786 } else if (ptepindex >= pmap_pd_pindex(0)) {
e8510e54 1787 /*
701c977e 1788 * Remove a PD page from the pdp
e8510e54 1789 */
701c977e
MD
1790 vm_pindex_t pdp_pindex;
1791 vm_pindex_t pd_index;
1792 pdp_entry_t *pd;
48ffc236 1793
701c977e 1794 pd_index = ptepindex - pmap_pd_pindex(0);
48ffc236 1795
701c977e
MD
1796 if (pvp == NULL) {
1797 pdp_pindex = NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL +
1798 (pd_index >> NPML4EPGSHIFT);
1799 pvp = pv_get(pv->pv_pmap, pdp_pindex);
1800 gotpvp = 1;
1801 }
1802 pd = pv_pte_lookup(pvp, pd_index & ((1ul << NPDPEPGSHIFT) - 1));
1803 KKASSERT((*pd & PG_V) != 0);
1804 p = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
1805 *pd = 0;
1806 KKASSERT(info == NULL);
1807 } else if (ptepindex >= pmap_pt_pindex(0)) {
e8510e54 1808 /*
701c977e 1809 * Remove a PT page from the pd
e8510e54 1810 */
701c977e
MD
1811 vm_pindex_t pd_pindex;
1812 vm_pindex_t pt_index;
1813 pd_entry_t *pt;
b12defdc 1814
701c977e
MD
1815 pt_index = ptepindex - pmap_pt_pindex(0);
1816
1817 if (pvp == NULL) {
1818 pd_pindex = NUPTE_TOTAL + NUPT_TOTAL +
1819 (pt_index >> NPDPEPGSHIFT);
1820 pvp = pv_get(pv->pv_pmap, pd_pindex);
1821 gotpvp = 1;
1822 }
1823 pt = pv_pte_lookup(pvp, pt_index & ((1ul << NPDPEPGSHIFT) - 1));
1824 KKASSERT((*pt & PG_V) != 0);
1825 p = PHYS_TO_VM_PAGE(*pt & PG_FRAME);
1826 *pt = 0;
1827 KKASSERT(info == NULL);
1828 } else {
b12defdc 1829 /*
701c977e 1830 * Remove a PTE from the PT page
b12defdc 1831 *
701c977e
MD
1832 * NOTE: pv's must be locked bottom-up to avoid deadlocking.
1833 * pv is a pte_pv so we can safely lock pt_pv.
b12defdc 1834 */
701c977e
MD
1835 vm_pindex_t pt_pindex;
1836 pt_entry_t *ptep;
1837 pt_entry_t pte;
1838 vm_offset_t va;
b12defdc 1839
701c977e
MD
1840 pt_pindex = ptepindex >> NPTEPGSHIFT;
1841 va = (vm_offset_t)ptepindex << PAGE_SHIFT;
1842
1843 if (ptepindex >= NUPTE_USER) {
1844 ptep = vtopte(ptepindex << PAGE_SHIFT);
1845 KKASSERT(pvp == NULL);
c8fe38ae 1846 } else {
701c977e
MD
1847 if (pvp == NULL) {
1848 pt_pindex = NUPTE_TOTAL +
1849 (ptepindex >> NPDPEPGSHIFT);
1850 pvp = pv_get(pv->pv_pmap, pt_pindex);
1851 gotpvp = 1;
1852 }
1853 ptep = pv_pte_lookup(pvp, ptepindex &
1854 ((1ul << NPDPEPGSHIFT) - 1));
c8fe38ae 1855 }
701c977e
MD
1856
1857 if (info)
1858 pmap_inval_interlock(info, pmap, va);
1859 pte = pte_load_clear(ptep);
1860 if (info)
1861 pmap_inval_deinterlock(info, pmap);
52bb73bc
MD
1862 else
1863 cpu_invlpg((void *)va);
48ffc236 1864
e8510e54 1865 /*
701c977e 1866 * Now update the vm_page_t
e8510e54 1867 */
701c977e
MD
1868 if ((pte & (PG_MANAGED|PG_V)) != (PG_MANAGED|PG_V)) {
1869 kprintf("remove_pte badpte %016lx %016lx %d\n",
1870 pte, pv->pv_pindex,
1871 pv->pv_pindex < pmap_pt_pindex(0));
1872 }
1873 /*KKASSERT((pte & (PG_MANAGED|PG_V)) == (PG_MANAGED|PG_V));*/
1874 p = PHYS_TO_VM_PAGE(pte & PG_FRAME);
1875
1876 if (pte & PG_M) {
1877 if (pmap_track_modified(ptepindex))
1878 vm_page_dirty(p);
1879 }
1880 if (pte & PG_A) {
1881 vm_page_flag_set(p, PG_REFERENCED);
e8510e54 1882 }
701c977e
MD
1883 if (pte & PG_W)
1884 atomic_add_long(&pmap->pm_stats.wired_count, -1);
1885 if (pte & PG_G)
1886 cpu_invlpg((void *)va);
c8fe38ae
MD
1887 }
1888
48ffc236 1889 /*
701c977e
MD
1890 * Unwire the parent page table page. The wire_count cannot go below
1891 * 1 here because the parent page table page is itself still mapped.
1892 *
1893 * XXX remove the assertions later.
48ffc236 1894 */
701c977e
MD
1895 KKASSERT(pv->pv_m == p);
1896 if (pvp && vm_page_unwire_quick(pvp->pv_m))
1897 panic("pmap_remove_pv_pte: Insufficient wire_count");
c8fe38ae 1898
701c977e
MD
1899 if (gotpvp)
1900 pv_put(pvp);
c8fe38ae
MD
1901}
1902
bfc09ba0
MD
1903static
1904vm_page_t
52bb73bc 1905pmap_remove_pv_page(pv_entry_t pv)
d7f50089 1906{
c8fe38ae
MD
1907 vm_page_t m;
1908
701c977e 1909 m = pv->pv_m;
701c977e
MD
1910 KKASSERT(m);
1911 vm_page_spin_lock(m);
1912 pv->pv_m = NULL;
1913 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
c8fe38ae 1914 /*
701c977e
MD
1915 if (m->object)
1916 atomic_add_int(&m->object->agg_pv_list_count, -1);
1917 */
1918 if (TAILQ_EMPTY(&m->md.pv_list))
1919 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1920 vm_page_spin_unlock(m);
52bb73bc 1921 return(m);
d7f50089
YY
1922}
1923
1924/*
c8fe38ae 1925 * Grow the number of kernel page table entries, if needed.
a8cf2878
MD
1926 *
1927 * This routine is always called to validate any address space
1928 * beyond KERNBASE (for kldloads). kernel_vm_end only governs the address
1929 * space below KERNBASE.
d7f50089 1930 */
c8fe38ae 1931void
a8cf2878 1932pmap_growkernel(vm_offset_t kstart, vm_offset_t kend)
d7f50089 1933{
48ffc236 1934 vm_paddr_t paddr;
c8fe38ae
MD
1935 vm_offset_t ptppaddr;
1936 vm_page_t nkpg;
701c977e
MD
1937 pd_entry_t *pt, newpt;
1938 pdp_entry_t newpd;
a8cf2878 1939 int update_kernel_vm_end;
c8fe38ae 1940
a8cf2878
MD
1941 /*
1942 * bootstrap kernel_vm_end on first real VM use
1943 */
c8fe38ae 1944 if (kernel_vm_end == 0) {
791c6551 1945 kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
c8fe38ae 1946 nkpt = 0;
701c977e 1947 while ((*pmap_pt(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
a8cf2878
MD
1948 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) &
1949 ~(PAGE_SIZE * NPTEPG - 1);
c8fe38ae 1950 nkpt++;
48ffc236
JG
1951 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1952 kernel_vm_end = kernel_map.max_offset;
1953 break;
1954 }
c8fe38ae
MD
1955 }
1956 }
a8cf2878
MD
1957
1958 /*
1959 * Fill in the gaps. kernel_vm_end is only adjusted for ranges
1960 * below KERNBASE. Ranges above KERNBASE are kldloaded and we
1961 * do not want to force-fill 128G worth of page tables.
1962 */
1963 if (kstart < KERNBASE) {
1964 if (kstart > kernel_vm_end)
1965 kstart = kernel_vm_end;
1966 KKASSERT(kend <= KERNBASE);
1967 update_kernel_vm_end = 1;
1968 } else {
1969 update_kernel_vm_end = 0;
1970 }
1971
1972 kstart = rounddown2(kstart, PAGE_SIZE * NPTEPG);
1973 kend = roundup2(kend, PAGE_SIZE * NPTEPG);
1974
1975 if (kend - 1 >= kernel_map.max_offset)
1976 kend = kernel_map.max_offset;
1977
1978 while (kstart < kend) {
701c977e
MD
1979 pt = pmap_pt(&kernel_pmap, kstart);
1980 if (pt == NULL) {
48ffc236 1981 /* We need a new PDP entry */
701c977e 1982 nkpg = vm_page_alloc(NULL, nkpt,
a8cf2878
MD
1983 VM_ALLOC_NORMAL |
1984 VM_ALLOC_SYSTEM |
1985 VM_ALLOC_INTERRUPT);
1986 if (nkpg == NULL) {
1987 panic("pmap_growkernel: no memory to grow "
1988 "kernel");
1989 }
48ffc236 1990 paddr = VM_PAGE_TO_PHYS(nkpg);
7f2a2740
MD
1991 if ((nkpg->flags & PG_ZERO) == 0)
1992 pmap_zero_page(paddr);
1993 vm_page_flag_clear(nkpg, PG_ZERO);
701c977e 1994 newpd = (pdp_entry_t)
48ffc236 1995 (paddr | PG_V | PG_RW | PG_A | PG_M);
701c977e 1996 *pmap_pd(&kernel_pmap, kstart) = newpd;
7f2a2740 1997 nkpt++;
48ffc236
JG
1998 continue; /* try again */
1999 }
701c977e 2000 if ((*pt & PG_V) != 0) {
a8cf2878
MD
2001 kstart = (kstart + PAGE_SIZE * NPTEPG) &
2002 ~(PAGE_SIZE * NPTEPG - 1);
2003 if (kstart - 1 >= kernel_map.max_offset) {
2004 kstart = kernel_map.max_offset;
48ffc236
JG
2005 break;
2006 }
c8fe38ae
MD
2007 continue;
2008 }
2009
2010 /*
2011 * This index is bogus, but out of the way
2012 */
701c977e 2013 nkpg = vm_page_alloc(NULL, nkpt,
a8cf2878
MD
2014 VM_ALLOC_NORMAL |
2015 VM_ALLOC_SYSTEM |
2016 VM_ALLOC_INTERRUPT);
c8fe38ae
MD
2017 if (nkpg == NULL)
2018 panic("pmap_growkernel: no memory to grow kernel");
2019
2020 vm_page_wire(nkpg);
2021 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2022 pmap_zero_page(ptppaddr);
7f2a2740 2023 vm_page_flag_clear(nkpg, PG_ZERO);
701c977e
MD
2024 newpt = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
2025 *pmap_pt(&kernel_pmap, kstart) = newpt;
c8fe38ae
MD
2026 nkpt++;
2027
a8cf2878
MD
2028 kstart = (kstart + PAGE_SIZE * NPTEPG) &
2029 ~(PAGE_SIZE * NPTEPG - 1);
2030
2031 if (kstart - 1 >= kernel_map.max_offset) {
2032 kstart = kernel_map.max_offset;
48ffc236 2033 break;
c8fe38ae 2034 }
c8fe38ae 2035 }
a8cf2878
MD
2036
2037 /*
2038 * Only update kernel_vm_end for areas below KERNBASE.
2039 */
2040 if (update_kernel_vm_end && kernel_vm_end < kstart)
2041 kernel_vm_end = kstart;
d7f50089
YY
2042}
2043
2044/*
c8fe38ae
MD
2045 * Retire the given physical map from service.
2046 * Should only be called if the map contains
2047 * no valid mappings.
d7f50089 2048 */
c8fe38ae
MD
2049void
2050pmap_destroy(pmap_t pmap)
d7f50089 2051{
c8fe38ae
MD
2052 int count;
2053
2054 if (pmap == NULL)
2055 return;
2056
b12defdc 2057 lwkt_gettoken(&pmap->pm_token);
c8fe38ae
MD
2058 count = --pmap->pm_count;
2059 if (count == 0) {
b12defdc 2060 pmap_release(pmap); /* eats pm_token */
c8fe38ae
MD
2061 panic("destroying a pmap is not yet implemented");
2062 }
b12defdc 2063 lwkt_reltoken(&pmap->pm_token);
d7f50089
YY
2064}
2065
2066/*
c8fe38ae 2067 * Add a reference to the specified pmap.
d7f50089 2068 */
c8fe38ae
MD
2069void
2070pmap_reference(pmap_t pmap)
d7f50089 2071{
c8fe38ae 2072 if (pmap != NULL) {
b12defdc 2073 lwkt_gettoken(&pmap->pm_token);
c8fe38ae 2074 pmap->pm_count++;
b12defdc 2075 lwkt_reltoken(&pmap->pm_token);
c8fe38ae 2076 }
d7f50089
YY
2077}
2078
c8fe38ae 2079/***************************************************
701c977e 2080 * page management routines.
c8fe38ae 2081 ***************************************************/
d7f50089
YY
2082
2083/*
701c977e 2084 * Hold a pv without locking it
d7f50089 2085 */
701c977e
MD
2086static void
2087pv_hold(pv_entry_t pv)
d7f50089 2088{
701c977e
MD
2089 u_int count;
2090
2091 if (atomic_cmpset_int(&pv->pv_hold, 0, 1))
2092 return;
2093
2094 for (;;) {
2095 count = pv->pv_hold;
2096 cpu_ccfence();
2097 if (atomic_cmpset_int(&pv->pv_hold, count, count + 1))
2098 return;
2099 /* retry */
2100 }
d7f50089
YY
2101}
2102
2103/*
701c977e
MD
2104 * Hold a pv_entry, preventing its destruction. TRUE is returned if the pv
2105 * was successfully locked, FALSE if it wasn't. The caller must dispose of
2106 * the pv properly.
2107 *
2108 * Either the pmap->pm_spin or the related vm_page_spin (if traversing a
2109 * pv list via its page) must be held by the caller.
d7f50089 2110 */
701c977e
MD
2111static int
2112_pv_hold_try(pv_entry_t pv PMAP_DEBUG_DECL)
d7f50089 2113{
701c977e
MD
2114 u_int count;
2115
2116 if (atomic_cmpset_int(&pv->pv_hold, 0, PV_HOLD_LOCKED | 1)) {
2117#ifdef PMAP_DEBUG
2118 pv->pv_func = func;
2119 pv->pv_line = lineno;
2120#endif
2121 return TRUE;
2122 }
2123
2124 for (;;) {
2125 count = pv->pv_hold;
2126 cpu_ccfence();
2127 if ((count & PV_HOLD_LOCKED) == 0) {
2128 if (atomic_cmpset_int(&pv->pv_hold, count,
2129 (count + 1) | PV_HOLD_LOCKED)) {
2130#ifdef PMAP_DEBUG
2131 pv->pv_func = func;
2132 pv->pv_line = lineno;
2133#endif
2134 return TRUE;
2135 }
2136 } else {
2137 if (atomic_cmpset_int(&pv->pv_hold, count, count + 1))
2138 return FALSE;
2139 }
2140 /* retry */
c8fe38ae 2141 }
d7f50089
YY
2142}
2143
2144/*
701c977e
MD
2145 * Drop a previously held pv_entry which could not be locked, allowing its
2146 * destruction.
2147 *
2148 * Must not be called with a spinlock held as we might zfree() the pv if it
2149 * is no longer associated with a pmap and this was the last hold count.
d7f50089 2150 */
701c977e
MD
2151static void
2152pv_drop(pv_entry_t pv)
d7f50089 2153{
701c977e 2154 u_int count;
c8fe38ae 2155
701c977e
MD
2156 if (atomic_cmpset_int(&pv->pv_hold, 1, 0)) {
2157 if (pv->pv_pmap == NULL)
2158 zfree(pvzone, pv);
c8fe38ae 2159 return;
c8fe38ae
MD
2160 }
2161
701c977e
MD
2162 for (;;) {
2163 count = pv->pv_hold;
2164 cpu_ccfence();
2165 KKASSERT((count & PV_HOLD_MASK) > 0);
2166 KKASSERT((count & (PV_HOLD_LOCKED | PV_HOLD_MASK)) !=
2167 (PV_HOLD_LOCKED | 1));
2168 if (atomic_cmpset_int(&pv->pv_hold, count, count - 1)) {
2169 if (count == 1 && pv->pv_pmap == NULL)
2170 zfree(pvzone, pv);
2171 return;
b12defdc 2172 }
701c977e 2173 /* retry */
c8fe38ae 2174 }
d7f50089 2175}
c8fe38ae 2176
d7f50089 2177/*
701c977e 2178 * Find or allocate the requested PV entry, returning a locked pv
d7f50089 2179 */
bfc09ba0 2180static
701c977e
MD
2181pv_entry_t
2182_pv_alloc(pmap_t pmap, vm_pindex_t pindex, int *isnew PMAP_DEBUG_DECL)
c8fe38ae
MD
2183{
2184 pv_entry_t pv;
701c977e 2185 pv_entry_t pnew = NULL;
c8fe38ae 2186
701c977e
MD
2187 spin_lock(&pmap->pm_spin);
2188 for (;;) {
2189 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex) {
2190 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot,
2191 pindex);
c8fe38ae 2192 }
701c977e
MD
2193 if (pv == NULL) {
2194 if (pnew == NULL) {
2195 spin_unlock(&pmap->pm_spin);
2196 pnew = zalloc(pvzone);
2197 spin_lock(&pmap->pm_spin);
2198 continue;
2199 }
2200 pnew->pv_pmap = pmap;
2201 pnew->pv_pindex = pindex;
2202 pnew->pv_hold = PV_HOLD_LOCKED | 1;
2203#ifdef PMAP_DEBUG
2204 pnew->pv_func = func;
2205 pnew->pv_line = lineno;
2206#endif
2207 pv_entry_rb_tree_RB_INSERT(&pmap->pm_pvroot, pnew);
2208 atomic_add_long(&pmap->pm_stats.resident_count, 1);
2209 spin_unlock(&pmap->pm_spin);
2210 *isnew = 1;
2211 return(pnew);
2212 }
2213 if (pnew) {
2214 spin_unlock(&pmap->pm_spin);
2215 zfree(pvzone, pnew);
2216 pnew = NULL;
2217 spin_lock(&pmap->pm_spin);
2218 continue;
2219 }
2220 if (_pv_hold_try(pv PMAP_DEBUG_COPY)) {
2221 spin_unlock(&pmap->pm_spin);
2222 *isnew = 0;
2223 return(pv);
2224 }
2225 spin_unlock(&pmap->pm_spin);
2226 _pv_lock(pv PMAP_DEBUG_COPY);
2227 if (pv->pv_pmap == pmap && pv->pv_pindex == pindex) {
2228 *isnew = 0;
2229 return(pv);
2230 }
2231 pv_put(pv);
2232 spin_lock(&pmap->pm_spin);
2233 }
c8fe38ae 2234
5926987a 2235
701c977e 2236}
b12defdc 2237
701c977e
MD
2238/*
2239 * Find the requested PV entry, returning a locked+held pv or NULL
2240 */
2241static
2242pv_entry_t
2243_pv_get(pmap_t pmap, vm_pindex_t pindex PMAP_DEBUG_DECL)
2244{
2245 pv_entry_t pv;
5926987a 2246
701c977e
MD
2247 spin_lock(&pmap->pm_spin);
2248 for (;;) {
2249 /*
2250 * Shortcut cache
2251 */
2252 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex) {
2253 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot,
2254 pindex);
2255 }
2256 if (pv == NULL) {
2257 spin_unlock(&pmap->pm_spin);
2258 return NULL;
2259 }
2260 if (_pv_hold_try(pv PMAP_DEBUG_COPY)) {
2261 pv_cache(pv, pindex);
2262 spin_unlock(&pmap->pm_spin);
2263 return(pv);
2264 }
2265 spin_unlock(&pmap->pm_spin);
2266 _pv_lock(pv PMAP_DEBUG_COPY);
2267 if (pv->pv_pmap == pmap && pv->pv_pindex == pindex)
2268 return(pv);
2269 pv_put(pv);
2270 spin_lock(&pmap->pm_spin);
2271 }
d7f50089
YY
2272}
2273
2274/*
701c977e
MD
2275 * Lookup, hold, and attempt to lock (pmap,pindex).
2276 *
2277 * If the entry does not exist NULL is returned and *errorp is set to 0
a5fc46c9 2278 *
701c977e
MD
2279 * If the entry exists and could be successfully locked it is returned and
2280 * errorp is set to 0.
2281 *
2282 * If the entry exists but could NOT be successfully locked it is returned
2283 * held and *errorp is set to 1.
d7f50089 2284 */
bfc09ba0 2285static
701c977e
MD
2286pv_entry_t
2287pv_get_try(pmap_t pmap, vm_pindex_t pindex, int *errorp)
d7f50089 2288{
c8fe38ae
MD
2289 pv_entry_t pv;
2290
701c977e
MD
2291 spin_lock(&pmap->pm_spin);
2292 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex)
2293 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pindex);
2294 if (pv == NULL) {
2295 spin_unlock(&pmap->pm_spin);
2296 *errorp = 0;
2297 return NULL;
2298 }
2299 if (pv_hold_try(pv)) {
2300 pv_cache(pv, pindex);
2301 spin_unlock(&pmap->pm_spin);
2302 *errorp = 0;
2303 return(pv); /* lock succeeded */
2304 }
2305 spin_unlock(&pmap->pm_spin);
2306 *errorp = 1;
2307 return (pv); /* lock failed */
d7f50089
YY
2308}
2309
2310/*
701c977e 2311 * Find the requested PV entry, returning a held pv or NULL
d7f50089 2312 */
bfc09ba0 2313static
701c977e
MD
2314pv_entry_t
2315pv_find(pmap_t pmap, vm_pindex_t pindex)
c8fe38ae 2316{
701c977e 2317 pv_entry_t pv;
c8fe38ae 2318
701c977e 2319 spin_lock(&pmap->pm_spin);
b12defdc 2320
701c977e
MD
2321 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex)
2322 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pindex);
2323 if (pv == NULL) {
2324 spin_unlock(&pmap->pm_spin);
2325 return NULL;
2326 }
2327 pv_hold(pv);
2328 pv_cache(pv, pindex);
2329 spin_unlock(&pmap->pm_spin);
2330 return(pv);
2331}
2332
2333/*
2334 * Lock a held pv, keeping the hold count
2335 */
2336static
2337void
2338_pv_lock(pv_entry_t pv PMAP_DEBUG_DECL)
2339{
2340 u_int count;
2341
2342 for (;;) {
2343 count = pv->pv_hold;
2344 cpu_ccfence();
2345 if ((count & PV_HOLD_LOCKED) == 0) {
2346 if (atomic_cmpset_int(&pv->pv_hold, count,
2347 count | PV_HOLD_LOCKED)) {
2348#ifdef PMAP_DEBUG
2349 pv->pv_func = func;
2350 pv->pv_line = lineno;
2351#endif
2352 return;
c8fe38ae 2353 }
701c977e
MD
2354 continue;
2355 }
2356 tsleep_interlock(pv, 0);
2357 if (atomic_cmpset_int(&pv->pv_hold, count,
2358 count | PV_HOLD_WAITING)) {
2359#ifdef PMAP_DEBUG
2360 kprintf("pv waiting on %s:%d\n",
2361 pv->pv_func, pv->pv_line);
c8fe38ae 2362#endif
701c977e 2363 tsleep(pv, PINTERLOCKED, "pvwait", hz);
c8fe38ae 2364 }
701c977e 2365 /* retry */
b12defdc 2366 }
701c977e 2367}
c8fe38ae 2368
701c977e
MD
2369/*
2370 * Unlock a held and locked pv, keeping the hold count.
2371 */
2372static
2373void
2374pv_unlock(pv_entry_t pv)
2375{
2376 u_int count;
2377
2378 if (atomic_cmpset_int(&pv->pv_hold, PV_HOLD_LOCKED | 1, 1))
2379 return;
2380
2381 for (;;) {
2382 count = pv->pv_hold;
2383 cpu_ccfence();
2384 KKASSERT((count & (PV_HOLD_LOCKED|PV_HOLD_MASK)) >=
2385 (PV_HOLD_LOCKED | 1));
2386 if (atomic_cmpset_int(&pv->pv_hold, count,
2387 count &
2388 ~(PV_HOLD_LOCKED | PV_HOLD_WAITING))) {
2389 if (count & PV_HOLD_WAITING)
2390 wakeup(pv);
2391 break;
2392 }
7ab91d55 2393 }
d7f50089
YY
2394}
2395
2396/*
701c977e
MD
2397 * Unlock and drop a pv. If the pv is no longer associated with a pmap
2398 * and the hold count drops to zero we will free it.
d7f50089 2399 *
701c977e
MD
2400 * Caller should not hold any spin locks. We are protected from hold races
2401 * by virtue of holds only occuring only with a pmap_spin or vm_page_spin
2402 * lock held. A pv cannot be located otherwise.
d7f50089 2403 */
bfc09ba0
MD
2404static
2405void
701c977e 2406pv_put(pv_entry_t pv)
c8fe38ae 2407{
701c977e
MD
2408 if (atomic_cmpset_int(&pv->pv_hold, PV_HOLD_LOCKED | 1, 0)) {
2409 if (pv->pv_pmap == NULL)
2410 zfree(pvzone, pv);
2411 return;
2412 }
2413 pv_unlock(pv);
2414 pv_drop(pv);
2415}
c8fe38ae 2416
701c977e
MD
2417/*
2418 * Unlock, drop, and free a pv, destroying it. The pv is removed from its
2419 * pmap. Any pte operations must have already been completed.
2420 */
2421static
2422void
2423pv_free(pv_entry_t pv)
2424{
2425 pmap_t pmap;
b12defdc 2426
701c977e
MD
2427 KKASSERT(pv->pv_m == NULL);
2428 if ((pmap = pv->pv_pmap) != NULL) {
2429 spin_lock(&pmap->pm_spin);
2430 pv_entry_rb_tree_RB_REMOVE(&pmap->pm_pvroot, pv);
2431 if (pmap->pm_pvhint == pv)
2432 pmap->pm_pvhint = NULL;
2433 atomic_add_long(&pmap->pm_stats.resident_count, -1);
2434 pv->pv_pmap = NULL;
2435 pv->pv_pindex = 0;
2436 spin_unlock(&pmap->pm_spin);
2437 }
2438 pv_put(pv);
2439}
2440
2441/*
2442 * This routine is very drastic, but can save the system
2443 * in a pinch.
2444 */
2445void
2446pmap_collect(void)
2447{
2448 int i;
2449 vm_page_t m;
2450 static int warningdone=0;
2451
2452 if (pmap_pagedaemon_waken == 0)
48ffc236 2453 return;
701c977e
MD
2454 pmap_pagedaemon_waken = 0;
2455 if (warningdone < 5) {
2456 kprintf("pmap_collect: collecting pv entries -- "
2457 "suggest increasing PMAP_SHPGPERPROC\n");
2458 warningdone++;
2459 }
2460
2461 for (i = 0; i < vm_page_array_size; i++) {
2462 m = &vm_page_array[i];
2463 if (m->wire_count || m->hold_count)
2464 continue;
2465 if (vm_page_busy_try(m, TRUE) == 0) {
2466 if (m->wire_count == 0 && m->hold_count == 0) {
2467 pmap_remove_all(m);
2468 }
2469 vm_page_wakeup(m);
2470 }
2471 }
d7f50089
YY
2472}
2473
2474/*
701c977e
MD
2475 * Scan the pmap for active page table entries and issue a callback.
2476 * The callback must dispose of pte_pv.
d7f50089 2477 *
701c977e
MD
2478 * NOTE: Unmanaged page table entries will not have a pte_pv
2479 *
2480 * NOTE: Kernel page table entries will not have a pt_pv. That is, wiring
2481 * counts are not tracked in kernel page table pages.
d7f50089 2482 *
701c977e 2483 * It is assumed that the start and end are properly rounded to the page size.
d7f50089 2484 */
701c977e
MD
2485static void
2486pmap_scan(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva,
2487 void (*func)(pmap_t, struct pmap_inval_info *,
2488 pv_entry_t, pv_entry_t, vm_offset_t,
2489 pt_entry_t *, void *),
2490 void *arg)
2491{
2492 pv_entry_t pdp_pv; /* A page directory page PV */
2493 pv_entry_t pd_pv; /* A page directory PV */
2494 pv_entry_t pt_pv; /* A page table PV */
2495 pv_entry_t pte_pv; /* A page table entry PV */
2496 pt_entry_t *ptep;
48ffc236 2497 vm_offset_t va_next;
c8fe38ae 2498 struct pmap_inval_info info;
701c977e 2499 int error;
c8fe38ae
MD
2500
2501 if (pmap == NULL)
2502 return;
2503
701c977e
MD
2504 /*
2505 * Hold the token for stability; if the pmap is empty we have nothing
2506 * to do.
2507 */
b12defdc 2508 lwkt_gettoken(&pmap->pm_token);
701c977e 2509#if 0
10d6182e 2510 if (pmap->pm_stats.resident_count == 0) {
b12defdc 2511 lwkt_reltoken(&pmap->pm_token);
c8fe38ae 2512 return;
10d6182e 2513 }
701c977e 2514#endif
c8fe38ae
MD
2515
2516 pmap_inval_init(&info);
2517
2518 /*
701c977e
MD
2519 * Special handling for removing one page, which is a very common
2520 * operation (it is?).
2521 * NOTE: Locks must be ordered bottom-up. pte,pt,pd,pdp,pml4
c8fe38ae 2522 */
48ffc236 2523 if (sva + PAGE_SIZE == eva) {
701c977e
MD
2524 if (sva >= VM_MAX_USER_ADDRESS) {
2525 /*
2526 * Kernel mappings do not track wire counts on
2527 * page table pages.
2528 */
2529 pt_pv = NULL;
2530 pte_pv = pv_get(pmap, pmap_pte_pindex(sva));
2531 ptep = vtopte(sva);
2532 } else {
2533 /*
2534 * User mappings may or may not have a pte_pv but
2535 * will always have a pt_pv if the page is present.
2536 */
2537 pte_pv = pv_get(pmap, pmap_pte_pindex(sva));
2538 pt_pv = pv_get(pmap, pmap_pt_pindex(sva));
2539 if (pt_pv == NULL) {
2540 KKASSERT(pte_pv == NULL);
2541 goto fast_skip;
2542 }
2543 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(sva));
2544 }
2545 if (*ptep == 0) {
f2c5d4ab
MD
2546 /*
2547 * Unlike the pv_find() case below we actually
2548 * acquired a locked pv in this case so any
2549 * race should have been resolved. It is expected
2550 * to not exist.
2551 */
701c977e
MD
2552 KKASSERT(pte_pv == NULL);
2553 } else if (pte_pv) {
23b4bd44
MD
2554 KASSERT((*ptep & (PG_MANAGED|PG_V)) == (PG_MANAGED|
2555 PG_V),
2556 ("bad *ptep %016lx sva %016lx pte_pv %p",
2557 *ptep, sva, pte_pv));
701c977e
MD
2558 func(pmap, &info, pte_pv, pt_pv, sva, ptep, arg);
2559 } else {
23b4bd44
MD
2560 KASSERT((*ptep & (PG_MANAGED|PG_V)) == PG_V,
2561 ("bad *ptep %016lx sva %016lx pte_pv NULL",
2562 *ptep, sva));
701c977e 2563 func(pmap, &info, pte_pv, pt_pv, sva, ptep, arg);
48ffc236 2564 }
701c977e
MD
2565 if (pt_pv)
2566 pv_put(pt_pv);
2567fast_skip:
2568 pmap_inval_done(&info);
2569 lwkt_reltoken(&pmap->pm_token);
2570 return;
c8fe38ae
MD
2571 }
2572
701c977e
MD
2573 /*
2574 * NOTE: kernel mappings do not track page table pages, only
2575 * terminal pages.
2576 *
2577 * NOTE: Locks must be ordered bottom-up. pte,pt,pd,pdp,pml4.
2578 * However, for the scan to be efficient we try to
2579 * cache items top-down.
2580 */
2581 pdp_pv = NULL;
2582 pd_pv = NULL;
2583 pt_pv = NULL;
2584
48ffc236 2585 for (; sva < eva; sva = va_next) {
701c977e
MD
2586 lwkt_yield();
2587 if (sva >= VM_MAX_USER_ADDRESS) {
2588 if (pt_pv) {
2589 pv_put(pt_pv);
2590 pt_pv = NULL;
2591 }
2592 goto kernel_skip;
2593 }
2594
2595 /*
2596 * PDP cache
2597 */
2598 if (pdp_pv == NULL) {
2599 pdp_pv = pv_get(pmap, pmap_pdp_pindex(sva));
2600 } else if (pdp_pv->pv_pindex != pmap_pdp_pindex(sva)) {
2601 pv_put(pdp_pv);
2602 pdp_pv = pv_get(pmap, pmap_pdp_pindex(sva));
2603 }
2604 if (pdp_pv == NULL) {
48ffc236
JG
2605 va_next = (sva + NBPML4) & ~PML4MASK;
2606 if (va_next < sva)
2607 va_next = eva;
2608 continue;
2609 }
c8fe38ae 2610
701c977e
MD
2611 /*
2612 * PD cache
2613 */
2614 if (pd_pv == NULL) {
2615 if (pdp_pv) {
2616 pv_put(pdp_pv);
2617 pdp_pv = NULL;
2618 }
2619 pd_pv = pv_get(pmap, pmap_pd_pindex(sva));
2620 } else if (pd_pv->pv_pindex != pmap_pd_pindex(sva)) {
2621 pv_put(pd_pv);
2622 if (pdp_pv) {
2623 pv_put(pdp_pv);
2624 pdp_pv = NULL;
2625 }
2626 pd_pv = pv_get(pmap, pmap_pd_pindex(sva));
2627 }
2628 if (pd_pv == NULL) {
48ffc236
JG
2629 va_next = (sva + NBPDP) & ~PDPMASK;
2630 if (va_next < sva)
2631 va_next = eva;
2632 continue;
2633 }
c8fe38ae
MD
2634
2635 /*
701c977e 2636 * PT cache
c8fe38ae 2637 */
701c977e
MD
2638 if (pt_pv == NULL) {
2639 if (pdp_pv) {
2640 pv_put(pdp_pv);
2641 pdp_pv = NULL;
2642 }
2643 if (pd_pv) {
2644 pv_put(pd_pv);
2645 pd_pv = NULL;
2646 }
2647 pt_pv = pv_get(pmap, pmap_pt_pindex(sva));
2648 } else if (pt_pv->pv_pindex != pmap_pt_pindex(sva)) {
2649 if (pdp_pv) {
2650 pv_put(pdp_pv);
2651 pdp_pv = NULL;
2652 }
2653 if (pd_pv) {
2654 pv_put(pd_pv);
2655 pd_pv = NULL;
2656 }
2657 pv_put(pt_pv);
2658 pt_pv = pv_get(pmap, pmap_pt_pindex(sva));
2659 }
c8fe38ae
MD
2660
2661 /*
701c977e
MD
2662 * We will scan or skip a page table page so adjust va_next
2663 * either way.
c8fe38ae 2664 */
701c977e
MD
2665 if (pt_pv == NULL) {
2666 va_next = (sva + NBPDR) & ~PDRMASK;
2667 if (va_next < sva)
2668 va_next = eva;
c8fe38ae 2669 continue;
701c977e 2670 }
c8fe38ae
MD
2671
2672 /*
701c977e
MD
2673 * From this point in the loop testing pt_pv for non-NULL
2674 * means we are in UVM, else if it is NULL we are in KVM.
48ffc236 2675 */
701c977e
MD
2676kernel_skip:
2677 va_next = (sva + NBPDR) & ~PDRMASK;
2678 if (va_next < sva)
2679 va_next = eva;
48ffc236
JG
2680
2681 /*
c8fe38ae
MD
2682 * Limit our scan to either the end of the va represented
2683 * by the current page table page, or to the end of the
2684 * range being removed.
701c977e
MD
2685 *
2686 * Scan the page table for pages. Some pages may not be
2687 * managed (might not have a pv_entry).
2688 *
2689 * There is no page table management for kernel pages so
2690 * pt_pv will be NULL in that case, but otherwise pt_pv
2691 * is non-NULL, locked, and referenced.
c8fe38ae 2692 */
48ffc236
JG
2693 if (va_next > eva)
2694 va_next = eva;
c8fe38ae 2695
f2c5d4ab
MD
2696 /*
2697 * At this point a non-NULL pt_pv means a UVA, and a NULL
2698 * pt_pv means a KVA.
2699 */
701c977e
MD
2700 if (pt_pv)
2701 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(sva));
2702 else
2703 ptep = vtopte(sva);
2704
2705 while (sva < va_next) {
f2c5d4ab 2706 /*
90244566
MD
2707 * Acquire the related pte_pv, if any. If *ptep == 0
2708 * the related pte_pv should not exist, but if *ptep
2709 * is not zero the pte_pv may or may not exist (e.g.
2710 * will not exist for an unmanaged page).
f2c5d4ab 2711 *
90244566
MD
2712 * However a multitude of races are possible here.
2713 *
2714 * In addition, the (pt_pv, pte_pv) lock order is
2715 * backwards, so we have to be careful in aquiring
2716 * a properly locked pte_pv.
f2c5d4ab 2717 */
fc9ed34d 2718 lwkt_yield();
701c977e
MD
2719 if (pt_pv) {
2720 pte_pv = pv_get_try(pmap, pmap_pte_pindex(sva),
2721 &error);
2722 if (error) {
701c977e
MD
2723 if (pdp_pv) {
2724 pv_put(pdp_pv);
2725 pdp_pv = NULL;
2726 }
2727 if (pd_pv) {
2728 pv_put(pd_pv);
2729 pd_pv = NULL;
2730 }
2731 pv_put(pt_pv); /* must be non-NULL */
2732 pt_pv = NULL;
2733 pv_lock(pte_pv); /* safe to block now */
2734 pv_put(pte_pv);
2735 pte_pv = NULL;
2736 pt_pv = pv_get(pmap,
2737 pmap_pt_pindex(sva));
2738 continue;
2739 }
2740 } else {
2741 pte_pv = pv_get(pmap, pmap_pte_pindex(sva));
2742 }
2743
2744 /*
90244566 2745 * Ok, if *ptep == 0 we had better NOT have a pte_pv.
a505393f
MD
2746 */
2747 if (*ptep == 0) {
2748 if (pte_pv) {
90244566
MD
2749 kprintf("Unexpected non-NULL pte_pv "
2750 "%p pt_pv %p *ptep = %016lx\n",
2751 pte_pv, pt_pv, *ptep);
2752 panic("Unexpected non-NULL pte_pv");
a505393f 2753 }
90244566
MD
2754 sva += PAGE_SIZE;
2755 ++ptep;
a505393f
MD
2756 continue;
2757 }
2758
2759 /*
90244566
MD
2760 * Ready for the callback. The locked pte_pv (if any)
2761 * is consumed by the callback. pte_pv will exist if
2762 * the page is managed, and will not exist if it
2763 * isn't.
701c977e
MD
2764 */
2765 if (pte_pv) {
23b4bd44
MD
2766 KASSERT((*ptep & (PG_MANAGED|PG_V)) ==
2767 (PG_MANAGED|PG_V),
2768 ("bad *ptep %016lx sva %016lx "
2769 "pte_pv %p",
2770 *ptep, sva, pte_pv));
701c977e
MD
2771 func(pmap, &info, pte_pv, pt_pv, sva,
2772 ptep, arg);
2773 } else {
23b4bd44
MD
2774 KASSERT((*ptep & (PG_MANAGED|PG_V)) ==
2775 PG_V,
2776 ("bad *ptep %016lx sva %016lx "
2777 "pte_pv NULL",
2778 *ptep, sva));
701c977e
MD
2779 func(pmap, &info, pte_pv, pt_pv, sva,
2780 ptep, arg);
2781 }
f2c5d4ab 2782 pte_pv = NULL;
701c977e
MD
2783 sva += PAGE_SIZE;
2784 ++ptep;
c8fe38ae
MD
2785 }
2786 }
701c977e
MD
2787 if (pdp_pv) {
2788 pv_put(pdp_pv);
2789 pdp_pv = NULL;
2790 }
2791 if (pd_pv) {
2792 pv_put(pd_pv);
2793 pd_pv = NULL;
2794 }
2795 if (pt_pv) {
2796 pv_put(pt_pv);
2797 pt_pv = NULL;
2798 }
c2fb025d 2799 pmap_inval_done(&info);
b12defdc 2800 lwkt_reltoken(&pmap->pm_token);
701c977e
MD
2801}
2802
2803void
2804pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
2805{
2806 pmap_scan(pmap, sva, eva, pmap_remove_callback, NULL);
2807}
2808
2809static void
2810pmap_remove_callback(pmap_t pmap, struct pmap_inval_info *info,
2811 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
2812 pt_entry_t *ptep, void *arg __unused)
2813{
2814 pt_entry_t pte;
2815
2816 if (pte_pv) {
2817 /*
2818 * This will also drop pt_pv's wire_count. Note that
2819 * terminal pages are not wired based on mmu presence.
2820 */
2821 pmap_remove_pv_pte(pte_pv, pt_pv, info);
52bb73bc 2822 pmap_remove_pv_page(pte_pv);
701c977e
MD
2823 pv_free(pte_pv);
2824 } else {
2825 /*
2826 * pt_pv's wire_count is still bumped by unmanaged pages
2827 * so we must decrement it manually.
2828 */
2829 pmap_inval_interlock(info, pmap, va);
2830 pte = pte_load_clear(ptep);
2831 pmap_inval_deinterlock(info, pmap);
2832 if (pte & PG_W)
2833 atomic_add_long(&pmap->pm_stats.wired_count, -1);
2834 atomic_add_long(&pmap->pm_stats.resident_count, -1);
2835 if (pt_pv && vm_page_unwire_quick(pt_pv->pv_m))
2836 panic("pmap_remove: insufficient wirecount");
2837 }
d7f50089
YY
2838}
2839
2840/*
b12defdc
MD
2841 * Removes this physical page from all physical maps in which it resides.
2842 * Reflects back modify bits to the pager.
d7f50089 2843 *
b12defdc 2844 * This routine may not be called from an interrupt.
d7f50089 2845 */
bfc09ba0
MD
2846static
2847void
d7f50089
YY
2848pmap_remove_all(vm_page_t m)
2849{
c8fe38ae 2850 struct pmap_inval_info info;
c8fe38ae
MD
2851 pv_entry_t pv;
2852
2853 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2854 return;
2855
2856 pmap_inval_init(&info);
701c977e 2857 vm_page_spin_lock(m);
c8fe38ae 2858 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
701c977e
MD
2859 KKASSERT(pv->pv_m == m);
2860 if (pv_hold_try(pv)) {
2861 vm_page_spin_unlock(m);
2862 } else {
2863 vm_page_spin_unlock(m);
2864 pv_lock(pv);
2865 if (pv->pv_m != m) {
2866 pv_put(pv);
2867 vm_page_spin_lock(m);
2868 continue;
2869 }
b12defdc 2870 }
b12defdc 2871 /*
701c977e 2872 * Holding no spinlocks, pv is locked.
b12defdc 2873 */
701c977e 2874 pmap_remove_pv_pte(pv, NULL, &info);
52bb73bc 2875 pmap_remove_pv_page(pv);
701c977e 2876 pv_free(pv);
b12defdc 2877 vm_page_spin_lock(m);
c8fe38ae 2878 }
c8fe38ae 2879 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
52bb73bc 2880 vm_page_spin_unlock(m);
c2fb025d 2881 pmap_inval_done(&info);
d7f50089
YY
2882}
2883
2884/*
2885 * pmap_protect:
2886 *
2887 * Set the physical protection on the specified range of this map
2888 * as requested.
2889 *
2890 * This function may not be called from an interrupt if the map is
2891 * not the kernel_pmap.
2892 */
2893void
2894pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2895{
48ffc236
JG
2896 /* JG review for NX */
2897
c8fe38ae
MD
2898 if (pmap == NULL)
2899 return;
c8fe38ae
MD
2900 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2901 pmap_remove(pmap, sva, eva);
2902 return;
2903 }
c8fe38ae
MD
2904 if (prot & VM_PROT_WRITE)
2905 return;
701c977e
MD
2906 pmap_scan(pmap, sva, eva, pmap_protect_callback, &prot);
2907}
c8fe38ae 2908
701c977e
MD
2909static
2910void
2911pmap_protect_callback(pmap_t pmap, struct pmap_inval_info *info,
2912 pv_entry_t pte_pv, pv_entry_t pt_pv, vm_offset_t va,
2913 pt_entry_t *ptep, void *arg __unused)
2914{
2915 pt_entry_t pbits;
2916 pt_entry_t cbits;
2917 vm_page_t m;
c8fe38ae 2918
701c977e
MD
2919 /*
2920 * XXX non-optimal.
2921 */
2922 pmap_inval_interlock(info, pmap, va);
c2fb025d 2923again:
701c977e
MD
2924 pbits = *ptep;
2925 cbits = pbits;
2926 if (pte_pv) {
2927 m = NULL;
2928 if (pbits & PG_A) {
2929 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
2930 KKASSERT(m == pte_pv->pv_m);
2931 vm_page_flag_set(m, PG_REFERENCED);
2932 cbits &= ~PG_A;
2933 }
2934 if (pbits & PG_M) {
2935 if (pmap_track_modified(pte_pv->pv_pindex)) {
2936 if (m == NULL)
48ffc236 2937 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
701c977e
MD
2938 vm_page_dirty(m);
2939 cbits &= ~PG_M;
c8fe38ae
MD
2940 }
2941 }
2942 }
701c977e
MD
2943 cbits &= ~PG_RW;
2944 if (pbits != cbits && !atomic_cmpset_long(ptep, pbits, cbits)) {
2945 goto again;
2946 }
2947 pmap_inval_deinterlock(info, pmap);
2948 if (pte_pv)
2949 pv_put(pte_pv);
d7f50089
YY
2950}
2951
2952/*
701c977e
MD
2953 * Insert the vm_page (m) at the virtual address (va), replacing any prior
2954 * mapping at that address. Set protection and wiring as requested.
d7f50089 2955 *
701c977e
MD
2956 * NOTE: This routine MUST insert the page into the pmap now, it cannot
2957 * lazy-evaluate.
d7f50089
YY
2958 */
2959void
2960pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2961 boolean_t wired)
701c977e
MD
2962{
2963 pmap_inval_info info;
2964 pv_entry_t pt_pv; /* page table */
2965 pv_entry_t pte_pv; /* page table entry */
2966 pt_entry_t *ptep;
c8fe38ae 2967 vm_paddr_t opa;
48ffc236 2968 pt_entry_t origpte, newpte;
701c977e 2969 vm_paddr_t pa;
c8fe38ae
MD
2970
2971 if (pmap == NULL)
2972 return;
48ffc236 2973 va = trunc_page(va);
c8fe38ae
MD
2974#ifdef PMAP_DIAGNOSTIC
2975 if (va >= KvaEnd)
2976 panic("pmap_enter: toobig");
2977 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
701c977e
MD
2978 panic("pmap_enter: invalid to pmap_enter page table "
2979 "pages (va: 0x%lx)", va);
c8fe38ae
MD
2980#endif
2981 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
701c977e
MD
2982 kprintf("Warning: pmap_enter called on UVA with "
2983 "kernel_pmap\n");
48ffc236
JG
2984#ifdef DDB
2985 db_print_backtrace();
2986#endif
c8fe38ae
MD
2987 }
2988 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
701c977e
MD
2989 kprintf("Warning: pmap_enter called on KVA without"
2990 "kernel_pmap\n");
48ffc236
JG
2991#ifdef DDB
2992 db_print_backtrace();
2993#endif
c8fe38ae
MD
2994 }
2995
2996 /*
701c977e
MD
2997 * Get locked PV entries for our new page table entry (pte_pv)
2998 * and for its parent page table (pt_pv). We need the parent
2999 * so we can resolve the location of the ptep.
3000 *
3001 * Only hardware MMU actions can modify the ptep out from
3002 * under us.
3003 *
3004 * if (m) is fictitious or unmanaged we do not create a managing
3005 * pte_pv for it. Any pre-existing page's management state must
3006 * match (avoiding code complexity).
3007 *
3008 * If the pmap is still being initialized we assume existing
3009 * page tables.
3010 *
3011 * Kernel mapppings do not track page table pages (i.e. pt_pv).
3012 * pmap_allocpte() checks the
3013 */
3014 if (pmap_initialized == FALSE) {
3015 pte_pv = NULL;
3016 pt_pv = NULL;
3017 ptep = vtopte(va);
3018 } else if (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) {
3019 pte_pv = NULL;
3020 if (va >= VM_MAX_USER_ADDRESS) {
3021 pt_pv = NULL;
3022 ptep = vtopte(va);
3023 } else {
3024 pt_pv = pmap_allocpte(pmap, pmap_pt_pindex(va), NULL);
3025 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
3026 }
3027 KKASSERT(*ptep == 0 || (*ptep & PG_MANAGED) == 0);
3028 } else {
3029 if (va >= VM_MAX_USER_ADDRESS) {
3030 pt_pv = NULL;
3031 pte_pv = pmap_allocpte(pmap, pmap_pte_pindex(va), NULL);
3032 ptep = vtopte(va);
3033 } else {
3034 pte_pv = pmap_allocpte(pmap, pmap_pte_pindex(va),
3035 &pt_pv);
3036 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
3037 }
3038 KKASSERT(*ptep == 0 || (*ptep & PG_MANAGED));
3039 }
c8fe38ae 3040
48ffc236 3041 pa = VM_PAGE_TO_PHYS(m);
701c977e 3042 origpte = *ptep;
c8fe38ae
MD
3043 opa = origpte & PG_FRAME;
3044
52bb73bc
MD
3045 newpte = (pt_entry_t)(pa | pte_prot(pmap, prot) | PG_V | PG_A);
3046 if (wired)
3047 newpte |= PG_W;
3048 if (va < VM_MAX_USER_ADDRESS)
3049 newpte |= PG_U;
3050 if (pte_pv)
3051 newpte |= PG_MANAGED;
3052 if (pmap == &kernel_pmap)
3053 newpte |= pgeflag;
3054
c8fe38ae 3055 /*
52bb73bc
MD
3056 * It is possible for multiple faults to occur in threaded
3057 * environments, the existing pte might be correct.
c8fe38ae 3058 */
52bb73bc
MD
3059 if (((origpte ^ newpte) & ~(pt_entry_t)(PG_M|PG_A)) == 0)
3060 goto done;
c8fe38ae 3061
52bb73bc
MD
3062 if ((prot & VM_PROT_NOSYNC) == 0)
3063 pmap_inval_init(&info);
701c977e 3064
c8fe38ae 3065 /*
52bb73bc
MD
3066 * Ok, either the address changed or the protection or wiring
3067 * changed.
701c977e 3068 *
52bb73bc
MD
3069 * Clear the current entry, interlocking the removal. For managed
3070 * pte's this will also flush the modified state to the vm_page.
3071 * Atomic ops are mandatory in order to ensure that PG_M events are
3072 * not lost during any transition.
701c977e
MD
3073 */
3074 if (opa) {
3075 if (pte_pv) {
52bb73bc
MD
3076 /*
3077 * pmap_remove_pv_pte() unwires pt_pv and assumes
3078 * we will free pte_pv, but since we are reusing
3079 * pte_pv we want to retain the wire count.
609cc523
MD
3080 *
3081 * pt_pv won't exist for a kernel page (managed or
3082 * otherwise).
52bb73bc 3083 */
609cc523
MD
3084 if (pt_pv)
3085 vm_page_wire_quick(pt_pv->pv_m);
701c977e
MD
3086 if (prot & VM_PROT_NOSYNC)
3087 pmap_remove_pv_pte(pte_pv, pt_pv, NULL);
3088 else
3089 pmap_remove_pv_pte(pte_pv, pt_pv, &info);
3090 if (pte_pv->pv_m)
52bb73bc 3091 pmap_remove_pv_page(pte_pv);
701c977e 3092 } else if (prot & VM_PROT_NOSYNC) {
52bb73bc
MD
3093 /* leave wire count on PT page intact */
3094 (void)pte_load_clear(ptep);
701c977e
MD
3095 cpu_invlpg((void *)va);
3096 atomic_add_long(&pmap->pm_stats.resident_count, -1);
3097 } else {
52bb73bc 3098 /* leave wire count on PT page intact */
701c977e 3099 pmap_inval_interlock(&info, pmap, va);
52bb73bc 3100 (void)pte_load_clear(ptep);
701c977e
MD
3101 pmap_inval_deinterlock(&info, pmap);
3102 atomic_add_long(&pmap->pm_stats.resident_count, -1);
5926987a 3103 }
701c977e 3104 KKASSERT(*ptep == 0);
c8fe38ae
MD
3105 }
3106
701c977e 3107 if (pte_pv) {
52bb73bc
MD
3108 /*
3109 * Enter on the PV list if part of our managed memory.
3110 * Wiring of the PT page is already handled.
3111 */
701c977e
MD
3112 KKASSERT(pte_pv->pv_m == NULL);
3113 vm_page_spin_lock(m);
3114 pte_pv->pv_m = m;
3115 TAILQ_INSERT_TAIL(&m->md.pv_list, pte_pv, pv_list);
3116 /*
3117 if (m->object)
3118 atomic_add_int(&m->object->agg_pv_list_count, 1);
3119 */
c8fe38ae 3120 vm_page_flag_set(m, PG_MAPPED);
701c977e 3121 vm_page_spin_unlock(m);
79ccbaae 3122 } else if (pt_pv && opa == 0) {
52bb73bc
MD
3123 /*
3124 * We have to adjust the wire count on the PT page ourselves
3125 * for unmanaged entries. If opa was non-zero we retained
3126 * the existing wire count from the removal.
3127 */
79ccbaae 3128 vm_page_wire_quick(pt_pv->pv_m);
c8fe38ae
MD
3129 }
3130
3131 /*
52bb73bc
MD
3132 * Ok, for UVM (pt_pv != NULL) we don't need to interlock or
3133 * invalidate anything, the TLB won't have any stale entries to
3134 * remove.
3135 *
3136 * For KVM there appear to still be issues. Theoretically we
3137 * should be able to scrap the interlocks entirely but we
3138 * get crashes.
c8fe38ae 3139 */
52bb73bc
MD
3140 if ((prot & VM_PROT_NOSYNC) == 0 && pt_pv == NULL)
3141 pmap_inval_interlock(&info, pmap, va);
3142 *(volatile pt_entry_t *)ptep = newpte;
c8fe38ae 3143
52bb73bc
MD
3144 if ((prot & VM_PROT_NOSYNC) == 0 && pt_pv == NULL)
3145 pmap_inval_deinterlock(&info, pmap);
3146 else if (pt_pv == NULL)
3147 cpu_invlpg((void *)va);
c8fe38ae
MD
3148
3149 if (wired)
52bb73bc
MD
3150 atomic_add_long(&pmap->pm_stats.wired_count, 1);
3151 if (newpte & PG_RW)
3152 vm_page_flag_set(m, PG_WRITEABLE);
3153 if (pte_pv == NULL)
3154 atomic_add_long(&pmap->pm_stats.resident_count, 1);
c8fe38ae
MD
3155
3156 /*
52bb73bc 3157 * Cleanup
c8fe38ae 3158 */
52bb73bc 3159 if ((prot & VM_PROT_NOSYNC) == 0 || pte_pv == NULL)
b12defdc 3160 pmap_inval_done(&info);
52bb73bc
MD
3161done:
3162 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
701c977e
MD
3163
3164 /*
3165 * Cleanup the pv entry, allowing other accessors.
3166 */
3167 if (pte_pv)
3168 pv_put(pte_pv);
3169 if (pt_pv)
3170 pv_put(pt_pv);
d7f50089
YY
3171}
3172
3173/*
c8fe38ae
MD
3174 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
3175 * This code also assumes that the pmap has no pre-existing entry for this
3176 * VA.
d7f50089 3177 *
c8fe38ae 3178 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 3179 */
bfc09ba0 3180void
c8fe38ae 3181pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
d7f50089 3182{
701c977e 3183 pmap_enter(pmap, va, m, VM_PROT_READ, FALSE);
d7f50089
YY
3184}
3185
3186/*
c8fe38ae
MD
3187 * Make a temporary mapping for a physical address. This is only intended
3188 * to be used for panic dumps.
fb8345e6
MD
3189 *
3190 * The caller is responsible for calling smp_invltlb().
d7f50089 3191 */
c8fe38ae 3192void *
8e5ea5f7 3193pmap_kenter_temporary(vm_paddr_t pa, long i)
d7f50089 3194{
fb8345e6 3195 pmap_kenter_quick((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
c8fe38ae 3196 return ((void *)crashdumpmap);
d7f50089
YY
3197}
3198
c8fe38ae
MD
3199#define MAX_INIT_PT (96)
3200
d7f50089
YY
3201/*
3202 * This routine preloads the ptes for a given object into the specified pmap.
3203 * This eliminates the blast of soft faults on process startup and
3204 * immediately after an mmap.
3205 */
3206static int pmap_object_init_pt_callback(vm_page_t p, void *data);
3207
3208void
3209pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
3210 vm_object_t object, vm_pindex_t pindex,
3211 vm_size_t size, int limit)
3212{
c8fe38ae
MD
3213 struct rb_vm_page_scan_info info;
3214 struct lwp *lp;
48ffc236 3215 vm_size_t psize;
c8fe38ae
MD
3216
3217 /*
3218 * We can't preinit if read access isn't set or there is no pmap
3219 * or object.
3220 */
3221 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
3222 return;
3223
3224 /*
3225 * We can't preinit if the pmap is not the current pmap
3226 */
3227 lp = curthread->td_lwp;
3228 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
3229 return;
3230
b2b3ffcd 3231 psize = x86_64_btop(size);
c8fe38ae
MD
3232
3233 if ((object->type != OBJT_VNODE) ||
3234 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
3235 (object->resident_page_count > MAX_INIT_PT))) {
3236 return;
3237 }
3238
701c977e 3239 if (pindex + psize > object->size) {
c8fe38ae
MD
3240 if (object->size < pindex)
3241 return;
3242 psize = object->size - pindex;
3243 }
3244
3245 if (psize == 0)
3246 return;
3247
3248 /*
3249 * Use a red-black scan to traverse the requested range and load
3250 * any valid pages found into the pmap.
3251 *
a5fc46c9
MD
3252 * We cannot safely scan the object's memq without holding the
3253 * object token.
c8fe38ae
MD
3254 */
3255 info.start_pindex = pindex;
3256 info.end_pindex = pindex + psize - 1;
3257 info.limit = limit;
3258 info.mpte = NULL;
3259 info.addr = addr;
3260 info.pmap = pmap;
3261
54341a3b 3262 vm_object_hold_shared(object);
c8fe38ae
MD
3263 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
3264 pmap_object_init_pt_callback, &info);
a5fc46c9 3265 vm_object_drop(object);
d7f50089
YY
3266}
3267
3268static
3269int
3270pmap_object_init_pt_callback(vm_page_t p, void *data)
3271{
c8fe38ae
MD
3272 struct rb_vm_page_scan_info *info = data;
3273 vm_pindex_t rel_index;
b12defdc 3274
c8fe38ae
MD
3275 /*
3276 * don't allow an madvise to blow away our really
3277 * free pages allocating pv entries.
3278 */
3279 if ((info->limit & MAP_PREFAULT_MADVISE) &&
3280 vmstats.v_free_count < vmstats.v_free_reserved) {
3281 return(-1);
3282 }
0d987a03
MD
3283
3284 /*
3285 * Ignore list markers and ignore pages we cannot instantly
3286 * busy (while holding the object token).
3287 */
3288 if (p->flags & PG_MARKER)
3289 return 0;
b12defdc
MD
3290 if (vm_page_busy_try(p, TRUE))
3291 return 0;
c8fe38ae 3292 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
b12defdc 3293 (p->flags & PG_FICTITIOUS) == 0) {
c8fe38ae
MD
3294 if ((p->queue - p->pc) == PQ_CACHE)
3295 vm_page_deactivate(p);
c8fe38ae
MD
3296 rel_index = p->pindex - info->start_pindex;
3297 pmap_enter_quick(info->pmap,
b2b3ffcd 3298 info->addr + x86_64_ptob(rel_index), p);
c8fe38ae 3299 }
b12defdc 3300 vm_page_wakeup(p);
fc9ed34d 3301 lwkt_yield();
d7f50089
YY
3302 return(0);
3303}
3304
3305/*
701c977e
MD
3306 * Return TRUE if the pmap is in shape to trivially pre-fault the specified
3307 * address.
1b9d3514 3308 *
701c977e
MD
3309 * Returns FALSE if it would be non-trivial or if a pte is already loaded
3310 * into the slot.
54341a3b
MD
3311 *
3312 * XXX This is safe only because page table pages are not freed.
d7f50089 3313 */
1b9d3514
MD
3314int
3315pmap_prefault_ok(pmap_t pmap, vm_offset_t addr)
d7f50089 3316{
1b9d3514 3317 pt_entry_t *pte;
c8fe38ae 3318
54341a3b 3319 /*spin_lock(&pmap->pm_spin);*/
701c977e
MD
3320 if ((pte = pmap_pte(pmap, addr)) != NULL) {
3321 if (*pte & PG_V) {
54341a3b 3322 /*spin_unlock(&pmap->pm_spin);*/
701c977e
MD
3323 return FALSE;
3324 }
10d6182e 3325 }
54341a3b 3326 /*spin_unlock(&pmap->pm_spin);*/
701c977e 3327 return TRUE;
d7f50089
YY
3328}
3329
3330/*
701c977e
MD
3331 * Change the wiring attribute for a pmap/va pair. The mapping must already
3332 * exist in the pmap. The mapping may or may not be managed.
d7f50089
YY
3333 */
3334void
3335pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3336{
701c977e
MD
3337 pt_entry_t *ptep;
3338 pv_entry_t pv;
c8fe38ae
MD
3339
3340 if (pmap == NULL)
3341 return;
b12defdc 3342 lwkt_gettoken(&pmap->pm_token);
701c977e
MD
3343 pv = pmap_allocpte(pmap, pmap_pt_pindex(va), NULL);
3344 ptep = pv_pte_lookup(pv, pmap_pte_index(va));
c8fe38ae 3345
701c977e
MD
3346 if (wired && !pmap_pte_w(ptep))
3347 atomic_add_long(&pmap->pm_stats.wired_count, 1);
3348 else if (!wired && pmap_pte_w(ptep))
3349 atomic_add_long(&pmap->pm_stats.wired_count, -1);
c8fe38ae
MD
3350
3351 /*
3352 * Wiring is not a hardware characteristic so there is no need to
3353 * invalidate TLB. However, in an SMP environment we must use
3354 * a locked bus cycle to update the pte (if we are not using
3355 * the pmap_inval_*() API that is)... it's ok to do this for simple
3356 * wiring changes.
3357 */
3358#ifdef SMP
3359 if (wired)
701c977e 3360 atomic_set_long(ptep, PG_W);
c8fe38ae 3361 else
701c977e 3362 atomic_clear_long(ptep, PG_W);
c8fe38ae
MD
3363#else
3364 if (wired)
701c977e 3365 atomic_set_long_nonlocked(ptep, PG_W);
c8fe38ae 3366 else
701c977e 3367 atomic_clear_long_nonlocked(ptep, PG_W);
c8fe38ae 3368#endif
701c977e 3369 pv_put(pv);
b12defdc 3370 lwkt_reltoken(&pmap->pm_token);
d7f50089
YY
3371}
3372
c8fe38ae
MD
3373
3374
d7f50089 3375/*
a5fc46c9
MD
3376 * Copy the range specified by src_addr/len from the source map to
3377 * the range dst_addr/len in the destination map.
d7f50089 3378 *
a5fc46c9 3379 * This routine is only advisory and need not do anything.
d7f50089
YY
3380 */
3381void
3382pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
bfc09ba0 3383 vm_size_t len, vm_offset_t src_addr)
d7f50089
YY
3384{
3385}
3386
3387/*
3388 * pmap_zero_page:
3389 *
48ffc236