jme: Put TX related stuffs into struct jme_txdata
[dragonfly.git] / sys / dev / netif / jme / if_jmevar.h
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1/*-
2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
b249905b 28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
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29 */
30
31#ifndef _IF_JMEVAR_H
32#define _IF_JMEVAR_H
33
34#include <sys/queue.h>
35#include <sys/callout.h>
36#include <sys/taskqueue.h>
37
38/*
7405bec3 39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
83b03786 40 * descriptors should be multiple of JME_NDESC_ALIGN.
76fbb0b9 41 */
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42#define JME_TX_DESC_CNT_DEF 512
43#define JME_RX_DESC_CNT_DEF 512
69325526 44
83b03786 45#define JME_NDESC_ALIGN 16
69325526 46#define JME_NDESC_MAX 1024
83b03786 47
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48#define JME_NRXRING_1 1
49#define JME_NRXRING_2 2
50#define JME_NRXRING_4 4
51
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52#define JME_NRXRING_MIN JME_NRXRING_1
53#define JME_NRXRING_MAX JME_NRXRING_4
4447c752 54
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55/* RX rings + TX ring + status */
56#define JME_NSERIALIZE (JME_NRXRING_MAX + 1 + 1)
31f0d5a2 57
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58/* RX rings + TX ring + status */
59#define JME_MSIXCNT(nrx) ((nrx) + 1 + 1)
60#define JME_NMSIX JME_MSIXCNT(JME_NRXRING_MAX)
58880b0d 61
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62/*
63 * Tx/Rx descriptor queue base should be 16bytes aligned and
64 * should not cross 4G bytes boundary on the 64bits address
65 * mode.
66 */
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67#define JME_TX_RING_ALIGN __VM_CACHELINE_SIZE
68#define JME_RX_RING_ALIGN __VM_CACHELINE_SIZE
9d424cee 69#define JME_MAXSEGSIZE 4096
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70#define JME_TSO_MAXSIZE (IP_MAXPACKET + sizeof(struct ether_vlan_header))
71#define JME_MAXTXSEGS 40
76fbb0b9 72#define JME_RX_BUF_ALIGN sizeof(uint64_t)
ff7f3632 73#define JME_SSB_ALIGN __VM_CACHELINE_SIZE
76fbb0b9 74
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75#if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
76#define JME_RING_BOUNDARY 0x100000000ULL
77#else
78#define JME_RING_BOUNDARY 0
79#endif
80
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81#define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
82#define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
83
76fbb0b9 84/* Water mark to kick reclaiming Tx buffers. */
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85#define JME_TX_DESC_HIWAT(tdata) \
86 ((tdata)->jme_tx_desc_cnt - (((tdata)->jme_tx_desc_cnt * 3) / 10))
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87
88/*
89 * JMC250 can send 9K jumbo frame on Tx path and can receive
90 * 65535 bytes.
91 */
92#define JME_JUMBO_FRAMELEN 9216
93#define JME_JUMBO_MTU \
94 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
95 ETHER_HDR_LEN - ETHER_CRC_LEN)
96#define JME_MAX_MTU \
97 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
98 ETHER_HDR_LEN - ETHER_CRC_LEN)
99/*
100 * JMC250 can't handle Tx checksum offload/TSO if frame length
101 * is larger than its FIFO size(2K). It's also good idea to not
102 * use jumbo frame if hardware is running at half-duplex media.
103 * Because the jumbo frame may not fit into the Tx FIFO,
104 * collisions make hardware fetch frame from host memory with
105 * DMA again which in turn slows down Tx performance
106 * significantly.
107 */
108#define JME_TX_FIFO_SIZE 2000
109/*
110 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
111 * larger than 4K bytes in length, Rx FIFO threshold should be
112 * adjusted to minimize Rx FIFO overrun.
113 */
114#define JME_RX_FIFO_SIZE 4000
115
116#define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
6960d7d2 117#define JME_DESC_ADD(x, d, y) ((x) = ((x) + (d)) % (y))
76fbb0b9 118
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119struct jme_txdesc {
120 struct mbuf *tx_m;
121 bus_dmamap_t tx_dmamap;
122 int tx_ndesc;
123 struct jme_desc *tx_desc;
124};
125
126struct jme_rxdesc {
127 struct mbuf *rx_m;
fd2a6d2c 128 bus_addr_t rx_paddr;
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129 bus_dmamap_t rx_dmamap;
130 struct jme_desc *rx_desc;
131};
132
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133struct jme_softc;
134
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135/*
136 * RX ring/descs
137 */
138struct jme_rxdata {
31f0d5a2 139 struct lwkt_serialize jme_rx_serialize;
58880b0d 140 struct jme_softc *jme_sc;
7b040092 141
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142 uint32_t jme_rx_coal;
143 uint32_t jme_rx_comp;
144 uint32_t jme_rx_empty;
145 int jme_rx_idx;
7b040092 146
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147 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */
148 bus_dmamap_t jme_rx_sparemap;
149 struct jme_rxdesc *jme_rxdesc;
150
151 struct jme_desc *jme_rx_ring;
4447c752 152 int jme_rx_cons;
7b040092 153 int jme_rx_desc_cnt;
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154
155 int jme_rxlen;
156 struct mbuf *jme_rxhead;
157 struct mbuf *jme_rxtail;
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158
159 u_long jme_rx_pkt;
955f266e 160 u_long jme_rx_emp;
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161
162 bus_addr_t jme_rx_ring_paddr;
163 bus_dma_tag_t jme_rx_ring_tag;
164 bus_dmamap_t jme_rx_ring_map;
594bec47 165} __cachealign;
4447c752 166
9b99c84f 167struct jme_txdata {
31f0d5a2 168 struct lwkt_serialize jme_tx_serialize;
58880b0d 169 struct jme_softc *jme_sc;
9b99c84f 170
560616bf 171 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */
83b03786 172 struct jme_txdesc *jme_txdesc;
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173
174 struct jme_desc *jme_tx_ring;
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175
176 int jme_tx_prod;
177 int jme_tx_cons;
178 int jme_tx_cnt;
b020bb10 179 int jme_tx_desc_cnt;
76fbb0b9 180
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181 bus_addr_t jme_tx_ring_paddr;
182 bus_dma_tag_t jme_tx_ring_tag;
183 bus_dmamap_t jme_tx_ring_map;
9b99c84f 184} __cachealign;
64aaaeb2 185
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186struct jme_chain_data {
187 /*
188 * TX ring
189 */
190 struct jme_txdata jme_tx_data;
191
192 /*
193 * RX rings
194 */
7b040092 195 int jme_rx_ring_cnt;
4447c752 196 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX];
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197
198 /*
199 * Top level tags
200 */
201 bus_dma_tag_t jme_ring_tag; /* parent ring tag */
202 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */
203
204 /*
9b99c84f 205 * Shadow status block (unused)
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206 */
207 struct jme_ssb *jme_ssb_block;
208 bus_addr_t jme_ssb_block_paddr;
209 bus_dma_tag_t jme_ssb_tag;
210 bus_dmamap_t jme_ssb_map;
594bec47 211} __cachealign;
76fbb0b9 212
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213struct jme_msix_data {
214 int jme_msix_rid;
215 int jme_msix_cpuid;
216 u_int jme_msix_vector;
217 uint32_t jme_msix_intrs;
218 struct resource *jme_msix_res;
219 void *jme_msix_handle;
220 struct lwkt_serialize *jme_msix_serialize;
221 char jme_msix_desc[64];
222
223 driver_intr_t *jme_msix_func;
224 void *jme_msix_arg;
225};
226
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227#define JME_TX_RING_SIZE(tdata) \
228 (sizeof(struct jme_desc) * (tdata)->jme_tx_desc_cnt)
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229#define JME_RX_RING_SIZE(rdata) \
230 (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
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231#define JME_SSB_SIZE sizeof(struct jme_ssb)
232
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233/*
234 * Software state per device.
235 */
236struct jme_softc {
237 struct arpcom arpcom;
238 device_t jme_dev;
239
240 int jme_mem_rid;
241 struct resource *jme_mem_res;
242 bus_space_tag_t jme_mem_bt;
243 bus_space_handle_t jme_mem_bh;
244
3eba890a 245 int jme_irq_type;
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246 int jme_irq_rid;
247 struct resource *jme_irq_res;
248 void *jme_irq_handle;
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249 struct jme_msix_data jme_msix[JME_NMSIX];
250 int jme_msix_cnt;
251 uint32_t jme_msinum[JME_MSINUM_CNT];
87aa452b 252 int jme_tx_cpuid;
76fbb0b9 253
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254 int jme_npoll_rxoff;
255 int jme_npoll_txoff;
256
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257 device_t jme_miibus;
258 int jme_phyaddr;
b249905b 259 bus_addr_t jme_lowaddr;
76fbb0b9 260
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261 uint32_t jme_clksrc;
262 uint32_t jme_clksrc_1000;
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263 uint32_t jme_tx_dma_size;
264 uint32_t jme_rx_dma_size;
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265
266 uint32_t jme_caps;
267#define JME_CAP_FPGA 0x0001
268#define JME_CAP_PCIE 0x0002
269#define JME_CAP_PMCAP 0x0004
270#define JME_CAP_FASTETH 0x0008
3a5f3f36 271#define JME_CAP_JUMBO 0x0010
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272
273 uint32_t jme_workaround;
274#define JME_WA_EXTFIFO 0x0001
3b3da110 275#define JME_WA_HDX 0x0002
ec7e787b 276
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277 boolean_t jme_has_link;
278 boolean_t jme_in_tick;
76fbb0b9 279
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280 struct lwkt_serialize jme_serialize;
281 struct lwkt_serialize *jme_serialize_arr[JME_NSERIALIZE];
282 int jme_serialize_cnt;
283
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284 struct callout jme_tick_ch;
285 struct jme_chain_data jme_cdata;
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286 int jme_if_flags;
287 uint32_t jme_txcsr;
288 uint32_t jme_rxcsr;
289
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290 struct sysctl_ctx_list jme_sysctl_ctx;
291 struct sysctl_oid *jme_sysctl_tree;
292
293 /*
294 * Sysctl variables
295 */
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296 int jme_tx_coal_to;
297 int jme_tx_coal_pkt;
298 int jme_rx_coal_to;
299 int jme_rx_coal_pkt;
760c056c 300 int jme_rss_debug;
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301};
302
303/* Register access macros. */
304#define CSR_WRITE_4(_sc, reg, val) \
305 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
306#define CSR_READ_4(_sc, reg) \
307 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
308
309#define JME_MAXERR 5
310
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311#define JME_RXCHAIN_RESET(rdata) \
312do { \
313 (rdata)->jme_rxhead = NULL; \
314 (rdata)->jme_rxtail = NULL; \
315 (rdata)->jme_rxlen = 0; \
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316} while (0)
317
318#define JME_TX_TIMEOUT 5
319#define JME_TIMEOUT 1000
320#define JME_PHY_TIMEOUT 1000
321#define JME_EEPROM_TIMEOUT 1000
322
323#define JME_TXD_RSVD 1
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324/* Large enough to cooperate 64K TSO segment and one spare TX descriptor */
325#define JME_TXD_SPARE 34
76fbb0b9 326
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327#define JME_ENABLE_HWRSS(sc) \
328 ((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)
329
76fbb0b9 330#endif