kernel - Fix floating point save state structure and minor npx issues
[dragonfly.git] / sys / cpu / x86_64 / include / npx.h
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1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
c8fe38ae 3 * Copyright (c) 2008 The DragonFly Project.
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4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)npx.h 5.3 (Berkeley) 1/18/91
38 * $FreeBSD: src/sys/i386/include/npx.h,v 1.18.2.1 2001/08/15 01:23:52 peter Exp $
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39 */
40
41/*
42 * 287/387 NPX Coprocessor Data Structures and Constants
43 * W. Jolitz 1/90
44 */
45
46#ifndef _CPU_NPX_H_
47#define _CPU_NPX_H_
48
49#ifndef _SYS_TYPES_H_
50#include <sys/types.h>
51#endif
52
53/* Environment information of floating point unit */
54struct env87 {
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55 int32_t en_cw; /* control word (16bits) */
56 int32_t en_sw; /* status word (16bits) */
57 int32_t en_tw; /* tag word (16bits) */
58 int32_t en_fip; /* floating point instruction pointer */
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59 u_short en_fcs; /* floating code segment selector */
60 u_short en_opcode; /* opcode last executed (11 bits ) */
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61 int32_t en_foo; /* floating operand offset */
62 int32_t en_fos; /* floating operand segment selector */
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63};
64
65/* Contents of each floating point accumulator */
66struct fpacc87 {
67#ifdef dontdef /* too unportable */
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68 u_int32_t fp_mantlo; /* mantissa low (31:0) */
69 u_int32_t fp_manthi; /* mantissa high (63:32) */
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70 int fp_exp:15; /* exponent */
71 int fp_sgn:1; /* mantissa sign */
72#else
73 u_char fp_bytes[10];
74#endif
75};
76
77/* Floating point context */
78struct save87 {
79 struct env87 sv_env; /* floating point control/status */
80 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */
9e6e869e 81 u_int32_t sv_unused001;
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82 /*
83 * Bogus padding for emulators. Emulators should use their own
84 * struct and arrange to store into this struct (ending here)
85 * before it is inspected for ptracing or for core dumps. Some
86 * emulators overwrite the whole struct. We have no good way of
87 * knowing how much padding to leave. Leave just enough for the
88 * GPL emulator's i387_union (176 bytes total).
89 */
90 u_char sv_pad[64]; /* padding; used by emulators */
91};
92
93struct envxmm {
94 u_int16_t en_cw; /* control word (16bits) */
95 u_int16_t en_sw; /* status word (16bits) */
96 u_int16_t en_tw; /* tag word (16bits) */
97 u_int16_t en_opcode; /* opcode last executed (11 bits ) */
98 u_int32_t en_fip; /* floating point instruction pointer */
99 u_int16_t en_fcs; /* floating code segment selector */
100 u_int16_t en_pad0; /* padding */
101 u_int32_t en_foo; /* floating operand offset */
102 u_int16_t en_fos; /* floating operand segment selector */
103 u_int16_t en_pad1; /* padding */
104 u_int32_t en_mxcsr; /* SSE sontorol/status register */
105 u_int32_t en_pad2; /* padding */
106};
107
108/* Contents of each SSE extended accumulator */
109struct xmmacc {
110 u_char xmm_bytes[16];
111};
112
113/*
114 * savexmm is a 512-byte structure
115 */
116struct savexmm {
117 struct envxmm sv_env; /* 32 */
118 struct {
119 struct fpacc87 fp_acc; /* 10 */
120 u_char fp_pad[6]; /* 6 (padding) */
121 } sv_fp[8];
122 struct xmmacc sv_xmm[8]; /* 128 */
9e6e869e 123 u_int32_t sv_unused001;
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124 u_char sv_pad[220];
125} __attribute__((aligned(16)));
126
127union savefpu {
128 struct save87 sv_87;
129 struct savexmm sv_xmm;
130};
131
132/*
133 * The hardware default control word for i387's and later coprocessors is
134 * 0x37F, giving:
135 *
136 * round to nearest
137 * 64-bit precision
138 * all exceptions masked.
139 *
140 * We modify the affine mode bit and precision bits in this to give:
141 *
142 * affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
143 * 53-bit precision (2 in bitfield 3<<8)
144 *
145 * 64-bit precision often gives bad results with high level languages
146 * because it makes the results of calculations depend on whether
147 * intermediate values are stored in memory or in FPU registers.
148 */
149#define __INITIAL_NPXCW__ 0x127F
150
b2b3ffcd 151#define __INITIAL_FPUCW__ 0x037F /* used by libm/arch/x86_64/fenv.c */
538ad033 152#define __INITIAL_FPUCW_I386__ 0x127F
b2b3ffcd 153#define __INITIAL_MXCSR__ 0x1F80 /* used by libm/arch/x86_64/fenv.c */
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154#define __INITIAL_MXCSR_MASK__ 0xFFBF
155
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156#ifdef _KERNEL
157
158struct proc;
159struct trapframe;
160
161void npxexit (void);
162void npxinit (u_short control);
163void npxsave (union savefpu *addr);
164#endif
165
166#endif /* !_CPU_NPX_H_ */