Add a device ID for MPI350.
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
198d1293 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.18 2005/02/21 18:40:36 joerg Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
95#include <sys/proc.h>
96#include <sys/kernel.h>
97#include <sys/proc.h>
98#include <sys/ucred.h>
99#include <sys/socket.h>
100#ifdef ANCACHE
101#include <sys/syslog.h>
102#endif
103#include <sys/sysctl.h>
104#include <machine/clock.h> /* for DELAY */
105
106#include <sys/module.h>
107#include <sys/sysctl.h>
108#include <sys/bus.h>
109#include <machine/bus.h>
110#include <sys/rman.h>
111#include <machine/resource.h>
112#include <sys/malloc.h>
113
114#include <net/if.h>
38de8487 115#include <net/ifq_var.h>
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116#include <net/if_arp.h>
117#include <net/ethernet.h>
118#include <net/if_dl.h>
119#include <net/if_types.h>
984263bc 120#include <net/if_media.h>
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121#include <netproto/802_11/ieee80211.h>
122#include <netproto/802_11/ieee80211_ioctl.h>
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123
124#ifdef INET
125#include <netinet/in.h>
126#include <netinet/in_systm.h>
127#include <netinet/in_var.h>
128#include <netinet/ip.h>
129#endif
130
131#include <net/bpf.h>
132
133#include <machine/md_var.h>
134
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135#include "if_aironet_ieee.h"
136#include "if_anreg.h"
984263bc 137
984263bc 138/* These are global because we need them in sys/pci/if_an_p.c. */
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139static void an_reset (struct an_softc *);
140static int an_init_mpi350_desc (struct an_softc *);
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141static int an_ioctl (struct ifnet *, u_long, caddr_t,
142 struct ucred *);
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143static void an_init (void *);
144static int an_init_tx_ring (struct an_softc *);
145static void an_start (struct ifnet *);
146static void an_watchdog (struct ifnet *);
147static void an_rxeof (struct an_softc *);
148static void an_txeof (struct an_softc *, int);
149
150static void an_promisc (struct an_softc *, int);
151static int an_cmd (struct an_softc *, int, int);
152static int an_cmd_struct (struct an_softc *, struct an_command *,
153 struct an_reply *);
154static int an_read_record (struct an_softc *, struct an_ltv_gen *);
155static int an_write_record (struct an_softc *, struct an_ltv_gen *);
156static int an_read_data (struct an_softc *, int,
157 int, caddr_t, int);
158static int an_write_data (struct an_softc *, int,
159 int, caddr_t, int);
160static int an_seek (struct an_softc *, int, int, int);
161static int an_alloc_nicmem (struct an_softc *, int, int *);
162static int an_dma_malloc (struct an_softc *, bus_size_t,
163 struct an_dma_alloc *, int);
164static void an_dma_free (struct an_softc *,
165 struct an_dma_alloc *);
166static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
167static void an_stats_update (void *);
168static void an_setdef (struct an_softc *, struct an_req *);
984263bc 169#ifdef ANCACHE
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170static void an_cache_store (struct an_softc *, struct mbuf *,
171 uint8_t, uint8_t);
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172#endif
173
174/* function definitions for use with the Cisco's Linux configuration
175 utilities
176*/
177
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178static int readrids (struct ifnet*, struct aironet_ioctl*);
179static int writerids (struct ifnet*, struct aironet_ioctl*);
180static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 181
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182static int cmdreset (struct ifnet *);
183static int setflashmode (struct ifnet *);
184static int flashgchar (struct ifnet *,int,int);
185static int flashpchar (struct ifnet *,int,int);
186static int flashputbuf (struct ifnet *);
187static int flashrestart (struct ifnet *);
188static int WaitBusy (struct ifnet *, int);
189static int unstickbusy (struct ifnet *);
984263bc 190
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191static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
192 char *);
984263bc 193
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194static int an_media_change (struct ifnet *);
195static void an_media_status (struct ifnet *, struct ifmediareq *);
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196
197static int an_dump = 0;
198static int an_cache_mode = 0;
199
200#define DBM 0
201#define PERCENT 1
202#define RAW 2
203
204static char an_conf[256];
205static char an_conf_cache[256];
206
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207DECLARE_DUMMY_MODULE(if_an);
208
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209/* sysctl vars */
210
211SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
212
213static int
214sysctl_an_dump(SYSCTL_HANDLER_ARGS)
215{
216 int error, r, last;
217 char *s = an_conf;
218
219 last = an_dump;
220
221 switch (an_dump) {
222 case 0:
223 strcpy(an_conf, "off");
224 break;
225 case 1:
226 strcpy(an_conf, "type");
227 break;
228 case 2:
229 strcpy(an_conf, "dump");
230 break;
231 default:
232 snprintf(an_conf, 5, "%x", an_dump);
233 break;
234 }
235
236 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
237
238 if (strncmp(an_conf,"off", 3) == 0) {
239 an_dump = 0;
240 }
241 if (strncmp(an_conf,"dump", 4) == 0) {
242 an_dump = 1;
243 }
244 if (strncmp(an_conf,"type", 4) == 0) {
245 an_dump = 2;
246 }
247 if (*s == 'f') {
248 r = 0;
249 for (;;s++) {
250 if ((*s >= '0') && (*s <= '9')) {
251 r = r * 16 + (*s - '0');
252 } else if ((*s >= 'a') && (*s <= 'f')) {
253 r = r * 16 + (*s - 'a' + 10);
254 } else {
255 break;
256 }
257 }
258 an_dump = r;
259 }
260 if (an_dump != last)
261 printf("Sysctl changed for Aironet driver\n");
262
263 return error;
264}
265
266SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
267 0, sizeof(an_conf), sysctl_an_dump, "A", "");
268
269static int
270sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
271{
272 int error, last;
273
274 last = an_cache_mode;
275
276 switch (an_cache_mode) {
277 case 1:
278 strcpy(an_conf_cache, "per");
279 break;
280 case 2:
281 strcpy(an_conf_cache, "raw");
282 break;
283 default:
284 strcpy(an_conf_cache, "dbm");
285 break;
286 }
287
288 error = sysctl_handle_string(oidp, an_conf_cache,
289 sizeof(an_conf_cache), req);
290
291 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
292 an_cache_mode = 0;
293 }
294 if (strncmp(an_conf_cache,"per", 3) == 0) {
295 an_cache_mode = 1;
296 }
297 if (strncmp(an_conf_cache,"raw", 3) == 0) {
298 an_cache_mode = 2;
299 }
300
301 return error;
302}
303
304SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
305 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
306
307/*
308 * We probe for an Aironet 4500/4800 card by attempting to
309 * read the default SSID list. On reset, the first entry in
310 * the SSID list will contain the name "tsunami." If we don't
311 * find this, then there's no card present.
312 */
313int
314an_probe(dev)
315 device_t dev;
316{
317 struct an_softc *sc = device_get_softc(dev);
318 struct an_ltv_ssidlist ssid;
319 int error;
320
321 bzero((char *)&ssid, sizeof(ssid));
322
323 error = an_alloc_port(dev, 0, AN_IOSIZ);
324 if (error != 0)
325 return (0);
326
327 /* can't do autoprobing */
328 if (rman_get_start(sc->port_res) == -1)
329 return(0);
330
331 /*
332 * We need to fake up a softc structure long enough
333 * to be able to issue commands and call some of the
334 * other routines.
335 */
336 sc->an_bhandle = rman_get_bushandle(sc->port_res);
337 sc->an_btag = rman_get_bustag(sc->port_res);
338 sc->an_unit = device_get_unit(dev);
339
340 ssid.an_len = sizeof(ssid);
341 ssid.an_type = AN_RID_SSIDLIST;
342
343 /* Make sure interrupts are disabled. */
344 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
345 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
346
347 an_reset(sc);
348 /* No need for an_init_mpi350_desc since it will be done in attach */
349
350 if (an_cmd(sc, AN_CMD_READCFG, 0))
351 return(0);
352
353 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
354 return(0);
355
356 /* See if the ssid matches what we expect ... but doesn't have to */
357 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
358 return(0);
359
360 return(AN_IOSIZ);
361}
362
363/*
364 * Allocate a port resource with the given resource id.
365 */
366int
367an_alloc_port(dev, rid, size)
368 device_t dev;
369 int rid;
370 int size;
371{
372 struct an_softc *sc = device_get_softc(dev);
373 struct resource *res;
374
375 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
376 0ul, ~0ul, size, RF_ACTIVE);
377 if (res) {
378 sc->port_rid = rid;
379 sc->port_res = res;
380 return (0);
381 } else {
382 return (ENOENT);
383 }
384}
385
386/*
387 * Allocate a memory resource with the given resource id.
388 */
389int an_alloc_memory(device_t dev, int rid, int size)
390{
391 struct an_softc *sc = device_get_softc(dev);
392 struct resource *res;
393
394 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
395 0ul, ~0ul, size, RF_ACTIVE);
396 if (res) {
397 sc->mem_rid = rid;
398 sc->mem_res = res;
399 sc->mem_used = size;
400 return (0);
401 } else {
402 return (ENOENT);
403 }
404}
405
406/*
407 * Allocate a auxilary memory resource with the given resource id.
408 */
409int an_alloc_aux_memory(device_t dev, int rid, int size)
410{
411 struct an_softc *sc = device_get_softc(dev);
412 struct resource *res;
413
414 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
415 0ul, ~0ul, size, RF_ACTIVE);
416 if (res) {
417 sc->mem_aux_rid = rid;
418 sc->mem_aux_res = res;
419 sc->mem_aux_used = size;
420 return (0);
421 } else {
422 return (ENOENT);
423 }
424}
425
426/*
427 * Allocate an irq resource with the given resource id.
428 */
429int
430an_alloc_irq(dev, rid, flags)
431 device_t dev;
432 int rid;
433 int flags;
434{
435 struct an_softc *sc = device_get_softc(dev);
436 struct resource *res;
437
438 res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
439 0ul, ~0ul, 1, (RF_ACTIVE | flags));
440 if (res) {
441 sc->irq_rid = rid;
442 sc->irq_res = res;
443 return (0);
444 } else {
445 return (ENOENT);
446 }
447}
448
449static void
450an_dma_malloc_cb(arg, segs, nseg, error)
451 void *arg;
452 bus_dma_segment_t *segs;
453 int nseg;
454 int error;
455{
456 bus_addr_t *paddr = (bus_addr_t*) arg;
457 *paddr = segs->ds_addr;
458}
459
460/*
461 * Alloc DMA memory and set the pointer to it
462 */
463static int
464an_dma_malloc(sc, size, dma, mapflags)
465 struct an_softc *sc;
466 bus_size_t size;
467 struct an_dma_alloc *dma;
468 int mapflags;
469{
470 int r;
471
472 r = bus_dmamap_create(sc->an_dtag, BUS_DMA_NOWAIT, &dma->an_dma_map);
473 if (r != 0)
474 goto fail_0;
475
476 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
477 BUS_DMA_NOWAIT, &dma->an_dma_map);
478 if (r != 0)
479 goto fail_1;
480
481 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
482 size,
483 an_dma_malloc_cb,
484 &dma->an_dma_paddr,
485 mapflags | BUS_DMA_NOWAIT);
486 if (r != 0)
487 goto fail_2;
488
489 dma->an_dma_size = size;
490 return (0);
491
492fail_2:
493 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
494fail_1:
495 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
496fail_0:
497 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
498 dma->an_dma_map = NULL;
499 return (r);
500}
501
502static void
503an_dma_free(sc, dma)
504 struct an_softc *sc;
505 struct an_dma_alloc *dma;
506{
507 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
508 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
509 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
510}
511
512/*
513 * Release all resources
514 */
515void
516an_release_resources(dev)
517 device_t dev;
518{
519 struct an_softc *sc = device_get_softc(dev);
520 int i;
521
522 if (sc->port_res) {
523 bus_release_resource(dev, SYS_RES_IOPORT,
524 sc->port_rid, sc->port_res);
525 sc->port_res = 0;
526 }
527 if (sc->mem_res) {
528 bus_release_resource(dev, SYS_RES_MEMORY,
529 sc->mem_rid, sc->mem_res);
530 sc->mem_res = 0;
531 }
532 if (sc->mem_aux_res) {
533 bus_release_resource(dev, SYS_RES_MEMORY,
534 sc->mem_aux_rid, sc->mem_aux_res);
535 sc->mem_aux_res = 0;
536 }
537 if (sc->irq_res) {
538 bus_release_resource(dev, SYS_RES_IRQ,
539 sc->irq_rid, sc->irq_res);
540 sc->irq_res = 0;
541 }
542 if (sc->an_rid_buffer.an_dma_paddr) {
543 an_dma_free(sc, &sc->an_rid_buffer);
544 }
545 for (i = 0; i < AN_MAX_RX_DESC; i++)
546 if (sc->an_rx_buffer[i].an_dma_paddr) {
547 an_dma_free(sc, &sc->an_rx_buffer[i]);
548 }
549 for (i = 0; i < AN_MAX_TX_DESC; i++)
550 if (sc->an_tx_buffer[i].an_dma_paddr) {
551 an_dma_free(sc, &sc->an_tx_buffer[i]);
552 }
553 if (sc->an_dtag) {
554 bus_dma_tag_destroy(sc->an_dtag);
555 }
556
557}
558
559int
560an_init_mpi350_desc(sc)
561 struct an_softc *sc;
562{
563 struct an_command cmd_struct;
564 struct an_reply reply;
565 struct an_card_rid_desc an_rid_desc;
566 struct an_card_rx_desc an_rx_desc;
567 struct an_card_tx_desc an_tx_desc;
568 int i, desc;
569
570 if(!sc->an_rid_buffer.an_dma_paddr)
571 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
572 &sc->an_rid_buffer, 0);
573 for (i = 0; i < AN_MAX_RX_DESC; i++)
574 if(!sc->an_rx_buffer[i].an_dma_paddr)
575 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
576 &sc->an_rx_buffer[i], 0);
577 for (i = 0; i < AN_MAX_TX_DESC; i++)
578 if(!sc->an_tx_buffer[i].an_dma_paddr)
579 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
580 &sc->an_tx_buffer[i], 0);
581
582 /*
583 * Allocate RX descriptor
584 */
585 bzero(&reply,sizeof(reply));
586 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
587 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
588 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
589 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
590 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
591 printf("an%d: failed to allocate RX descriptor\n",
592 sc->an_unit);
593 return(EIO);
594 }
595
596 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
597 bzero(&an_rx_desc, sizeof(an_rx_desc));
598 an_rx_desc.an_valid = 1;
599 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
600 an_rx_desc.an_done = 0;
601 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
602
603 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
604 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
605 + (desc * sizeof(an_rx_desc))
606 + (i * 4),
607 ((u_int32_t*)&an_rx_desc)[i]);
608 }
609
610 /*
611 * Allocate TX descriptor
612 */
613
614 bzero(&reply,sizeof(reply));
615 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
616 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
617 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
618 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
619 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
620 printf("an%d: failed to allocate TX descriptor\n",
621 sc->an_unit);
622 return(EIO);
623 }
624
625 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
626 bzero(&an_tx_desc, sizeof(an_tx_desc));
627 an_tx_desc.an_offset = 0;
628 an_tx_desc.an_eoc = 0;
629 an_tx_desc.an_valid = 0;
630 an_tx_desc.an_len = 0;
631 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
632
633 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
634 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
635 + (desc * sizeof(an_tx_desc))
636 + (i * 4),
637 ((u_int32_t*)&an_tx_desc)[i]);
638 }
639
640 /*
641 * Allocate RID descriptor
642 */
643
644 bzero(&reply,sizeof(reply));
645 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
646 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
647 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
648 cmd_struct.an_parm2 = 1;
649 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
650 printf("an%d: failed to allocate host descriptor\n",
651 sc->an_unit);
652 return(EIO);
653 }
654
655 bzero(&an_rid_desc, sizeof(an_rid_desc));
656 an_rid_desc.an_valid = 1;
657 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
658 an_rid_desc.an_rid = 0;
659 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
660
661 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
662 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
663 ((u_int32_t*)&an_rid_desc)[i]);
664
665 return(0);
666}
667
668int
669an_attach(sc, unit, flags)
670 struct an_softc *sc;
671 int unit;
672 int flags;
673{
674 struct ifnet *ifp = &sc->arpcom.ac_if;
675 int error;
676
89c0f216 677 callout_init(&sc->an_stat_timer);
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678 sc->an_gone = 0;
679 sc->an_associated = 0;
680 sc->an_monitor = 0;
681 sc->an_was_monitor = 0;
682 sc->an_flash_buffer = NULL;
683
684 /* Reset the NIC. */
685 an_reset(sc);
686 if (sc->mpi350) {
687 error = an_init_mpi350_desc(sc);
688 if (error)
689 return(error);
690 }
691
692 /* Load factory config */
693 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
694 printf("an%d: failed to load config data\n", sc->an_unit);
695 return(EIO);
696 }
697
698 /* Read the current configuration */
699 sc->an_config.an_type = AN_RID_GENCONFIG;
700 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
701 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
702 printf("an%d: read record failed\n", sc->an_unit);
703 return(EIO);
704 }
705
706 /* Read the card capabilities */
707 sc->an_caps.an_type = AN_RID_CAPABILITIES;
708 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
709 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
710 printf("an%d: read record failed\n", sc->an_unit);
711 return(EIO);
712 }
713
714 /* Read ssid list */
715 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
716 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
717 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
718 printf("an%d: read record failed\n", sc->an_unit);
719 return(EIO);
720 }
721
722 /* Read AP list */
723 sc->an_aplist.an_type = AN_RID_APLIST;
724 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
725 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
726 printf("an%d: read record failed\n", sc->an_unit);
727 return(EIO);
728 }
729
730#ifdef ANCACHE
731 /* Read the RSSI <-> dBm map */
732 sc->an_have_rssimap = 0;
733 if (sc->an_caps.an_softcaps & 8) {
734 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
735 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
736 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
737 printf("an%d: unable to get RSSI <-> dBM map\n", sc->an_unit);
738 } else {
739 printf("an%d: got RSSI <-> dBM map\n", sc->an_unit);
740 sc->an_have_rssimap = 1;
741 }
742 } else {
743 printf("an%d: no RSSI <-> dBM map\n", sc->an_unit);
744 }
745#endif
746
984263bc 747 ifp->if_softc = sc;
cdb7d804 748 if_initname(ifp, "an", unit);
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749 ifp->if_mtu = ETHERMTU;
750 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
751 ifp->if_ioctl = an_ioctl;
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752 ifp->if_start = an_start;
753 ifp->if_watchdog = an_watchdog;
754 ifp->if_init = an_init;
755 ifp->if_baudrate = 10000000;
38de8487
JS
756 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
757 ifq_set_ready(&ifp->if_snd);
984263bc
MD
758
759 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
760 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
761 sizeof(AN_DEFAULT_NODENAME) - 1);
762
763 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
764 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
765 sizeof(AN_DEFAULT_NETNAME) - 1);
766 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
767
768 sc->an_config.an_opmode =
769 AN_OPMODE_INFRASTRUCTURE_STATION;
770
771 sc->an_tx_rate = 0;
772 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
773
774 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
775#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
776 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
777 IFM_IEEE80211_ADHOC, 0), 0);
778 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
780 IFM_IEEE80211_ADHOC, 0), 0);
781 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
782 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
784 IFM_IEEE80211_ADHOC, 0), 0);
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
786 }
787 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
788 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
789 IFM_IEEE80211_ADHOC, 0), 0);
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
791 }
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
793 IFM_IEEE80211_ADHOC, 0), 0);
794 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
795#undef ADD
796 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
797 0, 0));
798
799 /*
800 * Call MI attach routine.
801 */
0a8b5977 802 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
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803
804 return(0);
805}
806
807static void
808an_rxeof(sc)
809 struct an_softc *sc;
810{
811 struct ifnet *ifp;
812 struct ether_header *eh;
813 struct ieee80211_frame *ih;
814 struct an_rxframe rx_frame;
815 struct an_rxframe_802_3 rx_frame_802_3;
816 struct mbuf *m;
817 int len, id, error = 0, i, count = 0;
818 int ieee80211_header_len;
819 u_char *bpf_buf;
820 u_short fc1;
821 struct an_card_rx_desc an_rx_desc;
822 u_int8_t *buf;
823
824 ifp = &sc->arpcom.ac_if;
825
826 if (!sc->mpi350) {
827 id = CSR_READ_2(sc, AN_RX_FID);
828
829 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
830 /* read raw 802.11 packet */
831 bpf_buf = sc->buf_802_11;
832
833 /* read header */
834 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
835 sizeof(rx_frame))) {
836 ifp->if_ierrors++;
837 return;
838 }
839
840 /*
841 * skip beacon by default since this increases the
842 * system load a lot
843 */
844
845 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
846 (rx_frame.an_frame_ctl &
847 IEEE80211_FC0_SUBTYPE_BEACON)) {
848 return;
849 }
850
851 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
852 len = rx_frame.an_rx_payload_len
853 + sizeof(rx_frame);
854 /* Check for insane frame length */
855 if (len > sizeof(sc->buf_802_11)) {
856 printf("an%d: oversized packet "
857 "received (%d, %d)\n",
858 sc->an_unit, len, MCLBYTES);
859 ifp->if_ierrors++;
860 return;
861 }
862
863 bcopy((char *)&rx_frame,
864 bpf_buf, sizeof(rx_frame));
865
866 error = an_read_data(sc, id, sizeof(rx_frame),
867 (caddr_t)bpf_buf+sizeof(rx_frame),
868 rx_frame.an_rx_payload_len);
869 } else {
870 fc1=rx_frame.an_frame_ctl >> 8;
871 ieee80211_header_len =
872 sizeof(struct ieee80211_frame);
873 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
874 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
875 ieee80211_header_len += ETHER_ADDR_LEN;
876 }
877
878 len = rx_frame.an_rx_payload_len
879 + ieee80211_header_len;
880 /* Check for insane frame length */
881 if (len > sizeof(sc->buf_802_11)) {
882 printf("an%d: oversized packet "
883 "received (%d, %d)\n",
884 sc->an_unit, len, MCLBYTES);
885 ifp->if_ierrors++;
886 return;
887 }
888
889 ih = (struct ieee80211_frame *)bpf_buf;
890
891 bcopy((char *)&rx_frame.an_frame_ctl,
892 (char *)ih, ieee80211_header_len);
893
894 error = an_read_data(sc, id, sizeof(rx_frame) +
895 rx_frame.an_gaplen,
896 (caddr_t)ih +ieee80211_header_len,
897 rx_frame.an_rx_payload_len);
898 }
7600679e 899 BPF_TAP(ifp, bpf_buf, len);
984263bc
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900 } else {
901 MGETHDR(m, M_NOWAIT, MT_DATA);
902 if (m == NULL) {
903 ifp->if_ierrors++;
904 return;
905 }
906 MCLGET(m, M_NOWAIT);
907 if (!(m->m_flags & M_EXT)) {
908 m_freem(m);
909 ifp->if_ierrors++;
910 return;
911 }
912 m->m_pkthdr.rcvif = ifp;
913 /* Read Ethernet encapsulated packet */
914
915#ifdef ANCACHE
916 /* Read NIC frame header */
917 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
918 sizeof(rx_frame))) {
919 ifp->if_ierrors++;
920 return;
921 }
922#endif
923 /* Read in the 802_3 frame header */
924 if (an_read_data(sc, id, 0x34,
925 (caddr_t)&rx_frame_802_3,
926 sizeof(rx_frame_802_3))) {
927 ifp->if_ierrors++;
928 return;
929 }
930 if (rx_frame_802_3.an_rx_802_3_status != 0) {
931 ifp->if_ierrors++;
932 return;
933 }
934 /* Check for insane frame length */
935 len = rx_frame_802_3.an_rx_802_3_payload_len;
936 if (len > sizeof(sc->buf_802_11)) {
937 printf("an%d: oversized packet "
938 "received (%d, %d)\n",
939 sc->an_unit, len, MCLBYTES);
940 ifp->if_ierrors++;
941 return;
942 }
943 m->m_pkthdr.len = m->m_len =
944 rx_frame_802_3.an_rx_802_3_payload_len + 12;
945
946 eh = mtod(m, struct ether_header *);
947
948 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
949 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
950 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
951 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
952
953 /* in mbuf header type is just before payload */
954 error = an_read_data(sc, id, 0x44,
955 (caddr_t)&(eh->ether_type),
956 rx_frame_802_3.an_rx_802_3_payload_len);
957
958 if (error) {
959 m_freem(m);
960 ifp->if_ierrors++;
961 return;
962 }
963 ifp->if_ipackets++;
964
984263bc 965#ifdef ANCACHE
3013ac0e 966 an_cache_store(sc, m,
984263bc
MD
967 rx_frame.an_rx_signal_strength,
968 rx_frame.an_rsvd0);
969#endif
3013ac0e 970 (*ifp->if_input)(ifp, m);
984263bc
MD
971 }
972
973 } else { /* MPI-350 */
974 for (count = 0; count < AN_MAX_RX_DESC; count++){
975 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
976 ((u_int32_t*)&an_rx_desc)[i]
977 = CSR_MEM_AUX_READ_4(sc,
978 AN_RX_DESC_OFFSET
979 + (count * sizeof(an_rx_desc))
980 + (i * 4));
981
982 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
983 buf = sc->an_rx_buffer[count].an_dma_vaddr;
984
985 MGETHDR(m, M_NOWAIT, MT_DATA);
986 if (m == NULL) {
987 ifp->if_ierrors++;
988 return;
989 }
990 MCLGET(m, M_NOWAIT);
991 if (!(m->m_flags & M_EXT)) {
992 m_freem(m);
993 ifp->if_ierrors++;
994 return;
995 }
996 m->m_pkthdr.rcvif = ifp;
997 /* Read Ethernet encapsulated packet */
998
999 /*
1000 * No ANCACHE support since we just get back
1001 * an Ethernet packet no 802.11 info
1002 */
1003#if 0
1004#ifdef ANCACHE
1005 /* Read NIC frame header */
1006 bcopy(buf, (caddr_t)&rx_frame,
1007 sizeof(rx_frame));
1008#endif
1009#endif
1010 /* Check for insane frame length */
1011 len = an_rx_desc.an_len + 12;
1012 if (len > MCLBYTES) {
1013 printf("an%d: oversized packet "
1014 "received (%d, %d)\n",
1015 sc->an_unit, len, MCLBYTES);
1016 ifp->if_ierrors++;
1017 return;
1018 }
1019
1020 m->m_pkthdr.len = m->m_len =
1021 an_rx_desc.an_len + 12;
1022
1023 eh = mtod(m, struct ether_header *);
1024
1025 bcopy(buf, (char *)eh,
1026 m->m_pkthdr.len);
1027
1028 ifp->if_ipackets++;
1029
984263bc
MD
1030#if 0
1031#ifdef ANCACHE
3013ac0e 1032 an_cache_store(sc, m,
984263bc
MD
1033 rx_frame.an_rx_signal_strength,
1034 rx_frame.an_rsvd0);
1035#endif
1036#endif
3013ac0e 1037 (*ifp->if_input)(ifp, m);
984263bc
MD
1038
1039 an_rx_desc.an_valid = 1;
1040 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1041 an_rx_desc.an_done = 0;
1042 an_rx_desc.an_phys =
1043 sc->an_rx_buffer[count].an_dma_paddr;
1044
1045 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1046 CSR_MEM_AUX_WRITE_4(sc,
1047 AN_RX_DESC_OFFSET
1048 + (count * sizeof(an_rx_desc))
1049 + (i * 4),
1050 ((u_int32_t*)&an_rx_desc)[i]);
1051
1052 } else {
1053 printf("an%d: Didn't get valid RX packet "
1054 "%x %x %d\n",
1055 sc->an_unit,
1056 an_rx_desc.an_done,
1057 an_rx_desc.an_valid, an_rx_desc.an_len);
1058 }
1059 }
1060 }
1061}
1062
1063static void
1064an_txeof(sc, status)
1065 struct an_softc *sc;
1066 int status;
1067{
1068 struct ifnet *ifp;
1069 int id, i;
1070
1071 ifp = &sc->arpcom.ac_if;
1072
1073 ifp->if_timer = 0;
1074 ifp->if_flags &= ~IFF_OACTIVE;
1075
1076 if (!sc->mpi350) {
1077 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1078
1079 if (status & AN_EV_TX_EXC) {
1080 ifp->if_oerrors++;
1081 } else
1082 ifp->if_opackets++;
1083
1084 for (i = 0; i < AN_TX_RING_CNT; i++) {
1085 if (id == sc->an_rdata.an_tx_ring[i]) {
1086 sc->an_rdata.an_tx_ring[i] = 0;
1087 break;
1088 }
1089 }
1090
1091 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1092 } else { /* MPI 350 */
1093 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1094 if (sc->an_rdata.an_tx_prod ==
1095 sc->an_rdata.an_tx_cons)
1096 sc->an_rdata.an_tx_empty = 1;
1097 }
1098
1099 return;
1100}
1101
1102/*
1103 * We abuse the stats updater to check the current NIC status. This
1104 * is important because we don't want to allow transmissions until
1105 * the NIC has synchronized to the current cell (either as the master
1106 * in an ad-hoc group, or as a station connected to an access point).
1107 */
1108static void
1109an_stats_update(xsc)
1110 void *xsc;
1111{
1112 struct an_softc *sc;
1113 struct ifnet *ifp;
1114 int s;
1115
1116 s = splimp();
1117
1118 sc = xsc;
1119 ifp = &sc->arpcom.ac_if;
1120
1121 sc->an_status.an_type = AN_RID_STATUS;
1122 sc->an_status.an_len = sizeof(struct an_ltv_status);
1123 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1124
1125 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1126 sc->an_associated = 1;
1127 else
1128 sc->an_associated = 0;
1129
1130 /* Don't do this while we're transmitting */
1131 if (ifp->if_flags & IFF_OACTIVE) {
89c0f216 1132 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1133 splx(s);
1134 return;
1135 }
1136
1137 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1138 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1139 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
1140
89c0f216 1141 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1142 splx(s);
1143
1144 return;
1145}
1146
1147void
1148an_intr(xsc)
1149 void *xsc;
1150{
1151 struct an_softc *sc;
1152 struct ifnet *ifp;
1153 u_int16_t status;
1154
1155 sc = (struct an_softc*)xsc;
1156
1157 if (sc->an_gone)
1158 return;
1159
1160 ifp = &sc->arpcom.ac_if;
1161
1162 /* Disable interrupts. */
1163 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1164
1165 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1166 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1167
1168 if (status & AN_EV_AWAKE) {
1169 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1170 }
1171
1172 if (status & AN_EV_LINKSTAT) {
1173 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1174 == AN_LINKSTAT_ASSOCIATED)
1175 sc->an_associated = 1;
1176 else
1177 sc->an_associated = 0;
1178 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1179 }
1180
1181 if (status & AN_EV_RX) {
1182 an_rxeof(sc);
1183 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1184 }
1185
1186 if (status & AN_EV_TX) {
1187 an_txeof(sc, status);
1188 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1189 }
1190
1191 if (status & AN_EV_TX_EXC) {
1192 an_txeof(sc, status);
1193 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1194 }
1195
1196 if (status & AN_EV_ALLOC)
1197 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1198
1199 /* Re-enable interrupts. */
1200 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1201
38de8487 1202 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1203 an_start(ifp);
1204
1205 return;
1206}
1207
1208static int
1209an_cmd_struct(sc, cmd, reply)
1210 struct an_softc *sc;
1211 struct an_command *cmd;
1212 struct an_reply *reply;
1213{
1214 int i;
1215
1216 for (i = 0; i != AN_TIMEOUT; i++) {
1217 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1218 DELAY(1000);
1219 } else
1220 break;
1221 }
1222 if( i == AN_TIMEOUT) {
1223 printf("BUSY\n");
1224 return(ETIMEDOUT);
1225 }
1226
1227 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1228 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1229 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1230 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1231
1232 for (i = 0; i < AN_TIMEOUT; i++) {
1233 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1234 break;
1235 DELAY(1000);
1236 }
1237
1238 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1239 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1240 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1241 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1242
1243 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1244 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1245
1246 /* Ack the command */
1247 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1248
1249 if (i == AN_TIMEOUT)
1250 return(ETIMEDOUT);
1251
1252 return(0);
1253}
1254
1255static int
1256an_cmd(sc, cmd, val)
1257 struct an_softc *sc;
1258 int cmd;
1259 int val;
1260{
1261 int i, s = 0;
1262
1263 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1264 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1265 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1266 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1267
1268 for (i = 0; i < AN_TIMEOUT; i++) {
1269 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1270 break;
1271 else {
1272 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1273 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1274 }
1275 }
1276
1277 for (i = 0; i < AN_TIMEOUT; i++) {
1278 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1279 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1280 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1281 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1282 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1283 break;
1284 }
1285
1286 /* Ack the command */
1287 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1288
1289 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1290 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1291
1292 if (i == AN_TIMEOUT)
1293 return(ETIMEDOUT);
1294
1295 return(0);
1296}
1297
1298/*
1299 * This reset sequence may look a little strange, but this is the
1300 * most reliable method I've found to really kick the NIC in the
1301 * head and force it to reboot correctly.
1302 */
1303static void
1304an_reset(sc)
1305 struct an_softc *sc;
1306{
1307 if (sc->an_gone)
1308 return;
1309
1310 an_cmd(sc, AN_CMD_ENABLE, 0);
1311 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1312 an_cmd(sc, AN_CMD_NOOP2, 0);
1313
1314 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1315 printf("an%d: reset failed\n", sc->an_unit);
1316
1317 an_cmd(sc, AN_CMD_DISABLE, 0);
1318
1319 return;
1320}
1321
1322/*
1323 * Read an LTV record from the NIC.
1324 */
1325static int
1326an_read_record(sc, ltv)
1327 struct an_softc *sc;
1328 struct an_ltv_gen *ltv;
1329{
1330 struct an_ltv_gen *an_ltv;
1331 struct an_card_rid_desc an_rid_desc;
1332 struct an_command cmd;
1333 struct an_reply reply;
1334 u_int16_t *ptr;
1335 u_int8_t *ptr2;
1336 int i, len;
1337
1338 if (ltv->an_len < 4 || ltv->an_type == 0)
1339 return(EINVAL);
1340
1341 if (!sc->mpi350){
1342 /* Tell the NIC to enter record read mode. */
1343 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1344 printf("an%d: RID access failed\n", sc->an_unit);
1345 return(EIO);
1346 }
1347
1348 /* Seek to the record. */
1349 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1350 printf("an%d: seek to record failed\n", sc->an_unit);
1351 return(EIO);
1352 }
1353
1354 /*
1355 * Read the length and record type and make sure they
1356 * match what we expect (this verifies that we have enough
1357 * room to hold all of the returned data).
1358 * Length includes type but not length.
1359 */
1360 len = CSR_READ_2(sc, AN_DATA1);
1361 if (len > (ltv->an_len - 2)) {
1362 printf("an%d: record length mismatch -- expected %d, "
1363 "got %d for Rid %x\n", sc->an_unit,
1364 ltv->an_len - 2, len, ltv->an_type);
1365 len = ltv->an_len - 2;
1366 } else {
1367 ltv->an_len = len + 2;
1368 }
1369
1370 /* Now read the data. */
1371 len -= 2; /* skip the type */
1372 ptr = &ltv->an_val;
1373 for (i = len; i > 1; i -= 2)
1374 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1375 if (i) {
1376 ptr2 = (u_int8_t *)ptr;
1377 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1378 }
1379 } else { /* MPI-350 */
1380 an_rid_desc.an_valid = 1;
1381 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1382 an_rid_desc.an_rid = 0;
1383 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1384 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1385
1386 bzero(&cmd, sizeof(cmd));
1387 bzero(&reply, sizeof(reply));
1388 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1389 cmd.an_parm0 = ltv->an_type;
1390
1391 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1392 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1393 ((u_int32_t*)&an_rid_desc)[i]);
1394
1395 if (an_cmd_struct(sc, &cmd, &reply)
1396 || reply.an_status & AN_CMD_QUAL_MASK) {
1397 printf("an%d: failed to read RID %x %x %x %x %x, %d\n",
1398 sc->an_unit, ltv->an_type,
1399 reply.an_status,
1400 reply.an_resp0,
1401 reply.an_resp1,
1402 reply.an_resp2,
1403 i);
1404 return(EIO);
1405 }
1406
1407 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1408 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1409 an_rid_desc.an_len = an_ltv->an_len;
1410 }
1411
1412 if (an_rid_desc.an_len > 2)
1413 bcopy(&an_ltv->an_type,
1414 &ltv->an_val,
1415 an_rid_desc.an_len - 2);
1416 ltv->an_len = an_rid_desc.an_len + 2;
1417 }
1418
1419 if (an_dump)
1420 an_dump_record(sc, ltv, "Read");
1421
1422 return(0);
1423}
1424
1425/*
1426 * Same as read, except we inject data instead of reading it.
1427 */
1428static int
1429an_write_record(sc, ltv)
1430 struct an_softc *sc;
1431 struct an_ltv_gen *ltv;
1432{
1433 struct an_card_rid_desc an_rid_desc;
1434 struct an_command cmd;
1435 struct an_reply reply;
1436 char *buf;
1437 u_int16_t *ptr;
1438 u_int8_t *ptr2;
1439 int i, len;
1440
1441 if (an_dump)
1442 an_dump_record(sc, ltv, "Write");
1443
1444 if (!sc->mpi350){
1445 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1446 return(EIO);
1447
1448 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1449 return(EIO);
1450
1451 /*
1452 * Length includes type but not length.
1453 */
1454 len = ltv->an_len - 2;
1455 CSR_WRITE_2(sc, AN_DATA1, len);
1456
1457 len -= 2; /* skip the type */
1458 ptr = &ltv->an_val;
1459 for (i = len; i > 1; i -= 2)
1460 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1461 if (i) {
1462 ptr2 = (u_int8_t *)ptr;
1463 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1464 }
1465
1466 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1467 return(EIO);
1468 } else {
1469 /* MPI-350 */
1470
1471 for (i = 0; i != AN_TIMEOUT; i++) {
1472 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1473 & AN_CMD_BUSY) {
1474 DELAY(10);
1475 } else
1476 break;
1477 }
1478 if (i == AN_TIMEOUT) {
1479 printf("BUSY\n");
1480 }
1481
1482 an_rid_desc.an_valid = 1;
1483 an_rid_desc.an_len = ltv->an_len - 2;
1484 an_rid_desc.an_rid = ltv->an_type;
1485 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1486
1487 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1488 an_rid_desc.an_len);
1489
1490 bzero(&cmd,sizeof(cmd));
1491 bzero(&reply,sizeof(reply));
1492 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1493 cmd.an_parm0 = ltv->an_type;
1494
1495 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1496 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1497 ((u_int32_t*)&an_rid_desc)[i]);
1498
1499 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1500 printf("an%d: failed to write RID 1 %x %x %x %x %x, %d\n",
1501 sc->an_unit, ltv->an_type,
1502 reply.an_status,
1503 reply.an_resp0,
1504 reply.an_resp1,
1505 reply.an_resp2,
1506 i);
1507 return(EIO);
1508 }
1509
1510 ptr = (u_int16_t *)buf;
1511
1512 if (reply.an_status & AN_CMD_QUAL_MASK) {
1513 printf("an%d: failed to write RID 2 %x %x %x %x %x, %d\n",
1514 sc->an_unit, ltv->an_type,
1515 reply.an_status,
1516 reply.an_resp0,
1517 reply.an_resp1,
1518 reply.an_resp2,
1519 i);
1520 return(EIO);
1521 }
1522 }
1523
1524 return(0);
1525}
1526
1527static void
1528an_dump_record(sc, ltv, string)
1529 struct an_softc *sc;
1530 struct an_ltv_gen *ltv;
1531 char *string;
1532{
1533 u_int8_t *ptr2;
1534 int len;
1535 int i;
1536 int count = 0;
1537 char buf[17], temp;
1538
1539 len = ltv->an_len - 4;
1540 printf("an%d: RID %4x, Length %4d, Mode %s\n",
1541 sc->an_unit, ltv->an_type, ltv->an_len - 4, string);
1542
1543 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1544 printf("an%d:\t", sc->an_unit);
1545 bzero(buf,sizeof(buf));
1546
1547 ptr2 = (u_int8_t *)&ltv->an_val;
1548 for (i = len; i > 0; i--) {
1549 printf("%02x ", *ptr2);
1550
1551 temp = *ptr2++;
1552 if (temp >= ' ' && temp <= '~')
1553 buf[count] = temp;
1554 else if (temp >= 'A' && temp <= 'Z')
1555 buf[count] = temp;
1556 else
1557 buf[count] = '.';
1558 if (++count == 16) {
1559 count = 0;
1560 printf("%s\n",buf);
1561 printf("an%d:\t", sc->an_unit);
1562 bzero(buf,sizeof(buf));
1563 }
1564 }
1565 for (; count != 16; count++) {
1566 printf(" ");
1567 }
1568 printf(" %s\n",buf);
1569 }
1570}
1571
1572static int
1573an_seek(sc, id, off, chan)
1574 struct an_softc *sc;
1575 int id, off, chan;
1576{
1577 int i;
1578 int selreg, offreg;
1579
1580 switch (chan) {
1581 case AN_BAP0:
1582 selreg = AN_SEL0;
1583 offreg = AN_OFF0;
1584 break;
1585 case AN_BAP1:
1586 selreg = AN_SEL1;
1587 offreg = AN_OFF1;
1588 break;
1589 default:
1590 printf("an%d: invalid data path: %x\n", sc->an_unit, chan);
1591 return(EIO);
1592 }
1593
1594 CSR_WRITE_2(sc, selreg, id);
1595 CSR_WRITE_2(sc, offreg, off);
1596
1597 for (i = 0; i < AN_TIMEOUT; i++) {
1598 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1599 break;
1600 }
1601
1602 if (i == AN_TIMEOUT)
1603 return(ETIMEDOUT);
1604
1605 return(0);
1606}
1607
1608static int
1609an_read_data(sc, id, off, buf, len)
1610 struct an_softc *sc;
1611 int id, off;
1612 caddr_t buf;
1613 int len;
1614{
1615 int i;
1616 u_int16_t *ptr;
1617 u_int8_t *ptr2;
1618
1619 if (off != -1) {
1620 if (an_seek(sc, id, off, AN_BAP1))
1621 return(EIO);
1622 }
1623
1624 ptr = (u_int16_t *)buf;
1625 for (i = len; i > 1; i -= 2)
1626 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1627 if (i) {
1628 ptr2 = (u_int8_t *)ptr;
1629 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1630 }
1631
1632 return(0);
1633}
1634
1635static int
1636an_write_data(sc, id, off, buf, len)
1637 struct an_softc *sc;
1638 int id, off;
1639 caddr_t buf;
1640 int len;
1641{
1642 int i;
1643 u_int16_t *ptr;
1644 u_int8_t *ptr2;
1645
1646 if (off != -1) {
1647 if (an_seek(sc, id, off, AN_BAP0))
1648 return(EIO);
1649 }
1650
1651 ptr = (u_int16_t *)buf;
1652 for (i = len; i > 1; i -= 2)
1653 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1654 if (i) {
1655 ptr2 = (u_int8_t *)ptr;
1656 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1657 }
1658
1659 return(0);
1660}
1661
1662/*
1663 * Allocate a region of memory inside the NIC and zero
1664 * it out.
1665 */
1666static int
1667an_alloc_nicmem(sc, len, id)
1668 struct an_softc *sc;
1669 int len;
1670 int *id;
1671{
1672 int i;
1673
1674 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1675 printf("an%d: failed to allocate %d bytes on NIC\n",
1676 sc->an_unit, len);
1677 return(ENOMEM);
1678 }
1679
1680 for (i = 0; i < AN_TIMEOUT; i++) {
1681 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1682 break;
1683 }
1684
1685 if (i == AN_TIMEOUT)
1686 return(ETIMEDOUT);
1687
1688 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1689 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1690
1691 if (an_seek(sc, *id, 0, AN_BAP0))
1692 return(EIO);
1693
1694 for (i = 0; i < len / 2; i++)
1695 CSR_WRITE_2(sc, AN_DATA0, 0);
1696
1697 return(0);
1698}
1699
1700static void
1701an_setdef(sc, areq)
1702 struct an_softc *sc;
1703 struct an_req *areq;
1704{
1705 struct sockaddr_dl *sdl;
1706 struct ifaddr *ifa;
1707 struct ifnet *ifp;
1708 struct an_ltv_genconfig *cfg;
1709 struct an_ltv_ssidlist *ssid;
1710 struct an_ltv_aplist *ap;
1711 struct an_ltv_gen *sp;
1712
1713 ifp = &sc->arpcom.ac_if;
1714
1715 switch (areq->an_type) {
1716 case AN_RID_GENCONFIG:
1717 cfg = (struct an_ltv_genconfig *)areq;
1718
1719 ifa = ifnet_addrs[ifp->if_index - 1];
1720 sdl = (struct sockaddr_dl *)ifa->ifa_addr;
1721 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1722 ETHER_ADDR_LEN);
1723 bcopy((char *)&cfg->an_macaddr, LLADDR(sdl), ETHER_ADDR_LEN);
1724
1725 bcopy((char *)cfg, (char *)&sc->an_config,
1726 sizeof(struct an_ltv_genconfig));
1727 break;
1728 case AN_RID_SSIDLIST:
1729 ssid = (struct an_ltv_ssidlist *)areq;
1730 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1731 sizeof(struct an_ltv_ssidlist));
1732 break;
1733 case AN_RID_APLIST:
1734 ap = (struct an_ltv_aplist *)areq;
1735 bcopy((char *)ap, (char *)&sc->an_aplist,
1736 sizeof(struct an_ltv_aplist));
1737 break;
1738 case AN_RID_TX_SPEED:
1739 sp = (struct an_ltv_gen *)areq;
1740 sc->an_tx_rate = sp->an_val;
1741
1742 /* Read the current configuration */
1743 sc->an_config.an_type = AN_RID_GENCONFIG;
1744 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1745 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1746 cfg = &sc->an_config;
1747
1748 /* clear other rates and set the only one we want */
1749 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1750 cfg->an_rates[0] = sc->an_tx_rate;
1751
1752 /* Save the new rate */
1753 sc->an_config.an_type = AN_RID_GENCONFIG;
1754 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1755 break;
1756 case AN_RID_WEP_TEMP:
1757 /* Cache the temp keys */
1758 bcopy(areq,
1759 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1760 sizeof(struct an_ltv_key));
1761 case AN_RID_WEP_PERM:
1762 case AN_RID_LEAPUSERNAME:
1763 case AN_RID_LEAPPASSWORD:
1764 /* Disable the MAC. */
1765 an_cmd(sc, AN_CMD_DISABLE, 0);
1766
1767 /* Write the key */
1768 an_write_record(sc, (struct an_ltv_gen *)areq);
1769
1770 /* Turn the MAC back on. */
1771 an_cmd(sc, AN_CMD_ENABLE, 0);
1772
1773 break;
1774 case AN_RID_MONITOR_MODE:
1775 cfg = (struct an_ltv_genconfig *)areq;
1776 bpfdetach(ifp);
1777 if (ng_ether_detach_p != NULL)
1778 (*ng_ether_detach_p) (ifp);
1779 sc->an_monitor = cfg->an_len;
1780
1781 if (sc->an_monitor & AN_MONITOR) {
1782 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1783 bpfattach(ifp, DLT_AIRONET_HEADER,
1784 sizeof(struct ether_header));
1785 } else {
1786 bpfattach(ifp, DLT_IEEE802_11,
1787 sizeof(struct ether_header));
1788 }
1789 } else {
1790 bpfattach(ifp, DLT_EN10MB,
1791 sizeof(struct ether_header));
1792 if (ng_ether_attach_p != NULL)
1793 (*ng_ether_attach_p) (ifp);
1794 }
1795 break;
1796 default:
1797 printf("an%d: unknown RID: %x\n", sc->an_unit, areq->an_type);
1798 return;
1799 break;
1800 }
1801
1802
1803 /* Reinitialize the card. */
1804 if (ifp->if_flags)
1805 an_init(sc);
1806
1807 return;
1808}
1809
1810/*
1811 * Derived from Linux driver to enable promiscious mode.
1812 */
1813
1814static void
1815an_promisc(sc, promisc)
1816 struct an_softc *sc;
1817 int promisc;
1818{
1819 if (sc->an_was_monitor)
1820 an_reset(sc);
1821 if (sc->mpi350)
1822 an_init_mpi350_desc(sc);
1823 if (sc->an_monitor || sc->an_was_monitor)
1824 an_init(sc);
1825
1826 sc->an_was_monitor = sc->an_monitor;
1827 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1828
1829 return;
1830}
1831
1832static int
bd4539cc 1833an_ioctl(ifp, command, data, cr)
984263bc
MD
1834 struct ifnet *ifp;
1835 u_long command;
1836 caddr_t data;
bd4539cc 1837 struct ucred *cr;
984263bc
MD
1838{
1839 int s, error = 0;
1840 int len;
1841 int i;
1842 struct an_softc *sc;
1843 struct ifreq *ifr;
984263bc
MD
1844 struct ieee80211req *ireq;
1845 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1846 u_int8_t *tmpptr;
1847 struct an_ltv_genconfig *config;
1848 struct an_ltv_key *key;
1849 struct an_ltv_status *status;
1850 struct an_ltv_ssidlist *ssids;
1851 int mode;
1852 struct aironet_ioctl l_ioctl;
1853
1854 sc = ifp->if_softc;
1855 s = splimp();
1856 ifr = (struct ifreq *)data;
1857 ireq = (struct ieee80211req *)data;
1858
1859 config = (struct an_ltv_genconfig *)&sc->areq;
1860 key = (struct an_ltv_key *)&sc->areq;
1861 status = (struct an_ltv_status *)&sc->areq;
1862 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1863
1864 if (sc->an_gone) {
1865 error = ENODEV;
1866 goto out;
1867 }
1868
1869 switch (command) {
1870 case SIOCSIFADDR:
1871 case SIOCGIFADDR:
1872 case SIOCSIFMTU:
1873 error = ether_ioctl(ifp, command, data);
1874 break;
1875 case SIOCSIFFLAGS:
1876 if (ifp->if_flags & IFF_UP) {
1877 if (ifp->if_flags & IFF_RUNNING &&
1878 ifp->if_flags & IFF_PROMISC &&
1879 !(sc->an_if_flags & IFF_PROMISC)) {
1880 an_promisc(sc, 1);
1881 } else if (ifp->if_flags & IFF_RUNNING &&
1882 !(ifp->if_flags & IFF_PROMISC) &&
1883 sc->an_if_flags & IFF_PROMISC) {
1884 an_promisc(sc, 0);
1885 } else
1886 an_init(sc);
1887 } else {
1888 if (ifp->if_flags & IFF_RUNNING)
1889 an_stop(sc);
1890 }
1891 sc->an_if_flags = ifp->if_flags;
1892 error = 0;
1893 break;
1894 case SIOCSIFMEDIA:
1895 case SIOCGIFMEDIA:
1896 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1897 break;
1898 case SIOCADDMULTI:
1899 case SIOCDELMULTI:
1900 /* The Aironet has no multicast filter. */
1901 error = 0;
1902 break;
1903 case SIOCGAIRONET:
1904 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1905 if (error != 0)
1906 break;
1907#ifdef ANCACHE
1908 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1909 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1910 if (error)
1911 break;
1912 sc->an_sigitems = sc->an_nextitem = 0;
1913 break;
1914 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1915 char *pt = (char *)&sc->areq.an_val;
1916 bcopy((char *)&sc->an_sigitems, (char *)pt,
1917 sizeof(int));
1918 pt += sizeof(int);
1919 sc->areq.an_len = sizeof(int) / 2;
1920 bcopy((char *)&sc->an_sigcache, (char *)pt,
1921 sizeof(struct an_sigcache) * sc->an_sigitems);
1922 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1923 sc->an_sigitems) / 2) + 1;
1924 } else
1925#endif
1926 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1927 error = EINVAL;
1928 break;
1929 }
1930 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1931 break;
1932 case SIOCSAIRONET:
bd4539cc 1933 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1934 goto out;
1935 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1936 if (error != 0)
1937 break;
1938 an_setdef(sc, &sc->areq);
1939 break;
1940 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1941 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1942 goto out;
1943 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1944 mode = l_ioctl.command;
1945
1946 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1947 error = readrids(ifp, &l_ioctl);
1948 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1949 error = writerids(ifp, &l_ioctl);
1950 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1951 error = flashcard(ifp, &l_ioctl);
1952 } else {
1953 error =-1;
1954 }
1955
1956 /* copy out the updated command info */
1957 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1958
1959 break;
1960 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1961 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1962 goto out;
1963 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1964 l_ioctl.command = 0;
1965 error = AIROMAGIC;
1966 copyout(&error, l_ioctl.data, sizeof(error));
1967 error = 0;
1968 break;
1969 case SIOCG80211:
1970 sc->areq.an_len = sizeof(sc->areq);
1971 /* was that a good idea DJA we are doing a short-cut */
1972 switch (ireq->i_type) {
1973 case IEEE80211_IOC_SSID:
1974 if (ireq->i_val == -1) {
1975 sc->areq.an_type = AN_RID_STATUS;
1976 if (an_read_record(sc,
1977 (struct an_ltv_gen *)&sc->areq)) {
1978 error = EINVAL;
1979 break;
1980 }
1981 len = status->an_ssidlen;
1982 tmpptr = status->an_ssid;
1983 } else if (ireq->i_val >= 0) {
1984 sc->areq.an_type = AN_RID_SSIDLIST;
1985 if (an_read_record(sc,
1986 (struct an_ltv_gen *)&sc->areq)) {
1987 error = EINVAL;
1988 break;
1989 }
1990 if (ireq->i_val == 0) {
1991 len = ssids->an_ssid1_len;
1992 tmpptr = ssids->an_ssid1;
1993 } else if (ireq->i_val == 1) {
1994 len = ssids->an_ssid2_len;
1995 tmpptr = ssids->an_ssid2;
1996 } else if (ireq->i_val == 2) {
1997 len = ssids->an_ssid3_len;
1998 tmpptr = ssids->an_ssid3;
1999 } else {
2000 error = EINVAL;
2001 break;
2002 }
2003 } else {
2004 error = EINVAL;
2005 break;
2006 }
2007 if (len > IEEE80211_NWID_LEN) {
2008 error = EINVAL;
2009 break;
2010 }
2011 ireq->i_len = len;
2012 bzero(tmpstr, IEEE80211_NWID_LEN);
2013 bcopy(tmpptr, tmpstr, len);
2014 error = copyout(tmpstr, ireq->i_data,
2015 IEEE80211_NWID_LEN);
2016 break;
2017 case IEEE80211_IOC_NUMSSIDS:
2018 ireq->i_val = 3;
2019 break;
2020 case IEEE80211_IOC_WEP:
2021 sc->areq.an_type = AN_RID_ACTUALCFG;
2022 if (an_read_record(sc,
2023 (struct an_ltv_gen *)&sc->areq)) {
2024 error = EINVAL;
2025 break;
2026 }
2027 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2028 if (config->an_authtype &
2029 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2030 ireq->i_val = IEEE80211_WEP_MIXED;
2031 else
2032 ireq->i_val = IEEE80211_WEP_ON;
2033 } else {
2034 ireq->i_val = IEEE80211_WEP_OFF;
2035 }
2036 break;
2037 case IEEE80211_IOC_WEPKEY:
2038 /*
2039 * XXX: I'm not entierly convinced this is
2040 * correct, but it's what is implemented in
2041 * ancontrol so it will have to do until we get
2042 * access to actual Cisco code.
2043 */
2044 if (ireq->i_val < 0 || ireq->i_val > 8) {
2045 error = EINVAL;
2046 break;
2047 }
2048 len = 0;
2049 if (ireq->i_val < 5) {
2050 sc->areq.an_type = AN_RID_WEP_TEMP;
2051 for (i = 0; i < 5; i++) {
2052 if (an_read_record(sc,
2053 (struct an_ltv_gen *)&sc->areq)) {
2054 error = EINVAL;
2055 break;
2056 }
2057 if (key->kindex == 0xffff)
2058 break;
2059 if (key->kindex == ireq->i_val)
2060 len = key->klen;
2061 /* Required to get next entry */
2062 sc->areq.an_type = AN_RID_WEP_PERM;
2063 }
2064 if (error != 0)
2065 break;
2066 }
2067 /* We aren't allowed to read the value of the
2068 * key from the card so we just output zeros
2069 * like we would if we could read the card, but
2070 * denied the user access.
2071 */
2072 bzero(tmpstr, len);
2073 ireq->i_len = len;
2074 error = copyout(tmpstr, ireq->i_data, len);
2075 break;
2076 case IEEE80211_IOC_NUMWEPKEYS:
2077 ireq->i_val = 9; /* include home key */
2078 break;
2079 case IEEE80211_IOC_WEPTXKEY:
2080 /*
2081 * For some strange reason, you have to read all
2082 * keys before you can read the txkey.
2083 */
2084 sc->areq.an_type = AN_RID_WEP_TEMP;
2085 for (i = 0; i < 5; i++) {
2086 if (an_read_record(sc,
2087 (struct an_ltv_gen *) &sc->areq)) {
2088 error = EINVAL;
2089 break;
2090 }
2091 if (key->kindex == 0xffff)
2092 break;
2093 /* Required to get next entry */
2094 sc->areq.an_type = AN_RID_WEP_PERM;
2095 }
2096 if (error != 0)
2097 break;
2098
2099 sc->areq.an_type = AN_RID_WEP_PERM;
2100 key->kindex = 0xffff;
2101 if (an_read_record(sc,
2102 (struct an_ltv_gen *)&sc->areq)) {
2103 error = EINVAL;
2104 break;
2105 }
2106 ireq->i_val = key->mac[0];
2107 /*
2108 * Check for home mode. Map home mode into
2109 * 5th key since that is how it is stored on
2110 * the card
2111 */
2112 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2113 sc->areq.an_type = AN_RID_GENCONFIG;
2114 if (an_read_record(sc,
2115 (struct an_ltv_gen *)&sc->areq)) {
2116 error = EINVAL;
2117 break;
2118 }
2119 if (config->an_home_product & AN_HOME_NETWORK)
2120 ireq->i_val = 4;
2121 break;
2122 case IEEE80211_IOC_AUTHMODE:
2123 sc->areq.an_type = AN_RID_ACTUALCFG;
2124 if (an_read_record(sc,
2125 (struct an_ltv_gen *)&sc->areq)) {
2126 error = EINVAL;
2127 break;
2128 }
2129 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2130 AN_AUTHTYPE_NONE) {
2131 ireq->i_val = IEEE80211_AUTH_NONE;
2132 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2133 AN_AUTHTYPE_OPEN) {
2134 ireq->i_val = IEEE80211_AUTH_OPEN;
2135 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2136 AN_AUTHTYPE_SHAREDKEY) {
2137 ireq->i_val = IEEE80211_AUTH_SHARED;
2138 } else
2139 error = EINVAL;
2140 break;
2141 case IEEE80211_IOC_STATIONNAME:
2142 sc->areq.an_type = AN_RID_ACTUALCFG;
2143 if (an_read_record(sc,
2144 (struct an_ltv_gen *)&sc->areq)) {
2145 error = EINVAL;
2146 break;
2147 }
2148 ireq->i_len = sizeof(config->an_nodename);
2149 tmpptr = config->an_nodename;
2150 bzero(tmpstr, IEEE80211_NWID_LEN);
2151 bcopy(tmpptr, tmpstr, ireq->i_len);
2152 error = copyout(tmpstr, ireq->i_data,
2153 IEEE80211_NWID_LEN);
2154 break;
2155 case IEEE80211_IOC_CHANNEL:
2156 sc->areq.an_type = AN_RID_STATUS;
2157 if (an_read_record(sc,
2158 (struct an_ltv_gen *)&sc->areq)) {
2159 error = EINVAL;
2160 break;
2161 }
2162 ireq->i_val = status->an_cur_channel;
2163 break;
2164 case IEEE80211_IOC_POWERSAVE:
2165 sc->areq.an_type = AN_RID_ACTUALCFG;
2166 if (an_read_record(sc,
2167 (struct an_ltv_gen *)&sc->areq)) {
2168 error = EINVAL;
2169 break;
2170 }
2171 if (config->an_psave_mode == AN_PSAVE_NONE) {
2172 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2173 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2174 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2175 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2176 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2177 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2178 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2179 } else
2180 error = EINVAL;
2181 break;
2182 case IEEE80211_IOC_POWERSAVESLEEP:
2183 sc->areq.an_type = AN_RID_ACTUALCFG;
2184 if (an_read_record(sc,
2185 (struct an_ltv_gen *)&sc->areq)) {
2186 error = EINVAL;
2187 break;
2188 }
2189 ireq->i_val = config->an_listen_interval;
2190 break;
2191 }
2192 break;
2193 case SIOCS80211:
bd4539cc 2194 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
2195 goto out;
2196 sc->areq.an_len = sizeof(sc->areq);
2197 /*
2198 * We need a config structure for everything but the WEP
2199 * key management and SSIDs so we get it now so avoid
2200 * duplicating this code every time.
2201 */
2202 if (ireq->i_type != IEEE80211_IOC_SSID &&
2203 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2204 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2205 sc->areq.an_type = AN_RID_GENCONFIG;
2206 if (an_read_record(sc,
2207 (struct an_ltv_gen *)&sc->areq)) {
2208 error = EINVAL;
2209 break;
2210 }
2211 }
2212 switch (ireq->i_type) {
2213 case IEEE80211_IOC_SSID:
2214 sc->areq.an_type = AN_RID_SSIDLIST;
2215 if (an_read_record(sc,
2216 (struct an_ltv_gen *)&sc->areq)) {
2217 error = EINVAL;
2218 break;
2219 }
2220 if (ireq->i_len > IEEE80211_NWID_LEN) {
2221 error = EINVAL;
2222 break;
2223 }
2224 switch (ireq->i_val) {
2225 case 0:
2226 error = copyin(ireq->i_data,
2227 ssids->an_ssid1, ireq->i_len);
2228 ssids->an_ssid1_len = ireq->i_len;
2229 break;
2230 case 1:
2231 error = copyin(ireq->i_data,
2232 ssids->an_ssid2, ireq->i_len);
2233 ssids->an_ssid2_len = ireq->i_len;
2234 break;
2235 case 2:
2236 error = copyin(ireq->i_data,
2237 ssids->an_ssid3, ireq->i_len);
2238 ssids->an_ssid3_len = ireq->i_len;
2239 break;
2240 default:
2241 error = EINVAL;
2242 break;
2243 }
2244 break;
2245 case IEEE80211_IOC_WEP:
2246 switch (ireq->i_val) {
2247 case IEEE80211_WEP_OFF:
2248 config->an_authtype &=
2249 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2250 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2251 break;
2252 case IEEE80211_WEP_ON:
2253 config->an_authtype |=
2254 AN_AUTHTYPE_PRIVACY_IN_USE;
2255 config->an_authtype &=
2256 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2257 break;
2258 case IEEE80211_WEP_MIXED:
2259 config->an_authtype |=
2260 AN_AUTHTYPE_PRIVACY_IN_USE |
2261 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2262 break;
2263 default:
2264 error = EINVAL;
2265 break;
2266 }
2267 break;
2268 case IEEE80211_IOC_WEPKEY:
2269 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2270 ireq->i_len > 13) {
2271 error = EINVAL;
2272 break;
2273 }
2274 error = copyin(ireq->i_data, tmpstr, 13);
2275 if (error != 0)
2276 break;
2277 /*
2278 * Map the 9th key into the home mode
2279 * since that is how it is stored on
2280 * the card
2281 */
2282 bzero(&sc->areq, sizeof(struct an_ltv_key));
2283 sc->areq.an_len = sizeof(struct an_ltv_key);
2284 key->mac[0] = 1; /* The others are 0. */
2285 if (ireq->i_val < 4) {
2286 sc->areq.an_type = AN_RID_WEP_TEMP;
2287 key->kindex = ireq->i_val;
2288 } else {
2289 sc->areq.an_type = AN_RID_WEP_PERM;
2290 key->kindex = ireq->i_val - 4;
2291 }
2292 key->klen = ireq->i_len;
2293 bcopy(tmpstr, key->key, key->klen);
2294 break;
2295 case IEEE80211_IOC_WEPTXKEY:
2296 if (ireq->i_val < 0 || ireq->i_val > 4) {
2297 error = EINVAL;
2298 break;
2299 }
2300
2301 /*
2302 * Map the 5th key into the home mode
2303 * since that is how it is stored on
2304 * the card
2305 */
2306 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2307 sc->areq.an_type = AN_RID_ACTUALCFG;
2308 if (an_read_record(sc,
2309 (struct an_ltv_gen *)&sc->areq)) {
2310 error = EINVAL;
2311 break;
2312 }
2313 if (ireq->i_val == 4) {
2314 config->an_home_product |= AN_HOME_NETWORK;
2315 ireq->i_val = 0;
2316 } else {
2317 config->an_home_product &= ~AN_HOME_NETWORK;
2318 }
2319
2320 sc->an_config.an_home_product
2321 = config->an_home_product;
2322
2323 /* update configuration */
2324 an_init(sc);
2325
2326 bzero(&sc->areq, sizeof(struct an_ltv_key));
2327 sc->areq.an_len = sizeof(struct an_ltv_key);
2328 sc->areq.an_type = AN_RID_WEP_PERM;
2329 key->kindex = 0xffff;
2330 key->mac[0] = ireq->i_val;
2331 break;
2332 case IEEE80211_IOC_AUTHMODE:
2333 switch (ireq->i_val) {
2334 case IEEE80211_AUTH_NONE:
2335 config->an_authtype = AN_AUTHTYPE_NONE |
2336 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2337 break;
2338 case IEEE80211_AUTH_OPEN:
2339 config->an_authtype = AN_AUTHTYPE_OPEN |
2340 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2341 break;
2342 case IEEE80211_AUTH_SHARED:
2343 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2344 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2345 break;
2346 default:
2347 error = EINVAL;
2348 }
2349 break;
2350 case IEEE80211_IOC_STATIONNAME:
2351 if (ireq->i_len > 16) {
2352 error = EINVAL;
2353 break;
2354 }
2355 bzero(config->an_nodename, 16);
2356 error = copyin(ireq->i_data,
2357 config->an_nodename, ireq->i_len);
2358 break;
2359 case IEEE80211_IOC_CHANNEL:
2360 /*
2361 * The actual range is 1-14, but if you set it
2362 * to 0 you get the default so we let that work
2363 * too.
2364 */
2365 if (ireq->i_val < 0 || ireq->i_val >14) {
2366 error = EINVAL;
2367 break;
2368 }
2369 config->an_ds_channel = ireq->i_val;
2370 break;
2371 case IEEE80211_IOC_POWERSAVE:
2372 switch (ireq->i_val) {
2373 case IEEE80211_POWERSAVE_OFF:
2374 config->an_psave_mode = AN_PSAVE_NONE;
2375 break;
2376 case IEEE80211_POWERSAVE_CAM:
2377 config->an_psave_mode = AN_PSAVE_CAM;
2378 break;
2379 case IEEE80211_POWERSAVE_PSP:
2380 config->an_psave_mode = AN_PSAVE_PSP;
2381 break;
2382 case IEEE80211_POWERSAVE_PSP_CAM:
2383 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2384 break;
2385 default:
2386 error = EINVAL;
2387 break;
2388 }
2389 break;
2390 case IEEE80211_IOC_POWERSAVESLEEP:
2391 config->an_listen_interval = ireq->i_val;
2392 break;
2393 }
2394
2395 if (!error)
2396 an_setdef(sc, &sc->areq);
2397 break;
2398 default:
2399 error = EINVAL;
2400 break;
2401 }
2402out:
2403 splx(s);
2404
2405 return(error != 0);
2406}
2407
2408static int
2409an_init_tx_ring(sc)
2410 struct an_softc *sc;
2411{
2412 int i;
2413 int id;
2414
2415 if (sc->an_gone)
2416 return (0);
2417
2418 if (!sc->mpi350) {
2419 for (i = 0; i < AN_TX_RING_CNT; i++) {
2420 if (an_alloc_nicmem(sc, 1518 +
2421 0x44, &id))
2422 return(ENOMEM);
2423 sc->an_rdata.an_tx_fids[i] = id;
2424 sc->an_rdata.an_tx_ring[i] = 0;
2425 }
2426 }
2427
2428 sc->an_rdata.an_tx_prod = 0;
2429 sc->an_rdata.an_tx_cons = 0;
2430 sc->an_rdata.an_tx_empty = 1;
2431
2432 return(0);
2433}
2434
2435static void
2436an_init(xsc)
2437 void *xsc;
2438{
2439 struct an_softc *sc = xsc;
2440 struct ifnet *ifp = &sc->arpcom.ac_if;
2441 int s;
2442
2443 s = splimp();
2444
2445 if (sc->an_gone) {
2446 splx(s);
2447 return;
2448 }
2449
2450 if (ifp->if_flags & IFF_RUNNING)
2451 an_stop(sc);
2452
2453 sc->an_associated = 0;
2454
2455 /* Allocate the TX buffers */
2456 if (an_init_tx_ring(sc)) {
2457 an_reset(sc);
2458 if (sc->mpi350)
2459 an_init_mpi350_desc(sc);
2460 if (an_init_tx_ring(sc)) {
2461 printf("an%d: tx buffer allocation "
2462 "failed\n", sc->an_unit);
2463 splx(s);
2464 return;
2465 }
2466 }
2467
2468 /* Set our MAC address. */
2469 bcopy((char *)&sc->arpcom.ac_enaddr,
2470 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2471
2472 if (ifp->if_flags & IFF_BROADCAST)
2473 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2474 else
2475 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2476
2477 if (ifp->if_flags & IFF_MULTICAST)
2478 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2479
2480 if (ifp->if_flags & IFF_PROMISC) {
2481 if (sc->an_monitor & AN_MONITOR) {
2482 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2483 sc->an_config.an_rxmode |=
2484 AN_RXMODE_80211_MONITOR_ANYBSS |
2485 AN_RXMODE_NO_8023_HEADER;
2486 } else {
2487 sc->an_config.an_rxmode |=
2488 AN_RXMODE_80211_MONITOR_CURBSS |
2489 AN_RXMODE_NO_8023_HEADER;
2490 }
2491 }
2492 }
2493
2494 if (sc->an_have_rssimap)
2495 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2496
2497 /* Set the ssid list */
2498 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2499 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2500 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
2501 printf("an%d: failed to set ssid list\n", sc->an_unit);
2502 splx(s);
2503 return;
2504 }
2505
2506 /* Set the AP list */
2507 sc->an_aplist.an_type = AN_RID_APLIST;
2508 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2509 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
2510 printf("an%d: failed to set AP list\n", sc->an_unit);
2511 splx(s);
2512 return;
2513 }
2514
2515 /* Set the configuration in the NIC */
2516 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2517 sc->an_config.an_type = AN_RID_GENCONFIG;
2518 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
2519 printf("an%d: failed to set configuration\n", sc->an_unit);
2520 splx(s);
2521 return;
2522 }
2523
2524 /* Enable the MAC */
2525 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
2526 printf("an%d: failed to enable MAC\n", sc->an_unit);
2527 splx(s);
2528 return;
2529 }
2530
2531 if (ifp->if_flags & IFF_PROMISC)
2532 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2533
2534 /* enable interrupts */
2535 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2536
2537 ifp->if_flags |= IFF_RUNNING;
2538 ifp->if_flags &= ~IFF_OACTIVE;
2539
89c0f216 2540 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2541 splx(s);
2542
2543 return;
2544}
2545
2546static void
2547an_start(ifp)
2548 struct ifnet *ifp;
2549{
2550 struct an_softc *sc;
2551 struct mbuf *m0 = NULL;
2552 struct an_txframe_802_3 tx_frame_802_3;
2553 struct ether_header *eh;
2554 int id, idx, i;
2555 unsigned char txcontrol;
2556 struct an_card_tx_desc an_tx_desc;
2557 u_int8_t *ptr;
2558 u_int8_t *buf;
2559
2560 sc = ifp->if_softc;
2561
2562 if (sc->an_gone)
2563 return;
2564
2565 if (ifp->if_flags & IFF_OACTIVE)
2566 return;
2567
2568 if (!sc->an_associated)
2569 return;
2570
2571 /* We can't send in monitor mode so toss any attempts. */
2572 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2573 ifq_purge(&ifp->if_snd);
984263bc
MD
2574 return;
2575 }
2576
2577 idx = sc->an_rdata.an_tx_prod;
2578
2579 if (!sc->mpi350) {
2580 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2581
2582 while (sc->an_rdata.an_tx_ring[idx] == 0) {
38de8487 2583 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2584 if (m0 == NULL)
2585 break;
2586
2587 id = sc->an_rdata.an_tx_fids[idx];
2588 eh = mtod(m0, struct ether_header *);
2589
2590 bcopy((char *)&eh->ether_dhost,
2591 (char *)&tx_frame_802_3.an_tx_dst_addr,
2592 ETHER_ADDR_LEN);
2593 bcopy((char *)&eh->ether_shost,
2594 (char *)&tx_frame_802_3.an_tx_src_addr,
2595 ETHER_ADDR_LEN);
2596
2597 /* minus src/dest mac & type */
2598 tx_frame_802_3.an_tx_802_3_payload_len =
2599 m0->m_pkthdr.len - 12;
2600
2601 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2602 tx_frame_802_3.an_tx_802_3_payload_len,
2603 (caddr_t)&sc->an_txbuf);
2604
2605 txcontrol = AN_TXCTL_8023;
2606 /* write the txcontrol only */
2607 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2608 sizeof(txcontrol));
2609
2610 /* 802_3 header */
2611 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2612 sizeof(struct an_txframe_802_3));
2613
2614 /* in mbuf header type is just before payload */
2615 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2616 tx_frame_802_3.an_tx_802_3_payload_len);
2617
7600679e 2618 BPF_MTAP(ifp, m0);
984263bc
MD
2619
2620 m_freem(m0);
2621 m0 = NULL;
2622
2623 sc->an_rdata.an_tx_ring[idx] = id;
2624 if (an_cmd(sc, AN_CMD_TX, id))
2625 printf("an%d: xmit failed\n", sc->an_unit);
2626
2627 AN_INC(idx, AN_TX_RING_CNT);
2628 }
2629 } else { /* MPI-350 */
2630 while (sc->an_rdata.an_tx_empty ||
2631 idx != sc->an_rdata.an_tx_cons) {
38de8487 2632 m0 = ifq_dequeue(&ifp->if_snd);
984263bc
MD
2633 if (m0 == NULL) {
2634 break;
2635 }
2636 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2637
2638 eh = mtod(m0, struct ether_header *);
2639
2640 /* DJA optimize this to limit bcopy */
2641 bcopy((char *)&eh->ether_dhost,
2642 (char *)&tx_frame_802_3.an_tx_dst_addr,
2643 ETHER_ADDR_LEN);
2644 bcopy((char *)&eh->ether_shost,
2645 (char *)&tx_frame_802_3.an_tx_src_addr,
2646 ETHER_ADDR_LEN);
2647
2648 /* minus src/dest mac & type */
2649 tx_frame_802_3.an_tx_802_3_payload_len =
2650 m0->m_pkthdr.len - 12;
2651
2652 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2653 tx_frame_802_3.an_tx_802_3_payload_len,
2654 (caddr_t)&sc->an_txbuf);
2655
2656 txcontrol = AN_TXCTL_8023;
2657 /* write the txcontrol only */
2658 bcopy((caddr_t)&txcontrol, &buf[0x08],
2659 sizeof(txcontrol));
2660
2661 /* 802_3 header */
2662 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2663 sizeof(struct an_txframe_802_3));
2664
2665 /* in mbuf header type is just before payload */
2666 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2667 tx_frame_802_3.an_tx_802_3_payload_len);
2668
2669
2670 bzero(&an_tx_desc, sizeof(an_tx_desc));
2671 an_tx_desc.an_offset = 0;
2672 an_tx_desc.an_eoc = 1;
2673 an_tx_desc.an_valid = 1;
2674 an_tx_desc.an_len = 0x44 +
2675 tx_frame_802_3.an_tx_802_3_payload_len;
2676 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2677 ptr = (u_int8_t*)&an_tx_desc;
2678 for (i = 0; i < sizeof(an_tx_desc); i++) {
2679 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2680 ptr[i]);
2681 }
2682
7600679e 2683 BPF_MTAP(ifp, m0);
984263bc
MD
2684
2685 m_freem(m0);
2686 m0 = NULL;
2687
2688 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2689
2690 AN_INC(idx, AN_MAX_TX_DESC);
2691 sc->an_rdata.an_tx_empty = 0;
2692 }
2693 }
2694
2695 if (m0 != NULL)
2696 ifp->if_flags |= IFF_OACTIVE;
2697
2698 sc->an_rdata.an_tx_prod = idx;
2699
2700 /*
2701 * Set a timeout in case the chip goes out to lunch.
2702 */
2703 ifp->if_timer = 5;
2704
2705 return;
2706}
2707
2708void
2709an_stop(sc)
2710 struct an_softc *sc;
2711{
2712 struct ifnet *ifp;
2713 int i;
2714 int s;
2715
2716 s = splimp();
2717
2718 if (sc->an_gone) {
2719 splx(s);
2720 return;
2721 }
2722
2723 ifp = &sc->arpcom.ac_if;
2724
2725 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2726 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2727 an_cmd(sc, AN_CMD_DISABLE, 0);
2728
2729 for (i = 0; i < AN_TX_RING_CNT; i++)
2730 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2731
89c0f216 2732 callout_stop(&sc->an_stat_timer);
984263bc
MD
2733
2734 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2735
2736 if (sc->an_flash_buffer) {
2737 free(sc->an_flash_buffer, M_DEVBUF);
2738 sc->an_flash_buffer = NULL;
2739 }
2740
2741 splx(s);
2742
2743 return;
2744}
2745
2746static void
2747an_watchdog(ifp)
2748 struct ifnet *ifp;
2749{
2750 struct an_softc *sc;
2751 int s;
2752
2753 sc = ifp->if_softc;
2754 s = splimp();
2755
2756 if (sc->an_gone) {
2757 splx(s);
2758 return;
2759 }
2760
2761 printf("an%d: device timeout\n", sc->an_unit);
2762
2763 an_reset(sc);
2764 if (sc->mpi350)
2765 an_init_mpi350_desc(sc);
2766 an_init(sc);
2767
2768 ifp->if_oerrors++;
2769 splx(s);
2770
2771 return;
2772}
2773
2774void
2775an_shutdown(dev)
2776 device_t dev;
2777{
2778 struct an_softc *sc;
2779
2780 sc = device_get_softc(dev);
2781 an_stop(sc);
2782
2783 return;
2784}
2785
2786void
2787an_resume(dev)
2788 device_t dev;
2789{
2790 struct an_softc *sc;
2791 struct ifnet *ifp;
2792 int i;
2793
2794 sc = device_get_softc(dev);
2795 ifp = &sc->arpcom.ac_if;
2796
2797 an_reset(sc);
2798 if (sc->mpi350)
2799 an_init_mpi350_desc(sc);
2800 an_init(sc);
2801
2802 /* Recovery temporary keys */
2803 for (i = 0; i < 4; i++) {
2804 sc->areq.an_type = AN_RID_WEP_TEMP;
2805 sc->areq.an_len = sizeof(struct an_ltv_key);
2806 bcopy(&sc->an_temp_keys[i],
2807 &sc->areq, sizeof(struct an_ltv_key));
2808 an_setdef(sc, &sc->areq);
2809 }
2810
2811 if (ifp->if_flags & IFF_UP)
2812 an_start(ifp);
2813
2814 return;
2815}
2816
2817#ifdef ANCACHE
2818/* Aironet signal strength cache code.
2819 * store signal/noise/quality on per MAC src basis in
2820 * a small fixed cache. The cache wraps if > MAX slots
2821 * used. The cache may be zeroed out to start over.
2822 * Two simple filters exist to reduce computation:
2823 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2824 * to ignore some packets. It defaults to ip only.
2825 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2826 * 2. multicast/broadcast only. This may be used to
2827 * ignore unicast packets and only cache signal strength
2828 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2829 * beacons and not unicast traffic.
2830 *
2831 * The cache stores (MAC src(index), IP src (major clue), signal,
2832 * quality, noise)
2833 *
2834 * No apologies for storing IP src here. It's easy and saves much
2835 * trouble elsewhere. The cache is assumed to be INET dependent,
2836 * although it need not be.
2837 *
2838 * Note: the Aironet only has a single byte of signal strength value
2839 * in the rx frame header, and it's not scaled to anything sensible.
2840 * This is kind of lame, but it's all we've got.
2841 */
2842
2843#ifdef documentation
2844
2845int an_sigitems; /* number of cached entries */
2846struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2847int an_nextitem; /* index/# of entries */
2848
2849
2850#endif
2851
2852/* control variables for cache filtering. Basic idea is
2853 * to reduce cost (e.g., to only Mobile-IP agent beacons
2854 * which are broadcast or multicast). Still you might
2855 * want to measure signal strength anth unicast ping packets
2856 * on a pt. to pt. ant. setup.
2857 */
2858/* set true if you want to limit cache items to broadcast/mcast
2859 * only packets (not unicast). Useful for mobile-ip beacons which
2860 * are broadcast/multicast at network layer. Default is all packets
2861 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2862 */
2863static int an_cache_mcastonly = 0;
2864SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2865 &an_cache_mcastonly, 0, "");
2866
2867/* set true if you want to limit cache items to IP packets only
2868*/
2869static int an_cache_iponly = 1;
2870SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2871 &an_cache_iponly, 0, "");
2872
2873/*
2874 * an_cache_store, per rx packet store signal
2875 * strength in MAC (src) indexed cache.
2876 */
2877static void
3013ac0e 2878an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2879 struct an_softc *sc;
984263bc
MD
2880 struct mbuf *m;
2881 u_int8_t rx_rssi;
2882 u_int8_t rx_quality;
2883{
3013ac0e
JS
2884 struct ether_header *eh = mtod(m, struct ether_header *);
2885 struct ip *ip = NULL;
984263bc
MD
2886 int i;
2887 static int cache_slot = 0; /* use this cache entry */
2888 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2889
2890 /* filters:
2891 * 1. ip only
2892 * 2. configurable filter to throw out unicast packets,
2893 * keep multicast only.
2894 */
2895
3013ac0e
JS
2896 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2897 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2898 else if (an_cache_iponly)
984263bc 2899 return;
984263bc
MD
2900
2901 /* filter for broadcast/multicast only
2902 */
2903 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2904 return;
2905 }
2906
2907#ifdef SIGDEBUG
2908 printf("an: q value %x (MSB=0x%x, LSB=0x%x) \n",
2909 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
2910#endif
2911
984263bc
MD
2912 /* do a linear search for a matching MAC address
2913 * in the cache table
2914 * . MAC address is 6 bytes,
2915 * . var w_nextitem holds total number of entries already cached
2916 */
2917 for (i = 0; i < sc->an_nextitem; i++) {
2918 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2919 /* Match!,
2920 * so we already have this entry,
2921 * update the data
2922 */
2923 break;
2924 }
2925 }
2926
2927 /* did we find a matching mac address?
2928 * if yes, then overwrite a previously existing cache entry
2929 */
2930 if (i < sc->an_nextitem ) {
2931 cache_slot = i;
2932 }
2933 /* else, have a new address entry,so
2934 * add this new entry,
2935 * if table full, then we need to replace LRU entry
2936 */
2937 else {
2938
2939 /* check for space in cache table
2940 * note: an_nextitem also holds number of entries
2941 * added in the cache table
2942 */
2943 if ( sc->an_nextitem < MAXANCACHE ) {
2944 cache_slot = sc->an_nextitem;
2945 sc->an_nextitem++;
2946 sc->an_sigitems = sc->an_nextitem;
2947 }
2948 /* no space found, so simply wrap anth wrap index
2949 * and "zap" the next entry
2950 */
2951 else {
2952 if (wrapindex == MAXANCACHE) {
2953 wrapindex = 0;
2954 }
2955 cache_slot = wrapindex++;
2956 }
2957 }
2958
2959 /* invariant: cache_slot now points at some slot
2960 * in cache.
2961 */
2962 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2963 log(LOG_ERR, "an_cache_store, bad index: %d of "
2964 "[0..%d], gross cache error\n",
2965 cache_slot, MAXANCACHE);
2966 return;
2967 }
2968
2969 /* store items in cache
2970 * .ip source address
2971 * .mac src
2972 * .signal, etc.
2973 */
3013ac0e 2974 if (ip != NULL) {
984263bc
MD
2975 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2976 }
2977 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2978
2979
2980 switch (an_cache_mode) {
2981 case DBM:
2982 if (sc->an_have_rssimap) {
2983 sc->an_sigcache[cache_slot].signal =
2984 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2985 sc->an_sigcache[cache_slot].quality =
2986 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2987 } else {
2988 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2989 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2990 }
2991 break;
2992 case PERCENT:
2993 if (sc->an_have_rssimap) {
2994 sc->an_sigcache[cache_slot].signal =
2995 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2996 sc->an_sigcache[cache_slot].quality =
2997 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2998 } else {
2999 if (rx_rssi > 100)
3000 rx_rssi = 100;
3001 if (rx_quality > 100)
3002 rx_quality = 100;
3003 sc->an_sigcache[cache_slot].signal = rx_rssi;
3004 sc->an_sigcache[cache_slot].quality = rx_quality;
3005 }
3006 break;
3007 case RAW:
3008 sc->an_sigcache[cache_slot].signal = rx_rssi;
3009 sc->an_sigcache[cache_slot].quality = rx_quality;
3010 break;
3011 }
3012
3013 sc->an_sigcache[cache_slot].noise = 0;
3014
3015 return;
3016}
3017#endif
3018
3019static int
3020an_media_change(ifp)
3021 struct ifnet *ifp;
3022{
3023 struct an_softc *sc = ifp->if_softc;
3024 struct an_ltv_genconfig *cfg;
3025 int otype = sc->an_config.an_opmode;
3026 int orate = sc->an_tx_rate;
3027
3028 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3029 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
3030 else
3031 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
3032
3033 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3034 case IFM_IEEE80211_DS1:
3035 sc->an_tx_rate = AN_RATE_1MBPS;
3036 break;
3037 case IFM_IEEE80211_DS2:
3038 sc->an_tx_rate = AN_RATE_2MBPS;
3039 break;
3040 case IFM_IEEE80211_DS5:
3041 sc->an_tx_rate = AN_RATE_5_5MBPS;
3042 break;
3043 case IFM_IEEE80211_DS11:
3044 sc->an_tx_rate = AN_RATE_11MBPS;
3045 break;
3046 case IFM_AUTO:
3047 sc->an_tx_rate = 0;
3048 break;
3049 }
3050
3051 if (orate != sc->an_tx_rate) {
3052 /* Read the current configuration */
3053 sc->an_config.an_type = AN_RID_GENCONFIG;
3054 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3055 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3056 cfg = &sc->an_config;
3057
3058 /* clear other rates and set the only one we want */
3059 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3060 cfg->an_rates[0] = sc->an_tx_rate;
3061
3062 /* Save the new rate */
3063 sc->an_config.an_type = AN_RID_GENCONFIG;
3064 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3065 }
3066
3067 if (otype != sc->an_config.an_opmode ||
3068 orate != sc->an_tx_rate)
3069 an_init(sc);
3070
3071 return(0);
3072}
3073
3074static void
3075an_media_status(ifp, imr)
3076 struct ifnet *ifp;
3077 struct ifmediareq *imr;
3078{
3079 struct an_ltv_status status;
3080 struct an_softc *sc = ifp->if_softc;
3081
3082 status.an_len = sizeof(status);
3083 status.an_type = AN_RID_STATUS;
3084 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3085 /* If the status read fails, just lie. */
3086 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3087 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3088 }
3089
3090 if (sc->an_tx_rate == 0) {
3091 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3092 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3093 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3094 switch (status.an_current_tx_rate) {
3095 case AN_RATE_1MBPS:
3096 imr->ifm_active |= IFM_IEEE80211_DS1;
3097 break;
3098 case AN_RATE_2MBPS:
3099 imr->ifm_active |= IFM_IEEE80211_DS2;
3100 break;
3101 case AN_RATE_5_5MBPS:
3102 imr->ifm_active |= IFM_IEEE80211_DS5;
3103 break;
3104 case AN_RATE_11MBPS:
3105 imr->ifm_active |= IFM_IEEE80211_DS11;
3106 break;
3107 }
3108 } else {
3109 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3110 }
3111
3112 imr->ifm_status = IFM_AVALID;
3113 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3114 imr->ifm_status |= IFM_ACTIVE;
3115}
3116
3117/********************** Cisco utility support routines *************/
3118
3119/*
3120 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3121 * Linux driver
3122 */
3123
3124static int
3125readrids(ifp, l_ioctl)
3126 struct ifnet *ifp;
3127 struct aironet_ioctl *l_ioctl;
3128{
3129 unsigned short rid;
3130 struct an_softc *sc;
3131
3132 switch (l_ioctl->command) {
3133 case AIROGCAP:
3134 rid = AN_RID_CAPABILITIES;
3135 break;
3136 case AIROGCFG:
3137 rid = AN_RID_GENCONFIG;
3138 break;
3139 case AIROGSLIST:
3140 rid = AN_RID_SSIDLIST;
3141 break;
3142 case AIROGVLIST:
3143 rid = AN_RID_APLIST;
3144 break;
3145 case AIROGDRVNAM:
3146 rid = AN_RID_DRVNAME;
3147 break;
3148 case AIROGEHTENC:
3149 rid = AN_RID_ENCAPPROTO;
3150 break;
3151 case AIROGWEPKTMP:
3152 rid = AN_RID_WEP_TEMP;
3153 break;
3154 case AIROGWEPKNV:
3155 rid = AN_RID_WEP_PERM;
3156 break;
3157 case AIROGSTAT:
3158 rid = AN_RID_STATUS;
3159 break;
3160 case AIROGSTATSD32:
3161 rid = AN_RID_32BITS_DELTA;
3162 break;
3163 case AIROGSTATSC32:
3164 rid = AN_RID_32BITS_CUM;
3165 break;
3166 default:
3167 rid = 999;
3168 break;
3169 }
3170
3171 if (rid == 999) /* Is bad command */
3172 return -EINVAL;
3173
3174 sc = ifp->if_softc;
3175 sc->areq.an_len = AN_MAX_DATALEN;
3176 sc->areq.an_type = rid;
3177
3178 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3179
3180 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3181
3182 /* the data contains the length at first */
3183 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3184 sizeof(sc->areq.an_len))) {
3185 return -EFAULT;
3186 }
3187 /* Just copy the data back */
3188 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3189 l_ioctl->len)) {
3190 return -EFAULT;
3191 }
3192 return 0;
3193}
3194
3195static int
3196writerids(ifp, l_ioctl)
3197 struct ifnet *ifp;
3198 struct aironet_ioctl *l_ioctl;
3199{
3200 struct an_softc *sc;
3201 int rid, command;
3202
3203 sc = ifp->if_softc;
3204 rid = 0;
3205 command = l_ioctl->command;
3206
3207 switch (command) {
3208 case AIROPSIDS:
3209 rid = AN_RID_SSIDLIST;
3210 break;
3211 case AIROPCAP:
3212 rid = AN_RID_CAPABILITIES;
3213 break;
3214 case AIROPAPLIST:
3215 rid = AN_RID_APLIST;
3216 break;
3217 case AIROPCFG:
3218 rid = AN_RID_GENCONFIG;
3219 break;
3220 case AIROPMACON:
3221 an_cmd(sc, AN_CMD_ENABLE, 0);
3222 return 0;
3223 break;
3224 case AIROPMACOFF:
3225 an_cmd(sc, AN_CMD_DISABLE, 0);
3226 return 0;
3227 break;
3228 case AIROPSTCLR:
3229 /*
3230 * This command merely clears the counts does not actually
3231 * store any data only reads rid. But as it changes the cards
3232 * state, I put it in the writerid routines.
3233 */
3234
3235 rid = AN_RID_32BITS_DELTACLR;
3236 sc = ifp->if_softc;
3237 sc->areq.an_len = AN_MAX_DATALEN;
3238 sc->areq.an_type = rid;
3239
3240 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3241 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3242
3243 /* the data contains the length at first */
3244 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3245 sizeof(sc->areq.an_len))) {
3246 return -EFAULT;
3247 }
3248 /* Just copy the data */
3249 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3250 l_ioctl->len)) {
3251 return -EFAULT;
3252 }
3253 return 0;
3254 break;
3255 case AIROPWEPKEY:
3256 rid = AN_RID_WEP_TEMP;
3257 break;
3258 case AIROPWEPKEYNV:
3259 rid = AN_RID_WEP_PERM;
3260 break;
3261 case AIROPLEAPUSR:
3262 rid = AN_RID_LEAPUSERNAME;
3263 break;
3264 case AIROPLEAPPWD:
3265 rid = AN_RID_LEAPPASSWORD;
3266 break;
3267 default:
3268 return -EOPNOTSUPP;
3269 }
3270
3271 if (rid) {
3272 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3273 return -EINVAL;
3274 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3275 sc->areq.an_type = rid;
3276
3277 /* Just copy the data back */
3278 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3279 l_ioctl->len);
3280
3281 an_cmd(sc, AN_CMD_DISABLE, 0);
3282 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3283 an_cmd(sc, AN_CMD_ENABLE, 0);
3284 return 0;
3285 }
3286 return -EOPNOTSUPP;
3287}
3288
3289/*
3290 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3291 * Linux driver
3292 */
3293
377d4740 3294#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3295#define FLASH_COMMAND 0x7e7e
3296#define FLASH_SIZE 32 * 1024
3297
3298static int
3299unstickbusy(ifp)
3300 struct ifnet *ifp;
3301{
3302 struct an_softc *sc = ifp->if_softc;
3303
3304 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3305 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3306 AN_EV_CLR_STUCK_BUSY);
3307 return 1;
3308 }
3309 return 0;
3310}
3311
3312/*
3313 * Wait for busy completion from card wait for delay uSec's Return true for
3314 * success meaning command reg is clear
3315 */
3316
3317static int
3318WaitBusy(ifp, uSec)
3319 struct ifnet *ifp;
3320 int uSec;
3321{
3322 int statword = 0xffff;
3323 int delay = 0;
3324 struct an_softc *sc = ifp->if_softc;
3325
3326 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3327 FLASH_DELAY(10);
3328 delay += 10;
3329 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3330
3331 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3332 unstickbusy(ifp);
3333 }
3334 }
3335
3336 return 0 == (AN_CMD_BUSY & statword);
3337}
3338
3339/*
3340 * STEP 1) Disable MAC and do soft reset on card.
3341 */
3342
3343static int
3344cmdreset(ifp)
3345 struct ifnet *ifp;
3346{
3347 int status;
3348 struct an_softc *sc = ifp->if_softc;
3349
3350 an_stop(sc);
3351
3352 an_cmd(sc, AN_CMD_DISABLE, 0);
3353
3354 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3355 printf("an%d: Waitbusy hang b4 RESET =%d\n",
3356 sc->an_unit, status);
3357 return -EBUSY;
3358 }
3359 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3360
3361 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3362
3363
3364 if (!(status = WaitBusy(ifp, 100))) {
3365 printf("an%d: Waitbusy hang AFTER RESET =%d\n",
3366 sc->an_unit, status);
3367 return -EBUSY;
3368 }
3369 return 0;
3370}
3371
3372/*
3373 * STEP 2) Put the card in legendary flash mode
3374 */
3375
3376static int
3377setflashmode(ifp)
3378 struct ifnet *ifp;
3379{
3380 int status;
3381 struct an_softc *sc = ifp->if_softc;
3382
3383 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3384 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3385 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3386 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3387
3388 /*
3389 * mdelay(500); // 500ms delay
3390 */
3391
3392 FLASH_DELAY(500);
3393
3394 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3395 printf("Waitbusy hang after setflash mode\n");
3396 return -EIO;
3397 }
3398 return 0;
3399}
3400
3401/*
3402 * Get a character from the card matching matchbyte Step 3)
3403 */
3404
3405static int
3406flashgchar(ifp, matchbyte, dwelltime)
3407 struct ifnet *ifp;
3408 int matchbyte;
3409 int dwelltime;
3410{
3411 int rchar;
3412 unsigned char rbyte = 0;
3413 int success = -1;
3414 struct an_softc *sc = ifp->if_softc;
3415
3416
3417 do {
3418 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3419
3420 if (dwelltime && !(0x8000 & rchar)) {
3421 dwelltime -= 10;
3422 FLASH_DELAY(10);
3423 continue;
3424 }
3425 rbyte = 0xff & rchar;
3426
3427 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3428 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3429 success = 1;
3430 break;
3431 }
3432 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3433 break;
3434 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3435
3436 } while (dwelltime > 0);
3437 return success;
3438}
3439
3440/*
3441 * Put character to SWS0 wait for dwelltime x 50us for echo .
3442 */
3443
3444static int
3445flashpchar(ifp, byte, dwelltime)
3446 struct ifnet *ifp;
3447 int byte;
3448 int dwelltime;
3449{
3450 int echo;
3451 int pollbusy, waittime;
3452 struct an_softc *sc = ifp->if_softc;
3453
3454 byte |= 0x8000;
3455
3456 if (dwelltime == 0)
3457 dwelltime = 200;
3458
3459 waittime = dwelltime;
3460
3461 /*
3462 * Wait for busy bit d15 to go false indicating buffer empty
3463 */
3464 do {
3465 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3466
3467 if (pollbusy & 0x8000) {
3468 FLASH_DELAY(50);
3469 waittime -= 50;
3470 continue;
3471 } else
3472 break;
3473 }
3474 while (waittime >= 0);
3475
3476 /* timeout for busy clear wait */
3477
3478 if (waittime <= 0) {
3479 printf("an%d: flash putchar busywait timeout! \n",
3480 sc->an_unit);
3481 return -1;
3482 }
3483 /*
3484 * Port is clear now write byte and wait for it to echo back
3485 */
3486 do {
3487 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3488 FLASH_DELAY(50);
3489 dwelltime -= 50;
3490 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3491 } while (dwelltime >= 0 && echo != byte);
3492
3493
3494 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3495
3496 return echo == byte;
3497}
3498
3499/*
3500 * Transfer 32k of firmware data from user buffer to our buffer and send to
3501 * the card
3502 */
3503
3504static int
3505flashputbuf(ifp)
3506 struct ifnet *ifp;
3507{
3508 unsigned short *bufp;
3509 int nwords;
3510 struct an_softc *sc = ifp->if_softc;
3511
3512 /* Write stuff */
3513
3514 bufp = sc->an_flash_buffer;
3515
3516 if (!sc->mpi350) {
3517 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3518 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3519
3520 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3521 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3522 }
3523 } else {
3524 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3525 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3526 ((u_int32_t *)bufp)[nwords] & 0xffff);
3527 }
3528 }
3529
3530 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3531
3532 return 0;
3533}
3534
3535/*
3536 * After flashing restart the card.
3537 */
3538
3539static int
3540flashrestart(ifp)
3541 struct ifnet *ifp;
3542{
3543 int status = 0;
3544 struct an_softc *sc = ifp->if_softc;
3545
3546 FLASH_DELAY(1024); /* Added 12/7/00 */
3547
3548 an_init(sc);
3549
3550 FLASH_DELAY(1024); /* Added 12/7/00 */
3551 return status;
3552}
3553
3554/*
3555 * Entry point for flash ioclt.
3556 */
3557
3558static int
3559flashcard(ifp, l_ioctl)
3560 struct ifnet *ifp;
3561 struct aironet_ioctl *l_ioctl;
3562{
3563 int z = 0, status;
3564 struct an_softc *sc;
3565
3566 sc = ifp->if_softc;
3567 if (sc->mpi350) {
3568 printf("an%d: flashing not supported on MPI 350 yet\n",
3569 sc->an_unit);
3570 return(-1);
3571 }
3572 status = l_ioctl->command;
3573
3574 switch (l_ioctl->command) {
3575 case AIROFLSHRST:
3576 return cmdreset(ifp);
3577 break;
3578 case AIROFLSHSTFL:
3579 if (sc->an_flash_buffer) {
3580 free(sc->an_flash_buffer, M_DEVBUF);
3581 sc->an_flash_buffer = NULL;
3582 }
3583 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3584 if (sc->an_flash_buffer)
3585 return setflashmode(ifp);
3586 else
3587 return ENOBUFS;
3588 break;
3589 case AIROFLSHGCHR: /* Get char from aux */
3590 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3591 z = *(int *)&sc->areq;
3592 if ((status = flashgchar(ifp, z, 8000)) == 1)
3593 return 0;
3594 else
3595 return -1;
3596 break;
3597 case AIROFLSHPCHR: /* Send char to card. */
3598 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3599 z = *(int *)&sc->areq;
3600 if ((status = flashpchar(ifp, z, 8000)) == -1)
3601 return -EIO;
3602 else
3603 return 0;
3604 break;
3605 case AIROFLPUTBUF: /* Send 32k to card */
3606 if (l_ioctl->len > FLASH_SIZE) {
3607 printf("an%d: Buffer to big, %x %x\n", sc->an_unit,
3608 l_ioctl->len, FLASH_SIZE);
3609 return -EINVAL;
3610 }
3611 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3612
3613 if ((status = flashputbuf(ifp)) != 0)
3614 return -EIO;
3615 else
3616 return 0;
3617 break;
3618 case AIRORESTART:
3619 if ((status = flashrestart(ifp)) != 0) {
3620 printf("an%d: FLASHRESTART returned %d\n",
3621 sc->an_unit, status);
3622 return -EIO;
3623 } else
3624 return 0;
3625
3626 break;
3627 default:
3628 return -EINVAL;
3629 }
3630
3631 return -EINVAL;
3632}