[dragonfly.git] / sys / dev / netif / ixgbe / ixgbe.h

/******************************************************************************

  Copyright (c) 2001-2012, Intel Corporation 
  All rights reserved.
  
  Redistribution and use in source and binary forms, with or without 
  modification, are permitted provided that the following conditions are met:
  
   1. Redistributions of source code must retain the above copyright notice, 
      this list of conditions and the following disclaimer.
  
   2. Redistributions in binary form must reproduce the above copyright 
      notice, this list of conditions and the following disclaimer in the 
      documentation and/or other materials provided with the distribution.
  
   3. Neither the name of the Intel Corporation nor the names of its 
      contributors may be used to endorse or promote products derived from 
      this software without specific prior written permission.
  
  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 
  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  POSSIBILITY OF SUCH DAMAGE.

******************************************************************************/
/*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.26 2012/04/23 22:05:09 bz Exp $*/


#ifndef _IXGBE_H_
#define _IXGBE_H_


#include <sys/param.h>
#include <sys/systm.h>
#include <sys/mbuf.h>
#include <sys/protosw.h>
#include <sys/socket.h>
#include <sys/malloc.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/sockio.h>

#include <net/if.h>
#include <net/if_arp.h>
#include <net/ifq_var.h>
#include <net/bpf.h>
#include <net/ethernet.h>
#include <net/if_dl.h>
#include <net/if_media.h>

#include <net/bpf.h>
#include <net/if_types.h>
#include <net/vlan/if_vlan_var.h>
#include <net/vlan/if_vlan_ether.h>

#include <netinet/in_systm.h>
#include <netinet/in.h>
#include <netinet/if_ether.h>
#include <netinet/ip.h>
#include <netinet/ip6.h>
#include <netinet/tcp.h>
#ifdef NET_LRO
#include <netinet/tcp_lro.h>	/* XXX: IPv4 only */
#endif
#include <netinet/udp.h>

#include <sys/in_cksum.h>

#include <sys/bus.h>
#include <sys/rman.h>
#include <sys/resource.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <machine/clock.h>
#include <bus/pci/pcivar.h>
#include <bus/pci/pcireg.h>
#include <sys/proc.h>
#include <sys/sysctl.h>
#include <sys/endian.h>
#include <sys/taskqueue.h>
#include <machine/smp.h>

#include <sys/spinlock.h>
#include <sys/spinlock2.h>

#ifdef IXGBE_IEEE1588
#include <sys/ieee1588.h>
#endif

#include "ixgbe_api.h"
#include "ixgbe_defines.h"

/* Tunables */

/*
 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
 * number of transmit descriptors allocated by the driver. Increasing this
 * value allows the driver to queue more transmits. Each descriptor is 16
 * bytes. Performance tests have show the 2K value to be optimal for top
 * performance.
 */
#define DEFAULT_TXD	1024
#define PERFORM_TXD	2048
#define MAX_TXD		4096
#define MIN_TXD		64

/*
 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
 * number of receive descriptors allocated for each RX queue. Increasing this
 * value allows the driver to buffer more incoming packets. Each descriptor
 * is 16 bytes.  A receive buffer is also allocated for each descriptor. 
 * 
 * Note: with 8 rings and a dual port card, it is possible to bump up 
 *	against the system mbuf pool limit, you can tune nmbclusters
 *	to adjust for this.
 */
#define DEFAULT_RXD	1024
#define PERFORM_RXD	2048
#define MAX_RXD		4096
#define MIN_RXD		64

/* Alignment for rings */
#define DBA_ALIGN	128

/*
 * This parameter controls the maximum no of times the driver will loop in
 * the isr. Minimum Value = 1
 */
#define MAX_LOOP	10

/*
 * This is the max watchdog interval, ie. the time that can
 * pass between any two TX clean operations, such only happening
 * when the TX hardware is functioning.
 */
#define IXGBE_WATCHDOG                   (10 * hz)

/*
 * This parameters control when the driver calls the routine to reclaim
 * transmit descriptors.
 */
#define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
#define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)

#define IXGBE_MAX_FRAME_SIZE	0x3F00

/* Flow control constants */
#define IXGBE_FC_PAUSE		0xFFFF
#define IXGBE_FC_HI		0x20000
#define IXGBE_FC_LO		0x10000

/* Keep older OS drivers building... */
#if !defined(SYSCTL_ADD_UQUAD)
#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
#endif

/* Defines for printing debug information */
#define DEBUG_INIT  0
#define DEBUG_IOCTL 0
#define DEBUG_HW    0

#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  kprintf(S "\n")
#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  kprintf(S "\n", A)
#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  kprintf(S "\n", A, B)
#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) kprintf(S "\n")
#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) kprintf(S "\n", A)
#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) kprintf(S "\n", A, B)
#define HW_DEBUGOUT(S)              if (DEBUG_HW) kprintf(S "\n")
#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) kprintf(S "\n", A)
#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) kprintf(S "\n", A, B)

#define MAX_NUM_MULTICAST_ADDRESSES     128
#define IXGBE_82598_SCATTER		100
#define IXGBE_82599_SCATTER		32
#define MSIX_82598_BAR			3
#define MSIX_82599_BAR			4
#define IXGBE_TSO_SIZE			262140
#define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
#define IXGBE_RX_HDR			128
#define IXGBE_VFTA_SIZE			128
#define IXGBE_BR_SIZE			4096
#define IXGBE_QUEUE_MIN_FREE		32
#define IXGBE_QUEUE_IDLE		1
#define IXGBE_QUEUE_WORKING		2
#define IXGBE_QUEUE_HUNG		4
#define IXGBE_QUEUE_DEPLETED		8

/* Offload bits in mbuf flag */
#define CSUM_OFFLOAD		(CSUM_IP|CSUM_TCP|CSUM_UDP)

/* One for TX csum offloading desc, the other 2 are reserved */
#define IXGBE_TX_RESERVED		3

/*
 * Interrupt Moderation parameters 
 */
#define IXGBE_LOW_LATENCY	128
#define IXGBE_AVE_LATENCY	400
#define IXGBE_BULK_LATENCY	1200
#define IXGBE_LINK_ITR		2000

/*
 *****************************************************************************
 * vendor_info_array
 * 
 * This array contains the list of Subvendor/Subdevice IDs on which the driver
 * should load.
 * 
 *****************************************************************************
 */
typedef struct _ixgbe_vendor_info_t {
	unsigned int    vendor_id;
	unsigned int    device_id;
	unsigned int    subvendor_id;
	unsigned int    subdevice_id;
	unsigned int    index;
} ixgbe_vendor_info_t;


struct ixgbe_tx_buf {
	u32		eop_index;
	struct mbuf	*m_head;
	bus_dmamap_t	map;
};

struct ixgbe_rx_buf {
	struct mbuf	*m_head;
	struct mbuf	*m_pack;
	struct mbuf	*fmp;
	bus_dmamap_t	hmap;
	bus_dmamap_t	pmap;
};

/*
 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
 */
struct ixgbe_dma_alloc {
	bus_addr_t		dma_paddr;
	caddr_t			dma_vaddr;
	bus_dma_tag_t		dma_tag;
	bus_dmamap_t		dma_map;
	bus_dma_segment_t	dma_seg;
	bus_size_t		dma_size;
	int			dma_nseg;
};

/*
** Driver queue struct: this is the interrupt container
**  for the associated tx and rx ring.
*/
struct ix_queue {
	struct adapter		*adapter;
	u32			msix;           /* This queue's MSIX vector */
	u32			eims;           /* This queue's EIMS bit */
	u32			eitr_setting;
	struct resource		*res;
	void			*tag;
	struct tx_ring		*txr;
	struct rx_ring		*rxr;
	struct task		que_task;
	struct taskqueue	*tq;
	u64			irqs;
	struct lwkt_serialize	serializer;
};

/*
 * The transmit ring, one per queue
 */
struct tx_ring {
        struct adapter		*adapter;
	struct lock		tx_lock;
	u32			me;
	int			queue_status;
	int			watchdog_time;
	union ixgbe_adv_tx_desc	*tx_base;
	struct ixgbe_dma_alloc	txdma;
	u32			next_avail_desc;
	u32			next_to_clean;
	struct ixgbe_tx_buf	*tx_buffers;
	volatile u16		tx_avail;
	u32			txd_cmd;
	bus_dma_tag_t		txtag;
	char			lock_name[16];
#ifdef IFNET_BUF_RING
	struct buf_ring		*br;
#endif
#ifdef IXGBE_FDIR
	u16			atr_sample;
	u16			atr_count;
#endif
	u32			bytes;  /* used for AIM */
	u32			packets;
	/* Soft Stats */
	u64			no_desc_avail;
	u64			total_packets;
};


/*
 * The Receive ring, one per rx queue
 */
struct rx_ring {
        struct adapter		*adapter;
	struct lock		rx_lock;
	u32			me;
	union ixgbe_adv_rx_desc	*rx_base;
	struct ixgbe_dma_alloc	rxdma;
#ifdef NET_LRO
	struct lro_ctrl		lro;
#endif
	bool			lro_enabled;
	bool			hdr_split;
	bool			hw_rsc;
	bool			discard;
	bool			vtag_strip;
        u32			next_to_refresh;
        u32 			next_to_check;
	char			lock_name[16];
	struct ixgbe_rx_buf	*rx_buffers;
	bus_dma_tag_t		htag;
	bus_dma_tag_t		ptag;

	u32			bytes; /* Used for AIM calc */
	u32			packets;

	/* Soft stats */
	u64			rx_irq;
	u64			rx_split_packets;
	u64			rx_packets;
	u64 			rx_bytes;
	u64 			rx_discarded;
	u64 			rsc_num;
#ifdef IXGBE_FDIR
	u64			flm;
#endif
};

/* Our adapter structure */
struct adapter {
	struct ifnet		*ifp;
	struct ixgbe_hw		hw;

	struct ixgbe_osdep	osdep;
	struct device		*dev;

	struct resource		*pci_mem;
	struct resource		*msix_mem;

	/*
	 * Interrupt resources: this set is
	 * either used for legacy, or for Link
	 * when doing MSIX
	 */
	void			*tag;
	struct resource 	*res;
	int			intr_type;

	struct ifmedia		media;
	struct callout		timer;
	int			msix;
	int			if_flags;

	struct lock		core_lock;

	eventhandler_tag 	vlan_attach;
	eventhandler_tag 	vlan_detach;

	u16			num_vlans;
	u16			num_queues;

	/*
	** Shadow VFTA table, this is needed because
	** the real vlan filter table gets cleared during
	** a soft reset and the driver needs to be able
	** to repopulate it.
	*/
	u32			shadow_vfta[IXGBE_VFTA_SIZE];

	/* Info about the interface */
	u32			optics;
	u32			fc; /* local flow ctrl setting */
	int			advertise;  /* link speeds */
	bool			link_active;
	u16			max_frame_size;
	u16			num_segs;
	u32			link_speed;
	bool			link_up;
	u32 			linkvec;

	/* Mbuf cluster size */
	u32			rx_mbuf_sz;

	/* Support for pluggable optics */
	bool			sfp_probe;
	struct task     	link_task;  /* Link tasklet */
	struct task     	mod_task;   /* SFP tasklet */
	struct task     	msf_task;   /* Multispeed Fiber */
#ifdef IXGBE_FDIR
	int			fdir_reinit;
	struct task     	fdir_task;
#endif
	struct taskqueue	*tq;

	/*
	** Queues: 
	**   This is the irq holder, it has
	**   and RX/TX pair or rings associated
	**   with it.
	*/
	struct ix_queue		*queues;

	/*
	 * Transmit rings:
	 *	Allocated at run time, an array of rings.
	 */
	struct tx_ring		*tx_rings;
	int			num_tx_desc;

	/*
	 * Receive rings:
	 *	Allocated at run time, an array of rings.
	 */
	struct rx_ring		*rx_rings;
	int			num_rx_desc;
	u64			que_mask;
	u32			rx_process_limit;

	/* Multicast array memory */
	u8			*mta;

	/* Misc stats maintained by the driver */
	unsigned long   	dropped_pkts;
	unsigned long   	mbuf_defrag_failed;
	unsigned long   	mbuf_header_failed;
	unsigned long   	mbuf_packet_failed;
	unsigned long   	no_tx_map_avail;
	unsigned long   	no_tx_dma_setup;
	unsigned long   	watchdog_events;
	unsigned long   	tso_tx;
	unsigned long		link_irq;

	struct ixgbe_hw_stats 	stats;

	struct lwkt_serialize	serializer;
	struct sysctl_ctx_list	sysctl_ctx;
	struct sysctl_oid	*sysctl_tree;
};

/* Precision Time Sync (IEEE 1588) defines */
#define ETHERTYPE_IEEE1588      0x88F7
#define PICOSECS_PER_TICK       20833
#define TSYNC_UDP_PORT          319 /* UDP port for the protocol */
#define IXGBE_ADVTXD_TSTAMP	0x00080000


#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
        lockinit(&(_sc)->core_lock, _name, 0, LK_CANRECURSE)
#define IXGBE_CORE_LOCK_DESTROY(_sc)      lockuninit(&(_sc)->core_lock)
#define IXGBE_TX_LOCK_DESTROY(_sc)        lockuninit(&(_sc)->tx_lock)
#define IXGBE_RX_LOCK_DESTROY(_sc)        lockuninit(&(_sc)->rx_lock)
#define IXGBE_CORE_LOCK(_sc)              lockmgr(&(_sc)->core_lock, LK_EXCLUSIVE)
#define IXGBE_TX_LOCK(_sc)                lockmgr(&(_sc)->tx_lock, LK_EXCLUSIVE)
#define IXGBE_TX_TRYLOCK(_sc)             lockmgr(&(_sc)->tx_mtx, LK_EXCLUSIVE|LK_NOWAIT)
#define IXGBE_RX_LOCK(_sc)                lockmgr(&(_sc)->rx_lock, LK_EXCLUSIVE)
#define IXGBE_CORE_UNLOCK(_sc)            lockmgr(&(_sc)->core_lock, LK_RELEASE)
#define IXGBE_TX_UNLOCK(_sc)              lockmgr(&(_sc)->tx_lock, LK_RELEASE)
#define IXGBE_RX_UNLOCK(_sc)              lockmgr(&(_sc)->rx_lock, LK_RELEASE)
#define IXGBE_CORE_LOCK_ASSERT(_sc)       KKASSERT(lockstatus(&(_sc)->core_lock, curthread) !=0)
#define IXGBE_TX_LOCK_ASSERT(_sc)         KKASSERT(lockstatus(&(_sc)->tx_lock, curthread) != 0)


static inline bool
ixgbe_is_sfp(struct ixgbe_hw *hw)
{
	switch (hw->phy.type) {
	case ixgbe_phy_sfp_avago:
	case ixgbe_phy_sfp_ftl:
	case ixgbe_phy_sfp_intel:
	case ixgbe_phy_sfp_unknown:
	case ixgbe_phy_sfp_passive_tyco:
	case ixgbe_phy_sfp_passive_unknown:
		return TRUE;
	default:
		return FALSE;
	}
}

/*
** Find the number of unrefreshed RX descriptors
*/
static inline u16
ixgbe_rx_unrefreshed(struct rx_ring *rxr)
{       
	struct adapter  *adapter = rxr->adapter;
        
	if (rxr->next_to_check > rxr->next_to_refresh)
		return (rxr->next_to_check - rxr->next_to_refresh - 1);
	else
		return ((adapter->num_rx_desc + rxr->next_to_check) -
		    rxr->next_to_refresh - 1);
}       

#endif /* _IXGBE_H_ */
Commit	Line	Data
9407f759 FT	1	/******************************************************************************
	2
	3	Copyright (c) 2001-2012, Intel Corporation
	4	All rights reserved.
	5
	6	Redistribution and use in source and binary forms, with or without
	7	modification, are permitted provided that the following conditions are met:
	8
	9	1. Redistributions of source code must retain the above copyright notice,
	10	this list of conditions and the following disclaimer.
	11
	12	2. Redistributions in binary form must reproduce the above copyright
	13	notice, this list of conditions and the following disclaimer in the
	14	documentation and/or other materials provided with the distribution.
	15
	16	3. Neither the name of the Intel Corporation nor the names of its
	17	contributors may be used to endorse or promote products derived from
	18	this software without specific prior written permission.
	19
	20	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	21	AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	22	IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	23	ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
	24	LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	25	CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	26	SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
	27	INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
	28	CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	29	ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	30	POSSIBILITY OF SUCH DAMAGE.
	31
	32	******************************************************************************/
	33	/$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.26 2012/04/23 22:05:09 bz Exp $/
	34
	35
	36	#ifndef _IXGBE_H_
	37	#define _IXGBE_H_
	38
	39
	40	#include <sys/param.h>
	41	#include <sys/systm.h>
9407f759 FT	42	#include <sys/mbuf.h>
	43	#include <sys/protosw.h>
	44	#include <sys/socket.h>
	45	#include <sys/malloc.h>
	46	#include <sys/kernel.h>
	47	#include <sys/module.h>
	48	#include <sys/sockio.h>
	49
	50	#include <net/if.h>
	51	#include <net/if_arp.h>
	52	#include <net/ifq_var.h>
	53	#include <net/bpf.h>
	54	#include <net/ethernet.h>
	55	#include <net/if_dl.h>
	56	#include <net/if_media.h>
	57
	58	#include <net/bpf.h>
	59	#include <net/if_types.h>
	60	#include <net/vlan/if_vlan_var.h>
	61	#include <net/vlan/if_vlan_ether.h>
	62
	63	#include <netinet/in_systm.h>
	64	#include <netinet/in.h>
	65	#include <netinet/if_ether.h>
	66	#include <netinet/ip.h>
	67	#include <netinet/ip6.h>
	68	#include <netinet/tcp.h>
	69	#ifdef NET_LRO
	70	#include <netinet/tcp_lro.h> /* XXX: IPv4 only */
	71	#endif
	72	#include <netinet/udp.h>
	73
	74	#include <sys/in_cksum.h>
	75
	76	#include <sys/bus.h>
	77	#include <sys/rman.h>
	78	#include <sys/resource.h>
	79	#include <vm/vm.h>
	80	#include <vm/pmap.h>
	81	#include <machine/clock.h>
	82	#include <bus/pci/pcivar.h>
	83	#include <bus/pci/pcireg.h>
	84	#include <sys/proc.h>
	85	#include <sys/sysctl.h>
	86	#include <sys/endian.h>
	87	#include <sys/taskqueue.h>
	88	#include <machine/smp.h>
	89
	90	#include <sys/spinlock.h>
	91	#include <sys/spinlock2.h>
	92
	93	#ifdef IXGBE_IEEE1588
	94	#include <sys/ieee1588.h>
	95	#endif
	96
	97	#include "ixgbe_api.h"
	98	#include "ixgbe_defines.h"
	99
	100	/* Tunables */
	101
	102	/*
	103	* TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
	104	* number of transmit descriptors allocated by the driver. Increasing this
	105	* value allows the driver to queue more transmits. Each descriptor is 16
106	* bytes. Performance tests have show the 2K value to be optimal for top
107	* performance.
108	*/
109	#define DEFAULT_TXD 1024
110	#define PERFORM_TXD 2048
111	#define MAX_TXD 4096
112	#define MIN_TXD 64
113
114	/*
115	* RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the
116	* number of receive descriptors allocated for each RX queue. Increasing this
117	* value allows the driver to buffer more incoming packets. Each descriptor
118	* is 16 bytes. A receive buffer is also allocated for each descriptor.
119	*
120	* Note: with 8 rings and a dual port card, it is possible to bump up
121	* against the system mbuf pool limit, you can tune nmbclusters
122	* to adjust for this.
123	*/
124	#define DEFAULT_RXD 1024
125	#define PERFORM_RXD 2048
126	#define MAX_RXD 4096
127	#define MIN_RXD 64
128
129	/* Alignment for rings */
130	#define DBA_ALIGN 128
131
132	/*
133	* This parameter controls the maximum no of times the driver will loop in
134	* the isr. Minimum Value = 1
135	*/
136	#define MAX_LOOP 10
137
138	/*
139	* This is the max watchdog interval, ie. the time that can
140	* pass between any two TX clean operations, such only happening
141	* when the TX hardware is functioning.
142	*/
143	#define IXGBE_WATCHDOG (10 * hz)
144
145	/*
146	* This parameters control when the driver calls the routine to reclaim
147	* transmit descriptors.
148	*/
149	#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
150	#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32)
151
152	#define IXGBE_MAX_FRAME_SIZE 0x3F00
153
154	/* Flow control constants */
155	#define IXGBE_FC_PAUSE 0xFFFF
156	#define IXGBE_FC_HI 0x20000
157	#define IXGBE_FC_LO 0x10000
158
159	/* Keep older OS drivers building... */
160	#if !defined(SYSCTL_ADD_UQUAD)
161	#define SYSCTL_ADD_UQUAD SYSCTL_ADD_QUAD
162	#endif
163
164	/* Defines for printing debug information */
165	#define DEBUG_INIT 0
166	#define DEBUG_IOCTL 0
167	#define DEBUG_HW 0
168
169	#define INIT_DEBUGOUT(S) if (DEBUG_INIT) kprintf(S "\n")
170	#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) kprintf(S "\n", A)
171	#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) kprintf(S "\n", A, B)
172	#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) kprintf(S "\n")
173	#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) kprintf(S "\n", A)
174	#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) kprintf(S "\n", A, B)
175	#define HW_DEBUGOUT(S) if (DEBUG_HW) kprintf(S "\n")
176	#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) kprintf(S "\n", A)
177	#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) kprintf(S "\n", A, B)
178
179	#define MAX_NUM_MULTICAST_ADDRESSES 128
180	#define IXGBE_82598_SCATTER 100
181	#define IXGBE_82599_SCATTER 32
182	#define MSIX_82598_BAR 3
183	#define MSIX_82599_BAR 4
184	#define IXGBE_TSO_SIZE 262140
185	#define IXGBE_TX_BUFFER_SIZE ((u32) 1514)
186	#define IXGBE_RX_HDR 128
187	#define IXGBE_VFTA_SIZE 128
188	#define IXGBE_BR_SIZE 4096
189	#define IXGBE_QUEUE_MIN_FREE 32
190	#define IXGBE_QUEUE_IDLE 1
191	#define IXGBE_QUEUE_WORKING 2
192	#define IXGBE_QUEUE_HUNG 4
193	#define IXGBE_QUEUE_DEPLETED 8
194
195	/* Offload bits in mbuf flag */
9407f759	196	#define CSUM_OFFLOAD (CSUM_IP\|CSUM_TCP\|CSUM_UDP)
9407f759	197
a1a9516b FT	198	/* One for TX csum offloading desc, the other 2 are reserved */
	199	#define IXGBE_TX_RESERVED 3
	200
9407f759 FT	201	/*
	202	* Interrupt Moderation parameters
	203	*/
	204	#define IXGBE_LOW_LATENCY 128
	205	#define IXGBE_AVE_LATENCY 400
	206	#define IXGBE_BULK_LATENCY 1200
	207	#define IXGBE_LINK_ITR 2000
	208
	209	/*
	210	*****************************************************************************
	211	* vendor_info_array
	212	*
	213	* This array contains the list of Subvendor/Subdevice IDs on which the driver
	214	* should load.
	215	*
	216	*****************************************************************************
	217	*/
	218	typedef struct _ixgbe_vendor_info_t {
	219	unsigned int vendor_id;
	220	unsigned int device_id;
	221	unsigned int subvendor_id;
	222	unsigned int subdevice_id;
	223	unsigned int index;
	224	} ixgbe_vendor_info_t;
	225
	226
	227	struct ixgbe_tx_buf {
	228	u32 eop_index;
	229	struct mbuf *m_head;
	230	bus_dmamap_t map;
	231	};
	232
	233	struct ixgbe_rx_buf {
	234	struct mbuf *m_head;
	235	struct mbuf *m_pack;
	236	struct mbuf *fmp;
	237	bus_dmamap_t hmap;
	238	bus_dmamap_t pmap;
	239	};
	240
	241	/*
	242	* Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
	243	*/
	244	struct ixgbe_dma_alloc {
	245	bus_addr_t dma_paddr;
	246	caddr_t dma_vaddr;
	247	bus_dma_tag_t dma_tag;
	248	bus_dmamap_t dma_map;
	249	bus_dma_segment_t dma_seg;
	250	bus_size_t dma_size;
	251	int dma_nseg;
	252	};
	253
	254	/*
	255	** Driver queue struct: this is the interrupt container
	256	** for the associated tx and rx ring.
	257	*/
	258	struct ix_queue {
	259	struct adapter *adapter;
	260	u32 msix; /* This queue's MSIX vector */
	261	u32 eims; /* This queue's EIMS bit */
	262	u32 eitr_setting;
	263	struct resource *res;
	264	void *tag;
265	struct tx_ring *txr;
266	struct rx_ring *rxr;
267	struct task que_task;
268	struct taskqueue *tq;
269	u64 irqs;
270	struct lwkt_serialize serializer;
271	};
272
273	/*
274	* The transmit ring, one per queue
275	*/
276	struct tx_ring {
277	struct adapter *adapter;
278	struct lock tx_lock;
279	u32 me;
280	int queue_status;
281	int watchdog_time;
282	union ixgbe_adv_tx_desc *tx_base;
283	struct ixgbe_dma_alloc txdma;
284	u32 next_avail_desc;
285	u32 next_to_clean;
286	struct ixgbe_tx_buf *tx_buffers;
287	volatile u16 tx_avail;
288	u32 txd_cmd;
289	bus_dma_tag_t txtag;
290	char lock_name[16];
c4a0768d	291	#ifdef IFNET_BUF_RING
9407f759 FT	292	struct buf_ring *br;
	293	#endif
	294	#ifdef IXGBE_FDIR
	295	u16 atr_sample;
	296	u16 atr_count;
	297	#endif
	298	u32 bytes; /* used for AIM */
	299	u32 packets;
	300	/* Soft Stats */
	301	u64 no_desc_avail;
	302	u64 total_packets;
	303	};
	304
	305
	306	/*
	307	* The Receive ring, one per rx queue
	308	*/
	309	struct rx_ring {
	310	struct adapter *adapter;
	311	struct lock rx_lock;
	312	u32 me;
	313	union ixgbe_adv_rx_desc *rx_base;
	314	struct ixgbe_dma_alloc rxdma;
	315	#ifdef NET_LRO
	316	struct lro_ctrl lro;
	317	#endif
	318	bool lro_enabled;
	319	bool hdr_split;
	320	bool hw_rsc;
	321	bool discard;
	322	bool vtag_strip;
	323	u32 next_to_refresh;
	324	u32 next_to_check;
	325	char lock_name[16];
	326	struct ixgbe_rx_buf *rx_buffers;
	327	bus_dma_tag_t htag;
	328	bus_dma_tag_t ptag;
	329
	330	u32 bytes; /* Used for AIM calc */
	331	u32 packets;
	332
	333	/* Soft stats */
	334	u64 rx_irq;
	335	u64 rx_split_packets;
	336	u64 rx_packets;
	337	u64 rx_bytes;
	338	u64 rx_discarded;
	339	u64 rsc_num;
	340	#ifdef IXGBE_FDIR
	341	u64 flm;
	342	#endif
	343	};
	344
	345	/* Our adapter structure */
	346	struct adapter {
	347	struct ifnet *ifp;
	348	struct ixgbe_hw hw;
	349
	350	struct ixgbe_osdep osdep;
	351	struct device *dev;
	352
	353	struct resource *pci_mem;
	354	struct resource *msix_mem;
	355
356	/*
357	* Interrupt resources: this set is
358	* either used for legacy, or for Link
359	* when doing MSIX
360	*/
361	void *tag;
362	struct resource *res;
7e665ea1	363	int intr_type;
9407f759 FT	364
	365	struct ifmedia media;
	366	struct callout timer;
	367	int msix;
	368	int if_flags;
	369
	370	struct lock core_lock;
9407f759 FT	371
	372	eventhandler_tag vlan_attach;
	373	eventhandler_tag vlan_detach;
	374
	375	u16 num_vlans;
	376	u16 num_queues;
	377
	378	/*
	379	** Shadow VFTA table, this is needed because
	380	** the real vlan filter table gets cleared during
	381	** a soft reset and the driver needs to be able
	382	** to repopulate it.
	383	*/
	384	u32 shadow_vfta[IXGBE_VFTA_SIZE];
	385
	386	/* Info about the interface */
	387	u32 optics;
	388	u32 fc; /* local flow ctrl setting */
	389	int advertise; /* link speeds */
	390	bool link_active;
	391	u16 max_frame_size;
	392	u16 num_segs;
	393	u32 link_speed;
	394	bool link_up;
	395	u32 linkvec;
	396
	397	/* Mbuf cluster size */
	398	u32 rx_mbuf_sz;
	399
	400	/* Support for pluggable optics */
	401	bool sfp_probe;
	402	struct task link_task; /* Link tasklet */
	403	struct task mod_task; /* SFP tasklet */
	404	struct task msf_task; /* Multispeed Fiber */
	405	#ifdef IXGBE_FDIR
	406	int fdir_reinit;
	407	struct task fdir_task;
	408	#endif
	409	struct taskqueue *tq;
	410
	411	/*
	412	** Queues:
	413	** This is the irq holder, it has
	414	** and RX/TX pair or rings associated
	415	** with it.
	416	*/
	417	struct ix_queue *queues;
	418
	419	/*
	420	* Transmit rings:
	421	* Allocated at run time, an array of rings.
	422	*/
	423	struct tx_ring *tx_rings;
	424	int num_tx_desc;
	425
	426	/*
	427	* Receive rings:
	428	* Allocated at run time, an array of rings.
	429	*/
	430	struct rx_ring *rx_rings;
	431	int num_rx_desc;
	432	u64 que_mask;
	433	u32 rx_process_limit;
	434
435	/* Multicast array memory */
436	u8 *mta;
437
438	/* Misc stats maintained by the driver */
439	unsigned long dropped_pkts;
440	unsigned long mbuf_defrag_failed;
441	unsigned long mbuf_header_failed;
442	unsigned long mbuf_packet_failed;
443	unsigned long no_tx_map_avail;
444	unsigned long no_tx_dma_setup;
445	unsigned long watchdog_events;
446	unsigned long tso_tx;
447	unsigned long link_irq;
448
449	struct ixgbe_hw_stats stats;
450
451	struct lwkt_serialize serializer;
452	struct sysctl_ctx_list sysctl_ctx;
453	struct sysctl_oid *sysctl_tree;
454	};
455
456	/* Precision Time Sync (IEEE 1588) defines */
457	#define ETHERTYPE_IEEE1588 0x88F7
458	#define PICOSECS_PER_TICK 20833
459	#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */
460	#define IXGBE_ADVTXD_TSTAMP 0x00080000
461
462
463	#define IXGBE_CORE_LOCK_INIT(_sc, _name) \
464	lockinit(&(_sc)->core_lock, _name, 0, LK_CANRECURSE)
465	#define IXGBE_CORE_LOCK_DESTROY(_sc) lockuninit(&(_sc)->core_lock)
466	#define IXGBE_TX_LOCK_DESTROY(_sc) lockuninit(&(_sc)->tx_lock)
467	#define IXGBE_RX_LOCK_DESTROY(_sc) lockuninit(&(_sc)->rx_lock)
468	#define IXGBE_CORE_LOCK(_sc) lockmgr(&(_sc)->core_lock, LK_EXCLUSIVE)
469	#define IXGBE_TX_LOCK(_sc) lockmgr(&(_sc)->tx_lock, LK_EXCLUSIVE)
470	#define IXGBE_TX_TRYLOCK(_sc) lockmgr(&(_sc)->tx_mtx, LK_EXCLUSIVE\|LK_NOWAIT)
471	#define IXGBE_RX_LOCK(_sc) lockmgr(&(_sc)->rx_lock, LK_EXCLUSIVE)
472	#define IXGBE_CORE_UNLOCK(_sc) lockmgr(&(_sc)->core_lock, LK_RELEASE)
473	#define IXGBE_TX_UNLOCK(_sc) lockmgr(&(_sc)->tx_lock, LK_RELEASE)
474	#define IXGBE_RX_UNLOCK(_sc) lockmgr(&(_sc)->rx_lock, LK_RELEASE)
475	#define IXGBE_CORE_LOCK_ASSERT(_sc) KKASSERT(lockstatus(&(_sc)->core_lock, curthread) !=0)
476	#define IXGBE_TX_LOCK_ASSERT(_sc) KKASSERT(lockstatus(&(_sc)->tx_lock, curthread) != 0)
477
478
479	static inline bool
480	ixgbe_is_sfp(struct ixgbe_hw *hw)
481	{
482	switch (hw->phy.type) {
483	case ixgbe_phy_sfp_avago:
484	case ixgbe_phy_sfp_ftl:
485	case ixgbe_phy_sfp_intel:
486	case ixgbe_phy_sfp_unknown:
487	case ixgbe_phy_sfp_passive_tyco:
488	case ixgbe_phy_sfp_passive_unknown:
489	return TRUE;
490	default:
491	return FALSE;
492	}
493	}
494
9407f759 FT	495	/*
	496	** Find the number of unrefreshed RX descriptors
	497	*/
	498	static inline u16
	499	ixgbe_rx_unrefreshed(struct rx_ring *rxr)
	500	{
	501	struct adapter *adapter = rxr->adapter;
	502
	503	if (rxr->next_to_check > rxr->next_to_refresh)
	504	return (rxr->next_to_check - rxr->next_to_refresh - 1);
	505	else
	506	return ((adapter->num_rx_desc + rxr->next_to_check) -
	507	rxr->next_to_refresh - 1);
	508	}
	509
	510	#endif /* _IXGBE_H_ */