MP Implmentation 3/4: MAJOR progress on SMP, full userland MP is now working!
[dragonfly.git] / sys / i386 / i386 / swtch.s
CommitLineData
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1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
f1d1c3fa 4 * LWKT threads Copyright (c) 2003 Matthew Dillon
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5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
a2a5ad0d 38 * $DragonFly: src/sys/i386/i386/Attic/swtch.s,v 1.23 2003/07/10 04:47:53 dillon Exp $
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39 */
40
41#include "npx.h"
42#include "opt_user_ldt.h"
43
44#include <sys/rtprio.h>
45
46#include <machine/asmacros.h>
47#include <machine/ipl.h>
48
49#ifdef SMP
50#include <machine/pmap.h>
51#include <machine/smptests.h> /** GRAB_LOPRIO */
52#include <machine/apic.h>
53#include <machine/lock.h>
54#endif /* SMP */
55
56#include "assym.s"
57
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58#if defined(SMP)
59#define MPLOCKED lock ;
60#else
61#define MPLOCKED
62#endif
63
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64 .data
65
2954c92f 66 .globl panic
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67
68#if defined(SWTCH_OPTIM_STATS)
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69 .globl swtch_optim_stats, tlb_flush_count
70swtch_optim_stats: .long 0 /* number of _swtch_optims */
71tlb_flush_count: .long 0
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72#endif
73
74 .text
75
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76
77/*
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78 * cpu_heavy_switch(next_thread)
79 *
80 * Switch from the current thread to a new thread. This entry
81 * is normally called via the thread->td_switch function, and will
82 * only be called when the current thread is a heavy weight process.
83 *
84 * YYY disable interrupts once giant is removed.
984263bc 85 */
8ad65e08 86ENTRY(cpu_heavy_switch)
2954c92f 87 movl PCPU(curthread),%ecx
84b592ba 88 movl TD_PROC(%ecx),%ecx
984263bc 89
8ad65e08 90 cli
984263bc 91 movl P_VMSPACE(%ecx), %edx
72740893 92 movl PCPU(cpuid), %eax
a2a5ad0d 93 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
984263bc 94
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95 /*
96 * Save general regs
97 */
98 movl P_THREAD(%ecx),%edx
b7c628e4 99 movl TD_PCB(%edx),%edx
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100 movl (%esp),%eax /* Hardware registers */
101 movl %eax,PCB_EIP(%edx)
102 movl %ebx,PCB_EBX(%edx)
103 movl %esp,PCB_ESP(%edx)
104 movl %ebp,PCB_EBP(%edx)
105 movl %esi,PCB_ESI(%edx)
106 movl %edi,PCB_EDI(%edx)
107 movl %gs,PCB_GS(%edx)
108
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109 /*
110 * Push the LWKT switch restore function, which resumes a heavy
111 * weight process. Note that the LWKT switcher is based on
112 * TD_SP, while the heavy weight process switcher is based on
113 * PCB_ESP. TD_SP is usually one pointer pushed relative to
114 * PCB_ESP.
115 */
116 movl P_THREAD(%ecx),%eax
117 pushl $cpu_heavy_restore
118 movl %esp,TD_SP(%eax)
119
120 /*
121 * Save debug regs if necessary
122 */
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123 movb PCB_FLAGS(%edx),%al
124 andb $PCB_DBREGS,%al
125 jz 1f /* no, skip over */
126 movl %dr7,%eax /* yes, do the save */
127 movl %eax,PCB_DR7(%edx)
128 andl $0x0000fc00, %eax /* disable all watchpoints */
129 movl %eax,%dr7
130 movl %dr6,%eax
131 movl %eax,PCB_DR6(%edx)
132 movl %dr3,%eax
133 movl %eax,PCB_DR3(%edx)
134 movl %dr2,%eax
135 movl %eax,PCB_DR2(%edx)
136 movl %dr1,%eax
137 movl %eax,PCB_DR1(%edx)
138 movl %dr0,%eax
139 movl %eax,PCB_DR0(%edx)
1401:
141
8ad65e08 142 /*
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143 * Save the FP state if we have used the FP. Note that calling
144 * npxsave will NULL out PCPU(npxthread).
8ad65e08 145 */
984263bc 146#if NNPX > 0
263e4574 147 movl P_THREAD(%ecx),%ecx
2954c92f 148 cmpl %ecx,PCPU(npxthread)
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149 jne 1f
150 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
151 pushl %edx
2954c92f 152 call npxsave /* do it in a big C function */
96728c05 153 addl $4,%esp
984263bc 1541:
af0bff84 155 /* %ecx,%edx trashed */
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156#endif /* NNPX > 0 */
157
84b592ba 158 /*
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159 * Switch to the next thread, which was passed as an argument
160 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
161 * the argument is at 8(%esp). Set the current thread, load the
162 * stack pointer, and 'ret' into the switch-restore function.
84b592ba 163 */
8ad65e08 164 movl 8(%esp),%eax
2954c92f 165 movl %eax,PCPU(curthread)
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166 movl TD_SP(%eax),%esp
167 ret
984263bc 168
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169/*
170 * cpu_exit_switch()
171 *
172 * The switch function is changed to this when a thread is going away
173 * for good. We have to ensure that the MMU state is not cached, and
174 * we don't bother saving the existing thread state before switching.
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175 *
176 * At this point we are in a critical section and this cpu owns the
177 * thread's token, which serves as an interlock until the switchout is
178 * complete.
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179 */
180ENTRY(cpu_exit_switch)
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181 /*
182 * Get us out of the vmspace
183 */
2954c92f 184 movl IdlePTD,%ecx
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185 movl %cr3,%eax
186 cmpl %ecx,%eax
187 je 1f
188 movl %ecx,%cr3
984263bc 1891:
5fb1f500 190 movl PCPU(curthread),%ecx
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191 /*
192 * Switch to the next thread.
193 */
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194 cli
195 movl 4(%esp),%eax
2954c92f 196 movl %eax,PCPU(curthread)
8ad65e08 197 movl TD_SP(%eax),%esp
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198
199 /*
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200 * We are now the next thread, set the exited flag and wakeup
201 * any waiters.
ae8050a4 202 */
99df837e 203 orl $TDF_EXITED,TD_FLAGS(%ecx)
8a8d5d85 204#if 0 /* YYY MP lock may not be held by new target */
ae8050a4 205 pushl %eax
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206 pushl %ecx /* wakeup(oldthread) */
207 call wakeup
ae8050a4 208 addl $4,%esp
99df837e 209 popl %eax /* note: next thread expects curthread in %eax */
8a8d5d85 210#endif
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211
212 /*
213 * Restore the next thread's state and resume it. Note: the
214 * restore function assumes that the next thread's address is
215 * in %eax.
216 */
8ad65e08 217 ret
984263bc 218
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219/*
220 * cpu_heavy_restore() (current thread in %eax on entry)
221 *
222 * Restore the thread after an LWKT switch. This entry is normally
223 * called via the LWKT switch restore function, which was pulled
224 * off the thread stack and jumped to.
225 *
226 * This entry is only called if the thread was previously saved
227 * using cpu_heavy_switch() (the heavy weight process thread switcher).
228 *
229 * YYY theoretically we do not have to restore everything here, a lot
230 * of this junk can wait until we return to usermode. But for now
231 * we restore everything.
232 *
233 * YYY STI/CLI sequencing.
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234 * YYY the PCB crap is really crap, it makes startup a bitch because
235 * we can't switch away.
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236 *
237 * YYY note: spl check is done in mi_switch when it splx()'s.
8ad65e08 238 */
26a0694b 239
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240ENTRY(cpu_heavy_restore)
241 /* interrupts are disabled */
8f41e33b 242 movl TD_PCB(%eax),%edx
8ad65e08 243 movl TD_PROC(%eax),%ecx
984263bc 244#ifdef DIAGNOSTIC
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245 cmpb $SRUN,P_STAT(%ecx)
246 jne badsw2
247#endif
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248
249#if defined(SWTCH_OPTIM_STATS)
250 incl _swtch_optim_stats
251#endif
8ad65e08 252 /*
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253 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
254 * safely test/reload %cr3 until after we have set the bit in the
255 * pmap (remember, we do not hold the MP lock in the switch code).
8ad65e08 256 */
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257 movl P_VMSPACE(%ecx), %ebx
258 movl PCPU(cpuid), %eax
259 MPLOCKED btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
260
261 /*
262 * Restore the MMU address space. If it is the same as the last
263 * thread we don't have to invalidate the tlb (i.e. reload cr3).
264 * YYY which naturally also means that the PM_ACTIVE bit had better
265 * already have been set before we set it above, check? YYY
266 */
267 movl %cr3,%eax
268 movl PCB_CR3(%edx),%ebx
269 cmpl %eax,%ebx
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270 je 4f
271#if defined(SWTCH_OPTIM_STATS)
272 decl _swtch_optim_stats
273 incl _tlb_flush_count
274#endif
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275 movl %ebx,%cr3
2764:
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277 /*
278 * Deal with the PCB extension, restore the private tss
279 */
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280 movl PCB_EXT(%edx),%edi /* check for a PCB extension */
281 movl $1,%ebx /* maybe mark use of a private tss */
282 testl %edi,%edi
283 jnz 2f
984263bc 284
b7c628e4 285 /*
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286 * Going back to the common_tss. We may need to update TSS_ESP0
287 * which sets the top of the supervisor stack when entering from
288 * usermode. The PCB is at the top of the stack but we need another
289 * 16 bytes to take vm86 into account.
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290 */
291 leal -16(%edx),%ebx
2954c92f 292 movl %ebx, PCPU(common_tss) + TSS_ESP0
984263bc 293
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294 cmpl $0,PCPU(private_tss) /* don't have to reload if */
295 je 3f /* already using the common TSS */
296
297 subl %ebx,%ebx /* unmark use of private tss */
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298
299 /*
a2a5ad0d 300 * Get the address of the common TSS descriptor for the ltr.
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301 * There is no way to get the address of a segment-accessed variable
302 * so we store a self-referential pointer at the base of the per-cpu
303 * data area and add the appropriate offset.
304 */
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305 movl $gd_common_tssd, %edi
306 addl %fs:0, %edi
17a9f566 307
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308 /*
309 * Move the correct TSS descriptor into the GDT slot, then reload
a2a5ad0d 310 * ltr.
8ad65e08 311 */
984263bc 3122:
a2a5ad0d 313 movl %ebx,PCPU(private_tss) /* mark/unmark private tss */
2954c92f 314 movl PCPU(tss_gdt), %ebx /* entry in GDT */
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315 movl 0(%edi), %eax
316 movl %eax, 0(%ebx)
317 movl 4(%edi), %eax
318 movl %eax, 4(%ebx)
319 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
320 ltr %si
8ad65e08 321
984263bc 3223:
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323 /*
324 * Restore general registers.
325 */
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326 movl PCB_EBX(%edx),%ebx
327 movl PCB_ESP(%edx),%esp
328 movl PCB_EBP(%edx),%ebp
329 movl PCB_ESI(%edx),%esi
330 movl PCB_EDI(%edx),%edi
331 movl PCB_EIP(%edx),%eax
332 movl %eax,(%esp)
333
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334 /*
335 * Restore the user LDT if we have one
336 */
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337#ifdef USER_LDT
338 cmpl $0, PCB_USERLDT(%edx)
339 jnz 1f
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340 movl _default_ldt,%eax
341 cmpl PCPU(currentldt),%eax
984263bc 342 je 2f
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343 lldt _default_ldt
344 movl %eax,PCPU(currentldt)
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345 jmp 2f
3461: pushl %edx
2954c92f 347 call set_user_ldt
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348 popl %edx
3492:
350#endif
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351 /*
352 * Restore the %gs segment register, which must be done after
353 * loading the user LDT. Since user processes can modify the
354 * register via procfs, this may result in a fault which is
355 * detected by checking the fault address against cpu_switch_load_gs
356 * in i386/i386/trap.c
357 */
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358 .globl cpu_switch_load_gs
359cpu_switch_load_gs:
360 movl PCB_GS(%edx),%gs
361
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362 /*
363 * Restore the DEBUG register state if necessary.
364 */
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365 movb PCB_FLAGS(%edx),%al
366 andb $PCB_DBREGS,%al
367 jz 1f /* no, skip over */
368 movl PCB_DR6(%edx),%eax /* yes, do the restore */
369 movl %eax,%dr6
370 movl PCB_DR3(%edx),%eax
371 movl %eax,%dr3
372 movl PCB_DR2(%edx),%eax
373 movl %eax,%dr2
374 movl PCB_DR1(%edx),%eax
375 movl %eax,%dr1
376 movl PCB_DR0(%edx),%eax
377 movl %eax,%dr0
378 movl %dr7,%eax /* load dr7 so as not to disturb */
379 andl $0x0000fc00,%eax /* reserved bits */
380 pushl %ebx
381 movl PCB_DR7(%edx),%ebx
382 andl $~0x0000fc00,%ebx
383 orl %ebx,%eax
384 popl %ebx
385 movl %eax,%dr7
3861:
387
8ad65e08 388 sti /* XXX */
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389 ret
390
391CROSSJUMPTARGET(sw1a)
392
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393badsw2:
394 pushl $sw0_2
2954c92f 395 call panic
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396
397sw0_2: .asciz "cpu_switch: not SRUN"
0cfcada1 398
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399/*
400 * savectx(pcb)
401 * Update pcb, saving current processor state.
402 */
403ENTRY(savectx)
404 /* fetch PCB */
405 movl 4(%esp),%ecx
406
407 /* caller's return address - child won't execute this routine */
408 movl (%esp),%eax
409 movl %eax,PCB_EIP(%ecx)
410
411 movl %cr3,%eax
412 movl %eax,PCB_CR3(%ecx)
413
414 movl %ebx,PCB_EBX(%ecx)
415 movl %esp,PCB_ESP(%ecx)
416 movl %ebp,PCB_EBP(%ecx)
417 movl %esi,PCB_ESI(%ecx)
418 movl %edi,PCB_EDI(%ecx)
419 movl %gs,PCB_GS(%ecx)
420
421#if NNPX > 0
422 /*
af0bff84 423 * If npxthread == NULL, then the npx h/w state is irrelevant and the
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424 * state had better already be in the pcb. This is true for forks
425 * but not for dumps (the old book-keeping with FP flags in the pcb
426 * always lost for dumps because the dump pcb has 0 flags).
427 *
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428 * If npxthread != NULL, then we have to save the npx h/w state to
429 * npxthread's pcb and copy it to the requested pcb, or save to the
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430 * requested pcb and reload. Copying is easier because we would
431 * have to handle h/w bugs for reloading. We used to lose the
432 * parent's npx state for forks by forgetting to reload.
433 */
2954c92f 434 movl PCPU(npxthread),%eax
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435 testl %eax,%eax
436 je 1f
437
438 pushl %ecx
b7c628e4 439 movl TD_PCB(%eax),%eax
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440 leal PCB_SAVEFPU(%eax),%eax
441 pushl %eax
442 pushl %eax
2954c92f 443 call npxsave
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444 addl $4,%esp
445 popl %eax
446 popl %ecx
447
448 pushl $PCB_SAVEFPU_SIZE
449 leal PCB_SAVEFPU(%ecx),%ecx
450 pushl %ecx
451 pushl %eax
2954c92f 452 call bcopy
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453 addl $12,%esp
454#endif /* NNPX > 0 */
455
4561:
457 ret
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458
459/*
a2a5ad0d 460 * cpu_idle_restore() (current thread in %eax on entry) (one-time execution)
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461 *
462 * Don't bother setting up any regs other then %ebp so backtraces
463 * don't die. This restore function is used to bootstrap into the
464 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
465 * switching.
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466 *
467 * If we are an AP we have to call ap_init() before jumping to
468 * cpu_idle(). ap_init() will synchronize with the BP and finish
469 * setting up various ncpu-dependant globaldata fields. This may
470 * happen on UP as well as SMP if we happen to be simulating multiple
471 * cpus.
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472 */
473ENTRY(cpu_idle_restore)
a2a5ad0d 474 movl IdlePTD,%ecx
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475 movl $0,%ebp
476 pushl $0
a2a5ad0d 477 movl %ecx,%cr3
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478#ifdef SMP
479 cmpl $0,PCPU(cpuid)
480 je 1f
481 call ap_init
4821:
483#endif
ef0fdad1 484 sti
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485 jmp cpu_idle
486
0cfcada1 487/*
a2a5ad0d 488 * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
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489 *
490 * Don't bother setting up any regs other then %ebp so backtraces
491 * don't die. This restore function is used to bootstrap into an
492 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
493 * after this.
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494 *
495 * Since all of our context is on the stack we are reentrant and
496 * we can release our critical section and enable interrupts early.
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497 */
498ENTRY(cpu_kthread_restore)
a2a5ad0d 499 movl IdlePTD,%ecx
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500 movl TD_PCB(%eax),%ebx
501 movl $0,%ebp
a2a5ad0d 502 movl %ecx,%cr3
26a0694b 503 subl $TDPRI_CRIT,TD_PRI(%eax)
ef0fdad1 504 sti
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505 popl %edx /* kthread exit function */
506 pushl PCB_EBX(%ebx) /* argument to ESI function */
507 pushl %edx /* set exit func as return address */
508 movl PCB_ESI(%ebx),%eax
509 jmp *%eax
510
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511/*
512 * cpu_lwkt_switch()
513 *
514 * Standard LWKT switching function. Only non-scratch registers are
515 * saved and we don't bother with the MMU state or anything else.
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516 *
517 * This function is always called while in a critical section.
518 *
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519 * YYY BGL, SPL
520 */
521ENTRY(cpu_lwkt_switch)
522 movl 4(%esp),%eax
523 pushl %ebp
524 pushl %ebx
525 pushl %esi
526 pushl %edi
527 pushfl
2954c92f 528 movl PCPU(curthread),%ecx
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529 pushl $cpu_lwkt_restore
530 cli
531 movl %esp,TD_SP(%ecx)
2954c92f 532 movl %eax,PCPU(curthread)
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533 movl TD_SP(%eax),%esp
534 ret
535
536/*
26a0694b 537 * cpu_lwkt_restore() (current thread in %eax on entry)
8ad65e08 538 *
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539 * Standard LWKT restore function. This function is always called
540 * while in a critical section.
541 *
542 * Warning: due to preemption the restore function can be used to
543 * 'return' to the original thread. Interrupt disablement must be
544 * protected through the switch so we cannot run splz here.
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545 *
546 * YYY we theoretically do not need to load IdlePTD into cr3, but if
547 * so we need a way to detect when the PTD we are using is being
548 * deleted due to a process exiting.
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549 */
550ENTRY(cpu_lwkt_restore)
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551 movl IdlePTD,%ecx /* YYY borrow but beware desched/cpuchg/exit */
552 movl %cr3,%eax
553 cmpl %ecx,%eax
554 je 1f
555 movl %ecx,%cr3
5561:
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557 popfl
558 popl %edi
559 popl %esi
560 popl %ebx
561 popl %ebp
562 ret
563