MP Implmentation 3/4: MAJOR progress on SMP, full userland MP is now working!
[dragonfly.git] / sys / platform / pc32 / i386 / globals.s
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1/*-
2 * Copyright (c) Peter Wemm <peter@netplex.com.au>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/i386/i386/globals.s,v 1.13.2.1 2000/05/16 06:58:06 dillon Exp $
a2a5ad0d 27 * $DragonFly: src/sys/platform/pc32/i386/globals.s,v 1.16 2003/07/10 04:47:53 dillon Exp $
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28 */
29
30#include "opt_user_ldt.h"
31
32#include <machine/asmacros.h>
33#include <machine/pmap.h>
34
35#include "assym.s"
36
984263bc 37 /*
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38 * Define the layout of the per-cpu address space. This is
39 * "constructed" in locore.s on the BSP and in mp_machdep.c for
40 * each AP. DO NOT REORDER THESE WITHOUT UPDATING THE REST!
41 *
42 * On UP the per-cpu addrses space is simply placed in the data
43 * segment.
984263bc 44 */
8ad65e08 45 .data
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46 .globl CPU_prvspace, lapic
47 .set CPU_prvspace,(MPPTDI << PDRSHIFT)
48 .set lapic,CPU_prvspace + (NPTEPG-1) * PAGE_SIZE
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49
50 .globl gd_idlestack,gd_idlestack_top
51 .set gd_idlestack,PS_IDLESTACK
52 .set gd_idlestack_top,PS_IDLESTACK_TOP
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53
54 .globl globaldata
55 .set globaldata,0
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56
57 /*
58 * Define layout of the global data. On SMP this lives in
59 * the per-cpu address space, otherwise it's in the data segment.
60 */
f1d1c3fa 61 .globl gd_curthread, gd_npxthread, gd_astpending, gd_reqpri
a2a5ad0d 62 .globl gd_common_tss
84b592ba 63 .set gd_curthread,globaldata + GD_CURTHREAD
984263bc 64 .set gd_astpending,globaldata + GD_ASTPENDING
f1d1c3fa 65 .set gd_reqpri,globaldata + GD_REQPRI
af0bff84 66 .set gd_npxthread,globaldata + GD_NPXTHREAD
984263bc 67 .set gd_common_tss,globaldata + GD_COMMON_TSS
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68
69 .globl gd_common_tssd, gd_tss_gdt
70 .set gd_common_tssd,globaldata + GD_COMMON_TSSD
71 .set gd_tss_gdt,globaldata + GD_TSS_GDT
72
73#ifdef USER_LDT
74 .globl gd_currentldt
75 .set gd_currentldt,globaldata + GD_CURRENTLDT
76#endif
77
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78 /*
79 * The BSP version of these get setup in locore.s and pmap.c, while
80 * the AP versions are setup in mp_machdep.c.
81 */
d0e06f83 82 .globl gd_cpuid, gd_cpu_lockid, gd_other_cpus
ef0fdad1 83 .globl gd_ss_eflags, gd_intr_nesting_level
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84 .globl gd_CMAP1, gd_CMAP2, gd_CMAP3, gd_PMAP1
85 .globl gd_CADDR1, gd_CADDR2, gd_CADDR3, gd_PADDR1
a2a5ad0d 86 .globl gd_ipending, gd_fpending, gd_cnt, gd_private_tss
984263bc 87
d0e06f83 88 .set gd_cpuid,globaldata + GD_CPUID
a2a5ad0d 89 .set gd_private_tss,globaldata + GD_PRIVATE_TSS
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90 .set gd_cpu_lockid,globaldata + GD_CPU_LOCKID
91 .set gd_other_cpus,globaldata + GD_OTHER_CPUS
92 .set gd_ss_eflags,globaldata + GD_SS_EFLAGS
ef0fdad1 93 .set gd_intr_nesting_level,globaldata + GD_INTR_NESTING_LEVEL
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94 .set gd_CMAP1,globaldata + GD_PRV_CMAP1
95 .set gd_CMAP2,globaldata + GD_PRV_CMAP2
96 .set gd_CMAP3,globaldata + GD_PRV_CMAP3
97 .set gd_PMAP1,globaldata + GD_PRV_PMAP1
98 .set gd_CADDR1,globaldata + GD_PRV_CADDR1
99 .set gd_CADDR2,globaldata + GD_PRV_CADDR2
100 .set gd_CADDR3,globaldata + GD_PRV_CADDR3
101 .set gd_PADDR1,globaldata + GD_PRV_PADDR1
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102 .set gd_fpending,globaldata + GD_FPENDING
103 .set gd_ipending,globaldata + GD_IPENDING
12e4aaff 104 .set gd_cnt,globaldata + GD_CNT
984263bc 105
17a9f566 106#if defined(APIC_IO)
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107 .globl lapic_eoi, lapic_svr, lapic_tpr, lapic_irr1, lapic_ver
108 .globl lapic_icr_lo,lapic_icr_hi,lapic_isr1
109/*
110 * Do not clutter our namespace with these unless we need them in other
111 * assembler code. The C code uses different definitions.
112 */
113#if 0
114 .globl lapic_id,lapic_ver,lapic_tpr,lapic_apr,lapic_ppr,lapic_eoi
115 .globl lapic_ldr,lapic_dfr,lapic_svr,lapic_isr,lapic_isr0
116 .globl lapic_isr2,lapic_isr3,lapic_isr4,lapic_isr5,lapic_isr6
117 .globl lapic_isr7,lapic_tmr,lapic_tmr0,lapic_tmr1,lapic_tmr2
118 .globl lapic_tmr3,lapic_tmr4,lapic_tmr5,lapic_tmr6,lapic_tmr7
119 .globl lapic_irr,lapic_irr0,lapic_irr1,lapic_irr2,lapic_irr3
120 .globl lapic_irr4,lapic_irr5,lapic_irr6,lapic_irr7,lapic_esr
121 .globl lapic_lvtt,lapic_pcint,lapic_lvt1
122 .globl lapic_lvt2,lapic_lvt3,lapic_ticr,lapic_tccr,lapic_tdcr
123#endif
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124 .set lapic_id, lapic + 0x020
125 .set lapic_ver, lapic + 0x030
126 .set lapic_tpr, lapic + 0x080
127 .set lapic_apr, lapic + 0x090
128 .set lapic_ppr, lapic + 0x0a0
129 .set lapic_eoi, lapic + 0x0b0
130 .set lapic_ldr, lapic + 0x0d0
131 .set lapic_dfr, lapic + 0x0e0
132 .set lapic_svr, lapic + 0x0f0
133 .set lapic_isr, lapic + 0x100
134 .set lapic_isr0, lapic + 0x100
135 .set lapic_isr1, lapic + 0x110
136 .set lapic_isr2, lapic + 0x120
137 .set lapic_isr3, lapic + 0x130
138 .set lapic_isr4, lapic + 0x140
139 .set lapic_isr5, lapic + 0x150
140 .set lapic_isr6, lapic + 0x160
141 .set lapic_isr7, lapic + 0x170
142 .set lapic_tmr, lapic + 0x180
143 .set lapic_tmr0, lapic + 0x180
144 .set lapic_tmr1, lapic + 0x190
145 .set lapic_tmr2, lapic + 0x1a0
146 .set lapic_tmr3, lapic + 0x1b0
147 .set lapic_tmr4, lapic + 0x1c0
148 .set lapic_tmr5, lapic + 0x1d0
149 .set lapic_tmr6, lapic + 0x1e0
150 .set lapic_tmr7, lapic + 0x1f0
151 .set lapic_irr, lapic + 0x200
152 .set lapic_irr0, lapic + 0x200
153 .set lapic_irr1, lapic + 0x210
154 .set lapic_irr2, lapic + 0x220
155 .set lapic_irr3, lapic + 0x230
156 .set lapic_irr4, lapic + 0x240
157 .set lapic_irr5, lapic + 0x250
158 .set lapic_irr6, lapic + 0x260
159 .set lapic_irr7, lapic + 0x270
160 .set lapic_esr, lapic + 0x280
161 .set lapic_icr_lo, lapic + 0x300
162 .set lapic_icr_hi, lapic + 0x310
163 .set lapic_lvtt, lapic + 0x320
164 .set lapic_pcint, lapic + 0x340
165 .set lapic_lvt1, lapic + 0x350
166 .set lapic_lvt2, lapic + 0x360
167 .set lapic_lvt3, lapic + 0x370
168 .set lapic_ticr, lapic + 0x380
169 .set lapic_tccr, lapic + 0x390
170 .set lapic_tdcr, lapic + 0x3e0
984263bc 171#endif
2954c92f 172