Add a signature for bootn0 so boot0cfg doesn't complain about it, even
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
a02705a9 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.58 2004/05/05 19:26:38 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
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57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
a722be49 76#include <sys/upcall.h>
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77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
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105#ifdef SMP
106#include <machine/smp.h>
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107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
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115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
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118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
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181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
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240int bootverbose = 0;
241vm_paddr_t Maxmem = 0;
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242long dumplo;
243
6ef943a3 244vm_paddr_t phys_avail[10];
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245
246/* must be 2 less so 0 0 can signal end of chunks */
247#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
248
249static vm_offset_t buffer_sva, buffer_eva;
250vm_offset_t clean_sva, clean_eva;
251static vm_offset_t pager_sva, pager_eva;
252static struct trapframe proc0_tf;
253
254static void
255cpu_startup(dummy)
256 void *dummy;
257{
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258 unsigned i;
259 caddr_t v;
cb840899 260 vm_offset_t minaddr;
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261 vm_offset_t maxaddr;
262 vm_size_t size = 0;
263 int firstaddr;
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264
265 if (boothowto & RB_VERBOSE)
266 bootverbose++;
267
268 /*
269 * Good {morning,afternoon,evening,night}.
270 */
271 printf("%s", version);
272 startrtclock();
273 printcpuinfo();
274 panicifcpuunsupported();
275#ifdef PERFMON
276 perfmon_init();
277#endif
6ef943a3 278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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279 /*
280 * Display any holes after the first chunk of extended memory.
281 */
282 if (bootverbose) {
283 int indx;
284
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 288
6ef943a3 289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
291 size1 / PAGE_SIZE);
292 }
293 }
294
295 /*
296 * Calculate callout wheel size
297 */
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
301 ;
302 callwheelmask = callwheelsize - 1;
303
304 /*
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
312 */
313
314 /*
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
318 */
319 firstaddr = 0;
320again:
321 v = (caddr_t)firstaddr;
322
323#define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325#define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
327
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
330
331 /*
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
337 * maxbcache bytes.
338 *
339 * factor represents the 1/4 x ram conversion.
340 */
341 if (nbuf == 0) {
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
344
345 nbuf = 50;
346 if (kbytes > 4096)
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
348 if (kbytes > 65536)
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
352 }
353
354 /*
355 * Do not allow the buffer_map to be more then 1/2 the size of the
356 * kernel_map.
357 */
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
359 (BKVASIZE * 2)) {
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
361 (BKVASIZE * 2);
362 printf("Warning: nbufs capped at %d\n", nbuf);
363 }
364
365 nswbuf = max(min(nbuf/4, 256), 16);
366#ifdef NSWBUF_MIN
367 if (nswbuf < NSWBUF_MIN)
368 nswbuf = NSWBUF_MIN;
369#endif
370#ifdef DIRECTIO
371 ffs_rawread_setup();
372#endif
373
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
376 v = bufhashinit(v);
377
378 /*
379 * End of first pass, size has been calculated so allocate memory
380 */
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
384 if (firstaddr == 0)
385 panic("startup: no room for tables");
386 goto again;
387 }
388
389 /*
390 * End of second pass, addresses have been assigned
391 */
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
394
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
398 (nbuf*BKVASIZE));
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
405
406 /*
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
409 */
410 {
411 vm_offset_t mb_map_size;
412
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
1870e334 415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_WAITOK);
984263bc 416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
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417 mb_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
418 mb_map_size);
984263bc 419 mb_map->system_map = 1;
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420 mbutl = (void *)mb_map->header.start;
421 mbute = (void *)mb_map->header.end;
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422 }
423
424 /*
425 * Initialize callouts
426 */
427 SLIST_INIT(&callfree);
428 for (i = 0; i < ncallout; i++) {
429 callout_init(&callout[i]);
430 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
431 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
432 }
433
434 for (i = 0; i < callwheelsize; i++) {
435 TAILQ_INIT(&callwheel[i]);
436 }
437
438#if defined(USERCONFIG)
439 userconfig();
440 cninit(); /* the preferred console may have changed */
441#endif
442
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443 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
444 ptoa(vmstats.v_free_count) / 1024);
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445
446 /*
447 * Set up buffers, so they can be used to read disk labels.
448 */
449 bufinit();
450 vm_pager_bufferinit();
451
452#ifdef SMP
453 /*
454 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
455 */
456 mp_start(); /* fire up the APs and APICs */
457 mp_announce();
458#endif /* SMP */
459 cpu_setregs();
460}
461
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462/*
463 * Send an interrupt to process.
464 *
465 * Stack is set up to allow sigcode stored
466 * at top to call routine, followed by kcall
467 * to sigreturn routine below. After sigreturn
468 * resets the signal mask, the stack, and the
469 * frame pointer, it returns to the user
470 * specified pc, psl.
471 */
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472void
473sendsig(catcher, sig, mask, code)
474 sig_t catcher;
475 int sig;
476 sigset_t *mask;
477 u_long code;
478{
479 struct proc *p = curproc;
480 struct trapframe *regs;
481 struct sigacts *psp = p->p_sigacts;
482 struct sigframe sf, *sfp;
483 int oonstack;
484
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485 regs = p->p_md.md_regs;
486 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
487
488 /* save user context */
489 bzero(&sf, sizeof(struct sigframe));
490 sf.sf_uc.uc_sigmask = *mask;
491 sf.sf_uc.uc_stack = p->p_sigstk;
492 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
493 sf.sf_uc.uc_mcontext.mc_gs = rgs();
494 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
495
496 /* Allocate and validate space for the signal handler context. */
497 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
498 SIGISMEMBER(psp->ps_sigonstack, sig)) {
499 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
500 p->p_sigstk.ss_size - sizeof(struct sigframe));
501 p->p_sigstk.ss_flags |= SS_ONSTACK;
502 }
503 else
504 sfp = (struct sigframe *)regs->tf_esp - 1;
505
506 /* Translate the signal is appropriate */
507 if (p->p_sysent->sv_sigtbl) {
508 if (sig <= p->p_sysent->sv_sigsize)
509 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
510 }
511
512 /* Build the argument list for the signal handler. */
513 sf.sf_signum = sig;
514 sf.sf_ucontext = (register_t)&sfp->sf_uc;
515 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
516 /* Signal handler installed with SA_SIGINFO. */
517 sf.sf_siginfo = (register_t)&sfp->sf_si;
518 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
519
520 /* fill siginfo structure */
521 sf.sf_si.si_signo = sig;
522 sf.sf_si.si_code = code;
523 sf.sf_si.si_addr = (void*)regs->tf_err;
524 }
525 else {
526 /* Old FreeBSD-style arguments. */
527 sf.sf_siginfo = code;
528 sf.sf_addr = regs->tf_err;
529 sf.sf_ahu.sf_handler = catcher;
530 }
531
532 /*
533 * If we're a vm86 process, we want to save the segment registers.
534 * We also change eflags to be our emulated eflags, not the actual
535 * eflags.
536 */
537 if (regs->tf_eflags & PSL_VM) {
538 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 539 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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540
541 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
542 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
543 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
544 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
545
546 if (vm86->vm86_has_vme == 0)
547 sf.sf_uc.uc_mcontext.mc_eflags =
548 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
549 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
550
551 /*
552 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
553 * syscalls made by the signal handler. This just avoids
554 * wasting time for our lazy fixup of such faults. PSL_NT
555 * does nothing in vm86 mode, but vm86 programs can set it
556 * almost legitimately in probes for old cpu types.
557 */
558 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
559 }
560
561 /*
562 * Copy the sigframe out to the user's stack.
563 */
564 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
565 /*
566 * Something is wrong with the stack pointer.
567 * ...Kill the process.
568 */
569 sigexit(p, SIGILL);
570 }
571
572 regs->tf_esp = (int)sfp;
573 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
574 regs->tf_eflags &= ~PSL_T;
575 regs->tf_cs = _ucodesel;
576 regs->tf_ds = _udatasel;
577 regs->tf_es = _udatasel;
578 regs->tf_fs = _udatasel;
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579 regs->tf_ss = _udatasel;
580}
581
582/*
65957d54 583 * sigreturn(ucontext_t *sigcntxp)
41c20dac 584 *
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585 * System call to cleanup state after a signal
586 * has been taken. Reset signal mask and
587 * stack state from context left by sendsig (above).
588 * Return to previous pc and psl as specified by
589 * context left by sendsig. Check carefully to
590 * make sure that the user has not modified the
591 * state to gain improper privileges.
592 */
593#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
594#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
595
984263bc 596int
41c20dac 597sigreturn(struct sigreturn_args *uap)
984263bc 598{
41c20dac 599 struct proc *p = curproc;
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600 struct trapframe *regs;
601 ucontext_t *ucp;
602 int cs, eflags;
603
604 ucp = uap->sigcntxp;
605
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606 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
607 return (EFAULT);
608
609 regs = p->p_md.md_regs;
610 eflags = ucp->uc_mcontext.mc_eflags;
611
612 if (eflags & PSL_VM) {
613 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
614 struct vm86_kernel *vm86;
615
616 /*
617 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
618 * set up the vm86 area, and we can't enter vm86 mode.
619 */
b7c628e4 620 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 621 return (EINVAL);
b7c628e4 622 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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623 if (vm86->vm86_inited == 0)
624 return (EINVAL);
625
626 /* go back to user mode if both flags are set */
627 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
628 trapsignal(p, SIGBUS, 0);
629
630 if (vm86->vm86_has_vme) {
631 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
632 (eflags & VME_USERCHANGE) | PSL_VM;
633 } else {
634 vm86->vm86_eflags = eflags; /* save VIF, VIP */
635 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
636 }
637 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
638 tf->tf_eflags = eflags;
639 tf->tf_vm86_ds = tf->tf_ds;
640 tf->tf_vm86_es = tf->tf_es;
641 tf->tf_vm86_fs = tf->tf_fs;
642 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
643 tf->tf_ds = _udatasel;
644 tf->tf_es = _udatasel;
645 tf->tf_fs = _udatasel;
646 } else {
647 /*
648 * Don't allow users to change privileged or reserved flags.
649 */
650 /*
651 * XXX do allow users to change the privileged flag PSL_RF.
652 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
653 * should sometimes set it there too. tf_eflags is kept in
654 * the signal context during signal handling and there is no
655 * other place to remember it, so the PSL_RF bit may be
656 * corrupted by the signal handler without us knowing.
657 * Corruption of the PSL_RF bit at worst causes one more or
658 * one less debugger trap, so allowing it is fairly harmless.
659 */
660 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
661 printf("sigreturn: eflags = 0x%x\n", eflags);
662 return(EINVAL);
663 }
664
665 /*
666 * Don't allow users to load a valid privileged %cs. Let the
667 * hardware check for invalid selectors, excess privilege in
668 * other selectors, invalid %eip's and invalid %esp's.
669 */
670 cs = ucp->uc_mcontext.mc_cs;
671 if (!CS_SECURE(cs)) {
672 printf("sigreturn: cs = 0x%x\n", cs);
673 trapsignal(p, SIGBUS, T_PROTFLT);
674 return(EINVAL);
675 }
676 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
677 }
678
679 if (ucp->uc_mcontext.mc_onstack & 1)
680 p->p_sigstk.ss_flags |= SS_ONSTACK;
681 else
682 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
683
684 p->p_sigmask = ucp->uc_sigmask;
685 SIG_CANTMASK(p->p_sigmask);
686 return(EJUSTRETURN);
687}
688
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689/*
690 * Stack frame on entry to function. %eax will contain the function vector,
691 * %ecx will contain the function data. flags, ecx, and eax will have
692 * already been pushed on the stack.
693 */
694struct upc_frame {
695 register_t eax;
696 register_t ecx;
0a455ac5 697 register_t edx;
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698 register_t flags;
699 register_t oldip;
700};
701
702void
703sendupcall(struct vmupcall *vu, int morepending)
704{
705 struct proc *p = curproc;
706 struct trapframe *regs;
707 struct upcall upcall;
708 struct upc_frame upc_frame;
6e58b5df 709 int crit_count = 0;
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710
711 /*
712 * Get the upcall data structure
713 */
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714 if (copyin(p->p_upcall, &upcall, sizeof(upcall)) ||
715 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
716 ) {
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717 vu->vu_pending = 0;
718 printf("bad upcall address\n");
719 return;
720 }
721
722 /*
723 * If the data structure is already marked pending or has a critical
724 * section count, mark the data structure as pending and return
725 * without doing an upcall. vu_pending is left set.
726 */
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727 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
728 if (upcall.upc_pending < vu->vu_pending) {
729 upcall.upc_pending = vu->vu_pending;
730 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
731 sizeof(upcall.upc_pending));
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732 }
733 return;
734 }
735
736 /*
737 * We can run this upcall now, clear vu_pending.
738 *
739 * Bump our critical section count and set or clear the
740 * user pending flag depending on whether more upcalls are
741 * pending. The user will be responsible for calling
742 * upc_dispatch(-1) to process remaining upcalls.
743 */
744 vu->vu_pending = 0;
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745 upcall.upc_pending = morepending;
746 crit_count += TDPRI_CRIT;
747 copyout(&upcall.upc_pending, &p->p_upcall->upc_pending,
748 sizeof(upcall.upc_pending));
749 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
750 sizeof(int));
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751
752 /*
753 * Construct a stack frame and issue the upcall
754 */
755 regs = p->p_md.md_regs;
756 upc_frame.eax = regs->tf_eax;
757 upc_frame.ecx = regs->tf_ecx;
0a455ac5 758 upc_frame.edx = regs->tf_edx;
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759 upc_frame.flags = regs->tf_eflags;
760 upc_frame.oldip = regs->tf_eip;
761 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
762 sizeof(upc_frame)) != 0) {
763 printf("bad stack on upcall\n");
764 } else {
765 regs->tf_eax = (register_t)vu->vu_func;
766 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 767 regs->tf_edx = (register_t)p->p_upcall;
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768 regs->tf_eip = (register_t)vu->vu_ctx;
769 regs->tf_esp -= sizeof(upc_frame);
770 }
771}
772
773/*
774 * fetchupcall occurs in the context of a system call, which means that
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775 * we have to return EJUSTRETURN in order to prevent eax and edx from
776 * being overwritten by the syscall return value.
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777 *
778 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
779 * and the function pointer in %eax.
780 */
781int
0a455ac5 782fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
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783{
784 struct upc_frame upc_frame;
785 struct proc *p;
786 struct trapframe *regs;
787 int error;
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788 struct upcall upcall;
789 int crit_count;
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790
791 p = curproc;
792 regs = p->p_md.md_regs;
793
6e58b5df 794 error = copyout(&morepending, &p->p_upcall->upc_pending, sizeof(int));
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795 if (error == 0) {
796 if (vu) {
797 /*
798 * This jumps us to the next ready context.
799 */
800 vu->vu_pending = 0;
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801 error = copyin(p->p_upcall, &upcall, sizeof(upcall));
802 crit_count = 0;
803 if (error == 0)
804 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
805 crit_count += TDPRI_CRIT;
a722be49 806 if (error == 0)
6e58b5df 807 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
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808 regs->tf_eax = (register_t)vu->vu_func;
809 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 810 regs->tf_edx = (register_t)p->p_upcall;
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811 regs->tf_eip = (register_t)vu->vu_ctx;
812 regs->tf_esp = (register_t)rsp;
813 } else {
814 /*
815 * This returns us to the originally interrupted code.
816 */
817 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
818 regs->tf_eax = upc_frame.eax;
819 regs->tf_ecx = upc_frame.ecx;
0a455ac5 820 regs->tf_edx = upc_frame.edx;
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821 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
822 (upc_frame.flags & PSL_USERCHANGE);
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823 regs->tf_eip = upc_frame.oldip;
824 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
825 }
826 }
827 if (error == 0)
828 error = EJUSTRETURN;
829 return(error);
830}
831
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832/*
833 * Machine dependent boot() routine
834 *
835 * I haven't seen anything to put here yet
836 * Possibly some stuff might be grafted back here from boot()
837 */
838void
839cpu_boot(int howto)
840{
841}
842
843/*
844 * Shutdown the CPU as much as possible
845 */
846void
847cpu_halt(void)
848{
849 for (;;)
850 __asm__ ("hlt");
851}
852
853/*
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854 * cpu_idle() represents the idle LWKT. You cannot return from this function
855 * (unless you want to blow things up!). Instead we look for runnable threads
856 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 857 *
26a0694b 858 * The main loop is entered with a critical section held, we must release
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859 * the critical section before doing anything else. lwkt_switch() will
860 * check for pending interrupts due to entering and exiting its own
861 * critical section.
26a0694b 862 *
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863 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
864 * to wake a HLTed cpu up. However, there are cases where the idlethread
865 * will be entered with the possibility that no IPI will occur and in such
866 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 867 */
96728c05 868static int cpu_idle_hlt = 1;
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869static int cpu_idle_hltcnt;
870static int cpu_idle_spincnt;
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871SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
872 &cpu_idle_hlt, 0, "Idle loop HLT enable");
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873SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
874 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
875SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
876 &cpu_idle_spincnt, 0, "Idle loop entry spins");
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877
878void
879cpu_idle(void)
880{
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881 struct thread *td = curthread;
882
26a0694b 883 crit_exit();
a2a5ad0d 884 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 885 for (;;) {
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886 /*
887 * See if there are any LWKTs ready to go.
888 */
8ad65e08 889 lwkt_switch();
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890
891 /*
892 * If we are going to halt call splz unconditionally after
893 * CLIing to catch any interrupt races. Note that we are
894 * at SPL0 and interrupts are enabled.
895 */
896 if (cpu_idle_hlt && !lwkt_runnable() &&
897 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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898 /*
899 * We must guarentee that hlt is exactly the instruction
900 * following the sti.
901 */
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902 __asm __volatile("cli");
903 splz();
8ad65e08 904 __asm __volatile("sti; hlt");
60f945af 905 ++cpu_idle_hltcnt;
8ad65e08 906 } else {
a2a5ad0d 907 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 908 splz();
8ad65e08 909 __asm __volatile("sti");
60f945af 910 ++cpu_idle_spincnt;
8ad65e08 911 }
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912 }
913}
914
915/*
916 * Clear registers on exec
917 */
918void
919setregs(p, entry, stack, ps_strings)
920 struct proc *p;
921 u_long entry;
922 u_long stack;
923 u_long ps_strings;
924{
925 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 926 struct pcb *pcb = p->p_thread->td_pcb;
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927
928 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
929 pcb->pcb_gs = _udatasel;
930 load_gs(_udatasel);
931
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932 /* was i386_user_cleanup() in NetBSD */
933 user_ldt_free(pcb);
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934
935 bzero((char *)regs, sizeof(struct trapframe));
936 regs->tf_eip = entry;
937 regs->tf_esp = stack;
938 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
939 regs->tf_ss = _udatasel;
940 regs->tf_ds = _udatasel;
941 regs->tf_es = _udatasel;
942 regs->tf_fs = _udatasel;
943 regs->tf_cs = _ucodesel;
944
945 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
946 regs->tf_ebx = ps_strings;
947
948 /*
949 * Reset the hardware debug registers if they were in use.
950 * They won't have any meaning for the newly exec'd process.
951 */
952 if (pcb->pcb_flags & PCB_DBREGS) {
953 pcb->pcb_dr0 = 0;
954 pcb->pcb_dr1 = 0;
955 pcb->pcb_dr2 = 0;
956 pcb->pcb_dr3 = 0;
957 pcb->pcb_dr6 = 0;
958 pcb->pcb_dr7 = 0;
b7c628e4 959 if (pcb == curthread->td_pcb) {
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960 /*
961 * Clear the debug registers on the running
962 * CPU, otherwise they will end up affecting
963 * the next process we switch to.
964 */
965 reset_dbregs();
966 }
967 pcb->pcb_flags &= ~PCB_DBREGS;
968 }
969
970 /*
971 * Initialize the math emulator (if any) for the current process.
972 * Actually, just clear the bit that says that the emulator has
973 * been initialized. Initialization is delayed until the process
974 * traps to the emulator (if it is done at all) mainly because
975 * emulators don't provide an entry point for initialization.
976 */
b7c628e4 977 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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978
979 /*
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980 * note: do not set CR0_TS here. npxinit() must do it after clearing
981 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
982 * in npxdna().
984263bc 983 */
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984 crit_enter();
985 load_cr0(rcr0() | CR0_MP);
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986
987#if NNPX > 0
988 /* Initialize the npx (if any) for the current process. */
989 npxinit(__INITIAL_NPXCW__);
990#endif
a02705a9 991 crit_exit();
984263bc 992
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993 /*
994 * note: linux emulator needs edx to be 0x0 on entry, which is
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995 * handled in execve simply by setting the 64 bit syscall
996 * return value to 0.
90b9818c 997 */
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998}
999
1000void
1001cpu_setregs(void)
1002{
1003 unsigned int cr0;
1004
1005 cr0 = rcr0();
1006 cr0 |= CR0_NE; /* Done by npxinit() */
1007 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1008#ifdef I386_CPU
1009 if (cpu_class != CPUCLASS_386)
1010#endif
1011 cr0 |= CR0_WP | CR0_AM;
1012 load_cr0(cr0);
1013 load_gs(_udatasel);
1014}
1015
1016static int
1017sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1018{
1019 int error;
1020 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1021 req);
1022 if (!error && req->newptr)
1023 resettodr();
1024 return (error);
1025}
1026
1027SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1028 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1029
1030SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1031 CTLFLAG_RW, &disable_rtc_set, 0, "");
1032
1033SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1034 CTLFLAG_RD, &bootinfo, bootinfo, "");
1035
1036SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1037 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1038
1039extern u_long bootdev; /* not a dev_t - encoding is different */
1040SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1041 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1042
1043/*
1044 * Initialize 386 and configure to run kernel
1045 */
1046
1047/*
1048 * Initialize segments & interrupt table
1049 */
1050
1051int _default_ldt;
1052union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1053static struct gate_descriptor idt0[NIDT];
1054struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1055union descriptor ldt[NLDT]; /* local descriptor table */
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MD
1056
1057/* table descriptors - used to load tables by cpu */
984263bc 1058struct region_descriptor r_gdt, r_idt;
984263bc 1059
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MD
1060#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1061extern int has_f00f_bug;
1062#endif
1063
1064static struct i386tss dblfault_tss;
1065static char dblfault_stack[PAGE_SIZE];
1066
1067extern struct user *proc0paddr;
1068
1069
1070/* software prototypes -- in more palatable form */
1071struct soft_segment_descriptor gdt_segs[] = {
1072/* GNULL_SEL 0 Null Descriptor */
1073{ 0x0, /* segment base address */
1074 0x0, /* length */
1075 0, /* segment type */
1076 0, /* segment descriptor priority level */
1077 0, /* segment descriptor present */
1078 0, 0,
1079 0, /* default 32 vs 16 bit size */
1080 0 /* limit granularity (byte/page units)*/ },
1081/* GCODE_SEL 1 Code Descriptor for kernel */
1082{ 0x0, /* segment base address */
1083 0xfffff, /* length - all address space */
1084 SDT_MEMERA, /* segment type */
1085 0, /* segment descriptor priority level */
1086 1, /* segment descriptor present */
1087 0, 0,
1088 1, /* default 32 vs 16 bit size */
1089 1 /* limit granularity (byte/page units)*/ },
1090/* GDATA_SEL 2 Data Descriptor for kernel */
1091{ 0x0, /* segment base address */
1092 0xfffff, /* length - all address space */
1093 SDT_MEMRWA, /* segment type */
1094 0, /* segment descriptor priority level */
1095 1, /* segment descriptor present */
1096 0, 0,
1097 1, /* default 32 vs 16 bit size */
1098 1 /* limit granularity (byte/page units)*/ },
1099/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1100{ 0x0, /* segment base address */
1101 0xfffff, /* length - all address space */
1102 SDT_MEMRWA, /* segment type */
1103 0, /* segment descriptor priority level */
1104 1, /* segment descriptor present */
1105 0, 0,
1106 1, /* default 32 vs 16 bit size */
1107 1 /* limit granularity (byte/page units)*/ },
1108/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1109{
1110 0x0, /* segment base address */
1111 sizeof(struct i386tss)-1,/* length - all address space */
1112 SDT_SYS386TSS, /* segment type */
1113 0, /* segment descriptor priority level */
1114 1, /* segment descriptor present */
1115 0, 0,
1116 0, /* unused - default 32 vs 16 bit size */
1117 0 /* limit granularity (byte/page units)*/ },
1118/* GLDT_SEL 5 LDT Descriptor */
1119{ (int) ldt, /* segment base address */
1120 sizeof(ldt)-1, /* length - all address space */
1121 SDT_SYSLDT, /* segment type */
1122 SEL_UPL, /* segment descriptor priority level */
1123 1, /* segment descriptor present */
1124 0, 0,
1125 0, /* unused - default 32 vs 16 bit size */
1126 0 /* limit granularity (byte/page units)*/ },
1127/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1128{ (int) ldt, /* segment base address */
1129 (512 * sizeof(union descriptor)-1), /* length */
1130 SDT_SYSLDT, /* segment type */
1131 0, /* segment descriptor priority level */
1132 1, /* segment descriptor present */
1133 0, 0,
1134 0, /* unused - default 32 vs 16 bit size */
1135 0 /* limit granularity (byte/page units)*/ },
1136/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1137{ 0x0, /* segment base address */
1138 0x0, /* length - all address space */
1139 0, /* segment type */
1140 0, /* segment descriptor priority level */
1141 0, /* segment descriptor present */
1142 0, 0,
1143 0, /* default 32 vs 16 bit size */
1144 0 /* limit granularity (byte/page units)*/ },
1145/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1146{ 0x400, /* segment base address */
1147 0xfffff, /* length */
1148 SDT_MEMRWA, /* segment type */
1149 0, /* segment descriptor priority level */
1150 1, /* segment descriptor present */
1151 0, 0,
1152 1, /* default 32 vs 16 bit size */
1153 1 /* limit granularity (byte/page units)*/ },
1154/* GPANIC_SEL 9 Panic Tss Descriptor */
1155{ (int) &dblfault_tss, /* segment base address */
1156 sizeof(struct i386tss)-1,/* length - all address space */
1157 SDT_SYS386TSS, /* segment type */
1158 0, /* segment descriptor priority level */
1159 1, /* segment descriptor present */
1160 0, 0,
1161 0, /* unused - default 32 vs 16 bit size */
1162 0 /* limit granularity (byte/page units)*/ },
1163/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1164{ 0, /* segment base address (overwritten) */
1165 0xfffff, /* length */
1166 SDT_MEMERA, /* segment type */
1167 0, /* segment descriptor priority level */
1168 1, /* segment descriptor present */
1169 0, 0,
1170 0, /* default 32 vs 16 bit size */
1171 1 /* limit granularity (byte/page units)*/ },
1172/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1173{ 0, /* segment base address (overwritten) */
1174 0xfffff, /* length */
1175 SDT_MEMERA, /* segment type */
1176 0, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1178 0, 0,
1179 0, /* default 32 vs 16 bit size */
1180 1 /* limit granularity (byte/page units)*/ },
1181/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1182{ 0, /* segment base address (overwritten) */
1183 0xfffff, /* length */
1184 SDT_MEMRWA, /* segment type */
1185 0, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1187 0, 0,
1188 1, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1191{ 0, /* segment base address (overwritten) */
1192 0xfffff, /* length */
1193 SDT_MEMRWA, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1196 0, 0,
1197 0, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1200{ 0, /* segment base address (overwritten) */
1201 0xfffff, /* length */
1202 SDT_MEMRWA, /* segment type */
1203 0, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1205 0, 0,
1206 0, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208};
1209
1210static struct soft_segment_descriptor ldt_segs[] = {
1211 /* Null Descriptor - overwritten by call gate */
1212{ 0x0, /* segment base address */
1213 0x0, /* length - all address space */
1214 0, /* segment type */
1215 0, /* segment descriptor priority level */
1216 0, /* segment descriptor present */
1217 0, 0,
1218 0, /* default 32 vs 16 bit size */
1219 0 /* limit granularity (byte/page units)*/ },
1220 /* Null Descriptor - overwritten by call gate */
1221{ 0x0, /* segment base address */
1222 0x0, /* length - all address space */
1223 0, /* segment type */
1224 0, /* segment descriptor priority level */
1225 0, /* segment descriptor present */
1226 0, 0,
1227 0, /* default 32 vs 16 bit size */
1228 0 /* limit granularity (byte/page units)*/ },
1229 /* Null Descriptor - overwritten by call gate */
1230{ 0x0, /* segment base address */
1231 0x0, /* length - all address space */
1232 0, /* segment type */
1233 0, /* segment descriptor priority level */
1234 0, /* segment descriptor present */
1235 0, 0,
1236 0, /* default 32 vs 16 bit size */
1237 0 /* limit granularity (byte/page units)*/ },
1238 /* Code Descriptor for user */
1239{ 0x0, /* segment base address */
1240 0xfffff, /* length - all address space */
1241 SDT_MEMERA, /* segment type */
1242 SEL_UPL, /* segment descriptor priority level */
1243 1, /* segment descriptor present */
1244 0, 0,
1245 1, /* default 32 vs 16 bit size */
1246 1 /* limit granularity (byte/page units)*/ },
1247 /* Null Descriptor - overwritten by call gate */
1248{ 0x0, /* segment base address */
1249 0x0, /* length - all address space */
1250 0, /* segment type */
1251 0, /* segment descriptor priority level */
1252 0, /* segment descriptor present */
1253 0, 0,
1254 0, /* default 32 vs 16 bit size */
1255 0 /* limit granularity (byte/page units)*/ },
1256 /* Data Descriptor for user */
1257{ 0x0, /* segment base address */
1258 0xfffff, /* length - all address space */
1259 SDT_MEMRWA, /* segment type */
1260 SEL_UPL, /* segment descriptor priority level */
1261 1, /* segment descriptor present */
1262 0, 0,
1263 1, /* default 32 vs 16 bit size */
1264 1 /* limit granularity (byte/page units)*/ },
1265};
1266
1267void
1268setidt(idx, func, typ, dpl, selec)
1269 int idx;
1270 inthand_t *func;
1271 int typ;
1272 int dpl;
1273 int selec;
1274{
1275 struct gate_descriptor *ip;
1276
1277 ip = idt + idx;
1278 ip->gd_looffset = (int)func;
1279 ip->gd_selector = selec;
1280 ip->gd_stkcpy = 0;
1281 ip->gd_xx = 0;
1282 ip->gd_type = typ;
1283 ip->gd_dpl = dpl;
1284 ip->gd_p = 1;
1285 ip->gd_hioffset = ((int)func)>>16 ;
1286}
1287
1288#define IDTVEC(name) __CONCAT(X,name)
1289
1290extern inthand_t
1291 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1292 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1293 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1294 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1295 IDTVEC(xmm), IDTVEC(syscall),
1296 IDTVEC(rsvd0);
a64ba182
MD
1297extern inthand_t
1298 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1299
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MD
1300#ifdef DEBUG_INTERRUPTS
1301extern inthand_t *Xrsvdary[256];
1302#endif
1303
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MD
1304void
1305sdtossd(sd, ssd)
1306 struct segment_descriptor *sd;
1307 struct soft_segment_descriptor *ssd;
1308{
1309 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1310 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1311 ssd->ssd_type = sd->sd_type;
1312 ssd->ssd_dpl = sd->sd_dpl;
1313 ssd->ssd_p = sd->sd_p;
1314 ssd->ssd_def32 = sd->sd_def32;
1315 ssd->ssd_gran = sd->sd_gran;
1316}
1317
1318#define PHYSMAP_SIZE (2 * 8)
1319
1320/*
1321 * Populate the (physmap) array with base/bound pairs describing the
1322 * available physical memory in the system, then test this memory and
1323 * build the phys_avail array describing the actually-available memory.
1324 *
1325 * If we cannot accurately determine the physical memory map, then use
1326 * value from the 0xE801 call, and failing that, the RTC.
1327 *
1328 * Total memory size may be set by the kernel environment variable
1329 * hw.physmem or the compile-time define MAXMEM.
1330 */
1331static void
1332getmemsize(int first)
1333{
1334 int i, physmap_idx, pa_indx;
1335 int hasbrokenint12;
1336 u_int basemem, extmem;
1337 struct vm86frame vmf;
1338 struct vm86context vmc;
1339 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1340 pt_entry_t *pte;
984263bc
MD
1341 const char *cp;
1342 struct {
1343 u_int64_t base;
1344 u_int64_t length;
1345 u_int32_t type;
1346 } *smap;
1347
1348 hasbrokenint12 = 0;
1349 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1350 bzero(&vmf, sizeof(struct vm86frame));
1351 bzero(physmap, sizeof(physmap));
1352 basemem = 0;
1353
1354 /*
1355 * Some newer BIOSes has broken INT 12H implementation which cause
1356 * kernel panic immediately. In this case, we need to scan SMAP
1357 * with INT 15:E820 first, then determine base memory size.
1358 */
1359 if (hasbrokenint12) {
1360 goto int15e820;
1361 }
1362
1363 /*
1364 * Perform "base memory" related probes & setup
1365 */
1366 vm86_intcall(0x12, &vmf);
1367 basemem = vmf.vmf_ax;
1368 if (basemem > 640) {
1369 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1370 basemem);
1371 basemem = 640;
1372 }
1373
1374 /*
1375 * XXX if biosbasemem is now < 640, there is a `hole'
1376 * between the end of base memory and the start of
1377 * ISA memory. The hole may be empty or it may
1378 * contain BIOS code or data. Map it read/write so
1379 * that the BIOS can write to it. (Memory from 0 to
1380 * the physical end of the kernel is mapped read-only
1381 * to begin with and then parts of it are remapped.
1382 * The parts that aren't remapped form holes that
1383 * remain read-only and are unused by the kernel.
1384 * The base memory area is below the physical end of
1385 * the kernel and right now forms a read-only hole.
1386 * The part of it from PAGE_SIZE to
1387 * (trunc_page(biosbasemem * 1024) - 1) will be
1388 * remapped and used by the kernel later.)
1389 *
1390 * This code is similar to the code used in
1391 * pmap_mapdev, but since no memory needs to be
1392 * allocated we simply change the mapping.
1393 */
1394 for (pa = trunc_page(basemem * 1024);
1395 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1396 pte = vtopte(pa + KERNBASE);
984263bc
MD
1397 *pte = pa | PG_RW | PG_V;
1398 }
1399
1400 /*
1401 * if basemem != 640, map pages r/w into vm86 page table so
1402 * that the bios can scribble on it.
1403 */
b5b32410 1404 pte = vm86paddr;
984263bc
MD
1405 for (i = basemem / 4; i < 160; i++)
1406 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1407
1408int15e820:
1409 /*
1410 * map page 1 R/W into the kernel page table so we can use it
1411 * as a buffer. The kernel will unmap this page later.
1412 */
b5b32410 1413 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1414 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1415
1416 /*
1417 * get memory map with INT 15:E820
1418 */
1419#define SMAPSIZ sizeof(*smap)
1420#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1421
1422 vmc.npages = 0;
1423 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1424 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1425
1426 physmap_idx = 0;
1427 vmf.vmf_ebx = 0;
1428 do {
1429 vmf.vmf_eax = 0xE820;
1430 vmf.vmf_edx = SMAP_SIG;
1431 vmf.vmf_ecx = SMAPSIZ;
1432 i = vm86_datacall(0x15, &vmf, &vmc);
1433 if (i || vmf.vmf_eax != SMAP_SIG)
1434 break;
1435 if (boothowto & RB_VERBOSE)
1436 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1437 smap->type,
1438 *(u_int32_t *)((char *)&smap->base + 4),
1439 (u_int32_t)smap->base,
1440 *(u_int32_t *)((char *)&smap->length + 4),
1441 (u_int32_t)smap->length);
1442
1443 if (smap->type != 0x01)
1444 goto next_run;
1445
1446 if (smap->length == 0)
1447 goto next_run;
1448
1449 if (smap->base >= 0xffffffff) {
1450 printf("%uK of memory above 4GB ignored\n",
1451 (u_int)(smap->length / 1024));
1452 goto next_run;
1453 }
1454
1455 for (i = 0; i <= physmap_idx; i += 2) {
1456 if (smap->base < physmap[i + 1]) {
1457 if (boothowto & RB_VERBOSE)
1458 printf(
1459 "Overlapping or non-montonic memory region, ignoring second region\n");
1460 goto next_run;
1461 }
1462 }
1463
1464 if (smap->base == physmap[physmap_idx + 1]) {
1465 physmap[physmap_idx + 1] += smap->length;
1466 goto next_run;
1467 }
1468
1469 physmap_idx += 2;
1470 if (physmap_idx == PHYSMAP_SIZE) {
1471 printf(
1472 "Too many segments in the physical address map, giving up\n");
1473 break;
1474 }
1475 physmap[physmap_idx] = smap->base;
1476 physmap[physmap_idx + 1] = smap->base + smap->length;
1477next_run:
6b08710e 1478 ; /* fix GCC3.x warning */
984263bc
MD
1479 } while (vmf.vmf_ebx != 0);
1480
1481 /*
1482 * Perform "base memory" related probes & setup based on SMAP
1483 */
1484 if (basemem == 0) {
1485 for (i = 0; i <= physmap_idx; i += 2) {
1486 if (physmap[i] == 0x00000000) {
1487 basemem = physmap[i + 1] / 1024;
1488 break;
1489 }
1490 }
1491
1492 if (basemem == 0) {
1493 basemem = 640;
1494 }
1495
1496 if (basemem > 640) {
1497 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1498 basemem);
1499 basemem = 640;
1500 }
1501
1502 for (pa = trunc_page(basemem * 1024);
1503 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1504 pte = vtopte(pa + KERNBASE);
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MD
1505 *pte = pa | PG_RW | PG_V;
1506 }
1507
b5b32410 1508 pte = vm86paddr;
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MD
1509 for (i = basemem / 4; i < 160; i++)
1510 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1511 }
1512
1513 if (physmap[1] != 0)
1514 goto physmap_done;
1515
1516 /*
1517 * If we failed above, try memory map with INT 15:E801
1518 */
1519 vmf.vmf_ax = 0xE801;
1520 if (vm86_intcall(0x15, &vmf) == 0) {
1521 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1522 } else {
1523#if 0
1524 vmf.vmf_ah = 0x88;
1525 vm86_intcall(0x15, &vmf);
1526 extmem = vmf.vmf_ax;
1527#else
1528 /*
1529 * Prefer the RTC value for extended memory.
1530 */
1531 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1532#endif
1533 }
1534
1535 /*
1536 * Special hack for chipsets that still remap the 384k hole when
1537 * there's 16MB of memory - this really confuses people that
1538 * are trying to use bus mastering ISA controllers with the
1539 * "16MB limit"; they only have 16MB, but the remapping puts
1540 * them beyond the limit.
1541 *
1542 * If extended memory is between 15-16MB (16-17MB phys address range),
1543 * chop it to 15MB.
1544 */
1545 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1546 extmem = 15 * 1024;
1547
1548 physmap[0] = 0;
1549 physmap[1] = basemem * 1024;
1550 physmap_idx = 2;
1551 physmap[physmap_idx] = 0x100000;
1552 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1553
1554physmap_done:
1555 /*
1556 * Now, physmap contains a map of physical memory.
1557 */
1558
1559#ifdef SMP
17a9f566 1560 /* make hole for AP bootstrap code YYY */
984263bc
MD
1561 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1562
1563 /* look for the MP hardware - needed for apic addresses */
1564 mp_probe();
1565#endif
1566
1567 /*
1568 * Maxmem isn't the "maximum memory", it's one larger than the
1569 * highest page of the physical address space. It should be
1570 * called something like "Maxphyspage". We may adjust this
1571 * based on ``hw.physmem'' and the results of the memory test.
1572 */
1573 Maxmem = atop(physmap[physmap_idx + 1]);
1574
1575#ifdef MAXMEM
1576 Maxmem = MAXMEM / 4;
1577#endif
1578
1579 /*
eb7d35b8 1580 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1581 * for the appropriate modifiers. This overrides MAXMEM.
1582 */
1583 if ((cp = getenv("hw.physmem")) != NULL) {
1584 u_int64_t AllowMem, sanity;
1585 char *ep;
1586
1587 sanity = AllowMem = strtouq(cp, &ep, 0);
1588 if ((ep != cp) && (*ep != 0)) {
1589 switch(*ep) {
1590 case 'g':
1591 case 'G':
1592 AllowMem <<= 10;
1593 case 'm':
1594 case 'M':
1595 AllowMem <<= 10;
1596 case 'k':
1597 case 'K':
1598 AllowMem <<= 10;
1599 break;
1600 default:
1601 AllowMem = sanity = 0;
1602 }
1603 if (AllowMem < sanity)
1604 AllowMem = 0;
1605 }
1606 if (AllowMem == 0)
1607 printf("Ignoring invalid memory size of '%s'\n", cp);
1608 else
1609 Maxmem = atop(AllowMem);
1610 }
1611
1612 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1613 (boothowto & RB_VERBOSE))
6ef943a3 1614 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1615
1616 /*
1617 * If Maxmem has been increased beyond what the system has detected,
1618 * extend the last memory segment to the new limit.
1619 */
1620 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1621 physmap[physmap_idx + 1] = ptoa(Maxmem);
1622
1623 /* call pmap initialization to make new kernel address space */
1624 pmap_bootstrap(first, 0);
1625
1626 /*
1627 * Size up each available chunk of physical memory.
1628 */
1629 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1630 pa_indx = 0;
1631 phys_avail[pa_indx++] = physmap[0];
1632 phys_avail[pa_indx] = physmap[0];
b5b32410 1633 pte = CMAP1;
984263bc
MD
1634
1635 /*
1636 * physmap is in bytes, so when converting to page boundaries,
1637 * round up the start address and round down the end address.
1638 */
1639 for (i = 0; i <= physmap_idx; i += 2) {
1640 vm_offset_t end;
1641
1642 end = ptoa(Maxmem);
1643 if (physmap[i + 1] < end)
1644 end = trunc_page(physmap[i + 1]);
1645 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1646 int tmp, page_bad;
1647#if 0
1648 int *ptr = 0;
1649#else
1650 int *ptr = (int *)CADDR1;
1651#endif
1652
1653 /*
1654 * block out kernel memory as not available.
1655 */
1656 if (pa >= 0x100000 && pa < first)
1657 continue;
1658
1659 page_bad = FALSE;
1660
1661 /*
1662 * map page into kernel: valid, read/write,non-cacheable
1663 */
1664 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1665 cpu_invltlb();
984263bc
MD
1666
1667 tmp = *(int *)ptr;
1668 /*
1669 * Test for alternating 1's and 0's
1670 */
1671 *(volatile int *)ptr = 0xaaaaaaaa;
1672 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1673 page_bad = TRUE;
1674 }
1675 /*
1676 * Test for alternating 0's and 1's
1677 */
1678 *(volatile int *)ptr = 0x55555555;
1679 if (*(volatile int *)ptr != 0x55555555) {
1680 page_bad = TRUE;
1681 }
1682 /*
1683 * Test for all 1's
1684 */
1685 *(volatile int *)ptr = 0xffffffff;
1686 if (*(volatile int *)ptr != 0xffffffff) {
1687 page_bad = TRUE;
1688 }
1689 /*
1690 * Test for all 0's
1691 */
1692 *(volatile int *)ptr = 0x0;
1693 if (*(volatile int *)ptr != 0x0) {
1694 page_bad = TRUE;
1695 }
1696 /*
1697 * Restore original value.
1698 */
1699 *(int *)ptr = tmp;
1700
1701 /*
1702 * Adjust array of valid/good pages.
1703 */
1704 if (page_bad == TRUE) {
1705 continue;
1706 }
1707 /*
1708 * If this good page is a continuation of the
1709 * previous set of good pages, then just increase
1710 * the end pointer. Otherwise start a new chunk.
1711 * Note that "end" points one higher than end,
1712 * making the range >= start and < end.
1713 * If we're also doing a speculative memory
1714 * test and we at or past the end, bump up Maxmem
1715 * so that we keep going. The first bad page
1716 * will terminate the loop.
1717 */
1718 if (phys_avail[pa_indx] == pa) {
1719 phys_avail[pa_indx] += PAGE_SIZE;
1720 } else {
1721 pa_indx++;
1722 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1723 printf("Too many holes in the physical address space, giving up\n");
1724 pa_indx--;
1725 break;
1726 }
1727 phys_avail[pa_indx++] = pa; /* start */
1728 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1729 }
1730 physmem++;
1731 }
1732 }
1733 *pte = 0;
0f7a3396 1734 cpu_invltlb();
984263bc
MD
1735
1736 /*
1737 * XXX
1738 * The last chunk must contain at least one page plus the message
1739 * buffer to avoid complicating other code (message buffer address
1740 * calculation, etc.).
1741 */
1742 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1743 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1744 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1745 phys_avail[pa_indx--] = 0;
1746 phys_avail[pa_indx--] = 0;
1747 }
1748
1749 Maxmem = atop(phys_avail[pa_indx]);
1750
1751 /* Trim off space for the message buffer. */
1752 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1753
1754 avail_end = phys_avail[pa_indx];
1755}
1756
f7bc9806
MD
1757/*
1758 * IDT VECTORS:
1759 * 0 Divide by zero
1760 * 1 Debug
1761 * 2 NMI
1762 * 3 BreakPoint
1763 * 4 OverFlow
1764 * 5 Bound-Range
1765 * 6 Invalid OpCode
1766 * 7 Device Not Available (x87)
1767 * 8 Double-Fault
1768 * 9 Coprocessor Segment overrun (unsupported, reserved)
1769 * 10 Invalid-TSS
1770 * 11 Segment not present
1771 * 12 Stack
1772 * 13 General Protection
1773 * 14 Page Fault
1774 * 15 Reserved
1775 * 16 x87 FP Exception pending
1776 * 17 Alignment Check
1777 * 18 Machine Check
1778 * 19 SIMD floating point
1779 * 20-31 reserved
1780 * 32-255 INTn/external sources
1781 */
984263bc 1782void
17a9f566 1783init386(int first)
984263bc
MD
1784{
1785 struct gate_descriptor *gdp;
1786 int gsel_tss, metadata_missing, off, x;
85100692 1787 struct mdglobaldata *gd;
984263bc
MD
1788
1789 /*
1790 * Prevent lowering of the ipl if we call tsleep() early.
1791 */
85100692 1792 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1793 bzero(gd, sizeof(*gd));
984263bc 1794
85100692 1795 gd->mi.gd_curthread = &thread0;
984263bc
MD
1796
1797 atdevbase = ISA_HOLE_START + KERNBASE;
1798
1799 metadata_missing = 0;
1800 if (bootinfo.bi_modulep) {
1801 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1802 preload_bootstrap_relocate(KERNBASE);
1803 } else {
1804 metadata_missing = 1;
1805 }
1806 if (bootinfo.bi_envp)
1807 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1808
c5cc06e3
MD
1809 /*
1810 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1811 * at 0.
1812 */
4e8e646b 1813 ncpus = 1;
c5cc06e3 1814 ncpus2 = 1;
984263bc
MD
1815 /* Init basic tunables, hz etc */
1816 init_param1();
1817
1818 /*
1819 * make gdt memory segments, the code segment goes up to end of the
1820 * page with etext in it, the data segment goes to the end of
1821 * the address space
1822 */
1823 /*
1824 * XXX text protection is temporarily (?) disabled. The limit was
1825 * i386_btop(round_page(etext)) - 1.
1826 */
1827 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1828 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1829
984263bc
MD
1830 gdt_segs[GPRIV_SEL].ssd_limit =
1831 atop(sizeof(struct privatespace) - 1);
8ad65e08 1832 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1833 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1834 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1835
85100692 1836 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1837
84b592ba
MD
1838 /*
1839 * Note: on both UP and SMP curthread must be set non-NULL
1840 * early in the boot sequence because the system assumes
1841 * that 'curthread' is never NULL.
1842 */
984263bc
MD
1843
1844 for (x = 0; x < NGDT; x++) {
1845#ifdef BDE_DEBUGGER
1846 /* avoid overwriting db entries with APM ones */
1847 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1848 continue;
1849#endif
1850 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1851 }
1852
1853 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1854 r_gdt.rd_base = (int) gdt;
1855 lgdt(&r_gdt);
1856
73e4f7b9
MD
1857 mi_gdinit(&gd->mi, 0);
1858 cpu_gdinit(gd, 0);
1859 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1860 lwkt_set_comm(&thread0, "thread0");
1861 proc0.p_addr = (void *)thread0.td_kstack;
1862 proc0.p_thread = &thread0;
a2a5ad0d 1863 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
98a7f915 1864 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1865 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1866 thread0.td_proc = &proc0;
1867 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1868 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1869
984263bc
MD
1870 /* make ldt memory segments */
1871 /*
1872 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1873 * should be spelled ...MAX_USER...
1874 */
1875 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1876 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1877 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1878 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1879
1880 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1881 lldt(_default_ldt);
17a9f566 1882 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1883 /* spinlocks and the BGL */
1884 init_locks();
984263bc
MD
1885
1886 /* exceptions */
f7bc9806
MD
1887 for (x = 0; x < NIDT; x++) {
1888#ifdef DEBUG_INTERRUPTS
1889 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1890#else
1891 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1892#endif
1893 }
984263bc
MD
1894 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1895 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1896 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1897 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1898 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1899 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1900 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1901 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1902 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1903 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1904 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1905 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1909 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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MD
1910 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1913 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(0x80, &IDTVEC(int0x80_syscall),
1915 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1916 setidt(0x81, &IDTVEC(int0x81_syscall),
1917 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1918
1919 r_idt.rd_limit = sizeof(idt0) - 1;
1920 r_idt.rd_base = (int) idt;
1921 lidt(&r_idt);
1922
1923 /*
1924 * Initialize the console before we print anything out.
1925 */
1926 cninit();
1927
1928 if (metadata_missing)
1929 printf("WARNING: loader(8) metadata is missing!\n");
1930
984263bc
MD
1931#if NISA >0
1932 isa_defaultirq();
1933#endif
1934 rand_initialize();
1935
1936#ifdef DDB
1937 kdb_init();
1938 if (boothowto & RB_KDB)
1939 Debugger("Boot flags requested debugger");
1940#endif
1941
1942 finishidentcpu(); /* Final stage of CPU initialization */
1943 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1944 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 initializecpu(); /* Initialize CPU registers */
1946
b7c628e4
MD
1947 /*
1948 * make an initial tss so cpu can get interrupt stack on syscall!
1949 * The 16 bytes is to save room for a VM86 context.
1950 */
17a9f566
MD
1951 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1952 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1953 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1954 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1955 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1956 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1957 ltr(gsel_tss);
1958
1959 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1960 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1961 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1962 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1963 dblfault_tss.tss_cr3 = (int)IdlePTD;
1964 dblfault_tss.tss_eip = (int) dblfault_handler;
1965 dblfault_tss.tss_eflags = PSL_KERNEL;
1966 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1967 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1968 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1969 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1970 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1971
1972 vm86_initialize();
1973 getmemsize(first);
1974 init_param2(physmem);
1975
1976 /* now running on new page tables, configured,and u/iom is accessible */
1977
1978 /* Map the message buffer. */
1979 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1980 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1981
1982 msgbufinit(msgbufp, MSGBUF_SIZE);
1983
1984 /* make a call gate to reenter kernel with */
1985 gdp = &ldt[LSYS5CALLS_SEL].gd;
1986
1987 x = (int) &IDTVEC(syscall);
1988 gdp->gd_looffset = x++;
1989 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1990 gdp->gd_stkcpy = 1;
1991 gdp->gd_type = SDT_SYS386CGT;
1992 gdp->gd_dpl = SEL_UPL;
1993 gdp->gd_p = 1;
1994 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1995
1996 /* XXX does this work? */
1997 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1998 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1999
2000 /* transfer to user mode */
2001
2002 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2003 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2004
2005 /* setup proc 0's pcb */
b7c628e4
MD
2006 thread0.td_pcb->pcb_flags = 0;
2007 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2008 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2009 proc0.p_md.md_regs = &proc0_tf;
2010}
2011
8ad65e08 2012/*
17a9f566
MD
2013 * Initialize machine-dependant portions of the global data structure.
2014 * Note that the global data area and cpu0's idlestack in the private
2015 * data space were allocated in locore.
ef0fdad1
MD
2016 *
2017 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2018 *
2019 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2020 */
2021void
85100692 2022cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2023{
2024 char *sp;
8ad65e08 2025
7d0bac62 2026 if (cpu)
a2a5ad0d 2027 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2028
85100692 2029 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2030 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2031 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2032 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2033 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2034 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2035}
2036
12e4aaff
MD
2037struct globaldata *
2038globaldata_find(int cpu)
2039{
2040 KKASSERT(cpu >= 0 && cpu < ncpus);
2041 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2042}
2043
984263bc
MD
2044#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2045static void f00f_hack(void *unused);
2046SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2047
2048static void
17a9f566
MD
2049f00f_hack(void *unused)
2050{
984263bc 2051 struct gate_descriptor *new_idt;
984263bc
MD
2052 vm_offset_t tmp;
2053
2054 if (!has_f00f_bug)
2055 return;
2056
2057 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2058
2059 r_idt.rd_limit = sizeof(idt0) - 1;
2060
2061 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2062 if (tmp == 0)
2063 panic("kmem_alloc returned 0");
2064 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2065 panic("kmem_alloc returned non-page-aligned memory");
2066 /* Put the first seven entries in the lower page */
2067 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2068 bcopy(idt, new_idt, sizeof(idt0));
2069 r_idt.rd_base = (int)new_idt;
2070 lidt(&r_idt);
2071 idt = new_idt;
2072 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2073 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2074 panic("vm_map_protect failed");
2075 return;
2076}
2077#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2078
2079int
2080ptrace_set_pc(p, addr)
2081 struct proc *p;
2082 unsigned long addr;
2083{
2084 p->p_md.md_regs->tf_eip = addr;
2085 return (0);
2086}
2087
2088int
2089ptrace_single_step(p)
2090 struct proc *p;
2091{
2092 p->p_md.md_regs->tf_eflags |= PSL_T;
2093 return (0);
2094}
2095
2096int ptrace_read_u_check(p, addr, len)
2097 struct proc *p;
2098 vm_offset_t addr;
2099 size_t len;
2100{
2101 vm_offset_t gap;
2102
2103 if ((vm_offset_t) (addr + len) < addr)
2104 return EPERM;
2105 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2106 return 0;
2107
2108 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2109
2110 if ((vm_offset_t) addr < gap)
2111 return EPERM;
2112 if ((vm_offset_t) (addr + len) <=
2113 (vm_offset_t) (gap + sizeof(struct trapframe)))
2114 return 0;
2115 return EPERM;
2116}
2117
2118int ptrace_write_u(p, off, data)
2119 struct proc *p;
2120 vm_offset_t off;
2121 long data;
2122{
2123 struct trapframe frame_copy;
2124 vm_offset_t min;
2125 struct trapframe *tp;
2126
2127 /*
2128 * Privileged kernel state is scattered all over the user area.
2129 * Only allow write access to parts of regs and to fpregs.
2130 */
2131 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2132 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2133 tp = p->p_md.md_regs;
2134 frame_copy = *tp;
2135 *(int *)((char *)&frame_copy + (off - min)) = data;
2136 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2137 !CS_SECURE(frame_copy.tf_cs))
2138 return (EINVAL);
2139 *(int*)((char *)p->p_addr + off) = data;
2140 return (0);
2141 }
b7c628e4
MD
2142
2143 /*
2144 * The PCB is at the end of the user area YYY
2145 */
2146 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2147 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2148 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2149 *(int*)((char *)p->p_addr + off) = data;
2150 return (0);
2151 }
2152 return (EFAULT);
2153}
2154
2155int
2156fill_regs(p, regs)
2157 struct proc *p;
2158 struct reg *regs;
2159{
2160 struct pcb *pcb;
2161 struct trapframe *tp;
2162
2163 tp = p->p_md.md_regs;
2164 regs->r_fs = tp->tf_fs;
2165 regs->r_es = tp->tf_es;
2166 regs->r_ds = tp->tf_ds;
2167 regs->r_edi = tp->tf_edi;
2168 regs->r_esi = tp->tf_esi;
2169 regs->r_ebp = tp->tf_ebp;
2170 regs->r_ebx = tp->tf_ebx;
2171 regs->r_edx = tp->tf_edx;
2172 regs->r_ecx = tp->tf_ecx;
2173 regs->r_eax = tp->tf_eax;
2174 regs->r_eip = tp->tf_eip;
2175 regs->r_cs = tp->tf_cs;
2176 regs->r_eflags = tp->tf_eflags;
2177 regs->r_esp = tp->tf_esp;
2178 regs->r_ss = tp->tf_ss;
b7c628e4 2179 pcb = p->p_thread->td_pcb;
984263bc
MD
2180 regs->r_gs = pcb->pcb_gs;
2181 return (0);
2182}
2183
2184int
2185set_regs(p, regs)
2186 struct proc *p;
2187 struct reg *regs;
2188{
2189 struct pcb *pcb;
2190 struct trapframe *tp;
2191
2192 tp = p->p_md.md_regs;
2193 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2194 !CS_SECURE(regs->r_cs))
2195 return (EINVAL);
2196 tp->tf_fs = regs->r_fs;
2197 tp->tf_es = regs->r_es;
2198 tp->tf_ds = regs->r_ds;
2199 tp->tf_edi = regs->r_edi;
2200 tp->tf_esi = regs->r_esi;
2201 tp->tf_ebp = regs->r_ebp;
2202 tp->tf_ebx = regs->r_ebx;
2203 tp->tf_edx = regs->r_edx;
2204 tp->tf_ecx = regs->r_ecx;
2205 tp->tf_eax = regs->r_eax;
2206 tp->tf_eip = regs->r_eip;
2207 tp->tf_cs = regs->r_cs;
2208 tp->tf_eflags = regs->r_eflags;
2209 tp->tf_esp = regs->r_esp;
2210 tp->tf_ss = regs->r_ss;
b7c628e4 2211 pcb = p->p_thread->td_pcb;
984263bc
MD
2212 pcb->pcb_gs = regs->r_gs;
2213 return (0);
2214}
2215
642a6e88 2216#ifndef CPU_DISABLE_SSE
984263bc
MD
2217static void
2218fill_fpregs_xmm(sv_xmm, sv_87)
2219 struct savexmm *sv_xmm;
2220 struct save87 *sv_87;
2221{
c9faf524
RG
2222 struct env87 *penv_87 = &sv_87->sv_env;
2223 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2224 int i;
2225
2226 /* FPU control/status */
2227 penv_87->en_cw = penv_xmm->en_cw;
2228 penv_87->en_sw = penv_xmm->en_sw;
2229 penv_87->en_tw = penv_xmm->en_tw;
2230 penv_87->en_fip = penv_xmm->en_fip;
2231 penv_87->en_fcs = penv_xmm->en_fcs;
2232 penv_87->en_opcode = penv_xmm->en_opcode;
2233 penv_87->en_foo = penv_xmm->en_foo;
2234 penv_87->en_fos = penv_xmm->en_fos;
2235
2236 /* FPU registers */
2237 for (i = 0; i < 8; ++i)
2238 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2239
2240 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2241}
2242
2243static void
2244set_fpregs_xmm(sv_87, sv_xmm)
2245 struct save87 *sv_87;
2246 struct savexmm *sv_xmm;
2247{
c9faf524
RG
2248 struct env87 *penv_87 = &sv_87->sv_env;
2249 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2250 int i;
2251
2252 /* FPU control/status */
2253 penv_xmm->en_cw = penv_87->en_cw;
2254 penv_xmm->en_sw = penv_87->en_sw;
2255 penv_xmm->en_tw = penv_87->en_tw;
2256 penv_xmm->en_fip = penv_87->en_fip;
2257 penv_xmm->en_fcs = penv_87->en_fcs;
2258 penv_xmm->en_opcode = penv_87->en_opcode;
2259 penv_xmm->en_foo = penv_87->en_foo;
2260 penv_xmm->en_fos = penv_87->en_fos;
2261
2262 /* FPU registers */
2263 for (i = 0; i < 8; ++i)
2264 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2265
2266 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2267}
642a6e88 2268#endif /* CPU_DISABLE_SSE */
984263bc
MD
2269
2270int
2271fill_fpregs(p, fpregs)
2272 struct proc *p;
2273 struct fpreg *fpregs;
2274{
642a6e88 2275#ifndef CPU_DISABLE_SSE
984263bc 2276 if (cpu_fxsr) {
b7c628e4 2277 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2278 (struct save87 *)fpregs);
2279 return (0);
2280 }
642a6e88 2281#endif /* CPU_DISABLE_SSE */
b7c628e4 2282 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2283 return (0);
2284}
2285
2286int
2287set_fpregs(p, fpregs)
2288 struct proc *p;
2289 struct fpreg *fpregs;
2290{
642a6e88 2291#ifndef CPU_DISABLE_SSE
984263bc
MD
2292 if (cpu_fxsr) {
2293 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2294 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2295 return (0);
2296 }
642a6e88 2297#endif /* CPU_DISABLE_SSE */
b7c628e4 2298 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2299 return (0);
2300}
2301
2302int
2303fill_dbregs(p, dbregs)
2304 struct proc *p;
2305 struct dbreg *dbregs;
2306{
2307 struct pcb *pcb;
2308
2309 if (p == NULL) {
2310 dbregs->dr0 = rdr0();
2311 dbregs->dr1 = rdr1();
2312 dbregs->dr2 = rdr2();
2313 dbregs->dr3 = rdr3();
2314 dbregs->dr4 = rdr4();
2315 dbregs->dr5 = rdr5();
2316 dbregs->dr6 = rdr6();
2317 dbregs->dr7 = rdr7();
2318 }
2319 else {
b7c628e4 2320 pcb = p->p_thread->td_pcb;
984263bc
MD
2321 dbregs->dr0 = pcb->pcb_dr0;
2322 dbregs->dr1 = pcb->pcb_dr1;
2323 dbregs->dr2 = pcb->pcb_dr2;
2324 dbregs->dr3 = pcb->pcb_dr3;
2325 dbregs->dr4 = 0;
2326 dbregs->dr5 = 0;
2327 dbregs->dr6 = pcb->pcb_dr6;
2328 dbregs->dr7 = pcb->pcb_dr7;
2329 }
2330 return (0);
2331}
2332
2333int
2334set_dbregs(p, dbregs)
2335 struct proc *p;
2336 struct dbreg *dbregs;
2337{
2338 struct pcb *pcb;
2339 int i;
2340 u_int32_t mask1, mask2;
2341
2342 if (p == NULL) {
2343 load_dr0(dbregs->dr0);
2344 load_dr1(dbregs->dr1);
2345 load_dr2(dbregs->dr2);
2346 load_dr3(dbregs->dr3);
2347 load_dr4(dbregs->dr4);
2348 load_dr5(dbregs->dr5);
2349 load_dr6(dbregs->dr6);
2350 load_dr7(dbregs->dr7);
2351 }
2352 else {
2353 /*
2354 * Don't let an illegal value for dr7 get set. Specifically,
2355 * check for undefined settings. Setting these bit patterns
2356 * result in undefined behaviour and can lead to an unexpected
2357 * TRCTRAP.
2358 */
2359 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2360 i++, mask1 <<= 2, mask2 <<= 2)
2361 if ((dbregs->dr7 & mask1) == mask2)
2362 return (EINVAL);
2363
b7c628e4 2364 pcb = p->p_thread->td_pcb;
984263bc
MD
2365
2366 /*
2367 * Don't let a process set a breakpoint that is not within the
2368 * process's address space. If a process could do this, it
2369 * could halt the system by setting a breakpoint in the kernel
2370 * (if ddb was enabled). Thus, we need to check to make sure
2371 * that no breakpoints are being enabled for addresses outside
2372 * process's address space, unless, perhaps, we were called by
2373 * uid 0.
2374 *
2375 * XXX - what about when the watched area of the user's
2376 * address space is written into from within the kernel
2377 * ... wouldn't that still cause a breakpoint to be generated
2378 * from within kernel mode?
2379 */
2380
dadab5e9 2381 if (suser_cred(p->p_ucred, 0) != 0) {
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MD
2382 if (dbregs->dr7 & 0x3) {
2383 /* dr0 is enabled */
2384 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2385 return (EINVAL);
2386 }
2387
2388 if (dbregs->dr7 & (0x3<<2)) {
2389 /* dr1 is enabled */
2390 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2391 return (EINVAL);
2392 }
2393
2394 if (dbregs->dr7 & (0x3<<4)) {
2395 /* dr2 is enabled */
2396 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2397 return (EINVAL);
2398 }
2399
2400 if (dbregs->dr7 & (0x3<<6)) {
2401 /* dr3 is enabled */
2402 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2403 return (EINVAL);
2404 }
2405 }
2406
2407 pcb->pcb_dr0 = dbregs->dr0;
2408 pcb->pcb_dr1 = dbregs->dr1;
2409 pcb->pcb_dr2 = dbregs->dr2;
2410 pcb->pcb_dr3 = dbregs->dr3;
2411 pcb->pcb_dr6 = dbregs->dr6;
2412 pcb->pcb_dr7 = dbregs->dr7;
2413
2414 pcb->pcb_flags |= PCB_DBREGS;
2415 }
2416
2417 return (0);
2418}
2419
2420/*
2421 * Return > 0 if a hardware breakpoint has been hit, and the
2422 * breakpoint was in user space. Return 0, otherwise.
2423 */
2424int
2425user_dbreg_trap(void)
2426{
2427 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2428 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2429 int nbp; /* number of breakpoints that triggered */
2430 caddr_t addr[4]; /* breakpoint addresses */
2431 int i;
2432
2433 dr7 = rdr7();
2434 if ((dr7 & 0x000000ff) == 0) {
2435 /*
2436 * all GE and LE bits in the dr7 register are zero,
2437 * thus the trap couldn't have been caused by the
2438 * hardware debug registers
2439 */
2440 return 0;
2441 }
2442
2443 nbp = 0;
2444 dr6 = rdr6();
2445 bp = dr6 & 0x0000000f;
2446
2447 if (!bp) {
2448 /*
2449 * None of the breakpoint bits are set meaning this
2450 * trap was not caused by any of the debug registers
2451 */
2452 return 0;
2453 }
2454
2455 /*
2456 * at least one of the breakpoints were hit, check to see
2457 * which ones and if any of them are user space addresses
2458 */
2459
2460 if (bp & 0x01) {
2461 addr[nbp++] = (caddr_t)rdr0();
2462 }
2463 if (bp & 0x02) {
2464 addr[nbp++] = (caddr_t)rdr1();
2465 }
2466 if (bp & 0x04) {
2467 addr[nbp++] = (caddr_t)rdr2();
2468 }
2469 if (bp & 0x08) {
2470 addr[nbp++] = (caddr_t)rdr3();
2471 }
2472
2473 for (i=0; i<nbp; i++) {
2474 if (addr[i] <
2475 (caddr_t)VM_MAXUSER_ADDRESS) {
2476 /*
2477 * addr[i] is in user space
2478 */
2479 return nbp;
2480 }
2481 }
2482
2483 /*
2484 * None of the breakpoints are in user space.
2485 */
2486 return 0;
2487}
2488
2489
2490#ifndef DDB
2491void
2492Debugger(const char *msg)
2493{
2494 printf("Debugger(\"%s\") called.\n", msg);
2495}
2496#endif /* no DDB */
2497
2498#include <sys/disklabel.h>
2499
2500/*
2501 * Determine the size of the transfer, and make sure it is
2502 * within the boundaries of the partition. Adjust transfer
2503 * if needed, and signal errors or early completion.
2504 */
2505int
2506bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2507{
2508 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2509 int labelsect = lp->d_partitions[0].p_offset;
2510 int maxsz = p->p_size,
2511 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2512
2513 /* overwriting disk label ? */
2514 /* XXX should also protect bootstrap in first 8K */
2515 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2516#if LABELSECTOR != 0
2517 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2518#endif
2519 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2520 bp->b_error = EROFS;
2521 goto bad;
2522 }
2523
2524#if defined(DOSBBSECTOR) && defined(notyet)
2525 /* overwriting master boot record? */
2526 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2527 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2528 bp->b_error = EROFS;
2529 goto bad;
2530 }
2531#endif
2532
2533 /* beyond partition? */
2534 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2535 /* if exactly at end of disk, return an EOF */
2536 if (bp->b_blkno == maxsz) {
2537 bp->b_resid = bp->b_bcount;
2538 return(0);
2539 }
2540 /* or truncate if part of it fits */
2541 sz = maxsz - bp->b_blkno;
2542 if (sz <= 0) {
2543 bp->b_error = EINVAL;
2544 goto bad;
2545 }
2546 bp->b_bcount = sz << DEV_BSHIFT;
2547 }
2548
2549 bp->b_pblkno = bp->b_blkno + p->p_offset;
2550 return(1);
2551
2552bad:
2553 bp->b_flags |= B_ERROR;
2554 return(-1);
2555}
2556
2557#ifdef DDB
2558
2559/*
2560 * Provide inb() and outb() as functions. They are normally only
2561 * available as macros calling inlined functions, thus cannot be
2562 * called inside DDB.
2563 *
2564 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2565 */
2566
2567#undef inb
2568#undef outb
2569
2570/* silence compiler warnings */
2571u_char inb(u_int);
2572void outb(u_int, u_char);
2573
2574u_char
2575inb(u_int port)
2576{
2577 u_char data;
2578 /*
2579 * We use %%dx and not %1 here because i/o is done at %dx and not at
2580 * %edx, while gcc generates inferior code (movw instead of movl)
2581 * if we tell it to load (u_short) port.
2582 */
2583 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2584 return (data);
2585}
2586
2587void
2588outb(u_int port, u_char data)
2589{
2590 u_char al;
2591 /*
2592 * Use an unnecessary assignment to help gcc's register allocator.
2593 * This make a large difference for gcc-1.40 and a tiny difference
2594 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2595 * best results. gcc-2.6.0 can't handle this.
2596 */
2597 al = data;
2598 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2599}
2600
2601#endif /* DDB */
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MD
2602
2603
2604
2605#include "opt_cpu.h"
8a8d5d85
MD
2606
2607
2608/*
2609 * initialize all the SMP locks
2610 */
2611
2612/* critical region around IO APIC, apic_imen */
2613struct spinlock imen_spinlock;
2614
2615/* Make FAST_INTR() routines sequential */
2616struct spinlock fast_intr_spinlock;
2617
2618/* critical region for old style disable_intr/enable_intr */
2619struct spinlock mpintr_spinlock;
2620
2621/* critical region around INTR() routines */
2622struct spinlock intr_spinlock;
2623
2624/* lock region used by kernel profiling */
2625struct spinlock mcount_spinlock;
2626
2627/* locks com (tty) data/hardware accesses: a FASTINTR() */
2628struct spinlock com_spinlock;
2629
2630/* locks kernel printfs */
2631struct spinlock cons_spinlock;
2632
2633/* lock regions around the clock hardware */
2634struct spinlock clock_spinlock;
2635
2636/* lock around the MP rendezvous */
2637struct spinlock smp_rv_spinlock;
2638
2639static void
2640init_locks(void)
2641{
2642 /*
2643 * mp_lock = 0; BSP already owns the MP lock
2644 */
2645 /*
2646 * Get the initial mp_lock with a count of 1 for the BSP.
2647 * This uses a LOGICAL cpu ID, ie BSP == 0.
2648 */
2649#ifdef SMP
2650 cpu_get_initial_mplock();
2651#endif
41a01a4d 2652 /* DEPRECATED */
8a8d5d85
MD
2653 spin_lock_init(&mcount_spinlock);
2654 spin_lock_init(&fast_intr_spinlock);
2655 spin_lock_init(&intr_spinlock);
2656 spin_lock_init(&mpintr_spinlock);
2657 spin_lock_init(&imen_spinlock);
2658 spin_lock_init(&smp_rv_spinlock);
2659 spin_lock_init(&com_spinlock);
2660 spin_lock_init(&clock_spinlock);
2661 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2662
2663 /* our token pool needs to work early */
2664 lwkt_token_pool_init();
8a8d5d85
MD
2665}
2666