kernel - Correct edge-case for machdep.pmap_mmu_optimize
[dragonfly.git] / sys / platform / pc64 / x86_64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
921c891e 9 * Copyright (c) 2011-2012 Matthew Dillon
d7f50089 10 * All rights reserved.
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11 *
12 * This code is derived from software contributed to Berkeley by
13 * the Systems Programming Group of the University of Utah Computer
14 * Science Department and William Jolitz of UUNET Technologies Inc.
15 *
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16 * Redistribution and use in source and binary forms, with or without
17 * modification, are permitted provided that the following conditions
18 * are met:
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19 * 1. Redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer.
21 * 2. Redistributions in binary form must reproduce the above copyright
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22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution.
24 * 3. All advertising materials mentioning features or use of this software
25 * must display the following acknowledgement:
26 * This product includes software developed by the University of
27 * California, Berkeley and its contributors.
28 * 4. Neither the name of the University nor the names of its contributors
29 * may be used to endorse or promote products derived from this software
30 * without specific prior written permission.
31 *
32 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
33 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
34 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
35 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
36 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
40 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
41 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 42 * SUCH DAMAGE.
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43 */
44/*
90244566 45 * Manage physical address maps for x86-64 systems.
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46 */
47
48#if JG
49#include "opt_disable_pse.h"
50#include "opt_pmap.h"
51#endif
52#include "opt_msgbuf.h"
d7f50089 53
c8fe38ae 54#include <sys/param.h>
d7f50089 55#include <sys/kernel.h>
d7f50089 56#include <sys/proc.h>
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57#include <sys/msgbuf.h>
58#include <sys/vmmeter.h>
59#include <sys/mman.h>
a86ce0cd 60#include <sys/systm.h>
d7f50089 61
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62#include <vm/vm.h>
63#include <vm/vm_param.h>
64#include <sys/sysctl.h>
65#include <sys/lock.h>
d7f50089 66#include <vm/vm_kern.h>
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67#include <vm/vm_page.h>
68#include <vm/vm_map.h>
d7f50089 69#include <vm/vm_object.h>
c8fe38ae 70#include <vm/vm_extern.h>
d7f50089 71#include <vm/vm_pageout.h>
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72#include <vm/vm_pager.h>
73#include <vm/vm_zone.h>
74
75#include <sys/user.h>
76#include <sys/thread2.h>
77#include <sys/sysref2.h>
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78#include <sys/spinlock2.h>
79#include <vm/vm_page2.h>
d7f50089 80
c8fe38ae 81#include <machine/cputypes.h>
d7f50089 82#include <machine/md_var.h>
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83#include <machine/specialreg.h>
84#include <machine/smp.h>
85#include <machine_base/apic/apicreg.h>
d7f50089 86#include <machine/globaldata.h>
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87#include <machine/pmap.h>
88#include <machine/pmap_inval.h>
7e9313e0 89#include <machine/inttypes.h>
c8fe38ae 90
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91#include <ddb/ddb.h>
92
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93#define PMAP_KEEP_PDIRS
94#ifndef PMAP_SHPGPERPROC
f1d3f422 95#define PMAP_SHPGPERPROC 2000
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96#endif
97
98#if defined(DIAGNOSTIC)
99#define PMAP_DIAGNOSTIC
100#endif
101
102#define MINPV 2048
103
c8fe38ae 104/*
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105 * pmap debugging will report who owns a pv lock when blocking.
106 */
107#ifdef PMAP_DEBUG
108
109#define PMAP_DEBUG_DECL ,const char *func, int lineno
110#define PMAP_DEBUG_ARGS , __func__, __LINE__
111#define PMAP_DEBUG_COPY , func, lineno
112
113#define pv_get(pmap, pindex) _pv_get(pmap, pindex \
114 PMAP_DEBUG_ARGS)
115#define pv_lock(pv) _pv_lock(pv \
116 PMAP_DEBUG_ARGS)
117#define pv_hold_try(pv) _pv_hold_try(pv \
118 PMAP_DEBUG_ARGS)
119#define pv_alloc(pmap, pindex, isnewp) _pv_alloc(pmap, pindex, isnewp \
120 PMAP_DEBUG_ARGS)
121
122#else
123
124#define PMAP_DEBUG_DECL
125#define PMAP_DEBUG_ARGS
126#define PMAP_DEBUG_COPY
127
128#define pv_get(pmap, pindex) _pv_get(pmap, pindex)
129#define pv_lock(pv) _pv_lock(pv)
130#define pv_hold_try(pv) _pv_hold_try(pv)
131#define pv_alloc(pmap, pindex, isnewp) _pv_alloc(pmap, pindex, isnewp)
132
133#endif
134
135/*
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136 * Get PDEs and PTEs for user/kernel address space
137 */
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138#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
139
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140#define pmap_pde_v(pmap, pte) ((*(pd_entry_t *)pte & pmap->pmap_bits[PG_V_IDX]) != 0)
141#define pmap_pte_w(pmap, pte) ((*(pt_entry_t *)pte & pmap->pmap_bits[PG_W_IDX]) != 0)
142#define pmap_pte_m(pmap, pte) ((*(pt_entry_t *)pte & pmap->pmap_bits[PG_M_IDX]) != 0)
143#define pmap_pte_u(pmap, pte) ((*(pt_entry_t *)pte & pmap->pmap_bits[PG_U_IDX]) != 0)
144#define pmap_pte_v(pmap, pte) ((*(pt_entry_t *)pte & pmap->pmap_bits[PG_V_IDX]) != 0)
c8fe38ae 145
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146/*
147 * Given a map and a machine independent protection code,
148 * convert to a vax protection code.
149 */
150#define pte_prot(m, p) \
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151 (m->protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
152static int protection_codes[PROTECTION_CODES_SIZE];
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153
154struct pmap kernel_pmap;
c8fe38ae 155static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 156
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157MALLOC_DEFINE(M_OBJPMAP, "objpmap", "pmaps associated with VM objects");
158
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159vm_paddr_t avail_start; /* PA of first available physical page */
160vm_paddr_t avail_end; /* PA of last available physical page */
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161vm_offset_t virtual2_start; /* cutout free area prior to kernel start */
162vm_offset_t virtual2_end;
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163vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
164vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
165vm_offset_t KvaStart; /* VA start of KVA space */
166vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
167vm_offset_t KvaSize; /* max size of kernel virtual address space */
168static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
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169//static int pgeflag; /* PG_G or-in */
170//static int pseflag; /* PG_PS or-in */
b524ca76 171uint64_t PatMsr;
d7f50089 172
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173static int ndmpdp;
174static vm_paddr_t dmaplimit;
c8fe38ae 175static int nkpt;
791c6551 176vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
d7f50089 177
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178static pt_entry_t pat_pte_index[PAT_INDEX_SIZE]; /* PAT -> PG_ bits */
179/*static pt_entry_t pat_pde_index[PAT_INDEX_SIZE];*/ /* PAT -> PG_ bits */
180
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181static uint64_t KPTbase;
182static uint64_t KPTphys;
48ffc236 183static uint64_t KPDphys; /* phys addr of kernel level 2 */
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184static uint64_t KPDbase; /* phys addr of kernel level 2 @ KERNBASE */
185uint64_t KPDPphys; /* phys addr of kernel level 3 */
186uint64_t KPML4phys; /* phys addr of kernel level 4 */
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187
188static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
189static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
190
d7f50089 191/*
c8fe38ae 192 * Data for the pv entry allocation mechanism
d7f50089 193 */
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194static vm_zone_t pvzone;
195static struct vm_zone pvzone_store;
196static struct vm_object pvzone_obj;
701c977e 197static int pv_entry_max=0, pv_entry_high_water=0;
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198static int pmap_pagedaemon_waken = 0;
199static struct pv_entry *pvinit;
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200
201/*
c8fe38ae 202 * All those kernel PT submaps that BSD is so fond of
d7f50089 203 */
4090d6ff 204pt_entry_t *CMAP1 = NULL, *ptmmap;
4c0cc8bb 205caddr_t CADDR1 = NULL, ptvmmap = NULL;
c8fe38ae 206static pt_entry_t *msgbufmap;
4090d6ff 207struct msgbuf *msgbufp=NULL;
d7f50089 208
c8fe38ae 209/*
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210 * PMAP default PG_* bits. Needed to be able to add
211 * EPT/NPT pagetable pmap_bits for the VMM module
212 */
213uint64_t pmap_bits_default[] = {
214 REGULAR_PMAP, /* TYPE_IDX 0 */
215 X86_PG_V, /* PG_V_IDX 1 */
216 X86_PG_RW, /* PG_RW_IDX 2 */
217 X86_PG_U, /* PG_U_IDX 3 */
218 X86_PG_A, /* PG_A_IDX 4 */
219 X86_PG_M, /* PG_M_IDX 5 */
220 X86_PG_PS, /* PG_PS_IDX3 6 */
221 X86_PG_G, /* PG_G_IDX 7 */
222 X86_PG_AVAIL1, /* PG_AVAIL1_IDX 8 */
223 X86_PG_AVAIL2, /* PG_AVAIL2_IDX 9 */
224 X86_PG_AVAIL3, /* PG_AVAIL3_IDX 10 */
225 X86_PG_NC_PWT | X86_PG_NC_PCD, /* PG_N_IDX 11 */
226};
227/*
c8fe38ae 228 * Crashdump maps.
d7f50089 229 */
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230static pt_entry_t *pt_crashdumpmap;
231static caddr_t crashdumpmap;
232
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233#ifdef PMAP_DEBUG2
234static int pmap_enter_debug = 0;
235SYSCTL_INT(_machdep, OID_AUTO, pmap_enter_debug, CTLFLAG_RW,
236 &pmap_enter_debug, 0, "Debug pmap_enter's");
237#endif
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238static int pmap_yield_count = 64;
239SYSCTL_INT(_machdep, OID_AUTO, pmap_yield_count, CTLFLAG_RW,
240 &pmap_yield_count, 0, "Yield during init_pt/release");
1ac5304a 241static int pmap_mmu_optimize = 0;
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242SYSCTL_INT(_machdep, OID_AUTO, pmap_mmu_optimize, CTLFLAG_RW,
243 &pmap_mmu_optimize, 0, "Share page table pages when possible");
b12defdc 244
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245#define DISABLE_PSE
246
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247/* Standard user access funtions */
248extern int std_copyinstr (const void *udaddr, void *kaddr, size_t len,
249 size_t *lencopied);
250extern int std_copyin (const void *udaddr, void *kaddr, size_t len);
251extern int std_copyout (const void *kaddr, void *udaddr, size_t len);
252extern int std_fubyte (const void *base);
253extern int std_subyte (void *base, int byte);
254extern long std_fuword (const void *base);
255extern int std_suword (void *base, long word);
256extern int std_suword32 (void *base, int word);
257
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258static void pv_hold(pv_entry_t pv);
259static int _pv_hold_try(pv_entry_t pv
260 PMAP_DEBUG_DECL);
261static void pv_drop(pv_entry_t pv);
262static void _pv_lock(pv_entry_t pv
263 PMAP_DEBUG_DECL);
264static void pv_unlock(pv_entry_t pv);
265static pv_entry_t _pv_alloc(pmap_t pmap, vm_pindex_t pindex, int *isnew
266 PMAP_DEBUG_DECL);
267static pv_entry_t _pv_get(pmap_t pmap, vm_pindex_t pindex
268 PMAP_DEBUG_DECL);
269static pv_entry_t pv_get_try(pmap_t pmap, vm_pindex_t pindex, int *errorp);
270static pv_entry_t pv_find(pmap_t pmap, vm_pindex_t pindex);
271static void pv_put(pv_entry_t pv);
272static void pv_free(pv_entry_t pv);
273static void *pv_pte_lookup(pv_entry_t pv, vm_pindex_t pindex);
274static pv_entry_t pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex,
275 pv_entry_t *pvpp);
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276static pv_entry_t pmap_allocpte_seg(pmap_t pmap, vm_pindex_t ptepindex,
277 pv_entry_t *pvpp, vm_map_entry_t entry, vm_offset_t va);
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278static void pmap_remove_pv_pte(pv_entry_t pv, pv_entry_t pvp,
279 struct pmap_inval_info *info);
52bb73bc 280static vm_page_t pmap_remove_pv_page(pv_entry_t pv);
01d2a79f 281static int pmap_release_pv(pv_entry_t pv, pv_entry_t pvp);
701c977e 282
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283struct pmap_scan_info;
284static void pmap_remove_callback(pmap_t pmap, struct pmap_scan_info *info,
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285 pv_entry_t pte_pv, pv_entry_t pt_pv, int sharept,
286 vm_offset_t va, pt_entry_t *ptep, void *arg __unused);
9df83100 287static void pmap_protect_callback(pmap_t pmap, struct pmap_scan_info *info,
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288 pv_entry_t pte_pv, pv_entry_t pt_pv, int sharept,
289 vm_offset_t va, pt_entry_t *ptep, void *arg __unused);
701c977e 290
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291static void i386_protection_init (void);
292static void create_pagetables(vm_paddr_t *firstaddr);
293static void pmap_remove_all (vm_page_t m);
c8fe38ae 294static boolean_t pmap_testbit (vm_page_t m, int bit);
c8fe38ae 295
c8fe38ae 296static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
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297static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
298
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299static void pmap_pinit_defaults(struct pmap *pmap);
300
c8fe38ae 301static unsigned pdir4mb;
d7f50089 302
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303static int
304pv_entry_compare(pv_entry_t pv1, pv_entry_t pv2)
305{
306 if (pv1->pv_pindex < pv2->pv_pindex)
307 return(-1);
308 if (pv1->pv_pindex > pv2->pv_pindex)
309 return(1);
310 return(0);
311}
312
313RB_GENERATE2(pv_entry_rb_tree, pv_entry, pv_entry,
314 pv_entry_compare, vm_pindex_t, pv_pindex);
315
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316static __inline
317void
318pmap_page_stats_adding(vm_page_t m)
319{
320 globaldata_t gd = mycpu;
321
322 if (TAILQ_EMPTY(&m->md.pv_list)) {
323 ++gd->gd_vmtotal.t_arm;
324 } else if (TAILQ_FIRST(&m->md.pv_list) ==
325 TAILQ_LAST(&m->md.pv_list, md_page_pv_list)) {
326 ++gd->gd_vmtotal.t_armshr;
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327 ++gd->gd_vmtotal.t_avmshr;
328 } else {
329 ++gd->gd_vmtotal.t_avmshr;
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330 }
331}
332
333static __inline
334void
335pmap_page_stats_deleting(vm_page_t m)
336{
337 globaldata_t gd = mycpu;
338
339 if (TAILQ_EMPTY(&m->md.pv_list)) {
340 --gd->gd_vmtotal.t_arm;
341 } else if (TAILQ_FIRST(&m->md.pv_list) ==
342 TAILQ_LAST(&m->md.pv_list, md_page_pv_list)) {
343 --gd->gd_vmtotal.t_armshr;
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344 --gd->gd_vmtotal.t_avmshr;
345 } else {
346 --gd->gd_vmtotal.t_avmshr;
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347 }
348}
349
d7f50089 350/*
c8fe38ae 351 * Move the kernel virtual free pointer to the next
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352 * 2MB. This is used to help improve performance
353 * by using a large (2MB) page for much of the kernel
c8fe38ae 354 * (.text, .data, .bss)
d7f50089 355 */
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356static
357vm_offset_t
c8fe38ae 358pmap_kmem_choose(vm_offset_t addr)
d7f50089 359{
c8fe38ae 360 vm_offset_t newaddr = addr;
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361
362 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 363 return newaddr;
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364}
365
d7f50089 366/*
c8fe38ae 367 * pmap_pte_quick:
d7f50089 368 *
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369 * Super fast pmap_pte routine best used when scanning the pv lists.
370 * This eliminates many course-grained invltlb calls. Note that many of
371 * the pv list scans are across different pmaps and it is very wasteful
372 * to do an entire invltlb when checking a single mapping.
c8fe38ae 373 */
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374static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
375
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376static
377pt_entry_t *
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378pmap_pte_quick(pmap_t pmap, vm_offset_t va)
379{
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380 return pmap_pte(pmap, va);
381}
382
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383/*
384 * Returns the pindex of a page table entry (representing a terminal page).
385 * There are NUPTE_TOTAL page table entries possible (a huge number)
386 *
387 * x86-64 has a 48-bit address space, where bit 47 is sign-extended out.
388 * We want to properly translate negative KVAs.
389 */
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390static __inline
391vm_pindex_t
701c977e 392pmap_pte_pindex(vm_offset_t va)
48ffc236 393{
701c977e 394 return ((va >> PAGE_SHIFT) & (NUPTE_TOTAL - 1));
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395}
396
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397/*
398 * Returns the pindex of a page table.
399 */
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400static __inline
401vm_pindex_t
701c977e 402pmap_pt_pindex(vm_offset_t va)
48ffc236 403{
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404 return (NUPTE_TOTAL + ((va >> PDRSHIFT) & (NUPT_TOTAL - 1)));
405}
48ffc236 406
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407/*
408 * Returns the pindex of a page directory.
409 */
410static __inline
411vm_pindex_t
412pmap_pd_pindex(vm_offset_t va)
413{
414 return (NUPTE_TOTAL + NUPT_TOTAL +
415 ((va >> PDPSHIFT) & (NUPD_TOTAL - 1)));
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416}
417
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418static __inline
419vm_pindex_t
701c977e 420pmap_pdp_pindex(vm_offset_t va)
48ffc236 421{
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422 return (NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL +
423 ((va >> PML4SHIFT) & (NUPDP_TOTAL - 1)));
424}
48ffc236 425
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426static __inline
427vm_pindex_t
428pmap_pml4_pindex(void)
429{
430 return (NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL + NUPDP_TOTAL);
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431}
432
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433/*
434 * Return various clipped indexes for a given VA
435 *
436 * Returns the index of a pte in a page table, representing a terminal
437 * page.
438 */
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439static __inline
440vm_pindex_t
701c977e 441pmap_pte_index(vm_offset_t va)
48ffc236 442{
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443 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
444}
48ffc236 445
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446/*
447 * Returns the index of a pt in a page directory, representing a page
448 * table.
449 */
450static __inline
451vm_pindex_t
452pmap_pt_index(vm_offset_t va)
453{
454 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
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455}
456
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457/*
458 * Returns the index of a pd in a page directory page, representing a page
459 * directory.
460 */
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461static __inline
462vm_pindex_t
701c977e 463pmap_pd_index(vm_offset_t va)
48ffc236 464{
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465 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
466}
48ffc236 467
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468/*
469 * Returns the index of a pdp in the pml4 table, representing a page
470 * directory page.
471 */
472static __inline
473vm_pindex_t
474pmap_pdp_index(vm_offset_t va)
475{
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476 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
477}
478
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479/*
480 * Generic procedure to index a pte from a pt, pd, or pdp.
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481 *
482 * NOTE: Normally passed pindex as pmap_xx_index(). pmap_xx_pindex() is NOT
483 * a page table page index but is instead of PV lookup index.
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484 */
485static
486void *
487pv_pte_lookup(pv_entry_t pv, vm_pindex_t pindex)
488{
489 pt_entry_t *pte;
490
491 pte = (pt_entry_t *)PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pv->pv_m));
492 return(&pte[pindex]);
493}
494
495/*
496 * Return pointer to PDP slot in the PML4
497 */
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498static __inline
499pml4_entry_t *
701c977e 500pmap_pdp(pmap_t pmap, vm_offset_t va)
48ffc236 501{
701c977e 502 return (&pmap->pm_pml4[pmap_pdp_index(va)]);
48ffc236
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503}
504
701c977e
MD
505/*
506 * Return pointer to PD slot in the PDP given a pointer to the PDP
507 */
bfc09ba0
MD
508static __inline
509pdp_entry_t *
eb010d6e 510pmap_pdp_to_pd(pml4_entry_t pdp_pte, vm_offset_t va)
48ffc236 511{
701c977e 512 pdp_entry_t *pd;
48ffc236 513
eb010d6e 514 pd = (pdp_entry_t *)PHYS_TO_DMAP(pdp_pte & PG_FRAME);
701c977e 515 return (&pd[pmap_pd_index(va)]);
48ffc236
JG
516}
517
701c977e 518/*
eb010d6e
MD
519 * Return pointer to PD slot in the PDP.
520 */
bfc09ba0
MD
521static __inline
522pdp_entry_t *
701c977e 523pmap_pd(pmap_t pmap, vm_offset_t va)
48ffc236 524{
701c977e 525 pml4_entry_t *pdp;
48ffc236 526
701c977e 527 pdp = pmap_pdp(pmap, va);
a86ce0cd 528 if ((*pdp & pmap->pmap_bits[PG_V_IDX]) == 0)
48ffc236 529 return NULL;
eb010d6e 530 return (pmap_pdp_to_pd(*pdp, va));
48ffc236
JG
531}
532
701c977e
MD
533/*
534 * Return pointer to PT slot in the PD given a pointer to the PD
535 */
bfc09ba0
MD
536static __inline
537pd_entry_t *
eb010d6e 538pmap_pd_to_pt(pdp_entry_t pd_pte, vm_offset_t va)
48ffc236 539{
701c977e 540 pd_entry_t *pt;
48ffc236 541
eb010d6e 542 pt = (pd_entry_t *)PHYS_TO_DMAP(pd_pte & PG_FRAME);
701c977e 543 return (&pt[pmap_pt_index(va)]);
48ffc236
JG
544}
545
701c977e
MD
546/*
547 * Return pointer to PT slot in the PD
eb010d6e
MD
548 *
549 * SIMPLE PMAP NOTE: Simple pmaps (embedded in objects) do not have PDPs,
550 * so we cannot lookup the PD via the PDP. Instead we
551 * must look it up via the pmap.
701c977e 552 */
bfc09ba0
MD
553static __inline
554pd_entry_t *
701c977e 555pmap_pt(pmap_t pmap, vm_offset_t va)
48ffc236 556{
701c977e 557 pdp_entry_t *pd;
eb010d6e
MD
558 pv_entry_t pv;
559 vm_pindex_t pd_pindex;
560
561 if (pmap->pm_flags & PMAP_FLAG_SIMPLE) {
562 pd_pindex = pmap_pd_pindex(va);
563 spin_lock(&pmap->pm_spin);
564 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pd_pindex);
565 spin_unlock(&pmap->pm_spin);
566 if (pv == NULL || pv->pv_m == NULL)
567 return NULL;
568 return (pmap_pd_to_pt(VM_PAGE_TO_PHYS(pv->pv_m), va));
569 } else {
570 pd = pmap_pd(pmap, va);
a86ce0cd 571 if (pd == NULL || (*pd & pmap->pmap_bits[PG_V_IDX]) == 0)
eb010d6e
MD
572 return NULL;
573 return (pmap_pd_to_pt(*pd, va));
574 }
48ffc236
JG
575}
576
701c977e
MD
577/*
578 * Return pointer to PTE slot in the PT given a pointer to the PT
579 */
bfc09ba0
MD
580static __inline
581pt_entry_t *
eb010d6e 582pmap_pt_to_pte(pd_entry_t pt_pte, vm_offset_t va)
48ffc236
JG
583{
584 pt_entry_t *pte;
585
eb010d6e 586 pte = (pt_entry_t *)PHYS_TO_DMAP(pt_pte & PG_FRAME);
48ffc236
JG
587 return (&pte[pmap_pte_index(va)]);
588}
589
701c977e
MD
590/*
591 * Return pointer to PTE slot in the PT
592 */
bfc09ba0
MD
593static __inline
594pt_entry_t *
48ffc236 595pmap_pte(pmap_t pmap, vm_offset_t va)
48ffc236 596{
701c977e 597 pd_entry_t *pt;
48ffc236 598
701c977e 599 pt = pmap_pt(pmap, va);
a86ce0cd 600 if (pt == NULL || (*pt & pmap->pmap_bits[PG_V_IDX]) == 0)
701c977e 601 return NULL;
a86ce0cd 602 if ((*pt & pmap->pmap_bits[PG_PS_IDX]) != 0)
701c977e 603 return ((pt_entry_t *)pt);
eb010d6e 604 return (pmap_pt_to_pte(*pt, va));
48ffc236
JG
605}
606
701c977e
MD
607/*
608 * Of all the layers (PTE, PT, PD, PDP, PML4) the best one to cache is
609 * the PT layer. This will speed up core pmap operations considerably.
a86ce0cd 610 *
8e2efb11
MD
611 * NOTE: The pmap spinlock does not need to be held but the passed-in pv
612 * must be in a known associated state (typically by being locked when
613 * the pmap spinlock isn't held). We allow the race for that case.
701c977e 614 */
bfc09ba0 615static __inline
701c977e
MD
616void
617pv_cache(pv_entry_t pv, vm_pindex_t pindex)
48ffc236 618{
701c977e
MD
619 if (pindex >= pmap_pt_pindex(0) && pindex <= pmap_pd_pindex(0))
620 pv->pv_pmap->pm_pvhint = pv;
c8fe38ae 621}
d7f50089 622
701c977e
MD
623
624/*
a44410dd
MD
625 * Return address of PT slot in PD (KVM only)
626 *
627 * Cannot be used for user page tables because it might interfere with
628 * the shared page-table-page optimization (pmap_mmu_optimize).
701c977e 629 */
bfc09ba0
MD
630static __inline
631pd_entry_t *
701c977e 632vtopt(vm_offset_t va)
48ffc236 633{
b12defdc
MD
634 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT +
635 NPML4EPGSHIFT)) - 1);
48ffc236
JG
636
637 return (PDmap + ((va >> PDRSHIFT) & mask));
638}
c8fe38ae 639
701c977e
MD
640/*
641 * KVM - return address of PTE slot in PT
642 */
643static __inline
644pt_entry_t *
645vtopte(vm_offset_t va)
646{
647 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT +
648 NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
649
650 return (PTmap + ((va >> PAGE_SHIFT) & mask));
651}
652
48ffc236 653static uint64_t
8e5ea5f7 654allocpages(vm_paddr_t *firstaddr, long n)
d7f50089 655{
48ffc236 656 uint64_t ret;
c8fe38ae
MD
657
658 ret = *firstaddr;
659 bzero((void *)ret, n * PAGE_SIZE);
660 *firstaddr += n * PAGE_SIZE;
661 return (ret);
d7f50089
YY
662}
663
bfc09ba0 664static
c8fe38ae
MD
665void
666create_pagetables(vm_paddr_t *firstaddr)
667{
8e5ea5f7 668 long i; /* must be 64 bits */
da23a592
MD
669 long nkpt_base;
670 long nkpt_phys;
33fb3ba1 671 int j;
c8fe38ae 672
ad54aa11
MD
673 /*
674 * We are running (mostly) V=P at this point
675 *
676 * Calculate NKPT - number of kernel page tables. We have to
677 * accomodoate prealloction of the vm_page_array, dump bitmap,
678 * MSGBUF_SIZE, and other stuff. Be generous.
679 *
680 * Maxmem is in pages.
33fb3ba1
MD
681 *
682 * ndmpdp is the number of 1GB pages we wish to map.
ad54aa11 683 */
86dae8f1
MD
684 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
685 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
686 ndmpdp = 4;
33fb3ba1 687 KKASSERT(ndmpdp <= NKPDPE * NPDEPG);
86dae8f1 688
da23a592
MD
689 /*
690 * Starting at the beginning of kvm (not KERNBASE).
691 */
692 nkpt_phys = (Maxmem * sizeof(struct vm_page) + NBPDR - 1) / NBPDR;
693 nkpt_phys += (Maxmem * sizeof(struct pv_entry) + NBPDR - 1) / NBPDR;
33fb3ba1
MD
694 nkpt_phys += ((nkpt + nkpt + 1 + NKPML4E + NKPDPE + NDMPML4E +
695 ndmpdp) + 511) / 512;
da23a592
MD
696 nkpt_phys += 128;
697
698 /*
699 * Starting at KERNBASE - map 2G worth of page table pages.
700 * KERNBASE is offset -2G from the end of kvm.
701 */
702 nkpt_base = (NPDPEPG - KPDPI) * NPTEPG; /* typically 2 x 512 */
c8fe38ae 703
ad54aa11
MD
704 /*
705 * Allocate pages
706 */
da23a592
MD
707 KPTbase = allocpages(firstaddr, nkpt_base);
708 KPTphys = allocpages(firstaddr, nkpt_phys);
48ffc236
JG
709 KPML4phys = allocpages(firstaddr, 1);
710 KPDPphys = allocpages(firstaddr, NKPML4E);
da23a592 711 KPDphys = allocpages(firstaddr, NKPDPE);
791c6551
MD
712
713 /*
714 * Calculate the page directory base for KERNBASE,
715 * that is where we start populating the page table pages.
716 * Basically this is the end - 2.
717 */
791c6551 718 KPDbase = KPDphys + ((NKPDPE - (NPDPEPG - KPDPI)) << PAGE_SHIFT);
48ffc236 719
48ffc236
JG
720 DMPDPphys = allocpages(firstaddr, NDMPML4E);
721 if ((amd_feature & AMDID_PAGE1GB) == 0)
722 DMPDphys = allocpages(firstaddr, ndmpdp);
723 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
724
791c6551
MD
725 /*
726 * Fill in the underlying page table pages for the area around
727 * KERNBASE. This remaps low physical memory to KERNBASE.
728 *
729 * Read-only from zero to physfree
730 * XXX not fully used, underneath 2M pages
731 */
48ffc236 732 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
791c6551 733 ((pt_entry_t *)KPTbase)[i] = i << PAGE_SHIFT;
a86ce0cd
MD
734 ((pt_entry_t *)KPTbase)[i] |=
735 pmap_bits_default[PG_RW_IDX] |
736 pmap_bits_default[PG_V_IDX] |
737 pmap_bits_default[PG_G_IDX];
48ffc236
JG
738 }
739
791c6551
MD
740 /*
741 * Now map the initial kernel page tables. One block of page
742 * tables is placed at the beginning of kernel virtual memory,
743 * and another block is placed at KERNBASE to map the kernel binary,
744 * data, bss, and initial pre-allocations.
745 */
da23a592 746 for (i = 0; i < nkpt_base; i++) {
791c6551 747 ((pd_entry_t *)KPDbase)[i] = KPTbase + (i << PAGE_SHIFT);
a86ce0cd
MD
748 ((pd_entry_t *)KPDbase)[i] |=
749 pmap_bits_default[PG_RW_IDX] |
750 pmap_bits_default[PG_V_IDX];
791c6551 751 }
da23a592 752 for (i = 0; i < nkpt_phys; i++) {
48ffc236 753 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
a86ce0cd
MD
754 ((pd_entry_t *)KPDphys)[i] |=
755 pmap_bits_default[PG_RW_IDX] |
756 pmap_bits_default[PG_V_IDX];
48ffc236
JG
757 }
758
791c6551
MD
759 /*
760 * Map from zero to end of allocations using 2M pages as an
761 * optimization. This will bypass some of the KPTBase pages
762 * above in the KERNBASE area.
763 */
48ffc236 764 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
791c6551 765 ((pd_entry_t *)KPDbase)[i] = i << PDRSHIFT;
a86ce0cd
MD
766 ((pd_entry_t *)KPDbase)[i] |=
767 pmap_bits_default[PG_RW_IDX] |
768 pmap_bits_default[PG_V_IDX] |
769 pmap_bits_default[PG_PS_IDX] |
770 pmap_bits_default[PG_G_IDX];
48ffc236
JG
771 }
772
791c6551
MD
773 /*
774 * And connect up the PD to the PDP. The kernel pmap is expected
775 * to pre-populate all of its PDs. See NKPDPE in vmparam.h.
776 */
48ffc236 777 for (i = 0; i < NKPDPE; i++) {
791c6551
MD
778 ((pdp_entry_t *)KPDPphys)[NPDPEPG - NKPDPE + i] =
779 KPDphys + (i << PAGE_SHIFT);
780 ((pdp_entry_t *)KPDPphys)[NPDPEPG - NKPDPE + i] |=
a86ce0cd
MD
781 pmap_bits_default[PG_RW_IDX] |
782 pmap_bits_default[PG_V_IDX] |
783 pmap_bits_default[PG_U_IDX];
48ffc236
JG
784 }
785
33fb3ba1
MD
786 /*
787 * Now set up the direct map space using either 2MB or 1GB pages
788 * Preset PG_M and PG_A because demotion expects it.
789 *
790 * When filling in entries in the PD pages make sure any excess
791 * entries are set to zero as we allocated enough PD pages
792 */
48ffc236
JG
793 if ((amd_feature & AMDID_PAGE1GB) == 0) {
794 for (i = 0; i < NPDEPG * ndmpdp; i++) {
8e5ea5f7 795 ((pd_entry_t *)DMPDphys)[i] = i << PDRSHIFT;
a86ce0cd
MD
796 ((pd_entry_t *)DMPDphys)[i] |=
797 pmap_bits_default[PG_RW_IDX] |
798 pmap_bits_default[PG_V_IDX] |
799 pmap_bits_default[PG_PS_IDX] |
800 pmap_bits_default[PG_G_IDX] |
801 pmap_bits_default[PG_M_IDX] |
802 pmap_bits_default[PG_A_IDX];
48ffc236 803 }
33fb3ba1
MD
804
805 /*
806 * And the direct map space's PDP
807 */
48ffc236
JG
808 for (i = 0; i < ndmpdp; i++) {
809 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
33fb3ba1 810 (i << PAGE_SHIFT);
a86ce0cd
MD
811 ((pdp_entry_t *)DMPDPphys)[i] |=
812 pmap_bits_default[PG_RW_IDX] |
813 pmap_bits_default[PG_V_IDX] |
814 pmap_bits_default[PG_U_IDX];
48ffc236
JG
815 }
816 } else {
817 for (i = 0; i < ndmpdp; i++) {
818 ((pdp_entry_t *)DMPDPphys)[i] =
33fb3ba1 819 (vm_paddr_t)i << PDPSHIFT;
a86ce0cd
MD
820 ((pdp_entry_t *)DMPDPphys)[i] |=
821 pmap_bits_default[PG_RW_IDX] |
822 pmap_bits_default[PG_V_IDX] |
823 pmap_bits_default[PG_PS_IDX] |
824 pmap_bits_default[PG_G_IDX] |
825 pmap_bits_default[PG_M_IDX] |
826 pmap_bits_default[PG_A_IDX];
48ffc236
JG
827 }
828 }
829
830 /* And recursively map PML4 to itself in order to get PTmap */
831 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
a86ce0cd
MD
832 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |=
833 pmap_bits_default[PG_RW_IDX] |
834 pmap_bits_default[PG_V_IDX] |
835 pmap_bits_default[PG_U_IDX];
48ffc236 836
33fb3ba1
MD
837 /*
838 * Connect the Direct Map slots up to the PML4
839 */
840 for (j = 0; j < NDMPML4E; ++j) {
841 ((pdp_entry_t *)KPML4phys)[DMPML4I + j] =
a86ce0cd
MD
842 (DMPDPphys + ((vm_paddr_t)j << PML4SHIFT)) |
843 pmap_bits_default[PG_RW_IDX] |
844 pmap_bits_default[PG_V_IDX] |
845 pmap_bits_default[PG_U_IDX];
33fb3ba1 846 }
48ffc236 847
33fb3ba1
MD
848 /*
849 * Connect the KVA slot up to the PML4
850 */
48ffc236 851 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
a86ce0cd
MD
852 ((pdp_entry_t *)KPML4phys)[KPML4I] |=
853 pmap_bits_default[PG_RW_IDX] |
854 pmap_bits_default[PG_V_IDX] |
855 pmap_bits_default[PG_U_IDX];
c8fe38ae
MD
856}
857
d7f50089 858/*
c8fe38ae
MD
859 * Bootstrap the system enough to run with virtual memory.
860 *
861 * On the i386 this is called after mapping has already been enabled
862 * and just syncs the pmap module with what has already been done.
863 * [We can't call it easily with mapping off since the kernel is not
864 * mapped with PA == VA, hence we would have to relocate every address
865 * from the linked base (virtual) address "KERNBASE" to the actual
866 * (physical) address starting relative to 0]
d7f50089
YY
867 */
868void
48ffc236 869pmap_bootstrap(vm_paddr_t *firstaddr)
c8fe38ae
MD
870{
871 vm_offset_t va;
872 pt_entry_t *pte;
c8fe38ae 873
48ffc236
JG
874 KvaStart = VM_MIN_KERNEL_ADDRESS;
875 KvaEnd = VM_MAX_KERNEL_ADDRESS;
876 KvaSize = KvaEnd - KvaStart;
877
c8fe38ae
MD
878 avail_start = *firstaddr;
879
880 /*
48ffc236 881 * Create an initial set of page tables to run the kernel in.
c8fe38ae 882 */
48ffc236
JG
883 create_pagetables(firstaddr);
884
791c6551
MD
885 virtual2_start = KvaStart;
886 virtual2_end = PTOV_OFFSET;
887
c8fe38ae
MD
888 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
889 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
890
891 virtual_end = VM_MAX_KERNEL_ADDRESS;
892
893 /* XXX do %cr0 as well */
894 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
895 load_cr3(KPML4phys);
c8fe38ae
MD
896
897 /*
898 * Initialize protection array.
899 */
900 i386_protection_init();
901
902 /*
903 * The kernel's pmap is statically allocated so we don't have to use
904 * pmap_create, which is unlikely to work correctly at this part of
905 * the boot sequence (XXX and which no longer exists).
906 */
48ffc236 907 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae 908 kernel_pmap.pm_count = 1;
c2fb025d 909 kernel_pmap.pm_active = (cpumask_t)-1 & ~CPUMASK_LOCK;
701c977e 910 RB_INIT(&kernel_pmap.pm_pvroot);
b12defdc
MD
911 spin_init(&kernel_pmap.pm_spin);
912 lwkt_token_init(&kernel_pmap.pm_token, "kpmap_tok");
c8fe38ae
MD
913
914 /*
915 * Reserve some special page table entries/VA space for temporary
916 * mapping of pages.
917 */
918#define SYSMAP(c, p, v, n) \
919 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
920
921 va = virtual_start;
48ffc236 922 pte = vtopte(va);
c8fe38ae
MD
923
924 /*
925 * CMAP1/CMAP2 are used for zeroing and copying pages.
926 */
927 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
928
929 /*
930 * Crashdump maps.
931 */
932 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
933
934 /*
935 * ptvmmap is used for reading arbitrary physical pages via
936 * /dev/mem.
937 */
938 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
939
940 /*
941 * msgbufp is used to map the system message buffer.
942 * XXX msgbufmap is not used.
943 */
944 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
945 atop(round_page(MSGBUF_SIZE)))
946
947 virtual_start = va;
948
949 *CMAP1 = 0;
c8fe38ae
MD
950
951 /*
952 * PG_G is terribly broken on SMP because we IPI invltlb's in some
953 * cases rather then invl1pg. Actually, I don't even know why it
954 * works under UP because self-referential page table mappings
955 */
a86ce0cd 956// pgeflag = 0;
1918fc5c 957
c8fe38ae
MD
958/*
959 * Initialize the 4MB page size flag
960 */
a86ce0cd 961// pseflag = 0;
c8fe38ae
MD
962/*
963 * The 4MB page version of the initial
964 * kernel page mapping.
965 */
966 pdir4mb = 0;
967
968#if !defined(DISABLE_PSE)
969 if (cpu_feature & CPUID_PSE) {
970 pt_entry_t ptditmp;
971 /*
972 * Note that we have enabled PSE mode
973 */
a86ce0cd 974// pseflag = kernel_pmap.pmap_bits[PG_PS_IDX];
b2b3ffcd 975 ptditmp = *(PTmap + x86_64_btop(KERNBASE));
c8fe38ae 976 ptditmp &= ~(NBPDR - 1);
a86ce0cd
MD
977 ptditmp |= pmap_bits_default[PG_V_IDX] |
978 pmap_bits_default[PG_RW_IDX] |
979 pmap_bits_default[PG_PS_IDX] |
980 pmap_bits_default[PG_U_IDX];
981// pgeflag;
c8fe38ae 982 pdir4mb = ptditmp;
c8fe38ae
MD
983 }
984#endif
c8fe38ae 985 cpu_invltlb();
b524ca76
MD
986
987 /* Initialize the PAT MSR */
988 pmap_init_pat();
a86ce0cd
MD
989
990 pmap_pinit_defaults(&kernel_pmap);
b524ca76
MD
991}
992
993/*
994 * Setup the PAT MSR.
995 */
996void
997pmap_init_pat(void)
998{
999 uint64_t pat_msr;
1000 u_long cr0, cr4;
1001
1002 /*
1003 * Default values mapping PATi,PCD,PWT bits at system reset.
1004 * The default values effectively ignore the PATi bit by
1005 * repeating the encodings for 0-3 in 4-7, and map the PCD
1006 * and PWT bit combinations to the expected PAT types.
1007 */
1008 pat_msr = PAT_VALUE(0, PAT_WRITE_BACK) | /* 000 */
1009 PAT_VALUE(1, PAT_WRITE_THROUGH) | /* 001 */
1010 PAT_VALUE(2, PAT_UNCACHED) | /* 010 */
1011 PAT_VALUE(3, PAT_UNCACHEABLE) | /* 011 */
1012 PAT_VALUE(4, PAT_WRITE_BACK) | /* 100 */
1013 PAT_VALUE(5, PAT_WRITE_THROUGH) | /* 101 */
1014 PAT_VALUE(6, PAT_UNCACHED) | /* 110 */
1015 PAT_VALUE(7, PAT_UNCACHEABLE); /* 111 */
1016 pat_pte_index[PAT_WRITE_BACK] = 0;
a86ce0cd
MD
1017 pat_pte_index[PAT_WRITE_THROUGH]= 0 | X86_PG_NC_PWT;
1018 pat_pte_index[PAT_UNCACHED] = X86_PG_NC_PCD;
1019 pat_pte_index[PAT_UNCACHEABLE] = X86_PG_NC_PCD | X86_PG_NC_PWT;
b524ca76
MD
1020 pat_pte_index[PAT_WRITE_PROTECTED] = pat_pte_index[PAT_UNCACHEABLE];
1021 pat_pte_index[PAT_WRITE_COMBINING] = pat_pte_index[PAT_UNCACHEABLE];
1022
1023 if (cpu_feature & CPUID_PAT) {
1024 /*
1025 * If we support the PAT then set-up entries for
1026 * WRITE_PROTECTED and WRITE_COMBINING using bit patterns
1027 * 4 and 5.
1028 */
1029 pat_msr = (pat_msr & ~PAT_MASK(4)) |
1030 PAT_VALUE(4, PAT_WRITE_PROTECTED);
1031 pat_msr = (pat_msr & ~PAT_MASK(5)) |
1032 PAT_VALUE(5, PAT_WRITE_COMBINING);
a86ce0cd
MD
1033 pat_pte_index[PAT_WRITE_PROTECTED] = X86_PG_PTE_PAT | 0;
1034 pat_pte_index[PAT_WRITE_COMBINING] = X86_PG_PTE_PAT | X86_PG_NC_PWT;
b524ca76
MD
1035
1036 /*
1037 * Then enable the PAT
1038 */
1039
1040 /* Disable PGE. */
1041 cr4 = rcr4();
1042 load_cr4(cr4 & ~CR4_PGE);
1043
1044 /* Disable caches (CD = 1, NW = 0). */
1045 cr0 = rcr0();
1046 load_cr0((cr0 & ~CR0_NW) | CR0_CD);
1047
1048 /* Flushes caches and TLBs. */
1049 wbinvd();
1050 cpu_invltlb();
1051
1052 /* Update PAT and index table. */
1053 wrmsr(MSR_PAT, pat_msr);
1054
1055 /* Flush caches and TLBs again. */
1056 wbinvd();
1057 cpu_invltlb();
1058
1059 /* Restore caches and PGE. */
1060 load_cr0(cr0);
1061 load_cr4(cr4);
1062 PatMsr = pat_msr;
1063 }
d7f50089
YY
1064}
1065
1066/*
c8fe38ae 1067 * Set 4mb pdir for mp startup
d7f50089
YY
1068 */
1069void
c8fe38ae
MD
1070pmap_set_opt(void)
1071{
a86ce0cd 1072 if (cpu_feature & CPUID_PSE) {
c8fe38ae
MD
1073 load_cr4(rcr4() | CR4_PSE);
1074 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
c8fe38ae
MD
1075 cpu_invltlb();
1076 }
1077 }
d7f50089
YY
1078}
1079
c8fe38ae
MD
1080/*
1081 * Initialize the pmap module.
1082 * Called by vm_init, to initialize any structures that the pmap
1083 * system needs to map virtual memory.
1084 * pmap_init has been enhanced to support in a fairly consistant
1085 * way, discontiguous physical memory.
d7f50089
YY
1086 */
1087void
c8fe38ae 1088pmap_init(void)
d7f50089 1089{
c8fe38ae
MD
1090 int i;
1091 int initial_pvs;
1092
1093 /*
c8fe38ae
MD
1094 * Allocate memory for random pmap data structures. Includes the
1095 * pv_head_table.
1096 */
1097
701c977e 1098 for (i = 0; i < vm_page_array_size; i++) {
c8fe38ae
MD
1099 vm_page_t m;
1100
1101 m = &vm_page_array[i];
1102 TAILQ_INIT(&m->md.pv_list);
c8fe38ae
MD
1103 }
1104
1105 /*
1106 * init the pv free list
1107 */
1108 initial_pvs = vm_page_array_size;
1109 if (initial_pvs < MINPV)
1110 initial_pvs = MINPV;
1111 pvzone = &pvzone_store;
948209ce
MD
1112 pvinit = (void *)kmem_alloc(&kernel_map,
1113 initial_pvs * sizeof (struct pv_entry));
1114 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry),
1115 pvinit, initial_pvs);
c8fe38ae
MD
1116
1117 /*
1118 * Now it is safe to enable pv_table recording.
1119 */
1120 pmap_initialized = TRUE;
d7f50089
YY
1121}
1122
c8fe38ae
MD
1123/*
1124 * Initialize the address space (zone) for the pv_entries. Set a
1125 * high water mark so that the system can recover from excessive
1126 * numbers of pv entries.
1127 */
d7f50089 1128void
c8fe38ae 1129pmap_init2(void)
d7f50089 1130{
c8fe38ae 1131 int shpgperproc = PMAP_SHPGPERPROC;
948209ce 1132 int entry_max;
c8fe38ae
MD
1133
1134 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
1135 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
1136 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
1137 pv_entry_high_water = 9 * (pv_entry_max / 10);
948209ce
MD
1138
1139 /*
1140 * Subtract out pages already installed in the zone (hack)
1141 */
1142 entry_max = pv_entry_max - vm_page_array_size;
1143 if (entry_max <= 0)
1144 entry_max = 1;
1145
1146 zinitna(pvzone, &pvzone_obj, NULL, 0, entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
1147}
1148
9e5e1578
MD
1149/*
1150 * Typically used to initialize a fictitious page by vm/device_pager.c
1151 */
1152void
1153pmap_page_init(struct vm_page *m)
1154{
1155 vm_page_init(m);
1156 TAILQ_INIT(&m->md.pv_list);
1157}
c8fe38ae
MD
1158
1159/***************************************************
1160 * Low level helper routines.....
1161 ***************************************************/
1162
c8fe38ae
MD
1163/*
1164 * this routine defines the region(s) of memory that should
1165 * not be tested for the modified bit.
1166 */
bfc09ba0
MD
1167static __inline
1168int
701c977e 1169pmap_track_modified(vm_pindex_t pindex)
d7f50089 1170{
701c977e 1171 vm_offset_t va = (vm_offset_t)pindex << PAGE_SHIFT;
c8fe38ae
MD
1172 if ((va < clean_sva) || (va >= clean_eva))
1173 return 1;
1174 else
1175 return 0;
d7f50089
YY
1176}
1177
d7f50089 1178/*
10d6182e 1179 * Extract the physical page address associated with the map/VA pair.
701c977e 1180 * The page must be wired for this to work reliably.
c8fe38ae 1181 *
701c977e
MD
1182 * XXX for the moment we're using pv_find() instead of pv_get(), as
1183 * callers might be expecting non-blocking operation.
d7f50089 1184 */
c8fe38ae
MD
1185vm_paddr_t
1186pmap_extract(pmap_t pmap, vm_offset_t va)
d7f50089 1187{
48ffc236 1188 vm_paddr_t rtval;
701c977e
MD
1189 pv_entry_t pt_pv;
1190 pt_entry_t *ptep;
c8fe38ae 1191
48ffc236 1192 rtval = 0;
701c977e
MD
1193 if (va >= VM_MAX_USER_ADDRESS) {
1194 /*
1195 * Kernel page directories might be direct-mapped and
1196 * there is typically no PV tracking of pte's
1197 */
1198 pd_entry_t *pt;
1199
1200 pt = pmap_pt(pmap, va);
a86ce0cd
MD
1201 if (pt && (*pt & pmap->pmap_bits[PG_V_IDX])) {
1202 if (*pt & pmap->pmap_bits[PG_PS_IDX]) {
701c977e
MD
1203 rtval = *pt & PG_PS_FRAME;
1204 rtval |= va & PDRMASK;
48ffc236 1205 } else {
eb010d6e 1206 ptep = pmap_pt_to_pte(*pt, va);
a86ce0cd 1207 if (*pt & pmap->pmap_bits[PG_V_IDX]) {
701c977e
MD
1208 rtval = *ptep & PG_FRAME;
1209 rtval |= va & PAGE_MASK;
1210 }
1211 }
1212 }
1213 } else {
1214 /*
1215 * User pages currently do not direct-map the page directory
1216 * and some pages might not used managed PVs. But all PT's
1217 * will have a PV.
1218 */
1219 pt_pv = pv_find(pmap, pmap_pt_pindex(va));
1220 if (pt_pv) {
1221 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
a86ce0cd 1222 if (*ptep & pmap->pmap_bits[PG_V_IDX]) {
701c977e
MD
1223 rtval = *ptep & PG_FRAME;
1224 rtval |= va & PAGE_MASK;
48ffc236 1225 }
701c977e 1226 pv_drop(pt_pv);
c8fe38ae 1227 }
c8fe38ae 1228 }
48ffc236
JG
1229 return rtval;
1230}
1231
1232/*
a86ce0cd
MD
1233 * Similar to extract but checks protections, SMP-friendly short-cut for
1234 * vm_fault_page[_quick](). Can return NULL to cause the caller to
1235 * fall-through to the real fault code.
1236 *
1237 * The returned page, if not NULL, is held (and not busied).
1238 */
1239vm_page_t
1240pmap_fault_page_quick(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
1241{
1242 if (pmap && va < VM_MAX_USER_ADDRESS) {
1243 pv_entry_t pt_pv;
1244 pv_entry_t pte_pv;
1245 pt_entry_t *ptep;
1246 pt_entry_t req;
1247 vm_page_t m;
1248 int error;
1249
1250 req = pmap->pmap_bits[PG_V_IDX] |
1251 pmap->pmap_bits[PG_U_IDX];
1252 if (prot & VM_PROT_WRITE)
1253 req |= pmap->pmap_bits[PG_RW_IDX];
1254
1255 pt_pv = pv_find(pmap, pmap_pt_pindex(va));
1256 if (pt_pv == NULL)
1257 return (NULL);
1258 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(va));
1259 if ((*ptep & req) != req) {
1260 pv_drop(pt_pv);
1261 return (NULL);
1262 }
1263 pte_pv = pv_get_try(pmap, pmap_pte_pindex(va), &error);
1264 if (pte_pv && error == 0) {
1265 m = pte_pv->pv_m;
1266 vm_page_hold(m);
1267 if (prot & VM_PROT_WRITE)
1268 vm_page_dirty(m);
1269 pv_put(pte_pv);
1270 } else if (pte_pv) {
1271 pv_drop(pte_pv);
1272 m = NULL;
1273 } else {
1274 m = NULL;
1275 }
1276 pv_drop(pt_pv);
1277 return(m);
1278 } else {
1279 return(NULL);
1280 }
1281}
1282
1283/*
10d6182e 1284 * Extract the physical page address associated kernel virtual address.
48ffc236
JG
1285 */
1286vm_paddr_t
1287pmap_kextract(vm_offset_t va)
48ffc236 1288{
701c977e 1289 pd_entry_t pt; /* pt entry in pd */
48ffc236
JG
1290 vm_paddr_t pa;
1291
1292 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
1293 pa = DMAP_TO_PHYS(va);
1294 } else {
701c977e 1295 pt = *vtopt(va);
a86ce0cd 1296 if (pt & kernel_pmap.pmap_bits[PG_PS_IDX]) {
701c977e 1297 pa = (pt & PG_PS_FRAME) | (va & PDRMASK);
48ffc236
JG
1298 } else {
1299 /*
1300 * Beware of a concurrent promotion that changes the
1301 * PDE at this point! For example, vtopte() must not
1302 * be used to access the PTE because it would use the
1303 * new PDE. It is, however, safe to use the old PDE
1304 * because the page table page is preserved by the
1305 * promotion.
1306 */
eb010d6e 1307 pa = *pmap_pt_to_pte(pt, va);
48ffc236
JG
1308 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
1309 }
1310 }
1311 return pa;
d7f50089
YY
1312}
1313
c8fe38ae
MD
1314/***************************************************
1315 * Low level mapping routines.....
1316 ***************************************************/
1317
d7f50089 1318/*
c8fe38ae
MD
1319 * Routine: pmap_kenter
1320 * Function:
1321 * Add a wired page to the KVA
1322 * NOTE! note that in order for the mapping to take effect -- you
1323 * should do an invltlb after doing the pmap_kenter().
d7f50089 1324 */
c8fe38ae 1325void
d7f50089
YY
1326pmap_kenter(vm_offset_t va, vm_paddr_t pa)
1327{
c8fe38ae
MD
1328 pt_entry_t *pte;
1329 pt_entry_t npte;
1330 pmap_inval_info info;
1331
701c977e 1332 pmap_inval_init(&info); /* XXX remove */
a86ce0cd
MD
1333 npte = pa |
1334 kernel_pmap.pmap_bits[PG_RW_IDX] |
1335 kernel_pmap.pmap_bits[PG_V_IDX];
1336// pgeflag;
c8fe38ae 1337 pte = vtopte(va);
701c977e 1338 pmap_inval_interlock(&info, &kernel_pmap, va); /* XXX remove */
c8fe38ae 1339 *pte = npte;
701c977e
MD
1340 pmap_inval_deinterlock(&info, &kernel_pmap); /* XXX remove */
1341 pmap_inval_done(&info); /* XXX remove */
d7f50089
YY
1342}
1343
1344/*
c8fe38ae
MD
1345 * Routine: pmap_kenter_quick
1346 * Function:
1347 * Similar to pmap_kenter(), except we only invalidate the
1348 * mapping on the current CPU.
d7f50089
YY
1349 */
1350void
c8fe38ae
MD
1351pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
1352{
1353 pt_entry_t *pte;
1354 pt_entry_t npte;
1355
a86ce0cd
MD
1356 npte = pa |
1357 kernel_pmap.pmap_bits[PG_RW_IDX] |
1358 kernel_pmap.pmap_bits[PG_V_IDX];
1359// pgeflag;
c8fe38ae
MD
1360 pte = vtopte(va);
1361 *pte = npte;
1362 cpu_invlpg((void *)va);
1363}
1364
1365void
d7f50089
YY
1366pmap_kenter_sync(vm_offset_t va)
1367{
c8fe38ae
MD
1368 pmap_inval_info info;
1369
1370 pmap_inval_init(&info);
c2fb025d
MD
1371 pmap_inval_interlock(&info, &kernel_pmap, va);
1372 pmap_inval_deinterlock(&info, &kernel_pmap);
1373 pmap_inval_done(&info);
d7f50089
YY
1374}
1375
d7f50089
YY
1376void
1377pmap_kenter_sync_quick(vm_offset_t va)
1378{
c8fe38ae 1379 cpu_invlpg((void *)va);
d7f50089
YY
1380}
1381
d7f50089 1382/*
c8fe38ae 1383 * remove a page from the kernel pagetables
d7f50089
YY
1384 */
1385void
c8fe38ae 1386pmap_kremove(vm_offset_t va)
d7f50089 1387{
c8fe38ae
MD
1388 pt_entry_t *pte;
1389 pmap_inval_info info;
1390
1391 pmap_inval_init(&info);
1392 pte = vtopte(va);
c2fb025d 1393 pmap_inval_interlock(&info, &kernel_pmap, va);
52bb73bc 1394 (void)pte_load_clear(pte);
c2fb025d
MD
1395 pmap_inval_deinterlock(&info, &kernel_pmap);
1396 pmap_inval_done(&info);
c8fe38ae
MD
1397}
1398
1399void
1400pmap_kremove_quick(vm_offset_t va)
1401{
1402 pt_entry_t *pte;
1403 pte = vtopte(va);
52bb73bc 1404 (void)pte_load_clear(pte);
c8fe38ae 1405 cpu_invlpg((void *)va);
d7f50089
YY
1406}
1407
1408/*
c8fe38ae 1409 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
1410 */
1411void
c8fe38ae 1412pmap_kmodify_rw(vm_offset_t va)
d7f50089 1413{
a86ce0cd 1414 atomic_set_long(vtopte(va), kernel_pmap.pmap_bits[PG_RW_IDX]);
c8fe38ae 1415 cpu_invlpg((void *)va);
d7f50089
YY
1416}
1417
a86ce0cd 1418/* NOT USED
c8fe38ae
MD
1419void
1420pmap_kmodify_nc(vm_offset_t va)
1421{
701c977e 1422 atomic_set_long(vtopte(va), PG_N);
c8fe38ae
MD
1423 cpu_invlpg((void *)va);
1424}
a86ce0cd 1425*/
d7f50089
YY
1426
1427/*
ad54aa11
MD
1428 * Used to map a range of physical addresses into kernel virtual
1429 * address space during the low level boot, typically to map the
1430 * dump bitmap, message buffer, and vm_page_array.
c8fe38ae 1431 *
ad54aa11
MD
1432 * These mappings are typically made at some pointer after the end of the
1433 * kernel text+data.
1434 *
1435 * We could return PHYS_TO_DMAP(start) here and not allocate any
1436 * via (*virtp), but then kmem from userland and kernel dumps won't
1437 * have access to the related pointers.
d7f50089
YY
1438 */
1439vm_offset_t
8e5e6f1b 1440pmap_map(vm_offset_t *virtp, vm_paddr_t start, vm_paddr_t end, int prot)
d7f50089 1441{
ad54aa11
MD
1442 vm_offset_t va;
1443 vm_offset_t va_start;
1444
1445 /*return PHYS_TO_DMAP(start);*/
1446
1447 va_start = *virtp;
1448 va = va_start;
1449
1450 while (start < end) {
1451 pmap_kenter_quick(va, start);
1452 va += PAGE_SIZE;
1453 start += PAGE_SIZE;
1454 }
1455 *virtp = va;
1456 return va_start;
d7f50089
YY
1457}
1458
c174861d
FT
1459#define PMAP_CLFLUSH_THRESHOLD (2 * 1024 * 1024)
1460
1461/*
1462 * Remove the specified set of pages from the data and instruction caches.
1463 *
1464 * In contrast to pmap_invalidate_cache_range(), this function does not
1465 * rely on the CPU's self-snoop feature, because it is intended for use
1466 * when moving pages into a different cache domain.
1467 */
1468void
1469pmap_invalidate_cache_pages(vm_page_t *pages, int count)
1470{
1471 vm_offset_t daddr, eva;
1472 int i;
1473
1474 if (count >= PMAP_CLFLUSH_THRESHOLD / PAGE_SIZE ||
1475 (cpu_feature & CPUID_CLFSH) == 0)
1476 wbinvd();
1477 else {
1478 cpu_mfence();
1479 for (i = 0; i < count; i++) {
1480 daddr = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(pages[i]));
1481 eva = daddr + PAGE_SIZE;
1482 for (; daddr < eva; daddr += cpu_clflush_line_size)
1483 clflush(daddr);
1484 }
1485 cpu_mfence();
1486 }
1487}
1488
300a6373
JH
1489void
1490pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva)
1491{
fd300b3d
FT
1492 KASSERT((sva & PAGE_MASK) == 0,
1493 ("pmap_invalidate_cache_range: sva not page-aligned"));
1494 KASSERT((eva & PAGE_MASK) == 0,
1495 ("pmap_invalidate_cache_range: eva not page-aligned"));
1496
1497 if (cpu_feature & CPUID_SS) {
1498 ; /* If "Self Snoop" is supported, do nothing. */
1499 } else {
1500 /* Globally invalidate caches */
1501 cpu_wbinvd_on_all_cpus();
1502 }
300a6373
JH
1503}
1504void
1505pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1506{
d2f7c303 1507 smp_invlpg_range(pmap->pm_active, sva, eva);
300a6373 1508}
c8fe38ae 1509
d7f50089 1510/*
c8fe38ae
MD
1511 * Add a list of wired pages to the kva
1512 * this routine is only used for temporary
1513 * kernel mappings that do not need to have
1514 * page modification or references recorded.
1515 * Note that old mappings are simply written
1516 * over. The page *must* be wired.
d7f50089
YY
1517 */
1518void
c8fe38ae 1519pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
d7f50089 1520{
c8fe38ae
MD
1521 vm_offset_t end_va;
1522
1523 end_va = va + count * PAGE_SIZE;
1524
1525 while (va < end_va) {
1526 pt_entry_t *pte;
1527
1528 pte = vtopte(va);
a86ce0cd
MD
1529 *pte = VM_PAGE_TO_PHYS(*m) |
1530 kernel_pmap.pmap_bits[PG_RW_IDX] |
1531 kernel_pmap.pmap_bits[PG_V_IDX] |
1532 kernel_pmap.pmap_cache_bits[(*m)->pat_mode];
1533// pgeflag;
c8fe38ae
MD
1534 cpu_invlpg((void *)va);
1535 va += PAGE_SIZE;
1536 m++;
1537 }
7d4d6fdb 1538 smp_invltlb();
c8fe38ae
MD
1539}
1540
d7f50089 1541/*
7155fc7d 1542 * This routine jerks page mappings from the
c8fe38ae 1543 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1544 *
1545 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1546 */
c8fe38ae
MD
1547void
1548pmap_qremove(vm_offset_t va, int count)
d7f50089 1549{
c8fe38ae
MD
1550 vm_offset_t end_va;
1551
48ffc236 1552 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1553
1554 while (va < end_va) {
1555 pt_entry_t *pte;
1556
1557 pte = vtopte(va);
52bb73bc 1558 (void)pte_load_clear(pte);
c8fe38ae
MD
1559 cpu_invlpg((void *)va);
1560 va += PAGE_SIZE;
1561 }
c8fe38ae 1562 smp_invltlb();
d7f50089
YY
1563}
1564
1565/*
c8fe38ae
MD
1566 * Create a new thread and optionally associate it with a (new) process.
1567 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1568 */
1569void
c8fe38ae 1570pmap_init_thread(thread_t td)
d7f50089 1571{
d1368d1a 1572 /* enforce pcb placement & alignment */
c8fe38ae 1573 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
d1368d1a 1574 td->td_pcb = (struct pcb *)((intptr_t)td->td_pcb & ~(intptr_t)0xF);
c8fe38ae 1575 td->td_savefpu = &td->td_pcb->pcb_save;
d1368d1a 1576 td->td_sp = (char *)td->td_pcb; /* no -16 */
d7f50089
YY
1577}
1578
1579/*
c8fe38ae 1580 * This routine directly affects the fork perf for a process.
d7f50089
YY
1581 */
1582void
c8fe38ae 1583pmap_init_proc(struct proc *p)
d7f50089
YY
1584{
1585}
1586
a86ce0cd 1587static void
8e2efb11
MD
1588pmap_pinit_defaults(struct pmap *pmap)
1589{
1590 bcopy(pmap_bits_default, pmap->pmap_bits,
1591 sizeof(pmap_bits_default));
1592 bcopy(protection_codes, pmap->protection_codes,
1593 sizeof(protection_codes));
1594 bcopy(pat_pte_index, pmap->pmap_cache_bits,
1595 sizeof(pat_pte_index));
a86ce0cd
MD
1596 pmap->pmap_cache_mask = X86_PG_NC_PWT | X86_PG_NC_PCD | X86_PG_PTE_PAT;
1597 pmap->copyinstr = std_copyinstr;
1598 pmap->copyin = std_copyin;
1599 pmap->copyout = std_copyout;
1600 pmap->fubyte = std_fubyte;
1601 pmap->subyte = std_subyte;
1602 pmap->fuword = std_fuword;
1603 pmap->suword = std_suword;
1604 pmap->suword32 = std_suword32;
1605}
d7f50089 1606/*
c8fe38ae
MD
1607 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1608 * it, and IdlePTD, represents the template used to update all other pmaps.
1609 *
1610 * On architectures where the kernel pmap is not integrated into the user
1611 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1612 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1613 */
1614void
c8fe38ae 1615pmap_pinit0(struct pmap *pmap)
d7f50089 1616{
48ffc236 1617 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1618 pmap->pm_count = 1;
1619 pmap->pm_active = 0;
701c977e
MD
1620 pmap->pm_pvhint = NULL;
1621 RB_INIT(&pmap->pm_pvroot);
b12defdc
MD
1622 spin_init(&pmap->pm_spin);
1623 lwkt_token_init(&pmap->pm_token, "pmap_tok");
c8fe38ae 1624 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
a86ce0cd 1625 pmap_pinit_defaults(pmap);
d7f50089
YY
1626}
1627
1628/*
c8fe38ae
MD
1629 * Initialize a preallocated and zeroed pmap structure,
1630 * such as one in a vmspace structure.
d7f50089 1631 */
921c891e
MD
1632static void
1633pmap_pinit_simple(struct pmap *pmap)
d7f50089 1634{
701c977e
MD
1635 /*
1636 * Misc initialization
1637 */
1638 pmap->pm_count = 1;
1639 pmap->pm_active = 0;
1640 pmap->pm_pvhint = NULL;
921c891e
MD
1641 pmap->pm_flags = PMAP_FLAG_SIMPLE;
1642
a86ce0cd
MD
1643 pmap_pinit_defaults(pmap);
1644
921c891e
MD
1645 /*
1646 * Don't blow up locks/tokens on re-use (XXX fix/use drop code
1647 * for this).
1648 */
701c977e
MD
1649 if (pmap->pm_pmlpv == NULL) {
1650 RB_INIT(&pmap->pm_pvroot);
1651 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1652 spin_init(&pmap->pm_spin);
1653 lwkt_token_init(&pmap->pm_token, "pmap_tok");
1654 }
921c891e
MD
1655}
1656
1657void
1658pmap_pinit(struct pmap *pmap)
1659{
1660 pv_entry_t pv;
1661 int j;
1662
a86ce0cd
MD
1663 if (pmap->pm_pmlpv) {
1664 if (pmap->pmap_bits[TYPE_IDX] != REGULAR_PMAP) {
1665 pmap_puninit(pmap);
1666 }
1667 }
1668
921c891e
MD
1669 pmap_pinit_simple(pmap);
1670 pmap->pm_flags &= ~PMAP_FLAG_SIMPLE;
c8fe38ae
MD
1671
1672 /*
1673 * No need to allocate page table space yet but we do need a valid
1674 * page directory table.
1675 */
48ffc236
JG
1676 if (pmap->pm_pml4 == NULL) {
1677 pmap->pm_pml4 =
1678 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1679 }
1680
1681 /*
701c977e
MD
1682 * Allocate the page directory page, which wires it even though
1683 * it isn't being entered into some higher level page table (it
1684 * being the highest level). If one is already cached we don't
1685 * have to do anything.
c8fe38ae 1686 */
701c977e
MD
1687 if ((pv = pmap->pm_pmlpv) == NULL) {
1688 pv = pmap_allocpte(pmap, pmap_pml4_pindex(), NULL);
1689 pmap->pm_pmlpv = pv;
b12defdc 1690 pmap_kenter((vm_offset_t)pmap->pm_pml4,
701c977e
MD
1691 VM_PAGE_TO_PHYS(pv->pv_m));
1692 pv_put(pv);
33fb3ba1
MD
1693
1694 /*
1695 * Install DMAP and KMAP.
1696 */
1697 for (j = 0; j < NDMPML4E; ++j) {
1698 pmap->pm_pml4[DMPML4I + j] =
a86ce0cd
MD
1699 (DMPDPphys + ((vm_paddr_t)j << PML4SHIFT)) |
1700 pmap->pmap_bits[PG_RW_IDX] |
1701 pmap->pmap_bits[PG_V_IDX] |
1702 pmap->pmap_bits[PG_U_IDX];
33fb3ba1 1703 }
a86ce0cd
MD
1704 pmap->pm_pml4[KPML4I] = KPDPphys |
1705 pmap->pmap_bits[PG_RW_IDX] |
1706 pmap->pmap_bits[PG_V_IDX] |
1707 pmap->pmap_bits[PG_U_IDX];
701c977e 1708
33fb3ba1
MD
1709 /*
1710 * install self-referential address mapping entry
1711 */
701c977e 1712 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(pv->pv_m) |
a86ce0cd
MD
1713 pmap->pmap_bits[PG_V_IDX] |
1714 pmap->pmap_bits[PG_RW_IDX] |
1715 pmap->pmap_bits[PG_A_IDX] |
1716 pmap->pmap_bits[PG_M_IDX];
701c977e
MD
1717 } else {
1718 KKASSERT(pv->pv_m->flags & PG_MAPPED);
1719 KKASSERT(pv->pv_m->flags & PG_WRITEABLE);
b12defdc 1720 }
993bac44
MD
1721 KKASSERT(pmap->pm_pml4[255] == 0);
1722 KKASSERT(RB_ROOT(&pmap->pm_pvroot) == pv);
1723 KKASSERT(pv->pv_entry.rbe_left == NULL);
1724 KKASSERT(pv->pv_entry.rbe_right == NULL);
d7f50089
YY
1725}
1726
1727/*
c8fe38ae
MD
1728 * Clean up a pmap structure so it can be physically freed. This routine
1729 * is called by the vmspace dtor function. A great deal of pmap data is
1730 * left passively mapped to improve vmspace management so we have a bit
1731 * of cleanup work to do here.
d7f50089
YY
1732 */
1733void
c8fe38ae 1734pmap_puninit(pmap_t pmap)
d7f50089 1735{
701c977e 1736 pv_entry_t pv;
c8fe38ae
MD
1737 vm_page_t p;
1738
1739 KKASSERT(pmap->pm_active == 0);
701c977e
MD
1740 if ((pv = pmap->pm_pmlpv) != NULL) {
1741 if (pv_hold_try(pv) == 0)
1742 pv_lock(pv);
8e2efb11 1743 KKASSERT(pv == pmap->pm_pmlpv);
52bb73bc 1744 p = pmap_remove_pv_page(pv);
701c977e 1745 pv_free(pv);
48ffc236 1746 pmap_kremove((vm_offset_t)pmap->pm_pml4);
b12defdc 1747 vm_page_busy_wait(p, FALSE, "pgpun");
701c977e 1748 KKASSERT(p->flags & (PG_FICTITIOUS|PG_UNMANAGED));
b12defdc 1749 vm_page_unwire(p, 0);
701c977e
MD
1750 vm_page_flag_clear(p, PG_MAPPED | PG_WRITEABLE);
1751
1752 /*
1753 * XXX eventually clean out PML4 static entries and
1754 * use vm_page_free_zero()
1755 */
1756 vm_page_free(p);
1757 pmap->pm_pmlpv = NULL;
c8fe38ae 1758 }
48ffc236 1759 if (pmap->pm_pml4) {
bfc09ba0 1760 KKASSERT(pmap->pm_pml4 != (void *)(PTOV_OFFSET + KPML4phys));
48ffc236
JG
1761 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1762 pmap->pm_pml4 = NULL;
c8fe38ae 1763 }
701c977e
MD
1764 KKASSERT(pmap->pm_stats.resident_count == 0);
1765 KKASSERT(pmap->pm_stats.wired_count == 0);
d7f50089
YY
1766}
1767
1768/*
c8fe38ae
MD
1769 * Wire in kernel global address entries. To avoid a race condition
1770 * between pmap initialization and pmap_growkernel, this procedure
1771 * adds the pmap to the master list (which growkernel scans to update),
1772 * then copies the template.
d7f50089
YY
1773 */
1774void
c8fe38ae 1775pmap_pinit2(struct pmap *pmap)
d7f50089 1776{
b12defdc 1777 spin_lock(&pmap_spin);
c8fe38ae 1778 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
b12defdc 1779 spin_unlock(&pmap_spin);
d7f50089
YY
1780}
1781
1782/*
701c977e
MD
1783 * This routine is called when various levels in the page table need to
1784 * be populated. This routine cannot fail.
d7f50089 1785 *
701c977e
MD
1786 * This function returns two locked pv_entry's, one representing the
1787 * requested pv and one representing the requested pv's parent pv. If
1788 * the pv did not previously exist it will be mapped into its parent
1789 * and wired, otherwise no additional wire count will be added.
d7f50089 1790 */
bfc09ba0 1791static
701c977e
MD
1792pv_entry_t
1793pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex, pv_entry_t *pvpp)
d7f50089 1794{
701c977e
MD
1795 pt_entry_t *ptep;
1796 pv_entry_t pv;
1797 pv_entry_t pvp;
1798 vm_pindex_t pt_pindex;
1799 vm_page_t m;
1800 int isnew;
921c891e 1801 int ispt;
701c977e 1802
c8fe38ae 1803 /*
701c977e
MD
1804 * If the pv already exists and we aren't being asked for the
1805 * parent page table page we can just return it. A locked+held pv
8e2efb11
MD
1806 * is returned. The pv will also have a second hold related to the
1807 * pmap association that we don't have to worry about.
c8fe38ae 1808 */
921c891e 1809 ispt = 0;
701c977e
MD
1810 pv = pv_alloc(pmap, ptepindex, &isnew);
1811 if (isnew == 0 && pvpp == NULL)
1812 return(pv);
1813
1814 /*
701c977e
MD
1815 * Special case terminal PVs. These are not page table pages so
1816 * no vm_page is allocated (the caller supplied the vm_page). If
1817 * pvpp is non-NULL we are being asked to also removed the pt_pv
1818 * for this pv.
1819 *
1820 * Note that pt_pv's are only returned for user VAs. We assert that
1821 * a pt_pv is not being requested for kernel VAs.
1822 */
1823 if (ptepindex < pmap_pt_pindex(0)) {
1824 if (ptepindex >= NUPTE_USER)
1825 KKASSERT(pvpp == NULL);
1826 else
1827 KKASSERT(pvpp != NULL);
1828 if (pvpp) {
1829 pt_pindex = NUPTE_TOTAL + (ptepindex >> NPTEPGSHIFT);
1830 pvp = pmap_allocpte(pmap, pt_pindex, NULL);
1831 if (isnew)
1832 vm_page_wire_quick(pvp->pv_m);
1833 *pvpp = pvp;
1834 } else {
1835 pvp = NULL;
1836 }
1837 return(pv);
b12defdc 1838 }
c8fe38ae
MD
1839
1840 /*
701c977e
MD
1841 * Non-terminal PVs allocate a VM page to represent the page table,
1842 * so we have to resolve pvp and calculate ptepindex for the pvp
1843 * and then for the page table entry index in the pvp for
1844 * fall-through.
c8fe38ae 1845 */
701c977e 1846 if (ptepindex < pmap_pd_pindex(0)) {
4a4ea614 1847 /*
701c977e 1848 * pv is PT, pvp is PD
4a4ea614 1849 */
701c977e
MD
1850 ptepindex = (ptepindex - pmap_pt_pindex(0)) >> NPDEPGSHIFT;
1851 ptepindex += NUPTE_TOTAL + NUPT_TOTAL;
1852 pvp = pmap_allocpte(pmap, ptepindex, NULL);
1853 if (!isnew)
1854 goto notnew;
1855
1b2e0b92 1856 /*
701c977e 1857 * PT index in PD
1b2e0b92 1858 */
701c977e
MD
1859 ptepindex = pv->pv_pindex - pmap_pt_pindex(0);
1860 ptepindex &= ((1ul << NPDEPGSHIFT) - 1);
921c891e 1861 ispt = 1;
701c977e 1862 } else if (ptepindex < pmap_pdp_pindex(0)) {
1b2e0b92 1863 /*
701c977e 1864 * pv is PD, pvp is PDP
921c891e
MD
1865 *
1866 * SIMPLE PMAP NOTE: Simple pmaps do not allocate above
1867 * the PD.
1b2e0b92 1868 */
701c977e
MD
1869 ptepindex = (ptepindex - pmap_pd_pindex(0)) >> NPDPEPGSHIFT;
1870 ptepindex += NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL;
921c891e
MD
1871
1872 if (pmap->pm_flags & PMAP_FLAG_SIMPLE) {
1873 KKASSERT(pvpp == NULL);
1874 pvp = NULL;
1875 } else {
1876 pvp = pmap_allocpte(pmap, ptepindex, NULL);
1877 }
701c977e
MD
1878 if (!isnew)
1879 goto notnew;
1880
1881 /*
1882 * PD index in PDP
1883 */
1884 ptepindex = pv->pv_pindex - pmap_pd_pindex(0);
1885 ptepindex &= ((1ul << NPDPEPGSHIFT) - 1);
1886 } else if (ptepindex < pmap_pml4_pindex()) {
700e22f7 1887 /*
701c977e 1888 * pv is PDP, pvp is the root pml4 table
1b2e0b92 1889 */
701c977e
MD
1890 pvp = pmap_allocpte(pmap, pmap_pml4_pindex(), NULL);
1891 if (!isnew)
1892 goto notnew;
700e22f7 1893
701c977e
MD
1894 /*
1895 * PDP index in PML4
1896 */
1897 ptepindex = pv->pv_pindex - pmap_pdp_pindex(0);
1898 ptepindex &= ((1ul << NPML4EPGSHIFT) - 1);
1899 } else {
1900 /*
1901 * pv represents the top-level PML4, there is no parent.
1902 */
1903 pvp = NULL;
1904 if (!isnew)
1905 goto notnew;
1b2e0b92 1906 }
700e22f7
MD
1907
1908 /*
701c977e
MD
1909 * This code is only reached if isnew is TRUE and this is not a
1910 * terminal PV. We need to allocate a vm_page for the page table
1911 * at this level and enter it into the parent page table.
1912 *
1913 * page table pages are marked PG_WRITEABLE and PG_MAPPED.
1b2e0b92 1914 */
701c977e
MD
1915 for (;;) {
1916 m = vm_page_alloc(NULL, pv->pv_pindex,
1917 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM |
1918 VM_ALLOC_INTERRUPT);
1919 if (m)
1920 break;
1921 vm_wait(0);
1b2e0b92 1922 }
701c977e 1923 vm_page_spin_lock(m);
6d538b47 1924 pmap_page_stats_adding(m);
701c977e
MD
1925 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1926 pv->pv_m = m;
1927 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE);
1928 vm_page_spin_unlock(m);
1929 vm_page_unmanage(m); /* m must be spinunlocked */
1930
1931 if ((m->flags & PG_ZERO) == 0) {
1932 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1933 }
1934#ifdef PMAP_DEBUG
1935 else {
1936 pmap_page_assertzero(VM_PAGE_TO_PHYS(m));
1937 }
1938#endif
1939 m->valid = VM_PAGE_BITS_ALL;
1940 vm_page_flag_clear(m, PG_ZERO);
1941 vm_page_wire(m); /* wire for mapping in parent */
1942
1943 /*
1944 * Wire the page into pvp, bump the wire-count for pvp's page table
1945 * page. Bump the resident_count for the pmap. There is no pvp
1946 * for the top level, address the pm_pml4[] array directly.
1947 *
1948 * If the caller wants the parent we return it, otherwise
1949 * we just put it away.
1950 *
1951 * No interlock is needed for pte 0 -> non-zero.
921c891e
MD
1952 *
1953 * In the situation where *ptep is valid we might have an unmanaged
1954 * page table page shared from another page table which we need to
1955 * unshare before installing our private page table page.
701c977e
MD
1956 */
1957 if (pvp) {
701c977e 1958 ptep = pv_pte_lookup(pvp, ptepindex);
a86ce0cd 1959 if (*ptep & pmap->pmap_bits[PG_V_IDX]) {
921c891e
MD
1960 pt_entry_t pte;
1961 pmap_inval_info info;
1962
921c891e
MD
1963 if (ispt == 0) {
1964 panic("pmap_allocpte: unexpected pte %p/%d",
1965 pvp, (int)ptepindex);
1966 }
1967 pmap_inval_init(&info);
1968 pmap_inval_interlock(&info, pmap, (vm_offset_t)-1);
1969 pte = pte_load_clear(ptep);
1970 pmap_inval_deinterlock(&info, pmap);
1971 pmap_inval_done(&info);
ec3deaea
MD
1972 if (vm_page_unwire_quick(
1973 PHYS_TO_VM_PAGE(pte & PG_FRAME))) {
1974 panic("pmap_allocpte: shared pgtable "
1975 "pg bad wirecount");
1976 }
1977 atomic_add_long(&pmap->pm_stats.resident_count, -1);
921c891e
MD
1978 } else {
1979 vm_page_wire_quick(pvp->pv_m);
1980 }
a86ce0cd
MD
1981 *ptep = VM_PAGE_TO_PHYS(m) |
1982 (pmap->pmap_bits[PG_U_IDX] |
1983 pmap->pmap_bits[PG_RW_IDX] |
1984 pmap->pmap_bits[PG_V_IDX] |
1985 pmap->pmap_bits[PG_A_IDX] |
1986 pmap->pmap_bits[PG_M_IDX]);
701c977e
MD
1987 }
1988 vm_page_wakeup(m);
1989notnew:
1990 if (pvpp)
1991 *pvpp = pvp;
1992 else if (pvp)
1993 pv_put(pvp);
1994 return (pv);
1995}
d7f50089
YY
1996
1997/*
921c891e
MD
1998 * This version of pmap_allocpte() checks for possible segment optimizations
1999 * that would allow page-table sharing. It can be called for terminal
2000 * page or page table page ptepindex's.
2001 *
2002 * The function is called with page table page ptepindex's for fictitious
2003 * and unmanaged terminal pages. That is, we don't want to allocate a
2004 * terminal pv, we just want the pt_pv. pvpp is usually passed as NULL
2005 * for this case.
2006 *
2007 * This function can return a pv and *pvpp associated with the passed in pmap
2008 * OR a pv and *pvpp associated with the shared pmap. In the latter case
2009 * an unmanaged page table page will be entered into the pass in pmap.
2010 */
2011static
2012pv_entry_t
2013pmap_allocpte_seg(pmap_t pmap, vm_pindex_t ptepindex, pv_entry_t *pvpp,
2014 vm_map_entry_t entry, vm_offset_t va)
2015{
2016 struct pmap_inval_info info;
2017 vm_object_t object;
2018 pmap_t obpmap;
2019 pmap_t *obpmapp;
2020 vm_offset_t b;
2021 pv_entry_t pte_pv; /* in original or shared pmap */
2022 pv_entry_t pt_pv; /* in original or shared pmap */
2023 pv_entry_t proc_pd_pv; /* in original pmap */
2024 pv_entry_t proc_pt_pv; /* in original pmap */
2025 pv_entry_t xpv; /* PT in shared pmap */
2026 pd_entry_t *pt; /* PT entry in PD of original pmap */
2027 pd_entry_t opte; /* contents of *pt */
2028 pd_entry_t npte; /* contents of *pt */
2029 vm_page_t m;
2030
ec3deaea 2031retry:
921c891e
MD
2032 /*
2033 * Basic tests, require a non-NULL vm_map_entry, require proper
2034 * alignment and type for the vm_map_entry, require that the
2035 * underlying object already be allocated.
2036 *
a44410dd 2037 * We allow almost any type of object to use this optimization.
921c891e
MD
2038 * The object itself does NOT have to be sized to a multiple of the
2039 * segment size, but the memory mapping does.
9e5e1578
MD
2040 *
2041 * XXX don't handle devices currently, because VM_PAGE_TO_PHYS()
2042 * won't work as expected.
921c891e
MD
2043 */
2044 if (entry == NULL ||
2045 pmap_mmu_optimize == 0 || /* not enabled */
a44410dd 2046 ptepindex >= pmap_pd_pindex(0) || /* not terminal or pt */
921c891e
MD
2047 entry->inheritance != VM_INHERIT_SHARE || /* not shared */
2048 entry->maptype != VM_MAPTYPE_NORMAL || /* weird map type */
2049 entry->object.vm_object == NULL || /* needs VM object */
9e5e1578
MD
2050 entry->object.vm_object->type == OBJT_DEVICE || /* ick */
2051 entry->object.vm_object->type == OBJT_MGTDEVICE || /* ick */
921c891e
MD
2052 (entry->offset & SEG_MASK) || /* must be aligned */
2053 (entry->start & SEG_MASK)) {
2054 return(pmap_allocpte(pmap, ptepindex, pvpp));
2055 }
2056
2057 /*
2058 * Make sure the full segment can be represented.
2059 */
2060 b = va & ~(vm_offset_t)SEG_MASK;
a44410dd 2061 if (b < entry->start || b + SEG_SIZE > entry->end)
921c891e
MD
2062 return(pmap_allocpte(pmap, ptepindex, pvpp));
2063
2064 /*
2065 * If the full segment can be represented dive the VM object's
2066 * shared pmap, allocating as required.
2067 */
2068 object = entry->object.vm_object;
2069
2070 if (entry->protection & VM_PROT_WRITE)
2071 obpmapp = &object->md.pmap_rw;
2072 else
2073 obpmapp = &object->md.pmap_ro;
2074
a44410dd
MD
2075#ifdef PMAP_DEBUG2
2076 if (pmap_enter_debug > 0) {
2077 --pmap_enter_debug;
2078 kprintf("pmap_allocpte_seg: va=%jx prot %08x o=%p "
2079 "obpmapp %p %p\n",
2080 va, entry->protection, object,
2081 obpmapp, *obpmapp);
2082 kprintf("pmap_allocpte_seg: entry %p %jx-%jx\n",
2083 entry, entry->start, entry->end);
2084 }
2085#endif
2086
921c891e
MD
2087 /*
2088 * We allocate what appears to be a normal pmap but because portions
2089 * of this pmap are shared with other unrelated pmaps we have to
2090 * set pm_active to point to all cpus.
2091 *
2092 * XXX Currently using pmap_spin to interlock the update, can't use
2093 * vm_object_hold/drop because the token might already be held
2094 * shared OR exclusive and we don't know.
2095 */
2096 while ((obpmap = *obpmapp) == NULL) {
2097 obpmap = kmalloc(sizeof(*obpmap), M_OBJPMAP, M_WAITOK|M_ZERO);
2098 pmap_pinit_simple(obpmap);
2099 pmap_pinit2(obpmap);
2100 spin_lock(&pmap_spin);
2101 if (*obpmapp != NULL) {
2102 /*
2103 * Handle race
2104 */
2105 spin_unlock(&pmap_spin);
2106 pmap_release(obpmap);
2107 pmap_puninit(obpmap);
2108 kfree(obpmap, M_OBJPMAP);
a44410dd 2109 obpmap = *obpmapp; /* safety */
921c891e
MD
2110 } else {
2111 obpmap->pm_active = smp_active_mask;
2112 *obpmapp = obpmap;
2113 spin_unlock(&pmap_spin);
2114 }
2115 }
2116
2117 /*
2118 * Layering is: PTE, PT, PD, PDP, PML4. We have to return the
2119 * pte/pt using the shared pmap from the object but also adjust
2120 * the process pmap's page table page as a side effect.
2121 */
2122
2123 /*
2124 * Resolve the terminal PTE and PT in the shared pmap. This is what
2125 * we will return. This is true if ptepindex represents a terminal
2126 * page, otherwise pte_pv is actually the PT and pt_pv is actually
2127 * the PD.
2128 */
2129 pt_pv = NULL;
2130 pte_pv = pmap_allocpte(obpmap, ptepindex, &pt_pv);
2131 if (ptepindex >= pmap_pt_pindex(0))
2132 xpv = pte_pv;
2133 else
2134 xpv = pt_pv;
2135
2136 /*
2137 * Resolve the PD in the process pmap so we can properly share the
2138 * page table page. Lock order is bottom-up (leaf first)!
2139 *
2140 * NOTE: proc_pt_pv can be NULL.
2141 */
2142 proc_pt_pv = pv_get(pmap, pmap_pt_pindex(b));
2143 proc_pd_pv = pmap_allocpte(pmap, pmap_pd_pindex(b), NULL);
a44410dd
MD
2144#ifdef PMAP_DEBUG2
2145 if (pmap_enter_debug > 0) {
2146 --pmap_enter_debug;
2147 kprintf("proc_pt_pv %p (wc %d) pd_pv %p va=%jx\n",
2148 proc_pt_pv,
2149 (proc_pt_pv ? proc_pt_pv->pv_m->wire_count : -1),
2150 proc_pd_pv,
2151 va);
2152 }
2153#endif
921c891e
MD
2154
2155 /*
2156 * xpv is the page table page pv from the shared object
a44410dd 2157 * (for convenience), from above.
921c891e
MD
2158 *
2159 * Calculate the pte value for the PT to load into the process PD.
2160 * If we have to change it we must properly dispose of the previous
2161 * entry.
2162 */
2163 pt = pv_pte_lookup(proc_pd_pv, pmap_pt_index(b));
2164 npte = VM_PAGE_TO_PHYS(xpv->pv_m) |
a86ce0cd
MD
2165 (pmap->pmap_bits[PG_U_IDX] |
2166 pmap->pmap_bits[PG_RW_IDX] |
2167 pmap->pmap_bits[PG_V_IDX] |
2168 pmap->pmap_bits[PG_A_IDX] |
2169 pmap->pmap_bits[PG_M_IDX]);
99c2cc55
MD
2170
2171 /*
ec3deaea
MD
2172 * Dispose of previous page table page if it was local to the
2173 * process pmap. If the old pt is not empty we cannot dispose of it
2174 * until we clean it out. This case should not arise very often so
2175 * it is not optimized.
99c2cc55
MD
2176 */
2177 if (proc_pt_pv) {
ec3deaea
MD
2178 if (proc_pt_pv->pv_m->wire_count != 1) {
2179 pv_put(proc_pd_pv);
2180 pv_put(proc_pt_pv);
2181 pv_put(pt_pv);
2182 pv_put(pte_pv);
2183 pmap_remove(pmap,
2184 va & ~(vm_offset_t)SEG_MASK,
2185 (va + SEG_SIZE) & ~(vm_offset_t)SEG_MASK);
2186 goto retry;
2187 }
01d2a79f 2188 pmap_release_pv(proc_pt_pv, proc_pd_pv);
99c2cc55
MD
2189 proc_pt_pv = NULL;
2190 /* relookup */
2191 pt = pv_pte_lookup(proc_pd_pv, pmap_pt_index(b));
2192 }
2193
2194 /*
2195 * Handle remaining cases.
2196 */
921c891e
MD
2197 if (*pt == 0) {
2198 *pt = npte;
2199 vm_page_wire_quick(xpv->pv_m);
2200 vm_page_wire_quick(proc_pd_pv->pv_m);
2201 atomic_add_long(&pmap->pm_stats.resident_count, 1);
2202 } else if (*pt != npte) {
2203 pmap_inval_init(&info);
2204 pmap_inval_interlock(&info, pmap, (vm_offset_t)-1);
921c891e 2205
99c2cc55
MD
2206 opte = pte_load_clear(pt);
2207 KKASSERT(opte && opte != npte);
2208
2209 *pt = npte;
2210 vm_page_wire_quick(xpv->pv_m); /* pgtable pg that is npte */
2211
2212 /*
2213 * Clean up opte, bump the wire_count for the process
2214 * PD page representing the new entry if it was
2215 * previously empty.
2216 *
2217 * If the entry was not previously empty and we have
2218 * a PT in the proc pmap then opte must match that
2219 * pt. The proc pt must be retired (this is done
2220 * later on in this procedure).
2221 *
2222 * NOTE: replacing valid pte, wire_count on proc_pd_pv
2223 * stays the same.
2224 */
a86ce0cd 2225 KKASSERT(opte & pmap->pmap_bits[PG_V_IDX]);
99c2cc55
MD
2226 m = PHYS_TO_VM_PAGE(opte & PG_FRAME);
2227 if (vm_page_unwire_quick(m)) {
2228 panic("pmap_allocpte_seg: "
2229 "bad wire count %p",
2230 m);
921c891e 2231 }
99c2cc55 2232
921c891e
MD
2233 pmap_inval_deinterlock(&info, pmap);
2234 pmap_inval_done(&info);
921c891e
MD
2235 }
2236
2237 /*
2238 * The existing process page table was replaced and must be destroyed
2239 * here.
2240 */
2241 if (proc_pd_pv)
2242 pv_put(proc_pd_pv);
921c891e
MD
2243 if (pvpp)
2244 *pvpp = pt_pv;
2245 else
2246 pv_put(pt_pv);
2247
2248 return (pte_pv);
2249}
2250
2251/*
701c977e
MD
2252 * Release any resources held by the given physical map.
2253 *
2254 * Called when a pmap initialized by pmap_pinit is being released. Should
2255 * only be called if the map contains no valid mappings.
b12defdc 2256 *
701c977e 2257 * Caller must hold pmap->pm_token
d7f50089 2258 */
701c977e
MD
2259struct pmap_release_info {
2260 pmap_t pmap;
2261 int retry;
2262};
2263
2264static int pmap_release_callback(pv_entry_t pv, void *data);
2265
2266void
2267pmap_release(struct pmap *pmap)
c8fe38ae 2268{
701c977e
MD
2269 struct pmap_release_info info;
2270
2271 KASSERT(pmap->pm_active == 0,
2272 ("pmap still active! %016jx", (uintmax_t)pmap->pm_active));
701c977e
MD
2273
2274 spin_lock(&pmap_spin);
2275 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
2276 spin_unlock(&pmap_spin);
c8fe38ae
MD
2277
2278 /*
701c977e
MD
2279 * Pull pv's off the RB tree in order from low to high and release
2280 * each page.
c8fe38ae 2281 */
701c977e
MD
2282 info.pmap = pmap;
2283 do {
2284 info.retry = 0;
2285 spin_lock(&pmap->pm_spin);
2286 RB_SCAN(pv_entry_rb_tree, &pmap->pm_pvroot, NULL,
2287 pmap_release_callback, &info);
2288 spin_unlock(&pmap->pm_spin);
2289 } while (info.retry);
2290
a5fc46c9
MD
2291
2292 /*
701c977e
MD
2293 * One resident page (the pml4 page) should remain.
2294 * No wired pages should remain.
a5fc46c9 2295 */
921c891e
MD
2296 KKASSERT(pmap->pm_stats.resident_count ==
2297 ((pmap->pm_flags & PMAP_FLAG_SIMPLE) ? 0 : 1));
2298
701c977e
MD
2299 KKASSERT(pmap->pm_stats.wired_count == 0);
2300}
2301
2302static int
2303pmap_release_callback(pv_entry_t pv, void *data)
2304{
2305 struct pmap_release_info *info = data;
2306 pmap_t pmap = info->pmap;
921c891e 2307 int r;
701c977e
MD
2308
2309 if (pv_hold_try(pv)) {
2310 spin_unlock(&pmap->pm_spin);
2311 } else {
2312 spin_unlock(&pmap->pm_spin);
2313 pv_lock(pv);
5e78aef9
MD
2314 }
2315 if (pv->pv_pmap != pmap) {
2316 pv_put(pv);
2317 spin_lock(&pmap->pm_spin);
2318 info->retry = 1;
2319 return(-1);
48ffc236 2320 }
01d2a79f 2321 r = pmap_release_pv(pv, NULL);
921c891e
MD
2322 spin_lock(&pmap->pm_spin);
2323 return(r);
2324}
2325
2326/*
2327 * Called with held (i.e. also locked) pv. This function will dispose of
2328 * the lock along with the pv.
01d2a79f
MD
2329 *
2330 * If the caller already holds the locked parent page table for pv it
2331 * must pass it as pvp, allowing us to avoid a deadlock, else it can
2332 * pass NULL for pvp.
921c891e
MD
2333 */
2334static int
01d2a79f 2335pmap_release_pv(pv_entry_t pv, pv_entry_t pvp)
921c891e
MD
2336{
2337 vm_page_t p;
48ffc236 2338
701c977e
MD
2339 /*
2340 * The pmap is currently not spinlocked, pv is held+locked.
2341 * Remove the pv's page from its parent's page table. The
2342 * parent's page table page's wire_count will be decremented.
2343 */
01d2a79f 2344 pmap_remove_pv_pte(pv, pvp, NULL);
c8fe38ae
MD
2345
2346 /*
701c977e
MD
2347 * Terminal pvs are unhooked from their vm_pages. Because
2348 * terminal pages aren't page table pages they aren't wired
2349 * by us, so we have to be sure not to unwire them either.
c8fe38ae 2350 */
701c977e 2351 if (pv->pv_pindex < pmap_pt_pindex(0)) {
52bb73bc 2352 pmap_remove_pv_page(pv);
701c977e
MD
2353 goto skip;
2354 }
c8fe38ae 2355
c8fe38ae 2356 /*
701c977e
MD
2357 * We leave the top-level page table page cached, wired, and
2358 * mapped in the pmap until the dtor function (pmap_puninit())
2359 * gets called.
e8510e54 2360 *
701c977e
MD
2361 * Since we are leaving the top-level pv intact we need
2362 * to break out of what would otherwise be an infinite loop.
c8fe38ae 2363 */
701c977e
MD
2364 if (pv->pv_pindex == pmap_pml4_pindex()) {
2365 pv_put(pv);
701c977e
MD
2366 return(-1);
2367 }
2368
2369 /*
2370 * For page table pages (other than the top-level page),
2371 * remove and free the vm_page. The representitive mapping
2372 * removed above by pmap_remove_pv_pte() did not undo the
2373 * last wire_count so we have to do that as well.
2374 */
52bb73bc 2375 p = pmap_remove_pv_page(pv);
701c977e 2376 vm_page_busy_wait(p, FALSE, "pmaprl");
701c977e
MD
2377 if (p->wire_count != 1) {
2378 kprintf("p->wire_count was %016lx %d\n",
2379 pv->pv_pindex, p->wire_count);
2380 }
2381 KKASSERT(p->wire_count == 1);
2382 KKASSERT(p->flags & PG_UNMANAGED);
2383
2384 vm_page_unwire(p, 0);
2385 KKASSERT(p->wire_count == 0);
921c891e
MD
2386
2387 /*
2388 * Theoretically this page, if not the pml4 page, should contain
2389 * all-zeros. But its just too dangerous to mark it PG_ZERO. Free
2390 * normally.
2391 */
701c977e
MD
2392 vm_page_free(p);
2393skip:
2394 pv_free(pv);
921c891e 2395 return 0;
701c977e
MD
2396}
2397
2398/*
2399 * This function will remove the pte associated with a pv from its parent.
2400 * Terminal pv's are supported. The removal will be interlocked if info
2401 * is non-NULL. The caller must dispose of pv instead of just unlocking
2402 * it.
2403 *
2404 * The wire count will be dropped on the parent page table. The wire
2405 * count on the page being removed (pv->pv_m) from the parent page table
2406 * is NOT touched. Note that terminal pages will not have any additional
2407 * wire counts while page table pages will have at least one representing
2408 * the mapping, plus others representing sub-mappings.
2409 *
2410 * NOTE: Cannot be called on kernel page table pages, only KVM terminal
2411 * pages and user page table and terminal pages.
2412 *
2413 * The pv must be locked.
2414 *
2415 * XXX must lock parent pv's if they exist to remove pte XXX
2416 */
2417static
2418void
2419pmap_remove_pv_pte(pv_entry_t pv, pv_entry_t pvp, struct pmap_inval_info *info)
2420{
2421 vm_pindex_t ptepindex = pv->pv_pindex;
2422 pmap_t pmap = pv->pv_pmap;
2423 vm_page_t p;
2424 int gotpvp = 0;
48ffc236 2425
701c977e 2426 KKASSERT(pmap);
48ffc236 2427
701c977e 2428 if (ptepindex == pmap_pml4_pindex()) {
b12defdc 2429 /*
701c977e 2430 * We are the top level pml4 table, there is no parent.
b12defdc 2431 */
701c977e
MD
2432 p = pmap->pm_pmlpv->pv_m;
2433 } else if (ptepindex >= pmap_pdp_pindex(0)) {
e8510e54 2434 /*
701c977e
MD
2435 * Remove a PDP page from the pml4e. This can only occur
2436 * with user page tables. We do not have to lock the
2437 * pml4 PV so just ignore pvp.
e8510e54 2438 */
701c977e
MD
2439 vm_pindex_t pml4_pindex;
2440 vm_pindex_t pdp_index;
2441 pml4_entry_t *pdp;
2442
2443 pdp_index = ptepindex - pmap_pdp_pindex(0);
2444 if (pvp == NULL) {
2445 pml4_pindex = pmap_pml4_pindex();
2446 pvp = pv_get(pv->pv_pmap, pml4_pindex);
921c891e 2447 KKASSERT(pvp);
701c977e 2448 gotpvp = 1;
e8510e54 2449 }
701c977e 2450 pdp = &pmap->pm_pml4[pdp_index & ((1ul << NPML4EPGSHIFT) - 1)];
a86ce0cd 2451 KKASSERT((*pdp & pmap->pmap_bits[PG_V_IDX]) != 0);
701c977e
MD
2452 p = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
2453 *pdp = 0;
2454 KKASSERT(info == NULL);
2455 } else if (ptepindex >= pmap_pd_pindex(0)) {
e8510e54 2456 /*
921c891e
MD
2457 * Remove a PD page from the pdp
2458 *
2459 * SIMPLE PMAP NOTE: Non-existant pvp's are ok in the case
2460 * of a simple pmap because it stops at
2461 * the PD page.
e8510e54 2462 */
701c977e
MD
2463 vm_pindex_t pdp_pindex;
2464 vm_pindex_t pd_index;
2465 pdp_entry_t *pd;
48ffc236 2466
701c977e 2467 pd_index = ptepindex - pmap_pd_pindex(0);
48ffc236 2468
701c977e
MD
2469 if (pvp == NULL) {
2470 pdp_pindex = NUPTE_TOTAL + NUPT_TOTAL + NUPD_TOTAL +
2471 (pd_index >> NPML4EPGSHIFT);
2472 pvp = pv_get(pv->pv_pmap, pdp_pindex);
921c891e
MD
2473 if (pvp)
2474 gotpvp = 1;
2475 }
2476 if (pvp) {
2477 pd = pv_pte_lookup(pvp, pd_index &
2478 ((1ul << NPDPEPGSHIFT) - 1));
a86ce0cd 2479 KKASSERT((*pd & pmap->pmap_bits[PG_V_IDX]) != 0);
921c891e
MD
2480 p = PHYS_TO_VM_PAGE(*pd & PG_FRAME);
2481 *pd = 0;
2482 } else {
2483 KKASSERT(pmap->pm_flags & PMAP_FLAG_SIMPLE);
2484 p = pv->pv_m; /* degenerate test later */
701c977e 2485 }
701c977e
MD
2486 KKASSERT(info == NULL);
2487 } else if (ptepindex >= pmap_pt_pindex(0)) {
e8510e54 2488 /*
701c977e 2489 * Remove a PT page from the pd
e8510e54 2490 */
701c977e
MD
2491 vm_pindex_t pd_pindex;
2492 vm_pindex_t pt_index;
2493 pd_entry_t *pt;
b12defdc 2494
701c977e
MD
2495 pt_index = ptepindex - pmap_pt_pindex(0);
2496
2497 if (pvp == NULL) {
2498 pd_pindex = NUPTE_TOTAL + NUPT_TOTAL +
2499 (pt_index >> NPDPEPGSHIFT);
2500 pvp = pv_get(pv->pv_pmap, pd_pindex);
921c891e 2501 KKASSERT(pvp);
701c977e
MD
2502 gotpvp = 1;
2503 }
2504 pt = pv_pte_lookup(pvp, pt_index & ((1ul << NPDPEPGSHIFT) - 1));
a86ce0cd 2505 KKASSERT((*pt & pmap->pmap_bits[PG_V_IDX]) != 0);
701c977e
MD
2506 p = PHYS_TO_VM_PAGE(*pt & PG_FRAME);
2507 *pt = 0;
2508 KKASSERT(info == NULL);
2509 } else {
b12defdc 2510 /*
701c977e 2511 * Remove a PTE from the PT page
b12defdc 2512 *
701c977e
MD
2513 * NOTE: pv's must be locked bottom-up to avoid deadlocking.
2514 * pv is a pte_pv so we can safely lock pt_pv.
9e5e1578
MD
2515 *
2516 * NOTE: FICTITIOUS pages may have multiple physical mappings
2517 * so PHYS_TO_VM_PAGE() will not necessarily work for
2518 * terminal ptes.
b12defdc 2519 */
701c977e
MD
2520 vm_pindex_t pt_pindex;
2521 pt_entry_t *ptep;
2522 pt_entry_t pte;
2523 vm_offset_t va;
b12defdc 2524
701c977e
MD
2525 pt_pindex = ptepindex >> NPTEPGSHIFT;
2526 va = (vm_offset_t)ptepindex << PAGE_SHIFT;
2527
2528 if (ptepindex >= NUPTE_USER) {
2529 ptep = vtopte(ptepindex << PAGE_SHIFT);
2530 KKASSERT(pvp == NULL);
c8fe38ae 2531 } else {
701c977e
MD
2532 if (pvp == NULL) {
2533 pt_pindex = NUPTE_TOTAL +
2534 (ptepindex >> NPDPEPGSHIFT);
2535 pvp = pv_get(pv->pv_pmap, pt_pindex);
921c891e 2536 KKASSERT(pvp);
701c977e
MD
2537 gotpvp = 1;
2538 }
2539 ptep = pv_pte_lookup(pvp, ptepindex &
2540 ((1ul << NPDPEPGSHIFT) - 1));
c8fe38ae 2541 }
701c977e
MD
2542
2543 if (info)
2544 pmap_inval_interlock(info, pmap, va);
2545 pte = pte_load_clear(ptep);
2546 if (info)
2547 pmap_inval_deinterlock(info, pmap);
52bb73bc
MD
2548 else
2549 cpu_invlpg((void *)va);
48ffc236 2550
e8510e54 2551 /*
701c977e 2552 * Now update the vm_page_t
e8510e54 2553 */
a86ce0cd
MD
2554 if ((pte & (pmap->pmap_bits[PG_MANAGED_IDX] | pmap->pmap_bits[PG_V_IDX])) !=
2555 (pmap->pmap_bits[PG_MANAGED_IDX]|pmap->pmap_bits[PG_V_IDX])) {
701c977e
MD
2556 kprintf("remove_pte badpte %016lx %016lx %d\n",
2557 pte, pv->pv_pindex,
2558 pv->pv_pindex < pmap_pt_pindex(0));
2559 }
9e5e1578 2560 /* PHYS_TO_VM_PAGE() will not work for FICTITIOUS pages */
701c977e 2561 /*KKASSERT((pte & (PG_MANAGED|PG_V)) == (PG_MANAGED|PG_V));*/
a86ce0cd 2562 if (pte & pmap->pmap_bits[PG_DEVICE_IDX])
9e5e1578
MD
2563 p = pv->pv_m;
2564 else
2565 p = PHYS_TO_VM_PAGE(pte & PG_FRAME);
2566 /* p = pv->pv_m; */
701c977e 2567
a86ce0cd 2568 if (pte & pmap->pmap_bits[PG_M_IDX]) {
701c977e
MD
2569 if (pmap_track_modified(ptepindex))
2570 vm_page_dirty(p);
2571 }
a86ce0cd 2572 if (pte & pmap->pmap_bits[PG_A_IDX]) {
701c977e 2573 vm_page_flag_set(p, PG_REFERENCED);
e8510e54 2574 }
a86ce0cd 2575 if (pte & pmap->pmap_bits[PG_W_IDX])
701c977e 2576 atomic_add_long(&pmap->pm_stats.wired_count, -1);
a86ce0cd 2577 if (pte & pmap->pmap_bits[PG_G_IDX])
701c977e 2578 cpu_invlpg((void *)va);
c8fe38ae
MD
2579 }
2580
48ffc236 2581 /*
701c977e
MD
2582 * Unwire the parent page table page. The wire_count cannot go below
2583 * 1 here because the parent page table page is itself still mapped.
2584 *
2585 * XXX remove the assertions later.
48ffc236 2586 */
701c977e
MD
2587 KKASSERT(pv->pv_m == p);
2588 if (pvp && vm_page_unwire_quick(pvp->pv_m))
2589 panic("pmap_remove_pv_pte: Insufficient wire_count");
c8fe38ae 2590
701c977e
MD
2591 if (gotpvp)
2592 pv_put(pvp);
c8fe38ae
MD
2593}
2594
8e2efb11
MD
2595/*
2596 * Remove the vm_page association to a pv. The pv must be locked.
2597 */
bfc09ba0
MD
2598static
2599vm_page_t
52bb73bc 2600pmap_remove_pv_page(pv_entry_t pv)
d7f50089 2601{
c8fe38ae
MD
2602 vm_page_t m;
2603
701c977e 2604 m = pv->pv_m;
701c977e
MD
2605 KKASSERT(m);
2606 vm_page_spin_lock(m);
2607 pv->pv_m = NULL;
2608 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
6d538b47 2609 pmap_page_stats_deleting(m);
c8fe38ae 2610 /*
701c977e
MD
2611 if (m->object)
2612 atomic_add_int(&m->object->agg_pv_list_count, -1);
2613 */
2614 if (TAILQ_EMPTY(&m->md.pv_list))
2615 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2616 vm_page_spin_unlock(m);
52bb73bc 2617 return(m);
d7f50089
YY
2618}
2619
2620/*
c8fe38ae 2621 * Grow the number of kernel page table entries, if needed.
a8cf2878
MD
2622 *
2623 * This routine is always called to validate any address space
2624 * beyond KERNBASE (for kldloads). kernel_vm_end only governs the address
2625 * space below KERNBASE.
d7f50089 2626 */
c8fe38ae 2627void
a8cf2878 2628pmap_growkernel(vm_offset_t kstart, vm_offset_t kend)
d7f50089 2629{
48ffc236 2630 vm_paddr_t paddr;
c8fe38ae
MD
2631 vm_offset_t ptppaddr;
2632 vm_page_t nkpg;
701c977e
MD
2633 pd_entry_t *pt, newpt;
2634 pdp_entry_t newpd;
a8cf2878 2635 int update_kernel_vm_end;
c8fe38ae 2636
a8cf2878
MD
2637 /*
2638 * bootstrap kernel_vm_end on first real VM use
2639 */
c8fe38ae 2640 if (kernel_vm_end == 0) {
791c6551 2641 kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
c8fe38ae 2642 nkpt = 0;
a86ce0cd 2643 while ((*pmap_pt(&kernel_pmap, kernel_vm_end) & kernel_pmap.pmap_bits[PG_V_IDX]) != 0) {
a8cf2878
MD
2644 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) &
2645 ~(PAGE_SIZE * NPTEPG - 1);
c8fe38ae 2646 nkpt++;
48ffc236
JG
2647 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
2648 kernel_vm_end = kernel_map.max_offset;
2649 break;
2650 }
c8fe38ae
MD
2651 }
2652 }
a8cf2878
MD
2653
2654 /*
2655 * Fill in the gaps. kernel_vm_end is only adjusted for ranges
2656 * below KERNBASE. Ranges above KERNBASE are kldloaded and we
2657 * do not want to force-fill 128G worth of page tables.
2658 */
2659 if (kstart < KERNBASE) {
2660 if (kstart > kernel_vm_end)
2661 kstart = kernel_vm_end;
2662 KKASSERT(kend <= KERNBASE);
2663 update_kernel_vm_end = 1;
2664 } else {
2665 update_kernel_vm_end = 0;
2666 }
2667
2668 kstart = rounddown2(kstart, PAGE_SIZE * NPTEPG);
2669 kend = roundup2(kend, PAGE_SIZE * NPTEPG);
2670
2671 if (kend - 1 >= kernel_map.max_offset)
2672 kend = kernel_map.max_offset;
2673
2674 while (kstart < kend) {
701c977e
MD
2675 pt = pmap_pt(&kernel_pmap, kstart);
2676 if (pt == NULL) {
48ffc236 2677 /* We need a new PDP entry */
701c977e 2678 nkpg = vm_page_alloc(NULL, nkpt,
a8cf2878
MD
2679 VM_ALLOC_NORMAL |
2680 VM_ALLOC_SYSTEM |
2681 VM_ALLOC_INTERRUPT);
2682 if (nkpg == NULL) {
2683 panic("pmap_growkernel: no memory to grow "
2684 "kernel");
2685 }
48ffc236 2686 paddr = VM_PAGE_TO_PHYS(nkpg);
7f2a2740
MD
2687 if ((nkpg->flags & PG_ZERO) == 0)
2688 pmap_zero_page(paddr);
2689 vm_page_flag_clear(nkpg, PG_ZERO);
701c977e 2690 newpd = (pdp_entry_t)
a86ce0cd
MD
2691 (paddr |
2692 kernel_pmap.pmap_bits[PG_V_IDX] |
2693 kernel_pmap.pmap_bits[PG_RW_IDX] |
2694 kernel_pmap.pmap_bits[PG_A_IDX] |
2695 kernel_pmap.pmap_bits[PG_M_IDX]);
701c977e 2696 *pmap_pd(&kernel_pmap, kstart) = newpd;
7f2a2740 2697 nkpt++;
48ffc236
JG
2698 continue; /* try again */
2699 }
a86ce0cd 2700 if ((*pt & kernel_pmap.pmap_bits[PG_V_IDX]) != 0) {
a8cf2878
MD
2701 kstart = (kstart + PAGE_SIZE * NPTEPG) &
2702 ~(PAGE_SIZE * NPTEPG - 1);
2703 if (kstart - 1 >= kernel_map.max_offset) {
2704 kstart = kernel_map.max_offset;
48ffc236
JG
2705 break;
2706 }
c8fe38ae
MD
2707 continue;
2708 }
2709
2710 /*
2711 * This index is bogus, but out of the way
2712 */
701c977e 2713 nkpg = vm_page_alloc(NULL, nkpt,
a8cf2878
MD
2714 VM_ALLOC_NORMAL |
2715 VM_ALLOC_SYSTEM |
2716 VM_ALLOC_INTERRUPT);
c8fe38ae
MD
2717 if (nkpg == NULL)
2718 panic("pmap_growkernel: no memory to grow kernel");
2719
2720 vm_page_wire(nkpg);
2721 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2722 pmap_zero_page(ptppaddr);
7f2a2740 2723 vm_page_flag_clear(nkpg, PG_ZERO);
a86ce0cd
MD
2724 newpt = (pd_entry_t) (ptppaddr |
2725 kernel_pmap.pmap_bits[PG_V_IDX] |
2726 kernel_pmap.pmap_bits[PG_RW_IDX] |
2727 kernel_pmap.pmap_bits[PG_A_IDX] |
2728 kernel_pmap.pmap_bits[PG_M_IDX]);
701c977e 2729 *pmap_pt(&kernel_pmap, kstart) = newpt;
c8fe38ae
MD
2730 nkpt++;
2731
a8cf2878
MD
2732 kstart = (kstart + PAGE_SIZE * NPTEPG) &
2733 ~(PAGE_SIZE * NPTEPG - 1);
2734
2735 if (kstart - 1 >= kernel_map.max_offset) {
2736 kstart = kernel_map.max_offset;
48ffc236 2737 break;
c8fe38ae 2738 }
c8fe38ae 2739 }
a8cf2878
MD
2740
2741 /*
2742 * Only update kernel_vm_end for areas below KERNBASE.
2743 */
2744 if (update_kernel_vm_end && kernel_vm_end < kstart)
2745 kernel_vm_end = kstart;
d7f50089
YY
2746}
2747
2748/*
921c891e 2749 * Add a reference to the specified pmap.
d7f50089 2750 */
c8fe38ae 2751void
921c891e 2752pmap_reference(pmap_t pmap)
d7f50089 2753{
921c891e
MD
2754 if (pmap != NULL) {
2755 lwkt_gettoken(&pmap->pm_token);
2756 ++pmap->pm_count;
2757 lwkt_reltoken(&pmap->pm_token);
c8fe38ae 2758 }
d7f50089
YY
2759}
2760
c8fe38ae 2761/***************************************************
701c977e 2762 * page management routines.
c8fe38ae 2763 ***************************************************/
d7f50089
YY
2764
2765/*
701c977e 2766 * Hold a pv without locking it
d7f50089 2767 */
701c977e
MD
2768static void
2769pv_hold(pv_entry_t pv)
d7f50089 2770{
42909ca4 2771 atomic_add_int(&pv->pv_hold, 1);
d7f50089
YY
2772}
2773
2774/*
701c977e
MD
2775 * Hold a pv_entry, preventing its destruction. TRUE is returned if the pv
2776 * was successfully locked, FALSE if it wasn't. The caller must dispose of
2777 * the pv properly.
2778 *
2779 * Either the pmap->pm_spin or the related vm_page_spin (if traversing a
2780 * pv list via its page) must be held by the caller.
d7f50089 2781 */
701c977e
MD
2782static int
2783_pv_hold_try(pv_entry_t pv PMAP_DEBUG_DECL)
d7f50089 2784{
701c977e
MD
2785 u_int count;
2786
8e2efb11
MD
2787 /*
2788 * Critical path shortcut expects pv to already have one ref
2789 * (for the pv->pv_pmap).
2790 */
2791 if (atomic_cmpset_int(&pv->pv_hold, 1, PV_HOLD_LOCKED | 2)) {
701c977e
MD
2792#ifdef PMAP_DEBUG
2793 pv->pv_func = func;
2794 pv->pv_line = lineno;
2795#endif
2796 return TRUE;
2797 }
2798
2799 for (;;) {
2800 count = pv->pv_hold;
2801 cpu_ccfence();
2802 if ((count & PV_HOLD_LOCKED) == 0) {
2803 if (atomic_cmpset_int(&pv->pv_hold, count,
2804 (count + 1) | PV_HOLD_LOCKED)) {
2805#ifdef PMAP_DEBUG
2806 pv->pv_func = func;
2807 pv->pv_line = lineno;
2808#endif
2809 return TRUE;
2810 }
2811 } else {
2812 if (atomic_cmpset_int(&pv->pv_hold, count, count + 1))
2813 return FALSE;
2814 }
2815 /* retry */
c8fe38ae 2816 }
d7f50089
YY
2817}
2818
2819/*
701c977e
MD
2820 * Drop a previously held pv_entry which could not be locked, allowing its
2821 * destruction.
2822 *
2823 * Must not be called with a spinlock held as we might zfree() the pv if it
2824 * is no longer associated with a pmap and this was the last hold count.
d7f50089 2825 */
701c977e
MD
2826static void
2827pv_drop(pv_entry_t pv)
d7f50089 2828{
701c977e 2829 u_int count;
c8fe38ae 2830
701c977e
MD
2831 for (;;) {
2832 count = pv->pv_hold;
2833 cpu_ccfence();
2834 KKASSERT((count & PV_HOLD_MASK) > 0);
2835 KKASSERT((count & (PV_HOLD_LOCKED | PV_HOLD_MASK)) !=
2836 (PV_HOLD_LOCKED | 1));
2837 if (atomic_cmpset_int(&pv->pv_hold, count, count - 1)) {
8e2efb11 2838 if ((count & PV_HOLD_MASK) == 1) {
a44410dd
MD
2839#ifdef PMAP_DEBUG2
2840 if (pmap_enter_debug > 0) {
2841 --pmap_enter_debug;
2842 kprintf("pv_drop: free pv %p\n", pv);
2843 }
2844#endif
8e2efb11
MD
2845 KKASSERT(count == 1);
2846 KKASSERT(pv->pv_pmap == NULL);
701c977e 2847 zfree(pvzone, pv);
8e2efb11 2848 }
701c977e 2849 return;
b12defdc 2850 }
701c977e 2851 /* retry */
c8fe38ae 2852 }
d7f50089 2853}
c8fe38ae 2854
d7f50089 2855/*
8e2efb11
MD
2856 * Find or allocate the requested PV entry, returning a locked, held pv.
2857 *
2858 * If (*isnew) is non-zero, the returned pv will have two hold counts, one
2859 * for the caller and one representing the pmap and vm_page association.
2860 *
2861 * If (*isnew) is zero, the returned pv will have only one hold count.
2862 *
2863 * Since both associations can only be adjusted while the pv is locked,
2864 * together they represent just one additional hold.
d7f50089 2865 */
bfc09ba0 2866static
701c977e
MD
2867pv_entry_t
2868_pv_alloc(pmap_t pmap, vm_pindex_t pindex, int *isnew PMAP_DEBUG_DECL)
c8fe38ae
MD
2869{
2870 pv_entry_t pv;
701c977e 2871 pv_entry_t pnew = NULL;
c8fe38ae 2872
701c977e
MD
2873 spin_lock(&pmap->pm_spin);
2874 for (;;) {
2875 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex) {
2876 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot,
2877 pindex);
c8fe38ae 2878 }
701c977e
MD
2879 if (pv == NULL) {
2880 if (pnew == NULL) {
2881 spin_unlock(&pmap->pm_spin);
2882 pnew = zalloc(pvzone);
2883 spin_lock(&pmap->pm_spin);
2884 continue;
2885 }
2886 pnew->pv_pmap = pmap;
2887 pnew->pv_pindex = pindex;
8e2efb11 2888 pnew->pv_hold = PV_HOLD_LOCKED | 2;
701c977e
MD
2889#ifdef PMAP_DEBUG
2890 pnew->pv_func = func;
2891 pnew->pv_line = lineno;
2892#endif
2893 pv_entry_rb_tree_RB_INSERT(&pmap->pm_pvroot, pnew);
8e2efb11 2894 ++pmap->pm_generation;
701c977e
MD
2895 atomic_add_long(&pmap->pm_stats.resident_count, 1);
2896 spin_unlock(&pmap->pm_spin);
2897 *isnew = 1;
2898 return(pnew);
2899 }
2900 if (pnew) {
2901 spin_unlock(&pmap->pm_spin);
2902 zfree(pvzone, pnew);
2903 pnew = NULL;
2904 spin_lock(&pmap->pm_spin);
2905 continue;
2906 }
2907 if (_pv_hold_try(pv PMAP_DEBUG_COPY)) {
2908 spin_unlock(&pmap->pm_spin);
5e78aef9
MD
2909 } else {
2910 spin_unlock(&pmap->pm_spin);
2911 _pv_lock(pv PMAP_DEBUG_COPY);
701c977e 2912 }
701c977e
MD
2913 if (pv->pv_pmap == pmap && pv->pv_pindex == pindex) {
2914 *isnew = 0;
2915 return(pv);
2916 }
2917 pv_put(pv);
2918 spin_lock(&pmap->pm_spin);
2919 }
701c977e 2920}
b12defdc 2921
701c977e
MD
2922/*
2923 * Find the requested PV entry, returning a locked+held pv or NULL
2924 */
2925static
2926pv_entry_t
2927_pv_get(pmap_t pmap, vm_pindex_t pindex PMAP_DEBUG_DECL)
2928{
2929 pv_entry_t pv;
5926987a 2930
701c977e
MD
2931 spin_lock(&pmap->pm_spin);
2932 for (;;) {
2933 /*
2934 * Shortcut cache
2935 */
2936 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex) {
2937 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot,
2938 pindex);
2939 }
2940 if (pv == NULL) {
2941 spin_unlock(&pmap->pm_spin);
2942 return NULL;
2943 }
2944 if (_pv_hold_try(pv PMAP_DEBUG_COPY)) {
701c977e 2945 spin_unlock(&pmap->pm_spin);
5e78aef9
MD
2946 } else {
2947 spin_unlock(&pmap->pm_spin);
2948 _pv_lock(pv PMAP_DEBUG_COPY);
701c977e 2949 }
5e78aef9
MD
2950 if (pv->pv_pmap == pmap && pv->pv_pindex == pindex) {
2951 pv_cache(pv, pindex);
701c977e 2952 return(pv);
5e78aef9 2953 }
701c977e
MD
2954 pv_put(pv);
2955 spin_lock(&pmap->pm_spin);
2956 }
d7f50089
YY
2957}
2958
2959/*
701c977e
MD
2960 * Lookup, hold, and attempt to lock (pmap,pindex).
2961 *
2962 * If the entry does not exist NULL is returned and *errorp is set to 0
a5fc46c9 2963 *
701c977e
MD
2964 * If the entry exists and could be successfully locked it is returned and
2965 * errorp is set to 0.
2966 *
2967 * If the entry exists but could NOT be successfully locked it is returned
2968 * held and *errorp is set to 1.
d7f50089 2969 */
bfc09ba0 2970static
701c977e
MD
2971pv_entry_t
2972pv_get_try(pmap_t pmap, vm_pindex_t pindex, int *errorp)
d7f50089 2973{
c8fe38ae
MD
2974 pv_entry_t pv;
2975
a86ce0cd 2976 spin_lock_shared(&pmap->pm_spin);
701c977e
MD
2977 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex)
2978 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pindex);
2979 if (pv == NULL) {
a86ce0cd 2980 spin_unlock_shared(&pmap->pm_spin);
701c977e
MD
2981 *errorp = 0;
2982 return NULL;
2983 }
2984 if (pv_hold_try(pv)) {
2985 pv_cache(pv, pindex);
a86ce0cd 2986 spin_unlock_shared(&pmap->pm_spin);
701c977e 2987 *errorp = 0;
5e78aef9 2988 KKASSERT(pv->pv_pmap == pmap && pv->pv_pindex == pindex);
701c977e
MD
2989 return(pv); /* lock succeeded */
2990 }
a86ce0cd 2991 spin_unlock_shared(&pmap->pm_spin);
701c977e
MD
2992 *errorp = 1;
2993 return (pv); /* lock failed */
d7f50089
YY
2994}
2995
2996/*
701c977e 2997 * Find the requested PV entry, returning a held pv or NULL
d7f50089 2998 */
bfc09ba0 2999static
701c977e
MD
3000pv_entry_t
3001pv_find(pmap_t pmap, vm_pindex_t pindex)
c8fe38ae 3002{
701c977e 3003 pv_entry_t pv;
c8fe38ae 3004
a86ce0cd 3005 spin_lock_shared(&pmap->pm_spin);
b12defdc 3006
701c977e
MD
3007 if ((pv = pmap->pm_pvhint) == NULL || pv->pv_pindex != pindex)
3008 pv = pv_entry_rb_tree_RB_LOOKUP(&pmap->pm_pvroot, pindex);
3009 if (pv == NULL) {
ec47d952 3010 spin_unlock_shared(&pmap->pm_spin);
701c977e
MD
3011 return NULL;
3012 }
3013 pv_hold(pv);
3014 pv_cache(pv, pindex);
a86ce0cd 3015 spin_unlock_shared(&pmap->pm_spin);
701c977e
MD
3016 return(pv);
3017}
3018
3019/*
3020 * Lock a held pv, keeping the hold count
3021 */
3022static
3023void
3024_pv_lock(pv_entry_t pv PMAP_DEBUG_DECL)
3025{
3026 u_int count;
3027
3028 for (;;) {
3029 count = pv->pv_hold;
3030 cpu_ccfence();
3031 if ((count & PV_HOLD_LOCKED) == 0) {
3032 if (atomic_cmpset_int(&pv->pv_hold, count,
3033 count | PV_HOLD_LOCKED)) {
3034#ifdef PMAP_DEBUG
3035 pv->pv_func = func;
3036 pv->pv_line = lineno;
3037#endif
3038 return;
c8fe38ae 3039 }
701c977e
MD
3040 continue;
3041 }
3042 tsleep_interlock(pv, 0);
3043 if (atomic_cmpset_int(&pv->pv_hold, count,
3044 count | PV_HOLD_WAITING)) {
3045#ifdef PMAP_DEBUG
3046 kprintf("pv waiting on %s:%d\n",
3047 pv->pv_func, pv->pv_line);
c8fe38ae 3048#endif
701c977e 3049 tsleep(pv, PINTERLOCKED, "pvwait", hz);
c8fe38ae 3050 }
701c977e 3051 /* retry */
b12defdc 3052 }
701c977e 3053}
c8fe38ae 3054
701c977e
MD
3055/*
3056 * Unlock a held and locked pv, keeping the hold count.
3057 */
3058static
3059void
3060pv_unlock(pv_entry_t pv)
3061{
3062 u_int count;
3063
701c977e
MD
3064 for (;;) {
3065 count = pv->pv_hold;
3066 cpu_ccfence();
8e2efb11 3067 KKASSERT((count & (PV_HOLD_LOCKED | PV_HOLD_MASK)) >=
701c977e
MD
3068 (PV_HOLD_LOCKED | 1));
3069 if (atomic_cmpset_int(&pv->pv_hold, count,
3070 count &
3071 ~(PV_HOLD_LOCKED | PV_HOLD_WAITING))) {
3072 if (count & PV_HOLD_WAITING)
3073 wakeup(pv);
3074 break;
3075 }
7ab91d55 3076 }
d7f50089
YY
3077}
3078
3079/*
701c977e
MD
3080 * Unlock and drop a pv. If the pv is no longer associated with a pmap
3081 * and the hold count drops to zero we will free it.
d7f50089 3082 *
701c977e
MD
3083 * Caller should not hold any spin locks. We are protected from hold races
3084 * by virtue of holds only occuring only with a pmap_spin or vm_page_spin
3085 * lock held. A pv cannot be located otherwise.
d7f50089 3086 */
bfc09ba0
MD
3087static
3088void
701c977e 3089pv_put(pv_entry_t pv)
c8fe38ae 3090{
a44410dd
MD
3091#ifdef PMAP_DEBUG2
3092 if (pmap_enter_debug > 0) {
3093 --pmap_enter_debug;
3094 kprintf("pv_put pv=%p hold=%08x\n", pv, pv->pv_hold);
3095 }
3096#endif
3097
8e2efb11
MD
3098 /*
3099 * Fast - shortcut most common condition
3100 */
3101 if (atomic_cmpset_int(&pv->pv_hold, PV_HOLD_LOCKED | 2, 1))
701c977e 3102 return;
8e2efb11
MD
3103
3104 /*
3105 * Slow
3106 */
701c977e
MD
3107 pv_unlock(pv);
3108 pv_drop(pv);
3109}
c8fe38ae 3110
701c977e 3111/*
8e2efb11
MD
3112 * Remove the pmap association from a pv, require that pv_m already be removed,
3113 * then unlock and drop the pv. Any pte operations must have already been
3114 * completed. This call may result in a last-drop which will physically free
3115 * the pv.
3116 *
3117 * Removing the pmap association entails an additional drop.
3118 *
3119 * pv must be exclusively locked on call and will be disposed of on return.
701c977e
MD
3120 */
3121static
3122void
3123pv_free(pv_entry_t pv)
3124{
3125 pmap_t pmap;
b12defdc 3126
701c977e 3127 KKASSERT(pv->pv_m == NULL);
8e2efb11 3128 KKASSERT((pv->pv_hold & PV_HOLD_MASK) >= 2);
701c977e
MD
3129 if ((pmap = pv->pv_pmap) != NULL) {
3130 spin_lock(&pmap->pm_spin);
3131 pv_entry_rb_tree_RB_REMOVE(&pmap->pm_pvroot, pv);
8e2efb11 3132 ++pmap->pm_generation;
701c977e
MD
3133 if (pmap->pm_pvhint == pv)
3134 pmap->pm_pvhint = NULL;
3135 atomic_add_long(&pmap->pm_stats.resident_count, -1);
3136 pv->pv_pmap = NULL;
3137 pv->pv_pindex = 0;
3138 spin_unlock(&pmap->pm_spin);
8e2efb11
MD
3139
3140 /*
3141 * Try to shortcut three atomic ops, otherwise fall through
3142 * and do it normally. Drop two refs and the lock all in
3143 * one go.
3144 */
3145 if (atomic_cmpset_int(&pv->pv_hold, PV_HOLD_LOCKED | 2, 0)) {
a44410dd
MD
3146#ifdef PMAP_DEBUG2
3147 if (pmap_enter_debug > 0) {
3148 --pmap_enter_debug;
3149 kprintf("pv_free: free pv %p\n", pv);
3150 }
3151#endif
8e2efb11
MD
3152 zfree(pvzone, pv);
3153 return;
3154 }
3155 pv_drop(pv); /* ref for pv_pmap */
701c977e
MD
3156 }
3157 pv_put(pv);
3158}
3159
3160/*
3161 * This routine is very drastic, but can save the system
3162 * in a pinch.
3163 */
3164void
3165pmap_collect(void)
3166{
3167 int i;
3168 vm_page_t m;
3169 static int warningdone=0;
3170
3171 if (pmap_pagedaemon_waken == 0)
48ffc236 3172 return;
701c977e
MD
3173 pmap_pagedaemon_waken = 0;
3174 if (warningdone < 5) {
3175 kprintf("pmap_collect: collecting pv entries -- "
3176 "suggest increasing PMAP_SHPGPERPROC\n");
3177 warningdone++;
3178 }
3179
3180 for (i = 0; i < vm_page_array_size; i++) {
3181 m = &vm_page_array[i];
3182 if (m->wire_count || m->hold_count)
3183 continue;
3184 if (vm_page_busy_try(m, TRUE) == 0) {
3185 if (m->wire_count == 0 && m->hold_count == 0) {
3186 pmap_remove_all(m);
3187 }
3188 vm_page_wakeup(m);
3189 }
3190 }
d7f50089
YY
3191}
3192
3193/*
701c977e 3194 * Scan the pmap for active page table entries and issue a callback.
921c891e
MD
3195 * The callback must dispose of pte_pv, whos PTE entry is at *ptep in
3196 * its parent page table.
d7f50089 3197 *
fb4ca018 3198 * pte_pv will be NULL if the page or page table is unmanaged.
921c891e 3199 * pt_pv will point to the page table page containing the pte for the page.
701c977e 3200 *
921c891e
MD
3201 * NOTE! If we come across an unmanaged page TABLE (verses an unmanaged page),
3202 * we pass a NULL pte_pv and we pass a pt_pv pointing to the passed
3203 * process pmap's PD and page to the callback function. This can be
3204 * confusing because the pt_pv is really a pd_pv, and the target page
3205 * table page is simply aliased by the pmap and not owned by it.
d7f50089 3206 *
701c977e 3207 * It is assumed that the start and end are properly rounded to the page size.
fb4ca018
MD
3208 *
3209 * It is assumed that PD pages and above are managed and thus in the RB tree,
3210 * allowing us to use RB_SCAN from the PD pages down for ranged scans.
3211 */
3212struct pmap_scan_info {
3213 struct pmap *pmap;
3214 vm_offset_t sva;
3215 vm_offset_t eva;
3216 vm_pindex_t sva_pd_pindex;
3217 vm_pindex_t eva_pd_pindex;
9df83100 3218 void (*func)(pmap_t, struct pmap_scan_info *,
fb4ca018
MD
3219 pv_entry_t, pv_entry_t, int, vm_offset_t,
3220 pt_entry_t *, void *);
3221 void *arg;
9df83100 3222 int doinval;
fb4ca018
MD
3223 struct pmap_inval_info inval;
3224};
3225
3226static int pmap_scan_cmp(pv_entry_t pv, void *data);
3227static int pmap_scan_callback(pv_entry_t pv, void *data);
3228
701c977e 3229static void
fb4ca018 3230pmap_scan(struct pmap_scan_info *info)
701c977e 3231{
fb4ca018 3232 struct pmap *pmap = info->pmap;
701c977e
MD
3233 pv_entry_t pd_pv; /* A page directory PV */
3234 pv_entry_t pt_pv; /* A page table PV */
3235 pv_entry_t pte_pv; /* A page table entry PV */
3236 pt_entry_t *ptep;
8e2efb11 3237 pt_entry_t oldpte;
fb4ca018 3238 struct pv_entry dummy_pv;
8e2efb11 3239 int generation;
c8fe38ae
MD
3240
3241 if (pmap == NULL)
3242 return;
3243
701c977e
MD
3244 /*
3245 * Hold the token for stability; if the pmap is empty we have nothing
3246 * to do.
3247 */
b12defdc 3248 lwkt_gettoken(&pmap->pm_token);
701c977e 3249#if 0
10d6182e 3250 if (pmap->pm_stats.resident_count == 0) {
b12defdc 3251 lwkt_reltoken(&pmap->pm_token);
c8fe38ae 3252 return;
10d6182e 3253 }
701c977e 3254#endif
c8fe38ae 3255
fb4ca018 3256 pmap_inval_init(&info->inval);
c8fe38ae 3257
8e2efb11 3258again:
c8fe38ae 3259 /*
fb4ca018 3260 * Special handling for scanning one page, which is a very common
701c977e 3261 * operation (it is?).
fb4ca018 3262 *
701c977e 3263 * NOTE: Locks must be ordered bottom-up. pte,pt,pd,pdp,pml4
c8fe38ae 3264 */
fb4ca018 3265 if (info->sva + PAGE_SIZE == info->eva) {
8e2efb11 3266 generation = pmap->pm_generation;
fb4ca018 3267 if (info->sva >= VM_MAX_USER_ADDRESS) {
701c977e
MD
3268 /*
3269 * Kernel mappings do not track wire counts on
fb4ca018
MD
3270 * page table pages and only maintain pd_pv and
3271 * pte_pv levels so pmap_scan() works.
701c977e
MD
3272 */
3273 pt_pv = NULL;
fb4ca018
MD
3274 pte_pv = pv_get(pmap, pmap_pte_pindex(info->sva));
3275 ptep = vtopte(info->sva);
701c977e
MD
3276 } else {
3277 /*
921c891e
MD
3278 * User pages which are unmanaged will not have a
3279 * pte_pv. User page table pages which are unmanaged
3280 * (shared from elsewhere) will also not have a pt_pv.
3281 * The func() callback will pass both pte_pv and pt_pv
3282 * as NULL in that case.
701c977e 3283 */
fb4ca018
MD
3284 pte_pv = pv_get(pmap, pmap_pte_pindex(info->sva));
3285 pt_pv = pv_get(pmap, pmap_pt_pindex(info->sva));
701c977e
MD
3286 if (pt_pv == NULL) {
3287 KKASSERT(pte_pv == NULL);
fb4ca018 3288 pd_pv = pv_get(pmap, pmap_pd_pindex(info->sva));
921c891e
MD
3289 if (pd_pv) {
3290 ptep = pv_pte_lookup(pd_pv,
fb4ca018 3291 pmap_pt_index(info->sva));
921c891e 3292 if (*ptep) {
9df83100 3293 info->func(pmap, info,
921c891e 3294 NULL, pd_pv, 1,
fb4ca018
MD
3295 info->sva, ptep,
3296 info->arg);
921c891e
MD
3297 }
3298 pv_put(pd_pv);
3299 }
701c977e
MD
3300 goto fast_skip;
3301 }
fb4ca018 3302 ptep = pv_pte_lookup(pt_pv, pmap_pte_index(info->sva));
701c977e 3303 }
8e2efb11
MD
3304
3305 /*
3306 * NOTE: *ptep can't be ripped out from under us if we hold
3307 * pte_pv locked, but bits can change. However, there is
3308 * a race where another thread may be inserting pte_pv
3309 * and setting *ptep just after our pte_pv lookup fails.
3310 *
3311 * In this situation we can end up with a NULL pte_pv
3312 * but find that we have a managed *ptep. We explicitly
3313 * check for this race.
3314 */
3315 oldpte = *ptep;
3316 cpu_ccfence();
3317 if (oldpte == 0) {
f2c5d4ab
MD
3318 /*
3319 * Unlike the pv_find() case below we actually
3320 * acquired a locked pv in this case so any
3321 * race should have been resolved. It is expected
3322 * to not exist.
3323 */
701c977e
MD
3324 KKASSERT(pte_pv == NULL);
3325 } else if (pte_pv) {
8e2efb11
MD
3326 KASSERT((oldpte & (pmap->pmap_bits[PG_MANAGED_IDX] |
3327 pmap->pmap_bits[PG_V_IDX])) ==
3328 (pmap->pmap_bits[PG_MANAGED_IDX] |
3329 pmap->pmap_bits[PG_V_IDX]),
3330 ("badA *ptep %016lx/%016lx sva %016lx pte_pv %p"
3331 "generation %d/%d",
3332 *ptep, oldpte, info->sva, pte_pv,
3333 generation, pmap->pm_generation));
9df83100 3334 info->func(pmap, info, pte_pv, pt_pv, 0,
fb4ca018 3335 info->sva, ptep, info->arg);
701c977e 3336 } else {
8e2efb11
MD
3337 /*
3338 * Check for insertion race
3339 */
3340 if ((oldpte & pmap->pmap_bits[PG_MANAGED_IDX]) &&
3341 pt_pv) {
3342 pte_pv = pv_find(pmap,
3343 pmap_pte_pindex(info->sva));
3344 if (pte_pv) {
3345 pv_drop(pte_pv);
3346 pv_put(pt_pv);
3347 kprintf("pmap_scan: RACE1 "
3348 "%016jx, %016lx\n",
3349 info->sva, oldpte);
3350 goto again;
3351 }