ciss(4): Sync with FreeBSD.
[dragonfly.git] / sys / dev / raid / ciss / ciss.c
CommitLineData
984263bc
MD
1/*-
2 * Copyright (c) 2001 Michael Smith
9cf9a798 3 * Copyright (c) 2004 Paul Saab
984263bc
MD
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
a8416dcf 27 * $FreeBSD: src/sys/dev/ciss/ciss.c,v 1.113 2012/03/12 08:03:51 scottl Exp $
984263bc
MD
28 */
29
30/*
31 * Common Interface for SCSI-3 Support driver.
32 *
33 * CISS claims to provide a common interface between a generic SCSI
34 * transport and an intelligent host adapter.
35 *
36 * This driver supports CISS as defined in the document "CISS Command
37 * Interface for SCSI-3 Support Open Specification", Version 1.04,
38 * Valence Number 1, dated 20001127, produced by Compaq Computer
39 * Corporation. This document appears to be a hastily and somewhat
40 * arbitrarlily cut-down version of a larger (and probably even more
41 * chaotic and inconsistent) Compaq internal document. Various
42 * details were also gleaned from Compaq's "cciss" driver for Linux.
43 *
44 * We provide a shim layer between the CISS interface and CAM,
45 * offloading most of the queueing and being-a-disk chores onto CAM.
46 * Entry to the driver is via the PCI bus attachment (ciss_probe,
47 * ciss_attach, etc) and via the CAM interface (ciss_cam_action,
48 * ciss_cam_poll). The Compaq CISS adapters are, however, poor SCSI
49 * citizens and we have to fake up some responses to get reasonable
50 * behaviour out of them. In addition, the CISS command set is by no
51 * means adequate to support the functionality of a RAID controller,
52 * and thus the supported Compaq adapters utilise portions of the
53 * control protocol from earlier Compaq adapter families.
54 *
55 * Note that we only support the "simple" transport layer over PCI.
56 * This interface (ab)uses the I2O register set (specifically the post
57 * queues) to exchange commands with the adapter. Other interfaces
58 * are available, but we aren't supposed to know about them, and it is
59 * dubious whether they would provide major performance improvements
60 * except under extreme load.
9cf9a798 61 *
984263bc
MD
62 * Currently the only supported CISS adapters are the Compaq Smart
63 * Array 5* series (5300, 5i, 532). Even with only three adapters,
64 * Compaq still manage to have interface variations.
65 *
66 *
67 * Thanks must go to Fred Harris and Darryl DeVinney at Compaq, as
68 * well as Paul Saab at Yahoo! for their assistance in making this
69 * driver happen.
9cf9a798
SW
70 *
71 * More thanks must go to John Cagle at HP for the countless hours
72 * spent making this driver "work" with the MSA* series storage
73 * enclosures. Without his help (and nagging), this driver could not
74 * be used with these enclosures.
984263bc
MD
75 */
76
77#include <sys/param.h>
78#include <sys/systm.h>
79#include <sys/malloc.h>
80#include <sys/kernel.h>
81#include <sys/bus.h>
82#include <sys/conf.h>
984263bc 83#include <sys/stat.h>
9cf9a798
SW
84#include <sys/kthread.h>
85#include <sys/queue.h>
a8416dcf
SW
86#include <sys/sysctl.h>
87#include <sys/device.h>
cd8ab232 88
1f2de5d4
MD
89#include <bus/cam/cam.h>
90#include <bus/cam/cam_ccb.h>
91#include <bus/cam/cam_periph.h>
92#include <bus/cam/cam_sim.h>
93#include <bus/cam/cam_xpt_sim.h>
94#include <bus/cam/scsi/scsi_all.h>
95#include <bus/cam/scsi/scsi_message.h>
984263bc 96
984263bc 97#include <machine/endian.h>
a8416dcf 98#include <sys/rman.h>
984263bc 99
1f2de5d4
MD
100#include <bus/pci/pcireg.h>
101#include <bus/pci/pcivar.h>
984263bc 102
a8416dcf
SW
103#include <dev/raid/ciss/cissreg.h>
104#include <dev/raid/ciss/cissio.h>
105#include <dev/raid/ciss/cissvar.h>
984263bc 106
a8416dcf
SW
107static MALLOC_DEFINE(CISS_MALLOC_CLASS, "ciss_data",
108 "ciss internal data buffers");
984263bc
MD
109
110/* pci interface */
111static int ciss_lookup(device_t dev);
112static int ciss_probe(device_t dev);
113static int ciss_attach(device_t dev);
114static int ciss_detach(device_t dev);
115static int ciss_shutdown(device_t dev);
116
117/* (de)initialisation functions, control wrappers */
118static int ciss_init_pci(struct ciss_softc *sc);
a8416dcf
SW
119static int ciss_setup_msix(struct ciss_softc *sc);
120static int ciss_init_perf(struct ciss_softc *sc);
984263bc
MD
121static int ciss_wait_adapter(struct ciss_softc *sc);
122static int ciss_flush_adapter(struct ciss_softc *sc);
123static int ciss_init_requests(struct ciss_softc *sc);
124static void ciss_command_map_helper(void *arg, bus_dma_segment_t *segs,
125 int nseg, int error);
126static int ciss_identify_adapter(struct ciss_softc *sc);
127static int ciss_init_logical(struct ciss_softc *sc);
9cf9a798
SW
128static int ciss_init_physical(struct ciss_softc *sc);
129static int ciss_filter_physical(struct ciss_softc *sc, struct ciss_lun_report *cll);
984263bc
MD
130static int ciss_identify_logical(struct ciss_softc *sc, struct ciss_ldrive *ld);
131static int ciss_get_ldrive_status(struct ciss_softc *sc, struct ciss_ldrive *ld);
132static int ciss_update_config(struct ciss_softc *sc);
9cf9a798 133static int ciss_accept_media(struct ciss_softc *sc, struct ciss_ldrive *ld);
a8416dcf
SW
134static void ciss_init_sysctl(struct ciss_softc *sc);
135static void ciss_soft_reset(struct ciss_softc *sc);
984263bc 136static void ciss_free(struct ciss_softc *sc);
9cf9a798
SW
137static void ciss_spawn_notify_thread(struct ciss_softc *sc);
138static void ciss_kill_notify_thread(struct ciss_softc *sc);
984263bc
MD
139
140/* request submission/completion */
141static int ciss_start(struct ciss_request *cr);
a8416dcf
SW
142static void ciss_done(struct ciss_softc *sc, cr_qhead_t *qh);
143static void ciss_perf_done(struct ciss_softc *sc, cr_qhead_t *qh);
984263bc 144static void ciss_intr(void *arg);
a8416dcf
SW
145static void ciss_perf_intr(void *arg);
146static void ciss_perf_msi_intr(void *arg);
147static void ciss_complete(struct ciss_softc *sc, cr_qhead_t *qh);
148static int _ciss_report_request(struct ciss_request *cr, int *command_status, int *scsi_status, const char *func);
984263bc
MD
149static int ciss_synch_request(struct ciss_request *cr, int timeout);
150static int ciss_poll_request(struct ciss_request *cr, int timeout);
151static int ciss_wait_request(struct ciss_request *cr, int timeout);
152#if 0
153static int ciss_abort_request(struct ciss_request *cr);
154#endif
155
156/* request queueing */
157static int ciss_get_request(struct ciss_softc *sc, struct ciss_request **crp);
158static void ciss_preen_command(struct ciss_request *cr);
159static void ciss_release_request(struct ciss_request *cr);
160
161/* request helpers */
162static int ciss_get_bmic_request(struct ciss_softc *sc, struct ciss_request **crp,
163 int opcode, void **bufp, size_t bufsize);
164static int ciss_user_command(struct ciss_softc *sc, IOCTL_Command_struct *ioc);
165
166/* DMA map/unmap */
167static int ciss_map_request(struct ciss_request *cr);
168static void ciss_request_map_helper(void *arg, bus_dma_segment_t *segs,
169 int nseg, int error);
170static void ciss_unmap_request(struct ciss_request *cr);
171
172/* CAM interface */
173static int ciss_cam_init(struct ciss_softc *sc);
9cf9a798
SW
174static void ciss_cam_rescan_target(struct ciss_softc *sc,
175 int bus, int target);
984263bc
MD
176static void ciss_cam_rescan_all(struct ciss_softc *sc);
177static void ciss_cam_rescan_callback(struct cam_periph *periph, union ccb *ccb);
178static void ciss_cam_action(struct cam_sim *sim, union ccb *ccb);
179static int ciss_cam_action_io(struct cam_sim *sim, struct ccb_scsiio *csio);
180static int ciss_cam_emulate(struct ciss_softc *sc, struct ccb_scsiio *csio);
181static void ciss_cam_poll(struct cam_sim *sim);
182static void ciss_cam_complete(struct ciss_request *cr);
183static void ciss_cam_complete_fixup(struct ciss_softc *sc, struct ccb_scsiio *csio);
9cf9a798
SW
184static struct cam_periph *ciss_find_periph(struct ciss_softc *sc,
185 int bus, int target);
186static int ciss_name_device(struct ciss_softc *sc, int bus, int target);
984263bc
MD
187
188/* periodic status monitoring */
189static void ciss_periodic(void *arg);
a8416dcf
SW
190static void ciss_nop_complete(struct ciss_request *cr);
191static void ciss_disable_adapter(struct ciss_softc *sc);
984263bc
MD
192static void ciss_notify_event(struct ciss_softc *sc);
193static void ciss_notify_complete(struct ciss_request *cr);
194static int ciss_notify_abort(struct ciss_softc *sc);
195static int ciss_notify_abort_bmic(struct ciss_softc *sc);
9cf9a798 196static void ciss_notify_hotplug(struct ciss_softc *sc, struct ciss_notify *cn);
984263bc
MD
197static void ciss_notify_logical(struct ciss_softc *sc, struct ciss_notify *cn);
198static void ciss_notify_physical(struct ciss_softc *sc, struct ciss_notify *cn);
199
200/* debugging output */
201static void ciss_print_request(struct ciss_request *cr);
202static void ciss_print_ldrive(struct ciss_softc *sc, struct ciss_ldrive *ld);
203static const char *ciss_name_ldrive_status(int status);
204static int ciss_decode_ldrive_status(int status);
205static const char *ciss_name_ldrive_org(int org);
206static const char *ciss_name_command_status(int status);
207
208/*
209 * PCI bus interface.
210 */
211static device_method_t ciss_methods[] = {
212 /* Device interface */
213 DEVMETHOD(device_probe, ciss_probe),
214 DEVMETHOD(device_attach, ciss_attach),
215 DEVMETHOD(device_detach, ciss_detach),
216 DEVMETHOD(device_shutdown, ciss_shutdown),
217 { 0, 0 }
218};
219
220static driver_t ciss_pci_driver = {
221 "ciss",
222 ciss_methods,
223 sizeof(struct ciss_softc)
224};
225
226static devclass_t ciss_devclass;
aa2b9d05 227DRIVER_MODULE(ciss, pci, ciss_pci_driver, ciss_devclass, NULL, NULL);
a8416dcf
SW
228MODULE_VERSION(ciss, 1);
229MODULE_DEPEND(ciss, cam, 1, 1, 1);
230MODULE_DEPEND(ciss, pci, 1, 1, 1);
984263bc
MD
231
232/*
233 * Control device interface.
234 */
235static d_open_t ciss_open;
236static d_close_t ciss_close;
237static d_ioctl_t ciss_ioctl;
238
fef8985e 239static struct dev_ops ciss_ops = {
a8416dcf
SW
240 { "ciss", 0, 0 },
241 .d_open = ciss_open,
242 .d_close = ciss_close,
243 .d_ioctl = ciss_ioctl,
984263bc
MD
244};
245
9cf9a798
SW
246/*
247 * This tunable can be set at boot time and controls whether physical devices
248 * that are marked hidden by the firmware should be exposed anyways.
249 */
250static unsigned int ciss_expose_hidden_physical = 0;
251TUNABLE_INT("hw.ciss.expose_hidden_physical", &ciss_expose_hidden_physical);
252
a8416dcf
SW
253static unsigned int ciss_nop_message_heartbeat = 0;
254TUNABLE_INT("hw.ciss.nop_message_heartbeat", &ciss_nop_message_heartbeat);
255
256/*
257 * This tunable can force a particular transport to be used:
258 * <= 0 : use default
259 * 1 : force simple
260 * 2 : force performant
261 */
262static int ciss_force_transport = 0;
263TUNABLE_INT("hw.ciss.force_transport", &ciss_force_transport);
264
265/*
266 * This tunable can force a particular interrupt delivery method to be used:
267 * <= 0 : use default
268 * 1 : force INTx
269 * 2 : force MSIX
270 */
271static int ciss_force_interrupt = 0;
272TUNABLE_INT("hw.ciss.force_interrupt", &ciss_force_interrupt);
273
984263bc
MD
274/************************************************************************
275 * CISS adapters amazingly don't have a defined programming interface
276 * value. (One could say some very despairing things about PCI and
277 * people just not getting the general idea.) So we are forced to
278 * stick with matching against subvendor/subdevice, and thus have to
279 * be updated for every new CISS adapter that appears.
280 */
a8416dcf
SW
281#define CISS_BOARD_UNKNWON 0
282#define CISS_BOARD_SA5 1
283#define CISS_BOARD_SA5B 2
284#define CISS_BOARD_NOMSI (1<<4)
984263bc
MD
285
286static struct
287{
288 u_int16_t subvendor;
289 u_int16_t subdevice;
290 int flags;
291 char *desc;
292} ciss_vendor_data[] = {
a8416dcf
SW
293 { 0x0e11, 0x4070, CISS_BOARD_SA5|CISS_BOARD_NOMSI, "Compaq Smart Array 5300" },
294 { 0x0e11, 0x4080, CISS_BOARD_SA5B|CISS_BOARD_NOMSI, "Compaq Smart Array 5i" },
295 { 0x0e11, 0x4082, CISS_BOARD_SA5B|CISS_BOARD_NOMSI, "Compaq Smart Array 532" },
296 { 0x0e11, 0x4083, CISS_BOARD_SA5B|CISS_BOARD_NOMSI, "HP Smart Array 5312" },
9cf9a798
SW
297 { 0x0e11, 0x4091, CISS_BOARD_SA5, "HP Smart Array 6i" },
298 { 0x0e11, 0x409A, CISS_BOARD_SA5, "HP Smart Array 641" },
299 { 0x0e11, 0x409B, CISS_BOARD_SA5, "HP Smart Array 642" },
300 { 0x0e11, 0x409C, CISS_BOARD_SA5, "HP Smart Array 6400" },
301 { 0x0e11, 0x409D, CISS_BOARD_SA5, "HP Smart Array 6400 EM" },
302 { 0x103C, 0x3211, CISS_BOARD_SA5, "HP Smart Array E200i" },
303 { 0x103C, 0x3212, CISS_BOARD_SA5, "HP Smart Array E200" },
304 { 0x103C, 0x3213, CISS_BOARD_SA5, "HP Smart Array E200i" },
305 { 0x103C, 0x3214, CISS_BOARD_SA5, "HP Smart Array E200i" },
306 { 0x103C, 0x3215, CISS_BOARD_SA5, "HP Smart Array E200i" },
307 { 0x103C, 0x3220, CISS_BOARD_SA5, "HP Smart Array" },
308 { 0x103C, 0x3222, CISS_BOARD_SA5, "HP Smart Array" },
309 { 0x103C, 0x3223, CISS_BOARD_SA5, "HP Smart Array P800" },
310 { 0x103C, 0x3225, CISS_BOARD_SA5, "HP Smart Array P600" },
311 { 0x103C, 0x3230, CISS_BOARD_SA5, "HP Smart Array" },
312 { 0x103C, 0x3231, CISS_BOARD_SA5, "HP Smart Array" },
313 { 0x103C, 0x3232, CISS_BOARD_SA5, "HP Smart Array" },
314 { 0x103C, 0x3233, CISS_BOARD_SA5, "HP Smart Array" },
315 { 0x103C, 0x3234, CISS_BOARD_SA5, "HP Smart Array P400" },
316 { 0x103C, 0x3235, CISS_BOARD_SA5, "HP Smart Array P400i" },
317 { 0x103C, 0x3236, CISS_BOARD_SA5, "HP Smart Array" },
a8416dcf 318 { 0x103C, 0x3237, CISS_BOARD_SA5, "HP Smart Array E500" },
9cf9a798
SW
319 { 0x103C, 0x3238, CISS_BOARD_SA5, "HP Smart Array" },
320 { 0x103C, 0x3239, CISS_BOARD_SA5, "HP Smart Array" },
321 { 0x103C, 0x323A, CISS_BOARD_SA5, "HP Smart Array" },
322 { 0x103C, 0x323B, CISS_BOARD_SA5, "HP Smart Array" },
323 { 0x103C, 0x323C, CISS_BOARD_SA5, "HP Smart Array" },
a8416dcf 324 { 0x103C, 0x323D, CISS_BOARD_SA5, "HP Smart Array P700m" },
9cf9a798
SW
325 { 0x103C, 0x3241, CISS_BOARD_SA5, "HP Smart Array P212" },
326 { 0x103C, 0x3243, CISS_BOARD_SA5, "HP Smart Array P410" },
327 { 0x103C, 0x3245, CISS_BOARD_SA5, "HP Smart Array P410i" },
328 { 0x103C, 0x3247, CISS_BOARD_SA5, "HP Smart Array P411" },
329 { 0x103C, 0x3249, CISS_BOARD_SA5, "HP Smart Array P812" },
a8416dcf
SW
330 { 0x103C, 0x324A, CISS_BOARD_SA5, "HP Smart Array P712m" },
331 { 0x103C, 0x324B, CISS_BOARD_SA5, "HP Smart Array" },
332 { 0x103C, 0x3350, CISS_BOARD_SA5, "HP Smart Array P222" },
333 { 0x103C, 0x3351, CISS_BOARD_SA5, "HP Smart Array P420" },
334 { 0x103C, 0x3352, CISS_BOARD_SA5, "HP Smart Array P421" },
335 { 0x103C, 0x3353, CISS_BOARD_SA5, "HP Smart Array P822" },
336 { 0x103C, 0x3354, CISS_BOARD_SA5, "HP Smart Array P420i" },
337 { 0x103C, 0x3355, CISS_BOARD_SA5, "HP Smart Array P220i" },
338 { 0x103C, 0x3356, CISS_BOARD_SA5, "HP Smart Array P721m" },
984263bc
MD
339 { 0, 0, 0, NULL }
340};
341
342/************************************************************************
343 * Find a match for the device in our list of known adapters.
344 */
345static int
346ciss_lookup(device_t dev)
347{
348 int i;
9cf9a798 349
984263bc
MD
350 for (i = 0; ciss_vendor_data[i].desc != NULL; i++)
351 if ((pci_get_subvendor(dev) == ciss_vendor_data[i].subvendor) &&
352 (pci_get_subdevice(dev) == ciss_vendor_data[i].subdevice)) {
353 return(i);
354 }
355 return(-1);
356}
357
358/************************************************************************
359 * Match a known CISS adapter.
360 */
361static int
362ciss_probe(device_t dev)
363{
364 int i;
9cf9a798 365
984263bc
MD
366 i = ciss_lookup(dev);
367 if (i != -1) {
368 device_set_desc(dev, ciss_vendor_data[i].desc);
a8416dcf 369 return(BUS_PROBE_DEFAULT);
984263bc
MD
370 }
371 return(ENOENT);
9cf9a798 372}
984263bc
MD
373
374/************************************************************************
375 * Attach the driver to this adapter.
376 */
377static int
378ciss_attach(device_t dev)
379{
380 struct ciss_softc *sc;
a8416dcf 381 int error;
984263bc
MD
382
383 debug_called(1);
384
385#ifdef CISS_DEBUG
386 /* print structure/union sizes */
387 debug_struct(ciss_command);
388 debug_struct(ciss_header);
389 debug_union(ciss_device_address);
390 debug_struct(ciss_cdb);
391 debug_struct(ciss_report_cdb);
392 debug_struct(ciss_notify_cdb);
393 debug_struct(ciss_notify);
394 debug_struct(ciss_message_cdb);
395 debug_struct(ciss_error_info_pointer);
396 debug_struct(ciss_error_info);
397 debug_struct(ciss_sg_entry);
398 debug_struct(ciss_config_table);
399 debug_struct(ciss_bmic_cdb);
400 debug_struct(ciss_bmic_id_ldrive);
401 debug_struct(ciss_bmic_id_lstatus);
402 debug_struct(ciss_bmic_id_table);
403 debug_struct(ciss_bmic_id_pdrive);
404 debug_struct(ciss_bmic_blink_pdrive);
405 debug_struct(ciss_bmic_flush_cache);
406 debug_const(CISS_MAX_REQUESTS);
407 debug_const(CISS_MAX_LOGICAL);
408 debug_const(CISS_INTERRUPT_COALESCE_DELAY);
409 debug_const(CISS_INTERRUPT_COALESCE_COUNT);
410 debug_const(CISS_COMMAND_ALLOC_SIZE);
411 debug_const(CISS_COMMAND_SG_LENGTH);
412
413 debug_type(cciss_pci_info_struct);
414 debug_type(cciss_coalint_struct);
415 debug_type(cciss_coalint_struct);
416 debug_type(NodeName_type);
417 debug_type(NodeName_type);
418 debug_type(Heartbeat_type);
419 debug_type(BusTypes_type);
420 debug_type(FirmwareVer_type);
421 debug_type(DriverVer_type);
422 debug_type(IOCTL_Command_struct);
423#endif
424
425 sc = device_get_softc(dev);
426 sc->ciss_dev = dev;
a8416dcf 427 lockinit(&sc->ciss_lock, "cissmtx", 0, LK_CANRECURSE);
aa1ab3c5 428 callout_init(&sc->ciss_periodic);
984263bc
MD
429
430 /*
984263bc
MD
431 * Do PCI-specific init.
432 */
433 if ((error = ciss_init_pci(sc)) != 0)
434 goto out;
435
436 /*
437 * Initialise driver queues.
438 */
439 ciss_initq_free(sc);
9cf9a798 440 ciss_initq_notify(sc);
984263bc
MD
441
442 /*
a8416dcf
SW
443 * Initalize device sysctls.
444 */
445 ciss_init_sysctl(sc);
446
447 /*
984263bc
MD
448 * Initialise command/request pool.
449 */
450 if ((error = ciss_init_requests(sc)) != 0)
451 goto out;
452
453 /*
454 * Get adapter information.
455 */
456 if ((error = ciss_identify_adapter(sc)) != 0)
457 goto out;
9cf9a798
SW
458
459 /*
460 * Find all the physical devices.
461 */
462 if ((error = ciss_init_physical(sc)) != 0)
463 goto out;
464
984263bc
MD
465 /*
466 * Build our private table of logical devices.
467 */
468 if ((error = ciss_init_logical(sc)) != 0)
469 goto out;
470
471 /*
472 * Enable interrupts so that the CAM scan can complete.
473 */
474 CISS_TL_SIMPLE_ENABLE_INTERRUPTS(sc);
475
476 /*
477 * Initialise the CAM interface.
478 */
479 if ((error = ciss_cam_init(sc)) != 0)
480 goto out;
481
482 /*
483 * Start the heartbeat routine and event chain.
484 */
485 ciss_periodic(sc);
486
3e82b46c 487 /*
984263bc
MD
488 * Create the control device.
489 */
fef8985e 490 sc->ciss_dev_t = make_dev(&ciss_ops, device_get_unit(sc->ciss_dev),
984263bc
MD
491 UID_ROOT, GID_OPERATOR, S_IRUSR | S_IWUSR,
492 "ciss%d", device_get_unit(sc->ciss_dev));
493 sc->ciss_dev_t->si_drv1 = sc;
494
495 /*
496 * The adapter is running; synchronous commands can now sleep
497 * waiting for an interrupt to signal completion.
498 */
499 sc->ciss_flags |= CISS_FLAG_RUNNING;
500
9cf9a798
SW
501 ciss_spawn_notify_thread(sc);
502
984263bc
MD
503 error = 0;
504 out:
a8416dcf
SW
505 if (error != 0) {
506 /* ciss_free() expects the mutex to be held */
507 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc 508 ciss_free(sc);
a8416dcf 509 }
984263bc
MD
510 return(error);
511}
512
513/************************************************************************
514 * Detach the driver from this adapter.
515 */
516static int
517ciss_detach(device_t dev)
518{
519 struct ciss_softc *sc = device_get_softc(dev);
520
521 debug_called(1);
9cf9a798 522
a8416dcf
SW
523 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
524 if (sc->ciss_flags & CISS_FLAG_CONTROL_OPEN) {
525 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798 526 return (EBUSY);
a8416dcf 527 }
9cf9a798 528
984263bc
MD
529 /* flush adapter cache */
530 ciss_flush_adapter(sc);
531
a8416dcf 532 /* release all resources. The mutex is released and freed here too. */
984263bc
MD
533 ciss_free(sc);
534
535 return(0);
984263bc
MD
536}
537
538/************************************************************************
539 * Prepare adapter for system shutdown.
540 */
541static int
542ciss_shutdown(device_t dev)
543{
544 struct ciss_softc *sc = device_get_softc(dev);
545
546 debug_called(1);
547
a8416dcf 548 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc
MD
549 /* flush adapter cache */
550 ciss_flush_adapter(sc);
551
a8416dcf
SW
552 if (sc->ciss_soft_reset)
553 ciss_soft_reset(sc);
554 lockmgr(&sc->ciss_lock, LK_RELEASE);
555
984263bc
MD
556 return(0);
557}
558
a8416dcf
SW
559static void
560ciss_init_sysctl(struct ciss_softc *sc)
561{
562 sysctl_ctx_init(&sc->ciss_sysctl_ctx);
563 sc->ciss_sysctl_tree = SYSCTL_ADD_NODE(&sc->ciss_sysctl_ctx,
564 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
565 device_get_nameunit(sc->ciss_dev), CTLFLAG_RD, 0, "");
566 SYSCTL_ADD_INT(&sc->ciss_sysctl_ctx,
567 SYSCTL_CHILDREN(sc->ciss_sysctl_tree),
568 OID_AUTO, "soft_reset", CTLFLAG_RW, &sc->ciss_soft_reset, 0, "");
569}
570
984263bc
MD
571/************************************************************************
572 * Perform PCI-specific attachment actions.
573 */
574static int
575ciss_init_pci(struct ciss_softc *sc)
576{
577 uintptr_t cbase, csize, cofs;
a8416dcf
SW
578 uint32_t method, supported_methods;
579 int error, sqmask, i;
580 void *intr;
581 int use_msi;
582 u_int irq_flags;
984263bc
MD
583
584 debug_called(1);
585
586 /*
a8416dcf
SW
587 * Work out adapter type.
588 */
589 i = ciss_lookup(sc->ciss_dev);
590 if (i < 0) {
591 ciss_printf(sc, "unknown adapter type\n");
592 return (ENXIO);
593 }
594
595 if (ciss_vendor_data[i].flags & CISS_BOARD_SA5) {
596 sqmask = CISS_TL_SIMPLE_INTR_OPQ_SA5;
597 } else if (ciss_vendor_data[i].flags & CISS_BOARD_SA5B) {
598 sqmask = CISS_TL_SIMPLE_INTR_OPQ_SA5B;
599 } else {
600 /*
601 * XXX Big hammer, masks/unmasks all possible interrupts. This should
602 * work on all hardware variants. Need to add code to handle the
603 * "controller crashed" interupt bit that this unmasks.
604 */
605 sqmask = ~0;
606 }
607
608 /*
984263bc
MD
609 * Allocate register window first (we need this to find the config
610 * struct).
611 */
612 error = ENXIO;
613 sc->ciss_regs_rid = CISS_TL_SIMPLE_BAR_REGS;
614 if ((sc->ciss_regs_resource =
a8416dcf
SW
615 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_MEMORY,
616 &sc->ciss_regs_rid, RF_ACTIVE)) == NULL) {
984263bc
MD
617 ciss_printf(sc, "can't allocate register window\n");
618 return(ENXIO);
619 }
620 sc->ciss_regs_bhandle = rman_get_bushandle(sc->ciss_regs_resource);
621 sc->ciss_regs_btag = rman_get_bustag(sc->ciss_regs_resource);
9cf9a798 622
984263bc
MD
623 /*
624 * Find the BAR holding the config structure. If it's not the one
625 * we already mapped for registers, map it too.
626 */
627 sc->ciss_cfg_rid = CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_CFG_BAR) & 0xffff;
628 if (sc->ciss_cfg_rid != sc->ciss_regs_rid) {
629 if ((sc->ciss_cfg_resource =
a8416dcf
SW
630 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_MEMORY,
631 &sc->ciss_cfg_rid, RF_ACTIVE)) == NULL) {
984263bc
MD
632 ciss_printf(sc, "can't allocate config window\n");
633 return(ENXIO);
634 }
635 cbase = (uintptr_t)rman_get_virtual(sc->ciss_cfg_resource);
636 csize = rman_get_end(sc->ciss_cfg_resource) -
637 rman_get_start(sc->ciss_cfg_resource) + 1;
638 } else {
639 cbase = (uintptr_t)rman_get_virtual(sc->ciss_regs_resource);
640 csize = rman_get_end(sc->ciss_regs_resource) -
641 rman_get_start(sc->ciss_regs_resource) + 1;
642 }
643 cofs = CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_CFG_OFF);
9cf9a798 644
984263bc
MD
645 /*
646 * Use the base/size/offset values we just calculated to
647 * sanity-check the config structure. If it's OK, point to it.
648 */
649 if ((cofs + sizeof(struct ciss_config_table)) > csize) {
650 ciss_printf(sc, "config table outside window\n");
651 return(ENXIO);
652 }
653 sc->ciss_cfg = (struct ciss_config_table *)(cbase + cofs);
654 debug(1, "config struct at %p", sc->ciss_cfg);
9cf9a798 655
984263bc 656 /*
a8416dcf
SW
657 * Calculate the number of request structures/commands we are
658 * going to provide for this adapter.
659 */
660 sc->ciss_max_requests = min(CISS_MAX_REQUESTS, sc->ciss_cfg->max_outstanding_commands);
661
662 /*
984263bc
MD
663 * Validate the config structure. If we supported other transport
664 * methods, we could select amongst them at this point in time.
665 */
666 if (strncmp(sc->ciss_cfg->signature, "CISS", 4)) {
667 ciss_printf(sc, "config signature mismatch (got '%c%c%c%c')\n",
668 sc->ciss_cfg->signature[0], sc->ciss_cfg->signature[1],
669 sc->ciss_cfg->signature[2], sc->ciss_cfg->signature[3]);
670 return(ENXIO);
671 }
984263bc
MD
672
673 /*
a8416dcf 674 * Select the mode of operation, prefer Performant.
984263bc 675 */
a8416dcf
SW
676 if (!(sc->ciss_cfg->supported_methods &
677 (CISS_TRANSPORT_METHOD_SIMPLE | CISS_TRANSPORT_METHOD_PERF))) {
678 ciss_printf(sc, "No supported transport layers: 0x%x\n",
679 sc->ciss_cfg->supported_methods);
680 }
681
682 switch (ciss_force_transport) {
683 case 1:
684 supported_methods = CISS_TRANSPORT_METHOD_SIMPLE;
685 break;
686 case 2:
687 supported_methods = CISS_TRANSPORT_METHOD_PERF;
688 break;
689 default:
690 supported_methods = sc->ciss_cfg->supported_methods;
691 break;
692 }
693
694setup:
695 if ((supported_methods & CISS_TRANSPORT_METHOD_PERF) != 0) {
696 method = CISS_TRANSPORT_METHOD_PERF;
697 sc->ciss_perf = (struct ciss_perf_config *)(cbase + cofs +
698 sc->ciss_cfg->transport_offset);
699 if (ciss_init_perf(sc)) {
700 supported_methods &= ~method;
701 goto setup;
702 }
703 } else if (supported_methods & CISS_TRANSPORT_METHOD_SIMPLE) {
704 method = CISS_TRANSPORT_METHOD_SIMPLE;
705 } else {
706 ciss_printf(sc, "No supported transport methods: 0x%x\n",
707 sc->ciss_cfg->supported_methods);
984263bc
MD
708 return(ENXIO);
709 }
a8416dcf
SW
710
711 /*
712 * Tell it we're using the low 4GB of RAM. Set the default interrupt
713 * coalescing options.
714 */
715 sc->ciss_cfg->requested_method = method;
984263bc
MD
716 sc->ciss_cfg->command_physlimit = 0;
717 sc->ciss_cfg->interrupt_coalesce_delay = CISS_INTERRUPT_COALESCE_DELAY;
718 sc->ciss_cfg->interrupt_coalesce_count = CISS_INTERRUPT_COALESCE_COUNT;
719
9cf9a798
SW
720#ifdef __i386__
721 sc->ciss_cfg->host_driver |= CISS_DRIVER_SCSI_PREFETCH;
722#endif
723
984263bc
MD
724 if (ciss_update_config(sc)) {
725 ciss_printf(sc, "adapter refuses to accept config update (IDBR 0x%x)\n",
726 CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_IDBR));
727 return(ENXIO);
728 }
a8416dcf
SW
729 if ((sc->ciss_cfg->active_method & method) == 0) {
730 supported_methods &= ~method;
731 if (supported_methods == 0) {
732 ciss_printf(sc, "adapter refuses to go into available transports "
733 "mode (0x%x, 0x%x)\n", supported_methods,
734 sc->ciss_cfg->active_method);
735 return(ENXIO);
736 } else
737 goto setup;
984263bc
MD
738 }
739
740 /*
741 * Wait for the adapter to come ready.
742 */
743 if ((error = ciss_wait_adapter(sc)) != 0)
744 return(error);
745
a8416dcf
SW
746 /* Prepare to possibly use MSIX and/or PERFORMANT interrupts. Normal
747 * interrupts have a rid of 0, this will be overridden if MSIX is used.
748 */
749 sc->ciss_irq_rid[0] = 0;
750 if (method == CISS_TRANSPORT_METHOD_PERF) {
751 ciss_printf(sc, "PERFORMANT Transport\n");
752 if ((ciss_force_interrupt != 1) && (ciss_setup_msix(sc) == 0)) {
753 intr = ciss_perf_msi_intr;
754 } else {
755 intr = ciss_perf_intr;
756 }
757 /* XXX The docs say that the 0x01 bit is only for SAS controllers.
758 * Unfortunately, there is no good way to know if this is a SAS
759 * controller. Hopefully enabling this bit universally will work OK.
760 * It seems to work fine for SA6i controllers.
761 */
762 sc->ciss_interrupt_mask = CISS_TL_PERF_INTR_OPQ | CISS_TL_PERF_INTR_MSI;
763
764 } else {
765 ciss_printf(sc, "SIMPLE Transport\n");
766 /* MSIX doesn't seem to work in SIMPLE mode, only enable if it forced */
767 if (ciss_force_interrupt == 2)
768 /* If this fails, we automatically revert to INTx */
769 ciss_setup_msix(sc);
770 sc->ciss_perf = NULL;
771 intr = ciss_intr;
772 sc->ciss_interrupt_mask = sqmask;
773 }
984263bc
MD
774 /*
775 * Turn off interrupts before we go routing anything.
776 */
777 CISS_TL_SIMPLE_DISABLE_INTERRUPTS(sc);
9cf9a798 778
984263bc
MD
779 /*
780 * Allocate and set up our interrupt.
781 */
a8416dcf
SW
782#ifdef __DragonFly__ /* DragonFly specific MSI setup */
783 use_msi = (intr == ciss_perf_msi_intr);
784#endif
785 sc->ciss_irq_rid[0] = 0;
786 sc->ciss_irq_type = pci_alloc_1intr(sc->ciss_dev, use_msi,
787 &sc->ciss_irq_rid[0], &irq_flags);
984263bc 788 if ((sc->ciss_irq_resource =
a8416dcf
SW
789 bus_alloc_resource_any(sc->ciss_dev, SYS_RES_IRQ, &sc->ciss_irq_rid[0],
790 irq_flags)) == NULL) {
984263bc
MD
791 ciss_printf(sc, "can't allocate interrupt\n");
792 return(ENXIO);
793 }
a8416dcf
SW
794
795 if (bus_setup_intr(sc->ciss_dev, sc->ciss_irq_resource,
796 INTR_MPSAFE, intr, sc,
797 &sc->ciss_intr, NULL)) {
984263bc
MD
798 ciss_printf(sc, "can't set up interrupt\n");
799 return(ENXIO);
800 }
801
802 /*
803 * Allocate the parent bus DMA tag appropriate for our PCI
804 * interface.
9cf9a798 805 *
984263bc
MD
806 * Note that "simple" adapters can only address within a 32-bit
807 * span.
808 */
a8416dcf 809 if (bus_dma_tag_create(NULL, /* PCI parent */
984263bc 810 1, 0, /* alignment, boundary */
9cf9a798 811 BUS_SPACE_MAXADDR, /* lowaddr */
984263bc
MD
812 BUS_SPACE_MAXADDR, /* highaddr */
813 NULL, NULL, /* filter, filterarg */
9cf9a798 814 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
a8416dcf 815 CISS_MAX_SG_ELEMENTS, /* nsegments */
984263bc 816 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
a8416dcf 817 0, /* flags */
984263bc
MD
818 &sc->ciss_parent_dmat)) {
819 ciss_printf(sc, "can't allocate parent DMA tag\n");
820 return(ENOMEM);
821 }
822
823 /*
824 * Create DMA tag for mapping buffers into adapter-addressable
825 * space.
826 */
827 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
828 1, 0, /* alignment, boundary */
829 BUS_SPACE_MAXADDR, /* lowaddr */
830 BUS_SPACE_MAXADDR, /* highaddr */
831 NULL, NULL, /* filter, filterarg */
a8416dcf 832 MAXBSIZE, CISS_MAX_SG_ELEMENTS, /* maxsize, nsegments */
984263bc 833 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
a8416dcf 834 BUS_DMA_ALLOCNOW, /* flags */
984263bc
MD
835 &sc->ciss_buffer_dmat)) {
836 ciss_printf(sc, "can't allocate buffer DMA tag\n");
837 return(ENOMEM);
838 }
839 return(0);
840}
841
842/************************************************************************
a8416dcf
SW
843 * Setup MSI/MSIX operation (Performant only)
844 * Four interrupts are available, but we only use 1 right now. If MSI-X
845 * isn't avaialble, try using MSI instead.
846 */
847static int
848ciss_setup_msix(struct ciss_softc *sc)
849{
850 int val, i;
851
852 /* Weed out devices that don't actually support MSI */
853 i = ciss_lookup(sc->ciss_dev);
854 if (ciss_vendor_data[i].flags & CISS_BOARD_NOMSI)
855 return (EINVAL);
856
857#if 0 /* XXX swildner */
858 /*
859 * Only need to use the minimum number of MSI vectors, as the driver
860 * doesn't support directed MSIX interrupts.
861 */
862 val = pci_msix_count(sc->ciss_dev);
863 if (val < CISS_MSI_COUNT) {
864 val = pci_msi_count(sc->ciss_dev);
865 device_printf(sc->ciss_dev, "got %d MSI messages]\n", val);
866 if (val < CISS_MSI_COUNT)
867 return (EINVAL);
868 }
869 val = MIN(val, CISS_MSI_COUNT);
870 if (pci_alloc_msix(sc->ciss_dev, &val) != 0) {
871 if (pci_alloc_msi(sc->ciss_dev, &val) != 0)
872 return (EINVAL);
873 }
874#endif
875
876 val = 1;
877 sc->ciss_msi = val;
878 if (bootverbose)
879 ciss_printf(sc, "Using %d MSIX interrupt%s\n", val,
880 (val != 1) ? "s" : "");
881
882 for (i = 0; i < val; i++)
883 sc->ciss_irq_rid[i] = i + 1;
884
885 return (0);
886
887}
888
889/************************************************************************
890 * Setup the Performant structures.
891 */
892static int
893ciss_init_perf(struct ciss_softc *sc)
894{
895 struct ciss_perf_config *pc = sc->ciss_perf;
896 int reply_size;
897
898 /*
899 * Create the DMA tag for the reply queue.
900 */
901 reply_size = sizeof(uint64_t) * sc->ciss_max_requests;
902 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
903 1, 0, /* alignment, boundary */
904 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
905 BUS_SPACE_MAXADDR, /* highaddr */
906 NULL, NULL, /* filter, filterarg */
907 reply_size, 1, /* maxsize, nsegments */
908 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
909 0, /* flags */
910 &sc->ciss_reply_dmat)) {
911 ciss_printf(sc, "can't allocate reply DMA tag\n");
912 return(ENOMEM);
913 }
914 /*
915 * Allocate memory and make it available for DMA.
916 */
917 if (bus_dmamem_alloc(sc->ciss_reply_dmat, (void **)&sc->ciss_reply,
918 BUS_DMA_NOWAIT, &sc->ciss_reply_map)) {
919 ciss_printf(sc, "can't allocate reply memory\n");
920 return(ENOMEM);
921 }
922 bus_dmamap_load(sc->ciss_reply_dmat, sc->ciss_reply_map, sc->ciss_reply,
923 reply_size, ciss_command_map_helper, &sc->ciss_reply_phys, 0);
924 bzero(sc->ciss_reply, reply_size);
925
926 sc->ciss_cycle = 0x1;
927 sc->ciss_rqidx = 0;
928
929 /*
930 * Preload the fetch table with common command sizes. This allows the
931 * hardware to not waste bus cycles for typical i/o commands, but also not
932 * tax the driver to be too exact in choosing sizes. The table is optimized
933 * for page-aligned i/o's, but since most i/o comes from the various pagers,
934 * it's a reasonable assumption to make.
935 */
936 pc->fetch_count[CISS_SG_FETCH_NONE] = (sizeof(struct ciss_command) + 15) / 16;
937 pc->fetch_count[CISS_SG_FETCH_1] =
938 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 1 + 15) / 16;
939 pc->fetch_count[CISS_SG_FETCH_2] =
940 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 2 + 15) / 16;
941 pc->fetch_count[CISS_SG_FETCH_4] =
942 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 4 + 15) / 16;
943 pc->fetch_count[CISS_SG_FETCH_8] =
944 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 8 + 15) / 16;
945 pc->fetch_count[CISS_SG_FETCH_16] =
946 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 16 + 15) / 16;
947 pc->fetch_count[CISS_SG_FETCH_32] =
948 (sizeof(struct ciss_command) + sizeof(struct ciss_sg_entry) * 32 + 15) / 16;
949 pc->fetch_count[CISS_SG_FETCH_MAX] = (CISS_COMMAND_ALLOC_SIZE + 15) / 16;
950
951 pc->rq_size = sc->ciss_max_requests; /* XXX less than the card supports? */
952 pc->rq_count = 1; /* XXX Hardcode for a single queue */
953 pc->rq_bank_hi = 0;
954 pc->rq_bank_lo = 0;
955 pc->rq[0].rq_addr_hi = 0x0;
956 pc->rq[0].rq_addr_lo = sc->ciss_reply_phys;
957
958 return(0);
959}
960
961/************************************************************************
984263bc
MD
962 * Wait for the adapter to come ready.
963 */
964static int
965ciss_wait_adapter(struct ciss_softc *sc)
966{
967 int i;
968
969 debug_called(1);
9cf9a798 970
984263bc
MD
971 /*
972 * Wait for the adapter to come ready.
973 */
974 if (!(sc->ciss_cfg->active_method & CISS_TRANSPORT_METHOD_READY)) {
975 ciss_printf(sc, "waiting for adapter to come ready...\n");
976 for (i = 0; !(sc->ciss_cfg->active_method & CISS_TRANSPORT_METHOD_READY); i++) {
977 DELAY(1000000); /* one second */
978 if (i > 30) {
979 ciss_printf(sc, "timed out waiting for adapter to come ready\n");
980 return(EIO);
981 }
982 }
983 }
984 return(0);
985}
986
987/************************************************************************
988 * Flush the adapter cache.
989 */
990static int
991ciss_flush_adapter(struct ciss_softc *sc)
992{
993 struct ciss_request *cr;
994 struct ciss_bmic_flush_cache *cbfc;
995 int error, command_status;
996
997 debug_called(1);
998
999 cr = NULL;
1000 cbfc = NULL;
1001
1002 /*
1003 * Build a BMIC request to flush the cache. We don't disable
1004 * it, as we may be going to do more I/O (eg. we are emulating
1005 * the Synchronise Cache command).
1006 */
efda3bd0 1007 cbfc = kmalloc(sizeof(*cbfc), CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
984263bc 1008 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_FLUSH_CACHE,
a8416dcf 1009 (void **)&cbfc, sizeof(*cbfc))) != 0)
984263bc
MD
1010 goto out;
1011
1012 /*
1013 * Submit the request and wait for it to complete.
1014 */
1015 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1016 ciss_printf(sc, "error sending BMIC FLUSH_CACHE command (%d)\n", error);
1017 goto out;
1018 }
9cf9a798 1019
984263bc
MD
1020 /*
1021 * Check response.
1022 */
1023 ciss_report_request(cr, &command_status, NULL);
1024 switch(command_status) {
1025 case CISS_CMD_STATUS_SUCCESS:
1026 break;
1027 default:
9cf9a798 1028 ciss_printf(sc, "error flushing cache (%s)\n",
984263bc
MD
1029 ciss_name_command_status(command_status));
1030 error = EIO;
1031 goto out;
1032 }
1033
1034out:
1035 if (cbfc != NULL)
efda3bd0 1036 kfree(cbfc, CISS_MALLOC_CLASS);
984263bc
MD
1037 if (cr != NULL)
1038 ciss_release_request(cr);
1039 return(error);
1040}
1041
a8416dcf
SW
1042static void
1043ciss_soft_reset(struct ciss_softc *sc)
1044{
1045 struct ciss_request *cr = NULL;
1046 struct ciss_command *cc;
1047 int i, error = 0;
1048
1049 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
1050 /* only reset proxy controllers */
1051 if (sc->ciss_controllers[i].physical.bus == 0)
1052 continue;
1053
1054 if ((error = ciss_get_request(sc, &cr)) != 0)
1055 break;
1056
1057 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_SOFT_RESET,
1058 NULL, 0)) != 0)
1059 break;
1060
1061 cc = cr->cr_cc;
1062 cc->header.address = sc->ciss_controllers[i];
1063
1064 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0)
1065 break;
1066
1067 ciss_release_request(cr);
1068 }
1069
1070 if (error)
1071 ciss_printf(sc, "error resetting controller (%d)\n", error);
1072
1073 if (cr != NULL)
1074 ciss_release_request(cr);
1075}
1076
984263bc
MD
1077/************************************************************************
1078 * Allocate memory for the adapter command structures, initialise
1079 * the request structures.
1080 *
1081 * Note that the entire set of commands are allocated in a single
1082 * contiguous slab.
1083 */
1084static int
1085ciss_init_requests(struct ciss_softc *sc)
1086{
1087 struct ciss_request *cr;
1088 int i;
1089
1090 debug_called(1);
9cf9a798 1091
9cf9a798 1092 if (bootverbose)
984263bc
MD
1093 ciss_printf(sc, "using %d of %d available commands\n",
1094 sc->ciss_max_requests, sc->ciss_cfg->max_outstanding_commands);
1095
1096 /*
1097 * Create the DMA tag for commands.
1098 */
1099 if (bus_dma_tag_create(sc->ciss_parent_dmat, /* parent */
a8416dcf 1100 32, 0, /* alignment, boundary */
9cf9a798 1101 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
984263bc
MD
1102 BUS_SPACE_MAXADDR, /* highaddr */
1103 NULL, NULL, /* filter, filterarg */
9cf9a798 1104 CISS_COMMAND_ALLOC_SIZE *
984263bc
MD
1105 sc->ciss_max_requests, 1, /* maxsize, nsegments */
1106 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
a8416dcf 1107 0, /* flags */
984263bc
MD
1108 &sc->ciss_command_dmat)) {
1109 ciss_printf(sc, "can't allocate command DMA tag\n");
1110 return(ENOMEM);
1111 }
1112 /*
1113 * Allocate memory and make it available for DMA.
1114 */
9cf9a798 1115 if (bus_dmamem_alloc(sc->ciss_command_dmat, (void **)&sc->ciss_command,
984263bc
MD
1116 BUS_DMA_NOWAIT, &sc->ciss_command_map)) {
1117 ciss_printf(sc, "can't allocate command memory\n");
1118 return(ENOMEM);
1119 }
a8416dcf 1120 bus_dmamap_load(sc->ciss_command_dmat, sc->ciss_command_map,sc->ciss_command,
9cf9a798 1121 CISS_COMMAND_ALLOC_SIZE * sc->ciss_max_requests,
a8416dcf 1122 ciss_command_map_helper, &sc->ciss_command_phys, 0);
984263bc
MD
1123 bzero(sc->ciss_command, CISS_COMMAND_ALLOC_SIZE * sc->ciss_max_requests);
1124
1125 /*
1126 * Set up the request and command structures, push requests onto
1127 * the free queue.
1128 */
1129 for (i = 1; i < sc->ciss_max_requests; i++) {
1130 cr = &sc->ciss_request[i];
1131 cr->cr_sc = sc;
1132 cr->cr_tag = i;
a8416dcf
SW
1133 cr->cr_cc = (struct ciss_command *)((uintptr_t)sc->ciss_command +
1134 CISS_COMMAND_ALLOC_SIZE * i);
1135 cr->cr_ccphys = sc->ciss_command_phys + CISS_COMMAND_ALLOC_SIZE * i;
9cf9a798 1136 bus_dmamap_create(sc->ciss_buffer_dmat, 0, &cr->cr_datamap);
984263bc
MD
1137 ciss_enqueue_free(cr);
1138 }
1139 return(0);
1140}
1141
1142static void
1143ciss_command_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
1144{
a8416dcf 1145 uint32_t *addr;
984263bc 1146
a8416dcf
SW
1147 addr = arg;
1148 *addr = segs[0].ds_addr;
984263bc
MD
1149}
1150
1151/************************************************************************
1152 * Identify the adapter, print some information about it.
1153 */
1154static int
1155ciss_identify_adapter(struct ciss_softc *sc)
1156{
1157 struct ciss_request *cr;
1158 int error, command_status;
1159
1160 debug_called(1);
1161
1162 cr = NULL;
1163
1164 /*
1165 * Get a request, allocate storage for the adapter data.
1166 */
1167 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_CTLR,
a8416dcf 1168 (void **)&sc->ciss_id,
984263bc
MD
1169 sizeof(*sc->ciss_id))) != 0)
1170 goto out;
1171
1172 /*
1173 * Submit the request and wait for it to complete.
1174 */
1175 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1176 ciss_printf(sc, "error sending BMIC ID_CTLR command (%d)\n", error);
1177 goto out;
1178 }
9cf9a798 1179
984263bc
MD
1180 /*
1181 * Check response.
1182 */
1183 ciss_report_request(cr, &command_status, NULL);
1184 switch(command_status) {
1185 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1186 break;
1187 case CISS_CMD_STATUS_DATA_UNDERRUN:
1188 case CISS_CMD_STATUS_DATA_OVERRUN:
1189 ciss_printf(sc, "data over/underrun reading adapter information\n");
1190 default:
1191 ciss_printf(sc, "error reading adapter information (%s)\n",
1192 ciss_name_command_status(command_status));
1193 error = EIO;
1194 goto out;
1195 }
1196
1197 /* sanity-check reply */
1198 if (!sc->ciss_id->big_map_supported) {
1199 ciss_printf(sc, "adapter does not support BIG_MAP\n");
1200 error = ENXIO;
1201 goto out;
1202 }
1203
a8416dcf 1204#if 0
984263bc
MD
1205 /* XXX later revisions may not need this */
1206 sc->ciss_flags |= CISS_FLAG_FAKE_SYNCH;
1207#endif
1208
1209 /* XXX only really required for old 5300 adapters? */
1210 sc->ciss_flags |= CISS_FLAG_BMIC_ABORT;
9cf9a798 1211
984263bc 1212 /* print information */
9cf9a798
SW
1213 if (bootverbose) {
1214#if 0 /* XXX proxy volumes??? */
984263bc
MD
1215 ciss_printf(sc, " %d logical drive%s configured\n",
1216 sc->ciss_id->configured_logical_drives,
1217 (sc->ciss_id->configured_logical_drives == 1) ? "" : "s");
9cf9a798 1218#endif
984263bc
MD
1219 ciss_printf(sc, " firmware %4.4s\n", sc->ciss_id->running_firmware_revision);
1220 ciss_printf(sc, " %d SCSI channels\n", sc->ciss_id->scsi_bus_count);
1221
1222 ciss_printf(sc, " signature '%.4s'\n", sc->ciss_cfg->signature);
1223 ciss_printf(sc, " valence %d\n", sc->ciss_cfg->valence);
1224 ciss_printf(sc, " supported I/O methods 0x%b\n",
9cf9a798 1225 sc->ciss_cfg->supported_methods,
984263bc
MD
1226 "\20\1READY\2simple\3performant\4MEMQ\n");
1227 ciss_printf(sc, " active I/O method 0x%b\n",
1228 sc->ciss_cfg->active_method, "\20\2simple\3performant\4MEMQ\n");
1229 ciss_printf(sc, " 4G page base 0x%08x\n",
1230 sc->ciss_cfg->command_physlimit);
1231 ciss_printf(sc, " interrupt coalesce delay %dus\n",
1232 sc->ciss_cfg->interrupt_coalesce_delay);
1233 ciss_printf(sc, " interrupt coalesce count %d\n",
1234 sc->ciss_cfg->interrupt_coalesce_count);
1235 ciss_printf(sc, " max outstanding commands %d\n",
1236 sc->ciss_cfg->max_outstanding_commands);
9cf9a798 1237 ciss_printf(sc, " bus types 0x%b\n", sc->ciss_cfg->bus_types,
984263bc
MD
1238 "\20\1ultra2\2ultra3\10fibre1\11fibre2\n");
1239 ciss_printf(sc, " server name '%.16s'\n", sc->ciss_cfg->server_name);
1240 ciss_printf(sc, " heartbeat 0x%x\n", sc->ciss_cfg->heartbeat);
1241 }
1242
1243out:
1244 if (error) {
1245 if (sc->ciss_id != NULL) {
efda3bd0 1246 kfree(sc->ciss_id, CISS_MALLOC_CLASS);
984263bc
MD
1247 sc->ciss_id = NULL;
1248 }
9cf9a798 1249 }
984263bc
MD
1250 if (cr != NULL)
1251 ciss_release_request(cr);
1252 return(error);
1253}
1254
1255/************************************************************************
9cf9a798 1256 * Helper routine for generating a list of logical and physical luns.
984263bc 1257 */
9cf9a798
SW
1258static struct ciss_lun_report *
1259ciss_report_luns(struct ciss_softc *sc, int opcode, int nunits)
984263bc
MD
1260{
1261 struct ciss_request *cr;
1262 struct ciss_command *cc;
1263 struct ciss_report_cdb *crc;
1264 struct ciss_lun_report *cll;
984263bc 1265 int command_status;
9cf9a798
SW
1266 int report_size;
1267 int error = 0;
984263bc
MD
1268
1269 debug_called(1);
1270
1271 cr = NULL;
1272 cll = NULL;
1273
1274 /*
1275 * Get a request, allocate storage for the address list.
1276 */
1277 if ((error = ciss_get_request(sc, &cr)) != 0)
1278 goto out;
9cf9a798 1279 report_size = sizeof(*cll) + nunits * sizeof(union ciss_device_address);
efda3bd0 1280 cll = kmalloc(report_size, CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
984263bc
MD
1281
1282 /*
9cf9a798 1283 * Build the Report Logical/Physical LUNs command.
984263bc 1284 */
a8416dcf 1285 cc = cr->cr_cc;
984263bc
MD
1286 cr->cr_data = cll;
1287 cr->cr_length = report_size;
1288 cr->cr_flags = CISS_REQ_DATAIN;
9cf9a798 1289
984263bc
MD
1290 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
1291 cc->header.address.physical.bus = 0;
1292 cc->header.address.physical.target = 0;
1293 cc->cdb.cdb_length = sizeof(*crc);
1294 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
1295 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
1296 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
1297 cc->cdb.timeout = 30; /* XXX better suggestions? */
1298
1299 crc = (struct ciss_report_cdb *)&(cc->cdb.cdb[0]);
1300 bzero(crc, sizeof(*crc));
9cf9a798 1301 crc->opcode = opcode;
984263bc
MD
1302 crc->length = htonl(report_size); /* big-endian field */
1303 cll->list_size = htonl(report_size - sizeof(*cll)); /* big-endian field */
9cf9a798 1304
984263bc
MD
1305 /*
1306 * Submit the request and wait for it to complete. (timeout
1307 * here should be much greater than above)
1308 */
1309 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
9cf9a798 1310 ciss_printf(sc, "error sending %d LUN command (%d)\n", opcode, error);
984263bc
MD
1311 goto out;
1312 }
1313
1314 /*
1315 * Check response. Note that data over/underrun is OK.
1316 */
1317 ciss_report_request(cr, &command_status, NULL);
1318 switch(command_status) {
1319 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1320 case CISS_CMD_STATUS_DATA_UNDERRUN: /* buffer too large, not bad */
1321 break;
1322 case CISS_CMD_STATUS_DATA_OVERRUN:
9cf9a798 1323 ciss_printf(sc, "WARNING: more units than driver limit (%d)\n",
984263bc
MD
1324 CISS_MAX_LOGICAL);
1325 break;
1326 default:
1327 ciss_printf(sc, "error detecting logical drive configuration (%s)\n",
1328 ciss_name_command_status(command_status));
1329 error = EIO;
1330 goto out;
1331 }
1332 ciss_release_request(cr);
1333 cr = NULL;
1334
9cf9a798
SW
1335out:
1336 if (cr != NULL)
1337 ciss_release_request(cr);
1338 if (error && cll != NULL) {
1339 kfree(cll, CISS_MALLOC_CLASS);
1340 cll = NULL;
1341 }
1342 return(cll);
1343}
1344
1345/************************************************************************
1346 * Find logical drives on the adapter.
1347 */
1348static int
1349ciss_init_logical(struct ciss_softc *sc)
1350{
1351 struct ciss_lun_report *cll;
1352 int error = 0, i, j;
1353 int ndrives;
1354
1355 debug_called(1);
1356
1357 cll = ciss_report_luns(sc, CISS_OPCODE_REPORT_LOGICAL_LUNS,
1358 CISS_MAX_LOGICAL);
1359 if (cll == NULL) {
1360 error = ENXIO;
1361 goto out;
1362 }
1363
984263bc
MD
1364 /* sanity-check reply */
1365 ndrives = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
a8416dcf 1366 if ((ndrives < 0) || (ndrives > CISS_MAX_LOGICAL)) {
984263bc
MD
1367 ciss_printf(sc, "adapter claims to report absurd number of logical drives (%d > %d)\n",
1368 ndrives, CISS_MAX_LOGICAL);
9cf9a798
SW
1369 error = ENXIO;
1370 goto out;
984263bc
MD
1371 }
1372
1373 /*
1374 * Save logical drive information.
1375 */
9cf9a798
SW
1376 if (bootverbose) {
1377 ciss_printf(sc, "%d logical drive%s\n",
1378 ndrives, (ndrives > 1 || ndrives == 0) ? "s" : "");
1379 }
1380
1381 sc->ciss_logical =
1382 kmalloc(sc->ciss_max_logical_bus * sizeof(struct ciss_ldrive *),
1383 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1384
1385 for (i = 0; i <= sc->ciss_max_logical_bus; i++) {
1386 sc->ciss_logical[i] =
1387 kmalloc(CISS_MAX_LOGICAL * sizeof(struct ciss_ldrive),
1388 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1389
1390 for (j = 0; j < CISS_MAX_LOGICAL; j++)
1391 sc->ciss_logical[i][j].cl_status = CISS_LD_NONEXISTENT;
1392 }
1393
1394
984263bc
MD
1395 for (i = 0; i < CISS_MAX_LOGICAL; i++) {
1396 if (i < ndrives) {
9cf9a798
SW
1397 struct ciss_ldrive *ld;
1398 int bus, target;
1399
1400 bus = CISS_LUN_TO_BUS(cll->lun[i].logical.lun);
1401 target = CISS_LUN_TO_TARGET(cll->lun[i].logical.lun);
1402 ld = &sc->ciss_logical[bus][target];
1403
1404 ld->cl_address = cll->lun[i];
1405 ld->cl_controller = &sc->ciss_controllers[bus];
1406 if (ciss_identify_logical(sc, ld) != 0)
984263bc
MD
1407 continue;
1408 /*
1409 * If the drive has had media exchanged, we should bring it online.
1410 */
9cf9a798
SW
1411 if (ld->cl_lstatus->media_exchanged)
1412 ciss_accept_media(sc, ld);
984263bc 1413
984263bc
MD
1414 }
1415 }
9cf9a798 1416
984263bc 1417 out:
9cf9a798
SW
1418 if (cll != NULL)
1419 kfree(cll, CISS_MALLOC_CLASS);
1420 return(error);
1421}
1422
1423static int
1424ciss_init_physical(struct ciss_softc *sc)
1425{
1426 struct ciss_lun_report *cll;
1427 int error = 0, i;
1428 int nphys;
1429 int bus, target;
1430
1431 debug_called(1);
1432
1433 bus = 0;
1434 target = 0;
1435
1436 cll = ciss_report_luns(sc, CISS_OPCODE_REPORT_PHYSICAL_LUNS,
1437 CISS_MAX_PHYSICAL);
1438 if (cll == NULL) {
1439 error = ENXIO;
1440 goto out;
1441 }
1442
1443 nphys = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1444
1445 if (bootverbose) {
1446 ciss_printf(sc, "%d physical device%s\n",
1447 nphys, (nphys > 1 || nphys == 0) ? "s" : "");
1448 }
1449
984263bc 1450 /*
9cf9a798
SW
1451 * Figure out the bus mapping.
1452 * Logical buses include both the local logical bus for local arrays and
1453 * proxy buses for remote arrays. Physical buses are numbered by the
1454 * controller and represent physical buses that hold physical devices.
1455 * We shift these bus numbers so that everything fits into a single flat
1456 * numbering space for CAM. Logical buses occupy the first 32 CAM bus
1457 * numbers, and the physical bus numbers are shifted to be above that.
1458 * This results in the various driver arrays being indexed as follows:
1459 *
1460 * ciss_controllers[] - indexed by logical bus
1461 * ciss_cam_sim[] - indexed by both logical and physical, with physical
1462 * being shifted by 32.
1463 * ciss_logical[][] - indexed by logical bus
1464 * ciss_physical[][] - indexed by physical bus
1465 *
1466 * XXX This is getting more and more hackish. CISS really doesn't play
1467 * well with a standard SCSI model; devices are addressed via magic
1468 * cookies, not via b/t/l addresses. Since there is no way to store
1469 * the cookie in the CAM device object, we have to keep these lookup
1470 * tables handy so that the devices can be found quickly at the cost
1471 * of wasting memory and having a convoluted lookup scheme. This
1472 * driver should probably be converted to block interface.
1473 */
1474 /*
1475 * If the L2 and L3 SCSI addresses are 0, this signifies a proxy
1476 * controller. A proxy controller is another physical controller
1477 * behind the primary PCI controller. We need to know about this
1478 * so that BMIC commands can be properly targeted. There can be
1479 * proxy controllers attached to a single PCI controller, so
1480 * find the highest numbered one so the array can be properly
1481 * sized.
1482 */
1483 sc->ciss_max_logical_bus = 1;
1484 for (i = 0; i < nphys; i++) {
1485 if (cll->lun[i].physical.extra_address == 0) {
1486 bus = cll->lun[i].physical.bus;
1487 sc->ciss_max_logical_bus = max(sc->ciss_max_logical_bus, bus) + 1;
1488 } else {
1489 bus = CISS_EXTRA_BUS2(cll->lun[i].physical.extra_address);
1490 sc->ciss_max_physical_bus = max(sc->ciss_max_physical_bus, bus);
1491 }
1492 }
1493
1494 sc->ciss_controllers =
1495 kmalloc(sc->ciss_max_logical_bus * sizeof (union ciss_device_address),
1496 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1497
1498 /* setup a map of controller addresses */
1499 for (i = 0; i < nphys; i++) {
1500 if (cll->lun[i].physical.extra_address == 0) {
1501 sc->ciss_controllers[cll->lun[i].physical.bus] = cll->lun[i];
1502 }
1503 }
1504
1505 sc->ciss_physical =
1506 kmalloc(sc->ciss_max_physical_bus * sizeof(struct ciss_pdrive *),
1507 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1508
1509 for (i = 0; i < sc->ciss_max_physical_bus; i++) {
1510 sc->ciss_physical[i] =
1511 kmalloc(sizeof(struct ciss_pdrive) * CISS_MAX_PHYSTGT,
1512 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
1513 }
1514
1515 ciss_filter_physical(sc, cll);
1516
1517out:
984263bc 1518 if (cll != NULL)
efda3bd0 1519 kfree(cll, CISS_MALLOC_CLASS);
9cf9a798 1520
984263bc
MD
1521 return(error);
1522}
1523
1524static int
9cf9a798
SW
1525ciss_filter_physical(struct ciss_softc *sc, struct ciss_lun_report *cll)
1526{
1527 u_int32_t ea;
1528 int i, nphys;
1529 int bus, target;
1530
1531 nphys = (ntohl(cll->list_size) / sizeof(union ciss_device_address));
1532 for (i = 0; i < nphys; i++) {
1533 if (cll->lun[i].physical.extra_address == 0)
1534 continue;
1535
1536 /*
1537 * Filter out devices that we don't want. Level 3 LUNs could
1538 * probably be supported, but the docs don't give enough of a
1539 * hint to know how.
1540 *
1541 * The mode field of the physical address is likely set to have
1542 * hard disks masked out. Honor it unless the user has overridden
1543 * us with the tunable. We also munge the inquiry data for these
1544 * disks so that they only show up as passthrough devices. Keeping
1545 * them visible in this fashion is useful for doing things like
1546 * flashing firmware.
1547 */
1548 ea = cll->lun[i].physical.extra_address;
1549 if ((CISS_EXTRA_BUS3(ea) != 0) || (CISS_EXTRA_TARGET3(ea) != 0) ||
1550 (CISS_EXTRA_MODE2(ea) == 0x3))
1551 continue;
1552 if ((ciss_expose_hidden_physical == 0) &&
1553 (cll->lun[i].physical.mode == CISS_HDR_ADDRESS_MODE_MASK_PERIPHERAL))
1554 continue;
1555
1556 /*
1557 * Note: CISS firmware numbers physical busses starting at '1', not
1558 * '0'. This numbering is internal to the firmware and is only
1559 * used as a hint here.
1560 */
1561 bus = CISS_EXTRA_BUS2(ea) - 1;
1562 target = CISS_EXTRA_TARGET2(ea);
1563 sc->ciss_physical[bus][target].cp_address = cll->lun[i];
1564 sc->ciss_physical[bus][target].cp_online = 1;
1565 }
1566
1567 return (0);
1568}
1569
1570static int
984263bc
MD
1571ciss_inquiry_logical(struct ciss_softc *sc, struct ciss_ldrive *ld)
1572{
1573 struct ciss_request *cr;
1574 struct ciss_command *cc;
1575 struct scsi_inquiry *inq;
1576 int error;
1577 int command_status;
984263bc
MD
1578
1579 cr = NULL;
984263bc
MD
1580
1581 bzero(&ld->cl_geometry, sizeof(ld->cl_geometry));
1582
1583 if ((error = ciss_get_request(sc, &cr)) != 0)
1584 goto out;
1585
a8416dcf 1586 cc = cr->cr_cc;
984263bc
MD
1587 cr->cr_data = &ld->cl_geometry;
1588 cr->cr_length = sizeof(ld->cl_geometry);
1589 cr->cr_flags = CISS_REQ_DATAIN;
1590
9cf9a798 1591 cc->header.address = ld->cl_address;
984263bc
MD
1592 cc->cdb.cdb_length = 6;
1593 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
1594 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
1595 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
1596 cc->cdb.timeout = 30;
1597
1598 inq = (struct scsi_inquiry *)&(cc->cdb.cdb[0]);
1599 inq->opcode = INQUIRY;
1600 inq->byte2 = SI_EVPD;
1601 inq->page_code = CISS_VPD_LOGICAL_DRIVE_GEOMETRY;
1602 inq->length = sizeof(ld->cl_geometry);
1603
1604 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1605 ciss_printf(sc, "error getting geometry (%d)\n", error);
1606 goto out;
1607 }
1608
1609 ciss_report_request(cr, &command_status, NULL);
1610 switch(command_status) {
1611 case CISS_CMD_STATUS_SUCCESS:
1612 case CISS_CMD_STATUS_DATA_UNDERRUN:
1613 break;
1614 case CISS_CMD_STATUS_DATA_OVERRUN:
1615 ciss_printf(sc, "WARNING: Data overrun\n");
1616 break;
1617 default:
1618 ciss_printf(sc, "Error detecting logical drive geometry (%s)\n",
1619 ciss_name_command_status(command_status));
1620 break;
1621 }
1622
1623out:
1624 if (cr != NULL)
1625 ciss_release_request(cr);
1626 return(error);
1627}
1628/************************************************************************
1629 * Identify a logical drive, initialise state related to it.
1630 */
1631static int
1632ciss_identify_logical(struct ciss_softc *sc, struct ciss_ldrive *ld)
1633{
1634 struct ciss_request *cr;
1635 struct ciss_command *cc;
1636 struct ciss_bmic_cdb *cbc;
1637 int error, command_status;
1638
1639 debug_called(1);
1640
1641 cr = NULL;
1642
1643 /*
1644 * Build a BMIC request to fetch the drive ID.
1645 */
1646 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_LDRIVE,
a8416dcf 1647 (void **)&ld->cl_ldrive,
984263bc
MD
1648 sizeof(*ld->cl_ldrive))) != 0)
1649 goto out;
a8416dcf 1650 cc = cr->cr_cc;
9cf9a798 1651 cc->header.address = *ld->cl_controller; /* target controller */
984263bc 1652 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
9cf9a798 1653 cbc->log_drive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
984263bc
MD
1654
1655 /*
1656 * Submit the request and wait for it to complete.
1657 */
1658 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1659 ciss_printf(sc, "error sending BMIC LDRIVE command (%d)\n", error);
1660 goto out;
1661 }
9cf9a798 1662
984263bc
MD
1663 /*
1664 * Check response.
1665 */
1666 ciss_report_request(cr, &command_status, NULL);
1667 switch(command_status) {
1668 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1669 break;
1670 case CISS_CMD_STATUS_DATA_UNDERRUN:
1671 case CISS_CMD_STATUS_DATA_OVERRUN:
1672 ciss_printf(sc, "data over/underrun reading logical drive ID\n");
1673 default:
1674 ciss_printf(sc, "error reading logical drive ID (%s)\n",
1675 ciss_name_command_status(command_status));
1676 error = EIO;
1677 goto out;
1678 }
1679 ciss_release_request(cr);
1680 cr = NULL;
1681
1682 /*
1683 * Build a CISS BMIC command to get the logical drive status.
1684 */
1685 if ((error = ciss_get_ldrive_status(sc, ld)) != 0)
1686 goto out;
1687
1688 /*
1689 * Get the logical drive geometry.
1690 */
1691 if ((error = ciss_inquiry_logical(sc, ld)) != 0)
1692 goto out;
1693
1694 /*
1695 * Print the drive's basic characteristics.
1696 */
9cf9a798
SW
1697 if (bootverbose) {
1698 ciss_printf(sc, "logical drive (b%dt%d): %s, %dMB ",
1699 CISS_LUN_TO_BUS(ld->cl_address.logical.lun),
1700 CISS_LUN_TO_TARGET(ld->cl_address.logical.lun),
1701 ciss_name_ldrive_org(ld->cl_ldrive->fault_tolerance),
984263bc
MD
1702 ((ld->cl_ldrive->blocks_available / (1024 * 1024)) *
1703 ld->cl_ldrive->block_size));
1704
1705 ciss_print_ldrive(sc, ld);
1706 }
1707out:
1708 if (error != 0) {
1709 /* make the drive not-exist */
1710 ld->cl_status = CISS_LD_NONEXISTENT;
1711 if (ld->cl_ldrive != NULL) {
efda3bd0 1712 kfree(ld->cl_ldrive, CISS_MALLOC_CLASS);
984263bc
MD
1713 ld->cl_ldrive = NULL;
1714 }
1715 if (ld->cl_lstatus != NULL) {
efda3bd0 1716 kfree(ld->cl_lstatus, CISS_MALLOC_CLASS);
984263bc
MD
1717 ld->cl_lstatus = NULL;
1718 }
1719 }
1720 if (cr != NULL)
1721 ciss_release_request(cr);
9cf9a798 1722
984263bc
MD
1723 return(error);
1724}
1725
1726/************************************************************************
1727 * Get status for a logical drive.
1728 *
1729 * XXX should we also do this in response to Test Unit Ready?
1730 */
1731static int
1732ciss_get_ldrive_status(struct ciss_softc *sc, struct ciss_ldrive *ld)
1733{
1734 struct ciss_request *cr;
1735 struct ciss_command *cc;
1736 struct ciss_bmic_cdb *cbc;
1737 int error, command_status;
1738
1739 /*
1740 * Build a CISS BMIC command to get the logical drive status.
1741 */
1742 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ID_LSTATUS,
a8416dcf 1743 (void **)&ld->cl_lstatus,
984263bc
MD
1744 sizeof(*ld->cl_lstatus))) != 0)
1745 goto out;
a8416dcf 1746 cc = cr->cr_cc;
9cf9a798 1747 cc->header.address = *ld->cl_controller; /* target controller */
984263bc 1748 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
9cf9a798 1749 cbc->log_drive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
984263bc
MD
1750
1751 /*
1752 * Submit the request and wait for it to complete.
1753 */
1754 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1755 ciss_printf(sc, "error sending BMIC LSTATUS command (%d)\n", error);
1756 goto out;
1757 }
9cf9a798 1758
984263bc
MD
1759 /*
1760 * Check response.
1761 */
1762 ciss_report_request(cr, &command_status, NULL);
1763 switch(command_status) {
1764 case CISS_CMD_STATUS_SUCCESS: /* buffer right size */
1765 break;
1766 case CISS_CMD_STATUS_DATA_UNDERRUN:
1767 case CISS_CMD_STATUS_DATA_OVERRUN:
1768 ciss_printf(sc, "data over/underrun reading logical drive status\n");
1769 default:
1770 ciss_printf(sc, "error reading logical drive status (%s)\n",
1771 ciss_name_command_status(command_status));
1772 error = EIO;
1773 goto out;
1774 }
1775
1776 /*
1777 * Set the drive's summary status based on the returned status.
1778 *
9cf9a798 1779 * XXX testing shows that a failed JBOD drive comes back at next
984263bc
MD
1780 * boot in "queued for expansion" mode. WTF?
1781 */
1782 ld->cl_status = ciss_decode_ldrive_status(ld->cl_lstatus->status);
1783
1784out:
1785 if (cr != NULL)
1786 ciss_release_request(cr);
1787 return(error);
1788}
1789
1790/************************************************************************
1791 * Notify the adapter of a config update.
1792 */
1793static int
1794ciss_update_config(struct ciss_softc *sc)
1795{
1796 int i;
1797
1798 debug_called(1);
1799
1800 CISS_TL_SIMPLE_WRITE(sc, CISS_TL_SIMPLE_IDBR, CISS_TL_SIMPLE_IDBR_CFG_TABLE);
1801 for (i = 0; i < 1000; i++) {
1802 if (!(CISS_TL_SIMPLE_READ(sc, CISS_TL_SIMPLE_IDBR) &
1803 CISS_TL_SIMPLE_IDBR_CFG_TABLE)) {
1804 return(0);
1805 }
1806 DELAY(1000);
1807 }
1808 return(1);
1809}
1810
1811/************************************************************************
1812 * Accept new media into a logical drive.
1813 *
1814 * XXX The drive has previously been offline; it would be good if we
1815 * could make sure it's not open right now.
1816 */
1817static int
9cf9a798 1818ciss_accept_media(struct ciss_softc *sc, struct ciss_ldrive *ld)
984263bc
MD
1819{
1820 struct ciss_request *cr;
1821 struct ciss_command *cc;
1822 struct ciss_bmic_cdb *cbc;
9cf9a798
SW
1823 int command_status;
1824 int error = 0, ldrive;
984263bc 1825
9cf9a798
SW
1826 ldrive = CISS_LUN_TO_TARGET(ld->cl_address.logical.lun);
1827
a8416dcf 1828 debug(0, "bringing logical drive %d back online");
984263bc
MD
1829
1830 /*
1831 * Build a CISS BMIC command to bring the drive back online.
1832 */
1833 if ((error = ciss_get_bmic_request(sc, &cr, CISS_BMIC_ACCEPT_MEDIA,
1834 NULL, 0)) != 0)
1835 goto out;
a8416dcf 1836 cc = cr->cr_cc;
9cf9a798 1837 cc->header.address = *ld->cl_controller; /* target controller */
984263bc
MD
1838 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
1839 cbc->log_drive = ldrive;
1840
1841 /*
9cf9a798 1842 * Submit the request and wait for it to complete.
984263bc 1843 */
9cf9a798
SW
1844 if ((error = ciss_synch_request(cr, 60 * 1000)) != 0) {
1845 ciss_printf(sc, "error sending BMIC ACCEPT MEDIA command (%d)\n", error);
1846 goto out;
984263bc
MD
1847 }
1848
1849 /*
984263bc
MD
1850 * Check response.
1851 */
1852 ciss_report_request(cr, &command_status, NULL);
1853 switch(command_status) {
1854 case CISS_CMD_STATUS_SUCCESS: /* all OK */
1855 /* we should get a logical drive status changed event here */
1856 break;
1857 default:
1858 ciss_printf(cr->cr_sc, "error accepting media into failed logical drive (%s)\n",
1859 ciss_name_command_status(command_status));
1860 break;
1861 }
9cf9a798
SW
1862
1863out:
1864 if (cr != NULL)
1865 ciss_release_request(cr);
1866 return(error);
984263bc
MD
1867}
1868
1869/************************************************************************
1870 * Release adapter resources.
1871 */
1872static void
1873ciss_free(struct ciss_softc *sc)
1874{
9cf9a798 1875 struct ciss_request *cr;
a8416dcf 1876 int i, j;
9cf9a798 1877
984263bc
MD
1878 debug_called(1);
1879
1880 /* we're going away */
1881 sc->ciss_flags |= CISS_FLAG_ABORTING;
1882
1883 /* terminate the periodic heartbeat routine */
3fb01875 1884 callout_stop(&sc->ciss_periodic);
984263bc
MD
1885
1886 /* cancel the Event Notify chain */
1887 ciss_notify_abort(sc);
9cf9a798
SW
1888
1889 ciss_kill_notify_thread(sc);
1890
a8416dcf
SW
1891 /* disconnect from CAM */
1892 if (sc->ciss_cam_sim) {
1893 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
1894 if (sc->ciss_cam_sim[i]) {
1895 xpt_bus_deregister(cam_sim_path(sc->ciss_cam_sim[i]));
1896 cam_sim_free(sc->ciss_cam_sim[i]);
1897 }
1898 }
1899 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
1900 CISS_PHYSICAL_BASE; i++) {
1901 if (sc->ciss_cam_sim[i]) {
1902 xpt_bus_deregister(cam_sim_path(sc->ciss_cam_sim[i]));
1903 cam_sim_free(sc->ciss_cam_sim[i]);
1904 }
1905 }
1906 kfree(sc->ciss_cam_sim, CISS_MALLOC_CLASS);
1907 }
1908 if (sc->ciss_cam_devq)
1909 cam_simq_release(sc->ciss_cam_devq);
1910
9cf9a798 1911 /* remove the control device */
a8416dcf 1912 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798
SW
1913 if (sc->ciss_dev_t != NULL)
1914 destroy_dev(sc->ciss_dev_t);
1915
a8416dcf
SW
1916 /* Final cleanup of the callout. */
1917#if 0 /* XXX swildner callout_drain */
1918 callout_drain(&sc->ciss_periodic);
1919#else
1920 callout_stop(&sc->ciss_periodic);
1921#endif
1922 lockuninit(&sc->ciss_lock);
1923
984263bc
MD
1924 /* free the controller data */
1925 if (sc->ciss_id != NULL)
efda3bd0 1926 kfree(sc->ciss_id, CISS_MALLOC_CLASS);
984263bc
MD
1927
1928 /* release I/O resources */
1929 if (sc->ciss_regs_resource != NULL)
1930 bus_release_resource(sc->ciss_dev, SYS_RES_MEMORY,
1931 sc->ciss_regs_rid, sc->ciss_regs_resource);
1932 if (sc->ciss_cfg_resource != NULL)
1933 bus_release_resource(sc->ciss_dev, SYS_RES_MEMORY,
1934 sc->ciss_cfg_rid, sc->ciss_cfg_resource);
1935 if (sc->ciss_intr != NULL)
1936 bus_teardown_intr(sc->ciss_dev, sc->ciss_irq_resource, sc->ciss_intr);
1937 if (sc->ciss_irq_resource != NULL)
1938 bus_release_resource(sc->ciss_dev, SYS_RES_IRQ,
a8416dcf
SW
1939 sc->ciss_irq_rid[0], sc->ciss_irq_resource);
1940 if (sc->ciss_irq_type == PCI_INTR_TYPE_MSI)
1941 pci_release_msi(sc->ciss_dev);
9cf9a798
SW
1942
1943 while ((cr = ciss_dequeue_free(sc)) != NULL)
1944 bus_dmamap_destroy(sc->ciss_buffer_dmat, cr->cr_datamap);
984263bc
MD
1945 if (sc->ciss_buffer_dmat)
1946 bus_dma_tag_destroy(sc->ciss_buffer_dmat);
1947
1948 /* destroy command memory and DMA tag */
1949 if (sc->ciss_command != NULL) {
1950 bus_dmamap_unload(sc->ciss_command_dmat, sc->ciss_command_map);
1951 bus_dmamem_free(sc->ciss_command_dmat, sc->ciss_command, sc->ciss_command_map);
1952 }
9cf9a798 1953 if (sc->ciss_command_dmat)
984263bc
MD
1954 bus_dma_tag_destroy(sc->ciss_command_dmat);
1955
a8416dcf
SW
1956 if (sc->ciss_reply) {
1957 bus_dmamap_unload(sc->ciss_reply_dmat, sc->ciss_reply_map);
1958 bus_dmamem_free(sc->ciss_reply_dmat, sc->ciss_reply, sc->ciss_reply_map);
984263bc 1959 }
a8416dcf
SW
1960 if (sc->ciss_reply_dmat)
1961 bus_dma_tag_destroy(sc->ciss_reply_dmat);
9cf9a798 1962
a8416dcf
SW
1963 /* destroy DMA tags */
1964 if (sc->ciss_parent_dmat)
1965 bus_dma_tag_destroy(sc->ciss_parent_dmat);
9cf9a798 1966 if (sc->ciss_logical) {
a8416dcf
SW
1967 for (i = 0; i <= sc->ciss_max_logical_bus; i++) {
1968 for (j = 0; j < CISS_MAX_LOGICAL; j++) {
1969 if (sc->ciss_logical[i][j].cl_ldrive)
1970 kfree(sc->ciss_logical[i][j].cl_ldrive, CISS_MALLOC_CLASS);
1971 if (sc->ciss_logical[i][j].cl_lstatus)
1972 kfree(sc->ciss_logical[i][j].cl_lstatus, CISS_MALLOC_CLASS);
1973 }
9cf9a798 1974 kfree(sc->ciss_logical[i], CISS_MALLOC_CLASS);
a8416dcf 1975 }
9cf9a798
SW
1976 kfree(sc->ciss_logical, CISS_MALLOC_CLASS);
1977 }
1978
1979 if (sc->ciss_physical) {
1980 for (i = 0; i < sc->ciss_max_physical_bus; i++)
1981 kfree(sc->ciss_physical[i], CISS_MALLOC_CLASS);
1982 kfree(sc->ciss_physical, CISS_MALLOC_CLASS);
1983 }
1984
1985 if (sc->ciss_controllers)
1986 kfree(sc->ciss_controllers, CISS_MALLOC_CLASS);
a8416dcf
SW
1987
1988 sysctl_ctx_free(&sc->ciss_sysctl_ctx);
984263bc
MD
1989}
1990
1991/************************************************************************
1992 * Give a command to the adapter.
1993 *
1994 * Note that this uses the simple transport layer directly. If we
1995 * want to add support for other layers, we'll need a switch of some
1996 * sort.
1997 *
1998 * Note that the simple transport layer has no way of refusing a
1999 * command; we only have as many request structures as the adapter
2000 * supports commands, so we don't have to check (this presumes that
2001 * the adapter can handle commands as fast as we throw them at it).
2002 */
2003static int
2004ciss_start(struct ciss_request *cr)
2005{
2006 struct ciss_command *cc; /* XXX debugging only */
2007 int error;
2008
a8416dcf 2009 cc = cr->cr_cc;
984263bc
MD
2010 debug(2, "post command %d tag %d ", cr->cr_tag, cc->header.host_tag);
2011
2012 /*
2013 * Map the request's data.
2014 */
2015 if ((error = ciss_map_request(cr)))
2016 return(error);
2017
2018#if 0
2019 ciss_print_request(cr);
2020#endif
2021
984263bc
MD
2022 return(0);
2023}
2024
2025/************************************************************************
2026 * Fetch completed request(s) from the adapter, queue them for
2027 * completion handling.
2028 *
2029 * Note that this uses the simple transport layer directly. If we
2030 * want to add support for other layers, we'll need a switch of some
2031 * sort.
2032 *
2033 * Note that the simple transport mechanism does not require any
2034 * reentrancy protection; the OPQ read is atomic. If there is a
2035 * chance of a race with something else that might move the request
2036 * off the busy list, then we will have to lock against that
2037 * (eg. timeouts, etc.)
2038 */
2039static void
a8416dcf 2040ciss_done(struct ciss_softc *sc, cr_qhead_t *qh)
984263bc
MD
2041{
2042 struct ciss_request *cr;
2043 struct ciss_command *cc;
2044 u_int32_t tag, index;
9cf9a798 2045
984263bc
MD
2046 debug_called(3);
2047
2048 /*
2049 * Loop quickly taking requests from the adapter and moving them
a8416dcf 2050 * to the completed queue.
984263bc 2051 */
984263bc
MD
2052 for (;;) {
2053
984263bc
MD
2054 tag = CISS_TL_SIMPLE_FETCH_CMD(sc);
2055 if (tag == CISS_TL_SIMPLE_OPQ_EMPTY)
2056 break;
2057 index = tag >> 2;
9cf9a798 2058 debug(2, "completed command %d%s", index,
984263bc
MD
2059 (tag & CISS_HDR_HOST_TAG_ERROR) ? " with error" : "");
2060 if (index >= sc->ciss_max_requests) {
2061 ciss_printf(sc, "completed invalid request %d (0x%x)\n", index, tag);
2062 continue;
2063 }
2064 cr = &(sc->ciss_request[index]);
a8416dcf 2065 cc = cr->cr_cc;
984263bc 2066 cc->header.host_tag = tag; /* not updated by adapter */
a8416dcf 2067 ciss_enqueue_complete(cr, qh);
984263bc 2068 }
9cf9a798 2069
a8416dcf
SW
2070}
2071
2072static void
2073ciss_perf_done(struct ciss_softc *sc, cr_qhead_t *qh)
2074{
2075 struct ciss_request *cr;
2076 struct ciss_command *cc;
2077 u_int32_t tag, index;
2078
2079 debug_called(3);
2080
984263bc 2081 /*
a8416dcf
SW
2082 * Loop quickly taking requests from the adapter and moving them
2083 * to the completed queue.
984263bc 2084 */
a8416dcf
SW
2085 for (;;) {
2086 tag = sc->ciss_reply[sc->ciss_rqidx];
2087 if ((tag & CISS_CYCLE_MASK) != sc->ciss_cycle)
2088 break;
2089 index = tag >> 2;
2090 debug(2, "completed command %d%s\n", index,
2091 (tag & CISS_HDR_HOST_TAG_ERROR) ? " with error" : "");
2092 if (index < sc->ciss_max_requests) {
2093 cr = &(sc->ciss_request[index]);
2094 cc = cr->cr_cc;
2095 cc->header.host_tag = tag; /* not updated by adapter */
2096 ciss_enqueue_complete(cr, qh);
2097 } else {
2098 ciss_printf(sc, "completed invalid request %d (0x%x)\n", index, tag);
2099 }
2100 if (++sc->ciss_rqidx == sc->ciss_max_requests) {
2101 sc->ciss_rqidx = 0;
2102 sc->ciss_cycle ^= 1;
2103 }
2104 }
2105
984263bc
MD
2106}
2107
2108/************************************************************************
2109 * Take an interrupt from the adapter.
2110 */
2111static void
2112ciss_intr(void *arg)
2113{
a8416dcf 2114 cr_qhead_t qh;
984263bc
MD
2115 struct ciss_softc *sc = (struct ciss_softc *)arg;
2116
2117 /*
2118 * The only interrupt we recognise indicates that there are
2119 * entries in the outbound post queue.
2120 */
a8416dcf
SW
2121 STAILQ_INIT(&qh);
2122 ciss_done(sc, &qh);
2123 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
2124 ciss_complete(sc, &qh);
2125 lockmgr(&sc->ciss_lock, LK_RELEASE);
2126}
2127
2128static void
2129ciss_perf_intr(void *arg)
2130{
2131 struct ciss_softc *sc = (struct ciss_softc *)arg;
2132
2133 /* Clear the interrupt and flush the bridges. Docs say that the flush
2134 * needs to be done twice, which doesn't seem right.
2135 */
2136 CISS_TL_PERF_CLEAR_INT(sc);
2137 CISS_TL_PERF_FLUSH_INT(sc);
2138
2139 ciss_perf_msi_intr(sc);
984263bc
MD
2140}
2141
a8416dcf
SW
2142static void
2143ciss_perf_msi_intr(void *arg)
2144{
2145 cr_qhead_t qh;
2146 struct ciss_softc *sc = (struct ciss_softc *)arg;
2147
2148 STAILQ_INIT(&qh);
2149 ciss_perf_done(sc, &qh);
2150 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
2151 ciss_complete(sc, &qh);
2152 lockmgr(&sc->ciss_lock, LK_RELEASE);
2153}
2154
2155
984263bc
MD
2156/************************************************************************
2157 * Process completed requests.
2158 *
2159 * Requests can be completed in three fashions:
2160 *
2161 * - by invoking a callback function (cr_complete is non-null)
2162 * - by waking up a sleeper (cr_flags has CISS_REQ_SLEEP set)
2163 * - by clearing the CISS_REQ_POLL flag in interrupt/timeout context
2164 */
2165static void
a8416dcf 2166ciss_complete(struct ciss_softc *sc, cr_qhead_t *qh)
984263bc
MD
2167{
2168 struct ciss_request *cr;
2169
2170 debug_called(2);
2171
2172 /*
2173 * Loop taking requests off the completed queue and performing
2174 * completion processing on them.
2175 */
2176 for (;;) {
a8416dcf 2177 if ((cr = ciss_dequeue_complete(sc, qh)) == NULL)
984263bc
MD
2178 break;
2179 ciss_unmap_request(cr);
9cf9a798 2180
a8416dcf
SW
2181 if ((cr->cr_flags & CISS_REQ_BUSY) == 0)
2182 ciss_printf(sc, "WARNING: completing non-busy request\n");
2183 cr->cr_flags &= ~CISS_REQ_BUSY;
2184
984263bc
MD
2185 /*
2186 * If the request has a callback, invoke it.
2187 */
2188 if (cr->cr_complete != NULL) {
2189 cr->cr_complete(cr);
2190 continue;
2191 }
9cf9a798 2192
984263bc
MD
2193 /*
2194 * If someone is sleeping on this request, wake them up.
2195 */
2196 if (cr->cr_flags & CISS_REQ_SLEEP) {
2197 cr->cr_flags &= ~CISS_REQ_SLEEP;
2198 wakeup(cr);
2199 continue;
2200 }
2201
2202 /*
2203 * If someone is polling this request for completion, signal.
2204 */
2205 if (cr->cr_flags & CISS_REQ_POLL) {
2206 cr->cr_flags &= ~CISS_REQ_POLL;
2207 continue;
2208 }
9cf9a798 2209
984263bc
MD
2210 /*
2211 * Give up and throw the request back on the free queue. This
2212 * should never happen; resources will probably be lost.
2213 */
2214 ciss_printf(sc, "WARNING: completed command with no submitter\n");
2215 ciss_enqueue_free(cr);
2216 }
2217}
2218
2219/************************************************************************
2220 * Report on the completion status of a request, and pass back SCSI
2221 * and command status values.
2222 */
2223static int
a8416dcf 2224_ciss_report_request(struct ciss_request *cr, int *command_status, int *scsi_status, const char *func)
984263bc
MD
2225{
2226 struct ciss_command *cc;
2227 struct ciss_error_info *ce;
2228
2229 debug_called(2);
2230
a8416dcf 2231 cc = cr->cr_cc;
984263bc
MD
2232 ce = (struct ciss_error_info *)&(cc->sg[0]);
2233
2234 /*
2235 * We don't consider data under/overrun an error for the Report
2236 * Logical/Physical LUNs commands.
2237 */
2238 if ((cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) &&
9cf9a798
SW
2239 ((ce->command_status == CISS_CMD_STATUS_DATA_OVERRUN) ||
2240 (ce->command_status == CISS_CMD_STATUS_DATA_UNDERRUN)) &&
984263bc 2241 ((cc->cdb.cdb[0] == CISS_OPCODE_REPORT_LOGICAL_LUNS) ||
9cf9a798
SW
2242 (cc->cdb.cdb[0] == CISS_OPCODE_REPORT_PHYSICAL_LUNS) ||
2243 (cc->cdb.cdb[0] == INQUIRY))) {
984263bc
MD
2244 cc->header.host_tag &= ~CISS_HDR_HOST_TAG_ERROR;
2245 debug(2, "ignoring irrelevant under/overrun error");
2246 }
9cf9a798 2247
984263bc
MD
2248 /*
2249 * Check the command's error bit, if clear, there's no status and
2250 * everything is OK.
2251 */
2252 if (!(cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR)) {
2253 if (scsi_status != NULL)
2254 *scsi_status = SCSI_STATUS_OK;
2255 if (command_status != NULL)
2256 *command_status = CISS_CMD_STATUS_SUCCESS;
2257 return(0);
2258 } else {
2259 if (command_status != NULL)
2260 *command_status = ce->command_status;
2261 if (scsi_status != NULL) {
2262 if (ce->command_status == CISS_CMD_STATUS_TARGET_STATUS) {
2263 *scsi_status = ce->scsi_status;
2264 } else {
2265 *scsi_status = -1;
2266 }
2267 }
2268 if (bootverbose)
2269 ciss_printf(cr->cr_sc, "command status 0x%x (%s) scsi status 0x%x\n",
2270 ce->command_status, ciss_name_command_status(ce->command_status),
2271 ce->scsi_status);
2272 if (ce->command_status == CISS_CMD_STATUS_INVALID_COMMAND) {
a8416dcf 2273 ciss_printf(cr->cr_sc, "invalid command, offense size %d at %d, value 0x%x, function %s\n",
984263bc
MD
2274 ce->additional_error_info.invalid_command.offense_size,
2275 ce->additional_error_info.invalid_command.offense_offset,
a8416dcf
SW
2276 ce->additional_error_info.invalid_command.offense_value,
2277 func);
984263bc
MD
2278 }
2279 }
9cf9a798
SW
2280#if 0
2281 ciss_print_request(cr);
2282#endif
984263bc
MD
2283 return(1);
2284}
2285
2286/************************************************************************
2287 * Issue a request and don't return until it's completed.
2288 *
2289 * Depending on adapter status, we may poll or sleep waiting for
2290 * completion.
2291 */
2292static int
2293ciss_synch_request(struct ciss_request *cr, int timeout)
2294{
2295 if (cr->cr_sc->ciss_flags & CISS_FLAG_RUNNING) {
2296 return(ciss_wait_request(cr, timeout));
2297 } else {
2298 return(ciss_poll_request(cr, timeout));
2299 }
2300}
2301
2302/************************************************************************
2303 * Issue a request and poll for completion.
2304 *
2305 * Timeout in milliseconds.
2306 */
2307static int
2308ciss_poll_request(struct ciss_request *cr, int timeout)
2309{
a8416dcf
SW
2310 cr_qhead_t qh;
2311 struct ciss_softc *sc;
984263bc 2312 int error;
9cf9a798 2313
984263bc
MD
2314 debug_called(2);
2315
a8416dcf
SW
2316 STAILQ_INIT(&qh);
2317 sc = cr->cr_sc;
984263bc
MD
2318 cr->cr_flags |= CISS_REQ_POLL;
2319 if ((error = ciss_start(cr)) != 0)
2320 return(error);
2321
2322 do {
a8416dcf
SW
2323 if (sc->ciss_perf)
2324 ciss_perf_done(sc, &qh);
2325 else
2326 ciss_done(sc, &qh);
2327 ciss_complete(sc, &qh);
984263bc
MD
2328 if (!(cr->cr_flags & CISS_REQ_POLL))
2329 return(0);
2330 DELAY(1000);
2331 } while (timeout-- >= 0);
2332 return(EWOULDBLOCK);
2333}
2334
2335/************************************************************************
2336 * Issue a request and sleep waiting for completion.
2337 *
2338 * Timeout in milliseconds. Note that a spurious wakeup will reset
2339 * the timeout.
2340 */
2341static int
2342ciss_wait_request(struct ciss_request *cr, int timeout)
2343{
7f2216bc 2344 int error;
984263bc
MD
2345
2346 debug_called(2);
2347
2348 cr->cr_flags |= CISS_REQ_SLEEP;
2349 if ((error = ciss_start(cr)) != 0)
2350 return(error);
2351
9cf9a798 2352 while ((cr->cr_flags & CISS_REQ_SLEEP) && (error != EWOULDBLOCK)) {
a8416dcf 2353 error = lksleep(cr, &cr->cr_sc->ciss_lock, 0, "cissREQ", (timeout * hz) / 1000);
984263bc 2354 }
984263bc
MD
2355 return(error);
2356}
2357
2358#if 0
2359/************************************************************************
2360 * Abort a request. Note that a potential exists here to race the
2361 * request being completed; the caller must deal with this.
2362 */
2363static int
2364ciss_abort_request(struct ciss_request *ar)
2365{
2366 struct ciss_request *cr;
2367 struct ciss_command *cc;
2368 struct ciss_message_cdb *cmc;
2369 int error;
2370
2371 debug_called(1);
2372
2373 /* get a request */
2374 if ((error = ciss_get_request(ar->cr_sc, &cr)) != 0)
2375 return(error);
2376
9cf9a798 2377 /* build the abort command */
a8416dcf 2378 cc = cr->cr_cc;
984263bc
MD
2379 cc->header.address.mode.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL; /* addressing? */
2380 cc->header.address.physical.target = 0;
2381 cc->header.address.physical.bus = 0;
2382 cc->cdb.cdb_length = sizeof(*cmc);
2383 cc->cdb.type = CISS_CDB_TYPE_MESSAGE;
2384 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
2385 cc->cdb.direction = CISS_CDB_DIRECTION_NONE;
2386 cc->cdb.timeout = 30;
2387
2388 cmc = (struct ciss_message_cdb *)&(cc->cdb.cdb[0]);
2389 cmc->opcode = CISS_OPCODE_MESSAGE_ABORT;
2390 cmc->type = CISS_MESSAGE_ABORT_TASK;
2391 cmc->abort_tag = ar->cr_tag; /* endianness?? */
2392
2393 /*
2394 * Send the request and wait for a response. If we believe we
2395 * aborted the request OK, clear the flag that indicates it's
2396 * running.
2397 */
2398 error = ciss_synch_request(cr, 35 * 1000);
2399 if (!error)
2400 error = ciss_report_request(cr, NULL, NULL);
2401 ciss_release_request(cr);
2402
2403 return(error);
2404}
2405#endif
2406
2407
2408/************************************************************************
2409 * Fetch and initialise a request
2410 */
2411static int
2412ciss_get_request(struct ciss_softc *sc, struct ciss_request **crp)
2413{
2414 struct ciss_request *cr;
2415
2416 debug_called(2);
2417
2418 /*
2419 * Get a request and clean it up.
2420 */
2421 if ((cr = ciss_dequeue_free(sc)) == NULL)
2422 return(ENOMEM);
2423
2424 cr->cr_data = NULL;
2425 cr->cr_flags = 0;
2426 cr->cr_complete = NULL;
9cf9a798 2427 cr->cr_private = NULL;
a8416dcf 2428 cr->cr_sg_tag = CISS_SG_MAX; /* Backstop to prevent accidents */
9cf9a798 2429
984263bc
MD
2430 ciss_preen_command(cr);
2431 *crp = cr;
2432 return(0);
2433}
2434
2435static void
2436ciss_preen_command(struct ciss_request *cr)
2437{
2438 struct ciss_command *cc;
2439 u_int32_t cmdphys;
2440
2441 /*
2442 * Clean up the command structure.
2443 *
2444 * Note that we set up the error_info structure here, since the
2445 * length can be overwritten by any command.
2446 */
a8416dcf 2447 cc = cr->cr_cc;
984263bc
MD
2448 cc->header.sg_in_list = 0; /* kinda inefficient this way */
2449 cc->header.sg_total = 0;
2450 cc->header.host_tag = cr->cr_tag << 2;
2451 cc->header.host_tag_zeroes = 0;
a8416dcf 2452 cmdphys = cr->cr_ccphys;
984263bc
MD
2453 cc->error_info.error_info_address = cmdphys + sizeof(struct ciss_command);
2454 cc->error_info.error_info_length = CISS_COMMAND_ALLOC_SIZE - sizeof(struct ciss_command);
984263bc
MD
2455}
2456
2457/************************************************************************
2458 * Release a request to the free list.
2459 */
2460static void
2461ciss_release_request(struct ciss_request *cr)
2462{
2463 struct ciss_softc *sc;
2464
2465 debug_called(2);
2466
2467 sc = cr->cr_sc;
9cf9a798 2468
984263bc
MD
2469 /* release the request to the free queue */
2470 ciss_requeue_free(cr);
2471}
2472
2473/************************************************************************
2474 * Allocate a request that will be used to send a BMIC command. Do some
2475 * of the common setup here to avoid duplicating it everywhere else.
2476 */
2477static int
2478ciss_get_bmic_request(struct ciss_softc *sc, struct ciss_request **crp,
2479 int opcode, void **bufp, size_t bufsize)
2480{
2481 struct ciss_request *cr;
2482 struct ciss_command *cc;
2483 struct ciss_bmic_cdb *cbc;
2484 void *buf;
2485 int error;
2486 int dataout;
2487
2488 debug_called(2);
2489
2490 cr = NULL;
9cf9a798 2491 buf = NULL;
984263bc
MD
2492
2493 /*
2494 * Get a request.
2495 */
2496 if ((error = ciss_get_request(sc, &cr)) != 0)
2497 goto out;
2498
2499 /*
2500 * Allocate data storage if requested, determine the data direction.
2501 */
2502 dataout = 0;
2503 if ((bufsize > 0) && (bufp != NULL)) {
2504 if (*bufp == NULL) {
efda3bd0 2505 buf = kmalloc(bufsize, CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
984263bc
MD
2506 } else {
2507 buf = *bufp;
2508 dataout = 1; /* we are given a buffer, so we are writing */
2509 }
2510 }
2511
2512 /*
2513 * Build a CISS BMIC command to get the logical drive ID.
2514 */
2515 cr->cr_data = buf;
2516 cr->cr_length = bufsize;
2517 if (!dataout)
2518 cr->cr_flags = CISS_REQ_DATAIN;
9cf9a798 2519
a8416dcf 2520 cc = cr->cr_cc;
984263bc
MD
2521 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
2522 cc->header.address.physical.bus = 0;
2523 cc->header.address.physical.target = 0;
2524 cc->cdb.cdb_length = sizeof(*cbc);
2525 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
2526 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
2527 cc->cdb.direction = dataout ? CISS_CDB_DIRECTION_WRITE : CISS_CDB_DIRECTION_READ;
2528 cc->cdb.timeout = 0;
2529
2530 cbc = (struct ciss_bmic_cdb *)&(cc->cdb.cdb[0]);
2531 bzero(cbc, sizeof(*cbc));
2532 cbc->opcode = dataout ? CISS_ARRAY_CONTROLLER_WRITE : CISS_ARRAY_CONTROLLER_READ;
2533 cbc->bmic_opcode = opcode;
2534 cbc->size = htons((u_int16_t)bufsize);
2535
2536out:
2537 if (error) {
2538 if (cr != NULL)
2539 ciss_release_request(cr);
984263bc
MD
2540 } else {
2541 *crp = cr;
2542 if ((bufp != NULL) && (*bufp == NULL) && (buf != NULL))
2543 *bufp = buf;
2544 }
2545 return(error);
2546}
2547
2548/************************************************************************
2549 * Handle a command passed in from userspace.
2550 */
2551static int
2552ciss_user_command(struct ciss_softc *sc, IOCTL_Command_struct *ioc)
2553{
2554 struct ciss_request *cr;
2555 struct ciss_command *cc;
2556 struct ciss_error_info *ce;
9cf9a798 2557 int error = 0;
984263bc
MD
2558
2559 debug_called(1);
2560
2561 cr = NULL;
2562
2563 /*
2564 * Get a request.
2565 */
a8416dcf
SW
2566 while (ciss_get_request(sc, &cr) != 0)
2567 lksleep(sc, &sc->ciss_lock, 0, "cissREQ", hz);
2568 cc = cr->cr_cc;
984263bc
MD
2569
2570 /*
2571 * Allocate an in-kernel databuffer if required, copy in user data.
2572 */
a8416dcf 2573 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2574 cr->cr_length = ioc->buf_size;
2575 if (ioc->buf_size > 0) {
978400d3 2576 cr->cr_data = kmalloc(ioc->buf_size, CISS_MALLOC_CLASS, M_WAITOK);
984263bc
MD
2577 if ((error = copyin(ioc->buf, cr->cr_data, ioc->buf_size))) {
2578 debug(0, "copyin: bad data buffer %p/%d", ioc->buf, ioc->buf_size);
a8416dcf 2579 goto out_unlocked;
984263bc
MD
2580 }
2581 }
2582
2583 /*
2584 * Build the request based on the user command.
2585 */
2586 bcopy(&ioc->LUN_info, &cc->header.address, sizeof(cc->header.address));
2587 bcopy(&ioc->Request, &cc->cdb, sizeof(cc->cdb));
2588
2589 /* XXX anything else to populate here? */
a8416dcf 2590 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc
MD
2591
2592 /*
2593 * Run the command.
2594 */
2595 if ((error = ciss_synch_request(cr, 60 * 1000))) {
2596 debug(0, "request failed - %d", error);
2597 goto out;
2598 }
2599
2600 /*
9cf9a798 2601 * Check to see if the command succeeded.
984263bc
MD
2602 */
2603 ce = (struct ciss_error_info *)&(cc->sg[0]);
9cf9a798
SW
2604 if ((cc->header.host_tag & CISS_HDR_HOST_TAG_ERROR) == 0)
2605 bzero(ce, sizeof(*ce));
2606
2607 /*
2608 * Copy the results back to the user.
2609 */
984263bc 2610 bcopy(ce, &ioc->error_info, sizeof(*ce));
a8416dcf 2611 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2612 if ((ioc->buf_size > 0) &&
2613 (error = copyout(cr->cr_data, ioc->buf, ioc->buf_size))) {
2614 debug(0, "copyout: bad data buffer %p/%d", ioc->buf, ioc->buf_size);
a8416dcf 2615 goto out_unlocked;
984263bc
MD
2616 }
2617
2618 /* done OK */
2619 error = 0;
2620
a8416dcf
SW
2621out_unlocked:
2622 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
2623
984263bc
MD
2624out:
2625 if ((cr != NULL) && (cr->cr_data != NULL))
efda3bd0 2626 kfree(cr->cr_data, CISS_MALLOC_CLASS);
984263bc
MD
2627 if (cr != NULL)
2628 ciss_release_request(cr);
2629 return(error);
2630}
2631
2632/************************************************************************
2633 * Map a request into bus-visible space, initialise the scatter/gather
2634 * list.
2635 */
2636static int
2637ciss_map_request(struct ciss_request *cr)
2638{
2639 struct ciss_softc *sc;
9cf9a798 2640 int error = 0;
984263bc
MD
2641
2642 debug_called(2);
9cf9a798 2643
984263bc
MD
2644 sc = cr->cr_sc;
2645
2646 /* check that mapping is necessary */
9cf9a798 2647 if (cr->cr_flags & CISS_REQ_MAPPED)
984263bc 2648 return(0);
984263bc
MD
2649
2650 cr->cr_flags |= CISS_REQ_MAPPED;
9cf9a798
SW
2651
2652 bus_dmamap_sync(sc->ciss_command_dmat, sc->ciss_command_map,
2653 BUS_DMASYNC_PREWRITE);
2654
2655 if (cr->cr_data != NULL) {
2656 error = bus_dmamap_load(sc->ciss_buffer_dmat, cr->cr_datamap,
2657 cr->cr_data, cr->cr_length,
2658 ciss_request_map_helper, cr, 0);
2659 if (error != 0)
2660 return (error);
2661 } else {
2662 /*
2663 * Post the command to the adapter.
2664 */
a8416dcf
SW
2665 cr->cr_sg_tag = CISS_SG_NONE;
2666 cr->cr_flags |= CISS_REQ_BUSY;
2667 if (sc->ciss_perf)
2668 CISS_TL_PERF_POST_CMD(sc, cr);
2669 else
2670 CISS_TL_SIMPLE_POST_CMD(sc, cr->cr_ccphys);
9cf9a798
SW
2671 }
2672
984263bc
MD
2673 return(0);
2674}
2675
2676static void
2677ciss_request_map_helper(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2678{
2679 struct ciss_command *cc;
9cf9a798 2680 struct ciss_request *cr;
a8416dcf 2681 struct ciss_softc *sc;
984263bc
MD
2682 int i;
2683
2684 debug_called(2);
9cf9a798
SW
2685
2686 cr = (struct ciss_request *)arg;
2687 sc = cr->cr_sc;
a8416dcf 2688 cc = cr->cr_cc;
9cf9a798 2689
984263bc
MD
2690 for (i = 0; i < nseg; i++) {
2691 cc->sg[i].address = segs[i].ds_addr;
2692 cc->sg[i].length = segs[i].ds_len;
2693 cc->sg[i].extension = 0;
2694 }
2695 /* we leave the s/g table entirely within the command */
2696 cc->header.sg_in_list = nseg;
2697 cc->header.sg_total = nseg;
9cf9a798
SW
2698
2699 if (cr->cr_flags & CISS_REQ_DATAIN)
2700 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_PREREAD);
2701 if (cr->cr_flags & CISS_REQ_DATAOUT)
2702 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_PREWRITE);
2703
a8416dcf
SW
2704 if (nseg == 0)
2705 cr->cr_sg_tag = CISS_SG_NONE;
2706 else if (nseg == 1)
2707 cr->cr_sg_tag = CISS_SG_1;
2708 else if (nseg == 2)
2709 cr->cr_sg_tag = CISS_SG_2;
2710 else if (nseg <= 4)
2711 cr->cr_sg_tag = CISS_SG_4;
2712 else if (nseg <= 8)
2713 cr->cr_sg_tag = CISS_SG_8;
2714 else if (nseg <= 16)
2715 cr->cr_sg_tag = CISS_SG_16;
2716 else if (nseg <= 32)
2717 cr->cr_sg_tag = CISS_SG_32;
2718 else
2719 cr->cr_sg_tag = CISS_SG_MAX;
2720
9cf9a798
SW
2721 /*
2722 * Post the command to the adapter.
2723 */
a8416dcf
SW
2724 cr->cr_flags |= CISS_REQ_BUSY;
2725 if (sc->ciss_perf)
2726 CISS_TL_PERF_POST_CMD(sc, cr);
2727 else
2728 CISS_TL_SIMPLE_POST_CMD(sc, cr->cr_ccphys);
984263bc
MD
2729}
2730
2731/************************************************************************
2732 * Unmap a request from bus-visible space.
2733 */
2734static void
2735ciss_unmap_request(struct ciss_request *cr)
2736{
2737 struct ciss_softc *sc;
2738
2739 debug_called(2);
9cf9a798 2740
984263bc
MD
2741 sc = cr->cr_sc;
2742
2743 /* check that unmapping is necessary */
9cf9a798 2744 if ((cr->cr_flags & CISS_REQ_MAPPED) == 0)
984263bc
MD
2745 return;
2746
9cf9a798
SW
2747 bus_dmamap_sync(sc->ciss_command_dmat, sc->ciss_command_map,
2748 BUS_DMASYNC_POSTWRITE);
2749
2750 if (cr->cr_data == NULL)
2751 goto out;
2752
984263bc
MD
2753 if (cr->cr_flags & CISS_REQ_DATAIN)
2754 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_POSTREAD);
2755 if (cr->cr_flags & CISS_REQ_DATAOUT)
2756 bus_dmamap_sync(sc->ciss_buffer_dmat, cr->cr_datamap, BUS_DMASYNC_POSTWRITE);
2757
2758 bus_dmamap_unload(sc->ciss_buffer_dmat, cr->cr_datamap);
9cf9a798 2759out:
984263bc
MD
2760 cr->cr_flags &= ~CISS_REQ_MAPPED;
2761}
2762
2763/************************************************************************
2764 * Attach the driver to CAM.
2765 *
2766 * We put all the logical drives on a single SCSI bus.
2767 */
2768static int
2769ciss_cam_init(struct ciss_softc *sc)
2770{
9cf9a798 2771 int i, maxbus;
984263bc
MD
2772
2773 debug_called(1);
2774
2775 /*
2776 * Allocate a devq. We can reuse this for the masked physical
2777 * devices if we decide to export these as well.
2778 */
a8416dcf 2779 if ((sc->ciss_cam_devq = cam_simq_alloc(sc->ciss_max_requests - 2)) == NULL) {
984263bc
MD
2780 ciss_printf(sc, "can't allocate CAM SIM queue\n");
2781 return(ENOMEM);
2782 }
2783
2784 /*
2785 * Create a SIM.
9cf9a798
SW
2786 *
2787 * This naturally wastes a bit of memory. The alternative is to allocate
2788 * and register each bus as it is found, and then track them on a linked
2789 * list. Unfortunately, the driver has a few places where it needs to
2790 * look up the SIM based solely on bus number, and it's unclear whether
2791 * a list traversal would work for these situations.
2792 */
2793 maxbus = max(sc->ciss_max_logical_bus, sc->ciss_max_physical_bus +
2794 CISS_PHYSICAL_BASE);
2795 sc->ciss_cam_sim = kmalloc(maxbus * sizeof(struct cam_sim*),
2796 CISS_MALLOC_CLASS, M_INTWAIT | M_ZERO);
2797
2798 for (i = 0; i < sc->ciss_max_logical_bus; i++) {
2799 if ((sc->ciss_cam_sim[i] = cam_sim_alloc(ciss_cam_action, ciss_cam_poll,
2800 "ciss", sc,
2801 device_get_unit(sc->ciss_dev),
a8416dcf
SW
2802 &sc->ciss_lock,
2803 2,
9cf9a798
SW
2804 sc->ciss_max_requests - 2,
2805 sc->ciss_cam_devq)) == NULL) {
2806 ciss_printf(sc, "can't allocate CAM SIM for controller %d\n", i);
2807 return(ENOMEM);
2808 }
2809
2810 /*
2811 * Register bus with this SIM.
2812 */
a8416dcf 2813 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
9cf9a798
SW
2814 if (i == 0 || sc->ciss_controllers[i].physical.bus != 0) {
2815 if (xpt_bus_register(sc->ciss_cam_sim[i], i) != 0) {
2816 ciss_printf(sc, "can't register SCSI bus %d\n", i);
a8416dcf 2817 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798
SW
2818 return (ENXIO);
2819 }
2820 }
a8416dcf 2821 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2822 }
2823
9cf9a798
SW
2824 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
2825 CISS_PHYSICAL_BASE; i++) {
2826 if ((sc->ciss_cam_sim[i] = cam_sim_alloc(ciss_cam_action, ciss_cam_poll,
2827 "ciss", sc,
2828 device_get_unit(sc->ciss_dev),
a8416dcf 2829 &sc->ciss_lock, 1,
9cf9a798
SW
2830 sc->ciss_max_requests - 2,
2831 sc->ciss_cam_devq)) == NULL) {
2832 ciss_printf(sc, "can't allocate CAM SIM for controller %d\n", i);
2833 return (ENOMEM);
2834 }
2835
a8416dcf 2836 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
9cf9a798
SW
2837 if (xpt_bus_register(sc->ciss_cam_sim[i], i) != 0) {
2838 ciss_printf(sc, "can't register SCSI bus %d\n", i);
a8416dcf 2839 lockmgr(&sc->ciss_lock, LK_RELEASE);
9cf9a798
SW
2840 return (ENXIO);
2841 }
a8416dcf 2842 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
2843 }
2844
2845 /*
2846 * Initiate a rescan of the bus.
2847 */
2848 ciss_cam_rescan_all(sc);
9cf9a798 2849
984263bc
MD
2850 return(0);
2851}
2852
2853/************************************************************************
2854 * Initiate a rescan of the 'logical devices' SIM
9cf9a798 2855 */
984263bc 2856static void
9cf9a798 2857ciss_cam_rescan_target(struct ciss_softc *sc, int bus, int target)
984263bc 2858{
9cf9a798 2859 union ccb *ccb;
984263bc
MD
2860
2861 debug_called(1);
2862
978400d3 2863 ccb = kmalloc(sizeof(union ccb), M_TEMP, M_WAITOK | M_ZERO);
9cf9a798 2864
a8416dcf
SW
2865 if (xpt_create_path(&ccb->ccb_h.path, xpt_periph,
2866 cam_sim_path(sc->ciss_cam_sim[bus]),
2867 target, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
984263bc 2868 ciss_printf(sc, "rescan failed (can't create path)\n");
9cf9a798 2869 kfree(ccb, M_TEMP);
984263bc
MD
2870 return;
2871 }
9cf9a798 2872
a8416dcf 2873 xpt_setup_ccb(&ccb->ccb_h, ccb->ccb_h.path, 5/*priority (low)*/);
984263bc
MD
2874 ccb->ccb_h.func_code = XPT_SCAN_BUS;
2875 ccb->ccb_h.cbfcnp = ciss_cam_rescan_callback;
2876 ccb->crcn.flags = CAM_FLAG_NONE;
2877 xpt_action(ccb);
9cf9a798 2878
984263bc
MD
2879 /* scan is now in progress */
2880}
2881
2882static void
2883ciss_cam_rescan_all(struct ciss_softc *sc)
2884{
9cf9a798
SW
2885 int i;
2886
2887 /* Rescan the logical buses */
2888 for (i = 0; i < sc->ciss_max_logical_bus; i++)
2889 ciss_cam_rescan_target(sc, i, CAM_TARGET_WILDCARD);
2890 /* Rescan the physical buses */
2891 for (i = CISS_PHYSICAL_BASE; i < sc->ciss_max_physical_bus +
2892 CISS_PHYSICAL_BASE; i++)
2893 ciss_cam_rescan_target(sc, i, CAM_TARGET_WILDCARD);
984263bc
MD
2894}
2895
2896static void
2897ciss_cam_rescan_callback(struct cam_periph *periph, union ccb *ccb)
2898{
2899 xpt_free_path(ccb->ccb_h.path);
efda3bd0 2900 kfree(ccb, M_TEMP);
984263bc
MD
2901}
2902
2903/************************************************************************
2904 * Handle requests coming from CAM
2905 */
2906static void
2907ciss_cam_action(struct cam_sim *sim, union ccb *ccb)
2908{
2909 struct ciss_softc *sc;
2910 struct ccb_scsiio *csio;
9cf9a798
SW
2911 int bus, target;
2912 int physical;
984263bc
MD
2913
2914 sc = cam_sim_softc(sim);
9cf9a798 2915 bus = cam_sim_bus(sim);
984263bc
MD
2916 csio = (struct ccb_scsiio *)&ccb->csio;
2917 target = csio->ccb_h.target_id;
9cf9a798 2918 physical = CISS_IS_PHYSICAL(bus);
984263bc
MD
2919
2920 switch (ccb->ccb_h.func_code) {
2921
2922 /* perform SCSI I/O */
2923 case XPT_SCSI_IO:
2924 if (!ciss_cam_action_io(sim, csio))
2925 return;
2926 break;
2927
2928 /* perform geometry calculations */
2929 case XPT_CALC_GEOMETRY:
2930 {
2931 struct ccb_calc_geometry *ccg = &ccb->ccg;
9cf9a798 2932 struct ciss_ldrive *ld;
984263bc
MD
2933
2934 debug(1, "XPT_CALC_GEOMETRY %d:%d:%d", cam_sim_bus(sim), ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
2935
9cf9a798
SW
2936 ld = NULL;
2937 if (!physical)
2938 ld = &sc->ciss_logical[bus][target];
2939
984263bc
MD
2940 /*
2941 * Use the cached geometry settings unless the fault tolerance
2942 * is invalid.
2943 */
9cf9a798 2944 if (physical || ld->cl_geometry.fault_tolerance == 0xFF) {
984263bc
MD
2945 u_int32_t secs_per_cylinder;
2946
2947 ccg->heads = 255;
2948 ccg->secs_per_track = 32;
2949 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
2950 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
2951 } else {
2952 ccg->heads = ld->cl_geometry.heads;
2953 ccg->secs_per_track = ld->cl_geometry.sectors;
2954 ccg->cylinders = ntohs(ld->cl_geometry.cylinders);
2955 }
2956 ccb->ccb_h.status = CAM_REQ_CMP;
2957 break;
2958 }
2959
2960 /* handle path attribute inquiry */
2961 case XPT_PATH_INQ:
2962 {
2963 struct ccb_pathinq *cpi = &ccb->cpi;
2964
2965 debug(1, "XPT_PATH_INQ %d:%d:%d", cam_sim_bus(sim), ccb->ccb_h.target_id, ccb->ccb_h.target_lun);
2966
2967 cpi->version_num = 1;
2968 cpi->hba_inquiry = PI_TAG_ABLE; /* XXX is this correct? */
2969 cpi->target_sprt = 0;
2970 cpi->hba_misc = 0;
2971 cpi->max_target = CISS_MAX_LOGICAL;
2972 cpi->max_lun = 0; /* 'logical drive' channel only */
2973 cpi->initiator_id = CISS_MAX_LOGICAL;
2974 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
2975 strncpy(cpi->hba_vid, "msmith@freebsd.org", HBA_IDLEN);
2976 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
2977 cpi->unit_number = cam_sim_unit(sim);
2978 cpi->bus_id = cam_sim_bus(sim);
2979 cpi->base_transfer_speed = 132 * 1024; /* XXX what to set this to? */
f19fcfb0
PA
2980 cpi->transport = XPORT_SPI;
2981 cpi->transport_version = 2;
2982 cpi->protocol = PROTO_SCSI;
2983 cpi->protocol_version = SCSI_REV_2;
a8416dcf
SW
2984#if 0 /* XXX swildner */
2985 cpi->maxio = (CISS_MAX_SG_ELEMENTS - 1) * PAGE_SIZE;
2986#endif
984263bc
MD
2987 ccb->ccb_h.status = CAM_REQ_CMP;
2988 break;
2989 }
2990
2991 case XPT_GET_TRAN_SETTINGS:
2992 {
2993 struct ccb_trans_settings *cts = &ccb->cts;
2994 int bus, target;
a8416dcf
SW
2995 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
2996 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
984263bc
MD
2997
2998 bus = cam_sim_bus(sim);
2999 target = cts->ccb_h.target_id;
3000
3001 debug(1, "XPT_GET_TRAN_SETTINGS %d:%d", bus, target);
984263bc 3002 /* disconnect always OK */
f19fcfb0
PA
3003 cts->protocol = PROTO_SCSI;
3004 cts->protocol_version = SCSI_REV_2;
3005 cts->transport = XPORT_SPI;
3006 cts->transport_version = 2;
3007
3008 spi->valid = CTS_SPI_VALID_DISC;
3009 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
984263bc 3010
a8416dcf
SW
3011 scsi->valid = CTS_SCSI_VALID_TQ;
3012 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
3013
984263bc
MD
3014 cts->ccb_h.status = CAM_REQ_CMP;
3015 break;
3016 }
3017
3018 default: /* we can't do this */
a8416dcf 3019 debug(1, "unspported func_code = 0x%x", ccb->ccb_h.func_code);
984263bc
MD
3020 ccb->ccb_h.status = CAM_REQ_INVALID;
3021 break;
3022 }
3023
3024 xpt_done(ccb);
3025}
3026
3027/************************************************************************
3028 * Handle a CAM SCSI I/O request.
3029 */
3030static int
3031ciss_cam_action_io(struct cam_sim *sim, struct ccb_scsiio *csio)
3032{
3033 struct ciss_softc *sc;
3034 int bus, target;
3035 struct ciss_request *cr;
3036 struct ciss_command *cc;
3037 int error;
3038
3039 sc = cam_sim_softc(sim);
3040 bus = cam_sim_bus(sim);
3041 target = csio->ccb_h.target_id;
3042
3043 debug(2, "XPT_SCSI_IO %d:%d:%d", bus, target, csio->ccb_h.target_lun);
3044
984263bc
MD
3045 /* check that the CDB pointer is not to a physical address */
3046 if ((csio->ccb_h.flags & CAM_CDB_POINTER) && (csio->ccb_h.flags & CAM_CDB_PHYS)) {
3047 debug(3, " CDB pointer is to physical address");
3048 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3049 }
3050
3051 /* if there is data transfer, it must be to/from a virtual address */
3052 if ((csio->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
3053 if (csio->ccb_h.flags & CAM_DATA_PHYS) { /* we can't map it */
3054 debug(3, " data pointer is to physical address");
3055 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3056 }
3057 if (csio->ccb_h.flags & CAM_SCATTER_VALID) { /* we want to do the s/g setup */
3058 debug(3, " data has premature s/g setup");
3059 csio->ccb_h.status = CAM_REQ_CMP_ERR;
3060 }
3061 }
3062
3063 /* abandon aborted ccbs or those that have failed validation */
3064 if ((csio->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3065 debug(3, "abandoning CCB due to abort/validation failure");
3066 return(EINVAL);
3067 }
3068
3069 /* handle emulation of some SCSI commands ourself */
3070 if (ciss_cam_emulate(sc, csio))
3071 return(0);
3072
3073 /*
3074 * Get a request to manage this command. If we can't, return the
3075 * ccb, freeze the queue and flag so that we unfreeze it when a
3076 * request completes.
3077 */
3078 if ((error = ciss_get_request(sc, &cr)) != 0) {
9cf9a798 3079 xpt_freeze_simq(sim, 1);
a8416dcf 3080 sc->ciss_flags |= CISS_FLAG_BUSY;
984263bc
MD
3081 csio->ccb_h.status |= CAM_REQUEUE_REQ;
3082 return(error);
3083 }
3084
3085 /*
3086 * Build the command.
3087 */
a8416dcf 3088 cc = cr->cr_cc;
984263bc
MD
3089 cr->cr_data = csio->data_ptr;
3090 cr->cr_length = csio->dxfer_len;
3091 cr->cr_complete = ciss_cam_complete;
3092 cr->cr_private = csio;
9cf9a798
SW
3093
3094 /*
3095 * Target the right logical volume.
3096 */
3097 if (CISS_IS_PHYSICAL(bus))
3098 cc->header.address =
3099 sc->ciss_physical[CISS_CAM_TO_PBUS(bus)][target].cp_address;
3100 else
3101 cc->header.address =
3102 sc->ciss_logical[bus][target].cl_address;
984263bc
MD
3103 cc->cdb.cdb_length = csio->cdb_len;
3104 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3105 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE; /* XXX ordered tags? */
3106 if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT) {
3107 cr->cr_flags = CISS_REQ_DATAOUT;
3108 cc->cdb.direction = CISS_CDB_DIRECTION_WRITE;
3109 } else if ((csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
3110 cr->cr_flags = CISS_REQ_DATAIN;
3111 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3112 } else {
3113 cr->cr_flags = 0;
3114 cc->cdb.direction = CISS_CDB_DIRECTION_NONE;
3115 }
3116 cc->cdb.timeout = (csio->ccb_h.timeout / 1000) + 1;
3117 if (csio->ccb_h.flags & CAM_CDB_POINTER) {
3118 bcopy(csio->cdb_io.cdb_ptr, &cc->cdb.cdb[0], csio->cdb_len);
3119 } else {
3120 bcopy(csio->cdb_io.cdb_bytes, &cc->cdb.cdb[0], csio->cdb_len);
3121 }
3122
3123 /*
3124 * Submit the request to the adapter.
3125 *
3126 * Note that this may fail if we're unable to map the request (and
3127 * if we ever learn a transport layer other than simple, may fail
3128 * if the adapter rejects the command).
3129 */
3130 if ((error = ciss_start(cr)) != 0) {
9cf9a798 3131 xpt_freeze_simq(sim, 1);
a8416dcf 3132 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
9cf9a798 3133 if (error == EINPROGRESS) {
9cf9a798
SW
3134 error = 0;
3135 } else {
3136 csio->ccb_h.status |= CAM_REQUEUE_REQ;
3137 ciss_release_request(cr);
3138 }
984263bc
MD
3139 return(error);
3140 }
9cf9a798 3141
984263bc
MD
3142 return(0);
3143}
3144
3145/************************************************************************
3146 * Emulate SCSI commands the adapter doesn't handle as we might like.
3147 */
3148static int
3149ciss_cam_emulate(struct ciss_softc *sc, struct ccb_scsiio *csio)
3150{
9cf9a798 3151 int bus, target;
984263bc 3152 u_int8_t opcode;
9cf9a798 3153
984263bc 3154 target = csio->ccb_h.target_id;
9cf9a798
SW
3155 bus = cam_sim_bus(xpt_path_sim(csio->ccb_h.path));
3156 opcode = (csio->ccb_h.flags & CAM_CDB_POINTER) ?
984263bc
MD
3157 *(u_int8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes[0];
3158
9cf9a798
SW
3159 if (CISS_IS_PHYSICAL(bus)) {
3160 if (sc->ciss_physical[CISS_CAM_TO_PBUS(bus)][target].cp_online != 1) {
a8416dcf 3161 csio->ccb_h.status |= CAM_SEL_TIMEOUT;
9cf9a798
SW
3162 xpt_done((union ccb *)csio);
3163 return(1);
3164 } else
3165 return(0);
3166 }
3167
984263bc 3168 /*
9cf9a798
SW
3169 * Handle requests for volumes that don't exist or are not online.
3170 * A selection timeout is slightly better than an illegal request.
3171 * Other errors might be better.
984263bc 3172 */
9cf9a798 3173 if (sc->ciss_logical[bus][target].cl_status != CISS_LD_ONLINE) {
a8416dcf 3174 csio->ccb_h.status |= CAM_SEL_TIMEOUT;
984263bc
MD
3175 xpt_done((union ccb *)csio);
3176 return(1);
3177 }
3178
984263bc
MD
3179 /* if we have to fake Synchronise Cache */
3180 if (sc->ciss_flags & CISS_FLAG_FAKE_SYNCH) {
984263bc
MD
3181 /*
3182 * If this is a Synchronise Cache command, typically issued when
3183 * a device is closed, flush the adapter and complete now.
3184 */
9cf9a798 3185 if (((csio->ccb_h.flags & CAM_CDB_POINTER) ?
984263bc
MD
3186 *(u_int8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes[0]) == SYNCHRONIZE_CACHE) {
3187 ciss_flush_adapter(sc);
a8416dcf 3188 csio->ccb_h.status |= CAM_REQ_CMP;
984263bc
MD
3189 xpt_done((union ccb *)csio);
3190 return(1);
3191 }
3192 }
3193
3194 return(0);
3195}
3196
3197/************************************************************************
3198 * Check for possibly-completed commands.
3199 */
3200static void
3201ciss_cam_poll(struct cam_sim *sim)
3202{
a8416dcf 3203 cr_qhead_t qh;
984263bc
MD
3204 struct ciss_softc *sc = cam_sim_softc(sim);
3205
3206 debug_called(2);
3207
a8416dcf
SW
3208 STAILQ_INIT(&qh);
3209 if (sc->ciss_perf)
3210 ciss_perf_done(sc, &qh);
3211 else
3212 ciss_done(sc, &qh);
3213 ciss_complete(sc, &qh);
984263bc
MD
3214}
3215
3216/************************************************************************
3217 * Handle completion of a command - pass results back through the CCB
3218 */
3219static void
3220ciss_cam_complete(struct ciss_request *cr)
3221{
3222 struct ciss_softc *sc;
3223 struct ciss_command *cc;
3224 struct ciss_error_info *ce;
3225 struct ccb_scsiio *csio;
3226 int scsi_status;
3227 int command_status;
3228
3229 debug_called(2);
3230
3231 sc = cr->cr_sc;
a8416dcf 3232 cc = cr->cr_cc;
984263bc
MD
3233 ce = (struct ciss_error_info *)&(cc->sg[0]);
3234 csio = (struct ccb_scsiio *)cr->cr_private;
3235
3236 /*
3237 * Extract status values from request.
3238 */
3239 ciss_report_request(cr, &command_status, &scsi_status);
3240 csio->scsi_status = scsi_status;
9cf9a798 3241
984263bc
MD
3242 /*
3243 * Handle specific SCSI status values.
3244 */
3245 switch(scsi_status) {
3246 /* no status due to adapter error */
9cf9a798 3247 case -1:
984263bc 3248 debug(0, "adapter error");
a8416dcf 3249 csio->ccb_h.status |= CAM_REQ_CMP_ERR;
984263bc 3250 break;
9cf9a798 3251
984263bc
MD
3252 /* no status due to command completed OK */
3253 case SCSI_STATUS_OK: /* CISS_SCSI_STATUS_GOOD */
3254 debug(2, "SCSI_STATUS_OK");
a8416dcf 3255 csio->ccb_h.status |= CAM_REQ_CMP;
984263bc
MD
3256 break;
3257
3258 /* check condition, sense data included */
3259 case SCSI_STATUS_CHECK_COND: /* CISS_SCSI_STATUS_CHECK_CONDITION */
9cf9a798 3260 debug(0, "SCSI_STATUS_CHECK_COND sense size %d resid %d\n",
984263bc
MD
3261 ce->sense_length, ce->residual_count);
3262 bzero(&csio->sense_data, SSD_FULL_SIZE);
3263 bcopy(&ce->sense_info[0], &csio->sense_data, ce->sense_length);
a8416dcf
SW
3264 if (csio->sense_len > ce->sense_length)
3265 csio->sense_resid = csio->sense_len - ce->sense_length;
3266 else
3267 csio->sense_resid = 0;
9cf9a798 3268 csio->resid = ce->residual_count;
a8416dcf 3269 csio->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID;
984263bc
MD
3270#ifdef CISS_DEBUG
3271 {
3272 struct scsi_sense_data *sns = (struct scsi_sense_data *)&ce->sense_info[0];
a8416dcf
SW
3273 debug(0, "sense key %x", scsi_get_sense_key(sns, csio->sense_len -
3274 csio->sense_resid, /*show_errors*/ 1));
984263bc 3275 }
9cf9a798 3276#endif
984263bc
MD
3277 break;
3278
3279 case SCSI_STATUS_BUSY: /* CISS_SCSI_STATUS_BUSY */
3280 debug(0, "SCSI_STATUS_BUSY");
a8416dcf 3281 csio->ccb_h.status |= CAM_SCSI_BUSY;
984263bc
MD
3282 break;
3283
3284 default:
3285 debug(0, "unknown status 0x%x", csio->scsi_status);
a8416dcf 3286 csio->ccb_h.status |= CAM_REQ_CMP_ERR;
984263bc
MD
3287 break;
3288 }
3289
3290 /* handle post-command fixup */
3291 ciss_cam_complete_fixup(sc, csio);
3292
984263bc 3293 ciss_release_request(cr);
a8416dcf
SW
3294 if (sc->ciss_flags & CISS_FLAG_BUSY) {
3295 sc->ciss_flags &= ~CISS_FLAG_BUSY;
3296 if (csio->ccb_h.status & CAM_RELEASE_SIMQ)
3297 xpt_release_simq(xpt_path_sim(csio->ccb_h.path), 0);
3298 else
3299 csio->ccb_h.status |= CAM_RELEASE_SIMQ;
3300 }
3301 xpt_done((union ccb *)csio);
984263bc
MD
3302}
3303
3304/********************************************************************************
3305 * Fix up the result of some commands here.
3306 */
3307static void
3308ciss_cam_complete_fixup(struct ciss_softc *sc, struct ccb_scsiio *csio)
3309{
3310 struct scsi_inquiry_data *inq;
3311 struct ciss_ldrive *cl;
a8416dcf 3312 uint8_t *cdb;
9cf9a798 3313 int bus, target;
984263bc 3314
a8416dcf
SW
3315 cdb = (csio->ccb_h.flags & CAM_CDB_POINTER) ?
3316 (uint8_t *)csio->cdb_io.cdb_ptr : csio->cdb_io.cdb_bytes;
3317 if (cdb[0] == INQUIRY &&
3318 (cdb[1] & SI_EVPD) == 0 &&
3319 (csio->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN &&
3320 csio->dxfer_len >= SHORT_INQUIRY_LENGTH) {
984263bc
MD
3321
3322 inq = (struct scsi_inquiry_data *)csio->data_ptr;
3323 target = csio->ccb_h.target_id;
9cf9a798
SW
3324 bus = cam_sim_bus(xpt_path_sim(csio->ccb_h.path));
3325
3326 /*
3327 * Don't let hard drives be seen by the DA driver. They will still be
3328 * attached by the PASS driver.
3329 */
3330 if (CISS_IS_PHYSICAL(bus)) {
3331 if (SID_TYPE(inq) == T_DIRECT)
3332 inq->device = (inq->device & 0xe0) | T_NODEVICE;
3333 return;
3334 }
3335
3336 cl = &sc->ciss_logical[bus][target];
3337
984263bc
MD
3338 padstr(inq->vendor, "COMPAQ", 8);
3339 padstr(inq->product, ciss_name_ldrive_org(cl->cl_ldrive->fault_tolerance), 8);
3340 padstr(inq->revision, ciss_name_ldrive_status(cl->cl_lstatus->status), 16);
3341 }
3342}
3343
3344
3345/********************************************************************************
3346 * Find a peripheral attached at (target)
3347 */
3348static struct cam_periph *
9cf9a798 3349ciss_find_periph(struct ciss_softc *sc, int bus, int target)
984263bc
MD
3350{
3351 struct cam_periph *periph;
3352 struct cam_path *path;
3353 int status;
3354
9cf9a798
SW
3355 status = xpt_create_path(&path, NULL, cam_sim_path(sc->ciss_cam_sim[bus]),
3356 target, 0);
984263bc
MD
3357 if (status == CAM_REQ_CMP) {
3358 periph = cam_periph_find(path, NULL);
3359 xpt_free_path(path);
3360 } else {
3361 periph = NULL;
3362 }
3363 return(periph);
3364}
3365
3366/********************************************************************************
3367 * Name the device at (target)
3368 *
3369 * XXX is this strictly correct?
3370 */
9cf9a798
SW
3371static int
3372ciss_name_device(struct ciss_softc *sc, int bus, int target)
984263bc
MD
3373{
3374 struct cam_periph *periph;
3375
9cf9a798
SW
3376 if (CISS_IS_PHYSICAL(bus))
3377 return (0);
3378 if ((periph = ciss_find_periph(sc, bus, target)) != NULL) {
3379 ksprintf(sc->ciss_logical[bus][target].cl_name, "%s%d",
a8416dcf 3380 periph->periph_name, periph->unit_number);
984263bc
MD
3381 return(0);
3382 }
9cf9a798 3383 sc->ciss_logical[bus][target].cl_name[0] = 0;
984263bc
MD
3384 return(ENOENT);
3385}
3386
3387/************************************************************************
3388 * Periodic status monitoring.
3389 */
3390static void
3391ciss_periodic(void *arg)
3392{
a8416dcf
SW
3393 struct ciss_softc *sc = (struct ciss_softc *)arg;
3394 struct ciss_request *cr = NULL;
3395 struct ciss_command *cc = NULL;
3396 int error = 0;
984263bc 3397
a8416dcf 3398 lockmgr(&sc->ciss_lock, LK_EXCLUSIVE);
984263bc 3399 debug_called(1);
9cf9a798 3400
984263bc
MD
3401 /*
3402 * Check the adapter heartbeat.
3403 */
3404 if (sc->ciss_cfg->heartbeat == sc->ciss_heartbeat) {
3405 sc->ciss_heart_attack++;
9cf9a798 3406 debug(0, "adapter heart attack in progress 0x%x/%d",
984263bc
MD
3407 sc->ciss_heartbeat, sc->ciss_heart_attack);
3408 if (sc->ciss_heart_attack == 3) {
3409 ciss_printf(sc, "ADAPTER HEARTBEAT FAILED\n");
a8416dcf
SW
3410 ciss_disable_adapter(sc);
3411 lockmgr(&sc->ciss_lock, LK_RELEASE);
3412 return;
984263bc
MD
3413 }
3414 } else {
3415 sc->ciss_heartbeat = sc->ciss_cfg->heartbeat;
3416 sc->ciss_heart_attack = 0;
3417 debug(3, "new heartbeat 0x%x", sc->ciss_heartbeat);
3418 }
9cf9a798 3419
984263bc 3420 /*
a8416dcf
SW
3421 * Send the NOP message and wait for a response.
3422 */
3423 if (ciss_nop_message_heartbeat != 0 && (error = ciss_get_request(sc, &cr)) == 0) {
3424 cc = cr->cr_cc;
3425 cr->cr_complete = ciss_nop_complete;
3426 cc->cdb.cdb_length = 1;
3427 cc->cdb.type = CISS_CDB_TYPE_MESSAGE;
3428 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3429 cc->cdb.direction = CISS_CDB_DIRECTION_WRITE;
3430 cc->cdb.timeout = 0;
3431 cc->cdb.cdb[0] = CISS_OPCODE_MESSAGE_NOP;
3432
3433 if ((error = ciss_start(cr)) != 0) {
3434 ciss_printf(sc, "SENDING NOP MESSAGE FAILED\n");
3435 }
3436 }
3437
3438 /*
984263bc
MD
3439 * If the notify event request has died for some reason, or has
3440 * not started yet, restart it.
3441 */
3442 if (!(sc->ciss_flags & CISS_FLAG_NOTIFY_OK)) {
3443 debug(0, "(re)starting Event Notify chain");
3444 ciss_notify_event(sc);
3445 }
a8416dcf 3446 lockmgr(&sc->ciss_lock, LK_RELEASE);
984263bc
MD
3447
3448 /*
3449 * Reschedule.
3450 */
a8416dcf
SW
3451 callout_reset(&sc->ciss_periodic, CISS_HEARTBEAT_RATE * hz, ciss_periodic, sc);
3452}
3453
3454static void
3455ciss_nop_complete(struct ciss_request *cr)
3456{
3457 struct ciss_softc *sc;
3458 static int first_time = 1;
3459
3460 sc = cr->cr_sc;
3461 if (ciss_report_request(cr, NULL, NULL) != 0) {
3462 if (first_time == 1) {
3463 first_time = 0;
3464 ciss_printf(sc, "SENDING NOP MESSAGE FAILED (not logging anymore)\n");
3465 }
3466 }
3467
3468 ciss_release_request(cr);
3469}
3470
3471/************************************************************************
3472 * Disable the adapter.
3473 *
3474 * The all requests in completed queue is failed with hardware error.
3475 * This will cause failover in a multipath configuration.
3476 */
3477static void
3478ciss_disable_adapter(struct ciss_softc *sc)
3479{
3480 cr_qhead_t qh;
3481 struct ciss_request *cr;
3482 struct ciss_command *cc;
3483 struct ciss_error_info *ce;
3484 int i;
3485
3486 CISS_TL_SIMPLE_DISABLE_INTERRUPTS(sc);
3487 pci_disable_busmaster(sc->ciss_dev);
3488 sc->ciss_flags &= ~CISS_FLAG_RUNNING;
3489
3490 for (i = 1; i < sc->ciss_max_requests; i++) {
3491 cr = &sc->ciss_request[i];
3492 if ((cr->cr_flags & CISS_REQ_BUSY) == 0)
3493 continue;
3494
3495 cc = cr->cr_cc;
3496 ce = (struct ciss_error_info *)&(cc->sg[0]);
3497 ce->command_status = CISS_CMD_STATUS_HARDWARE_ERROR;
3498 ciss_enqueue_complete(cr, &qh);
3499 }
3500
3501 for (;;) {
3502 if ((cr = ciss_dequeue_complete(sc, &qh)) == NULL)
3503 break;
3504
3505 /*
3506 * If the request has a callback, invoke it.
3507 */
3508 if (cr->cr_complete != NULL) {
3509 cr->cr_complete(cr);
3510 continue;
3511 }
3512
3513 /*
3514 * If someone is sleeping on this request, wake them up.
3515 */
3516 if (cr->cr_flags & CISS_REQ_SLEEP) {
3517 cr->cr_flags &= ~CISS_REQ_SLEEP;
3518 wakeup(cr);
3519 continue;
3520 }
3521 }
984263bc
MD
3522}
3523
3524/************************************************************************
3525 * Request a notification response from the adapter.
3526 *
3527 * If (cr) is NULL, this is the first request of the adapter, so
3528 * reset the adapter's message pointer and start with the oldest
3529 * message available.
3530 */
3531static void
3532ciss_notify_event(struct ciss_softc *sc)
3533{
3534 struct ciss_request *cr;
3535 struct ciss_command *cc;
3536 struct ciss_notify_cdb *cnc;
3537 int error;
3538
3539 debug_called(1);
3540
3541 cr = sc->ciss_periodic_notify;
9cf9a798 3542
984263bc
MD
3543 /* get a request if we don't already have one */
3544 if (cr == NULL) {
3545 if ((error = ciss_get_request(sc, &cr)) != 0) {
3546 debug(0, "can't get notify event request");
3547 goto out;
3548 }
3549 sc->ciss_periodic_notify = cr;
3550 cr->cr_complete = ciss_notify_complete;
3551 debug(1, "acquired request %d", cr->cr_tag);
3552 }
9cf9a798
SW
3553
3554 /*
984263bc
MD
3555 * Get a databuffer if we don't already have one, note that the
3556 * adapter command wants a larger buffer than the actual
3557 * structure.
3558 */
3559 if (cr->cr_data == NULL) {
efda3bd0 3560 cr->cr_data = kmalloc(CISS_NOTIFY_DATA_SIZE, CISS_MALLOC_CLASS, M_INTWAIT);
984263bc
MD
3561 cr->cr_length = CISS_NOTIFY_DATA_SIZE;
3562 }
3563
3564 /* re-setup the request's command (since we never release it) XXX overkill*/
3565 ciss_preen_command(cr);
3566
3567 /* (re)build the notify event command */
a8416dcf 3568 cc = cr->cr_cc;
984263bc
MD
3569 cc->header.address.physical.mode = CISS_HDR_ADDRESS_MODE_PERIPHERAL;
3570 cc->header.address.physical.bus = 0;
3571 cc->header.address.physical.target = 0;
3572
3573 cc->cdb.cdb_length = sizeof(*cnc);
3574 cc->cdb.type = CISS_CDB_TYPE_COMMAND;
3575 cc->cdb.attribute = CISS_CDB_ATTRIBUTE_SIMPLE;
3576 cc->cdb.direction = CISS_CDB_DIRECTION_READ;
3577 cc->cdb.timeout = 0; /* no timeout, we hope */
9cf9a798 3578
984263bc
MD
3579 cnc = (struct ciss_notify_cdb *)&(cc->cdb.cdb[0]);
3580 bzero(cr->cr_data, CISS_NOTIFY_DATA_SIZE);
3581 cnc->opcode = CISS_OPCODE_READ;
3582 cnc->command = CISS_COMMAND_NOTIFY_ON_EVENT;
3583 cnc->timeout = 0; /* no timeout, we hope */
3584 cnc->synchronous = 0;
3585 cnc->ordered = 0;
3586 cnc->seek_to_oldest = 0;
9cf9a798
SW
3587 if ((sc->ciss_flags & CISS_FLAG_RUNNING) == 0)
3588 cnc->new_only = 1;
3589 else
3590 cnc->new_only = 0;
984263bc
MD
3591 cnc->length = htonl(CISS_NOTIFY_DATA_SIZE);
3592
3593 /* submit the request */
3594 error = ciss_start(cr);
3595
3596 out:
3597 if (error) {
3598 if (cr != NULL) {
3599 if (cr->cr_data != NULL)
efda3bd0 3600 kfree(cr->cr_data, CISS_MALLOC_CLASS);
984263bc
MD
3601 ciss_release_request(cr);
3602 }
3603 sc->ciss_periodic_notify = NULL;
3604 debug(0, "can't submit notify event request");
3605 sc->ciss_flags &= ~CISS_FLAG_NOTIFY_OK;
3606 } else {
3607 debug(1, "notify event submitted");
3608 sc->ciss_flags |= CISS_FLAG_NOTIFY_OK;
3609 }
3610}
3611
3612static void
3613ciss_notify_complete(struct ciss_request *cr)
3614{
3615 struct ciss_command *cc;
3616 struct ciss_notify *cn;
3617 struct ciss_softc *sc;
3618 int scsi_status;
3619 int command_status;
984263bc 3620 debug_called(1);
9cf9a798 3621
a8416dcf 3622 cc = cr->cr_cc;