Setup intr in the last step of uhci_pci_attach().
[dragonfly.git] / sys / bus / usb / uhci_pci.c
CommitLineData
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1/*-
2 * Copyright (c) 1998 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Lennart Augustsson (augustss@carlstedt.se) at
7 * Carlstedt Research & Technology.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/dev/usb/uhci_pci.c,v 1.51 2003/11/28 05:28:29 imp Exp $
aa0bb337 38 * $DragonFly: src/sys/bus/usb/uhci_pci.c,v 1.6 2005/09/20 09:06:58 sephe Exp $
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39 */
40
41/* Universal Host Controller Interface
42 *
43 * UHCI spec: http://www.intel.com/
44 */
45
46/* The low level controller code for UHCI has been split into
47 * PCI probes and UHCI specific code. This was done to facilitate the
48 * sharing of code between *BSD's
49 */
50
51#include "opt_bus.h"
52
53#include <sys/param.h>
54#include <sys/systm.h>
55#include <sys/kernel.h>
56#include <sys/module.h>
57#include <sys/bus.h>
58#include <sys/queue.h>
15ba557b 59#if defined(__FreeBSD__) || defined(__DragonFly__)
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60#include <sys/bus.h>
61
62#include <machine/bus.h>
63#include <machine/resource.h>
64#include <sys/rman.h>
65#endif
66
67#include <bus/pci/pcivar.h>
68#include <bus/pci/pcireg.h>
69
70#include <bus/usb/usb.h>
71#include <bus/usb/usbdi.h>
72#include <bus/usb/usbdivar.h>
73#include <bus/usb/usb_mem.h>
74
75#include <bus/usb/uhcireg.h>
76#include <bus/usb/uhcivar.h>
77
78#define PCI_UHCI_VENDORID_INTEL 0x8086
79#define PCI_UHCI_VENDORID_VIA 0x1106
80
81#define PCI_UHCI_DEVICEID_PIIX3 0x70208086
82static const char *uhci_device_piix3 = "Intel 82371SB (PIIX3) USB controller";
83
84#define PCI_UHCI_DEVICEID_PIIX4 0x71128086
85#define PCI_UHCI_DEVICEID_PIIX4E 0x71128086 /* no separate stepping */
86static const char *uhci_device_piix4 = "Intel 82371AB/EB (PIIX4) USB controller";
87
88#define PCI_UHCI_DEVICEID_ICH 0x24128086
89static const char *uhci_device_ich = "Intel 82801AA (ICH) USB controller";
90
91#define PCI_UHCI_DEVICEID_ICH0 0x24228086
92static const char *uhci_device_ich0 = "Intel 82801AB (ICH0) USB controller";
93
94#define PCI_UHCI_DEVICEID_ICH2_A 0x24428086
95static const char *uhci_device_ich2_a = "Intel 82801BA/BAM (ICH2) USB controller USB-A";
96
97#define PCI_UHCI_DEVICEID_ICH2_B 0x24448086
98static const char *uhci_device_ich2_b = "Intel 82801BA/BAM (ICH2) USB controller USB-B";
99
100#define PCI_UHCI_DEVICEID_ICH3_A 0x24828086
101static const char *uhci_device_ich3_a = "Intel 82801CA/CAM (ICH3) USB controller USB-A";
102
103#define PCI_UHCI_DEVICEID_ICH3_B 0x24848086
104static const char *uhci_device_ich3_b = "Intel 82801CA/CAM (ICH3) USB controller USB-B";
105
106#define PCI_UHCI_DEVICEID_ICH3_C 0x24878086
107static const char *uhci_device_ich3_c = "Intel 82801CA/CAM (ICH3) USB controller USB-C";
108
109#define PCI_UHCI_DEVICEID_ICH4_A 0x24c28086
110static const char *uhci_device_ich4_a = "Intel 82801DB (ICH4) USB controller USB-A";
111
112#define PCI_UHCI_DEVICEID_ICH4_B 0x24c48086
113static const char *uhci_device_ich4_b = "Intel 82801DB (ICH4) USB controller USB-B";
114
115#define PCI_UHCI_DEVICEID_ICH4_C 0x24c78086
116static const char *uhci_device_ich4_c = "Intel 82801DB (ICH4) USB controller USB-C";
117
118#define PCI_UHCI_DEVICEID_ICH5_A 0x24d28086
119static const char *uhci_device_ich5_a = "Intel 82801EB (ICH5) USB controller USB-A";
120
121#define PCI_UHCI_DEVICEID_ICH5_B 0x24d48086
122static const char *uhci_device_ich5_b = "Intel 82801EB (ICH5) USB controller USB-B";
123
124#define PCI_UHCI_DEVICEID_ICH5_C 0x24d78086
125static const char *uhci_device_ich5_c = "Intel 82801EB (ICH5) USB controller USB-C";
126
127#define PCI_UHCI_DEVICEID_ICH5_D 0x24de8086
128static const char *uhci_device_ich5_d = "Intel 82801EB (ICH5) USB controller USB-D";
129
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130#define PCI_UHCI_DEVICEID_ICH6_A 0x26588086
131static const char *uhci_device_ich6_a = "Intel 82801FB (ICH6) USB controller USB-A";
132
133#define PCI_UHCI_DEVICEID_ICH6_B 0x26598086
134static const char *uhci_device_ich6_b = "Intel 82801FB (ICH6) USB controller USB-B";
135
136#define PCI_UHCI_DEVICEID_ICH6_C 0x265a8086
137static const char *uhci_device_ich6_c = "Intel 82801FB (ICH6) USB controller USB-C";
138
139#define PCI_UHCI_DEVICEID_ICH6_D 0x265b8086
140static const char *uhci_device_ich6_d = "Intel 82801FB (ICH6) USB controller USB-D";
d2ce3a27 141
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142#define PCI_UHCI_DEVICEID_440MX 0x719a8086
143static const char *uhci_device_440mx = "Intel 82443MX USB controller";
144
145#define PCI_UHCI_DEVICEID_460GX 0x76028086
146static const char *uhci_device_460gx = "Intel 82372FB/82468GX USB controller";
147
148#define PCI_UHCI_DEVICEID_VT83C572 0x30381106
149static const char *uhci_device_vt83c572 = "VIA 83C572 USB controller";
150
151static const char *uhci_device_generic = "UHCI (generic) USB controller";
152
153#define PCI_UHCI_BASE_REG 0x20
154
155
156static int uhci_pci_attach(device_t self);
157static int uhci_pci_detach(device_t self);
158static int uhci_pci_suspend(device_t self);
159static int uhci_pci_resume(device_t self);
160
161
162static int
163uhci_pci_suspend(device_t self)
164{
165 uhci_softc_t *sc = device_get_softc(self);
166 int err;
167
168 err = bus_generic_suspend(self);
169 if (err)
170 return err;
171 uhci_power(PWR_SUSPEND, sc);
172
173 return 0;
174}
175
176static int
177uhci_pci_resume(device_t self)
178{
179 uhci_softc_t *sc = device_get_softc(self);
180
181 uhci_power(PWR_RESUME, sc);
182 bus_generic_resume(self);
183
184 return 0;
185}
186
187static const char *
188uhci_pci_match(device_t self)
189{
190 u_int32_t device_id = pci_get_devid(self);
191
192 if (device_id == PCI_UHCI_DEVICEID_PIIX3) {
193 return (uhci_device_piix3);
194 } else if (device_id == PCI_UHCI_DEVICEID_PIIX4) {
195 return (uhci_device_piix4);
196 } else if (device_id == PCI_UHCI_DEVICEID_ICH) {
197 return (uhci_device_ich);
198 } else if (device_id == PCI_UHCI_DEVICEID_ICH0) {
199 return (uhci_device_ich0);
200 } else if (device_id == PCI_UHCI_DEVICEID_ICH2_A) {
201 return (uhci_device_ich2_a);
202 } else if (device_id == PCI_UHCI_DEVICEID_ICH2_B) {
203 return (uhci_device_ich2_b);
204 } else if (device_id == PCI_UHCI_DEVICEID_ICH3_A) {
205 return (uhci_device_ich3_a);
206 } else if (device_id == PCI_UHCI_DEVICEID_ICH3_B) {
207 return (uhci_device_ich3_b);
208 } else if (device_id == PCI_UHCI_DEVICEID_ICH3_C) {
209 return (uhci_device_ich3_c);
210 } else if (device_id == PCI_UHCI_DEVICEID_ICH4_A) {
211 return (uhci_device_ich4_a);
212 } else if (device_id == PCI_UHCI_DEVICEID_ICH4_B) {
213 return (uhci_device_ich4_b);
214 } else if (device_id == PCI_UHCI_DEVICEID_ICH4_C) {
215 return (uhci_device_ich4_c);
216 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_A) {
217 return (uhci_device_ich5_a);
218 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_B) {
219 return (uhci_device_ich5_b);
220 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_C) {
221 return (uhci_device_ich5_c);
222 } else if (device_id == PCI_UHCI_DEVICEID_ICH5_D) {
223 return (uhci_device_ich5_d);
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224 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_A) {
225 return (uhci_device_ich6_a);
226 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_B) {
227 return (uhci_device_ich6_b);
228 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_C) {
229 return (uhci_device_ich6_c);
230 } else if (device_id == PCI_UHCI_DEVICEID_ICH6_D) {
231 return (uhci_device_ich6_d);
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232 } else if (device_id == PCI_UHCI_DEVICEID_440MX) {
233 return (uhci_device_440mx);
234 } else if (device_id == PCI_UHCI_DEVICEID_460GX) {
235 return (uhci_device_460gx);
236 } else if (device_id == PCI_UHCI_DEVICEID_VT83C572) {
237 return (uhci_device_vt83c572);
238 } else {
239 if (pci_get_class(self) == PCIC_SERIALBUS
240 && pci_get_subclass(self) == PCIS_SERIALBUS_USB
241 && pci_get_progif(self) == PCI_INTERFACE_UHCI) {
242 return (uhci_device_generic);
243 }
244 }
245
246 return NULL; /* dunno... */
247}
248
249static int
250uhci_pci_probe(device_t self)
251{
252 const char *desc = uhci_pci_match(self);
253
254 if (desc) {
255 device_set_desc(self, desc);
256 return 0;
257 } else {
258 return ENXIO;
259 }
260}
261
262static int
263uhci_pci_attach(device_t self)
264{
265 uhci_softc_t *sc = device_get_softc(self);
266 int rid;
267 int err;
268
269 pci_enable_busmaster(self);
270
271 rid = PCI_UHCI_BASE_REG;
272 sc->io_res = bus_alloc_resource(self, SYS_RES_IOPORT, &rid,
273 0, ~0, 1, RF_ACTIVE);
274 if (!sc->io_res) {
275 device_printf(self, "Could not map ports\n");
276 return ENXIO;
277 }
278 sc->iot = rman_get_bustag(sc->io_res);
279 sc->ioh = rman_get_bushandle(sc->io_res);
280
281 /* disable interrupts */
282 bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
283
284 rid = 0;
285 sc->irq_res = bus_alloc_resource(self, SYS_RES_IRQ, &rid,
286 0, ~0, 1,
287 RF_SHAREABLE | RF_ACTIVE);
288 if (sc->irq_res == NULL) {
289 device_printf(self, "Could not allocate irq\n");
290 uhci_pci_detach(self);
291 return ENXIO;
292 }
293 sc->sc_bus.bdev = device_add_child(self, "usb", -1);
294 if (!sc->sc_bus.bdev) {
295 device_printf(self, "Could not add USB device\n");
296 uhci_pci_detach(self);
297 return ENOMEM;
298 }
299 device_set_ivars(sc->sc_bus.bdev, sc);
300
301 /* uhci_pci_match must never return NULL if uhci_pci_probe succeeded */
302 device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
303 switch (pci_get_vendor(self)) {
304 case PCI_UHCI_VENDORID_INTEL:
305 sprintf(sc->sc_vendor, "Intel");
306 break;
307 case PCI_UHCI_VENDORID_VIA:
308 sprintf(sc->sc_vendor, "VIA");
309 break;
310 default:
311 if (bootverbose)
312 device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
313 pci_get_devid(self));
314 sprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
315 }
316
317 switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
318 case PCI_USBREV_PRE_1_0:
319 sc->sc_bus.usbrev = USBREV_PRE_1_0;
320 break;
321 case PCI_USBREV_1_0:
322 sc->sc_bus.usbrev = USBREV_1_0;
323 break;
324 default:
325 sc->sc_bus.usbrev = USBREV_UNKNOWN;
326 break;
327 }
328
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329 /*
330 * Set the PIRQD enable bit and switch off all the others. We don't
331 * want legacy support to interfere with us XXX Does this also mean
332 * that the BIOS won't touch the keyboard anymore if it is connected
333 * to the ports of the root hub?
334 */
335#ifdef USB_DEBUG
336 if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN)
337 device_printf(self, "LegSup = 0x%04x\n",
338 pci_read_config(self, PCI_LEGSUP, 2));
339#endif
340 pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
341
342 err = uhci_init(sc);
343 if (!err)
344 err = device_probe_and_attach(sc->sc_bus.bdev);
345
346 if (err) {
347 device_printf(self, "USB init failed\n");
348 uhci_pci_detach(self);
349 return EIO;
350 }
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351
352 err = bus_setup_intr(self, sc->irq_res, INTR_TYPE_BIO,
353 (driver_intr_t *) uhci_intr, sc, &sc->ih, NULL);
354 if (err) {
355 device_printf(self, "Could not setup irq, %d\n", err);
356 sc->ih = NULL;
357 uhci_pci_detach(self);
358 return ENXIO;
359 }
360
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361 return 0; /* success */
362}
363
364int
365uhci_pci_detach(device_t self)
366{
367 uhci_softc_t *sc = device_get_softc(self);
368
369 /*
370 * XXX This function is not yet complete and should not be added
371 * method list.
372 */
373#if 0
374 if uhci_init
375 was successful
376 we should call something like uhci_deinit
377#endif
378
379 /*
380 * disable interrupts that might have been switched on in
381 * uhci_init.
382 */
383 if (sc->iot && sc->ioh)
384 bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
385
386 if (sc->irq_res && sc->ih) {
387 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
388
389 if (err)
390 /* XXX or should we panic? */
391 device_printf(self, "Could not tear down irq, %d\n",
392 err);
393 sc->ih = NULL;
394 }
395 if (sc->sc_bus.bdev) {
396 device_delete_child(self, sc->sc_bus.bdev);
397 sc->sc_bus.bdev = NULL;
398 }
399 if (sc->irq_res) {
400 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
401 sc->irq_res = NULL;
402 }
403 if (sc->io_res) {
404 bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG,
405 sc->io_res);
406 sc->io_res = NULL;
407 sc->iot = 0;
408 sc->ioh = 0;
409 }
410 return 0;
411}
412
413
414static device_method_t uhci_methods[] = {
415 /* Device interface */
416 DEVMETHOD(device_probe, uhci_pci_probe),
417 DEVMETHOD(device_attach, uhci_pci_attach),
418 DEVMETHOD(device_suspend, uhci_pci_suspend),
419 DEVMETHOD(device_resume, uhci_pci_resume),
420 DEVMETHOD(device_shutdown, bus_generic_shutdown),
421
422 /* Bus interface */
423 DEVMETHOD(bus_print_child, bus_generic_print_child),
424
425 {0, 0}
426};
427
428static driver_t uhci_driver = {
429 "uhci",
430 uhci_methods,
431 sizeof(uhci_softc_t),
432};
433
434static devclass_t uhci_devclass;
435
436DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, 0, 0);
437DRIVER_MODULE(uhci, cardbus, uhci_driver, uhci_devclass, 0, 0);