Change the kernel dev_t, representing a pointer to a specinfo structure,
[dragonfly.git] / sys / dev / serial / cy / cy.c
CommitLineData
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1/*-
2 * cyclades cyclom-y serial driver
3 * Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993
4 *
5 * Copyright (c) 1993 Andrew Herbert.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name Andrew Herbert may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22 * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * $FreeBSD: src/sys/i386/isa/cy.c,v 1.97.2.2 2001/08/22 13:04:58 bde Exp $
b13267a5 31 * $DragonFly: src/sys/dev/serial/cy/cy.c,v 1.22 2006/09/10 01:26:36 dillon Exp $
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32 */
33
34#include "opt_compat.h"
1f2de5d4 35#include "use_cy.h"
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36
37/*
38 * TODO:
39 * Atomic COR change.
40 * Consoles.
41 */
42
43/*
44 * Temporary compile-time configuration options.
45 */
46#define RxFifoThreshold (CD1400_RX_FIFO_SIZE / 2)
47 /* Number of chars in the receiver FIFO before an
48 * an interrupt is generated. Should depend on
49 * line speed. Needs to be about 6 on a 486DX33
50 * for 4 active ports at 115200 bps. Why doesn't
51 * 10 work?
52 */
53#define PollMode /* Use polling-based irq service routine, not the
54 * hardware svcack lines. Must be defined for
55 * Cyclom-16Y boards. Less efficient for Cyclom-8Ys,
56 * and stops 4 * 115200 bps from working.
57 */
58#undef Smarts /* Enable slightly more CD1400 intelligence. Mainly
59 * the output CR/LF processing, plus we can avoid a
60 * few checks usually done in ttyinput().
61 *
62 * XXX not fully implemented, and not particularly
63 * worthwhile.
64 */
65#undef CyDebug /* Include debugging code (not very expensive). */
66
67/* These will go away. */
68#undef SOFT_CTS_OFLOW
69#define SOFT_HOTCHAR
70
71#include <sys/param.h>
72#include <sys/systm.h>
73#include <sys/tty.h>
74#include <sys/proc.h>
75#include <sys/conf.h>
76#include <sys/dkstat.h>
77#include <sys/fcntl.h>
78#include <sys/interrupt.h>
79#include <sys/kernel.h>
80#include <sys/malloc.h>
81#include <sys/syslog.h>
8d77660e 82#include <sys/thread2.h>
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83#include <machine/clock.h>
84#include <machine/ipl.h>
85#ifndef SMP
86#include <machine/lock.h>
87#endif
88#include <machine/psl.h>
89
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90#include <bus/isa/i386/isa_device.h>
91#include "cyreg.h"
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92#include <i386/isa/ic/cd1400.h>
93
94#ifdef SMP
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95#define disable_intr() com_lock()
96#define enable_intr() com_unlock()
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97#endif /* SMP */
98
99/*
100 * Dictionary so that I can name everything *sio* or *com* to compare with
101 * sio.c. There is also lots of ugly formatting and unnecessary ifdefs to
102 * simplify the comparision. These will go away.
103 */
104#define LSR_BI CD1400_RDSR_BREAK
105#define LSR_FE CD1400_RDSR_FE
106#define LSR_OE CD1400_RDSR_OE
107#define LSR_PE CD1400_RDSR_PE
108#define MCR_DTR CD1400_MSVR2_DTR
109#define MCR_RTS CD1400_MSVR1_RTS
110#define MSR_CTS CD1400_MSVR2_CTS
111#define MSR_DCD CD1400_MSVR2_CD
112#define MSR_DSR CD1400_MSVR2_DSR
113#define MSR_RI CD1400_MSVR2_RI
114#define NSIO (NCY * CY_MAX_PORTS)
115#define comconsole cyconsole
116#define comdefaultrate cydefaultrate
117#define com_events cy_events
118#define comhardclose cyhardclose
119#define commctl cymctl
120#define comparam cyparam
121#define comspeed cyspeed
122#define comstart cystart
123#define comwakeup cywakeup
124#define nsio_tty ncy_tty
125#define p_com_addr p_cy_addr
126#define sioattach cyattach
127#define sioclose cyclose
128#define siodriver cydriver
129#define siodtrwakeup cydtrwakeup
130#define sioinput cyinput
131#define siointr cyintr
132#define siointr1 cyintr1
133#define sioioctl cyioctl
134#define sioopen cyopen
135#define siopoll cypoll
136#define sioprobe cyprobe
137#define siosettimeout cysettimeout
138#define siosetwater cysetwater
139#define comstop cystop
140#define siowrite cywrite
141#define sio_registered cy_registered
142#define sio_timeout cy_timeout
143#define sio_timeout_handle cy_timeout_handle
144#define sio_timeouts_until_log cy_timeouts_until_log
145#define sio_tty cy_tty
146
147#define CY_MAX_PORTS (CD1400_NO_OF_CHANNELS * CY_MAX_CD1400s)
148
149/* We encode the cyclom unit number (cyu) in spare bits in the IVR's. */
150#define CD1400_xIVR_CHAN_SHIFT 3
151#define CD1400_xIVR_CHAN 0x1F
152
153/*
154 * ETC states. com->etc may also contain a hardware ETC command value,
155 * meaning that execution of that command is pending.
156 */
157#define ETC_NONE 0 /* we depend on bzero() setting this */
158#define ETC_BREAK_STARTING 1
159#define ETC_BREAK_STARTED 2
160#define ETC_BREAK_ENDING 3
161#define ETC_BREAK_ENDED 4
162
163#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
164
165#define CALLOUT_MASK 0x80
166#define CONTROL_MASK 0x60
167#define CONTROL_INIT_STATE 0x20
168#define CONTROL_LOCK_STATE 0x40
169#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
170#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK)
171/*
172 * Not all of the magic is parametrized in the following macros. 16 and
173 * 0xff are related to the bitfields in a udev_t. CY_MAX_PORTS must be
174 * ((0xff & ~MINOR_MAGIC_MASK) + 1) for things to work.
175 */
176#define MINOR_TO_UNIT(mynor) (((mynor) >> 16) * CY_MAX_PORTS \
177 | (((mynor) & 0xff) & ~MINOR_MAGIC_MASK))
178#define UNIT_TO_MINOR(unit) (((unit) / CY_MAX_PORTS) << 16 \
179 | (((unit) & 0xff) & ~MINOR_MAGIC_MASK))
180
181/*
182 * com state bits.
183 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
184 * than the other bits so that they can be tested as a group without masking
185 * off the low bits.
186 *
187 * The following com and tty flags correspond closely:
188 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
189 * comstop())
190 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
191 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
192 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
193 * TS_FLUSH is not used.
194 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
195 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
196 */
197#define CS_BUSY 0x80 /* output in progress */
198#define CS_TTGO 0x40 /* output not stopped by XOFF */
199#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
200#define CS_CHECKMSR 1 /* check of MSR scheduled */
201#define CS_CTS_OFLOW 2 /* use CTS output flow control */
202#define CS_DTR_OFF 0x10 /* DTR held off */
203#define CS_ODONE 4 /* output completed */
204#define CS_RTS_IFLOW 8 /* use RTS input flow control */
205#define CSE_ODONE 1 /* output transmitted */
206
207static char const * const error_desc[] = {
208#define CE_OVERRUN 0
209 "silo overflow",
210#define CE_INTERRUPT_BUF_OVERFLOW 1
211 "interrupt-level buffer overflow",
212#define CE_TTY_BUF_OVERFLOW 2
213 "tty-level buffer overflow",
214};
215
216#define CE_NTYPES 3
217#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum])
218
219/* types. XXX - should be elsewhere */
220typedef u_char bool_t; /* boolean */
221typedef u_char volatile *cy_addr;
222
223/* queue of linear buffers */
224struct lbq {
225 u_char *l_head; /* next char to process */
226 u_char *l_tail; /* one past the last char to process */
227 struct lbq *l_next; /* next in queue */
228 bool_t l_queued; /* nonzero if queued */
229};
230
231/* com device structure */
232struct com_s {
233 u_char state; /* miscellaneous flag bits */
234 bool_t active_out; /* nonzero if the callout device is open */
235#if 0
236 u_char cfcr_image; /* copy of value written to CFCR */
237#endif
238 u_char etc; /* pending Embedded Transmit Command */
239 u_char extra_state; /* more flag bits, separate for order trick */
240#if 0
241 u_char fifo_image; /* copy of value written to FIFO */
242#endif
243 u_char gfrcr_image; /* copy of value read from GFRCR */
244#if 0
245 bool_t hasfifo; /* nonzero for 16550 UARTs */
246 bool_t loses_outints; /* nonzero if device loses output interrupts */
247#endif
248 u_char mcr_dtr; /* MCR bit that is wired to DTR */
249 u_char mcr_image; /* copy of value written to MCR */
250 u_char mcr_rts; /* MCR bit that is wired to RTS */
251#if 0
252#ifdef COM_MULTIPORT
253 bool_t multiport; /* is this unit part of a multiport device? */
254#endif /* COM_MULTIPORT */
255 bool_t no_irq; /* nonzero if irq is not attached */
256 bool_t poll; /* nonzero if polling is required */
257 bool_t poll_output; /* nonzero if polling for output is required */
258#endif
259 int unit; /* unit number */
260 int dtr_wait; /* time to hold DTR down on close (* 1/hz) */
ed81d395 261 struct callout dtr_ch;
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262#if 0
263 u_int tx_fifo_size;
264#endif
265 u_int wopeners; /* # processes waiting for DCD in open() */
266
267 /*
268 * The high level of the driver never reads status registers directly
269 * because there would be too many side effects to handle conveniently.
270 * Instead, it reads copies of the registers stored here by the
271 * interrupt handler.
272 */
273 u_char last_modem_status; /* last MSR read by intr handler */
274 u_char prev_modem_status; /* last MSR handled by high level */
275
276 u_char hotchar; /* ldisc-specific char to be handled ASAP */
277 u_char *ibuf; /* start of input buffer */
278 u_char *ibufend; /* end of input buffer */
279 u_char *ibufold; /* old input buffer, to be freed */
280 u_char *ihighwater; /* threshold in input buffer */
281 u_char *iptr; /* next free spot in input buffer */
282 int ibufsize; /* size of ibuf (not include error bytes) */
283 int ierroff; /* offset of error bytes in ibuf */
284
285 struct lbq obufq; /* head of queue of output buffers */
286 struct lbq obufs[2]; /* output buffers */
287
288 int cy_align; /* index for register alignment */
289 cy_addr cy_iobase; /* base address of this port's cyclom */
290 cy_addr iobase; /* base address of this port's cd1400 */
291 int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
292
293 struct tty *tp; /* cross reference */
294
295 /* Initial state. */
296 struct termios it_in; /* should be in struct tty */
297 struct termios it_out;
298
299 /* Lock state. */
300 struct termios lt_in; /* should be in struct tty */
301 struct termios lt_out;
302
303 bool_t do_timestamp;
304 bool_t do_dcd_timestamp;
305 struct timeval timestamp;
306 struct timeval dcd_timestamp;
307
308 u_long bytes_in; /* statistics */
309 u_long bytes_out;
310 u_int delta_error_counts[CE_NTYPES];
311 u_long error_counts[CE_NTYPES];
312
313 u_int recv_exception; /* exception chars received */
314 u_int mdm; /* modem signal changes */
315#ifdef CyDebug
316 u_int start_count; /* no. of calls to comstart() */
317 u_int start_real; /* no. of calls that did something */
318#endif
319 u_char car; /* CD1400 CAR shadow (if first unit in cd) */
320 u_char channel_control;/* CD1400 CCR control command shadow */
321 u_char cor[3]; /* CD1400 COR1-3 shadows */
322 u_char intr_enable; /* CD1400 SRER shadow */
323
324 /*
325 * Data area for output buffers. Someday we should build the output
326 * buffer queue without copying data.
327 */
328 u_char obuf1[256];
329 u_char obuf2[256];
330};
331
332/* PCI driver entry point. */
5ca58d54 333int cyattach_common (cy_addr cy_iobase, int cy_align);
1b51b0fa 334void siointr(void *);
984263bc 335
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336static int cy_units (cy_addr cy_iobase, int cy_align);
337static int sioattach (struct isa_device *dev);
338static void cd1400_channel_cmd (struct com_s *com, int cmd);
339static void cd1400_channel_cmd_wait (struct com_s *com);
340static void cd_etc (struct com_s *com, int etc);
341static int cd_getreg (struct com_s *com, int reg);
342static void cd_setreg (struct com_s *com, int reg, int val);
984263bc 343static timeout_t siodtrwakeup;
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344static void comhardclose (struct com_s *com);
345static void sioinput (struct com_s *com);
984263bc 346#if 0
5ca58d54 347static void siointr1 (struct com_s *com);
984263bc 348#endif
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349static int commctl (struct com_s *com, int bits, int how);
350static int comparam (struct tty *tp, struct termios *t);
7b95be2a 351static inthand2_t siopoll;
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352static int sioprobe (struct isa_device *dev);
353static void siosettimeout (void);
354static int siosetwater (struct com_s *com, speed_t speed);
355static int comspeed (speed_t speed, u_long cy_clock,
356 int *prescaler_io);
357static void comstart (struct tty *tp);
358static void comstop (struct tty *tp, int rw);
984263bc 359static timeout_t comwakeup;
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360static void disc_optim (struct tty *tp, struct termios *t,
361 struct com_s *com);
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362
363#ifdef CyDebug
5ca58d54 364void cystatus (int unit);
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365#endif
366
367static char driver_name[] = "cy";
368
369/* table and macro for fast conversion from a unit number to its com struct */
370static struct com_s *p_com_addr[NSIO];
371#define com_addr(unit) (p_com_addr[unit])
372
373struct isa_driver siodriver = {
374 sioprobe, sioattach, driver_name
375};
376
377static d_open_t sioopen;
378static d_close_t sioclose;
379static d_write_t siowrite;
380static d_ioctl_t sioioctl;
381
382#define CDEV_MAJOR 48
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383static struct dev_ops sio_ops = {
384 { driver_name, CDEV_MAJOR, D_TTY | D_KQFILTER },
385 .d_open = sioopen,
386 .d_close = sioclose,
387 .d_read = ttyread,
388 .d_write = siowrite,
389 .d_ioctl = sioioctl,
390 .d_poll = ttypoll,
391 .d_kqfilter = ttykqfilter
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392};
393
394static int comconsole = -1;
395static speed_t comdefaultrate = TTYDEF_SPEED;
396static u_int com_events; /* input chars + weighted output completions */
397static bool_t sio_registered;
398static int sio_timeout;
399static int sio_timeouts_until_log;
e8b273ff 400static struct callout sio_timeout_handle;
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401#if 0 /* XXX */
402static struct tty *sio_tty[NSIO];
403#else
404static struct tty sio_tty[NSIO];
405#endif
406static const int nsio_tty = NSIO;
407
408#ifdef CyDebug
409static u_int cd_inbs;
410static u_int cy_inbs;
411static u_int cd_outbs;
412static u_int cy_outbs;
413static u_int cy_svrr_probes;
414static u_int cy_timeouts;
415#endif
416
417static int cy_chip_offset[] = {
418 0x0000, 0x0400, 0x0800, 0x0c00, 0x0200, 0x0600, 0x0a00, 0x0e00,
419};
420static int cy_nr_cd1400s[NCY];
421static int cy_total_devices;
422#undef RxFifoThreshold
423static int volatile RxFifoThreshold = (CD1400_RX_FIFO_SIZE / 2);
424
425static int
426sioprobe(dev)
427 struct isa_device *dev;
428{
429 cy_addr iobase;
430
431 iobase = (cy_addr)dev->id_maddr;
432
433 /* Cyclom-16Y hardware reset (Cyclom-8Ys don't care) */
434 cy_inb(iobase, CY16_RESET, 0); /* XXX? */
435 DELAY(500); /* wait for the board to get its act together */
436
437 /* this is needed to get the board out of reset */
438 cy_outb(iobase, CY_CLEAR_INTR, 0, 0);
439 DELAY(500);
440
441 return (cy_units(iobase, 0) == 0 ? 0 : -1);
442}
443
444static int
445cy_units(cy_iobase, cy_align)
446 cy_addr cy_iobase;
447 int cy_align;
448{
449 int cyu;
f15db79e 450 u_char firmware_version = 0; /* assign to avoid warning */
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451 int i;
452 cy_addr iobase;
453
454 for (cyu = 0; cyu < CY_MAX_CD1400s; ++cyu) {
455 iobase = cy_iobase + (cy_chip_offset[cyu] << cy_align);
456
457 /* wait for chip to become ready for new command */
458 for (i = 0; i < 10; i++) {
459 DELAY(50);
460 if (!cd_inb(iobase, CD1400_CCR, cy_align))
461 break;
462 }
463
464 /* clear the GFRCR register */
465 cd_outb(iobase, CD1400_GFRCR, cy_align, 0);
466
467 /* issue a reset command */
468 cd_outb(iobase, CD1400_CCR, cy_align,
469 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
470
471 /* wait for the CD1400 to initialize itself */
472 for (i = 0; i < 200; i++) {
473 DELAY(50);
474
475 /* retrieve firmware version */
476 firmware_version = cd_inb(iobase, CD1400_GFRCR,
477 cy_align);
478 if ((firmware_version & 0xf0) == 0x40)
479 break;
480 }
481
482 /*
483 * Anything in the 0x40-0x4F range is fine.
484 * If one CD1400 is bad then we don't support higher
485 * numbered good ones on this board.
486 */
487 if ((firmware_version & 0xf0) != 0x40)
488 break;
489 }
490 return (cyu);
491}
492
493static int
494sioattach(isdp)
495 struct isa_device *isdp;
496{
497 int adapter;
498
499 adapter = cyattach_common((cy_addr) isdp->id_maddr, 0);
500 if (adapter < 0)
501 return (0);
502
503 /*
504 * XXX
505 * This kludge is to allow ISA/PCI device specifications in the
506 * kernel config file to be in any order.
507 */
508 if (isdp->id_unit != adapter) {
509 printf("cy%d: attached as cy%d\n", isdp->id_unit, adapter);
510 isdp->id_unit = adapter; /* XXX */
511 }
1b51b0fa 512 isdp->id_intr = (inthand2_t *)siointr;
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513 /* isdp->id_ri_flags |= RI_FAST; XXX unimplemented - use newbus! */
514 return (1);
515}
516
517int
518cyattach_common(cy_iobase, cy_align)
519 cy_addr cy_iobase;
520 int cy_align;
521{
522 int adapter;
523 int cyu;
524 u_char firmware_version;
525 cy_addr iobase;
526 int minorbase;
527 int ncyu;
528 int unit;
529
530 adapter = cy_total_devices;
531 if ((u_int)adapter >= NCY) {
532 printf(
533 "cy%d: can't attach adapter: insufficient cy devices configured\n",
534 adapter);
535 return (-1);
536 }
537 ncyu = cy_units(cy_iobase, cy_align);
538 if (ncyu == 0)
539 return (-1);
540 cy_nr_cd1400s[adapter] = ncyu;
541 cy_total_devices++;
542
543 unit = adapter * CY_MAX_PORTS;
544 for (cyu = 0; cyu < ncyu; ++cyu) {
545 int cdu;
546
547 iobase = (cy_addr) (cy_iobase
548 + (cy_chip_offset[cyu] << cy_align));
549 firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
550
551 /* Set up a receive timeout period of than 1+ ms. */
552 cd_outb(iobase, CD1400_PPR, cy_align,
553 howmany(CY_CLOCK(firmware_version)
554 / CD1400_PPR_PRESCALER, 1000));
555
556 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
557 struct com_s *com;
984263bc 558
efda3bd0 559 com = kmalloc(sizeof *com, M_DEVBUF, M_WAITOK | M_ZERO);
984263bc 560 com->unit = unit;
ed81d395 561 callout_init(&com->dtr_ch);
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562 com->gfrcr_image = firmware_version;
563 if (CY_RTS_DTR_SWAPPED(firmware_version)) {
564 com->mcr_dtr = MCR_RTS;
565 com->mcr_rts = MCR_DTR;
566 com->mcr_rts_reg = CD1400_MSVR2;
567 } else {
568 com->mcr_dtr = MCR_DTR;
569 com->mcr_rts = MCR_RTS;
570 com->mcr_rts_reg = CD1400_MSVR1;
571 }
572 com->dtr_wait = 3 * hz;
573 com->obufs[0].l_head = com->obuf1;
574 com->obufs[1].l_head = com->obuf2;
575
576 com->cy_align = cy_align;
577 com->cy_iobase = cy_iobase;
578 com->iobase = iobase;
579 com->car = ~CD1400_CAR_CHAN;
580
581 /*
582 * We don't use all the flags from <sys/ttydefaults.h> since they
583 * are only relevant for logins. It's important to have echo off
584 * initially so that the line doesn't start blathering before the
585 * echo flag can be turned off.
586 */
587 com->it_in.c_iflag = 0;
588 com->it_in.c_oflag = 0;
589 com->it_in.c_cflag = TTYDEF_CFLAG;
590 com->it_in.c_lflag = 0;
591 if (unit == comconsole) {
592 com->it_in.c_iflag = TTYDEF_IFLAG;
593 com->it_in.c_oflag = TTYDEF_OFLAG;
594 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
595 com->it_in.c_lflag = TTYDEF_LFLAG;
596 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
597 }
598 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
599 enable_intr();
efda3bd0 600 kfree(com, M_DEVBUF);
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601 return (0);
602 }
603 enable_intr();
604 termioschars(&com->it_in);
605 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
606 com->it_out = com->it_in;
607
8d77660e 608 crit_enter();
984263bc 609 com_addr(unit) = com;
8d77660e 610 crit_exit();
984263bc
MD
611
612 if (!sio_registered) {
e8b273ff 613 callout_init(&sio_timeout_handle);
477d3c1c 614 register_swi(SWI_TTY, siopoll, NULL, "cy", NULL);
984263bc
MD
615 sio_registered = TRUE;
616 }
617 minorbase = UNIT_TO_MINOR(unit);
fef8985e
MD
618 dev_ops_add(&sio_ops, UNIT_TO_MINOR(-1), minorbase);
619 make_dev(&sio_ops, minorbase,
984263bc
MD
620 UID_ROOT, GID_WHEEL, 0600, "ttyc%r%r", adapter,
621 unit % CY_MAX_PORTS);
fef8985e 622 make_dev(&sio_ops, minorbase | CONTROL_INIT_STATE,
984263bc
MD
623 UID_ROOT, GID_WHEEL, 0600, "ttyic%r%r", adapter,
624 unit % CY_MAX_PORTS);
fef8985e 625 make_dev(&sio_ops, minorbase | CONTROL_LOCK_STATE,
984263bc
MD
626 UID_ROOT, GID_WHEEL, 0600, "ttylc%r%r", adapter,
627 unit % CY_MAX_PORTS);
fef8985e 628 make_dev(&sio_ops, minorbase | CALLOUT_MASK,
984263bc
MD
629 UID_UUCP, GID_DIALER, 0660, "cuac%r%r", adapter,
630 unit % CY_MAX_PORTS);
fef8985e 631 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
984263bc
MD
632 UID_UUCP, GID_DIALER, 0660, "cuaic%r%r", adapter,
633 unit % CY_MAX_PORTS);
fef8985e 634 make_dev(&sio_ops, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
984263bc
MD
635 UID_UUCP, GID_DIALER, 0660, "cualc%r%r", adapter,
636 unit % CY_MAX_PORTS);
ed81d395
MD
637
638 /* for(cdu...), for(cyu...) terminating blocks */
984263bc
MD
639 }
640 }
641
642 /* ensure an edge for the next interrupt */
643 cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
644
645 return (adapter);
646}
647
648static int
fef8985e 649sioopen(struct dev_open_args *ap)
984263bc 650{
b13267a5 651 cdev_t dev = ap->a_head.a_dev;
984263bc
MD
652 struct com_s *com;
653 int error;
654 int mynor;
984263bc
MD
655 struct tty *tp;
656 int unit;
657
658 mynor = minor(dev);
659 unit = MINOR_TO_UNIT(mynor);
660 if ((u_int) unit >= NSIO || (com = com_addr(unit)) == NULL)
661 return (ENXIO);
662 if (mynor & CONTROL_MASK)
663 return (0);
664#if 0 /* XXX */
665 tp = com->tp = sio_tty[unit] = ttymalloc(sio_tty[unit]);
666#else
667 tp = com->tp = &sio_tty[unit];
668#endif
669 dev->si_tty = tp;
8d77660e 670 crit_enter();
984263bc
MD
671 /*
672 * We jump to this label after all non-interrupted sleeps to pick
673 * up any changes of the device state.
674 */
675open_top:
676 while (com->state & CS_DTR_OFF) {
377d4740 677 error = tsleep(&com->dtr_wait, PCATCH, "cydtr", 0);
984263bc
MD
678 if (error != 0)
679 goto out;
680 }
681 if (tp->t_state & TS_ISOPEN) {
682 /*
683 * The device is open, so everything has been initialized.
684 * Handle conflicts.
685 */
686 if (mynor & CALLOUT_MASK) {
687 if (!com->active_out) {
688 error = EBUSY;
689 goto out;
690 }
691 } else {
692 if (com->active_out) {
fef8985e 693 if (ap->a_oflags & O_NONBLOCK) {
984263bc
MD
694 error = EBUSY;
695 goto out;
696 }
697 error = tsleep(&com->active_out,
377d4740 698 PCATCH, "cybi", 0);
984263bc
MD
699 if (error != 0)
700 goto out;
701 goto open_top;
702 }
703 }
704 if (tp->t_state & TS_XCLUDE &&
fef8985e 705 suser_cred(ap->a_cred, 0)) {
984263bc
MD
706 error = EBUSY;
707 goto out;
708 }
709 } else {
710 /*
711 * The device isn't open, so there are no conflicts.
712 * Initialize it. Initialization is done twice in many
713 * cases: to preempt sleeping callin opens if we are
714 * callout, and to complete a callin open after DCD rises.
715 */
716 tp->t_oproc = comstart;
717 tp->t_stop = comstop;
718 tp->t_param = comparam;
719 tp->t_dev = dev;
720 tp->t_termios = mynor & CALLOUT_MASK
721 ? com->it_out : com->it_in;
722
723 /* Encode per-board unit in LIVR for access in intr routines. */
724 cd_setreg(com, CD1400_LIVR,
725 (unit & CD1400_xIVR_CHAN) << CD1400_xIVR_CHAN_SHIFT);
726
727 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
728#if 0
729 com->poll = com->no_irq;
730 com->poll_output = com->loses_outints;
731#endif
732 ++com->wopeners;
733 error = comparam(tp, &tp->t_termios);
734 --com->wopeners;
735 if (error != 0)
736 goto out;
737#if 0
738 if (com->hasfifo) {
739 /*
740 * (Re)enable and flush fifos.
741 *
742 * Certain SMC chips cause problems if the fifos
743 * are enabled while input is ready. Turn off the
744 * fifo if necessary to clear the input. We test
745 * the input ready bit after enabling the fifos
746 * since we've already enabled them in comparam()
747 * and to handle races between enabling and fresh
748 * input.
749 */
750 while (TRUE) {
751 outb(iobase + com_fifo,
752 FIFO_RCV_RST | FIFO_XMT_RST
753 | com->fifo_image);
754 DELAY(100);
755 if (!(inb(com->line_status_port) & LSR_RXRDY))
756 break;
757 outb(iobase + com_fifo, 0);
758 DELAY(100);
759 (void) inb(com->data_port);
760 }
761 }
762
763 disable_intr();
764 (void) inb(com->line_status_port);
765 (void) inb(com->data_port);
766 com->prev_modem_status = com->last_modem_status
767 = inb(com->modem_status_port);
768 outb(iobase + com_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS
769 | IER_EMSC);
770 enable_intr();
771#else /* !0 */
772 /*
773 * Flush fifos. This requires a full channel reset which
774 * also disables the transmitter and receiver. Recover
775 * from this.
776 */
777 cd1400_channel_cmd(com,
778 CD1400_CCR_CMDRESET | CD1400_CCR_CHANRESET);
779 cd1400_channel_cmd(com, com->channel_control);
780
781 disable_intr();
782 com->prev_modem_status = com->last_modem_status
783 = cd_getreg(com, CD1400_MSVR2);
784 cd_setreg(com, CD1400_SRER,
785 com->intr_enable
786 = CD1400_SRER_MDMCH | CD1400_SRER_RXDATA);
787 enable_intr();
788#endif /* 0 */
789 /*
790 * Handle initial DCD. Callout devices get a fake initial
791 * DCD (trapdoor DCD). If we are callout, then any sleeping
792 * callin opens get woken up and resume sleeping on "cybi"
793 * instead of "cydcd".
794 */
795 /*
796 * XXX `mynor & CALLOUT_MASK' should be
797 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
798 * TRAPDOOR_CARRIER is the default initial state for callout
799 * devices and SOFT_CARRIER is like CLOCAL except it hides
800 * the true carrier.
801 */
802 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
803 (*linesw[tp->t_line].l_modem)(tp, 1);
804 }
805 /*
806 * Wait for DCD if necessary.
807 */
808 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
fef8985e 809 && !(tp->t_cflag & CLOCAL) && !(ap->a_oflags & O_NONBLOCK)) {
984263bc 810 ++com->wopeners;
377d4740 811 error = tsleep(TSA_CARR_ON(tp), PCATCH, "cydcd", 0);
984263bc
MD
812 --com->wopeners;
813 if (error != 0)
814 goto out;
815 goto open_top;
816 }
817 error = (*linesw[tp->t_line].l_open)(dev, tp);
818 disc_optim(tp, &tp->t_termios, com);
819 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
820 com->active_out = TRUE;
821 siosettimeout();
822out:
8d77660e 823 crit_exit();
984263bc
MD
824 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
825 comhardclose(com);
826 return (error);
827}
828
829static int
fef8985e 830sioclose(struct dev_close_args *ap)
984263bc 831{
b13267a5 832 cdev_t dev = ap->a_head.a_dev;
984263bc
MD
833 struct com_s *com;
834 int mynor;
984263bc
MD
835 struct tty *tp;
836
837 mynor = minor(dev);
838 if (mynor & CONTROL_MASK)
839 return (0);
840 com = com_addr(MINOR_TO_UNIT(mynor));
841 tp = com->tp;
8d77660e 842 crit_enter();
984263bc 843 cd_etc(com, CD1400_ETC_STOPBREAK);
fef8985e 844 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
984263bc
MD
845 disc_optim(tp, &tp->t_termios, com);
846 comstop(tp, FREAD | FWRITE);
847 comhardclose(com);
848 ttyclose(tp);
849 siosettimeout();
8d77660e 850 crit_exit();
984263bc
MD
851#ifdef broken /* session holds a ref to the tty; can't deallocate */
852 ttyfree(tp);
853 com->tp = sio_tty[unit] = NULL;
854#endif
855 return (0);
856}
857
858static void
859comhardclose(com)
860 struct com_s *com;
861{
862 cy_addr iobase;
984263bc
MD
863 struct tty *tp;
864 int unit;
865
866 unit = com->unit;
867 iobase = com->iobase;
8d77660e 868 crit_enter();
984263bc
MD
869#if 0
870 com->poll = FALSE;
871 com->poll_output = FALSE;
872#endif
873 com->do_timestamp = 0;
874#if 0
875 outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
876#else
877 /* XXX */
878 disable_intr();
879 com->etc = ETC_NONE;
880 cd_setreg(com, CD1400_COR2, com->cor[1] &= ~CD1400_COR2_ETC);
881 enable_intr();
882 cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
883#endif
884
885 {
886#if 0
887 outb(iobase + com_ier, 0);
888#else
889 disable_intr();
890 cd_setreg(com, CD1400_SRER, com->intr_enable = 0);
891 enable_intr();
892#endif
893 tp = com->tp;
894 if ((tp->t_cflag & HUPCL)
895 /*
896 * XXX we will miss any carrier drop between here and the
897 * next open. Perhaps we should watch DCD even when the
898 * port is closed; it is not sufficient to check it at
899 * the next open because it might go up and down while
900 * we're not watching.
901 */
902 || (!com->active_out
903 && !(com->prev_modem_status & MSR_DCD)
904 && !(com->it_in.c_cflag & CLOCAL))
905 || !(tp->t_state & TS_ISOPEN)) {
906 (void)commctl(com, TIOCM_DTR, DMBIC);
907
908 /* Disable receiver (leave transmitter enabled). */
909 com->channel_control = CD1400_CCR_CMDCHANCTL
910 | CD1400_CCR_XMTEN
911 | CD1400_CCR_RCVDIS;
912 cd1400_channel_cmd(com, com->channel_control);
913
914 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
ed81d395
MD
915 callout_reset(&com->dtr_ch, com->dtr_wait,
916 siodtrwakeup, com);
984263bc
MD
917 com->state |= CS_DTR_OFF;
918 }
919 }
920 }
921#if 0
922 if (com->hasfifo) {
923 /*
924 * Disable fifos so that they are off after controlled
925 * reboots. Some BIOSes fail to detect 16550s when the
926 * fifos are enabled.
927 */
928 outb(iobase + com_fifo, 0);
929 }
930#endif
931 com->active_out = FALSE;
932 wakeup(&com->active_out);
933 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
8d77660e 934 crit_exit();
984263bc
MD
935}
936
937static int
fef8985e 938siowrite(struct dev_write_args *ap)
984263bc 939{
b13267a5 940 cdev_t dev = ap->a_head.a_dev;
fef8985e 941 struct uio *uio = ap->a_uio;
984263bc
MD
942 int mynor;
943 struct tty *tp;
944 int unit;
945
946 mynor = minor(dev);
947 if (mynor & CONTROL_MASK)
948 return (ENODEV);
949
950 unit = MINOR_TO_UNIT(mynor);
951 tp = com_addr(unit)->tp;
952 /*
953 * (XXX) We disallow virtual consoles if the physical console is
954 * a serial port. This is in case there is a display attached that
955 * is not the console. In that situation we don't need/want the X
956 * server taking over the console.
957 */
958 if (constty != NULL && unit == comconsole)
959 constty = NULL;
960#ifdef Smarts
961 /* XXX duplicate ttwrite(), but without so much output processing on
962 * CR & LF chars. Hardly worth the effort, given that high-throughput
963 * sessions are raw anyhow.
964 */
965#else
fef8985e 966 return ((*linesw[tp->t_line].l_write)(tp, uio, ap->a_ioflag));
984263bc
MD
967#endif
968}
969
970static void
971siodtrwakeup(chan)
972 void *chan;
973{
974 struct com_s *com;
975
976 com = (struct com_s *)chan;
977 com->state &= ~CS_DTR_OFF;
978 wakeup(&com->dtr_wait);
979}
980
981static void
982sioinput(com)
983 struct com_s *com;
984{
985 u_char *buf;
986 int incc;
987 u_char line_status;
988 int recv_data;
989 struct tty *tp;
990
991 buf = com->ibuf;
992 tp = com->tp;
993 if (!(tp->t_state & TS_ISOPEN)) {
994 com_events -= (com->iptr - com->ibuf);
995 com->iptr = com->ibuf;
996 return;
997 }
998 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
999 /*
1000 * Avoid the grotesquely inefficient lineswitch routine
1001 * (ttyinput) in "raw" mode. It usually takes about 450
1002 * instructions (that's without canonical processing or echo!).
1003 * slinput is reasonably fast (usually 40 instructions plus
1004 * call overhead).
1005 */
1006 do {
1007 enable_intr();
1008 incc = com->iptr - buf;
1009 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1010 && (com->state & CS_RTS_IFLOW
1011 || tp->t_iflag & IXOFF)
1012 && !(tp->t_state & TS_TBLOCK))
1013 ttyblock(tp);
1014 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1015 += b_to_q((char *)buf, incc, &tp->t_rawq);
1016 buf += incc;
1017 tk_nin += incc;
1018 tk_rawcc += incc;
1019 tp->t_rawcc += incc;
1020 ttwakeup(tp);
1021 if (tp->t_state & TS_TTSTOP
1022 && (tp->t_iflag & IXANY
1023 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1024 tp->t_state &= ~TS_TTSTOP;
1025 tp->t_lflag &= ~FLUSHO;
1026 comstart(tp);
1027 }
1028 disable_intr();
1029 } while (buf < com->iptr);
1030 } else {
1031 do {
1032 enable_intr();
1033 line_status = buf[com->ierroff];
1034 recv_data = *buf++;
1035 if (line_status
1036 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1037 if (line_status & LSR_BI)
1038 recv_data |= TTY_BI;
1039 if (line_status & LSR_FE)
1040 recv_data |= TTY_FE;
1041 if (line_status & LSR_OE)
1042 recv_data |= TTY_OE;
1043 if (line_status & LSR_PE)
1044 recv_data |= TTY_PE;
1045 }
1046 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1047 disable_intr();
1048 } while (buf < com->iptr);
1049 }
1050 com_events -= (com->iptr - com->ibuf);
1051 com->iptr = com->ibuf;
1052
1053 /*
1054 * There is now room for another low-level buffer full of input,
1055 * so enable RTS if it is now disabled and there is room in the
1056 * high-level buffer.
1057 */
1058 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & com->mcr_rts) &&
1059 !(tp->t_state & TS_TBLOCK))
1060#if 0
1061 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1062#else
1063 cd_setreg(com, com->mcr_rts_reg,
1064 com->mcr_image |= com->mcr_rts);
1065#endif
1066}
1067
1068void
477d3c1c 1069siointr(void *arg)
984263bc 1070{
477d3c1c 1071 int unit = (int)arg;
984263bc
MD
1072 int baseu;
1073 int cy_align;
1074 cy_addr cy_iobase;
1075 int cyu;
1076 cy_addr iobase;
1077 u_char status;
1078
7b95be2a 1079 com_lock(); /* XXX could this be placed down lower in the loop? */
984263bc
MD
1080
1081 baseu = unit * CY_MAX_PORTS;
1082 cy_align = com_addr(baseu)->cy_align;
1083 cy_iobase = com_addr(baseu)->cy_iobase;
1084
1085 /* check each CD1400 in turn */
1086 for (cyu = 0; cyu < cy_nr_cd1400s[unit]; ++cyu) {
1087 iobase = (cy_addr) (cy_iobase
1088 + (cy_chip_offset[cyu] << cy_align));
1089 /* poll to see if it has any work */
1090 status = cd_inb(iobase, CD1400_SVRR, cy_align);
1091 if (status == 0)
1092 continue;
1093#ifdef CyDebug
1094 ++cy_svrr_probes;
1095#endif
1096 /* service requests as appropriate, giving priority to RX */
1097 if (status & CD1400_SVRR_RXRDY) {
1098 struct com_s *com;
1099 u_int count;
1100 u_char *ioptr;
1101 u_char line_status;
1102 u_char recv_data;
1103 u_char serv_type;
1104#ifdef PollMode
1105 u_char save_rir;
1106#endif
1107
1108#ifdef PollMode
1109 save_rir = cd_inb(iobase, CD1400_RIR, cy_align);
1110
1111 /* enter rx service */
1112 cd_outb(iobase, CD1400_CAR, cy_align, save_rir);
1113 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1114 = save_rir & CD1400_CAR_CHAN;
1115
1116 serv_type = cd_inb(iobase, CD1400_RIVR, cy_align);
1117 com = com_addr(baseu
1118 + ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
1119 & CD1400_xIVR_CHAN));
1120#else
1121 /* ack receive service */
1122 serv_type = cy_inb(iobase, CY8_SVCACKR, cy_align);
1123
1124 com = com_addr(baseu +
1125 + ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
1126 & CD1400_xIVR_CHAN));
1127#endif
1128
1129 if (serv_type & CD1400_RIVR_EXCEPTION) {
1130 ++com->recv_exception;
1131 line_status = cd_inb(iobase, CD1400_RDSR, cy_align);
1132 /* break/unnattached error bits or real input? */
1133 recv_data = cd_inb(iobase, CD1400_RDSR, cy_align);
1134#ifndef SOFT_HOTCHAR
1135 if (line_status & CD1400_RDSR_SPECIAL
1136 && com->hotchar != 0)
1137 setsofttty();
1138#endif
1139#if 1 /* XXX "intelligent" PFO error handling would break O error handling */
1140 if (line_status & (LSR_PE|LSR_FE|LSR_BI)) {
1141 /*
1142 Don't store PE if IGNPAR and BI if IGNBRK,
1143 this hack allows "raw" tty optimization
1144 works even if IGN* is set.
1145 */
1146 if ( com->tp == NULL
1147 || !(com->tp->t_state & TS_ISOPEN)
1148 || ((line_status & (LSR_PE|LSR_FE))
1149 && (com->tp->t_iflag & IGNPAR))
1150 || ((line_status & LSR_BI)
1151 && (com->tp->t_iflag & IGNBRK)))
1152 goto cont;
1153 if ( (line_status & (LSR_PE|LSR_FE))
1154 && (com->tp->t_state & TS_CAN_BYPASS_L_RINT)
1155 && ((line_status & LSR_FE)
1156 || ((line_status & LSR_PE)
1157 && (com->tp->t_iflag & INPCK))))
1158 recv_data = 0;
1159 }
1160#endif /* 1 */
1161 ++com->bytes_in;
1162#ifdef SOFT_HOTCHAR
1163 if (com->hotchar != 0 && recv_data == com->hotchar)
1164 setsofttty();
1165#endif
1166 ioptr = com->iptr;
1167 if (ioptr >= com->ibufend)
1168 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1169 else {
1170 if (com->do_timestamp)
1171 microtime(&com->timestamp);
1172 ++com_events;
1173 ioptr[0] = recv_data;
1174 ioptr[com->ierroff] = line_status;
1175 com->iptr = ++ioptr;
1176 if (ioptr == com->ihighwater
1177 && com->state & CS_RTS_IFLOW)
1178#if 0
1179 outb(com->modem_ctl_port,
1180 com->mcr_image &= ~MCR_RTS);
1181#else
1182 cd_outb(iobase, com->mcr_rts_reg,
1183 cy_align,
1184 com->mcr_image &=
1185 ~com->mcr_rts);
1186#endif
1187 if (line_status & LSR_OE)
1188 CE_RECORD(com, CE_OVERRUN);
1189 }
1190 goto cont;
1191 } else {
1192 int ifree;
1193
1194 count = cd_inb(iobase, CD1400_RDCR, cy_align);
1195 if (!count)
1196 goto cont;
1197 com->bytes_in += count;
1198 ioptr = com->iptr;
1199 ifree = com->ibufend - ioptr;
1200 if (count > ifree) {
1201 count -= ifree;
1202 com_events += ifree;
1203 if (ifree != 0) {
1204 if (com->do_timestamp)
1205 microtime(&com->timestamp);
1206 do {
1207 recv_data = cd_inb(iobase,
1208 CD1400_RDSR,
1209 cy_align);
1210#ifdef SOFT_HOTCHAR
1211 if (com->hotchar != 0
1212 && recv_data
1213 == com->hotchar)
1214 setsofttty();
1215#endif
1216 ioptr[0] = recv_data;
1217 ioptr[com->ierroff] = 0;
1218 ++ioptr;
1219 } while (--ifree != 0);
1220 }
1221 com->delta_error_counts
1222 [CE_INTERRUPT_BUF_OVERFLOW] += count;
1223 do {
1224 recv_data = cd_inb(iobase, CD1400_RDSR,
1225 cy_align);
1226#ifdef SOFT_HOTCHAR
1227 if (com->hotchar != 0
1228 && recv_data == com->hotchar)
1229 setsofttty();
1230#endif
1231 } while (--count != 0);
1232 } else {
1233 if (com->do_timestamp)
1234 microtime(&com->timestamp);
1235 if (ioptr <= com->ihighwater
1236 && ioptr + count > com->ihighwater
1237 && com->state & CS_RTS_IFLOW)
1238#if 0
1239 outb(com->modem_ctl_port,
1240 com->mcr_image &= ~MCR_RTS);
1241#else
1242 cd_outb(iobase, com->mcr_rts_reg,
1243 cy_align,
1244 com->mcr_image
1245 &= ~com->mcr_rts);
1246#endif
1247 com_events += count;
1248 do {
1249 recv_data = cd_inb(iobase, CD1400_RDSR,
1250 cy_align);
1251#ifdef SOFT_HOTCHAR
1252 if (com->hotchar != 0
1253 && recv_data == com->hotchar)
1254 setsofttty();
1255#endif
1256 ioptr[0] = recv_data;
1257 ioptr[com->ierroff] = 0;
1258 ++ioptr;
1259 } while (--count != 0);
1260 }
1261 com->iptr = ioptr;
1262 }
1263cont:
1264
1265 /* terminate service context */
1266#ifdef PollMode
1267 cd_outb(iobase, CD1400_RIR, cy_align,
1268 save_rir
1269 & ~(CD1400_RIR_RDIREQ | CD1400_RIR_RBUSY));
1270#else
1271 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1272#endif
1273 }
1274 if (status & CD1400_SVRR_MDMCH) {
1275 struct com_s *com;
1276 u_char modem_status;
1277#ifdef PollMode
1278 u_char save_mir;
1279#else
1280 u_char vector;
1281#endif
1282
1283#ifdef PollMode
1284 save_mir = cd_inb(iobase, CD1400_MIR, cy_align);
1285
1286 /* enter modem service */
1287 cd_outb(iobase, CD1400_CAR, cy_align, save_mir);
1288 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1289 = save_mir & CD1400_CAR_CHAN;
1290
1291 com = com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS
1292 + (save_mir & CD1400_MIR_CHAN));
1293#else
1294 /* ack modem service */
1295 vector = cy_inb(iobase, CY8_SVCACKM, cy_align);
1296
1297 com = com_addr(baseu
1298 + ((vector >> CD1400_xIVR_CHAN_SHIFT)
1299 & CD1400_xIVR_CHAN));
1300#endif
1301 ++com->mdm;
1302 modem_status = cd_inb(iobase, CD1400_MSVR2, cy_align);
1303 if (modem_status != com->last_modem_status) {
1304 if (com->do_dcd_timestamp
1305 && !(com->last_modem_status & MSR_DCD)
1306 && modem_status & MSR_DCD)
1307 microtime(&com->dcd_timestamp);
1308
1309 /*
1310 * Schedule high level to handle DCD changes. Note
1311 * that we don't use the delta bits anywhere. Some
1312 * UARTs mess them up, and it's easy to remember the
1313 * previous bits and calculate the delta.
1314 */
1315 com->last_modem_status = modem_status;
1316 if (!(com->state & CS_CHECKMSR)) {
1317 com_events += LOTS_OF_EVENTS;
1318 com->state |= CS_CHECKMSR;
1319 setsofttty();
1320 }
1321
1322#ifdef SOFT_CTS_OFLOW
1323 /* handle CTS change immediately for crisp flow ctl */
1324 if (com->state & CS_CTS_OFLOW) {
1325 if (modem_status & MSR_CTS) {
1326 com->state |= CS_ODEVREADY;
1327 if (com->state >= (CS_BUSY | CS_TTGO
1328 | CS_ODEVREADY)
1329 && !(com->intr_enable
1330 & CD1400_SRER_TXRDY))
1331 cd_outb(iobase, CD1400_SRER,
1332 cy_align,
1333 com->intr_enable
1334 = com->intr_enable
1335 & ~CD1400_SRER_TXMPTY
1336 | CD1400_SRER_TXRDY);
1337 } else {
1338 com->state &= ~CS_ODEVREADY;
1339 if (com->intr_enable
1340 & CD1400_SRER_TXRDY)
1341 cd_outb(iobase, CD1400_SRER,
1342 cy_align,
1343 com->intr_enable
1344 = com->intr_enable
1345 & ~CD1400_SRER_TXRDY
1346 | CD1400_SRER_TXMPTY);
1347 }
1348 }
1349#endif
1350 }
1351
1352 /* terminate service context */
1353#ifdef PollMode
1354 cd_outb(iobase, CD1400_MIR, cy_align,
1355 save_mir
1356 & ~(CD1400_MIR_RDIREQ | CD1400_MIR_RBUSY));
1357#else
1358 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1359#endif
1360 }
1361 if (status & CD1400_SVRR_TXRDY) {
1362 struct com_s *com;
1363#ifdef PollMode
1364 u_char save_tir;
1365#else
1366 u_char vector;
1367#endif
1368
1369#ifdef PollMode
1370 save_tir = cd_inb(iobase, CD1400_TIR, cy_align);
1371
1372 /* enter tx service */
1373 cd_outb(iobase, CD1400_CAR, cy_align, save_tir);
1374 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1375 = save_tir & CD1400_CAR_CHAN;
1376
1377 com = com_addr(baseu
1378 + cyu * CD1400_NO_OF_CHANNELS
1379 + (save_tir & CD1400_TIR_CHAN));
1380#else
1381 /* ack transmit service */
1382 vector = cy_inb(iobase, CY8_SVCACKT, cy_align);
1383
1384 com = com_addr(baseu
1385 + ((vector >> CD1400_xIVR_CHAN_SHIFT)
1386 & CD1400_xIVR_CHAN));
1387#endif
1388
1389 if (com->etc != ETC_NONE) {
1390 if (com->intr_enable & CD1400_SRER_TXRDY) {
1391 /*
1392 * Here due to sloppy SRER_TXRDY
1393 * enabling. Ignore. Come back when
1394 * tx is empty.
1395 */
1396 cd_outb(iobase, CD1400_SRER, cy_align,
1397 com->intr_enable
1398 = (com->intr_enable
1399 & ~CD1400_SRER_TXRDY)
1400 | CD1400_SRER_TXMPTY);
1401 goto terminate_tx_service;
1402 }
1403 switch (com->etc) {
1404 case CD1400_ETC_SENDBREAK:
1405 case CD1400_ETC_STOPBREAK:
1406 /*
1407 * Start the command. Come back on
1408 * next tx empty interrupt, hopefully
1409 * after command has been executed.
1410 */
1411 cd_outb(iobase, CD1400_COR2, cy_align,
1412 com->cor[1] |= CD1400_COR2_ETC);
1413 cd_outb(iobase, CD1400_TDR, cy_align,
1414 CD1400_ETC_CMD);
1415 cd_outb(iobase, CD1400_TDR, cy_align,
1416 com->etc);
1417 if (com->etc == CD1400_ETC_SENDBREAK)
1418 com->etc = ETC_BREAK_STARTING;
1419 else
1420 com->etc = ETC_BREAK_ENDING;
1421 goto terminate_tx_service;
1422 case ETC_BREAK_STARTING:
1423 /*
1424 * BREAK is now on. Continue with
1425 * SRER_TXMPTY processing, hopefully
1426 * don't come back.
1427 */
1428 com->etc = ETC_BREAK_STARTED;
1429 break;
1430 case ETC_BREAK_STARTED:
1431 /*
1432 * Came back due to sloppy SRER_TXMPTY
1433 * enabling. Hope again.
1434 */
1435 break;
1436 case ETC_BREAK_ENDING:
1437 /*
1438 * BREAK is now off. Continue with
1439 * SRER_TXMPTY processing and don't
1440 * come back. The SWI handler will
1441 * restart tx interrupts if necessary.
1442 */
1443 cd_outb(iobase, CD1400_COR2, cy_align,
1444 com->cor[1]
1445 &= ~CD1400_COR2_ETC);
1446 com->etc = ETC_BREAK_ENDED;
1447 if (!(com->state & CS_ODONE)) {
1448 com_events += LOTS_OF_EVENTS;
1449 com->state |= CS_ODONE;
1450 setsofttty();
1451 }
1452 break;
1453 case ETC_BREAK_ENDED:
1454 /*
1455 * Shouldn't get here. Hope again.
1456 */
1457 break;
1458 }
1459 }
1460 if (com->intr_enable & CD1400_SRER_TXMPTY) {
1461 if (!(com->extra_state & CSE_ODONE)) {
1462 com_events += LOTS_OF_EVENTS;
1463 com->extra_state |= CSE_ODONE;
1464 setsofttty();
1465 }
1466 cd_outb(iobase, CD1400_SRER, cy_align,
1467 com->intr_enable
1468 &= ~CD1400_SRER_TXMPTY);
1469 goto terminate_tx_service;
1470 }
1471 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1472 u_char *ioptr;
1473 u_int ocount;
1474
1475 ioptr = com->obufq.l_head;
1476 ocount = com->obufq.l_tail - ioptr;
1477 if (ocount > CD1400_TX_FIFO_SIZE)
1478 ocount = CD1400_TX_FIFO_SIZE;
1479 com->bytes_out += ocount;
1480 do
1481 cd_outb(iobase, CD1400_TDR, cy_align,
1482 *ioptr++);
1483 while (--ocount != 0);
1484 com->obufq.l_head = ioptr;
1485 if (ioptr >= com->obufq.l_tail) {
1486 struct lbq *qp;
1487
1488 qp = com->obufq.l_next;
1489 qp->l_queued = FALSE;
1490 qp = qp->l_next;
1491 if (qp != NULL) {
1492 com->obufq.l_head = qp->l_head;
1493 com->obufq.l_tail = qp->l_tail;
1494 com->obufq.l_next = qp;
1495 } else {
1496 /* output just completed */
1497 com->state &= ~CS_BUSY;
1498
1499 /*
1500 * The setting of CSE_ODONE may be
1501 * stale here. We currently only
1502 * use it when CS_BUSY is set, and
1503 * fixing it when we clear CS_BUSY
1504 * is easiest.
1505 */
1506 if (com->extra_state & CSE_ODONE) {
1507 com_events -= LOTS_OF_EVENTS;
1508 com->extra_state &= ~CSE_ODONE;
1509 }
1510
1511 cd_outb(iobase, CD1400_SRER, cy_align,
1512 com->intr_enable
1513 = (com->intr_enable
1514 & ~CD1400_SRER_TXRDY)
1515 | CD1400_SRER_TXMPTY);
1516 }
1517 if (!(com->state & CS_ODONE)) {
1518 com_events += LOTS_OF_EVENTS;
1519 com->state |= CS_ODONE;
1520
1521 /* handle at high level ASAP */
1522 setsofttty();
1523 }
1524 }
1525 }
1526
1527 /* terminate service context */
1528terminate_tx_service:
1529#ifdef PollMode
1530 cd_outb(iobase, CD1400_TIR, cy_align,
1531 save_tir
1532 & ~(CD1400_TIR_RDIREQ | CD1400_TIR_RBUSY));
1533#else
1534 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1535#endif
1536 }
1537 }
1538
1539 /* ensure an edge for the next interrupt */
1540 cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
1541
1542 schedsofttty();
1543
7b95be2a 1544 com_unlock();
984263bc
MD
1545}
1546
1547#if 0
1548static void
1549siointr1(com)
1550 struct com_s *com;
1551{
1552}
1553#endif
1554
1555static int
fef8985e 1556sioioctl(struct dev_ioctl_args *ap)
984263bc 1557{
b13267a5 1558 cdev_t dev = ap->a_head.a_dev;
fef8985e
MD
1559 caddr_t data = ap->a_data;
1560 u_long cmd = ap->a_cmd;
984263bc
MD
1561 struct com_s *com;
1562 int error;
1563 int mynor;
984263bc
MD
1564 struct tty *tp;
1565#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1566 int oldcmd;
1567 struct termios term;
1568#endif
1569
1570 mynor = minor(dev);
1571 com = com_addr(MINOR_TO_UNIT(mynor));
1572 if (mynor & CONTROL_MASK) {
1573 struct termios *ct;
1574
1575 switch (mynor & CONTROL_MASK) {
1576 case CONTROL_INIT_STATE:
1577 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1578 break;
1579 case CONTROL_LOCK_STATE:
1580 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1581 break;
1582 default:
1583 return (ENODEV); /* /dev/nodev */
1584 }
1585 switch (cmd) {
1586 case TIOCSETA:
fef8985e 1587 error = suser_cred(ap->a_cred, 0);
984263bc
MD
1588 if (error != 0)
1589 return (error);
1590 *ct = *(struct termios *)data;
1591 return (0);
1592 case TIOCGETA:
1593 *(struct termios *)data = *ct;
1594 return (0);
1595 case TIOCGETD:
1596 *(int *)data = TTYDISC;
1597 return (0);
1598 case TIOCGWINSZ:
1599 bzero(data, sizeof(struct winsize));
1600 return (0);
1601 default:
1602 return (ENOTTY);
1603 }
1604 }
1605 tp = com->tp;
1606#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1607 term = tp->t_termios;
1608 oldcmd = cmd;
1609 error = ttsetcompat(tp, &cmd, data, &term);
1610 if (error != 0)
1611 return (error);
1612 if (cmd != oldcmd)
1613 data = (caddr_t)&term;
1614#endif
1615 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
1616 int cc;
1617 struct termios *dt = (struct termios *)data;
1618 struct termios *lt = mynor & CALLOUT_MASK
1619 ? &com->lt_out : &com->lt_in;
1620
1621 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
1622 | (dt->c_iflag & ~lt->c_iflag);
1623 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
1624 | (dt->c_oflag & ~lt->c_oflag);
1625 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
1626 | (dt->c_cflag & ~lt->c_cflag);
1627 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
1628 | (dt->c_lflag & ~lt->c_lflag);
1629 for (cc = 0; cc < NCCS; ++cc)
1630 if (lt->c_cc[cc] != 0)
1631 dt->c_cc[cc] = tp->t_cc[cc];
1632 if (lt->c_ispeed != 0)
1633 dt->c_ispeed = tp->t_ispeed;
1634 if (lt->c_ospeed != 0)
1635 dt->c_ospeed = tp->t_ospeed;
1636 }
fef8985e
MD
1637 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data,
1638 ap->a_fflag, ap->a_cred);
984263bc
MD
1639 if (error != ENOIOCTL)
1640 return (error);
8d77660e 1641 crit_enter();
fef8985e 1642 error = ttioctl(tp, cmd, data, ap->a_fflag);
984263bc
MD
1643 disc_optim(tp, &tp->t_termios, com);
1644 if (error != ENOIOCTL) {
8d77660e 1645 crit_exit();
984263bc
MD
1646 return (error);
1647 }
1648 switch (cmd) {
1649 case TIOCSBRK:
1650#if 0
1651 outb(iobase + com_cfcr, com->cfcr_image |= CFCR_SBREAK);
1652#else
1653 cd_etc(com, CD1400_ETC_SENDBREAK);
1654#endif
1655 break;
1656 case TIOCCBRK:
1657#if 0
1658 outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1659#else
1660 cd_etc(com, CD1400_ETC_STOPBREAK);
1661#endif
1662 break;
1663 case TIOCSDTR:
1664 (void)commctl(com, TIOCM_DTR, DMBIS);
1665 break;
1666 case TIOCCDTR:
1667 (void)commctl(com, TIOCM_DTR, DMBIC);
1668 break;
1669 /*
1670 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
1671 * changes get undone on the next call to comparam().
1672 */
1673 case TIOCMSET:
1674 (void)commctl(com, *(int *)data, DMSET);
1675 break;
1676 case TIOCMBIS:
1677 (void)commctl(com, *(int *)data, DMBIS);
1678 break;
1679 case TIOCMBIC:
1680 (void)commctl(com, *(int *)data, DMBIC);
1681 break;
1682 case TIOCMGET:
1683 *(int *)data = commctl(com, 0, DMGET);
1684 break;
1685 case TIOCMSDTRWAIT:
1686 /* must be root since the wait applies to following logins */
fef8985e 1687 error = suser_cred(ap->a_cred, 0);
984263bc 1688 if (error != 0) {
8d77660e 1689 crit_exit();
984263bc
MD
1690 return (error);
1691 }
1692 com->dtr_wait = *(int *)data * hz / 100;
1693 break;
1694 case TIOCMGDTRWAIT:
1695 *(int *)data = com->dtr_wait * 100 / hz;
1696 break;
1697 case TIOCTIMESTAMP:
1698 com->do_timestamp = TRUE;
1699 *(struct timeval *)data = com->timestamp;
1700 break;
1701 case TIOCDCDTIMESTAMP:
1702 com->do_dcd_timestamp = TRUE;
1703 *(struct timeval *)data = com->dcd_timestamp;
1704 break;
1705 default:
8d77660e 1706 crit_exit();
984263bc
MD
1707 return (ENOTTY);
1708 }
8d77660e 1709 crit_exit();
984263bc
MD
1710 return (0);
1711}
1712
1713static void
477d3c1c 1714siopoll(void *data, void *frame)
984263bc
MD
1715{
1716 int unit;
1717
1718#ifdef CyDebug
1719 ++cy_timeouts;
1720#endif
1721 if (com_events == 0)
1722 return;
1723repeat:
1724 for (unit = 0; unit < NSIO; ++unit) {
1725 struct com_s *com;
1726 int incc;
1727 struct tty *tp;
1728
1729 com = com_addr(unit);
1730 if (com == NULL)
1731 continue;
1732 tp = com->tp;
1733 if (tp == NULL) {
1734 /*
1735 * XXX forget any events related to closed devices
1736 * (actually never opened devices) so that we don't
1737 * loop.
1738 */
1739 disable_intr();
1740 incc = com->iptr - com->ibuf;
1741 com->iptr = com->ibuf;
1742 if (com->state & CS_CHECKMSR) {
1743 incc += LOTS_OF_EVENTS;
1744 com->state &= ~CS_CHECKMSR;
1745 }
1746 com_events -= incc;
1747 enable_intr();
1748 if (incc != 0)
1749 log(LOG_DEBUG,
1750 "sio%d: %d events for device with no tp\n",
1751 unit, incc);
1752 continue;
1753 }
1754 if (com->iptr != com->ibuf) {
1755 disable_intr();
1756 sioinput(com);
1757 enable_intr();
1758 }
1759 if (com->state & CS_CHECKMSR) {
1760 u_char delta_modem_status;
1761
1762 disable_intr();
1763 delta_modem_status = com->last_modem_status
1764 ^ com->prev_modem_status;
1765 com->prev_modem_status = com->last_modem_status;
1766 com_events -= LOTS_OF_EVENTS;
1767 com->state &= ~CS_CHECKMSR;
1768 enable_intr();
1769 if (delta_modem_status & MSR_DCD)
1770 (*linesw[tp->t_line].l_modem)
1771 (tp, com->prev_modem_status & MSR_DCD);
1772 }
1773 if (com->extra_state & CSE_ODONE) {
1774 disable_intr();
1775 com_events -= LOTS_OF_EVENTS;
1776 com->extra_state &= ~CSE_ODONE;
1777 enable_intr();
1778 if (!(com->state & CS_BUSY)) {
1779 tp->t_state &= ~TS_BUSY;
1780 ttwwakeup(com->tp);
1781 }
1782 if (com->etc != ETC_NONE) {
1783 if (com->etc == ETC_BREAK_ENDED)
1784 com->etc = ETC_NONE;
1785 wakeup(&com->etc);
1786 }
1787 }
1788 if (com->state & CS_ODONE) {
1789 disable_intr();
1790 com_events -= LOTS_OF_EVENTS;
1791 com->state &= ~CS_ODONE;
1792 enable_intr();
1793 (*linesw[tp->t_line].l_start)(tp);
1794 }
1795 if (com_events == 0)
1796 break;
1797 }
1798 if (com_events >= LOTS_OF_EVENTS)
1799 goto repeat;
1800}
1801
1802static int
1803comparam(tp, t)
1804 struct tty *tp;
1805 struct termios *t;
1806{
1807 int bits;
1808 int cflag;
1809 struct com_s *com;
1810 u_char cor_change;
1811 u_long cy_clock;
1812 int idivisor;
1813 int iflag;
1814 int iprescaler;
1815 int itimeout;
1816 int odivisor;
1817 int oprescaler;
1818 u_char opt;
984263bc
MD
1819 int unit;
1820
1821 /* do historical conversions */
1822 if (t->c_ispeed == 0)
1823 t->c_ispeed = t->c_ospeed;
1824
1825 unit = DEV_TO_UNIT(tp->t_dev);
1826 com = com_addr(unit);
1827
1828 /* check requested parameters */
1829 cy_clock = CY_CLOCK(com->gfrcr_image);
1830 idivisor = comspeed(t->c_ispeed, cy_clock, &iprescaler);
1831 if (idivisor < 0)
1832 return (EINVAL);
1833 odivisor = comspeed(t->c_ospeed, cy_clock, &oprescaler);
1834 if (odivisor < 0)
1835 return (EINVAL);
1836
1837 /* parameters are OK, convert them to the com struct and the device */
8d77660e 1838 crit_enter();
984263bc
MD
1839 if (odivisor == 0)
1840 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
1841 else
1842 (void)commctl(com, TIOCM_DTR, DMBIS);
1843
1844 /*
1845 * This returns with interrupts disabled so that we can complete
1846 * the speed change atomically.
1847 */
1848 (void) siosetwater(com, t->c_ispeed);
1849
1850 /* XXX we don't actually change the speed atomically. */
1851 enable_intr();
1852
1853 if (idivisor != 0) {
1854 cd_setreg(com, CD1400_RBPR, idivisor);
1855 cd_setreg(com, CD1400_RCOR, iprescaler);
1856 }
1857 if (odivisor != 0) {
1858 cd_setreg(com, CD1400_TBPR, odivisor);
1859 cd_setreg(com, CD1400_TCOR, oprescaler);
1860 }
1861
1862 /*
1863 * channel control
1864 * receiver enable
1865 * transmitter enable (always set)
1866 */
1867 cflag = t->c_cflag;
1868 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN
1869 | (cflag & CREAD ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS);
1870 if (opt != com->channel_control) {
1871 com->channel_control = opt;
1872 cd1400_channel_cmd(com, opt);
1873 }
1874
1875#ifdef Smarts
1876 /* set special chars */
1877 /* XXX if one is _POSIX_VDISABLE, can't use some others */
1878 if (t->c_cc[VSTOP] != _POSIX_VDISABLE)
1879 cd_setreg(com, CD1400_SCHR1, t->c_cc[VSTOP]);
1880 if (t->c_cc[VSTART] != _POSIX_VDISABLE)
1881 cd_setreg(com, CD1400_SCHR2, t->c_cc[VSTART]);
1882 if (t->c_cc[VINTR] != _POSIX_VDISABLE)
1883 cd_setreg(com, CD1400_SCHR3, t->c_cc[VINTR]);
1884 if (t->c_cc[VSUSP] != _POSIX_VDISABLE)
1885 cd_setreg(com, CD1400_SCHR4, t->c_cc[VSUSP]);
1886#endif
1887
1888 /*
1889 * set channel option register 1 -
1890 * parity mode
1891 * stop bits
1892 * char length
1893 */
1894 opt = 0;
1895 /* parity */
1896 if (cflag & PARENB) {
1897 if (cflag & PARODD)
1898 opt |= CD1400_COR1_PARODD;
1899 opt |= CD1400_COR1_PARNORMAL;
1900 }
1901 iflag = t->c_iflag;
1902 if (!(iflag & INPCK))
1903 opt |= CD1400_COR1_NOINPCK;
1904 bits = 1 + 1;
1905 /* stop bits */
1906 if (cflag & CSTOPB) {
1907 ++bits;
1908 opt |= CD1400_COR1_STOP2;
1909 }
1910 /* char length */
1911 switch (cflag & CSIZE) {
1912 case CS5:
1913 bits += 5;
1914 opt |= CD1400_COR1_CS5;
1915 break;
1916 case CS6:
1917 bits += 6;
1918 opt |= CD1400_COR1_CS6;
1919 break;
1920 case CS7:
1921 bits += 7;
1922 opt |= CD1400_COR1_CS7;
1923 break;
1924 default:
1925 bits += 8;
1926 opt |= CD1400_COR1_CS8;
1927 break;
1928 }
1929 cor_change = 0;
1930 if (opt != com->cor[0]) {
1931 cor_change |= CD1400_CCR_COR1;
1932 cd_setreg(com, CD1400_COR1, com->cor[0] = opt);
1933 }
1934
1935 /*
1936 * Set receive time-out period, normally to max(one char time, 5 ms).
1937 */
1938 if (t->c_ispeed == 0)
1939 itimeout = cd_getreg(com, CD1400_RTPR);
1940 else {
1941 itimeout = (1000 * bits + t->c_ispeed - 1) / t->c_ispeed;
1942#ifdef SOFT_HOTCHAR
1943#define MIN_RTP 1
1944#else
1945#define MIN_RTP 5
1946#endif
1947 if (itimeout < MIN_RTP)
1948 itimeout = MIN_RTP;
1949 }
1950 if (!(t->c_lflag & ICANON) && t->c_cc[VMIN] != 0 && t->c_cc[VTIME] != 0
1951 && t->c_cc[VTIME] * 10 > itimeout)
1952 itimeout = t->c_cc[VTIME] * 10;
1953 if (itimeout > 255)
1954 itimeout = 255;
1955 cd_setreg(com, CD1400_RTPR, itimeout);
1956
1957 /*
1958 * set channel option register 2 -
1959 * flow control
1960 */
1961 opt = 0;
1962#ifdef Smarts
1963 if (iflag & IXANY)
1964 opt |= CD1400_COR2_IXANY;
1965 if (iflag & IXOFF)
1966 opt |= CD1400_COR2_IXOFF;
1967#endif
1968#ifndef SOFT_CTS_OFLOW
1969 if (cflag & CCTS_OFLOW)
1970 opt |= CD1400_COR2_CCTS_OFLOW;
1971#endif
1972 disable_intr();
1973 if (opt != com->cor[1]) {
1974 cor_change |= CD1400_CCR_COR2;
1975 cd_setreg(com, CD1400_COR2, com->cor[1] = opt);
1976 }
1977 enable_intr();
1978
1979 /*
1980 * set channel option register 3 -
1981 * receiver FIFO interrupt threshold
1982 * flow control
1983 */
1984 opt = RxFifoThreshold;
1985#ifdef Smarts
1986 if (t->c_lflag & ICANON)
1987 opt |= CD1400_COR3_SCD34; /* detect INTR & SUSP chars */
1988 if (iflag & IXOFF)
1989 /* detect and transparently handle START and STOP chars */
1990 opt |= CD1400_COR3_FCT | CD1400_COR3_SCD12;
1991#endif
1992 if (opt != com->cor[2]) {
1993 cor_change |= CD1400_CCR_COR3;
1994 cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
1995 }
1996
1997 /* notify the CD1400 if COR1-3 have changed */
1998 if (cor_change)
1999 cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | cor_change);
2000
2001 /*
2002 * set channel option register 4 -
2003 * CR/NL processing
2004 * break processing
2005 * received exception processing
2006 */
2007 opt = 0;
2008 if (iflag & IGNCR)
2009 opt |= CD1400_COR4_IGNCR;
2010#ifdef Smarts
2011 /*
2012 * we need a new ttyinput() for this, as we don't want to
2013 * have ICRNL && INLCR being done in both layers, or to have
2014 * synchronisation problems
2015 */
2016 if (iflag & ICRNL)
2017 opt |= CD1400_COR4_ICRNL;
2018 if (iflag & INLCR)
2019 opt |= CD1400_COR4_INLCR;
2020#endif
2021 if (iflag & IGNBRK)
2022 opt |= CD1400_COR4_IGNBRK | CD1400_COR4_NOBRKINT;
2023 /*
2024 * The `-ignbrk -brkint parmrk' case is not handled by the hardware,
2025 * so only tell the hardware about -brkint if -parmrk.
2026 */
2027 if (!(iflag & (BRKINT | PARMRK)))
2028 opt |= CD1400_COR4_NOBRKINT;
2029#if 0
2030 /* XXX using this "intelligence" breaks reporting of overruns. */
2031 if (iflag & IGNPAR)
2032 opt |= CD1400_COR4_PFO_DISCARD;
2033 else {
2034 if (iflag & PARMRK)
2035 opt |= CD1400_COR4_PFO_ESC;
2036 else
2037 opt |= CD1400_COR4_PFO_NUL;
2038 }
2039#else
2040 opt |= CD1400_COR4_PFO_EXCEPTION;
2041#endif
2042 cd_setreg(com, CD1400_COR4, opt);
2043
2044 /*
2045 * set channel option register 5 -
2046 */
2047 opt = 0;
2048 if (iflag & ISTRIP)
2049 opt |= CD1400_COR5_ISTRIP;
2050 if (t->c_iflag & IEXTEN)
2051 /* enable LNEXT (e.g. ctrl-v quoting) handling */
2052 opt |= CD1400_COR5_LNEXT;
2053#ifdef Smarts
2054 if (t->c_oflag & ONLCR)
2055 opt |= CD1400_COR5_ONLCR;
2056 if (t->c_oflag & OCRNL)
2057 opt |= CD1400_COR5_OCRNL;
2058#endif
2059 cd_setreg(com, CD1400_COR5, opt);
2060
2061 /*
2062 * We always generate modem status change interrupts for CD changes.
2063 * Among other things, this is necessary to track TS_CARR_ON for
2064 * pstat to print even when the driver doesn't care. CD changes
2065 * should be rare so interrupts for them are not worth extra code to
2066 * avoid. We avoid interrupts for other modem status changes (except
2067 * for CTS changes when SOFT_CTS_OFLOW is configured) since this is
2068 * simplest and best.
2069 */
2070
2071 /*
2072 * set modem change option register 1
2073 * generate modem interrupts on which 1 -> 0 input transitions
2074 * also controls auto-DTR output flow-control, which we don't use
2075 */
2076 opt = CD1400_MCOR1_CDzd;
2077#ifdef SOFT_CTS_OFLOW
2078 if (cflag & CCTS_OFLOW)
2079 opt |= CD1400_MCOR1_CTSzd;
2080#endif
2081 cd_setreg(com, CD1400_MCOR1, opt);
2082
2083 /*
2084 * set modem change option register 2
2085 * generate modem interrupts on specific 0 -> 1 input transitions
2086 */
2087 opt = CD1400_MCOR2_CDod;
2088#ifdef SOFT_CTS_OFLOW
2089 if (cflag & CCTS_OFLOW)
2090 opt |= CD1400_MCOR2_CTSod;
2091#endif
2092 cd_setreg(com, CD1400_MCOR2, opt);
2093
2094 /*
2095 * XXX should have done this long ago, but there is too much state
2096 * to change all atomically.
2097 */
2098 disable_intr();
2099
2100 com->state &= ~CS_TTGO;
2101 if (!(tp->t_state & TS_TTSTOP))
2102 com->state |= CS_TTGO;
2103 if (cflag & CRTS_IFLOW) {
2104 com->state |= CS_RTS_IFLOW;
2105 /*
2106 * If CS_RTS_IFLOW just changed from off to on, the change
2107 * needs to be propagated to MCR_RTS. This isn't urgent,
2108 * so do it later by calling comstart() instead of repeating
2109 * a lot of code from comstart() here.
2110 */
2111 } else if (com->state & CS_RTS_IFLOW) {
2112 com->state &= ~CS_RTS_IFLOW;
2113 /*
2114 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2115 * on here, since comstart() won't do it later.
2116 */
2117#if 0
2118 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2119#else
2120 cd_setreg(com, com->mcr_rts_reg,
2121 com->mcr_image |= com->mcr_rts);
2122#endif
2123 }
2124
2125 /*
2126 * Set up state to handle output flow control.
2127 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2128 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2129 */
2130 com->state |= CS_ODEVREADY;
2131#ifdef SOFT_CTS_OFLOW
2132 com->state &= ~CS_CTS_OFLOW;
2133 if (cflag & CCTS_OFLOW) {
2134 com->state |= CS_CTS_OFLOW;
2135 if (!(com->last_modem_status & MSR_CTS))
2136 com->state &= ~CS_ODEVREADY;
2137 }
2138#endif
2139 /* XXX shouldn't call functions while intrs are disabled. */
2140 disc_optim(tp, t, com);
2141#if 0
2142 /*
2143 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2144 * unconditionally, but that defeated the careful discarding of
2145 * stale input in sioopen().
2146 */
2147 if (com->state >= (CS_BUSY | CS_TTGO))
2148 siointr1(com);
2149#endif
2150 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
2151 if (!(com->intr_enable & CD1400_SRER_TXRDY))
2152 cd_setreg(com, CD1400_SRER,
2153 com->intr_enable
2154 = (com->intr_enable & ~CD1400_SRER_TXMPTY)
2155 | CD1400_SRER_TXRDY);
2156 } else {
2157 if (com->intr_enable & CD1400_SRER_TXRDY)
2158 cd_setreg(com, CD1400_SRER,
2159 com->intr_enable
2160 = (com->intr_enable & ~CD1400_SRER_TXRDY)
2161 | CD1400_SRER_TXMPTY);
2162 }
2163
2164 enable_intr();
8d77660e 2165 crit_exit();
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MD
2166 comstart(tp);
2167 if (com->ibufold != NULL) {
efda3bd0 2168 kfree(com->ibufold, M_DEVBUF);
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MD
2169 com->ibufold = NULL;
2170 }
2171 return (0);
2172}
2173
2174static int
2175siosetwater(com, speed)
2176 struct com_s *com;
2177 speed_t speed;
2178{
2179 int cp4ticks;
2180 u_char *ibuf;
2181 int ibufsize;
2182 struct tty *tp;
2183
2184 /*
2185 * Make the buffer size large enough to handle a softtty interrupt
2186 * latency of about 2 ticks without loss of throughput or data
2187 * (about 3 ticks if input flow control is not used or not honoured,
2188 * but a bit less for CS5-CS7 modes).
2189 */
2190 cp4ticks = speed / 10 / hz * 4;
2191 for (ibufsize = 128; ibufsize < cp4ticks;)
2192 ibufsize <<= 1;
2193 if (ibufsize == com->ibufsize) {
2194 disable_intr();
2195 return (0);
2196 }
2197
2198 /*
2199 * Allocate input buffer. The extra factor of 2 in the size is
2200 * to allow for an error byte for each input byte.
2201 */
efda3bd0 2202 ibuf = kmalloc(2 * ibufsize, M_DEVBUF, M_WAITOK);
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MD
2203
2204 /* Initialize non-critical variables. */
2205 com->ibufold = com->ibuf;
2206 com->ibufsize = ibufsize;
2207 tp = com->tp;
2208 if (tp != NULL) {
2209 tp->t_ififosize = 2 * ibufsize;
2210 tp->t_ispeedwat = (speed_t)-1;
2211 tp->t_ospeedwat = (speed_t)-1;
2212 }
2213
2214 /*
2215 * Read current input buffer, if any. Continue with interrupts
2216 * disabled.
2217 */
2218 disable_intr();
2219 if (com->iptr != com->ibuf)
2220 sioinput(com);
2221
2222 /*-
2223 * Initialize critical variables, including input buffer watermarks.
2224 * The external device is asked to stop sending when the buffer
2225 * exactly reaches high water, or when the high level requests it.
2226 * The high level is notified immediately (rather than at a later
2227 * clock tick) when this watermark is reached.
2228 * The buffer size is chosen so the watermark should almost never
2229 * be reached.
2230 * The low watermark is invisibly 0 since the buffer is always
2231 * emptied all at once.
2232 */
2233 com->iptr = com->ibuf = ibuf;
2234 com->ibufend = ibuf + ibufsize;
2235 com->ierroff = ibufsize;
2236 com->ihighwater = ibuf + 3 * ibufsize / 4;
2237 return (0);
2238}
2239
2240static void
2241comstart(tp)
2242 struct tty *tp;
2243{
2244 struct com_s *com;
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MD
2245#ifdef CyDebug
2246 bool_t started;
2247#endif
2248 int unit;
2249
2250 unit = DEV_TO_UNIT(tp->t_dev);
2251 com = com_addr(unit);
8d77660e 2252 crit_enter();
984263bc
MD
2253
2254#ifdef CyDebug
2255 ++com->start_count;
2256 started = FALSE;
2257#endif
2258
2259 disable_intr();
2260 if (tp->t_state & TS_TTSTOP) {
2261 com->state &= ~CS_TTGO;
2262 if (com->intr_enable & CD1400_SRER_TXRDY)
2263 cd_setreg(com, CD1400_SRER,
2264 com->intr_enable
2265 = (com->intr_enable & ~CD1400_SRER_TXRDY)
2266 | CD1400_SRER_TXMPTY);
2267 } else {
2268 com->state |= CS_TTGO;
2269 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)
2270 && !(com->intr_enable & CD1400_SRER_TXRDY))
2271 cd_setreg(com, CD1400_SRER,
2272 com->intr_enable
2273 = (com->intr_enable & ~CD1400_SRER_TXMPTY)
2274 | CD1400_SRER_TXRDY);
2275 }
2276 if (tp->t_state & TS_TBLOCK) {
2277 if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
2278#if 0
2279 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2280#else
2281 cd_setreg(com, com->mcr_rts_reg,
2282 com->mcr_image &= ~com->mcr_rts);
2283#endif
2284 } else {
2285 if (!(com->mcr_image & com->mcr_rts)
2286 && com->iptr < com->ihighwater
2287 && com->state & CS_RTS_IFLOW)
2288#if 0
2289 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2290#else
2291 cd_setreg(com, com->mcr_rts_reg,
2292 com->mcr_image |= com->mcr_rts);
2293#endif
2294 }
2295 enable_intr();
2296 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2297 ttwwakeup(tp);
8d77660e 2298 crit_exit();
984263bc
MD
2299 return;
2300 }
2301 if (tp->t_outq.c_cc != 0) {
2302 struct lbq *qp;
2303 struct lbq *next;
2304
2305 if (!com->obufs[0].l_queued) {
2306#ifdef CyDebug
2307 started = TRUE;
2308#endif
2309 com->obufs[0].l_tail
2310 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2311 sizeof com->obuf1);
2312 com->obufs[0].l_next = NULL;
2313 com->obufs[0].l_queued = TRUE;
2314 disable_intr();
2315 if (com->state & CS_BUSY) {
2316 qp = com->obufq.l_next;
2317 while ((next = qp->l_next) != NULL)
2318 qp = next;
2319 qp->l_next = &com->obufs[0];
2320 } else {
2321 com->obufq.l_head = com->obufs[0].l_head;
2322 com->obufq.l_tail = com->obufs[0].l_tail;
2323 com->obufq.l_next = &com->obufs[0];
2324 com->state |= CS_BUSY;
2325 if (com->state >= (CS_BUSY | CS_TTGO
2326 | CS_ODEVREADY))
2327 cd_setreg(com, CD1400_SRER,
2328 com->intr_enable
2329 = (com->intr_enable
2330 & ~CD1400_SRER_TXMPTY)
2331 | CD1400_SRER_TXRDY);
2332 }
2333 enable_intr();
2334 }
2335 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2336#ifdef CyDebug
2337 started = TRUE;
2338#endif
2339 com->obufs[1].l_tail
2340 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2341 sizeof com->obuf2);
2342 com->obufs[1].l_next = NULL;
2343 com->obufs[1].l_queued = TRUE;
2344 disable_intr();
2345 if (com->state & CS_BUSY) {
2346 qp = com->obufq.l_next;
2347 while ((next = qp->l_next) != NULL)
2348 qp = next;
2349 qp->l_next = &com->obufs[1];
2350 } else {
2351 com->obufq.l_head = com->obufs[1].l_head;
2352 com->obufq.l_tail = com->obufs[1].l_tail;
2353 com->obufq.l_next = &com->obufs[1];
2354 com->state |= CS_BUSY;
2355 if (com->state >= (CS_BUSY | CS_TTGO
2356 | CS_ODEVREADY))
2357 cd_setreg(com, CD1400_SRER,
2358 com->intr_enable
2359 = (com->intr_enable
2360 & ~CD1400_SRER_TXMPTY)
2361 | CD1400_SRER_TXRDY);
2362 }
2363 enable_intr();
2364 }
2365 tp->t_state |= TS_BUSY;
2366 }
2367#ifdef CyDebug
2368 if (started)
2369 ++com->start_real;
2370#endif
2371#if 0
2372 disable_intr();
2373 if (com->state >= (CS_BUSY | CS_TTGO))
2374 siointr1(com); /* fake interrupt to start output */
2375 enable_intr();
2376#endif
2377 ttwwakeup(tp);
8d77660e 2378 crit_exit();
984263bc
MD
2379}
2380
2381static void
2382comstop(tp, rw)
2383 struct tty *tp;
2384 int rw;
2385{
2386 struct com_s *com;
2387 bool_t wakeup_etc;
2388
2389 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2390 wakeup_etc = FALSE;
2391 disable_intr();
2392 if (rw & FWRITE) {
2393 com->obufs[0].l_queued = FALSE;
2394 com->obufs[1].l_queued = FALSE;
2395 if (com->extra_state & CSE_ODONE) {
2396 com_events -= LOTS_OF_EVENTS;
2397 com->extra_state &= ~CSE_ODONE;
2398 if (com->etc != ETC_NONE) {
2399 if (com->etc == ETC_BREAK_ENDED)
2400 com->etc = ETC_NONE;
2401 wakeup_etc = TRUE;
2402 }
2403 }
2404 com->tp->t_state &= ~TS_BUSY;
2405 if (com->state & CS_ODONE)
2406 com_events -= LOTS_OF_EVENTS;
2407 com->state &= ~(CS_ODONE | CS_BUSY);
2408 }
2409 if (rw & FREAD) {
2410 /* XXX no way to reset only input fifo. */
2411 com_events -= (com->iptr - com->ibuf);
2412 com->iptr = com->ibuf;
2413 }
2414 enable_intr();
2415 if (wakeup_etc)
2416 wakeup(&com->etc);
2417 if (rw & FWRITE && com->etc == ETC_NONE)
2418 cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
2419 comstart(tp);
2420}
2421
2422static int
2423commctl(com, bits, how)
2424 struct com_s *com;
2425 int bits;
2426 int how;
2427{
2428 int mcr;
2429 int msr;
2430
2431 if (how == DMGET) {
2432 if (com->channel_control & CD1400_CCR_RCVEN)
2433 bits |= TIOCM_LE;
2434 mcr = com->mcr_image;
2435 if (mcr & com->mcr_dtr)
2436 bits |= TIOCM_DTR;
2437 if (mcr & com->mcr_rts)
2438 /* XXX wired on for Cyclom-8Ys */
2439 bits |= TIOCM_RTS;
2440
2441 /*
2442 * We must read the modem status from the hardware because
2443 * we don't generate modem status change interrupts for all
2444 * changes, so com->prev_modem_status is not guaranteed to
2445 * be up to date. This is safe, unlike for sio, because
2446 * reading the status register doesn't clear pending modem
2447 * status change interrupts.
2448 */
2449 msr = cd_getreg(com, CD1400_MSVR2);
2450
2451 if (msr & MSR_CTS)
2452 bits |= TIOCM_CTS;
2453 if (msr & MSR_DCD)
2454 bits |= TIOCM_CD;
2455 if (msr & MSR_DSR)
2456 bits |= TIOCM_DSR;
2457 if (msr & MSR_RI)
2458 /* XXX not connected except for Cyclom-16Y? */
2459 bits |= TIOCM_RI;
2460 return (bits);
2461 }
2462 mcr = 0;
2463 if (bits & TIOCM_DTR)
2464 mcr |= com->mcr_dtr;
2465 if (bits & TIOCM_RTS)
2466 mcr |= com->mcr_rts;
2467 disable_intr();
2468 switch (how) {
2469 case DMSET:
2470 com->mcr_image = mcr;
2471 cd_setreg(com, CD1400_MSVR1, mcr);
2472 cd_setreg(com, CD1400_MSVR2, mcr);
2473 break;
2474 case DMBIS:
2475 com->mcr_image = mcr = com->mcr_image | mcr;
2476 cd_setreg(com, CD1400_MSVR1, mcr);
2477 cd_setreg(com, CD1400_MSVR2, mcr);
2478 break;
2479 case DMBIC:
2480 com->mcr_image = mcr = com->mcr_image & ~mcr;
2481 cd_setreg(com, CD1400_MSVR1, mcr);
2482 cd_setreg(com, CD1400_MSVR2, mcr);
2483 break;
2484 }
2485 enable_intr();
2486 return (0);
2487}
2488
2489static void
2490siosettimeout()
2491{
2492 struct com_s *com;
2493 bool_t someopen;
2494 int unit;
2495
2496 /*
2497 * Set our timeout period to 1 second if no polled devices are open.
2498 * Otherwise set it to max(1/200, 1/hz).
2499 * Enable timeouts iff some device is open.
2500 */
e8b273ff 2501 callout_stop(&sio_timeout_handle);
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MD
2502 sio_timeout = hz;
2503 someopen = FALSE;
2504 for (unit = 0; unit < NSIO; ++unit) {
2505 com = com_addr(unit);
2506 if (com != NULL && com->tp != NULL
2507 && com->tp->t_state & TS_ISOPEN) {
2508 someopen = TRUE;
2509#if 0
2510 if (com->poll || com->poll_output) {
2511 sio_timeout = hz > 200 ? hz / 200 : 1;
2512 break;
2513 }
2514#endif
2515 }
2516 }
2517 if (someopen) {
2518 sio_timeouts_until_log = hz / sio_timeout;
e8b273ff
MD
2519 callout_reset(&sio_timeout_handle, sio_timeout,
2520 comwakeup, NULL);
984263bc
MD
2521 } else {
2522 /* Flush error messages, if any. */
2523 sio_timeouts_until_log = 1;
2524 comwakeup((void *)NULL);
e8b273ff 2525 callout_stop(&sio_timeout_handle);
984263bc
MD
2526 }
2527}
2528
2529static void
2530comwakeup(chan)
2531 void *chan;
2532{
2533 struct com_s *com;
2534 int unit;
2535
e8b273ff 2536 callout_reset(&sio_timeout_handle, sio_timeout, comwakeup, NULL);
984263bc
MD
2537
2538#if 0
2539 /*
2540 * Recover from lost output interrupts.
2541 * Poll any lines that don't use interrupts.
2542 */
2543 for (unit = 0; unit < NSIO; ++unit) {
2544 com = com_addr(unit);
2545 if (com != NULL
2546 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2547 disable_intr();
2548 siointr1(com);
2549 enable_intr();
2550 }
2551 }
2552#endif
2553
2554 /*
2555 * Check for and log errors, but not too often.
2556 */
2557 if (--sio_timeouts_until_log > 0)
2558 return;
2559 sio_timeouts_until_log = hz / sio_timeout;
2560 for (unit = 0; unit < NSIO; ++unit) {
2561 int errnum;
2562
2563 com = com_addr(unit);
2564 if (com == NULL)
2565 continue;
2566 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2567 u_int delta;
2568 u_long total;
2569
2570 disable_intr();
2571 delta = com->delta_error_counts[errnum];
2572 com->delta_error_counts[errnum] = 0;
2573 enable_intr();
2574 if (delta == 0)
2575 continue;
2576 total = com->error_counts[errnum] += delta;
2577 log(LOG_ERR, "cy%d: %u more %s%s (total %lu)\n",
2578 unit, delta, error_desc[errnum],
2579 delta == 1 ? "" : "s", total);
2580 }
2581 }
2582}
2583
2584static void
2585disc_optim(tp, t, com)
2586 struct tty *tp;
2587 struct termios *t;
2588 struct com_s *com;
2589{
2590#ifndef SOFT_HOTCHAR
2591 u_char opt;
2592#endif
2593
2594 /*
2595 * XXX can skip a lot more cases if Smarts. Maybe
2596 * (IGNCR | ISTRIP | IXON) in c_iflag. But perhaps we
2597 * shouldn't skip if (TS_CNTTB | TS_LNCH) is set in t_state.
2598 */
2599 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2600 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2601 && (!(t->c_iflag & PARMRK)
2602 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2603 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2604 && linesw[tp->t_line].l_rint == ttyinput)
2605 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2606 else
2607 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2608 com->hotchar = linesw[tp->t_line].l_hotchar;
2609#ifndef SOFT_HOTCHAR
2610 opt = com->cor[2] & ~CD1400_COR3_SCD34;
2611 if (com->hotchar != 0) {
2612 cd_setreg(com, CD1400_SCHR3, com->hotchar);
2613 cd_setreg(com, CD1400_SCHR4, com->hotchar);
2614 opt |= CD1400_COR3_SCD34;
2615 }
2616 if (opt != com->cor[2]) {
2617 cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
2618 cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
2619 }
2620#endif
2621}
2622
2623#ifdef Smarts
2624/* standard line discipline input routine */
2625int
2626cyinput(c, tp)
2627 int c;
2628 struct tty *tp;
2629{
2630 /* XXX duplicate ttyinput(), but without the IXOFF/IXON/ISTRIP/IPARMRK
2631 * bits, as they are done by the CD1400. Hardly worth the effort,
2632 * given that high-throughput sessions are raw anyhow.
2633 */
2634}
2635#endif /* Smarts */
2636
2637static int
2638comspeed(speed, cy_clock, prescaler_io)
2639 speed_t speed;
2640 u_long cy_clock;
2641 int *prescaler_io;
2642{
2643 int actual;
2644 int error;
2645 int divider;
2646 int prescaler;
2647 int prescaler_unit;
2648
2649 if (speed == 0)
2650 return (0);
2651 if (speed < 0 || speed > 150000)
2652 return (-1);
2653
2654 /* determine which prescaler to use */
2655 for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
2656 prescaler_unit--, prescaler >>= 2) {
2657 if (cy_clock / prescaler / speed > 63)
2658 break;
2659 }
2660
2661 divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
2662 if (divider > 255)
2663 divider = 255;
2664 actual = cy_clock/prescaler/divider;
2665
2666 /* 10 times error in percent: */
2667 error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
2668
2669 /* 3.0% max error tolerance */
2670 if (error < -30 || error > 30)
2671 return (-1);
2672
2673#if 0
2674 printf("prescaler = %d (%d)\n", prescaler, prescaler_unit);
2675 printf("divider = %d (%x)\n", divider, divider);
2676 printf("actual = %d\n", actual);
2677 printf("error = %d\n", error);
2678#endif
2679
2680 *prescaler_io = prescaler_unit;
2681 return (divider);
2682}
2683
2684static void
2685cd1400_channel_cmd(com, cmd)
2686 struct com_s *com;
2687 int cmd;
2688{
2689 cd1400_channel_cmd_wait(com);
2690 cd_setreg(com, CD1400_CCR, cmd);
2691 cd1400_channel_cmd_wait(com);
2692}
2693
2694static void
2695cd1400_channel_cmd_wait(com)
2696 struct com_s *com;
2697{
2698 struct timeval start;
2699 struct timeval tv;
2700 long usec;
2701
2702 if (cd_getreg(com, CD1400_CCR) == 0)
2703 return;
2704 microtime(&start);
2705 for (;;) {
2706 if (cd_getreg(com, CD1400_CCR) == 0)
2707 return;
2708 microtime(&tv);
2709 usec = 1000000 * (tv.tv_sec - start.tv_sec) +
2710 tv.tv_usec - start.tv_usec;
2711 if (usec >= 5000) {
2712 log(LOG_ERR,
2713 "cy%d: channel command timeout (%ld usec)\n",
2714 com->unit, usec);
2715 return;
2716 }
2717 }
2718}
2719
2720static void
2721cd_etc(com, etc)
2722 struct com_s *com;
2723 int etc;
2724{
2725 /*
2726 * We can't change the hardware's ETC state while there are any
2727 * characters in the tx fifo, since those characters would be
2728 * interpreted as commands! Unputting characters from the fifo
2729 * is difficult, so we wait up to 12 character times for the fifo
2730 * to drain. The command will be delayed for up to 2 character
2731 * times for the tx to become empty. Unputting characters from
2732 * the tx holding and shift registers is impossible, so we wait
2733 * for the tx to become empty so that the command is sure to be
2734 * executed soon after we issue it.
2735 */
2736 disable_intr();
2737 if (com->etc == etc) {
2738 enable_intr();
2739 goto wait;
2740 }
2741 if ((etc == CD1400_ETC_SENDBREAK
2742 && (com->etc == ETC_BREAK_STARTING
2743 || com->etc == ETC_BREAK_STARTED))
2744 || (etc == CD1400_ETC_STOPBREAK
2745 && (com->etc == ETC_BREAK_ENDING || com->etc == ETC_BREAK_ENDED
2746 || com->etc == ETC_NONE))) {
2747 enable_intr();
2748 return;
2749 }
2750 com->etc = etc;
2751 cd_setreg(com, CD1400_SRER,
2752 com->intr_enable
2753 = (com->intr_enable & ~CD1400_SRER_TXRDY) | CD1400_SRER_TXMPTY);
2754 enable_intr();
2755wait:
2756 while (com->etc == etc
377d4740 2757 && tsleep(&com->etc, PCATCH, "cyetc", 0) == 0)
984263bc
MD
2758 continue;
2759}
2760
2761static int
2762cd_getreg(com, reg)
2763 struct com_s *com;
2764 int reg;
2765{
2766 struct com_s *basecom;
2767 u_char car;
2768 int cy_align;
2769 u_long ef;
2770 cy_addr iobase;
2771 int val;
2772
2773 basecom = com_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
2774 car = com->unit & CD1400_CAR_CHAN;
2775 cy_align = com->cy_align;
2776 iobase = com->iobase;
2777 ef = read_eflags();
2778 if (ef & PSL_I)
2779 disable_intr();
2780 if (basecom->car != car)
2781 cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
2782 val = cd_inb(iobase, reg, cy_align);
2783 if (ef & PSL_I)
2784 enable_intr();
2785 return (val);
2786}
2787
2788static void
2789cd_setreg(com, reg, val)
2790 struct com_s *com;
2791 int reg;
2792 int val;
2793{
2794 struct com_s *basecom;
2795 u_char car;
2796 int cy_align;
2797 u_long ef;
2798 cy_addr iobase;
2799
2800 basecom = com_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
2801 car = com->unit & CD1400_CAR_CHAN;
2802 cy_align = com->cy_align;
2803 iobase = com->iobase;
2804 ef = read_eflags();
2805 if (ef & PSL_I)
2806 disable_intr();
2807 if (basecom->car != car)
2808 cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
2809 cd_outb(iobase, reg, cy_align, val);
2810 if (ef & PSL_I)
2811 enable_intr();
2812}
2813
2814#ifdef CyDebug
2815/* useful in ddb */
2816void
2817cystatus(unit)
2818 int unit;
2819{
2820 struct com_s *com;
2821 cy_addr iobase;
2822 u_int ocount;
2823 struct tty *tp;
2824
2825 com = com_addr(unit);
2826 printf("info for channel %d\n", unit);
2827 printf("------------------\n");
2828 printf("total cyclom service probes:\t%d\n", cy_svrr_probes);
2829 printf("calls to upper layer:\t\t%d\n", cy_timeouts);
2830 if (com == NULL)
2831 return;
2832 iobase = com->iobase;
2833 printf("\n");
2834 printf("cd1400 base address:\\tt%p\n", iobase);
2835 printf("saved channel_control:\t\t0x%02x\n", com->channel_control);
2836 printf("saved cor1-3:\t\t\t0x%02x 0x%02x 0x%02x\n",
2837 com->cor[0], com->cor[1], com->cor[2]);
2838 printf("service request enable reg:\t0x%02x (0x%02x cached)\n",
2839 cd_getreg(com, CD1400_SRER), com->intr_enable);
2840 printf("service request register:\t0x%02x\n",
2841 cd_inb(iobase, CD1400_SVRR, com->cy_align));
2842 printf("modem status:\t\t\t0x%02x (0x%02x cached)\n",
2843 cd_getreg(com, CD1400_MSVR2), com->prev_modem_status);
2844 printf("rx/tx/mdm interrupt registers:\t0x%02x 0x%02x 0x%02x\n",
2845 cd_inb(iobase, CD1400_RIR, com->cy_align),
2846 cd_inb(iobase, CD1400_TIR, com->cy_align),
2847 cd_inb(iobase, CD1400_MIR, com->cy_align));
2848 printf("\n");
2849 printf("com state:\t\t\t0x%02x\n", com->state);
2850 printf("calls to comstart():\t\t%d (%d useful)\n",
2851 com->start_count, com->start_real);
2852 printf("rx buffer chars free:\t\t%d\n", com->iptr - com->ibuf);
2853 ocount = 0;
2854 if (com->obufs[0].l_queued)
2855 ocount += com->obufs[0].l_tail - com->obufs[0].l_head;
2856 if (com->obufs[1].l_queued)
2857 ocount += com->obufs[1].l_tail - com->obufs[1].l_head;
2858 printf("tx buffer chars:\t\t%u\n", ocount);
2859 printf("received chars:\t\t\t%d\n", com->bytes_in);
2860 printf("received exceptions:\t\t%d\n", com->recv_exception);
2861 printf("modem signal deltas:\t\t%d\n", com->mdm);
2862 printf("transmitted chars:\t\t%d\n", com->bytes_out);
2863 printf("\n");
2864 tp = com->tp;
2865 if (tp != NULL) {
2866 printf("tty state:\t\t\t0x%08x\n", tp->t_state);
2867 printf(
2868 "upper layer queue lengths:\t%d raw, %d canon, %d output\n",
2869 tp->t_rawq.c_cc, tp->t_canq.c_cc, tp->t_outq.c_cc);
2870 } else
2871 printf("tty state:\t\t\tclosed\n");
2872}
2873#endif /* CyDebug */