Give ps access to a process's thread structure.
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
17a9f566 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.14 2003/06/28 02:09:47 dillon Exp $
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40 */
41
42#include "apm.h"
43#include "ether.h"
44#include "npx.h"
45#include "opt_atalk.h"
46#include "opt_compat.h"
47#include "opt_cpu.h"
48#include "opt_ddb.h"
49#include "opt_directio.h"
50#include "opt_inet.h"
51#include "opt_ipx.h"
52#include "opt_maxmem.h"
53#include "opt_msgbuf.h"
54#include "opt_perfmon.h"
55#include "opt_swap.h"
56#include "opt_user_ldt.h"
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
87#include <sys/user.h>
88#include <sys/exec.h>
89#include <sys/cons.h>
90
91#include <ddb/ddb.h>
92
93#include <net/netisr.h>
94
95#include <machine/cpu.h>
96#include <machine/reg.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#include <machine/bootinfo.h>
100#include <machine/ipl.h>
101#include <machine/md_var.h>
102#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103#ifdef SMP
104#include <machine/smp.h>
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105#endif
106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
112#include <i386/isa/isa_device.h>
113#endif
114#include <i386/isa/intr_machdep.h>
115#include <isa/rtc.h>
116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
121extern void init386 __P((int first));
122extern void dblfault_handler __P((void));
123
124extern void printcpuinfo(void); /* XXX header file */
125extern void finishidentcpu(void);
126extern void panicifcpuunsupported(void);
127extern void initializecpu(void);
128
129static void cpu_startup __P((void *));
130#ifdef CPU_ENABLE_SSE
131static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
132static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
133#endif /* CPU_ENABLE_SSE */
134#ifdef DIRECTIO
135extern void ffs_rawread_setup(void);
136#endif /* DIRECTIO */
137
138SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
139
140static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
141
142int _udatasel, _ucodesel;
143u_int atdevbase;
144
145#if defined(SWTCH_OPTIM_STATS)
146extern int swtch_optim_stats;
147SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
148 CTLFLAG_RD, &swtch_optim_stats, 0, "");
149SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
150 CTLFLAG_RD, &tlb_flush_count, 0, "");
151#endif
152
153#ifdef PC98
154static int ispc98 = 1;
155#else
156static int ispc98 = 0;
157#endif
158SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
159
160int physmem = 0;
161int cold = 1;
162
163static int
164sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
165{
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
167 return (error);
168}
169
170SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
172
173static int
174sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
175{
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - cnt.v_wire_count), req);
178 return (error);
179}
180
181SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
183
184static int
185sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
186{
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
189 return (error);
190}
191
192SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
194
195static int
196sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
197{
198 int error;
199
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
202 */
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
209 }
210 return(error);
211}
212
213SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
215
216static int msgbuf_clear;
217
218static int
219sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
220{
221 int error;
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
223 req);
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
228 msgbuf_clear=0;
229 }
230 return (error);
231}
232
233SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
236
237int bootverbose = 0, Maxmem = 0;
238long dumplo;
239
240vm_offset_t phys_avail[10];
241
242/* must be 2 less so 0 0 can signal end of chunks */
243#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
244
245static vm_offset_t buffer_sva, buffer_eva;
246vm_offset_t clean_sva, clean_eva;
247static vm_offset_t pager_sva, pager_eva;
248static struct trapframe proc0_tf;
249
250static void
251cpu_startup(dummy)
252 void *dummy;
253{
254 register unsigned i;
255 register caddr_t v;
256 vm_offset_t maxaddr;
257 vm_size_t size = 0;
258 int firstaddr;
259 vm_offset_t minaddr;
260
261 if (boothowto & RB_VERBOSE)
262 bootverbose++;
263
264 /*
265 * Good {morning,afternoon,evening,night}.
266 */
267 printf("%s", version);
268 startrtclock();
269 printcpuinfo();
270 panicifcpuunsupported();
271#ifdef PERFMON
272 perfmon_init();
273#endif
274 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
275 /*
276 * Display any holes after the first chunk of extended memory.
277 */
278 if (bootverbose) {
279 int indx;
280
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
283 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
284
285 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
286 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
287 size1 / PAGE_SIZE);
288 }
289 }
290
291 /*
292 * Calculate callout wheel size
293 */
294 for (callwheelsize = 1, callwheelbits = 0;
295 callwheelsize < ncallout;
296 callwheelsize <<= 1, ++callwheelbits)
297 ;
298 callwheelmask = callwheelsize - 1;
299
300 /*
301 * Allocate space for system data structures.
302 * The first available kernel virtual address is in "v".
303 * As pages of kernel virtual memory are allocated, "v" is incremented.
304 * As pages of memory are allocated and cleared,
305 * "firstaddr" is incremented.
306 * An index into the kernel page table corresponding to the
307 * virtual memory address maintained in "v" is kept in "mapaddr".
308 */
309
310 /*
311 * Make two passes. The first pass calculates how much memory is
312 * needed and allocates it. The second pass assigns virtual
313 * addresses to the various data structures.
314 */
315 firstaddr = 0;
316again:
317 v = (caddr_t)firstaddr;
318
319#define valloc(name, type, num) \
320 (name) = (type *)v; v = (caddr_t)((name)+(num))
321#define valloclim(name, type, num, lim) \
322 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
323
324 valloc(callout, struct callout, ncallout);
325 valloc(callwheel, struct callout_tailq, callwheelsize);
326
327 /*
328 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
329 * For the first 64MB of ram nominally allocate sufficient buffers to
330 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
331 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
332 * the buffer cache we limit the eventual kva reservation to
333 * maxbcache bytes.
334 *
335 * factor represents the 1/4 x ram conversion.
336 */
337 if (nbuf == 0) {
338 int factor = 4 * BKVASIZE / 1024;
339 int kbytes = physmem * (PAGE_SIZE / 1024);
340
341 nbuf = 50;
342 if (kbytes > 4096)
343 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
344 if (kbytes > 65536)
345 nbuf += (kbytes - 65536) * 2 / (factor * 5);
346 if (maxbcache && nbuf > maxbcache / BKVASIZE)
347 nbuf = maxbcache / BKVASIZE;
348 }
349
350 /*
351 * Do not allow the buffer_map to be more then 1/2 the size of the
352 * kernel_map.
353 */
354 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
355 (BKVASIZE * 2)) {
356 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
357 (BKVASIZE * 2);
358 printf("Warning: nbufs capped at %d\n", nbuf);
359 }
360
361 nswbuf = max(min(nbuf/4, 256), 16);
362#ifdef NSWBUF_MIN
363 if (nswbuf < NSWBUF_MIN)
364 nswbuf = NSWBUF_MIN;
365#endif
366#ifdef DIRECTIO
367 ffs_rawread_setup();
368#endif
369
370 valloc(swbuf, struct buf, nswbuf);
371 valloc(buf, struct buf, nbuf);
372 v = bufhashinit(v);
373
374 /*
375 * End of first pass, size has been calculated so allocate memory
376 */
377 if (firstaddr == 0) {
378 size = (vm_size_t)(v - firstaddr);
379 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
380 if (firstaddr == 0)
381 panic("startup: no room for tables");
382 goto again;
383 }
384
385 /*
386 * End of second pass, addresses have been assigned
387 */
388 if ((vm_size_t)(v - firstaddr) != size)
389 panic("startup: table size inconsistency");
390
391 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
392 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
393 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
394 (nbuf*BKVASIZE));
395 buffer_map->system_map = 1;
396 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
397 (nswbuf*MAXPHYS) + pager_map_size);
398 pager_map->system_map = 1;
399 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
400 (16*(ARG_MAX+(PAGE_SIZE*3))));
401
402 /*
403 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
404 * we use the more space efficient malloc in place of kmem_alloc.
405 */
406 {
407 vm_offset_t mb_map_size;
408
409 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
410 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
411 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
412 bzero(mclrefcnt, mb_map_size / MCLBYTES);
413 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
414 mb_map_size);
415 mb_map->system_map = 1;
416 }
417
418 /*
419 * Initialize callouts
420 */
421 SLIST_INIT(&callfree);
422 for (i = 0; i < ncallout; i++) {
423 callout_init(&callout[i]);
424 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
425 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
426 }
427
428 for (i = 0; i < callwheelsize; i++) {
429 TAILQ_INIT(&callwheel[i]);
430 }
431
432#if defined(USERCONFIG)
433 userconfig();
434 cninit(); /* the preferred console may have changed */
435#endif
436
437 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count),
438 ptoa(cnt.v_free_count) / 1024);
439
440 /*
441 * Set up buffers, so they can be used to read disk labels.
442 */
443 bufinit();
444 vm_pager_bufferinit();
445
446#ifdef SMP
447 /*
448 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
449 */
450 mp_start(); /* fire up the APs and APICs */
451 mp_announce();
452#endif /* SMP */
453 cpu_setregs();
454}
455
456int
457register_netisr(num, handler)
458 int num;
459 netisr_t *handler;
460{
461
462 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
463 printf("register_netisr: bad isr number: %d\n", num);
464 return (EINVAL);
465 }
466 netisrs[num] = handler;
467 return (0);
468}
469
470int
471unregister_netisr(num)
472 int num;
473{
474
475 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
476 printf("unregister_netisr: bad isr number: %d\n", num);
477 return (EINVAL);
478 }
479 netisrs[num] = NULL;
480 return (0);
481}
482
483/*
484 * Send an interrupt to process.
485 *
486 * Stack is set up to allow sigcode stored
487 * at top to call routine, followed by kcall
488 * to sigreturn routine below. After sigreturn
489 * resets the signal mask, the stack, and the
490 * frame pointer, it returns to the user
491 * specified pc, psl.
492 */
493static void
494osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
495{
496 register struct proc *p = curproc;
497 register struct trapframe *regs;
498 register struct osigframe *fp;
499 struct osigframe sf;
500 struct sigacts *psp = p->p_sigacts;
501 int oonstack;
502
503 regs = p->p_md.md_regs;
504 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
505
506 /* Allocate and validate space for the signal handler context. */
507 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
508 SIGISMEMBER(psp->ps_sigonstack, sig)) {
509 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
510 p->p_sigstk.ss_size - sizeof(struct osigframe));
511 p->p_sigstk.ss_flags |= SS_ONSTACK;
512 }
513 else
514 fp = (struct osigframe *)regs->tf_esp - 1;
515
516 /* Translate the signal if appropriate */
517 if (p->p_sysent->sv_sigtbl) {
518 if (sig <= p->p_sysent->sv_sigsize)
519 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
520 }
521
522 /* Build the argument list for the signal handler. */
523 sf.sf_signum = sig;
524 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
525 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
526 /* Signal handler installed with SA_SIGINFO. */
527 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
528 sf.sf_siginfo.si_signo = sig;
529 sf.sf_siginfo.si_code = code;
530 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
531 }
532 else {
533 /* Old FreeBSD-style arguments. */
534 sf.sf_arg2 = code;
535 sf.sf_addr = regs->tf_err;
536 sf.sf_ahu.sf_handler = catcher;
537 }
538
539 /* save scratch registers */
540 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
541 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
542 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
543 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
544 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
545 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
546 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
547 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
548 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
549 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
550 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
551 sf.sf_siginfo.si_sc.sc_gs = rgs();
552 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
553
554 /* Build the signal context to be used by sigreturn. */
555 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
556 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
557 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
558 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
559 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
560 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
561 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
562 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
563
564 /*
565 * If we're a vm86 process, we want to save the segment registers.
566 * We also change eflags to be our emulated eflags, not the actual
567 * eflags.
568 */
569 if (regs->tf_eflags & PSL_VM) {
570 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 571 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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572
573 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
574 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
575 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
576 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
577
578 if (vm86->vm86_has_vme == 0)
579 sf.sf_siginfo.si_sc.sc_ps =
580 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
581 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
582 /* see sendsig for comment */
583 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
584 }
585
586 /* Copy the sigframe out to the user's stack. */
587 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
588 /*
589 * Something is wrong with the stack pointer.
590 * ...Kill the process.
591 */
592 sigexit(p, SIGILL);
593 }
594
595 regs->tf_esp = (int)fp;
596 regs->tf_eip = PS_STRINGS - szosigcode;
597 regs->tf_eflags &= ~PSL_T;
598 regs->tf_cs = _ucodesel;
599 regs->tf_ds = _udatasel;
600 regs->tf_es = _udatasel;
601 regs->tf_fs = _udatasel;
602 load_gs(_udatasel);
603 regs->tf_ss = _udatasel;
604}
605
606void
607sendsig(catcher, sig, mask, code)
608 sig_t catcher;
609 int sig;
610 sigset_t *mask;
611 u_long code;
612{
613 struct proc *p = curproc;
614 struct trapframe *regs;
615 struct sigacts *psp = p->p_sigacts;
616 struct sigframe sf, *sfp;
617 int oonstack;
618
619 if (SIGISMEMBER(psp->ps_osigset, sig)) {
620 osendsig(catcher, sig, mask, code);
621 return;
622 }
623
624 regs = p->p_md.md_regs;
625 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
626
627 /* save user context */
628 bzero(&sf, sizeof(struct sigframe));
629 sf.sf_uc.uc_sigmask = *mask;
630 sf.sf_uc.uc_stack = p->p_sigstk;
631 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
632 sf.sf_uc.uc_mcontext.mc_gs = rgs();
633 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
634
635 /* Allocate and validate space for the signal handler context. */
636 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
637 SIGISMEMBER(psp->ps_sigonstack, sig)) {
638 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
639 p->p_sigstk.ss_size - sizeof(struct sigframe));
640 p->p_sigstk.ss_flags |= SS_ONSTACK;
641 }
642 else
643 sfp = (struct sigframe *)regs->tf_esp - 1;
644
645 /* Translate the signal is appropriate */
646 if (p->p_sysent->sv_sigtbl) {
647 if (sig <= p->p_sysent->sv_sigsize)
648 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
649 }
650
651 /* Build the argument list for the signal handler. */
652 sf.sf_signum = sig;
653 sf.sf_ucontext = (register_t)&sfp->sf_uc;
654 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
655 /* Signal handler installed with SA_SIGINFO. */
656 sf.sf_siginfo = (register_t)&sfp->sf_si;
657 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
658
659 /* fill siginfo structure */
660 sf.sf_si.si_signo = sig;
661 sf.sf_si.si_code = code;
662 sf.sf_si.si_addr = (void*)regs->tf_err;
663 }
664 else {
665 /* Old FreeBSD-style arguments. */
666 sf.sf_siginfo = code;
667 sf.sf_addr = regs->tf_err;
668 sf.sf_ahu.sf_handler = catcher;
669 }
670
671 /*
672 * If we're a vm86 process, we want to save the segment registers.
673 * We also change eflags to be our emulated eflags, not the actual
674 * eflags.
675 */
676 if (regs->tf_eflags & PSL_VM) {
677 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 678 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
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679
680 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
681 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
682 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
683 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
684
685 if (vm86->vm86_has_vme == 0)
686 sf.sf_uc.uc_mcontext.mc_eflags =
687 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
688 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
689
690 /*
691 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
692 * syscalls made by the signal handler. This just avoids
693 * wasting time for our lazy fixup of such faults. PSL_NT
694 * does nothing in vm86 mode, but vm86 programs can set it
695 * almost legitimately in probes for old cpu types.
696 */
697 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
698 }
699
700 /*
701 * Copy the sigframe out to the user's stack.
702 */
703 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
704 /*
705 * Something is wrong with the stack pointer.
706 * ...Kill the process.
707 */
708 sigexit(p, SIGILL);
709 }
710
711 regs->tf_esp = (int)sfp;
712 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
713 regs->tf_eflags &= ~PSL_T;
714 regs->tf_cs = _ucodesel;
715 regs->tf_ds = _udatasel;
716 regs->tf_es = _udatasel;
717 regs->tf_fs = _udatasel;
718 load_gs(_udatasel);
719 regs->tf_ss = _udatasel;
720}
721
722/*
41c20dac
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723 * osigreturn_args(struct osigcontext *sigcntxp)
724 *
984263bc
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725 * System call to cleanup state after a signal
726 * has been taken. Reset signal mask and
727 * stack state from context left by sendsig (above).
728 * Return to previous pc and psl as specified by
729 * context left by sendsig. Check carefully to
730 * make sure that the user has not modified the
731 * state to gain improper privileges.
732 */
733#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
734#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
735
736int
41c20dac 737osigreturn(struct osigreturn_args *uap)
984263bc 738{
41c20dac
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739 struct proc *p = curproc;
740 struct osigcontext *scp;
741 struct trapframe *regs = p->p_md.md_regs;
984263bc
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742 int eflags;
743
744 scp = uap->sigcntxp;
745
746 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
747 return(EFAULT);
748
749 eflags = scp->sc_ps;
750 if (eflags & PSL_VM) {
751 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
752 struct vm86_kernel *vm86;
753
754 /*
755 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
756 * set up the vm86 area, and we can't enter vm86 mode.
757 */
b7c628e4 758 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 759 return (EINVAL);
b7c628e4 760 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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761 if (vm86->vm86_inited == 0)
762 return (EINVAL);
763
764 /* go back to user mode if both flags are set */
765 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
766 trapsignal(p, SIGBUS, 0);
767
768 if (vm86->vm86_has_vme) {
769 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
770 (eflags & VME_USERCHANGE) | PSL_VM;
771 } else {
772 vm86->vm86_eflags = eflags; /* save VIF, VIP */
773 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
774 }
775 tf->tf_vm86_ds = scp->sc_ds;
776 tf->tf_vm86_es = scp->sc_es;
777 tf->tf_vm86_fs = scp->sc_fs;
778 tf->tf_vm86_gs = scp->sc_gs;
779 tf->tf_ds = _udatasel;
780 tf->tf_es = _udatasel;
781 tf->tf_fs = _udatasel;
782 } else {
783 /*
784 * Don't allow users to change privileged or reserved flags.
785 */
786 /*
787 * XXX do allow users to change the privileged flag PSL_RF.
788 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
789 * should sometimes set it there too. tf_eflags is kept in
790 * the signal context during signal handling and there is no
791 * other place to remember it, so the PSL_RF bit may be
792 * corrupted by the signal handler without us knowing.
793 * Corruption of the PSL_RF bit at worst causes one more or
794 * one less debugger trap, so allowing it is fairly harmless.
795 */
796 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
797 return(EINVAL);
798 }
799
800 /*
801 * Don't allow users to load a valid privileged %cs. Let the
802 * hardware check for invalid selectors, excess privilege in
803 * other selectors, invalid %eip's and invalid %esp's.
804 */
805 if (!CS_SECURE(scp->sc_cs)) {
806 trapsignal(p, SIGBUS, T_PROTFLT);
807 return(EINVAL);
808 }
809 regs->tf_ds = scp->sc_ds;
810 regs->tf_es = scp->sc_es;
811 regs->tf_fs = scp->sc_fs;
812 }
813
814 /* restore scratch registers */
815 regs->tf_eax = scp->sc_eax;
816 regs->tf_ebx = scp->sc_ebx;
817 regs->tf_ecx = scp->sc_ecx;
818 regs->tf_edx = scp->sc_edx;
819 regs->tf_esi = scp->sc_esi;
820 regs->tf_edi = scp->sc_edi;
821 regs->tf_cs = scp->sc_cs;
822 regs->tf_ss = scp->sc_ss;
823 regs->tf_isp = scp->sc_isp;
824
825 if (scp->sc_onstack & 01)
826 p->p_sigstk.ss_flags |= SS_ONSTACK;
827 else
828 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
829
830 SIGSETOLD(p->p_sigmask, scp->sc_mask);
831 SIG_CANTMASK(p->p_sigmask);
832 regs->tf_ebp = scp->sc_fp;
833 regs->tf_esp = scp->sc_sp;
834 regs->tf_eip = scp->sc_pc;
835 regs->tf_eflags = eflags;
836 return(EJUSTRETURN);
837}
838
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839/*
840 * sigreturn(ucontext_t *sigcntxp)
841 */
984263bc 842int
41c20dac 843sigreturn(struct sigreturn_args *uap)
984263bc 844{
41c20dac 845 struct proc *p = curproc;
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846 struct trapframe *regs;
847 ucontext_t *ucp;
848 int cs, eflags;
849
850 ucp = uap->sigcntxp;
851
852 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
853 return (EFAULT);
854 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
41c20dac 855 return (osigreturn((struct osigreturn_args *)uap));
984263bc
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856
857 /*
858 * Since ucp is not an osigcontext but a ucontext_t, we have to
859 * check again if all of it is accessible. A ucontext_t is
860 * much larger, so instead of just checking for the pointer
861 * being valid for the size of an osigcontext, now check for
862 * it being valid for a whole, new-style ucontext_t.
863 */
864 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
865 return (EFAULT);
866
867 regs = p->p_md.md_regs;
868 eflags = ucp->uc_mcontext.mc_eflags;
869
870 if (eflags & PSL_VM) {
871 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
872 struct vm86_kernel *vm86;
873
874 /*
875 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
876 * set up the vm86 area, and we can't enter vm86 mode.
877 */
b7c628e4 878 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 879 return (EINVAL);
b7c628e4 880 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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881 if (vm86->vm86_inited == 0)
882 return (EINVAL);
883
884 /* go back to user mode if both flags are set */
885 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
886 trapsignal(p, SIGBUS, 0);
887
888 if (vm86->vm86_has_vme) {
889 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
890 (eflags & VME_USERCHANGE) | PSL_VM;
891 } else {
892 vm86->vm86_eflags = eflags; /* save VIF, VIP */
893 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
894 }
895 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
896 tf->tf_eflags = eflags;
897 tf->tf_vm86_ds = tf->tf_ds;
898 tf->tf_vm86_es = tf->tf_es;
899 tf->tf_vm86_fs = tf->tf_fs;
900 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
901 tf->tf_ds = _udatasel;
902 tf->tf_es = _udatasel;
903 tf->tf_fs = _udatasel;
904 } else {
905 /*
906 * Don't allow users to change privileged or reserved flags.
907 */
908 /*
909 * XXX do allow users to change the privileged flag PSL_RF.
910 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
911 * should sometimes set it there too. tf_eflags is kept in
912 * the signal context during signal handling and there is no
913 * other place to remember it, so the PSL_RF bit may be
914 * corrupted by the signal handler without us knowing.
915 * Corruption of the PSL_RF bit at worst causes one more or
916 * one less debugger trap, so allowing it is fairly harmless.
917 */
918 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
919 printf("sigreturn: eflags = 0x%x\n", eflags);
920 return(EINVAL);
921 }
922
923 /*
924 * Don't allow users to load a valid privileged %cs. Let the
925 * hardware check for invalid selectors, excess privilege in
926 * other selectors, invalid %eip's and invalid %esp's.
927 */
928 cs = ucp->uc_mcontext.mc_cs;
929 if (!CS_SECURE(cs)) {
930 printf("sigreturn: cs = 0x%x\n", cs);
931 trapsignal(p, SIGBUS, T_PROTFLT);
932 return(EINVAL);
933 }
934 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
935 }
936
937 if (ucp->uc_mcontext.mc_onstack & 1)
938 p->p_sigstk.ss_flags |= SS_ONSTACK;
939 else
940 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
941
942 p->p_sigmask = ucp->uc_sigmask;
943 SIG_CANTMASK(p->p_sigmask);
944 return(EJUSTRETURN);
945}
946
947/*
948 * Machine dependent boot() routine
949 *
950 * I haven't seen anything to put here yet
951 * Possibly some stuff might be grafted back here from boot()
952 */
953void
954cpu_boot(int howto)
955{
956}
957
958/*
959 * Shutdown the CPU as much as possible
960 */
961void
962cpu_halt(void)
963{
964 for (;;)
965 __asm__ ("hlt");
966}
967
968/*
8ad65e08
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969 * cpu_idle() represents the idle LWKT. You cannot return from this function
970 * (unless you want to blow things up!). Instead we look for runnable threads
971 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 972 *
8ad65e08
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973 * Note on cpu_idle_hlt: On an SMP system this may cause the system to
974 * halt until the next clock tick, even if a thread is ready YYY
984263bc
MD
975 */
976#ifdef SMP
977static int cpu_idle_hlt = 0;
978#else
979static int cpu_idle_hlt = 1;
980#endif
981SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
982 &cpu_idle_hlt, 0, "Idle loop HLT enable");
983
984void
985cpu_idle(void)
986{
f1d1c3fa 987 spl0();
8ad65e08 988 for (;;) {
8ad65e08
MD
989 lwkt_switch();
990 if (cpu_idle_hlt) {
991 /*
992 * We must guarentee that hlt is exactly the instruction
993 * following the sti.
994 */
995 __asm __volatile("sti; hlt");
996 } else {
997 __asm __volatile("sti");
998 }
8ad65e08 999 /* YYY BGL */
984263bc
MD
1000 }
1001}
1002
1003/*
1004 * Clear registers on exec
1005 */
1006void
1007setregs(p, entry, stack, ps_strings)
1008 struct proc *p;
1009 u_long entry;
1010 u_long stack;
1011 u_long ps_strings;
1012{
1013 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 1014 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
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1015
1016 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1017 pcb->pcb_gs = _udatasel;
1018 load_gs(_udatasel);
1019
1020#ifdef USER_LDT
1021 /* was i386_user_cleanup() in NetBSD */
1022 user_ldt_free(pcb);
1023#endif
1024
1025 bzero((char *)regs, sizeof(struct trapframe));
1026 regs->tf_eip = entry;
1027 regs->tf_esp = stack;
1028 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1029 regs->tf_ss = _udatasel;
1030 regs->tf_ds = _udatasel;
1031 regs->tf_es = _udatasel;
1032 regs->tf_fs = _udatasel;
1033 regs->tf_cs = _ucodesel;
1034
1035 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1036 regs->tf_ebx = ps_strings;
1037
1038 /*
1039 * Reset the hardware debug registers if they were in use.
1040 * They won't have any meaning for the newly exec'd process.
1041 */
1042 if (pcb->pcb_flags & PCB_DBREGS) {
1043 pcb->pcb_dr0 = 0;
1044 pcb->pcb_dr1 = 0;
1045 pcb->pcb_dr2 = 0;
1046 pcb->pcb_dr3 = 0;
1047 pcb->pcb_dr6 = 0;
1048 pcb->pcb_dr7 = 0;
b7c628e4 1049 if (pcb == curthread->td_pcb) {
984263bc
MD
1050 /*
1051 * Clear the debug registers on the running
1052 * CPU, otherwise they will end up affecting
1053 * the next process we switch to.
1054 */
1055 reset_dbregs();
1056 }
1057 pcb->pcb_flags &= ~PCB_DBREGS;
1058 }
1059
1060 /*
1061 * Initialize the math emulator (if any) for the current process.
1062 * Actually, just clear the bit that says that the emulator has
1063 * been initialized. Initialization is delayed until the process
1064 * traps to the emulator (if it is done at all) mainly because
1065 * emulators don't provide an entry point for initialization.
1066 */
b7c628e4 1067 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
1068
1069 /*
1070 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1071 * for why fwait must be trapped at least if there is an npx or an
1072 * emulator). This is mainly to handle the case where npx0 is not
1073 * configured, since the npx routines normally set up the trap
1074 * otherwise. It should be done only at boot time, but doing it
1075 * here allows modifying `npx_exists' for testing the emulator on
1076 * systems with an npx.
1077 */
1078 load_cr0(rcr0() | CR0_MP | CR0_TS);
1079
1080#if NNPX > 0
1081 /* Initialize the npx (if any) for the current process. */
1082 npxinit(__INITIAL_NPXCW__);
1083#endif
1084
1085 /*
1086 * XXX - Linux emulator
1087 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1088 * on it.
1089 */
1090 p->p_retval[1] = 0;
1091}
1092
1093void
1094cpu_setregs(void)
1095{
1096 unsigned int cr0;
1097
1098 cr0 = rcr0();
1099 cr0 |= CR0_NE; /* Done by npxinit() */
1100 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1101#ifdef I386_CPU
1102 if (cpu_class != CPUCLASS_386)
1103#endif
1104 cr0 |= CR0_WP | CR0_AM;
1105 load_cr0(cr0);
1106 load_gs(_udatasel);
1107}
1108
1109static int
1110sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1111{
1112 int error;
1113 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1114 req);
1115 if (!error && req->newptr)
1116 resettodr();
1117 return (error);
1118}
1119
1120SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1121 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1122
1123SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1124 CTLFLAG_RW, &disable_rtc_set, 0, "");
1125
1126SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1127 CTLFLAG_RD, &bootinfo, bootinfo, "");
1128
1129SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1130 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1131
1132extern u_long bootdev; /* not a dev_t - encoding is different */
1133SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1134 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1135
1136/*
1137 * Initialize 386 and configure to run kernel
1138 */
1139
1140/*
1141 * Initialize segments & interrupt table
1142 */
1143
1144int _default_ldt;
1145union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1146static struct gate_descriptor idt0[NIDT];
1147struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1148union descriptor ldt[NLDT]; /* local descriptor table */
17a9f566
MD
1149
1150/* table descriptors - used to load tables by cpu */
984263bc 1151struct region_descriptor r_gdt, r_idt;
984263bc 1152
984263bc
MD
1153int private_tss; /* flag indicating private tss */
1154
1155#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1156extern int has_f00f_bug;
1157#endif
1158
1159static struct i386tss dblfault_tss;
1160static char dblfault_stack[PAGE_SIZE];
1161
1162extern struct user *proc0paddr;
1163
1164
1165/* software prototypes -- in more palatable form */
1166struct soft_segment_descriptor gdt_segs[] = {
1167/* GNULL_SEL 0 Null Descriptor */
1168{ 0x0, /* segment base address */
1169 0x0, /* length */
1170 0, /* segment type */
1171 0, /* segment descriptor priority level */
1172 0, /* segment descriptor present */
1173 0, 0,
1174 0, /* default 32 vs 16 bit size */
1175 0 /* limit granularity (byte/page units)*/ },
1176/* GCODE_SEL 1 Code Descriptor for kernel */
1177{ 0x0, /* segment base address */
1178 0xfffff, /* length - all address space */
1179 SDT_MEMERA, /* segment type */
1180 0, /* segment descriptor priority level */
1181 1, /* segment descriptor present */
1182 0, 0,
1183 1, /* default 32 vs 16 bit size */
1184 1 /* limit granularity (byte/page units)*/ },
1185/* GDATA_SEL 2 Data Descriptor for kernel */
1186{ 0x0, /* segment base address */
1187 0xfffff, /* length - all address space */
1188 SDT_MEMRWA, /* segment type */
1189 0, /* segment descriptor priority level */
1190 1, /* segment descriptor present */
1191 0, 0,
1192 1, /* default 32 vs 16 bit size */
1193 1 /* limit granularity (byte/page units)*/ },
1194/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1195{ 0x0, /* segment base address */
1196 0xfffff, /* length - all address space */
1197 SDT_MEMRWA, /* segment type */
1198 0, /* segment descriptor priority level */
1199 1, /* segment descriptor present */
1200 0, 0,
1201 1, /* default 32 vs 16 bit size */
1202 1 /* limit granularity (byte/page units)*/ },
1203/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1204{
1205 0x0, /* segment base address */
1206 sizeof(struct i386tss)-1,/* length - all address space */
1207 SDT_SYS386TSS, /* segment type */
1208 0, /* segment descriptor priority level */
1209 1, /* segment descriptor present */
1210 0, 0,
1211 0, /* unused - default 32 vs 16 bit size */
1212 0 /* limit granularity (byte/page units)*/ },
1213/* GLDT_SEL 5 LDT Descriptor */
1214{ (int) ldt, /* segment base address */
1215 sizeof(ldt)-1, /* length - all address space */
1216 SDT_SYSLDT, /* segment type */
1217 SEL_UPL, /* segment descriptor priority level */
1218 1, /* segment descriptor present */
1219 0, 0,
1220 0, /* unused - default 32 vs 16 bit size */
1221 0 /* limit granularity (byte/page units)*/ },
1222/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1223{ (int) ldt, /* segment base address */
1224 (512 * sizeof(union descriptor)-1), /* length */
1225 SDT_SYSLDT, /* segment type */
1226 0, /* segment descriptor priority level */
1227 1, /* segment descriptor present */
1228 0, 0,
1229 0, /* unused - default 32 vs 16 bit size */
1230 0 /* limit granularity (byte/page units)*/ },
1231/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1232{ 0x0, /* segment base address */
1233 0x0, /* length - all address space */
1234 0, /* segment type */
1235 0, /* segment descriptor priority level */
1236 0, /* segment descriptor present */
1237 0, 0,
1238 0, /* default 32 vs 16 bit size */
1239 0 /* limit granularity (byte/page units)*/ },
1240/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1241{ 0x400, /* segment base address */
1242 0xfffff, /* length */
1243 SDT_MEMRWA, /* segment type */
1244 0, /* segment descriptor priority level */
1245 1, /* segment descriptor present */
1246 0, 0,
1247 1, /* default 32 vs 16 bit size */
1248 1 /* limit granularity (byte/page units)*/ },
1249/* GPANIC_SEL 9 Panic Tss Descriptor */
1250{ (int) &dblfault_tss, /* segment base address */
1251 sizeof(struct i386tss)-1,/* length - all address space */
1252 SDT_SYS386TSS, /* segment type */
1253 0, /* segment descriptor priority level */
1254 1, /* segment descriptor present */
1255 0, 0,
1256 0, /* unused - default 32 vs 16 bit size */
1257 0 /* limit granularity (byte/page units)*/ },
1258/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1259{ 0, /* segment base address (overwritten) */
1260 0xfffff, /* length */
1261 SDT_MEMERA, /* segment type */
1262 0, /* segment descriptor priority level */
1263 1, /* segment descriptor present */
1264 0, 0,
1265 0, /* default 32 vs 16 bit size */
1266 1 /* limit granularity (byte/page units)*/ },
1267/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1268{ 0, /* segment base address (overwritten) */
1269 0xfffff, /* length */
1270 SDT_MEMERA, /* segment type */
1271 0, /* segment descriptor priority level */
1272 1, /* segment descriptor present */
1273 0, 0,
1274 0, /* default 32 vs 16 bit size */
1275 1 /* limit granularity (byte/page units)*/ },
1276/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1277{ 0, /* segment base address (overwritten) */
1278 0xfffff, /* length */
1279 SDT_MEMRWA, /* segment type */
1280 0, /* segment descriptor priority level */
1281 1, /* segment descriptor present */
1282 0, 0,
1283 1, /* default 32 vs 16 bit size */
1284 1 /* limit granularity (byte/page units)*/ },
1285/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1286{ 0, /* segment base address (overwritten) */
1287 0xfffff, /* length */
1288 SDT_MEMRWA, /* segment type */
1289 0, /* segment descriptor priority level */
1290 1, /* segment descriptor present */
1291 0, 0,
1292 0, /* default 32 vs 16 bit size */
1293 1 /* limit granularity (byte/page units)*/ },
1294/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1295{ 0, /* segment base address (overwritten) */
1296 0xfffff, /* length */
1297 SDT_MEMRWA, /* segment type */
1298 0, /* segment descriptor priority level */
1299 1, /* segment descriptor present */
1300 0, 0,
1301 0, /* default 32 vs 16 bit size */
1302 1 /* limit granularity (byte/page units)*/ },
1303};
1304
1305static struct soft_segment_descriptor ldt_segs[] = {
1306 /* Null Descriptor - overwritten by call gate */
1307{ 0x0, /* segment base address */
1308 0x0, /* length - all address space */
1309 0, /* segment type */
1310 0, /* segment descriptor priority level */
1311 0, /* segment descriptor present */
1312 0, 0,
1313 0, /* default 32 vs 16 bit size */
1314 0 /* limit granularity (byte/page units)*/ },
1315 /* Null Descriptor - overwritten by call gate */
1316{ 0x0, /* segment base address */
1317 0x0, /* length - all address space */
1318 0, /* segment type */
1319 0, /* segment descriptor priority level */
1320 0, /* segment descriptor present */
1321 0, 0,
1322 0, /* default 32 vs 16 bit size */
1323 0 /* limit granularity (byte/page units)*/ },
1324 /* Null Descriptor - overwritten by call gate */
1325{ 0x0, /* segment base address */
1326 0x0, /* length - all address space */
1327 0, /* segment type */
1328 0, /* segment descriptor priority level */
1329 0, /* segment descriptor present */
1330 0, 0,
1331 0, /* default 32 vs 16 bit size */
1332 0 /* limit granularity (byte/page units)*/ },
1333 /* Code Descriptor for user */
1334{ 0x0, /* segment base address */
1335 0xfffff, /* length - all address space */
1336 SDT_MEMERA, /* segment type */
1337 SEL_UPL, /* segment descriptor priority level */
1338 1, /* segment descriptor present */
1339 0, 0,
1340 1, /* default 32 vs 16 bit size */
1341 1 /* limit granularity (byte/page units)*/ },
1342 /* Null Descriptor - overwritten by call gate */
1343{ 0x0, /* segment base address */
1344 0x0, /* length - all address space */
1345 0, /* segment type */
1346 0, /* segment descriptor priority level */
1347 0, /* segment descriptor present */
1348 0, 0,
1349 0, /* default 32 vs 16 bit size */
1350 0 /* limit granularity (byte/page units)*/ },
1351 /* Data Descriptor for user */
1352{ 0x0, /* segment base address */
1353 0xfffff, /* length - all address space */
1354 SDT_MEMRWA, /* segment type */
1355 SEL_UPL, /* segment descriptor priority level */
1356 1, /* segment descriptor present */
1357 0, 0,
1358 1, /* default 32 vs 16 bit size */
1359 1 /* limit granularity (byte/page units)*/ },
1360};
1361
1362void
1363setidt(idx, func, typ, dpl, selec)
1364 int idx;
1365 inthand_t *func;
1366 int typ;
1367 int dpl;
1368 int selec;
1369{
1370 struct gate_descriptor *ip;
1371
1372 ip = idt + idx;
1373 ip->gd_looffset = (int)func;
1374 ip->gd_selector = selec;
1375 ip->gd_stkcpy = 0;
1376 ip->gd_xx = 0;
1377 ip->gd_type = typ;
1378 ip->gd_dpl = dpl;
1379 ip->gd_p = 1;
1380 ip->gd_hioffset = ((int)func)>>16 ;
1381}
1382
1383#define IDTVEC(name) __CONCAT(X,name)
1384
1385extern inthand_t
1386 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1387 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1388 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1389 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1390 IDTVEC(xmm), IDTVEC(syscall), IDTVEC(int0x80_syscall);
1391
1392void
1393sdtossd(sd, ssd)
1394 struct segment_descriptor *sd;
1395 struct soft_segment_descriptor *ssd;
1396{
1397 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1398 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1399 ssd->ssd_type = sd->sd_type;
1400 ssd->ssd_dpl = sd->sd_dpl;
1401 ssd->ssd_p = sd->sd_p;
1402 ssd->ssd_def32 = sd->sd_def32;
1403 ssd->ssd_gran = sd->sd_gran;
1404}
1405
1406#define PHYSMAP_SIZE (2 * 8)
1407
1408/*
1409 * Populate the (physmap) array with base/bound pairs describing the
1410 * available physical memory in the system, then test this memory and
1411 * build the phys_avail array describing the actually-available memory.
1412 *
1413 * If we cannot accurately determine the physical memory map, then use
1414 * value from the 0xE801 call, and failing that, the RTC.
1415 *
1416 * Total memory size may be set by the kernel environment variable
1417 * hw.physmem or the compile-time define MAXMEM.
1418 */
1419static void
1420getmemsize(int first)
1421{
1422 int i, physmap_idx, pa_indx;
1423 int hasbrokenint12;
1424 u_int basemem, extmem;
1425 struct vm86frame vmf;
1426 struct vm86context vmc;
1427 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1428 pt_entry_t pte;
1429 const char *cp;
1430 struct {
1431 u_int64_t base;
1432 u_int64_t length;
1433 u_int32_t type;
1434 } *smap;
1435
1436 hasbrokenint12 = 0;
1437 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1438 bzero(&vmf, sizeof(struct vm86frame));
1439 bzero(physmap, sizeof(physmap));
1440 basemem = 0;
1441
1442 /*
1443 * Some newer BIOSes has broken INT 12H implementation which cause
1444 * kernel panic immediately. In this case, we need to scan SMAP
1445 * with INT 15:E820 first, then determine base memory size.
1446 */
1447 if (hasbrokenint12) {
1448 goto int15e820;
1449 }
1450
1451 /*
1452 * Perform "base memory" related probes & setup
1453 */
1454 vm86_intcall(0x12, &vmf);
1455 basemem = vmf.vmf_ax;
1456 if (basemem > 640) {
1457 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1458 basemem);
1459 basemem = 640;
1460 }
1461
1462 /*
1463 * XXX if biosbasemem is now < 640, there is a `hole'
1464 * between the end of base memory and the start of
1465 * ISA memory. The hole may be empty or it may
1466 * contain BIOS code or data. Map it read/write so
1467 * that the BIOS can write to it. (Memory from 0 to
1468 * the physical end of the kernel is mapped read-only
1469 * to begin with and then parts of it are remapped.
1470 * The parts that aren't remapped form holes that
1471 * remain read-only and are unused by the kernel.
1472 * The base memory area is below the physical end of
1473 * the kernel and right now forms a read-only hole.
1474 * The part of it from PAGE_SIZE to
1475 * (trunc_page(biosbasemem * 1024) - 1) will be
1476 * remapped and used by the kernel later.)
1477 *
1478 * This code is similar to the code used in
1479 * pmap_mapdev, but since no memory needs to be
1480 * allocated we simply change the mapping.
1481 */
1482 for (pa = trunc_page(basemem * 1024);
1483 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1484 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1485 *pte = pa | PG_RW | PG_V;
1486 }
1487
1488 /*
1489 * if basemem != 640, map pages r/w into vm86 page table so
1490 * that the bios can scribble on it.
1491 */
1492 pte = (pt_entry_t)vm86paddr;
1493 for (i = basemem / 4; i < 160; i++)
1494 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1495
1496int15e820:
1497 /*
1498 * map page 1 R/W into the kernel page table so we can use it
1499 * as a buffer. The kernel will unmap this page later.
1500 */
1501 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1502 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1503
1504 /*
1505 * get memory map with INT 15:E820
1506 */
1507#define SMAPSIZ sizeof(*smap)
1508#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1509
1510 vmc.npages = 0;
1511 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1512 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1513
1514 physmap_idx = 0;
1515 vmf.vmf_ebx = 0;
1516 do {
1517 vmf.vmf_eax = 0xE820;
1518 vmf.vmf_edx = SMAP_SIG;
1519 vmf.vmf_ecx = SMAPSIZ;
1520 i = vm86_datacall(0x15, &vmf, &vmc);
1521 if (i || vmf.vmf_eax != SMAP_SIG)
1522 break;
1523 if (boothowto & RB_VERBOSE)
1524 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1525 smap->type,
1526 *(u_int32_t *)((char *)&smap->base + 4),
1527 (u_int32_t)smap->base,
1528 *(u_int32_t *)((char *)&smap->length + 4),
1529 (u_int32_t)smap->length);
1530
1531 if (smap->type != 0x01)
1532 goto next_run;
1533
1534 if (smap->length == 0)
1535 goto next_run;
1536
1537 if (smap->base >= 0xffffffff) {
1538 printf("%uK of memory above 4GB ignored\n",
1539 (u_int)(smap->length / 1024));
1540 goto next_run;
1541 }
1542
1543 for (i = 0; i <= physmap_idx; i += 2) {
1544 if (smap->base < physmap[i + 1]) {
1545 if (boothowto & RB_VERBOSE)
1546 printf(
1547 "Overlapping or non-montonic memory region, ignoring second region\n");
1548 goto next_run;
1549 }
1550 }
1551
1552 if (smap->base == physmap[physmap_idx + 1]) {
1553 physmap[physmap_idx + 1] += smap->length;
1554 goto next_run;
1555 }
1556
1557 physmap_idx += 2;
1558 if (physmap_idx == PHYSMAP_SIZE) {
1559 printf(
1560 "Too many segments in the physical address map, giving up\n");
1561 break;
1562 }
1563 physmap[physmap_idx] = smap->base;
1564 physmap[physmap_idx + 1] = smap->base + smap->length;
1565next_run:
1566 } while (vmf.vmf_ebx != 0);
1567
1568 /*
1569 * Perform "base memory" related probes & setup based on SMAP
1570 */
1571 if (basemem == 0) {
1572 for (i = 0; i <= physmap_idx; i += 2) {
1573 if (physmap[i] == 0x00000000) {
1574 basemem = physmap[i + 1] / 1024;
1575 break;
1576 }
1577 }
1578
1579 if (basemem == 0) {
1580 basemem = 640;
1581 }
1582
1583 if (basemem > 640) {
1584 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1585 basemem);
1586 basemem = 640;
1587 }
1588
1589 for (pa = trunc_page(basemem * 1024);
1590 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1591 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1592 *pte = pa | PG_RW | PG_V;
1593 }
1594
1595 pte = (pt_entry_t)vm86paddr;
1596 for (i = basemem / 4; i < 160; i++)
1597 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1598 }
1599
1600 if (physmap[1] != 0)
1601 goto physmap_done;
1602
1603 /*
1604 * If we failed above, try memory map with INT 15:E801
1605 */
1606 vmf.vmf_ax = 0xE801;
1607 if (vm86_intcall(0x15, &vmf) == 0) {
1608 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1609 } else {
1610#if 0
1611 vmf.vmf_ah = 0x88;
1612 vm86_intcall(0x15, &vmf);
1613 extmem = vmf.vmf_ax;
1614#else
1615 /*
1616 * Prefer the RTC value for extended memory.
1617 */
1618 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1619#endif
1620 }
1621
1622 /*
1623 * Special hack for chipsets that still remap the 384k hole when
1624 * there's 16MB of memory - this really confuses people that
1625 * are trying to use bus mastering ISA controllers with the
1626 * "16MB limit"; they only have 16MB, but the remapping puts
1627 * them beyond the limit.
1628 *
1629 * If extended memory is between 15-16MB (16-17MB phys address range),
1630 * chop it to 15MB.
1631 */
1632 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1633 extmem = 15 * 1024;
1634
1635 physmap[0] = 0;
1636 physmap[1] = basemem * 1024;
1637 physmap_idx = 2;
1638 physmap[physmap_idx] = 0x100000;
1639 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1640
1641physmap_done:
1642 /*
1643 * Now, physmap contains a map of physical memory.
1644 */
1645
1646#ifdef SMP
17a9f566 1647 /* make hole for AP bootstrap code YYY */
984263bc
MD
1648 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1649
1650 /* look for the MP hardware - needed for apic addresses */
1651 mp_probe();
1652#endif
1653
1654 /*
1655 * Maxmem isn't the "maximum memory", it's one larger than the
1656 * highest page of the physical address space. It should be
1657 * called something like "Maxphyspage". We may adjust this
1658 * based on ``hw.physmem'' and the results of the memory test.
1659 */
1660 Maxmem = atop(physmap[physmap_idx + 1]);
1661
1662#ifdef MAXMEM
1663 Maxmem = MAXMEM / 4;
1664#endif
1665
1666 /*
1667 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1668 * for the appropriate modifiers. This overrides MAXMEM.
1669 */
1670 if ((cp = getenv("hw.physmem")) != NULL) {
1671 u_int64_t AllowMem, sanity;
1672 char *ep;
1673
1674 sanity = AllowMem = strtouq(cp, &ep, 0);
1675 if ((ep != cp) && (*ep != 0)) {
1676 switch(*ep) {
1677 case 'g':
1678 case 'G':
1679 AllowMem <<= 10;
1680 case 'm':
1681 case 'M':
1682 AllowMem <<= 10;
1683 case 'k':
1684 case 'K':
1685 AllowMem <<= 10;
1686 break;
1687 default:
1688 AllowMem = sanity = 0;
1689 }
1690 if (AllowMem < sanity)
1691 AllowMem = 0;
1692 }
1693 if (AllowMem == 0)
1694 printf("Ignoring invalid memory size of '%s'\n", cp);
1695 else
1696 Maxmem = atop(AllowMem);
1697 }
1698
1699 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1700 (boothowto & RB_VERBOSE))
1701 printf("Physical memory use set to %uK\n", Maxmem * 4);
1702
1703 /*
1704 * If Maxmem has been increased beyond what the system has detected,
1705 * extend the last memory segment to the new limit.
1706 */
1707 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1708 physmap[physmap_idx + 1] = ptoa(Maxmem);
1709
1710 /* call pmap initialization to make new kernel address space */
1711 pmap_bootstrap(first, 0);
1712
1713 /*
1714 * Size up each available chunk of physical memory.
1715 */
1716 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1717 pa_indx = 0;
1718 phys_avail[pa_indx++] = physmap[0];
1719 phys_avail[pa_indx] = physmap[0];
1720#if 0
1721 pte = (pt_entry_t)vtopte(KERNBASE);
1722#else
1723 pte = (pt_entry_t)CMAP1;
1724#endif
1725
1726 /*
1727 * physmap is in bytes, so when converting to page boundaries,
1728 * round up the start address and round down the end address.
1729 */
1730 for (i = 0; i <= physmap_idx; i += 2) {
1731 vm_offset_t end;
1732
1733 end = ptoa(Maxmem);
1734 if (physmap[i + 1] < end)
1735 end = trunc_page(physmap[i + 1]);
1736 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1737 int tmp, page_bad;
1738#if 0
1739 int *ptr = 0;
1740#else
1741 int *ptr = (int *)CADDR1;
1742#endif
1743
1744 /*
1745 * block out kernel memory as not available.
1746 */
1747 if (pa >= 0x100000 && pa < first)
1748 continue;
1749
1750 page_bad = FALSE;
1751
1752 /*
1753 * map page into kernel: valid, read/write,non-cacheable
1754 */
1755 *pte = pa | PG_V | PG_RW | PG_N;
1756 invltlb();
1757
1758 tmp = *(int *)ptr;
1759 /*
1760 * Test for alternating 1's and 0's
1761 */
1762 *(volatile int *)ptr = 0xaaaaaaaa;
1763 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1764 page_bad = TRUE;
1765 }
1766 /*
1767 * Test for alternating 0's and 1's
1768 */
1769 *(volatile int *)ptr = 0x55555555;
1770 if (*(volatile int *)ptr != 0x55555555) {
1771 page_bad = TRUE;
1772 }
1773 /*
1774 * Test for all 1's
1775 */
1776 *(volatile int *)ptr = 0xffffffff;
1777 if (*(volatile int *)ptr != 0xffffffff) {
1778 page_bad = TRUE;
1779 }
1780 /*
1781 * Test for all 0's
1782 */
1783 *(volatile int *)ptr = 0x0;
1784 if (*(volatile int *)ptr != 0x0) {
1785 page_bad = TRUE;
1786 }
1787 /*
1788 * Restore original value.
1789 */
1790 *(int *)ptr = tmp;
1791
1792 /*
1793 * Adjust array of valid/good pages.
1794 */
1795 if (page_bad == TRUE) {
1796 continue;
1797 }
1798 /*
1799 * If this good page is a continuation of the
1800 * previous set of good pages, then just increase
1801 * the end pointer. Otherwise start a new chunk.
1802 * Note that "end" points one higher than end,
1803 * making the range >= start and < end.
1804 * If we're also doing a speculative memory
1805 * test and we at or past the end, bump up Maxmem
1806 * so that we keep going. The first bad page
1807 * will terminate the loop.
1808 */
1809 if (phys_avail[pa_indx] == pa) {
1810 phys_avail[pa_indx] += PAGE_SIZE;
1811 } else {
1812 pa_indx++;
1813 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1814 printf("Too many holes in the physical address space, giving up\n");
1815 pa_indx--;
1816 break;
1817 }
1818 phys_avail[pa_indx++] = pa; /* start */
1819 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1820 }
1821 physmem++;
1822 }
1823 }
1824 *pte = 0;
1825 invltlb();
1826
1827 /*
1828 * XXX
1829 * The last chunk must contain at least one page plus the message
1830 * buffer to avoid complicating other code (message buffer address
1831 * calculation, etc.).
1832 */
1833 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1834 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1835 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1836 phys_avail[pa_indx--] = 0;
1837 phys_avail[pa_indx--] = 0;
1838 }
1839
1840 Maxmem = atop(phys_avail[pa_indx]);
1841
1842 /* Trim off space for the message buffer. */
1843 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1844
1845 avail_end = phys_avail[pa_indx];
1846}
1847
1848void
17a9f566 1849init386(int first)
984263bc
MD
1850{
1851 struct gate_descriptor *gdp;
1852 int gsel_tss, metadata_missing, off, x;
84b592ba 1853 struct globaldata *gd;
984263bc
MD
1854
1855 /*
1856 * Prevent lowering of the ipl if we call tsleep() early.
1857 */
7d0bac62 1858 gd = &CPU_prvspace[0].globaldata;
984263bc 1859
99df837e 1860 lwkt_init_thread(&thread0, proc0paddr, 0);
7d0bac62 1861 gd->gd_curthread = &thread0;
8f41e33b 1862 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
7d0bac62 1863 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
7e1d4bf4 1864 proc0.p_addr = (void *)thread0.td_kstack;
b7c628e4
MD
1865 proc0.p_thread = &thread0;
1866 thread0.td_proc = &proc0;
984263bc
MD
1867
1868 atdevbase = ISA_HOLE_START + KERNBASE;
1869
1870 metadata_missing = 0;
1871 if (bootinfo.bi_modulep) {
1872 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1873 preload_bootstrap_relocate(KERNBASE);
1874 } else {
1875 metadata_missing = 1;
1876 }
1877 if (bootinfo.bi_envp)
1878 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1879
1880 /* Init basic tunables, hz etc */
1881 init_param1();
1882
1883 /*
1884 * make gdt memory segments, the code segment goes up to end of the
1885 * page with etext in it, the data segment goes to the end of
1886 * the address space
1887 */
1888 /*
1889 * XXX text protection is temporarily (?) disabled. The limit was
1890 * i386_btop(round_page(etext)) - 1.
1891 */
1892 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1893 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1894
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1895 gdt_segs[GPRIV_SEL].ssd_limit =
1896 atop(sizeof(struct privatespace) - 1);
8ad65e08 1897 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1898 gdt_segs[GPROC0_SEL].ssd_base =
8ad65e08 1899 (int) &CPU_prvspace[0].globaldata.gd_common_tss;
17a9f566 1900
8ad65e08 1901 gd->gd_prvspace = &CPU_prvspace[0];
17a9f566 1902
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1903 /*
1904 * Note: on both UP and SMP curthread must be set non-NULL
1905 * early in the boot sequence because the system assumes
1906 * that 'curthread' is never NULL.
1907 */
1908 /* YYY use prvspace for UP too and set here rather then later */
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MD
1909 mi_gdinit(gd, 0);
1910 cpu_gdinit(gd, 0);
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1911
1912 for (x = 0; x < NGDT; x++) {
1913#ifdef BDE_DEBUGGER
1914 /* avoid overwriting db entries with APM ones */
1915 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1916 continue;
1917#endif
1918 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1919 }
1920
1921 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1922 r_gdt.rd_base = (int) gdt;
1923 lgdt(&r_gdt);
1924
1925 /* make ldt memory segments */
1926 /*
1927 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1928 * should be spelled ...MAX_USER...
1929 */
1930 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1931 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1932 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1933 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1934
1935 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1936 lldt(_default_ldt);
1937#ifdef USER_LDT
17a9f566 1938 gd->gd_currentldt = _default_ldt;
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1939#endif
1940
1941 /* exceptions */
1942 for (x = 0; x < NIDT; x++)
1943 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1944 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1946 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1947 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1948 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1949 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1952 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1953 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(0x80, &IDTVEC(int0x80_syscall),
1965 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1966
1967 r_idt.rd_limit = sizeof(idt0) - 1;
1968 r_idt.rd_base = (int) idt;
1969 lidt(&r_idt);
1970
1971 /*
1972 * Initialize the console before we print anything out.
1973 */
1974 cninit();
1975
1976 if (metadata_missing)
1977 printf("WARNING: loader(8) metadata is missing!\n");
1978
1979#include "isa.h"
1980#if NISA >0
1981 isa_defaultirq();
1982#endif
1983 rand_initialize();
1984
1985#ifdef DDB
1986 kdb_init();
1987 if (boothowto & RB_KDB)
1988 Debugger("Boot flags requested debugger");
1989#endif
1990
1991 finishidentcpu(); /* Final stage of CPU initialization */
1992 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1993 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1994 initializecpu(); /* Initialize CPU registers */
1995
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1996 /*
1997 * make an initial tss so cpu can get interrupt stack on syscall!
1998 * The 16 bytes is to save room for a VM86 context.
1999 */
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2000 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2001 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
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2002 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2003 private_tss = 0;
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MD
2004 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2005 gd->gd_common_tssd = *gd->gd_tss_gdt;
2006 gd->gd_common_tss.tss_ioopt = (sizeof common_tss) << 16;
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2007 ltr(gsel_tss);
2008
2009 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2010 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2011 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2012 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2013 dblfault_tss.tss_cr3 = (int)IdlePTD;
2014 dblfault_tss.tss_eip = (int) dblfault_handler;
2015 dblfault_tss.tss_eflags = PSL_KERNEL;
2016 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2017 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2018 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2019 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2020 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2021
2022 vm86_initialize();
2023 getmemsize(first);
2024 init_param2(physmem);
2025
2026 /* now running on new page tables, configured,and u/iom is accessible */
2027
2028 /* Map the message buffer. */
2029 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2030 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2031
2032 msgbufinit(msgbufp, MSGBUF_SIZE);
2033
2034 /* make a call gate to reenter kernel with */
2035 gdp = &ldt[LSYS5CALLS_SEL].gd;
2036
2037 x = (int) &IDTVEC(syscall);
2038 gdp->gd_looffset = x++;
2039 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2040 gdp->gd_stkcpy = 1;
2041 gdp->gd_type = SDT_SYS386CGT;
2042 gdp->gd_dpl = SEL_UPL;
2043 gdp->gd_p = 1;
2044 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2045
2046 /* XXX does this work? */
2047 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2048 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2049
2050 /* transfer to user mode */
2051
2052 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2053 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2054
2055 /* setup proc 0's pcb */
b7c628e4
MD
2056 thread0.td_pcb->pcb_flags = 0;
2057 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
984263bc 2058#ifdef SMP
17a9f566 2059#if 0
b7c628e4 2060 thread0.td_pcb->pcb_mpnest = 1;
17a9f566 2061#endif
984263bc 2062#endif
b7c628e4 2063 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2064 proc0.p_md.md_regs = &proc0_tf;
2065}
2066
8ad65e08 2067/*
17a9f566
MD
2068 * Initialize machine-dependant portions of the global data structure.
2069 * Note that the global data area and cpu0's idlestack in the private
2070 * data space were allocated in locore.
8ad65e08
MD
2071 */
2072void
2073cpu_gdinit(struct globaldata *gd, int cpu)
2074{
2075 char *sp;
8ad65e08 2076
7d0bac62
MD
2077 TAILQ_INIT(&gd->gd_tdfreeq); /* for pmap_{new,dispose}_thread() */
2078 if (cpu)
17a9f566
MD
2079 gd->gd_curthread = &gd->gd_idlethread;
2080
8ad65e08 2081 sp = gd->gd_prvspace->idlestack;
99df837e 2082 lwkt_init_thread(&gd->gd_idlethread, sp, 0);
8ad65e08 2083 gd->gd_idlethread.td_switch = cpu_lwkt_switch;
7d0bac62 2084 gd->gd_idlethread.td_sp -= sizeof(void *);
8ad65e08 2085 *(void **)gd->gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2086}
2087
984263bc
MD
2088#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2089static void f00f_hack(void *unused);
2090SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2091
2092static void
17a9f566
MD
2093f00f_hack(void *unused)
2094{
984263bc 2095 struct gate_descriptor *new_idt;
984263bc
MD
2096 vm_offset_t tmp;
2097
2098 if (!has_f00f_bug)
2099 return;
2100
2101 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2102
2103 r_idt.rd_limit = sizeof(idt0) - 1;
2104
2105 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2106 if (tmp == 0)
2107 panic("kmem_alloc returned 0");
2108 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2109 panic("kmem_alloc returned non-page-aligned memory");
2110 /* Put the first seven entries in the lower page */
2111 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2112 bcopy(idt, new_idt, sizeof(idt0));
2113 r_idt.rd_base = (int)new_idt;
2114 lidt(&r_idt);
2115 idt = new_idt;
2116 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2117 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2118 panic("vm_map_protect failed");
2119 return;
2120}
2121#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2122
2123int
2124ptrace_set_pc(p, addr)
2125 struct proc *p;
2126 unsigned long addr;
2127{
2128 p->p_md.md_regs->tf_eip = addr;
2129 return (0);
2130}
2131
2132int
2133ptrace_single_step(p)
2134 struct proc *p;
2135{
2136 p->p_md.md_regs->tf_eflags |= PSL_T;
2137 return (0);
2138}
2139
2140int ptrace_read_u_check(p, addr, len)
2141 struct proc *p;
2142 vm_offset_t addr;
2143 size_t len;
2144{
2145 vm_offset_t gap;
2146
2147 if ((vm_offset_t) (addr + len) < addr)
2148 return EPERM;
2149 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2150 return 0;
2151
2152 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2153
2154 if ((vm_offset_t) addr < gap)
2155 return EPERM;
2156 if ((vm_offset_t) (addr + len) <=
2157 (vm_offset_t) (gap + sizeof(struct trapframe)))
2158 return 0;
2159 return EPERM;
2160}
2161
2162int ptrace_write_u(p, off, data)
2163 struct proc *p;
2164 vm_offset_t off;
2165 long data;
2166{
2167 struct trapframe frame_copy;
2168 vm_offset_t min;
2169 struct trapframe *tp;
2170
2171 /*
2172 * Privileged kernel state is scattered all over the user area.
2173 * Only allow write access to parts of regs and to fpregs.
2174 */
2175 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2176 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2177 tp = p->p_md.md_regs;
2178 frame_copy = *tp;
2179 *(int *)((char *)&frame_copy + (off - min)) = data;
2180 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2181 !CS_SECURE(frame_copy.tf_cs))
2182 return (EINVAL);
2183 *(int*)((char *)p->p_addr + off) = data;
2184 return (0);
2185 }
b7c628e4
MD
2186
2187 /*
2188 * The PCB is at the end of the user area YYY
2189 */
2190 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2191 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2192 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2193 *(int*)((char *)p->p_addr + off) = data;
2194 return (0);
2195 }
2196 return (EFAULT);
2197}
2198
2199int
2200fill_regs(p, regs)
2201 struct proc *p;
2202 struct reg *regs;
2203{
2204 struct pcb *pcb;
2205 struct trapframe *tp;
2206
2207 tp = p->p_md.md_regs;
2208 regs->r_fs = tp->tf_fs;
2209 regs->r_es = tp->tf_es;
2210 regs->r_ds = tp->tf_ds;
2211 regs->r_edi = tp->tf_edi;
2212 regs->r_esi = tp->tf_esi;
2213 regs->r_ebp = tp->tf_ebp;
2214 regs->r_ebx = tp->tf_ebx;
2215 regs->r_edx = tp->tf_edx;
2216 regs->r_ecx = tp->tf_ecx;
2217 regs->r_eax = tp->tf_eax;
2218 regs->r_eip = tp->tf_eip;
2219 regs->r_cs = tp->tf_cs;
2220 regs->r_eflags = tp->tf_eflags;
2221 regs->r_esp = tp->tf_esp;
2222 regs->r_ss = tp->tf_ss;
b7c628e4 2223 pcb = p->p_thread->td_pcb;
984263bc
MD
2224 regs->r_gs = pcb->pcb_gs;
2225 return (0);
2226}
2227
2228int
2229set_regs(p, regs)
2230 struct proc *p;
2231 struct reg *regs;
2232{
2233 struct pcb *pcb;
2234 struct trapframe *tp;
2235
2236 tp = p->p_md.md_regs;
2237 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2238 !CS_SECURE(regs->r_cs))
2239 return (EINVAL);
2240 tp->tf_fs = regs->r_fs;
2241 tp->tf_es = regs->r_es;
2242 tp->tf_ds = regs->r_ds;
2243 tp->tf_edi = regs->r_edi;
2244 tp->tf_esi = regs->r_esi;
2245 tp->tf_ebp = regs->r_ebp;
2246 tp->tf_ebx = regs->r_ebx;
2247 tp->tf_edx = regs->r_edx;
2248 tp->tf_ecx = regs->r_ecx;
2249 tp->tf_eax = regs->r_eax;
2250 tp->tf_eip = regs->r_eip;
2251 tp->tf_cs = regs->r_cs;
2252 tp->tf_eflags = regs->r_eflags;
2253 tp->tf_esp = regs->r_esp;
2254 tp->tf_ss = regs->r_ss;
b7c628e4 2255 pcb = p->p_thread->td_pcb;
984263bc
MD
2256 pcb->pcb_gs = regs->r_gs;
2257 return (0);
2258}
2259
2260#ifdef CPU_ENABLE_SSE
2261static void
2262fill_fpregs_xmm(sv_xmm, sv_87)
2263 struct savexmm *sv_xmm;
2264 struct save87 *sv_87;
2265{
2266 register struct env87 *penv_87 = &sv_87->sv_env;
2267 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2268 int i;
2269
2270 /* FPU control/status */
2271 penv_87->en_cw = penv_xmm->en_cw;
2272 penv_87->en_sw = penv_xmm->en_sw;
2273 penv_87->en_tw = penv_xmm->en_tw;
2274 penv_87->en_fip = penv_xmm->en_fip;
2275 penv_87->en_fcs = penv_xmm->en_fcs;
2276 penv_87->en_opcode = penv_xmm->en_opcode;
2277 penv_87->en_foo = penv_xmm->en_foo;
2278 penv_87->en_fos = penv_xmm->en_fos;
2279
2280 /* FPU registers */
2281 for (i = 0; i < 8; ++i)
2282 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2283
2284 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2285}
2286
2287static void
2288set_fpregs_xmm(sv_87, sv_xmm)
2289 struct save87 *sv_87;
2290 struct savexmm *sv_xmm;
2291{
2292 register struct env87 *penv_87 = &sv_87->sv_env;
2293 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2294 int i;
2295
2296 /* FPU control/status */
2297 penv_xmm->en_cw = penv_87->en_cw;
2298 penv_xmm->en_sw = penv_87->en_sw;
2299 penv_xmm->en_tw = penv_87->en_tw;
2300 penv_xmm->en_fip = penv_87->en_fip;
2301 penv_xmm->en_fcs = penv_87->en_fcs;
2302 penv_xmm->en_opcode = penv_87->en_opcode;
2303 penv_xmm->en_foo = penv_87->en_foo;
2304 penv_xmm->en_fos = penv_87->en_fos;
2305
2306 /* FPU registers */
2307 for (i = 0; i < 8; ++i)
2308 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2309
2310 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2311}
2312#endif /* CPU_ENABLE_SSE */
2313
2314int
2315fill_fpregs(p, fpregs)
2316 struct proc *p;
2317 struct fpreg *fpregs;
2318{
2319#ifdef CPU_ENABLE_SSE
2320 if (cpu_fxsr) {
b7c628e4 2321 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2322 (struct save87 *)fpregs);
2323 return (0);
2324 }
2325#endif /* CPU_ENABLE_SSE */
b7c628e4 2326 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2327 return (0);
2328}
2329
2330int
2331set_fpregs(p, fpregs)
2332 struct proc *p;
2333 struct fpreg *fpregs;
2334{
2335#ifdef CPU_ENABLE_SSE
2336 if (cpu_fxsr) {
2337 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2338 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2339 return (0);
2340 }
2341#endif /* CPU_ENABLE_SSE */
b7c628e4 2342 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2343 return (0);
2344}
2345
2346int
2347fill_dbregs(p, dbregs)
2348 struct proc *p;
2349 struct dbreg *dbregs;
2350{
2351 struct pcb *pcb;
2352
2353 if (p == NULL) {
2354 dbregs->dr0 = rdr0();
2355 dbregs->dr1 = rdr1();
2356 dbregs->dr2 = rdr2();
2357 dbregs->dr3 = rdr3();
2358 dbregs->dr4 = rdr4();
2359 dbregs->dr5 = rdr5();
2360 dbregs->dr6 = rdr6();
2361 dbregs->dr7 = rdr7();
2362 }
2363 else {
b7c628e4 2364 pcb = p->p_thread->td_pcb;
984263bc
MD
2365 dbregs->dr0 = pcb->pcb_dr0;
2366 dbregs->dr1 = pcb->pcb_dr1;
2367 dbregs->dr2 = pcb->pcb_dr2;
2368 dbregs->dr3 = pcb->pcb_dr3;
2369 dbregs->dr4 = 0;
2370 dbregs->dr5 = 0;
2371 dbregs->dr6 = pcb->pcb_dr6;
2372 dbregs->dr7 = pcb->pcb_dr7;
2373 }
2374 return (0);
2375}
2376
2377int
2378set_dbregs(p, dbregs)
2379 struct proc *p;
2380 struct dbreg *dbregs;
2381{
2382 struct pcb *pcb;
2383 int i;
2384 u_int32_t mask1, mask2;
2385
2386 if (p == NULL) {
2387 load_dr0(dbregs->dr0);
2388 load_dr1(dbregs->dr1);
2389 load_dr2(dbregs->dr2);
2390 load_dr3(dbregs->dr3);
2391 load_dr4(dbregs->dr4);
2392 load_dr5(dbregs->dr5);
2393 load_dr6(dbregs->dr6);
2394 load_dr7(dbregs->dr7);
2395 }
2396 else {
2397 /*
2398 * Don't let an illegal value for dr7 get set. Specifically,
2399 * check for undefined settings. Setting these bit patterns
2400 * result in undefined behaviour and can lead to an unexpected
2401 * TRCTRAP.
2402 */
2403 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2404 i++, mask1 <<= 2, mask2 <<= 2)
2405 if ((dbregs->dr7 & mask1) == mask2)
2406 return (EINVAL);
2407
b7c628e4 2408 pcb = p->p_thread->td_pcb;
984263bc
MD
2409
2410 /*
2411 * Don't let a process set a breakpoint that is not within the
2412 * process's address space. If a process could do this, it
2413 * could halt the system by setting a breakpoint in the kernel
2414 * (if ddb was enabled). Thus, we need to check to make sure
2415 * that no breakpoints are being enabled for addresses outside
2416 * process's address space, unless, perhaps, we were called by
2417 * uid 0.
2418 *
2419 * XXX - what about when the watched area of the user's
2420 * address space is written into from within the kernel
2421 * ... wouldn't that still cause a breakpoint to be generated
2422 * from within kernel mode?
2423 */
2424
dadab5e9 2425 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2426 if (dbregs->dr7 & 0x3) {
2427 /* dr0 is enabled */
2428 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2429 return (EINVAL);
2430 }
2431
2432 if (dbregs->dr7 & (0x3<<2)) {
2433 /* dr1 is enabled */
2434 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2435 return (EINVAL);
2436 }
2437
2438 if (dbregs->dr7 & (0x3<<4)) {
2439 /* dr2 is enabled */
2440 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2441 return (EINVAL);
2442 }
2443
2444 if (dbregs->dr7 & (0x3<<6)) {
2445 /* dr3 is enabled */
2446 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2447 return (EINVAL);
2448 }
2449 }
2450
2451 pcb->pcb_dr0 = dbregs->dr0;
2452 pcb->pcb_dr1 = dbregs->dr1;
2453 pcb->pcb_dr2 = dbregs->dr2;
2454 pcb->pcb_dr3 = dbregs->dr3;
2455 pcb->pcb_dr6 = dbregs->dr6;
2456 pcb->pcb_dr7 = dbregs->dr7;
2457
2458 pcb->pcb_flags |= PCB_DBREGS;
2459 }
2460
2461 return (0);
2462}
2463
2464/*
2465 * Return > 0 if a hardware breakpoint has been hit, and the
2466 * breakpoint was in user space. Return 0, otherwise.
2467 */
2468int
2469user_dbreg_trap(void)
2470{
2471 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2472 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2473 int nbp; /* number of breakpoints that triggered */
2474 caddr_t addr[4]; /* breakpoint addresses */
2475 int i;
2476
2477 dr7 = rdr7();
2478 if ((dr7 & 0x000000ff) == 0) {
2479 /*
2480 * all GE and LE bits in the dr7 register are zero,
2481 * thus the trap couldn't have been caused by the
2482 * hardware debug registers
2483 */
2484 return 0;
2485 }
2486
2487 nbp = 0;
2488 dr6 = rdr6();
2489 bp = dr6 & 0x0000000f;
2490
2491 if (!bp) {
2492 /*
2493 * None of the breakpoint bits are set meaning this
2494 * trap was not caused by any of the debug registers
2495 */
2496 return 0;
2497 }
2498
2499 /*
2500 * at least one of the breakpoints were hit, check to see
2501 * which ones and if any of them are user space addresses
2502 */
2503
2504 if (bp & 0x01) {
2505 addr[nbp++] = (caddr_t)rdr0();
2506 }
2507 if (bp & 0x02) {
2508 addr[nbp++] = (caddr_t)rdr1();
2509 }
2510 if (bp & 0x04) {
2511 addr[nbp++] = (caddr_t)rdr2();
2512 }
2513 if (bp & 0x08) {
2514 addr[nbp++] = (caddr_t)rdr3();
2515 }
2516
2517 for (i=0; i<nbp; i++) {
2518 if (addr[i] <
2519 (caddr_t)VM_MAXUSER_ADDRESS) {
2520 /*
2521 * addr[i] is in user space
2522 */
2523 return nbp;
2524 }
2525 }
2526
2527 /*
2528 * None of the breakpoints are in user space.
2529 */
2530 return 0;
2531}
2532
2533
2534#ifndef DDB
2535void
2536Debugger(const char *msg)
2537{
2538 printf("Debugger(\"%s\") called.\n", msg);
2539}
2540#endif /* no DDB */
2541
2542#include <sys/disklabel.h>
2543
2544/*
2545 * Determine the size of the transfer, and make sure it is
2546 * within the boundaries of the partition. Adjust transfer
2547 * if needed, and signal errors or early completion.
2548 */
2549int
2550bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2551{
2552 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2553 int labelsect = lp->d_partitions[0].p_offset;
2554 int maxsz = p->p_size,
2555 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2556
2557 /* overwriting disk label ? */
2558 /* XXX should also protect bootstrap in first 8K */
2559 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2560#if LABELSECTOR != 0
2561 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2562#endif
2563 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2564 bp->b_error = EROFS;
2565 goto bad;
2566 }
2567
2568#if defined(DOSBBSECTOR) && defined(notyet)
2569 /* overwriting master boot record? */
2570 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2571 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2572 bp->b_error = EROFS;
2573 goto bad;
2574 }
2575#endif
2576
2577 /* beyond partition? */
2578 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2579 /* if exactly at end of disk, return an EOF */
2580 if (bp->b_blkno == maxsz) {
2581 bp->b_resid = bp->b_bcount;
2582 return(0);
2583 }
2584 /* or truncate if part of it fits */
2585 sz = maxsz - bp->b_blkno;
2586 if (sz <= 0) {
2587 bp->b_error = EINVAL;
2588 goto bad;
2589 }
2590 bp->b_bcount = sz << DEV_BSHIFT;
2591 }
2592
2593 bp->b_pblkno = bp->b_blkno + p->p_offset;
2594 return(1);
2595
2596bad:
2597 bp->b_flags |= B_ERROR;
2598 return(-1);
2599}
2600
2601#ifdef DDB
2602
2603/*
2604 * Provide inb() and outb() as functions. They are normally only
2605 * available as macros calling inlined functions, thus cannot be
2606 * called inside DDB.
2607 *
2608 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2609 */
2610
2611#undef inb
2612#undef outb
2613
2614/* silence compiler warnings */
2615u_char inb(u_int);
2616void outb(u_int, u_char);
2617
2618u_char
2619inb(u_int port)
2620{
2621 u_char data;
2622 /*
2623 * We use %%dx and not %1 here because i/o is done at %dx and not at
2624 * %edx, while gcc generates inferior code (movw instead of movl)
2625 * if we tell it to load (u_short) port.
2626 */
2627 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2628 return (data);
2629}
2630
2631void
2632outb(u_int port, u_char data)
2633{
2634 u_char al;
2635 /*
2636 * Use an unnecessary assignment to help gcc's register allocator.
2637 * This make a large difference for gcc-1.40 and a tiny difference
2638 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2639 * best results. gcc-2.6.0 can't handle this.
2640 */
2641 al = data;
2642 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2643}
2644
2645#endif /* DDB */