Hook ru.koi8-r.win.kbd up to Makefile and INDEX.keymaps.
[dragonfly.git] / sys / dev / netif / an / if_an.c
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
7600679e 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.16 2005/01/23 20:21:30 joerg Exp $
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34 *
35 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
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36 */
37
38/*
39 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
40 *
41 * Written by Bill Paul <wpaul@ctr.columbia.edu>
42 * Electrical Engineering Department
43 * Columbia University, New York City
44 */
45
46/*
47 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
48 * This driver supports all three device types (PCI devices are supported
49 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
50 * supported either using hard-coded IO port/IRQ settings or via Plug
51 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
52 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
53 *
54 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
55 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
56 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
57 * a couple of important differences though:
58 *
59 * - Lucent ISA card looks to the host like a PCMCIA controller with
60 * a PCMCIA WaveLAN card inserted. This means that even desktop
61 * machines need to be configured with PCMCIA support in order to
62 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
63 * actually look like normal ISA and PCI devices to the host, so
64 * no PCMCIA controller support is needed
65 *
66 * The latter point results in a small gotcha. The Aironet PCMCIA
67 * cards can be configured for one of two operating modes depending
68 * on how the Vpp1 and Vpp2 programming voltages are set when the
69 * card is activated. In order to put the card in proper PCMCIA
70 * operation (where the CIS table is visible and the interface is
71 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
72 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
73 * which leaves the card in ISA/PCI mode, which prevents it from
74 * being activated as an PCMCIA device.
75 *
76 * Note that some PCMCIA controller software packages for Windows NT
77 * fail to set the voltages as well.
78 *
79 * The Aironet devices can operate in both station mode and access point
80 * mode. Typically, when programmed for station mode, the card can be set
81 * to automatically perform encapsulation/decapsulation of Ethernet II
82 * and 802.3 frames within 802.11 frames so that the host doesn't have
83 * to do it itself. This driver doesn't program the card that way: the
84 * driver handles all of the encapsulation/decapsulation itself.
85 */
86
87#include "opt_inet.h"
88
89#ifdef INET
90#define ANCACHE /* enable signal strength cache */
91#endif
92
93#include <sys/param.h>
94#include <sys/systm.h>
95#include <sys/sockio.h>
96#include <sys/mbuf.h>
97#include <sys/proc.h>
98#include <sys/kernel.h>
99#include <sys/proc.h>
100#include <sys/ucred.h>
101#include <sys/socket.h>
102#ifdef ANCACHE
103#include <sys/syslog.h>
104#endif
105#include <sys/sysctl.h>
106#include <machine/clock.h> /* for DELAY */
107
108#include <sys/module.h>
109#include <sys/sysctl.h>
110#include <sys/bus.h>
111#include <machine/bus.h>
112#include <sys/rman.h>
113#include <machine/resource.h>
114#include <sys/malloc.h>
115
116#include <net/if.h>
117#include <net/if_arp.h>
118#include <net/ethernet.h>
119#include <net/if_dl.h>
120#include <net/if_types.h>
984263bc 121#include <net/if_media.h>
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122#include <netproto/802_11/ieee80211.h>
123#include <netproto/802_11/ieee80211_ioctl.h>
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124
125#ifdef INET
126#include <netinet/in.h>
127#include <netinet/in_systm.h>
128#include <netinet/in_var.h>
129#include <netinet/ip.h>
130#endif
131
132#include <net/bpf.h>
133
134#include <machine/md_var.h>
135
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136#include "if_aironet_ieee.h"
137#include "if_anreg.h"
984263bc 138
984263bc 139/* These are global because we need them in sys/pci/if_an_p.c. */
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140static void an_reset (struct an_softc *);
141static int an_init_mpi350_desc (struct an_softc *);
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142static int an_ioctl (struct ifnet *, u_long, caddr_t,
143 struct ucred *);
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144static void an_init (void *);
145static int an_init_tx_ring (struct an_softc *);
146static void an_start (struct ifnet *);
147static void an_watchdog (struct ifnet *);
148static void an_rxeof (struct an_softc *);
149static void an_txeof (struct an_softc *, int);
150
151static void an_promisc (struct an_softc *, int);
152static int an_cmd (struct an_softc *, int, int);
153static int an_cmd_struct (struct an_softc *, struct an_command *,
154 struct an_reply *);
155static int an_read_record (struct an_softc *, struct an_ltv_gen *);
156static int an_write_record (struct an_softc *, struct an_ltv_gen *);
157static int an_read_data (struct an_softc *, int,
158 int, caddr_t, int);
159static int an_write_data (struct an_softc *, int,
160 int, caddr_t, int);
161static int an_seek (struct an_softc *, int, int, int);
162static int an_alloc_nicmem (struct an_softc *, int, int *);
163static int an_dma_malloc (struct an_softc *, bus_size_t,
164 struct an_dma_alloc *, int);
165static void an_dma_free (struct an_softc *,
166 struct an_dma_alloc *);
167static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
168static void an_stats_update (void *);
169static void an_setdef (struct an_softc *, struct an_req *);
984263bc 170#ifdef ANCACHE
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171static void an_cache_store (struct an_softc *, struct mbuf *,
172 uint8_t, uint8_t);
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173#endif
174
175/* function definitions for use with the Cisco's Linux configuration
176 utilities
177*/
178
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179static int readrids (struct ifnet*, struct aironet_ioctl*);
180static int writerids (struct ifnet*, struct aironet_ioctl*);
181static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 182
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183static int cmdreset (struct ifnet *);
184static int setflashmode (struct ifnet *);
185static int flashgchar (struct ifnet *,int,int);
186static int flashpchar (struct ifnet *,int,int);
187static int flashputbuf (struct ifnet *);
188static int flashrestart (struct ifnet *);
189static int WaitBusy (struct ifnet *, int);
190static int unstickbusy (struct ifnet *);
984263bc 191
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192static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
193 char *);
984263bc 194
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195static int an_media_change (struct ifnet *);
196static void an_media_status (struct ifnet *, struct ifmediareq *);
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197
198static int an_dump = 0;
199static int an_cache_mode = 0;
200
201#define DBM 0
202#define PERCENT 1
203#define RAW 2
204
205static char an_conf[256];
206static char an_conf_cache[256];
207
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208DECLARE_DUMMY_MODULE(if_an);
209
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210/* sysctl vars */
211
212SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
213
214static int
215sysctl_an_dump(SYSCTL_HANDLER_ARGS)
216{
217 int error, r, last;
218 char *s = an_conf;
219
220 last = an_dump;
221
222 switch (an_dump) {
223 case 0:
224 strcpy(an_conf, "off");
225 break;
226 case 1:
227 strcpy(an_conf, "type");
228 break;
229 case 2:
230 strcpy(an_conf, "dump");
231 break;
232 default:
233 snprintf(an_conf, 5, "%x", an_dump);
234 break;
235 }
236
237 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
238
239 if (strncmp(an_conf,"off", 3) == 0) {
240 an_dump = 0;
241 }
242 if (strncmp(an_conf,"dump", 4) == 0) {
243 an_dump = 1;
244 }
245 if (strncmp(an_conf,"type", 4) == 0) {
246 an_dump = 2;
247 }
248 if (*s == 'f') {
249 r = 0;
250 for (;;s++) {
251 if ((*s >= '0') && (*s <= '9')) {
252 r = r * 16 + (*s - '0');
253 } else if ((*s >= 'a') && (*s <= 'f')) {
254 r = r * 16 + (*s - 'a' + 10);
255 } else {
256 break;
257 }
258 }
259 an_dump = r;
260 }
261 if (an_dump != last)
262 printf("Sysctl changed for Aironet driver\n");
263
264 return error;
265}
266
267SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
268 0, sizeof(an_conf), sysctl_an_dump, "A", "");
269
270static int
271sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
272{
273 int error, last;
274
275 last = an_cache_mode;
276
277 switch (an_cache_mode) {
278 case 1:
279 strcpy(an_conf_cache, "per");
280 break;
281 case 2:
282 strcpy(an_conf_cache, "raw");
283 break;
284 default:
285 strcpy(an_conf_cache, "dbm");
286 break;
287 }
288
289 error = sysctl_handle_string(oidp, an_conf_cache,
290 sizeof(an_conf_cache), req);
291
292 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
293 an_cache_mode = 0;
294 }
295 if (strncmp(an_conf_cache,"per", 3) == 0) {
296 an_cache_mode = 1;
297 }
298 if (strncmp(an_conf_cache,"raw", 3) == 0) {
299 an_cache_mode = 2;
300 }
301
302 return error;
303}
304
305SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
306 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
307
308/*
309 * We probe for an Aironet 4500/4800 card by attempting to
310 * read the default SSID list. On reset, the first entry in
311 * the SSID list will contain the name "tsunami." If we don't
312 * find this, then there's no card present.
313 */
314int
315an_probe(dev)
316 device_t dev;
317{
318 struct an_softc *sc = device_get_softc(dev);
319 struct an_ltv_ssidlist ssid;
320 int error;
321
322 bzero((char *)&ssid, sizeof(ssid));
323
324 error = an_alloc_port(dev, 0, AN_IOSIZ);
325 if (error != 0)
326 return (0);
327
328 /* can't do autoprobing */
329 if (rman_get_start(sc->port_res) == -1)
330 return(0);
331
332 /*
333 * We need to fake up a softc structure long enough
334 * to be able to issue commands and call some of the
335 * other routines.
336 */
337 sc->an_bhandle = rman_get_bushandle(sc->port_res);
338 sc->an_btag = rman_get_bustag(sc->port_res);
339 sc->an_unit = device_get_unit(dev);
340
341 ssid.an_len = sizeof(ssid);
342 ssid.an_type = AN_RID_SSIDLIST;
343
344 /* Make sure interrupts are disabled. */
345 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
346 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
347
348 an_reset(sc);
349 /* No need for an_init_mpi350_desc since it will be done in attach */
350
351 if (an_cmd(sc, AN_CMD_READCFG, 0))
352 return(0);
353
354 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
355 return(0);
356
357 /* See if the ssid matches what we expect ... but doesn't have to */
358 if (strcmp(ssid.an_ssid1, AN_DEF_SSID))
359 return(0);
360
361 return(AN_IOSIZ);
362}
363
364/*
365 * Allocate a port resource with the given resource id.
366 */
367int
368an_alloc_port(dev, rid, size)
369 device_t dev;
370 int rid;
371 int size;
372{
373 struct an_softc *sc = device_get_softc(dev);
374 struct resource *res;
375
376 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
377 0ul, ~0ul, size, RF_ACTIVE);
378 if (res) {
379 sc->port_rid = rid;
380 sc->port_res = res;
381 return (0);
382 } else {
383 return (ENOENT);
384 }
385}
386
387/*
388 * Allocate a memory resource with the given resource id.
389 */
390int an_alloc_memory(device_t dev, int rid, int size)
391{
392 struct an_softc *sc = device_get_softc(dev);
393 struct resource *res;
394
395 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
396 0ul, ~0ul, size, RF_ACTIVE);
397 if (res) {
398 sc->mem_rid = rid;
399 sc->mem_res = res;
400 sc->mem_used = size;
401 return (0);
402 } else {
403 return (ENOENT);
404 }
405}
406
407/*
408 * Allocate a auxilary memory resource with the given resource id.
409 */
410int an_alloc_aux_memory(device_t dev, int rid, int size)
411{
412 struct an_softc *sc = device_get_softc(dev);
413 struct resource *res;
414
415 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
416 0ul, ~0ul, size, RF_ACTIVE);
417 if (res) {
418 sc->mem_aux_rid = rid;
419 sc->mem_aux_res = res;
420 sc->mem_aux_used = size;
421 return (0);
422 } else {
423 return (ENOENT);
424 }
425}
426
427/*
428 * Allocate an irq resource with the given resource id.
429 */
430int
431an_alloc_irq(dev, rid, flags)
432 device_t dev;
433 int rid;
434 int flags;
435{
436 struct an_softc *sc = device_get_softc(dev);
437 struct resource *res;
438
439 res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
440 0ul, ~0ul, 1, (RF_ACTIVE | flags));
441 if (res) {
442 sc->irq_rid = rid;
443 sc->irq_res = res;
444 return (0);
445 } else {
446 return (ENOENT);
447 }
448}
449
450static void
451an_dma_malloc_cb(arg, segs, nseg, error)
452 void *arg;
453 bus_dma_segment_t *segs;
454 int nseg;
455 int error;
456{
457 bus_addr_t *paddr = (bus_addr_t*) arg;
458 *paddr = segs->ds_addr;
459}
460
461/*
462 * Alloc DMA memory and set the pointer to it
463 */
464static int
465an_dma_malloc(sc, size, dma, mapflags)
466 struct an_softc *sc;
467 bus_size_t size;
468 struct an_dma_alloc *dma;
469 int mapflags;
470{
471 int r;
472
473 r = bus_dmamap_create(sc->an_dtag, BUS_DMA_NOWAIT, &dma->an_dma_map);
474 if (r != 0)
475 goto fail_0;
476
477 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
478 BUS_DMA_NOWAIT, &dma->an_dma_map);
479 if (r != 0)
480 goto fail_1;
481
482 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
483 size,
484 an_dma_malloc_cb,
485 &dma->an_dma_paddr,
486 mapflags | BUS_DMA_NOWAIT);
487 if (r != 0)
488 goto fail_2;
489
490 dma->an_dma_size = size;
491 return (0);
492
493fail_2:
494 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
495fail_1:
496 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
497fail_0:
498 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
499 dma->an_dma_map = NULL;
500 return (r);
501}
502
503static void
504an_dma_free(sc, dma)
505 struct an_softc *sc;
506 struct an_dma_alloc *dma;
507{
508 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
509 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
510 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
511}
512
513/*
514 * Release all resources
515 */
516void
517an_release_resources(dev)
518 device_t dev;
519{
520 struct an_softc *sc = device_get_softc(dev);
521 int i;
522
523 if (sc->port_res) {
524 bus_release_resource(dev, SYS_RES_IOPORT,
525 sc->port_rid, sc->port_res);
526 sc->port_res = 0;
527 }
528 if (sc->mem_res) {
529 bus_release_resource(dev, SYS_RES_MEMORY,
530 sc->mem_rid, sc->mem_res);
531 sc->mem_res = 0;
532 }
533 if (sc->mem_aux_res) {
534 bus_release_resource(dev, SYS_RES_MEMORY,
535 sc->mem_aux_rid, sc->mem_aux_res);
536 sc->mem_aux_res = 0;
537 }
538 if (sc->irq_res) {
539 bus_release_resource(dev, SYS_RES_IRQ,
540 sc->irq_rid, sc->irq_res);
541 sc->irq_res = 0;
542 }
543 if (sc->an_rid_buffer.an_dma_paddr) {
544 an_dma_free(sc, &sc->an_rid_buffer);
545 }
546 for (i = 0; i < AN_MAX_RX_DESC; i++)
547 if (sc->an_rx_buffer[i].an_dma_paddr) {
548 an_dma_free(sc, &sc->an_rx_buffer[i]);
549 }
550 for (i = 0; i < AN_MAX_TX_DESC; i++)
551 if (sc->an_tx_buffer[i].an_dma_paddr) {
552 an_dma_free(sc, &sc->an_tx_buffer[i]);
553 }
554 if (sc->an_dtag) {
555 bus_dma_tag_destroy(sc->an_dtag);
556 }
557
558}
559
560int
561an_init_mpi350_desc(sc)
562 struct an_softc *sc;
563{
564 struct an_command cmd_struct;
565 struct an_reply reply;
566 struct an_card_rid_desc an_rid_desc;
567 struct an_card_rx_desc an_rx_desc;
568 struct an_card_tx_desc an_tx_desc;
569 int i, desc;
570
571 if(!sc->an_rid_buffer.an_dma_paddr)
572 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
573 &sc->an_rid_buffer, 0);
574 for (i = 0; i < AN_MAX_RX_DESC; i++)
575 if(!sc->an_rx_buffer[i].an_dma_paddr)
576 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
577 &sc->an_rx_buffer[i], 0);
578 for (i = 0; i < AN_MAX_TX_DESC; i++)
579 if(!sc->an_tx_buffer[i].an_dma_paddr)
580 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
581 &sc->an_tx_buffer[i], 0);
582
583 /*
584 * Allocate RX descriptor
585 */
586 bzero(&reply,sizeof(reply));
587 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
588 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
589 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
590 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
591 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
592 printf("an%d: failed to allocate RX descriptor\n",
593 sc->an_unit);
594 return(EIO);
595 }
596
597 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
598 bzero(&an_rx_desc, sizeof(an_rx_desc));
599 an_rx_desc.an_valid = 1;
600 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
601 an_rx_desc.an_done = 0;
602 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
603
604 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
605 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
606 + (desc * sizeof(an_rx_desc))
607 + (i * 4),
608 ((u_int32_t*)&an_rx_desc)[i]);
609 }
610
611 /*
612 * Allocate TX descriptor
613 */
614
615 bzero(&reply,sizeof(reply));
616 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
617 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
618 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
619 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
620 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
621 printf("an%d: failed to allocate TX descriptor\n",
622 sc->an_unit);
623 return(EIO);
624 }
625
626 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
627 bzero(&an_tx_desc, sizeof(an_tx_desc));
628 an_tx_desc.an_offset = 0;
629 an_tx_desc.an_eoc = 0;
630 an_tx_desc.an_valid = 0;
631 an_tx_desc.an_len = 0;
632 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
633
634 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
635 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
636 + (desc * sizeof(an_tx_desc))
637 + (i * 4),
638 ((u_int32_t*)&an_tx_desc)[i]);
639 }
640
641 /*
642 * Allocate RID descriptor
643 */
644
645 bzero(&reply,sizeof(reply));
646 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
647 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
648 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
649 cmd_struct.an_parm2 = 1;
650 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
651 printf("an%d: failed to allocate host descriptor\n",
652 sc->an_unit);
653 return(EIO);
654 }
655
656 bzero(&an_rid_desc, sizeof(an_rid_desc));
657 an_rid_desc.an_valid = 1;
658 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
659 an_rid_desc.an_rid = 0;
660 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
661
662 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
663 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
664 ((u_int32_t*)&an_rid_desc)[i]);
665
666 return(0);
667}
668
669int
670an_attach(sc, unit, flags)
671 struct an_softc *sc;
672 int unit;
673 int flags;
674{
675 struct ifnet *ifp = &sc->arpcom.ac_if;
676 int error;
677
89c0f216 678 callout_init(&sc->an_stat_timer);
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679 sc->an_gone = 0;
680 sc->an_associated = 0;
681 sc->an_monitor = 0;
682 sc->an_was_monitor = 0;
683 sc->an_flash_buffer = NULL;
684
685 /* Reset the NIC. */
686 an_reset(sc);
687 if (sc->mpi350) {
688 error = an_init_mpi350_desc(sc);
689 if (error)
690 return(error);
691 }
692
693 /* Load factory config */
694 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
695 printf("an%d: failed to load config data\n", sc->an_unit);
696 return(EIO);
697 }
698
699 /* Read the current configuration */
700 sc->an_config.an_type = AN_RID_GENCONFIG;
701 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
702 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
703 printf("an%d: read record failed\n", sc->an_unit);
704 return(EIO);
705 }
706
707 /* Read the card capabilities */
708 sc->an_caps.an_type = AN_RID_CAPABILITIES;
709 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
710 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
711 printf("an%d: read record failed\n", sc->an_unit);
712 return(EIO);
713 }
714
715 /* Read ssid list */
716 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
717 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
718 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
719 printf("an%d: read record failed\n", sc->an_unit);
720 return(EIO);
721 }
722
723 /* Read AP list */
724 sc->an_aplist.an_type = AN_RID_APLIST;
725 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
726 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
727 printf("an%d: read record failed\n", sc->an_unit);
728 return(EIO);
729 }
730
731#ifdef ANCACHE
732 /* Read the RSSI <-> dBm map */
733 sc->an_have_rssimap = 0;
734 if (sc->an_caps.an_softcaps & 8) {
735 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
736 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
737 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
738 printf("an%d: unable to get RSSI <-> dBM map\n", sc->an_unit);
739 } else {
740 printf("an%d: got RSSI <-> dBM map\n", sc->an_unit);
741 sc->an_have_rssimap = 1;
742 }
743 } else {
744 printf("an%d: no RSSI <-> dBM map\n", sc->an_unit);
745 }
746#endif
747
984263bc 748 ifp->if_softc = sc;
cdb7d804 749 if_initname(ifp, "an", unit);
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750 ifp->if_mtu = ETHERMTU;
751 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
752 ifp->if_ioctl = an_ioctl;
984263bc
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753 ifp->if_start = an_start;
754 ifp->if_watchdog = an_watchdog;
755 ifp->if_init = an_init;
756 ifp->if_baudrate = 10000000;
757 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
758
759 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
760 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
761 sizeof(AN_DEFAULT_NODENAME) - 1);
762
763 bzero(sc->an_ssidlist.an_ssid1, sizeof(sc->an_ssidlist.an_ssid1));
764 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_ssid1,
765 sizeof(AN_DEFAULT_NETNAME) - 1);
766 sc->an_ssidlist.an_ssid1_len = strlen(AN_DEFAULT_NETNAME);
767
768 sc->an_config.an_opmode =
769 AN_OPMODE_INFRASTRUCTURE_STATION;
770
771 sc->an_tx_rate = 0;
772 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
773
774 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
775#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
776 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
777 IFM_IEEE80211_ADHOC, 0), 0);
778 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
779 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
780 IFM_IEEE80211_ADHOC, 0), 0);
781 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
782 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
783 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
784 IFM_IEEE80211_ADHOC, 0), 0);
785 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
786 }
787 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
788 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
789 IFM_IEEE80211_ADHOC, 0), 0);
790 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
791 }
792 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
793 IFM_IEEE80211_ADHOC, 0), 0);
794 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
795#undef ADD
796 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
797 0, 0));
798
799 /*
800 * Call MI attach routine.
801 */
0a8b5977 802 ether_ifattach(ifp, sc->an_caps.an_oemaddr);
984263bc
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803
804 return(0);
805}
806
807static void
808an_rxeof(sc)
809 struct an_softc *sc;
810{
811 struct ifnet *ifp;
812 struct ether_header *eh;
813 struct ieee80211_frame *ih;
814 struct an_rxframe rx_frame;
815 struct an_rxframe_802_3 rx_frame_802_3;
816 struct mbuf *m;
817 int len, id, error = 0, i, count = 0;
818 int ieee80211_header_len;
819 u_char *bpf_buf;
820 u_short fc1;
821 struct an_card_rx_desc an_rx_desc;
822 u_int8_t *buf;
823
824 ifp = &sc->arpcom.ac_if;
825
826 if (!sc->mpi350) {
827 id = CSR_READ_2(sc, AN_RX_FID);
828
829 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
830 /* read raw 802.11 packet */
831 bpf_buf = sc->buf_802_11;
832
833 /* read header */
834 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
835 sizeof(rx_frame))) {
836 ifp->if_ierrors++;
837 return;
838 }
839
840 /*
841 * skip beacon by default since this increases the
842 * system load a lot
843 */
844
845 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
846 (rx_frame.an_frame_ctl &
847 IEEE80211_FC0_SUBTYPE_BEACON)) {
848 return;
849 }
850
851 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
852 len = rx_frame.an_rx_payload_len
853 + sizeof(rx_frame);
854 /* Check for insane frame length */
855 if (len > sizeof(sc->buf_802_11)) {
856 printf("an%d: oversized packet "
857 "received (%d, %d)\n",
858 sc->an_unit, len, MCLBYTES);
859 ifp->if_ierrors++;
860 return;
861 }
862
863 bcopy((char *)&rx_frame,
864 bpf_buf, sizeof(rx_frame));
865
866 error = an_read_data(sc, id, sizeof(rx_frame),
867 (caddr_t)bpf_buf+sizeof(rx_frame),
868 rx_frame.an_rx_payload_len);
869 } else {
870 fc1=rx_frame.an_frame_ctl >> 8;
871 ieee80211_header_len =
872 sizeof(struct ieee80211_frame);
873 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
874 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
875 ieee80211_header_len += ETHER_ADDR_LEN;
876 }
877
878 len = rx_frame.an_rx_payload_len
879 + ieee80211_header_len;
880 /* Check for insane frame length */
881 if (len > sizeof(sc->buf_802_11)) {
882 printf("an%d: oversized packet "
883 "received (%d, %d)\n",
884 sc->an_unit, len, MCLBYTES);
885 ifp->if_ierrors++;
886 return;
887 }
888
889 ih = (struct ieee80211_frame *)bpf_buf;
890
891 bcopy((char *)&rx_frame.an_frame_ctl,
892 (char *)ih, ieee80211_header_len);
893
894 error = an_read_data(sc, id, sizeof(rx_frame) +
895 rx_frame.an_gaplen,
896 (caddr_t)ih +ieee80211_header_len,
897 rx_frame.an_rx_payload_len);
898 }
7600679e 899 BPF_TAP(ifp, bpf_buf, len);
984263bc
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900 } else {
901 MGETHDR(m, M_NOWAIT, MT_DATA);
902 if (m == NULL) {
903 ifp->if_ierrors++;
904 return;
905 }
906 MCLGET(m, M_NOWAIT);
907 if (!(m->m_flags & M_EXT)) {
908 m_freem(m);
909 ifp->if_ierrors++;
910 return;
911 }
912 m->m_pkthdr.rcvif = ifp;
913 /* Read Ethernet encapsulated packet */
914
915#ifdef ANCACHE
916 /* Read NIC frame header */
917 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
918 sizeof(rx_frame))) {
919 ifp->if_ierrors++;
920 return;
921 }
922#endif
923 /* Read in the 802_3 frame header */
924 if (an_read_data(sc, id, 0x34,
925 (caddr_t)&rx_frame_802_3,
926 sizeof(rx_frame_802_3))) {
927 ifp->if_ierrors++;
928 return;
929 }
930 if (rx_frame_802_3.an_rx_802_3_status != 0) {
931 ifp->if_ierrors++;
932 return;
933 }
934 /* Check for insane frame length */
935 len = rx_frame_802_3.an_rx_802_3_payload_len;
936 if (len > sizeof(sc->buf_802_11)) {
937 printf("an%d: oversized packet "
938 "received (%d, %d)\n",
939 sc->an_unit, len, MCLBYTES);
940 ifp->if_ierrors++;
941 return;
942 }
943 m->m_pkthdr.len = m->m_len =
944 rx_frame_802_3.an_rx_802_3_payload_len + 12;
945
946 eh = mtod(m, struct ether_header *);
947
948 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
949 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
950 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
951 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
952
953 /* in mbuf header type is just before payload */
954 error = an_read_data(sc, id, 0x44,
955 (caddr_t)&(eh->ether_type),
956 rx_frame_802_3.an_rx_802_3_payload_len);
957
958 if (error) {
959 m_freem(m);
960 ifp->if_ierrors++;
961 return;
962 }
963 ifp->if_ipackets++;
964
984263bc 965#ifdef ANCACHE
3013ac0e 966 an_cache_store(sc, m,
984263bc
MD
967 rx_frame.an_rx_signal_strength,
968 rx_frame.an_rsvd0);
969#endif
3013ac0e 970 (*ifp->if_input)(ifp, m);
984263bc
MD
971 }
972
973 } else { /* MPI-350 */
974 for (count = 0; count < AN_MAX_RX_DESC; count++){
975 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
976 ((u_int32_t*)&an_rx_desc)[i]
977 = CSR_MEM_AUX_READ_4(sc,
978 AN_RX_DESC_OFFSET
979 + (count * sizeof(an_rx_desc))
980 + (i * 4));
981
982 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
983 buf = sc->an_rx_buffer[count].an_dma_vaddr;
984
985 MGETHDR(m, M_NOWAIT, MT_DATA);
986 if (m == NULL) {
987 ifp->if_ierrors++;
988 return;
989 }
990 MCLGET(m, M_NOWAIT);
991 if (!(m->m_flags & M_EXT)) {
992 m_freem(m);
993 ifp->if_ierrors++;
994 return;
995 }
996 m->m_pkthdr.rcvif = ifp;
997 /* Read Ethernet encapsulated packet */
998
999 /*
1000 * No ANCACHE support since we just get back
1001 * an Ethernet packet no 802.11 info
1002 */
1003#if 0
1004#ifdef ANCACHE
1005 /* Read NIC frame header */
1006 bcopy(buf, (caddr_t)&rx_frame,
1007 sizeof(rx_frame));
1008#endif
1009#endif
1010 /* Check for insane frame length */
1011 len = an_rx_desc.an_len + 12;
1012 if (len > MCLBYTES) {
1013 printf("an%d: oversized packet "
1014 "received (%d, %d)\n",
1015 sc->an_unit, len, MCLBYTES);
1016 ifp->if_ierrors++;
1017 return;
1018 }
1019
1020 m->m_pkthdr.len = m->m_len =
1021 an_rx_desc.an_len + 12;
1022
1023 eh = mtod(m, struct ether_header *);
1024
1025 bcopy(buf, (char *)eh,
1026 m->m_pkthdr.len);
1027
1028 ifp->if_ipackets++;
1029
984263bc
MD
1030#if 0
1031#ifdef ANCACHE
3013ac0e 1032 an_cache_store(sc, m,
984263bc
MD
1033 rx_frame.an_rx_signal_strength,
1034 rx_frame.an_rsvd0);
1035#endif
1036#endif
3013ac0e 1037 (*ifp->if_input)(ifp, m);
984263bc
MD
1038
1039 an_rx_desc.an_valid = 1;
1040 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1041 an_rx_desc.an_done = 0;
1042 an_rx_desc.an_phys =
1043 sc->an_rx_buffer[count].an_dma_paddr;
1044
1045 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1046 CSR_MEM_AUX_WRITE_4(sc,
1047 AN_RX_DESC_OFFSET
1048 + (count * sizeof(an_rx_desc))
1049 + (i * 4),
1050 ((u_int32_t*)&an_rx_desc)[i]);
1051
1052 } else {
1053 printf("an%d: Didn't get valid RX packet "
1054 "%x %x %d\n",
1055 sc->an_unit,
1056 an_rx_desc.an_done,
1057 an_rx_desc.an_valid, an_rx_desc.an_len);
1058 }
1059 }
1060 }
1061}
1062
1063static void
1064an_txeof(sc, status)
1065 struct an_softc *sc;
1066 int status;
1067{
1068 struct ifnet *ifp;
1069 int id, i;
1070
1071 ifp = &sc->arpcom.ac_if;
1072
1073 ifp->if_timer = 0;
1074 ifp->if_flags &= ~IFF_OACTIVE;
1075
1076 if (!sc->mpi350) {
1077 id = CSR_READ_2(sc, AN_TX_CMP_FID);
1078
1079 if (status & AN_EV_TX_EXC) {
1080 ifp->if_oerrors++;
1081 } else
1082 ifp->if_opackets++;
1083
1084 for (i = 0; i < AN_TX_RING_CNT; i++) {
1085 if (id == sc->an_rdata.an_tx_ring[i]) {
1086 sc->an_rdata.an_tx_ring[i] = 0;
1087 break;
1088 }
1089 }
1090
1091 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1092 } else { /* MPI 350 */
1093 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1094 if (sc->an_rdata.an_tx_prod ==
1095 sc->an_rdata.an_tx_cons)
1096 sc->an_rdata.an_tx_empty = 1;
1097 }
1098
1099 return;
1100}
1101
1102/*
1103 * We abuse the stats updater to check the current NIC status. This
1104 * is important because we don't want to allow transmissions until
1105 * the NIC has synchronized to the current cell (either as the master
1106 * in an ad-hoc group, or as a station connected to an access point).
1107 */
1108static void
1109an_stats_update(xsc)
1110 void *xsc;
1111{
1112 struct an_softc *sc;
1113 struct ifnet *ifp;
1114 int s;
1115
1116 s = splimp();
1117
1118 sc = xsc;
1119 ifp = &sc->arpcom.ac_if;
1120
1121 sc->an_status.an_type = AN_RID_STATUS;
1122 sc->an_status.an_len = sizeof(struct an_ltv_status);
1123 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1124
1125 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1126 sc->an_associated = 1;
1127 else
1128 sc->an_associated = 0;
1129
1130 /* Don't do this while we're transmitting */
1131 if (ifp->if_flags & IFF_OACTIVE) {
89c0f216 1132 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1133 splx(s);
1134 return;
1135 }
1136
1137 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1138 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1139 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
1140
89c0f216 1141 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
1142 splx(s);
1143
1144 return;
1145}
1146
1147void
1148an_intr(xsc)
1149 void *xsc;
1150{
1151 struct an_softc *sc;
1152 struct ifnet *ifp;
1153 u_int16_t status;
1154
1155 sc = (struct an_softc*)xsc;
1156
1157 if (sc->an_gone)
1158 return;
1159
1160 ifp = &sc->arpcom.ac_if;
1161
1162 /* Disable interrupts. */
1163 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1164
1165 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
1166 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS);
1167
1168 if (status & AN_EV_AWAKE) {
1169 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_AWAKE);
1170 }
1171
1172 if (status & AN_EV_LINKSTAT) {
1173 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1174 == AN_LINKSTAT_ASSOCIATED)
1175 sc->an_associated = 1;
1176 else
1177 sc->an_associated = 0;
1178 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1179 }
1180
1181 if (status & AN_EV_RX) {
1182 an_rxeof(sc);
1183 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1184 }
1185
1186 if (status & AN_EV_TX) {
1187 an_txeof(sc, status);
1188 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1189 }
1190
1191 if (status & AN_EV_TX_EXC) {
1192 an_txeof(sc, status);
1193 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1194 }
1195
1196 if (status & AN_EV_ALLOC)
1197 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1198
1199 /* Re-enable interrupts. */
1200 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
1201
1202 if ((ifp->if_flags & IFF_UP) && (ifp->if_snd.ifq_head != NULL))
1203 an_start(ifp);
1204
1205 return;
1206}
1207
1208static int
1209an_cmd_struct(sc, cmd, reply)
1210 struct an_softc *sc;
1211 struct an_command *cmd;
1212 struct an_reply *reply;
1213{
1214 int i;
1215
1216 for (i = 0; i != AN_TIMEOUT; i++) {
1217 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1218 DELAY(1000);
1219 } else
1220 break;
1221 }
1222 if( i == AN_TIMEOUT) {
1223 printf("BUSY\n");
1224 return(ETIMEDOUT);
1225 }
1226
1227 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1228 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1229 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1230 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1231
1232 for (i = 0; i < AN_TIMEOUT; i++) {
1233 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1234 break;
1235 DELAY(1000);
1236 }
1237
1238 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1239 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1240 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1241 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1242
1243 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1244 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1245
1246 /* Ack the command */
1247 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1248
1249 if (i == AN_TIMEOUT)
1250 return(ETIMEDOUT);
1251
1252 return(0);
1253}
1254
1255static int
1256an_cmd(sc, cmd, val)
1257 struct an_softc *sc;
1258 int cmd;
1259 int val;
1260{
1261 int i, s = 0;
1262
1263 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1264 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1265 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1266 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1267
1268 for (i = 0; i < AN_TIMEOUT; i++) {
1269 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1270 break;
1271 else {
1272 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1273 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1274 }
1275 }
1276
1277 for (i = 0; i < AN_TIMEOUT; i++) {
1278 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1279 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1280 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1281 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1282 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1283 break;
1284 }
1285
1286 /* Ack the command */
1287 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1288
1289 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1290 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1291
1292 if (i == AN_TIMEOUT)
1293 return(ETIMEDOUT);
1294
1295 return(0);
1296}
1297
1298/*
1299 * This reset sequence may look a little strange, but this is the
1300 * most reliable method I've found to really kick the NIC in the
1301 * head and force it to reboot correctly.
1302 */
1303static void
1304an_reset(sc)
1305 struct an_softc *sc;
1306{
1307 if (sc->an_gone)
1308 return;
1309
1310 an_cmd(sc, AN_CMD_ENABLE, 0);
1311 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1312 an_cmd(sc, AN_CMD_NOOP2, 0);
1313
1314 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1315 printf("an%d: reset failed\n", sc->an_unit);
1316
1317 an_cmd(sc, AN_CMD_DISABLE, 0);
1318
1319 return;
1320}
1321
1322/*
1323 * Read an LTV record from the NIC.
1324 */
1325static int
1326an_read_record(sc, ltv)
1327 struct an_softc *sc;
1328 struct an_ltv_gen *ltv;
1329{
1330 struct an_ltv_gen *an_ltv;
1331 struct an_card_rid_desc an_rid_desc;
1332 struct an_command cmd;
1333 struct an_reply reply;
1334 u_int16_t *ptr;
1335 u_int8_t *ptr2;
1336 int i, len;
1337
1338 if (ltv->an_len < 4 || ltv->an_type == 0)
1339 return(EINVAL);
1340
1341 if (!sc->mpi350){
1342 /* Tell the NIC to enter record read mode. */
1343 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1344 printf("an%d: RID access failed\n", sc->an_unit);
1345 return(EIO);
1346 }
1347
1348 /* Seek to the record. */
1349 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1350 printf("an%d: seek to record failed\n", sc->an_unit);
1351 return(EIO);
1352 }
1353
1354 /*
1355 * Read the length and record type and make sure they
1356 * match what we expect (this verifies that we have enough
1357 * room to hold all of the returned data).
1358 * Length includes type but not length.
1359 */
1360 len = CSR_READ_2(sc, AN_DATA1);
1361 if (len > (ltv->an_len - 2)) {
1362 printf("an%d: record length mismatch -- expected %d, "
1363 "got %d for Rid %x\n", sc->an_unit,
1364 ltv->an_len - 2, len, ltv->an_type);
1365 len = ltv->an_len - 2;
1366 } else {
1367 ltv->an_len = len + 2;
1368 }
1369
1370 /* Now read the data. */
1371 len -= 2; /* skip the type */
1372 ptr = &ltv->an_val;
1373 for (i = len; i > 1; i -= 2)
1374 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1375 if (i) {
1376 ptr2 = (u_int8_t *)ptr;
1377 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1378 }
1379 } else { /* MPI-350 */
1380 an_rid_desc.an_valid = 1;
1381 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1382 an_rid_desc.an_rid = 0;
1383 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1384 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1385
1386 bzero(&cmd, sizeof(cmd));
1387 bzero(&reply, sizeof(reply));
1388 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1389 cmd.an_parm0 = ltv->an_type;
1390
1391 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1392 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1393 ((u_int32_t*)&an_rid_desc)[i]);
1394
1395 if (an_cmd_struct(sc, &cmd, &reply)
1396 || reply.an_status & AN_CMD_QUAL_MASK) {
1397 printf("an%d: failed to read RID %x %x %x %x %x, %d\n",
1398 sc->an_unit, ltv->an_type,
1399 reply.an_status,
1400 reply.an_resp0,
1401 reply.an_resp1,
1402 reply.an_resp2,
1403 i);
1404 return(EIO);
1405 }
1406
1407 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1408 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1409 an_rid_desc.an_len = an_ltv->an_len;
1410 }
1411
1412 if (an_rid_desc.an_len > 2)
1413 bcopy(&an_ltv->an_type,
1414 &ltv->an_val,
1415 an_rid_desc.an_len - 2);
1416 ltv->an_len = an_rid_desc.an_len + 2;
1417 }
1418
1419 if (an_dump)
1420 an_dump_record(sc, ltv, "Read");
1421
1422 return(0);
1423}
1424
1425/*
1426 * Same as read, except we inject data instead of reading it.
1427 */
1428static int
1429an_write_record(sc, ltv)
1430 struct an_softc *sc;
1431 struct an_ltv_gen *ltv;
1432{
1433 struct an_card_rid_desc an_rid_desc;
1434 struct an_command cmd;
1435 struct an_reply reply;
1436 char *buf;
1437 u_int16_t *ptr;
1438 u_int8_t *ptr2;
1439 int i, len;
1440
1441 if (an_dump)
1442 an_dump_record(sc, ltv, "Write");
1443
1444 if (!sc->mpi350){
1445 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1446 return(EIO);
1447
1448 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1449 return(EIO);
1450
1451 /*
1452 * Length includes type but not length.
1453 */
1454 len = ltv->an_len - 2;
1455 CSR_WRITE_2(sc, AN_DATA1, len);
1456
1457 len -= 2; /* skip the type */
1458 ptr = &ltv->an_val;
1459 for (i = len; i > 1; i -= 2)
1460 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1461 if (i) {
1462 ptr2 = (u_int8_t *)ptr;
1463 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1464 }
1465
1466 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1467 return(EIO);
1468 } else {
1469 /* MPI-350 */
1470
1471 for (i = 0; i != AN_TIMEOUT; i++) {
1472 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1473 & AN_CMD_BUSY) {
1474 DELAY(10);
1475 } else
1476 break;
1477 }
1478 if (i == AN_TIMEOUT) {
1479 printf("BUSY\n");
1480 }
1481
1482 an_rid_desc.an_valid = 1;
1483 an_rid_desc.an_len = ltv->an_len - 2;
1484 an_rid_desc.an_rid = ltv->an_type;
1485 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1486
1487 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1488 an_rid_desc.an_len);
1489
1490 bzero(&cmd,sizeof(cmd));
1491 bzero(&reply,sizeof(reply));
1492 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1493 cmd.an_parm0 = ltv->an_type;
1494
1495 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1496 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1497 ((u_int32_t*)&an_rid_desc)[i]);
1498
1499 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1500 printf("an%d: failed to write RID 1 %x %x %x %x %x, %d\n",
1501 sc->an_unit, ltv->an_type,
1502 reply.an_status,
1503 reply.an_resp0,
1504 reply.an_resp1,
1505 reply.an_resp2,
1506 i);
1507 return(EIO);
1508 }
1509
1510 ptr = (u_int16_t *)buf;
1511
1512 if (reply.an_status & AN_CMD_QUAL_MASK) {
1513 printf("an%d: failed to write RID 2 %x %x %x %x %x, %d\n",
1514 sc->an_unit, ltv->an_type,
1515 reply.an_status,
1516 reply.an_resp0,
1517 reply.an_resp1,
1518 reply.an_resp2,
1519 i);
1520 return(EIO);
1521 }
1522 }
1523
1524 return(0);
1525}
1526
1527static void
1528an_dump_record(sc, ltv, string)
1529 struct an_softc *sc;
1530 struct an_ltv_gen *ltv;
1531 char *string;
1532{
1533 u_int8_t *ptr2;
1534 int len;
1535 int i;
1536 int count = 0;
1537 char buf[17], temp;
1538
1539 len = ltv->an_len - 4;
1540 printf("an%d: RID %4x, Length %4d, Mode %s\n",
1541 sc->an_unit, ltv->an_type, ltv->an_len - 4, string);
1542
1543 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1544 printf("an%d:\t", sc->an_unit);
1545 bzero(buf,sizeof(buf));
1546
1547 ptr2 = (u_int8_t *)&ltv->an_val;
1548 for (i = len; i > 0; i--) {
1549 printf("%02x ", *ptr2);
1550
1551 temp = *ptr2++;
1552 if (temp >= ' ' && temp <= '~')
1553 buf[count] = temp;
1554 else if (temp >= 'A' && temp <= 'Z')
1555 buf[count] = temp;
1556 else
1557 buf[count] = '.';
1558 if (++count == 16) {
1559 count = 0;
1560 printf("%s\n",buf);
1561 printf("an%d:\t", sc->an_unit);
1562 bzero(buf,sizeof(buf));
1563 }
1564 }
1565 for (; count != 16; count++) {
1566 printf(" ");
1567 }
1568 printf(" %s\n",buf);
1569 }
1570}
1571
1572static int
1573an_seek(sc, id, off, chan)
1574 struct an_softc *sc;
1575 int id, off, chan;
1576{
1577 int i;
1578 int selreg, offreg;
1579
1580 switch (chan) {
1581 case AN_BAP0:
1582 selreg = AN_SEL0;
1583 offreg = AN_OFF0;
1584 break;
1585 case AN_BAP1:
1586 selreg = AN_SEL1;
1587 offreg = AN_OFF1;
1588 break;
1589 default:
1590 printf("an%d: invalid data path: %x\n", sc->an_unit, chan);
1591 return(EIO);
1592 }
1593
1594 CSR_WRITE_2(sc, selreg, id);
1595 CSR_WRITE_2(sc, offreg, off);
1596
1597 for (i = 0; i < AN_TIMEOUT; i++) {
1598 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1599 break;
1600 }
1601
1602 if (i == AN_TIMEOUT)
1603 return(ETIMEDOUT);
1604
1605 return(0);
1606}
1607
1608static int
1609an_read_data(sc, id, off, buf, len)
1610 struct an_softc *sc;
1611 int id, off;
1612 caddr_t buf;
1613 int len;
1614{
1615 int i;
1616 u_int16_t *ptr;
1617 u_int8_t *ptr2;
1618
1619 if (off != -1) {
1620 if (an_seek(sc, id, off, AN_BAP1))
1621 return(EIO);
1622 }
1623
1624 ptr = (u_int16_t *)buf;
1625 for (i = len; i > 1; i -= 2)
1626 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1627 if (i) {
1628 ptr2 = (u_int8_t *)ptr;
1629 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1630 }
1631
1632 return(0);
1633}
1634
1635static int
1636an_write_data(sc, id, off, buf, len)
1637 struct an_softc *sc;
1638 int id, off;
1639 caddr_t buf;
1640 int len;
1641{
1642 int i;
1643 u_int16_t *ptr;
1644 u_int8_t *ptr2;
1645
1646 if (off != -1) {
1647 if (an_seek(sc, id, off, AN_BAP0))
1648 return(EIO);
1649 }
1650
1651 ptr = (u_int16_t *)buf;
1652 for (i = len; i > 1; i -= 2)
1653 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1654 if (i) {
1655 ptr2 = (u_int8_t *)ptr;
1656 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1657 }
1658
1659 return(0);
1660}
1661
1662/*
1663 * Allocate a region of memory inside the NIC and zero
1664 * it out.
1665 */
1666static int
1667an_alloc_nicmem(sc, len, id)
1668 struct an_softc *sc;
1669 int len;
1670 int *id;
1671{
1672 int i;
1673
1674 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1675 printf("an%d: failed to allocate %d bytes on NIC\n",
1676 sc->an_unit, len);
1677 return(ENOMEM);
1678 }
1679
1680 for (i = 0; i < AN_TIMEOUT; i++) {
1681 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1682 break;
1683 }
1684
1685 if (i == AN_TIMEOUT)
1686 return(ETIMEDOUT);
1687
1688 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1689 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1690
1691 if (an_seek(sc, *id, 0, AN_BAP0))
1692 return(EIO);
1693
1694 for (i = 0; i < len / 2; i++)
1695 CSR_WRITE_2(sc, AN_DATA0, 0);
1696
1697 return(0);
1698}
1699
1700static void
1701an_setdef(sc, areq)
1702 struct an_softc *sc;
1703 struct an_req *areq;
1704{
1705 struct sockaddr_dl *sdl;
1706 struct ifaddr *ifa;
1707 struct ifnet *ifp;
1708 struct an_ltv_genconfig *cfg;
1709 struct an_ltv_ssidlist *ssid;
1710 struct an_ltv_aplist *ap;
1711 struct an_ltv_gen *sp;
1712
1713 ifp = &sc->arpcom.ac_if;
1714
1715 switch (areq->an_type) {
1716 case AN_RID_GENCONFIG:
1717 cfg = (struct an_ltv_genconfig *)areq;
1718
1719 ifa = ifnet_addrs[ifp->if_index - 1];
1720 sdl = (struct sockaddr_dl *)ifa->ifa_addr;
1721 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1722 ETHER_ADDR_LEN);
1723 bcopy((char *)&cfg->an_macaddr, LLADDR(sdl), ETHER_ADDR_LEN);
1724
1725 bcopy((char *)cfg, (char *)&sc->an_config,
1726 sizeof(struct an_ltv_genconfig));
1727 break;
1728 case AN_RID_SSIDLIST:
1729 ssid = (struct an_ltv_ssidlist *)areq;
1730 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
1731 sizeof(struct an_ltv_ssidlist));
1732 break;
1733 case AN_RID_APLIST:
1734 ap = (struct an_ltv_aplist *)areq;
1735 bcopy((char *)ap, (char *)&sc->an_aplist,
1736 sizeof(struct an_ltv_aplist));
1737 break;
1738 case AN_RID_TX_SPEED:
1739 sp = (struct an_ltv_gen *)areq;
1740 sc->an_tx_rate = sp->an_val;
1741
1742 /* Read the current configuration */
1743 sc->an_config.an_type = AN_RID_GENCONFIG;
1744 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1745 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1746 cfg = &sc->an_config;
1747
1748 /* clear other rates and set the only one we want */
1749 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1750 cfg->an_rates[0] = sc->an_tx_rate;
1751
1752 /* Save the new rate */
1753 sc->an_config.an_type = AN_RID_GENCONFIG;
1754 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1755 break;
1756 case AN_RID_WEP_TEMP:
1757 /* Cache the temp keys */
1758 bcopy(areq,
1759 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1760 sizeof(struct an_ltv_key));
1761 case AN_RID_WEP_PERM:
1762 case AN_RID_LEAPUSERNAME:
1763 case AN_RID_LEAPPASSWORD:
1764 /* Disable the MAC. */
1765 an_cmd(sc, AN_CMD_DISABLE, 0);
1766
1767 /* Write the key */
1768 an_write_record(sc, (struct an_ltv_gen *)areq);
1769
1770 /* Turn the MAC back on. */
1771 an_cmd(sc, AN_CMD_ENABLE, 0);
1772
1773 break;
1774 case AN_RID_MONITOR_MODE:
1775 cfg = (struct an_ltv_genconfig *)areq;
1776 bpfdetach(ifp);
1777 if (ng_ether_detach_p != NULL)
1778 (*ng_ether_detach_p) (ifp);
1779 sc->an_monitor = cfg->an_len;
1780
1781 if (sc->an_monitor & AN_MONITOR) {
1782 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1783 bpfattach(ifp, DLT_AIRONET_HEADER,
1784 sizeof(struct ether_header));
1785 } else {
1786 bpfattach(ifp, DLT_IEEE802_11,
1787 sizeof(struct ether_header));
1788 }
1789 } else {
1790 bpfattach(ifp, DLT_EN10MB,
1791 sizeof(struct ether_header));
1792 if (ng_ether_attach_p != NULL)
1793 (*ng_ether_attach_p) (ifp);
1794 }
1795 break;
1796 default:
1797 printf("an%d: unknown RID: %x\n", sc->an_unit, areq->an_type);
1798 return;
1799 break;
1800 }
1801
1802
1803 /* Reinitialize the card. */
1804 if (ifp->if_flags)
1805 an_init(sc);
1806
1807 return;
1808}
1809
1810/*
1811 * Derived from Linux driver to enable promiscious mode.
1812 */
1813
1814static void
1815an_promisc(sc, promisc)
1816 struct an_softc *sc;
1817 int promisc;
1818{
1819 if (sc->an_was_monitor)
1820 an_reset(sc);
1821 if (sc->mpi350)
1822 an_init_mpi350_desc(sc);
1823 if (sc->an_monitor || sc->an_was_monitor)
1824 an_init(sc);
1825
1826 sc->an_was_monitor = sc->an_monitor;
1827 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1828
1829 return;
1830}
1831
1832static int
bd4539cc 1833an_ioctl(ifp, command, data, cr)
984263bc
MD
1834 struct ifnet *ifp;
1835 u_long command;
1836 caddr_t data;
bd4539cc 1837 struct ucred *cr;
984263bc
MD
1838{
1839 int s, error = 0;
1840 int len;
1841 int i;
1842 struct an_softc *sc;
1843 struct ifreq *ifr;
984263bc
MD
1844 struct ieee80211req *ireq;
1845 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1846 u_int8_t *tmpptr;
1847 struct an_ltv_genconfig *config;
1848 struct an_ltv_key *key;
1849 struct an_ltv_status *status;
1850 struct an_ltv_ssidlist *ssids;
1851 int mode;
1852 struct aironet_ioctl l_ioctl;
1853
1854 sc = ifp->if_softc;
1855 s = splimp();
1856 ifr = (struct ifreq *)data;
1857 ireq = (struct ieee80211req *)data;
1858
1859 config = (struct an_ltv_genconfig *)&sc->areq;
1860 key = (struct an_ltv_key *)&sc->areq;
1861 status = (struct an_ltv_status *)&sc->areq;
1862 ssids = (struct an_ltv_ssidlist *)&sc->areq;
1863
1864 if (sc->an_gone) {
1865 error = ENODEV;
1866 goto out;
1867 }
1868
1869 switch (command) {
1870 case SIOCSIFADDR:
1871 case SIOCGIFADDR:
1872 case SIOCSIFMTU:
1873 error = ether_ioctl(ifp, command, data);
1874 break;
1875 case SIOCSIFFLAGS:
1876 if (ifp->if_flags & IFF_UP) {
1877 if (ifp->if_flags & IFF_RUNNING &&
1878 ifp->if_flags & IFF_PROMISC &&
1879 !(sc->an_if_flags & IFF_PROMISC)) {
1880 an_promisc(sc, 1);
1881 } else if (ifp->if_flags & IFF_RUNNING &&
1882 !(ifp->if_flags & IFF_PROMISC) &&
1883 sc->an_if_flags & IFF_PROMISC) {
1884 an_promisc(sc, 0);
1885 } else
1886 an_init(sc);
1887 } else {
1888 if (ifp->if_flags & IFF_RUNNING)
1889 an_stop(sc);
1890 }
1891 sc->an_if_flags = ifp->if_flags;
1892 error = 0;
1893 break;
1894 case SIOCSIFMEDIA:
1895 case SIOCGIFMEDIA:
1896 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1897 break;
1898 case SIOCADDMULTI:
1899 case SIOCDELMULTI:
1900 /* The Aironet has no multicast filter. */
1901 error = 0;
1902 break;
1903 case SIOCGAIRONET:
1904 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1905 if (error != 0)
1906 break;
1907#ifdef ANCACHE
1908 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1909 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1910 if (error)
1911 break;
1912 sc->an_sigitems = sc->an_nextitem = 0;
1913 break;
1914 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1915 char *pt = (char *)&sc->areq.an_val;
1916 bcopy((char *)&sc->an_sigitems, (char *)pt,
1917 sizeof(int));
1918 pt += sizeof(int);
1919 sc->areq.an_len = sizeof(int) / 2;
1920 bcopy((char *)&sc->an_sigcache, (char *)pt,
1921 sizeof(struct an_sigcache) * sc->an_sigitems);
1922 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1923 sc->an_sigitems) / 2) + 1;
1924 } else
1925#endif
1926 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1927 error = EINVAL;
1928 break;
1929 }
1930 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1931 break;
1932 case SIOCSAIRONET:
bd4539cc 1933 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1934 goto out;
1935 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1936 if (error != 0)
1937 break;
1938 an_setdef(sc, &sc->areq);
1939 break;
1940 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1941 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1942 goto out;
1943 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1944 mode = l_ioctl.command;
1945
1946 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1947 error = readrids(ifp, &l_ioctl);
1948 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1949 error = writerids(ifp, &l_ioctl);
1950 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1951 error = flashcard(ifp, &l_ioctl);
1952 } else {
1953 error =-1;
1954 }
1955
1956 /* copy out the updated command info */
1957 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1958
1959 break;
1960 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1961 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
1962 goto out;
1963 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1964 l_ioctl.command = 0;
1965 error = AIROMAGIC;
1966 copyout(&error, l_ioctl.data, sizeof(error));
1967 error = 0;
1968 break;
1969 case SIOCG80211:
1970 sc->areq.an_len = sizeof(sc->areq);
1971 /* was that a good idea DJA we are doing a short-cut */
1972 switch (ireq->i_type) {
1973 case IEEE80211_IOC_SSID:
1974 if (ireq->i_val == -1) {
1975 sc->areq.an_type = AN_RID_STATUS;
1976 if (an_read_record(sc,
1977 (struct an_ltv_gen *)&sc->areq)) {
1978 error = EINVAL;
1979 break;
1980 }
1981 len = status->an_ssidlen;
1982 tmpptr = status->an_ssid;
1983 } else if (ireq->i_val >= 0) {
1984 sc->areq.an_type = AN_RID_SSIDLIST;
1985 if (an_read_record(sc,
1986 (struct an_ltv_gen *)&sc->areq)) {
1987 error = EINVAL;
1988 break;
1989 }
1990 if (ireq->i_val == 0) {
1991 len = ssids->an_ssid1_len;
1992 tmpptr = ssids->an_ssid1;
1993 } else if (ireq->i_val == 1) {
1994 len = ssids->an_ssid2_len;
1995 tmpptr = ssids->an_ssid2;
1996 } else if (ireq->i_val == 2) {
1997 len = ssids->an_ssid3_len;
1998 tmpptr = ssids->an_ssid3;
1999 } else {
2000 error = EINVAL;
2001 break;
2002 }
2003 } else {
2004 error = EINVAL;
2005 break;
2006 }
2007 if (len > IEEE80211_NWID_LEN) {
2008 error = EINVAL;
2009 break;
2010 }
2011 ireq->i_len = len;
2012 bzero(tmpstr, IEEE80211_NWID_LEN);
2013 bcopy(tmpptr, tmpstr, len);
2014 error = copyout(tmpstr, ireq->i_data,
2015 IEEE80211_NWID_LEN);
2016 break;
2017 case IEEE80211_IOC_NUMSSIDS:
2018 ireq->i_val = 3;
2019 break;
2020 case IEEE80211_IOC_WEP:
2021 sc->areq.an_type = AN_RID_ACTUALCFG;
2022 if (an_read_record(sc,
2023 (struct an_ltv_gen *)&sc->areq)) {
2024 error = EINVAL;
2025 break;
2026 }
2027 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
2028 if (config->an_authtype &
2029 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
2030 ireq->i_val = IEEE80211_WEP_MIXED;
2031 else
2032 ireq->i_val = IEEE80211_WEP_ON;
2033 } else {
2034 ireq->i_val = IEEE80211_WEP_OFF;
2035 }
2036 break;
2037 case IEEE80211_IOC_WEPKEY:
2038 /*
2039 * XXX: I'm not entierly convinced this is
2040 * correct, but it's what is implemented in
2041 * ancontrol so it will have to do until we get
2042 * access to actual Cisco code.
2043 */
2044 if (ireq->i_val < 0 || ireq->i_val > 8) {
2045 error = EINVAL;
2046 break;
2047 }
2048 len = 0;
2049 if (ireq->i_val < 5) {
2050 sc->areq.an_type = AN_RID_WEP_TEMP;
2051 for (i = 0; i < 5; i++) {
2052 if (an_read_record(sc,
2053 (struct an_ltv_gen *)&sc->areq)) {
2054 error = EINVAL;
2055 break;
2056 }
2057 if (key->kindex == 0xffff)
2058 break;
2059 if (key->kindex == ireq->i_val)
2060 len = key->klen;
2061 /* Required to get next entry */
2062 sc->areq.an_type = AN_RID_WEP_PERM;
2063 }
2064 if (error != 0)
2065 break;
2066 }
2067 /* We aren't allowed to read the value of the
2068 * key from the card so we just output zeros
2069 * like we would if we could read the card, but
2070 * denied the user access.
2071 */
2072 bzero(tmpstr, len);
2073 ireq->i_len = len;
2074 error = copyout(tmpstr, ireq->i_data, len);
2075 break;
2076 case IEEE80211_IOC_NUMWEPKEYS:
2077 ireq->i_val = 9; /* include home key */
2078 break;
2079 case IEEE80211_IOC_WEPTXKEY:
2080 /*
2081 * For some strange reason, you have to read all
2082 * keys before you can read the txkey.
2083 */
2084 sc->areq.an_type = AN_RID_WEP_TEMP;
2085 for (i = 0; i < 5; i++) {
2086 if (an_read_record(sc,
2087 (struct an_ltv_gen *) &sc->areq)) {
2088 error = EINVAL;
2089 break;
2090 }
2091 if (key->kindex == 0xffff)
2092 break;
2093 /* Required to get next entry */
2094 sc->areq.an_type = AN_RID_WEP_PERM;
2095 }
2096 if (error != 0)
2097 break;
2098
2099 sc->areq.an_type = AN_RID_WEP_PERM;
2100 key->kindex = 0xffff;
2101 if (an_read_record(sc,
2102 (struct an_ltv_gen *)&sc->areq)) {
2103 error = EINVAL;
2104 break;
2105 }
2106 ireq->i_val = key->mac[0];
2107 /*
2108 * Check for home mode. Map home mode into
2109 * 5th key since that is how it is stored on
2110 * the card
2111 */
2112 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2113 sc->areq.an_type = AN_RID_GENCONFIG;
2114 if (an_read_record(sc,
2115 (struct an_ltv_gen *)&sc->areq)) {
2116 error = EINVAL;
2117 break;
2118 }
2119 if (config->an_home_product & AN_HOME_NETWORK)
2120 ireq->i_val = 4;
2121 break;
2122 case IEEE80211_IOC_AUTHMODE:
2123 sc->areq.an_type = AN_RID_ACTUALCFG;
2124 if (an_read_record(sc,
2125 (struct an_ltv_gen *)&sc->areq)) {
2126 error = EINVAL;
2127 break;
2128 }
2129 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2130 AN_AUTHTYPE_NONE) {
2131 ireq->i_val = IEEE80211_AUTH_NONE;
2132 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2133 AN_AUTHTYPE_OPEN) {
2134 ireq->i_val = IEEE80211_AUTH_OPEN;
2135 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2136 AN_AUTHTYPE_SHAREDKEY) {
2137 ireq->i_val = IEEE80211_AUTH_SHARED;
2138 } else
2139 error = EINVAL;
2140 break;
2141 case IEEE80211_IOC_STATIONNAME:
2142 sc->areq.an_type = AN_RID_ACTUALCFG;
2143 if (an_read_record(sc,
2144 (struct an_ltv_gen *)&sc->areq)) {
2145 error = EINVAL;
2146 break;
2147 }
2148 ireq->i_len = sizeof(config->an_nodename);
2149 tmpptr = config->an_nodename;
2150 bzero(tmpstr, IEEE80211_NWID_LEN);
2151 bcopy(tmpptr, tmpstr, ireq->i_len);
2152 error = copyout(tmpstr, ireq->i_data,
2153 IEEE80211_NWID_LEN);
2154 break;
2155 case IEEE80211_IOC_CHANNEL:
2156 sc->areq.an_type = AN_RID_STATUS;
2157 if (an_read_record(sc,
2158 (struct an_ltv_gen *)&sc->areq)) {
2159 error = EINVAL;
2160 break;
2161 }
2162 ireq->i_val = status->an_cur_channel;
2163 break;
2164 case IEEE80211_IOC_POWERSAVE:
2165 sc->areq.an_type = AN_RID_ACTUALCFG;
2166 if (an_read_record(sc,
2167 (struct an_ltv_gen *)&sc->areq)) {
2168 error = EINVAL;
2169 break;
2170 }
2171 if (config->an_psave_mode == AN_PSAVE_NONE) {
2172 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2173 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2174 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2175 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2176 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2177 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2178 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2179 } else
2180 error = EINVAL;
2181 break;
2182 case IEEE80211_IOC_POWERSAVESLEEP:
2183 sc->areq.an_type = AN_RID_ACTUALCFG;
2184 if (an_read_record(sc,
2185 (struct an_ltv_gen *)&sc->areq)) {
2186 error = EINVAL;
2187 break;
2188 }
2189 ireq->i_val = config->an_listen_interval;
2190 break;
2191 }
2192 break;
2193 case SIOCS80211:
bd4539cc 2194 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
984263bc
MD
2195 goto out;
2196 sc->areq.an_len = sizeof(sc->areq);
2197 /*
2198 * We need a config structure for everything but the WEP
2199 * key management and SSIDs so we get it now so avoid
2200 * duplicating this code every time.
2201 */
2202 if (ireq->i_type != IEEE80211_IOC_SSID &&
2203 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2204 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2205 sc->areq.an_type = AN_RID_GENCONFIG;
2206 if (an_read_record(sc,
2207 (struct an_ltv_gen *)&sc->areq)) {
2208 error = EINVAL;
2209 break;
2210 }
2211 }
2212 switch (ireq->i_type) {
2213 case IEEE80211_IOC_SSID:
2214 sc->areq.an_type = AN_RID_SSIDLIST;
2215 if (an_read_record(sc,
2216 (struct an_ltv_gen *)&sc->areq)) {
2217 error = EINVAL;
2218 break;
2219 }
2220 if (ireq->i_len > IEEE80211_NWID_LEN) {
2221 error = EINVAL;
2222 break;
2223 }
2224 switch (ireq->i_val) {
2225 case 0:
2226 error = copyin(ireq->i_data,
2227 ssids->an_ssid1, ireq->i_len);
2228 ssids->an_ssid1_len = ireq->i_len;
2229 break;
2230 case 1:
2231 error = copyin(ireq->i_data,
2232 ssids->an_ssid2, ireq->i_len);
2233 ssids->an_ssid2_len = ireq->i_len;
2234 break;
2235 case 2:
2236 error = copyin(ireq->i_data,
2237 ssids->an_ssid3, ireq->i_len);
2238 ssids->an_ssid3_len = ireq->i_len;
2239 break;
2240 default:
2241 error = EINVAL;
2242 break;
2243 }
2244 break;
2245 case IEEE80211_IOC_WEP:
2246 switch (ireq->i_val) {
2247 case IEEE80211_WEP_OFF:
2248 config->an_authtype &=
2249 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2250 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2251 break;
2252 case IEEE80211_WEP_ON:
2253 config->an_authtype |=
2254 AN_AUTHTYPE_PRIVACY_IN_USE;
2255 config->an_authtype &=
2256 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2257 break;
2258 case IEEE80211_WEP_MIXED:
2259 config->an_authtype |=
2260 AN_AUTHTYPE_PRIVACY_IN_USE |
2261 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2262 break;
2263 default:
2264 error = EINVAL;
2265 break;
2266 }
2267 break;
2268 case IEEE80211_IOC_WEPKEY:
2269 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2270 ireq->i_len > 13) {
2271 error = EINVAL;
2272 break;
2273 }
2274 error = copyin(ireq->i_data, tmpstr, 13);
2275 if (error != 0)
2276 break;
2277 /*
2278 * Map the 9th key into the home mode
2279 * since that is how it is stored on
2280 * the card
2281 */
2282 bzero(&sc->areq, sizeof(struct an_ltv_key));
2283 sc->areq.an_len = sizeof(struct an_ltv_key);
2284 key->mac[0] = 1; /* The others are 0. */
2285 if (ireq->i_val < 4) {
2286 sc->areq.an_type = AN_RID_WEP_TEMP;
2287 key->kindex = ireq->i_val;
2288 } else {
2289 sc->areq.an_type = AN_RID_WEP_PERM;
2290 key->kindex = ireq->i_val - 4;
2291 }
2292 key->klen = ireq->i_len;
2293 bcopy(tmpstr, key->key, key->klen);
2294 break;
2295 case IEEE80211_IOC_WEPTXKEY:
2296 if (ireq->i_val < 0 || ireq->i_val > 4) {
2297 error = EINVAL;
2298 break;
2299 }
2300
2301 /*
2302 * Map the 5th key into the home mode
2303 * since that is how it is stored on
2304 * the card
2305 */
2306 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2307 sc->areq.an_type = AN_RID_ACTUALCFG;
2308 if (an_read_record(sc,
2309 (struct an_ltv_gen *)&sc->areq)) {
2310 error = EINVAL;
2311 break;
2312 }
2313 if (ireq->i_val == 4) {
2314 config->an_home_product |= AN_HOME_NETWORK;
2315 ireq->i_val = 0;
2316 } else {
2317 config->an_home_product &= ~AN_HOME_NETWORK;
2318 }
2319
2320 sc->an_config.an_home_product
2321 = config->an_home_product;
2322
2323 /* update configuration */
2324 an_init(sc);
2325
2326 bzero(&sc->areq, sizeof(struct an_ltv_key));
2327 sc->areq.an_len = sizeof(struct an_ltv_key);
2328 sc->areq.an_type = AN_RID_WEP_PERM;
2329 key->kindex = 0xffff;
2330 key->mac[0] = ireq->i_val;
2331 break;
2332 case IEEE80211_IOC_AUTHMODE:
2333 switch (ireq->i_val) {
2334 case IEEE80211_AUTH_NONE:
2335 config->an_authtype = AN_AUTHTYPE_NONE |
2336 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2337 break;
2338 case IEEE80211_AUTH_OPEN:
2339 config->an_authtype = AN_AUTHTYPE_OPEN |
2340 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2341 break;
2342 case IEEE80211_AUTH_SHARED:
2343 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2344 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2345 break;
2346 default:
2347 error = EINVAL;
2348 }
2349 break;
2350 case IEEE80211_IOC_STATIONNAME:
2351 if (ireq->i_len > 16) {
2352 error = EINVAL;
2353 break;
2354 }
2355 bzero(config->an_nodename, 16);
2356 error = copyin(ireq->i_data,
2357 config->an_nodename, ireq->i_len);
2358 break;
2359 case IEEE80211_IOC_CHANNEL:
2360 /*
2361 * The actual range is 1-14, but if you set it
2362 * to 0 you get the default so we let that work
2363 * too.
2364 */
2365 if (ireq->i_val < 0 || ireq->i_val >14) {
2366 error = EINVAL;
2367 break;
2368 }
2369 config->an_ds_channel = ireq->i_val;
2370 break;
2371 case IEEE80211_IOC_POWERSAVE:
2372 switch (ireq->i_val) {
2373 case IEEE80211_POWERSAVE_OFF:
2374 config->an_psave_mode = AN_PSAVE_NONE;
2375 break;
2376 case IEEE80211_POWERSAVE_CAM:
2377 config->an_psave_mode = AN_PSAVE_CAM;
2378 break;
2379 case IEEE80211_POWERSAVE_PSP:
2380 config->an_psave_mode = AN_PSAVE_PSP;
2381 break;
2382 case IEEE80211_POWERSAVE_PSP_CAM:
2383 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2384 break;
2385 default:
2386 error = EINVAL;
2387 break;
2388 }
2389 break;
2390 case IEEE80211_IOC_POWERSAVESLEEP:
2391 config->an_listen_interval = ireq->i_val;
2392 break;
2393 }
2394
2395 if (!error)
2396 an_setdef(sc, &sc->areq);
2397 break;
2398 default:
2399 error = EINVAL;
2400 break;
2401 }
2402out:
2403 splx(s);
2404
2405 return(error != 0);
2406}
2407
2408static int
2409an_init_tx_ring(sc)
2410 struct an_softc *sc;
2411{
2412 int i;
2413 int id;
2414
2415 if (sc->an_gone)
2416 return (0);
2417
2418 if (!sc->mpi350) {
2419 for (i = 0; i < AN_TX_RING_CNT; i++) {
2420 if (an_alloc_nicmem(sc, 1518 +
2421 0x44, &id))
2422 return(ENOMEM);
2423 sc->an_rdata.an_tx_fids[i] = id;
2424 sc->an_rdata.an_tx_ring[i] = 0;
2425 }
2426 }
2427
2428 sc->an_rdata.an_tx_prod = 0;
2429 sc->an_rdata.an_tx_cons = 0;
2430 sc->an_rdata.an_tx_empty = 1;
2431
2432 return(0);
2433}
2434
2435static void
2436an_init(xsc)
2437 void *xsc;
2438{
2439 struct an_softc *sc = xsc;
2440 struct ifnet *ifp = &sc->arpcom.ac_if;
2441 int s;
2442
2443 s = splimp();
2444
2445 if (sc->an_gone) {
2446 splx(s);
2447 return;
2448 }
2449
2450 if (ifp->if_flags & IFF_RUNNING)
2451 an_stop(sc);
2452
2453 sc->an_associated = 0;
2454
2455 /* Allocate the TX buffers */
2456 if (an_init_tx_ring(sc)) {
2457 an_reset(sc);
2458 if (sc->mpi350)
2459 an_init_mpi350_desc(sc);
2460 if (an_init_tx_ring(sc)) {
2461 printf("an%d: tx buffer allocation "
2462 "failed\n", sc->an_unit);
2463 splx(s);
2464 return;
2465 }
2466 }
2467
2468 /* Set our MAC address. */
2469 bcopy((char *)&sc->arpcom.ac_enaddr,
2470 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2471
2472 if (ifp->if_flags & IFF_BROADCAST)
2473 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2474 else
2475 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2476
2477 if (ifp->if_flags & IFF_MULTICAST)
2478 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2479
2480 if (ifp->if_flags & IFF_PROMISC) {
2481 if (sc->an_monitor & AN_MONITOR) {
2482 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2483 sc->an_config.an_rxmode |=
2484 AN_RXMODE_80211_MONITOR_ANYBSS |
2485 AN_RXMODE_NO_8023_HEADER;
2486 } else {
2487 sc->an_config.an_rxmode |=
2488 AN_RXMODE_80211_MONITOR_CURBSS |
2489 AN_RXMODE_NO_8023_HEADER;
2490 }
2491 }
2492 }
2493
2494 if (sc->an_have_rssimap)
2495 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2496
2497 /* Set the ssid list */
2498 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
2499 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist);
2500 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
2501 printf("an%d: failed to set ssid list\n", sc->an_unit);
2502 splx(s);
2503 return;
2504 }
2505
2506 /* Set the AP list */
2507 sc->an_aplist.an_type = AN_RID_APLIST;
2508 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2509 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
2510 printf("an%d: failed to set AP list\n", sc->an_unit);
2511 splx(s);
2512 return;
2513 }
2514
2515 /* Set the configuration in the NIC */
2516 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2517 sc->an_config.an_type = AN_RID_GENCONFIG;
2518 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
2519 printf("an%d: failed to set configuration\n", sc->an_unit);
2520 splx(s);
2521 return;
2522 }
2523
2524 /* Enable the MAC */
2525 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
2526 printf("an%d: failed to enable MAC\n", sc->an_unit);
2527 splx(s);
2528 return;
2529 }
2530
2531 if (ifp->if_flags & IFF_PROMISC)
2532 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2533
2534 /* enable interrupts */
2535 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS);
2536
2537 ifp->if_flags |= IFF_RUNNING;
2538 ifp->if_flags &= ~IFF_OACTIVE;
2539
89c0f216 2540 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2541 splx(s);
2542
2543 return;
2544}
2545
2546static void
2547an_start(ifp)
2548 struct ifnet *ifp;
2549{
2550 struct an_softc *sc;
2551 struct mbuf *m0 = NULL;
2552 struct an_txframe_802_3 tx_frame_802_3;
2553 struct ether_header *eh;
2554 int id, idx, i;
2555 unsigned char txcontrol;
2556 struct an_card_tx_desc an_tx_desc;
2557 u_int8_t *ptr;
2558 u_int8_t *buf;
2559
2560 sc = ifp->if_softc;
2561
2562 if (sc->an_gone)
2563 return;
2564
2565 if (ifp->if_flags & IFF_OACTIVE)
2566 return;
2567
2568 if (!sc->an_associated)
2569 return;
2570
2571 /* We can't send in monitor mode so toss any attempts. */
2572 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
2573 for (;;) {
2574 IF_DEQUEUE(&ifp->if_snd, m0);
2575 if (m0 == NULL)
2576 break;
2577 m_freem(m0);
2578 }
2579 return;
2580 }
2581
2582 idx = sc->an_rdata.an_tx_prod;
2583
2584 if (!sc->mpi350) {
2585 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2586
2587 while (sc->an_rdata.an_tx_ring[idx] == 0) {
2588 IF_DEQUEUE(&ifp->if_snd, m0);
2589 if (m0 == NULL)
2590 break;
2591
2592 id = sc->an_rdata.an_tx_fids[idx];
2593 eh = mtod(m0, struct ether_header *);
2594
2595 bcopy((char *)&eh->ether_dhost,
2596 (char *)&tx_frame_802_3.an_tx_dst_addr,
2597 ETHER_ADDR_LEN);
2598 bcopy((char *)&eh->ether_shost,
2599 (char *)&tx_frame_802_3.an_tx_src_addr,
2600 ETHER_ADDR_LEN);
2601
2602 /* minus src/dest mac & type */
2603 tx_frame_802_3.an_tx_802_3_payload_len =
2604 m0->m_pkthdr.len - 12;
2605
2606 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2607 tx_frame_802_3.an_tx_802_3_payload_len,
2608 (caddr_t)&sc->an_txbuf);
2609
2610 txcontrol = AN_TXCTL_8023;
2611 /* write the txcontrol only */
2612 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2613 sizeof(txcontrol));
2614
2615 /* 802_3 header */
2616 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2617 sizeof(struct an_txframe_802_3));
2618
2619 /* in mbuf header type is just before payload */
2620 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2621 tx_frame_802_3.an_tx_802_3_payload_len);
2622
7600679e 2623 BPF_MTAP(ifp, m0);
984263bc
MD
2624
2625 m_freem(m0);
2626 m0 = NULL;
2627
2628 sc->an_rdata.an_tx_ring[idx] = id;
2629 if (an_cmd(sc, AN_CMD_TX, id))
2630 printf("an%d: xmit failed\n", sc->an_unit);
2631
2632 AN_INC(idx, AN_TX_RING_CNT);
2633 }
2634 } else { /* MPI-350 */
2635 while (sc->an_rdata.an_tx_empty ||
2636 idx != sc->an_rdata.an_tx_cons) {
2637 IF_DEQUEUE(&ifp->if_snd, m0);
2638 if (m0 == NULL) {
2639 break;
2640 }
2641 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2642
2643 eh = mtod(m0, struct ether_header *);
2644
2645 /* DJA optimize this to limit bcopy */
2646 bcopy((char *)&eh->ether_dhost,
2647 (char *)&tx_frame_802_3.an_tx_dst_addr,
2648 ETHER_ADDR_LEN);
2649 bcopy((char *)&eh->ether_shost,
2650 (char *)&tx_frame_802_3.an_tx_src_addr,
2651 ETHER_ADDR_LEN);
2652
2653 /* minus src/dest mac & type */
2654 tx_frame_802_3.an_tx_802_3_payload_len =
2655 m0->m_pkthdr.len - 12;
2656
2657 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2658 tx_frame_802_3.an_tx_802_3_payload_len,
2659 (caddr_t)&sc->an_txbuf);
2660
2661 txcontrol = AN_TXCTL_8023;
2662 /* write the txcontrol only */
2663 bcopy((caddr_t)&txcontrol, &buf[0x08],
2664 sizeof(txcontrol));
2665
2666 /* 802_3 header */
2667 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2668 sizeof(struct an_txframe_802_3));
2669
2670 /* in mbuf header type is just before payload */
2671 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2672 tx_frame_802_3.an_tx_802_3_payload_len);
2673
2674
2675 bzero(&an_tx_desc, sizeof(an_tx_desc));
2676 an_tx_desc.an_offset = 0;
2677 an_tx_desc.an_eoc = 1;
2678 an_tx_desc.an_valid = 1;
2679 an_tx_desc.an_len = 0x44 +
2680 tx_frame_802_3.an_tx_802_3_payload_len;
2681 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
2682 ptr = (u_int8_t*)&an_tx_desc;
2683 for (i = 0; i < sizeof(an_tx_desc); i++) {
2684 CSR_MEM_AUX_WRITE_1(sc, AN_TX_DESC_OFFSET + i,
2685 ptr[i]);
2686 }
2687
7600679e 2688 BPF_MTAP(ifp, m0);
984263bc
MD
2689
2690 m_freem(m0);
2691 m0 = NULL;
2692
2693 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2694
2695 AN_INC(idx, AN_MAX_TX_DESC);
2696 sc->an_rdata.an_tx_empty = 0;
2697 }
2698 }
2699
2700 if (m0 != NULL)
2701 ifp->if_flags |= IFF_OACTIVE;
2702
2703 sc->an_rdata.an_tx_prod = idx;
2704
2705 /*
2706 * Set a timeout in case the chip goes out to lunch.
2707 */
2708 ifp->if_timer = 5;
2709
2710 return;
2711}
2712
2713void
2714an_stop(sc)
2715 struct an_softc *sc;
2716{
2717 struct ifnet *ifp;
2718 int i;
2719 int s;
2720
2721 s = splimp();
2722
2723 if (sc->an_gone) {
2724 splx(s);
2725 return;
2726 }
2727
2728 ifp = &sc->arpcom.ac_if;
2729
2730 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2731 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2732 an_cmd(sc, AN_CMD_DISABLE, 0);
2733
2734 for (i = 0; i < AN_TX_RING_CNT; i++)
2735 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2736
89c0f216 2737 callout_stop(&sc->an_stat_timer);
984263bc
MD
2738
2739 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2740
2741 if (sc->an_flash_buffer) {
2742 free(sc->an_flash_buffer, M_DEVBUF);
2743 sc->an_flash_buffer = NULL;
2744 }
2745
2746 splx(s);
2747
2748 return;
2749}
2750
2751static void
2752an_watchdog(ifp)
2753 struct ifnet *ifp;
2754{
2755 struct an_softc *sc;
2756 int s;
2757
2758 sc = ifp->if_softc;
2759 s = splimp();
2760
2761 if (sc->an_gone) {
2762 splx(s);
2763 return;
2764 }
2765
2766 printf("an%d: device timeout\n", sc->an_unit);
2767
2768 an_reset(sc);
2769 if (sc->mpi350)
2770 an_init_mpi350_desc(sc);
2771 an_init(sc);
2772
2773 ifp->if_oerrors++;
2774 splx(s);
2775
2776 return;
2777}
2778
2779void
2780an_shutdown(dev)
2781 device_t dev;
2782{
2783 struct an_softc *sc;
2784
2785 sc = device_get_softc(dev);
2786 an_stop(sc);
2787
2788 return;
2789}
2790
2791void
2792an_resume(dev)
2793 device_t dev;
2794{
2795 struct an_softc *sc;
2796 struct ifnet *ifp;
2797 int i;
2798
2799 sc = device_get_softc(dev);
2800 ifp = &sc->arpcom.ac_if;
2801
2802 an_reset(sc);
2803 if (sc->mpi350)
2804 an_init_mpi350_desc(sc);
2805 an_init(sc);
2806
2807 /* Recovery temporary keys */
2808 for (i = 0; i < 4; i++) {
2809 sc->areq.an_type = AN_RID_WEP_TEMP;
2810 sc->areq.an_len = sizeof(struct an_ltv_key);
2811 bcopy(&sc->an_temp_keys[i],
2812 &sc->areq, sizeof(struct an_ltv_key));
2813 an_setdef(sc, &sc->areq);
2814 }
2815
2816 if (ifp->if_flags & IFF_UP)
2817 an_start(ifp);
2818
2819 return;
2820}
2821
2822#ifdef ANCACHE
2823/* Aironet signal strength cache code.
2824 * store signal/noise/quality on per MAC src basis in
2825 * a small fixed cache. The cache wraps if > MAX slots
2826 * used. The cache may be zeroed out to start over.
2827 * Two simple filters exist to reduce computation:
2828 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2829 * to ignore some packets. It defaults to ip only.
2830 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2831 * 2. multicast/broadcast only. This may be used to
2832 * ignore unicast packets and only cache signal strength
2833 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2834 * beacons and not unicast traffic.
2835 *
2836 * The cache stores (MAC src(index), IP src (major clue), signal,
2837 * quality, noise)
2838 *
2839 * No apologies for storing IP src here. It's easy and saves much
2840 * trouble elsewhere. The cache is assumed to be INET dependent,
2841 * although it need not be.
2842 *
2843 * Note: the Aironet only has a single byte of signal strength value
2844 * in the rx frame header, and it's not scaled to anything sensible.
2845 * This is kind of lame, but it's all we've got.
2846 */
2847
2848#ifdef documentation
2849
2850int an_sigitems; /* number of cached entries */
2851struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2852int an_nextitem; /* index/# of entries */
2853
2854
2855#endif
2856
2857/* control variables for cache filtering. Basic idea is
2858 * to reduce cost (e.g., to only Mobile-IP agent beacons
2859 * which are broadcast or multicast). Still you might
2860 * want to measure signal strength anth unicast ping packets
2861 * on a pt. to pt. ant. setup.
2862 */
2863/* set true if you want to limit cache items to broadcast/mcast
2864 * only packets (not unicast). Useful for mobile-ip beacons which
2865 * are broadcast/multicast at network layer. Default is all packets
2866 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2867 */
2868static int an_cache_mcastonly = 0;
2869SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2870 &an_cache_mcastonly, 0, "");
2871
2872/* set true if you want to limit cache items to IP packets only
2873*/
2874static int an_cache_iponly = 1;
2875SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2876 &an_cache_iponly, 0, "");
2877
2878/*
2879 * an_cache_store, per rx packet store signal
2880 * strength in MAC (src) indexed cache.
2881 */
2882static void
3013ac0e 2883an_cache_store (sc, m, rx_rssi, rx_quality)
984263bc 2884 struct an_softc *sc;
984263bc
MD
2885 struct mbuf *m;
2886 u_int8_t rx_rssi;
2887 u_int8_t rx_quality;
2888{
3013ac0e
JS
2889 struct ether_header *eh = mtod(m, struct ether_header *);
2890 struct ip *ip = NULL;
984263bc
MD
2891 int i;
2892 static int cache_slot = 0; /* use this cache entry */
2893 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2894
2895 /* filters:
2896 * 1. ip only
2897 * 2. configurable filter to throw out unicast packets,
2898 * keep multicast only.
2899 */
2900
3013ac0e
JS
2901 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2902 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2903 else if (an_cache_iponly)
984263bc 2904 return;
984263bc
MD
2905
2906 /* filter for broadcast/multicast only
2907 */
2908 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2909 return;
2910 }
2911
2912#ifdef SIGDEBUG
2913 printf("an: q value %x (MSB=0x%x, LSB=0x%x) \n",
2914 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
2915#endif
2916
984263bc
MD
2917 /* do a linear search for a matching MAC address
2918 * in the cache table
2919 * . MAC address is 6 bytes,
2920 * . var w_nextitem holds total number of entries already cached
2921 */
2922 for (i = 0; i < sc->an_nextitem; i++) {
2923 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2924 /* Match!,
2925 * so we already have this entry,
2926 * update the data
2927 */
2928 break;
2929 }
2930 }
2931
2932 /* did we find a matching mac address?
2933 * if yes, then overwrite a previously existing cache entry
2934 */
2935 if (i < sc->an_nextitem ) {
2936 cache_slot = i;
2937 }
2938 /* else, have a new address entry,so
2939 * add this new entry,
2940 * if table full, then we need to replace LRU entry
2941 */
2942 else {
2943
2944 /* check for space in cache table
2945 * note: an_nextitem also holds number of entries
2946 * added in the cache table
2947 */
2948 if ( sc->an_nextitem < MAXANCACHE ) {
2949 cache_slot = sc->an_nextitem;
2950 sc->an_nextitem++;
2951 sc->an_sigitems = sc->an_nextitem;
2952 }
2953 /* no space found, so simply wrap anth wrap index
2954 * and "zap" the next entry
2955 */
2956 else {
2957 if (wrapindex == MAXANCACHE) {
2958 wrapindex = 0;
2959 }
2960 cache_slot = wrapindex++;
2961 }
2962 }
2963
2964 /* invariant: cache_slot now points at some slot
2965 * in cache.
2966 */
2967 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2968 log(LOG_ERR, "an_cache_store, bad index: %d of "
2969 "[0..%d], gross cache error\n",
2970 cache_slot, MAXANCACHE);
2971 return;
2972 }
2973
2974 /* store items in cache
2975 * .ip source address
2976 * .mac src
2977 * .signal, etc.
2978 */
3013ac0e 2979 if (ip != NULL) {
984263bc
MD
2980 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2981 }
2982 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2983
2984
2985 switch (an_cache_mode) {
2986 case DBM:
2987 if (sc->an_have_rssimap) {
2988 sc->an_sigcache[cache_slot].signal =
2989 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2990 sc->an_sigcache[cache_slot].quality =
2991 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2992 } else {
2993 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2994 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2995 }
2996 break;
2997 case PERCENT:
2998 if (sc->an_have_rssimap) {
2999 sc->an_sigcache[cache_slot].signal =
3000 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
3001 sc->an_sigcache[cache_slot].quality =
3002 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
3003 } else {
3004 if (rx_rssi > 100)
3005 rx_rssi = 100;
3006 if (rx_quality > 100)
3007 rx_quality = 100;
3008 sc->an_sigcache[cache_slot].signal = rx_rssi;
3009 sc->an_sigcache[cache_slot].quality = rx_quality;
3010 }
3011 break;
3012 case RAW:
3013 sc->an_sigcache[cache_slot].signal = rx_rssi;
3014 sc->an_sigcache[cache_slot].quality = rx_quality;
3015 break;
3016 }
3017
3018 sc->an_sigcache[cache_slot].noise = 0;
3019
3020 return;
3021}
3022#endif
3023
3024static int
3025an_media_change(ifp)
3026 struct ifnet *ifp;
3027{
3028 struct an_softc *sc = ifp->if_softc;
3029 struct an_ltv_genconfig *cfg;
3030 int otype = sc->an_config.an_opmode;
3031 int orate = sc->an_tx_rate;
3032
3033 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
3034 sc->an_config.an_opmode = AN_OPMODE_IBSS_ADHOC;
3035 else
3036 sc->an_config.an_opmode = AN_OPMODE_INFRASTRUCTURE_STATION;
3037
3038 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
3039 case IFM_IEEE80211_DS1:
3040 sc->an_tx_rate = AN_RATE_1MBPS;
3041 break;
3042 case IFM_IEEE80211_DS2:
3043 sc->an_tx_rate = AN_RATE_2MBPS;
3044 break;
3045 case IFM_IEEE80211_DS5:
3046 sc->an_tx_rate = AN_RATE_5_5MBPS;
3047 break;
3048 case IFM_IEEE80211_DS11:
3049 sc->an_tx_rate = AN_RATE_11MBPS;
3050 break;
3051 case IFM_AUTO:
3052 sc->an_tx_rate = 0;
3053 break;
3054 }
3055
3056 if (orate != sc->an_tx_rate) {
3057 /* Read the current configuration */
3058 sc->an_config.an_type = AN_RID_GENCONFIG;
3059 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3060 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
3061 cfg = &sc->an_config;
3062
3063 /* clear other rates and set the only one we want */
3064 bzero(cfg->an_rates, sizeof(cfg->an_rates));
3065 cfg->an_rates[0] = sc->an_tx_rate;
3066
3067 /* Save the new rate */
3068 sc->an_config.an_type = AN_RID_GENCONFIG;
3069 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
3070 }
3071
3072 if (otype != sc->an_config.an_opmode ||
3073 orate != sc->an_tx_rate)
3074 an_init(sc);
3075
3076 return(0);
3077}
3078
3079static void
3080an_media_status(ifp, imr)
3081 struct ifnet *ifp;
3082 struct ifmediareq *imr;
3083{
3084 struct an_ltv_status status;
3085 struct an_softc *sc = ifp->if_softc;
3086
3087 status.an_len = sizeof(status);
3088 status.an_type = AN_RID_STATUS;
3089 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
3090 /* If the status read fails, just lie. */
3091 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3092 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
3093 }
3094
3095 if (sc->an_tx_rate == 0) {
3096 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3097 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3098 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3099 switch (status.an_current_tx_rate) {
3100 case AN_RATE_1MBPS:
3101 imr->ifm_active |= IFM_IEEE80211_DS1;
3102 break;
3103 case AN_RATE_2MBPS:
3104 imr->ifm_active |= IFM_IEEE80211_DS2;
3105 break;
3106 case AN_RATE_5_5MBPS:
3107 imr->ifm_active |= IFM_IEEE80211_DS5;
3108 break;
3109 case AN_RATE_11MBPS:
3110 imr->ifm_active |= IFM_IEEE80211_DS11;
3111 break;
3112 }
3113 } else {
3114 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3115 }
3116
3117 imr->ifm_status = IFM_AVALID;
3118 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3119 imr->ifm_status |= IFM_ACTIVE;
3120}
3121
3122/********************** Cisco utility support routines *************/
3123
3124/*
3125 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3126 * Linux driver
3127 */
3128
3129static int
3130readrids(ifp, l_ioctl)
3131 struct ifnet *ifp;
3132 struct aironet_ioctl *l_ioctl;
3133{
3134 unsigned short rid;
3135 struct an_softc *sc;
3136
3137 switch (l_ioctl->command) {
3138 case AIROGCAP:
3139 rid = AN_RID_CAPABILITIES;
3140 break;
3141 case AIROGCFG:
3142 rid = AN_RID_GENCONFIG;
3143 break;
3144 case AIROGSLIST:
3145 rid = AN_RID_SSIDLIST;
3146 break;
3147 case AIROGVLIST:
3148 rid = AN_RID_APLIST;
3149 break;
3150 case AIROGDRVNAM:
3151 rid = AN_RID_DRVNAME;
3152 break;
3153 case AIROGEHTENC:
3154 rid = AN_RID_ENCAPPROTO;
3155 break;
3156 case AIROGWEPKTMP:
3157 rid = AN_RID_WEP_TEMP;
3158 break;
3159 case AIROGWEPKNV:
3160 rid = AN_RID_WEP_PERM;
3161 break;
3162 case AIROGSTAT:
3163 rid = AN_RID_STATUS;
3164 break;
3165 case AIROGSTATSD32:
3166 rid = AN_RID_32BITS_DELTA;
3167 break;
3168 case AIROGSTATSC32:
3169 rid = AN_RID_32BITS_CUM;
3170 break;
3171 default:
3172 rid = 999;
3173 break;
3174 }
3175
3176 if (rid == 999) /* Is bad command */
3177 return -EINVAL;
3178
3179 sc = ifp->if_softc;
3180 sc->areq.an_len = AN_MAX_DATALEN;
3181 sc->areq.an_type = rid;
3182
3183 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3184
3185 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3186
3187 /* the data contains the length at first */
3188 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3189 sizeof(sc->areq.an_len))) {
3190 return -EFAULT;
3191 }
3192 /* Just copy the data back */
3193 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3194 l_ioctl->len)) {
3195 return -EFAULT;
3196 }
3197 return 0;
3198}
3199
3200static int
3201writerids(ifp, l_ioctl)
3202 struct ifnet *ifp;
3203 struct aironet_ioctl *l_ioctl;
3204{
3205 struct an_softc *sc;
3206 int rid, command;
3207
3208 sc = ifp->if_softc;
3209 rid = 0;
3210 command = l_ioctl->command;
3211
3212 switch (command) {
3213 case AIROPSIDS:
3214 rid = AN_RID_SSIDLIST;
3215 break;
3216 case AIROPCAP:
3217 rid = AN_RID_CAPABILITIES;
3218 break;
3219 case AIROPAPLIST:
3220 rid = AN_RID_APLIST;
3221 break;
3222 case AIROPCFG:
3223 rid = AN_RID_GENCONFIG;
3224 break;
3225 case AIROPMACON:
3226 an_cmd(sc, AN_CMD_ENABLE, 0);
3227 return 0;
3228 break;
3229 case AIROPMACOFF:
3230 an_cmd(sc, AN_CMD_DISABLE, 0);
3231 return 0;
3232 break;
3233 case AIROPSTCLR:
3234 /*
3235 * This command merely clears the counts does not actually
3236 * store any data only reads rid. But as it changes the cards
3237 * state, I put it in the writerid routines.
3238 */
3239
3240 rid = AN_RID_32BITS_DELTACLR;
3241 sc = ifp->if_softc;
3242 sc->areq.an_len = AN_MAX_DATALEN;
3243 sc->areq.an_type = rid;
3244
3245 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3246 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3247
3248 /* the data contains the length at first */
3249 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3250 sizeof(sc->areq.an_len))) {
3251 return -EFAULT;
3252 }
3253 /* Just copy the data */
3254 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3255 l_ioctl->len)) {
3256 return -EFAULT;
3257 }
3258 return 0;
3259 break;
3260 case AIROPWEPKEY:
3261 rid = AN_RID_WEP_TEMP;
3262 break;
3263 case AIROPWEPKEYNV:
3264 rid = AN_RID_WEP_PERM;
3265 break;
3266 case AIROPLEAPUSR:
3267 rid = AN_RID_LEAPUSERNAME;
3268 break;
3269 case AIROPLEAPPWD:
3270 rid = AN_RID_LEAPPASSWORD;
3271 break;
3272 default:
3273 return -EOPNOTSUPP;
3274 }
3275
3276 if (rid) {
3277 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3278 return -EINVAL;
3279 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3280 sc->areq.an_type = rid;
3281
3282 /* Just copy the data back */
3283 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3284 l_ioctl->len);
3285
3286 an_cmd(sc, AN_CMD_DISABLE, 0);
3287 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3288 an_cmd(sc, AN_CMD_ENABLE, 0);
3289 return 0;
3290 }
3291 return -EOPNOTSUPP;
3292}
3293
3294/*
3295 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3296 * Linux driver
3297 */
3298
377d4740 3299#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3300#define FLASH_COMMAND 0x7e7e
3301#define FLASH_SIZE 32 * 1024
3302
3303static int
3304unstickbusy(ifp)
3305 struct ifnet *ifp;
3306{
3307 struct an_softc *sc = ifp->if_softc;
3308
3309 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3310 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3311 AN_EV_CLR_STUCK_BUSY);
3312 return 1;
3313 }
3314 return 0;
3315}
3316
3317/*
3318 * Wait for busy completion from card wait for delay uSec's Return true for
3319 * success meaning command reg is clear
3320 */
3321
3322static int
3323WaitBusy(ifp, uSec)
3324 struct ifnet *ifp;
3325 int uSec;
3326{
3327 int statword = 0xffff;
3328 int delay = 0;
3329 struct an_softc *sc = ifp->if_softc;
3330
3331 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3332 FLASH_DELAY(10);
3333 delay += 10;
3334 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3335
3336 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3337 unstickbusy(ifp);
3338 }
3339 }
3340
3341 return 0 == (AN_CMD_BUSY & statword);
3342}
3343
3344/*
3345 * STEP 1) Disable MAC and do soft reset on card.
3346 */
3347
3348static int
3349cmdreset(ifp)
3350 struct ifnet *ifp;
3351{
3352 int status;
3353 struct an_softc *sc = ifp->if_softc;
3354
3355 an_stop(sc);
3356
3357 an_cmd(sc, AN_CMD_DISABLE, 0);
3358
3359 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3360 printf("an%d: Waitbusy hang b4 RESET =%d\n",
3361 sc->an_unit, status);
3362 return -EBUSY;
3363 }
3364 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3365
3366 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3367
3368
3369 if (!(status = WaitBusy(ifp, 100))) {
3370 printf("an%d: Waitbusy hang AFTER RESET =%d\n",
3371 sc->an_unit, status);
3372 return -EBUSY;
3373 }
3374 return 0;
3375}
3376
3377/*
3378 * STEP 2) Put the card in legendary flash mode
3379 */
3380
3381static int
3382setflashmode(ifp)
3383 struct ifnet *ifp;
3384{
3385 int status;
3386 struct an_softc *sc = ifp->if_softc;
3387
3388 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3389 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3390 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3391 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3392
3393 /*
3394 * mdelay(500); // 500ms delay
3395 */
3396
3397 FLASH_DELAY(500);
3398
3399 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
3400 printf("Waitbusy hang after setflash mode\n");
3401 return -EIO;
3402 }
3403 return 0;
3404}
3405
3406/*
3407 * Get a character from the card matching matchbyte Step 3)
3408 */
3409
3410static int
3411flashgchar(ifp, matchbyte, dwelltime)
3412 struct ifnet *ifp;
3413 int matchbyte;
3414 int dwelltime;
3415{
3416 int rchar;
3417 unsigned char rbyte = 0;
3418 int success = -1;
3419 struct an_softc *sc = ifp->if_softc;
3420
3421
3422 do {
3423 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3424
3425 if (dwelltime && !(0x8000 & rchar)) {
3426 dwelltime -= 10;
3427 FLASH_DELAY(10);
3428 continue;
3429 }
3430 rbyte = 0xff & rchar;
3431
3432 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3433 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3434 success = 1;
3435 break;
3436 }
3437 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3438 break;
3439 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3440
3441 } while (dwelltime > 0);
3442 return success;
3443}
3444
3445/*
3446 * Put character to SWS0 wait for dwelltime x 50us for echo .
3447 */
3448
3449static int
3450flashpchar(ifp, byte, dwelltime)
3451 struct ifnet *ifp;
3452 int byte;
3453 int dwelltime;
3454{
3455 int echo;
3456 int pollbusy, waittime;
3457 struct an_softc *sc = ifp->if_softc;
3458
3459 byte |= 0x8000;
3460
3461 if (dwelltime == 0)
3462 dwelltime = 200;
3463
3464 waittime = dwelltime;
3465
3466 /*
3467 * Wait for busy bit d15 to go false indicating buffer empty
3468 */
3469 do {
3470 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3471
3472 if (pollbusy & 0x8000) {
3473 FLASH_DELAY(50);
3474 waittime -= 50;
3475 continue;
3476 } else
3477 break;
3478 }
3479 while (waittime >= 0);
3480
3481 /* timeout for busy clear wait */
3482
3483 if (waittime <= 0) {
3484 printf("an%d: flash putchar busywait timeout! \n",
3485 sc->an_unit);
3486 return -1;
3487 }
3488 /*
3489 * Port is clear now write byte and wait for it to echo back
3490 */
3491 do {
3492 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3493 FLASH_DELAY(50);
3494 dwelltime -= 50;
3495 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3496 } while (dwelltime >= 0 && echo != byte);
3497
3498
3499 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3500
3501 return echo == byte;
3502}
3503
3504/*
3505 * Transfer 32k of firmware data from user buffer to our buffer and send to
3506 * the card
3507 */
3508
3509static int
3510flashputbuf(ifp)
3511 struct ifnet *ifp;
3512{
3513 unsigned short *bufp;
3514 int nwords;
3515 struct an_softc *sc = ifp->if_softc;
3516
3517 /* Write stuff */
3518
3519 bufp = sc->an_flash_buffer;
3520
3521 if (!sc->mpi350) {
3522 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3523 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3524
3525 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3526 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3527 }
3528 } else {
3529 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3530 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3531 ((u_int32_t *)bufp)[nwords] & 0xffff);
3532 }
3533 }
3534
3535 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3536
3537 return 0;
3538}
3539
3540/*
3541 * After flashing restart the card.
3542 */
3543
3544static int
3545flashrestart(ifp)
3546 struct ifnet *ifp;
3547{
3548 int status = 0;
3549 struct an_softc *sc = ifp->if_softc;
3550
3551 FLASH_DELAY(1024); /* Added 12/7/00 */
3552
3553 an_init(sc);
3554
3555 FLASH_DELAY(1024); /* Added 12/7/00 */
3556 return status;
3557}
3558
3559/*
3560 * Entry point for flash ioclt.
3561 */
3562
3563static int
3564flashcard(ifp, l_ioctl)
3565 struct ifnet *ifp;
3566 struct aironet_ioctl *l_ioctl;
3567{
3568 int z = 0, status;
3569 struct an_softc *sc;
3570
3571 sc = ifp->if_softc;
3572 if (sc->mpi350) {
3573 printf("an%d: flashing not supported on MPI 350 yet\n",
3574 sc->an_unit);
3575 return(-1);
3576 }
3577 status = l_ioctl->command;
3578
3579 switch (l_ioctl->command) {
3580 case AIROFLSHRST:
3581 return cmdreset(ifp);
3582 break;
3583 case AIROFLSHSTFL:
3584 if (sc->an_flash_buffer) {
3585 free(sc->an_flash_buffer, M_DEVBUF);
3586 sc->an_flash_buffer = NULL;
3587 }
3588 sc->an_flash_buffer = malloc(FLASH_SIZE, M_DEVBUF, 0);
3589 if (sc->an_flash_buffer)
3590 return setflashmode(ifp);
3591 else
3592 return ENOBUFS;
3593 break;
3594 case AIROFLSHGCHR: /* Get char from aux */
3595 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3596 z = *(int *)&sc->areq;
3597 if ((status = flashgchar(ifp, z, 8000)) == 1)
3598 return 0;
3599 else
3600 return -1;
3601 break;
3602 case AIROFLSHPCHR: /* Send char to card. */
3603 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3604 z = *(int *)&sc->areq;
3605 if ((status = flashpchar(ifp, z, 8000)) == -1)
3606 return -EIO;
3607 else
3608 return 0;
3609 break;
3610 case AIROFLPUTBUF: /* Send 32k to card */
3611 if (l_ioctl->len > FLASH_SIZE) {
3612 printf("an%d: Buffer to big, %x %x\n", sc->an_unit,
3613 l_ioctl->len, FLASH_SIZE);
3614 return -EINVAL;
3615 }
3616 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3617
3618 if ((status = flashputbuf(ifp)) != 0)
3619 return -EIO;
3620 else
3621 return 0;
3622 break;
3623 case AIRORESTART:
3624 if ((status = flashrestart(ifp)) != 0) {
3625 printf("an%d: FLASHRESTART returned %d\n",
3626 sc->an_unit, status);
3627 return -EIO;
3628 } else
3629 return 0;
3630
3631 break;
3632 default:
3633 return -EINVAL;
3634 }
3635
3636 return -EINVAL;
3637}