[dragonfly.git] / sys / dev / netif / nfe / if_nfevar.h

/*	$OpenBSD: if_nfevar.h,v 1.11 2006/02/19 13:57:02 damien Exp $	*/
/*	$DragonFly: src/sys/dev/netif/nfe/if_nfevar.h,v 1.13 2008/07/12 11:44:17 sephe Exp $	*/

/*
 * Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org>
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

struct nfe_tx_data {
	bus_dmamap_t	map;
	struct mbuf	*m;
};

struct nfe_tx_ring {
	bus_dma_tag_t		tag;
	bus_dmamap_t		map;
	bus_addr_t		physaddr;
	struct nfe_desc32	*desc32;
	struct nfe_desc64	*desc64;

	bus_dma_tag_t		data_tag;
	struct nfe_tx_data	*data;
	int			queued;
	int			cur;
	int			next;
};

struct nfe_softc;

struct nfe_jbuf {
	struct nfe_softc	*sc;
	struct nfe_rx_ring	*ring;
	int			inuse;
	int			slot;
	caddr_t			buf;
	bus_addr_t		physaddr;
	SLIST_ENTRY(nfe_jbuf)	jnext;
};

struct nfe_rx_data {
	bus_dmamap_t	map;
	struct mbuf	*m;
};

struct nfe_rx_ring {
	bus_dma_tag_t		tag;
	bus_dmamap_t		map;
	bus_addr_t		physaddr;
	struct nfe_desc32	*desc32;
	struct nfe_desc64	*desc64;

	bus_dma_tag_t		jtag;
	bus_dmamap_t		jmap;
	caddr_t			jpool;
	struct nfe_jbuf		*jbuf;
	SLIST_HEAD(, nfe_jbuf)	jfreelist;

	bus_dma_tag_t		data_tag;
	bus_dmamap_t		data_tmpmap;
	struct nfe_rx_data	*data;
	int			bufsz;
	int			cur;
	int			next;
};

struct nfe_softc {
	struct arpcom		arpcom;

	int			sc_mem_rid;
	time_t			sc_rate_second;
	int			sc_rate_acc;
	int			sc_rate_avg;
	struct resource		*sc_mem_res;
	bus_space_handle_t	sc_memh;
	bus_space_tag_t		sc_memt;

	int			sc_irq_rid;
	struct resource		*sc_irq_res;
	void			*sc_ih;

	device_t		sc_miibus;
	struct callout		sc_tick_ch;

	int			sc_if_flags;
	uint32_t		sc_caps;	/* hardware capabilities */
#define NFE_JUMBO_SUP	0x01
#define NFE_40BIT_ADDR	0x02
#define NFE_HW_CSUM	0x04
#define NFE_HW_VLAN	0x08
#define NFE_FIX_EADDR	0x10
#define NFE_NO_PWRCTL	0x20

	uint32_t		sc_flags;
#define NFE_F_USE_JUMBO	0x01	/* use jumbo frame */
#define NFE_F_DYN_IM	0x02	/* enable dynamic interrupt moderation */
#define NFE_F_IRQ_TIMER	0x04	/* hardware timer irq is used */

	uint32_t		rxtxctl_desc;
	uint32_t		rxtxctl;
	uint8_t			mii_phyaddr;

	bus_dma_tag_t		sc_dtag;
	struct nfe_tx_ring	txq;
	struct nfe_rx_ring	rxq;

	uint32_t		sc_irq_enable;
	int			sc_tx_spare;
	int			sc_imtime;
	int			sc_rx_ring_count;
	int			sc_tx_ring_count;
	int			sc_debug;
	struct sysctl_ctx_list	sc_sysctl_ctx;
	struct sysctl_oid	*sc_sysctl_tree;

	struct lwkt_serialize	sc_jbuf_serializer;
};

#define NFE_IRQ_ENABLE(sc)	\
	((sc)->sc_imtime == 0 ? NFE_IRQ_NOIMTIMER : \
	 (((sc)->sc_flags & NFE_F_DYN_IM) ? NFE_IRQ_NOIMTIMER: NFE_IRQ_IMTIMER))

#define NFE_ADDR_HI(addr)	((uint64_t) (addr) >> 32)
#define NFE_ADDR_LO(addr)	((uint64_t) (addr) & 0xffffffff)
Commit	Line	Data
ae813fd8	1	/* $OpenBSD: if_nfevar.h,v 1.11 2006/02/19 13:57:02 damien Exp $ */
d378110e	2	/* $DragonFly: src/sys/dev/netif/nfe/if_nfevar.h,v 1.13 2008/07/12 11:44:17 sephe Exp $ */
ae813fd8 SZ	3
	4	/*
	5	* Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org>
	6	*
	7	* Permission to use, copy, modify, and distribute this software for any
	8	* purpose with or without fee is hereby granted, provided that the above
	9	* copyright notice and this permission notice appear in all copies.
	10	*
	11	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	12	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	13	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	14	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	15	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	16	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	17	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	18	*/
	19
ae813fd8 SZ	20	struct nfe_tx_data {
	21	bus_dmamap_t map;
	22	struct mbuf *m;
	23	};
	24
	25	struct nfe_tx_ring {
	26	bus_dma_tag_t tag;
	27	bus_dmamap_t map;
	28	bus_addr_t physaddr;
	29	struct nfe_desc32 *desc32;
	30	struct nfe_desc64 *desc64;
	31
	32	bus_dma_tag_t data_tag;
b4633098	33	struct nfe_tx_data *data;
ae813fd8 SZ	34	int queued;
	35	int cur;
	36	int next;
	37	};
	38
	39	struct nfe_softc;
	40
	41	struct nfe_jbuf {
	42	struct nfe_softc *sc;
	43	struct nfe_rx_ring *ring;
	44	int inuse;
	45	int slot;
	46	caddr_t buf;
	47	bus_addr_t physaddr;
	48	SLIST_ENTRY(nfe_jbuf) jnext;
	49	};
	50
	51	struct nfe_rx_data {
	52	bus_dmamap_t map;
	53	struct mbuf *m;
	54	};
	55
	56	struct nfe_rx_ring {
	57	bus_dma_tag_t tag;
	58	bus_dmamap_t map;
	59	bus_addr_t physaddr;
	60	struct nfe_desc32 *desc32;
	61	struct nfe_desc64 *desc64;
	62
	63	bus_dma_tag_t jtag;
	64	bus_dmamap_t jmap;
	65	caddr_t jpool;
a455c52e	66	struct nfe_jbuf *jbuf;
ae813fd8 SZ	67	SLIST_HEAD(, nfe_jbuf) jfreelist;
	68
	69	bus_dma_tag_t data_tag;
	70	bus_dmamap_t data_tmpmap;
a455c52e	71	struct nfe_rx_data *data;
ae813fd8 SZ	72	int bufsz;
	73	int cur;
	74	int next;
	75	};
	76
	77	struct nfe_softc {
	78	struct arpcom arpcom;
	79
	80	int sc_mem_rid;
c00ddf33 MD	81	time_t sc_rate_second;
	82	int sc_rate_acc;
	83	int sc_rate_avg;
ae813fd8 SZ	84	struct resource *sc_mem_res;
	85	bus_space_handle_t sc_memh;
	86	bus_space_tag_t sc_memt;
	87
	88	int sc_irq_rid;
	89	struct resource *sc_irq_res;
	90	void *sc_ih;
	91
	92	device_t sc_miibus;
	93	struct callout sc_tick_ch;
ae813fd8 SZ	94
ae813fd8 SZ	95	int sc_if_flags;
04b9ef8d	96	uint32_t sc_caps; /* hardware capabilities */
ae813fd8 SZ	97	#define NFE_JUMBO_SUP 0x01
	98	#define NFE_40BIT_ADDR 0x02
	99	#define NFE_HW_CSUM 0x04
	100	#define NFE_HW_VLAN 0x08
ece56005	101	#define NFE_FIX_EADDR 0x10
f678f57e	102	#define NFE_NO_PWRCTL 0x20
ae813fd8	103
5dc1e30e	104	uint32_t sc_flags;
04b9ef8d SZ	105	#define NFE_F_USE_JUMBO 0x01 /* use jumbo frame */
	106	#define NFE_F_DYN_IM 0x02 /* enable dynamic interrupt moderation */
	107	#define NFE_F_IRQ_TIMER 0x04 /* hardware timer irq is used */
5dc1e30e	108
faaea42e	109	uint32_t rxtxctl_desc;
ae813fd8 SZ	110	uint32_t rxtxctl;
	111	uint8_t mii_phyaddr;
	112
244a9aa3	113	bus_dma_tag_t sc_dtag;
ae813fd8 SZ	114	struct nfe_tx_ring txq;
	115	struct nfe_rx_ring rxq;
	116
ec9403d0	117	uint32_t sc_irq_enable;
d378110e	118	int sc_tx_spare;
ec9403d0 SZ	119	int sc_imtime;
ec9403d0 SZ	120	int sc_rx_ring_count;
b4633098	121	int sc_tx_ring_count;
ec9403d0 SZ	122	int sc_debug;
	123	struct sysctl_ctx_list sc_sysctl_ctx;
	124	struct sysctl_oid *sc_sysctl_tree;
	125
ae813fd8 SZ	126	struct lwkt_serialize sc_jbuf_serializer;
ae813fd8 SZ	127	};
ec9403d0 SZ	128
ec9403d0 SZ	129	#define NFE_IRQ_ENABLE(sc) \
04b9ef8d SZ	130	((sc)->sc_imtime == 0 ? NFE_IRQ_NOIMTIMER : \
04b9ef8d SZ	131	(((sc)->sc_flags & NFE_F_DYN_IM) ? NFE_IRQ_NOIMTIMER: NFE_IRQ_IMTIMER))
7752918d SZ	132
	133	#define NFE_ADDR_HI(addr) ((uint64_t) (addr) >> 32)
	134	#define NFE_ADDR_LO(addr) ((uint64_t) (addr) & 0xffffffff)