rename amd64 architecture to x86_64
[dragonfly.git] / sys / bus / pci / x86_64 / mptable_pci.c
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662f60ef
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1/*-
2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of any co-contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD @169221
30 */
31
32/*
33 * Host to PCI and PCI to PCI bridge drivers that use the MP Table to route
34 * interrupts from PCI devices to I/O APICs.
35 */
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/bus.h>
40#include <sys/kernel.h>
41#include <sys/module.h>
42
43#include <bus/pci/pcireg.h>
44#include <bus/pci/pcivar.h>
45#include <bus/pci/pcib_private.h>
46
47#include <machine/smp.h>
48
49#include "legacyvar.h"
50#include "pci_cfgreg.h"
51
52#include "pcib_if.h"
53
54static int
55mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
56{
57 int line, bus, slot;
58
59 bus = pci_get_bus(dev);
60 slot = pci_get_slot(dev);
61
62 line = pci_apic_irq(bus, slot, pin);
63 if (line >= 0) {
64 return line;
65 } else {
66 int irq = pci_get_irq(dev);
67
68 /*
69 * PCI interrupts might be redirected to the
70 * ISA bus according to some MP tables. Use the
71 * same methods as used by the ISA devices
72 * devices to find the proper IOAPIC int pin.
73 */
74 kprintf("MPTable: Try routing through ISA bus for "
75 "bus %d slot %d INT%c irq %d\n",
76 bus, slot, 'A' + pin - 1, irq);
77 line = isa_apic_irq(irq);
78 if (line >= 0)
79 return line;
80 }
81
82 kprintf("MPTable: Unable to route for bus %d slot %d INT%c\n",
83 bus, slot, 'A' + pin - 1);
84 return PCI_INVALID_IRQ;
85}
86
87/* Host to PCI bridge driver. */
88
89static int
90mptable_hostb_probe(device_t dev)
91{
92
93 if (pci_cfgregopen() == 0)
94 return (ENXIO);
95#ifdef notyet
96 if (mptable_pci_probe_table(pcib_get_bus(dev)) != 0)
97 return (ENXIO);
98#endif
99 device_set_desc(dev, "MPTable Host-PCI bridge");
100 return (0);
101}
102
103static int
104mptable_hostb_attach(device_t dev)
105{
106
107 device_add_child(dev, "pci", pcib_get_bus(dev));
108 return (bus_generic_attach(dev));
109}
110
111/* Pass MSI requests up to the nexus. */
112static int
113mptable_hostb_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
114 int *irqs)
115{
116 device_t bus;
117
118 bus = device_get_parent(pcib);
119 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
120 irqs));
121}
122
123static int
124mptable_hostb_alloc_msix(device_t pcib, device_t dev, int *irq)
125{
126 device_t bus;
127
128 bus = device_get_parent(pcib);
129 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
130}
131
132static int
133mptable_hostb_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
134 uint32_t *data)
135{
136 device_t bus;
137
138 bus = device_get_parent(pcib);
139 return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
140}
141
142static device_method_t mptable_hostb_methods[] = {
143 /* Device interface */
144 DEVMETHOD(device_probe, mptable_hostb_probe),
145 DEVMETHOD(device_attach, mptable_hostb_attach),
146 DEVMETHOD(device_shutdown, bus_generic_shutdown),
147 DEVMETHOD(device_suspend, bus_generic_suspend),
148 DEVMETHOD(device_resume, bus_generic_resume),
149
150 /* Bus interface */
151 DEVMETHOD(bus_print_child, bus_generic_print_child),
152 DEVMETHOD(bus_read_ivar, legacy_pcib_read_ivar),
153 DEVMETHOD(bus_write_ivar, legacy_pcib_write_ivar),
154 DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource),
155 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
156 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
157 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
158 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
159 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
160
161 /* pcib interface */
162 DEVMETHOD(pcib_maxslots, legacy_pcib_maxslots),
163 DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
164 DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
165 DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt),
166 DEVMETHOD(pcib_alloc_msi, mptable_hostb_alloc_msi),
167 DEVMETHOD(pcib_release_msi, pcib_release_msi),
168 DEVMETHOD(pcib_alloc_msix, mptable_hostb_alloc_msix),
169 DEVMETHOD(pcib_release_msix, pcib_release_msix),
170 DEVMETHOD(pcib_map_msi, mptable_hostb_map_msi),
171
172 { 0, 0 }
173};
174
175static devclass_t hostb_devclass;
176
177DEFINE_CLASS_0(pcib, mptable_hostb_driver, mptable_hostb_methods, 1);
178DRIVER_MODULE(mptable_pcib, legacy, mptable_hostb_driver, hostb_devclass, 0, 0);
179
180/* PCI to PCI bridge driver. */
181
182static int
183mptable_pcib_probe(device_t dev)
184{
185 int bus;
186
187 if ((pci_get_class(dev) != PCIC_BRIDGE) ||
188 (pci_get_subclass(dev) != PCIS_BRIDGE_PCI))
189 return (ENXIO);
190 bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
191 if (bus == 0)
192 return (ENXIO);
193#ifdef notyet
194 if (mptable_pci_probe_table(bus) != 0)
195 return (ENXIO);
196#endif
197 device_set_desc(dev, "MPTable PCI-PCI bridge");
198 return (-500);
199}
200
201static device_method_t mptable_pcib_pci_methods[] = {
202 /* Device interface */
203 DEVMETHOD(device_probe, mptable_pcib_probe),
204 DEVMETHOD(device_attach, pcib_attach),
205 DEVMETHOD(device_shutdown, bus_generic_shutdown),
206 DEVMETHOD(device_suspend, bus_generic_suspend),
207 DEVMETHOD(device_resume, bus_generic_resume),
208
209 /* Bus interface */
210 DEVMETHOD(bus_print_child, bus_generic_print_child),
211 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
212 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
213 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
214 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
215 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
216 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
217 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
218 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
219
220 /* pcib interface */
221 DEVMETHOD(pcib_maxslots, pcib_maxslots),
222 DEVMETHOD(pcib_read_config, pcib_read_config),
223 DEVMETHOD(pcib_write_config, pcib_write_config),
224 DEVMETHOD(pcib_route_interrupt, mptable_pci_route_interrupt),
225 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
226 DEVMETHOD(pcib_release_msi, pcib_release_msi),
227 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
228 DEVMETHOD(pcib_release_msix, pcib_release_msix),
229 DEVMETHOD(pcib_map_msi, pcib_map_msi),
230
231 {0, 0}
232};
233
234static devclass_t pcib_devclass;
235
236DEFINE_CLASS_0(pcib, mptable_pcib_driver, mptable_pcib_pci_methods,
237 sizeof(struct pcib_softc));
238DRIVER_MODULE(mptable_pcib, pci, mptable_pcib_driver, pcib_devclass, 0, 0);