[dragonfly.git] / sys / cpu / x86_64 / include / pmap.h

/*-
 * Copyright (c) 1991 Regents of the University of California.
 * Copyright (c) 2003 Peter Wemm.
 * Copyright (c) 2008 The DragonFly Project.
 * All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * the Systems Programming Group of the University of Utah Computer
 * Science Department and William Jolitz of UUNET Technologies Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * Derived from hp300 version by Mike Hibler, this version by William
 * Jolitz uses a recursive map [a pde points to the page directory] to
 * map the page tables using the pagetables themselves. This is done to
 * reduce the impact on kernel virtual memory for lots of sparse address
 * space, and to reduce the cost of memory to each process.
 *
 * from: hp300: @(#)pmap.h	7.2 (Berkeley) 12/16/90
 * from: @(#)pmap.h	7.4 (Berkeley) 5/12/91
 */

#ifndef _CPU_PMAP_H_
#define _CPU_PMAP_H_

/*
 * Page-directory and page-table entries follow this format, with a few
 * of the fields not present here and there, depending on a lot of things.
 */
				/* ---- Intel Nomenclature ---- */
#define	PG_V		0x001	/* P	Valid			*/
#define PG_RW		0x002	/* R/W	Read/Write		*/
#define PG_U		0x004	/* U/S  User/Supervisor		*/
#define	PG_NC_PWT	0x008	/* PWT	Write through		*/
#define	PG_NC_PCD	0x010	/* PCD	Cache disable		*/
#define PG_A		0x020	/* A	Accessed		*/
#define	PG_M		0x040	/* D	Dirty			*/
#define	PG_PS		0x080	/* PS	Page size (0=4k,1=2M)	*/
#define	PG_PTE_PAT	0x080	/* PAT	PAT index		*/
#define	PG_G		0x100	/* G	Global			*/
#define	PG_AVAIL1	0x200	/*    /	Available for system	*/
#define	PG_AVAIL2	0x400	/*   <	programmers use		*/
#define	PG_AVAIL3	0x800	/*    \				*/
#define	PG_PDE_PAT	0x1000	/* PAT	PAT index		*/
#define	PG_NX		(1ul<<63) /* No-execute */


/* Our various interpretations of the above */
#define PG_W		PG_AVAIL1	/* "Wired" pseudoflag */
#define	PG_MANAGED	PG_AVAIL2
#define	PG_FRAME	(0x000ffffffffff000ul)
#define	PG_PS_FRAME	(0x000fffffffe00000ul)
#define	PG_PROT		(PG_RW|PG_U)	/* all protection bits . */
#define PG_N		(PG_NC_PWT|PG_NC_PCD)	/* Non-cacheable */

/*
 * Promotion to a 2MB (PDE) page mapping requires that the corresponding 4KB
 * (PTE) page mappings have identical settings for the following fields:
 */
#define	PG_PTE_PROMOTE	(PG_NX | PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \
	    PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V)

/*
 * Page Protection Exception bits
 */

#define PGEX_P		0x01	/* Protection violation vs. not present */
#define PGEX_W		0x02	/* during a Write cycle */
#define PGEX_U		0x04	/* access from User mode (UPL) */
#define PGEX_RSV	0x08	/* reserved PTE field is non-zero */
#define PGEX_I		0x10	/* during an instruction fetch */

/*
 * Virtual kernel bits, managed by software.  Stored in tf_xflags.
 *
 * PGEX_FPFAULT - Force the FP unit to generate a T_DNA fault if an
 *		  emulated user process tried to use it.  This bit is
 *		  only used by vmspace_ctl().
 *
 * PGEX_MAILBOX - Set in xflags by signal code to indicate that a mailbox
 *		  signal was pending.  Remerged on signal return.  This
 *		  bit is only used in a signal vector frame.
 */
#define PGEX_MAILBOX	0x40
#define PGEX_FPFAULT	0x80

#endif /* !_CPU_PMAP_H_ */
Commit	Line	Data
c8fe38ae MD	1	/*-
	2	* Copyright (c) 1991 Regents of the University of California.
	3	* Copyright (c) 2003 Peter Wemm.
	4	* Copyright (c) 2008 The DragonFly Project.
fc3f9779 SS	5	* All rights reserved.
fc3f9779 SS	6	*
c8fe38ae MD	7	* This code is derived from software contributed to Berkeley by
	8	* the Systems Programming Group of the University of Utah Computer
	9	* Science Department and William Jolitz of UUNET Technologies Inc.
	10	*
fc3f9779 SS	11	* Redistribution and use in source and binary forms, with or without
	12	* modification, are permitted provided that the following conditions
	13	* are met:
	14	* 1. Redistributions of source code must retain the above copyright
	15	* notice, this list of conditions and the following disclaimer.
	16	* 2. Redistributions in binary form must reproduce the above copyright
	17	* notice, this list of conditions and the following disclaimer in the
	18	* documentation and/or other materials provided with the distribution.
c8fe38ae MD	19	* 4. Neither the name of the University nor the names of its contributors
	20	* may be used to endorse or promote products derived from this software
	21	* without specific prior written permission.
fc3f9779	22	*
c8fe38ae	23	* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
fc3f9779 SS	24	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
fc3f9779 SS	25	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
c8fe38ae	26	* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
fc3f9779 SS	27	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	28	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	29	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	30	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
	31	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	32	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	33	* SUCH DAMAGE.
	34	*
c8fe38ae MD	35	* Derived from hp300 version by Mike Hibler, this version by William
	36	* Jolitz uses a recursive map [a pde points to the page directory] to
	37	* map the page tables using the pagetables themselves. This is done to
	38	* reduce the impact on kernel virtual memory for lots of sparse address
	39	* space, and to reduce the cost of memory to each process.
	40	*
	41	* from: hp300: @(#)pmap.h 7.2 (Berkeley) 12/16/90
	42	* from: @(#)pmap.h 7.4 (Berkeley) 5/12/91
fc3f9779	43	*/
c8fe38ae	44
fc3f9779	45	#ifndef _CPU_PMAP_H_
c8fe38ae	46	#define _CPU_PMAP_H_
fc3f9779 SS	47
fc3f9779 SS	48	/*
c8fe38ae MD	49	* Page-directory and page-table entries follow this format, with a few
c8fe38ae MD	50	* of the fields not present here and there, depending on a lot of things.
fc3f9779	51	*/
c8fe38ae MD	52	/* ---- Intel Nomenclature ---- */
	53	#define PG_V 0x001 /* P Valid */
	54	#define PG_RW 0x002 /* R/W Read/Write */
	55	#define PG_U 0x004 /* U/S User/Supervisor */
	56	#define PG_NC_PWT 0x008 /* PWT Write through */
	57	#define PG_NC_PCD 0x010 /* PCD Cache disable */
	58	#define PG_A 0x020 /* A Accessed */
	59	#define PG_M 0x040 /* D Dirty */
	60	#define PG_PS 0x080 /* PS Page size (0=4k,1=2M) */
	61	#define PG_PTE_PAT 0x080 /* PAT PAT index */
	62	#define PG_G 0x100 /* G Global */
	63	#define PG_AVAIL1 0x200 /* / Available for system */
	64	#define PG_AVAIL2 0x400 /* < programmers use */
	65	#define PG_AVAIL3 0x800 /* \ */
	66	#define PG_PDE_PAT 0x1000 /* PAT PAT index */
	67	#define PG_NX (1ul<<63) /* No-execute */
	68
	69
	70	/* Our various interpretations of the above */
	71	#define PG_W PG_AVAIL1 /* "Wired" pseudoflag */
	72	#define PG_MANAGED PG_AVAIL2
	73	#define PG_FRAME (0x000ffffffffff000ul)
	74	#define PG_PS_FRAME (0x000fffffffe00000ul)
	75	#define PG_PROT (PG_RW\|PG_U) /* all protection bits . */
	76	#define PG_N (PG_NC_PWT\|PG_NC_PCD) /* Non-cacheable */
fc3f9779 SS	77
fc3f9779 SS	78	/*
c8fe38ae MD	79	* Promotion to a 2MB (PDE) page mapping requires that the corresponding 4KB
c8fe38ae MD	80	* (PTE) page mappings have identical settings for the following fields:
fc3f9779	81	*/
c8fe38ae MD	82	#define PG_PTE_PROMOTE (PG_NX \| PG_MANAGED \| PG_W \| PG_G \| PG_PTE_PAT \| \
c8fe38ae MD	83	PG_M \| PG_A \| PG_NC_PCD \| PG_NC_PWT \| PG_U \| PG_RW \| PG_V)
fc3f9779 SS	84
	85	/*
	86	* Page Protection Exception bits
	87	*/
	88
	89	#define PGEX_P 0x01 /* Protection violation vs. not present */
	90	#define PGEX_W 0x02 /* during a Write cycle */
	91	#define PGEX_U 0x04 /* access from User mode (UPL) */
c8fe38ae MD	92	#define PGEX_RSV 0x08 /* reserved PTE field is non-zero */
c8fe38ae MD	93	#define PGEX_I 0x10 /* during an instruction fetch */
fc3f9779	94
5b9f6cc4 MD	95	/*
	96	* Virtual kernel bits, managed by software. Stored in tf_xflags.
	97	*
	98	* PGEX_FPFAULT - Force the FP unit to generate a T_DNA fault if an
	99	* emulated user process tried to use it. This bit is
	100	* only used by vmspace_ctl().
	101	*
	102	* PGEX_MAILBOX - Set in xflags by signal code to indicate that a mailbox
	103	* signal was pending. Remerged on signal return. This
	104	* bit is only used in a signal vector frame.
	105	*/
	106	#define PGEX_MAILBOX 0x40
	107	#define PGEX_FPFAULT 0x80
	108
fc3f9779	109	#endif /* !_CPU_PMAP_H_ */