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rename amd64 architecture to x86_64
[dragonfly.git] / sys / platform / pc64 / x86_64 / machdep.c
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c8fe38ae
MD		 1/*-
2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 *
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
c8fe38ae
MD		 41 */
42
43#include "use_ether.h"
44//#include "use_npx.h"
45#include "use_isa.h"
46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_msgbuf.h"
54#include "opt_swap.h"
55
56#include <sys/param.h>
57#include <sys/systm.h>
58#include <sys/sysproto.h>
59#include <sys/signalvar.h>
60#include <sys/kernel.h>
61#include <sys/linker.h>
62#include <sys/malloc.h>
63#include <sys/proc.h>
895c1f85 64#include <sys/priv.h>
c8fe38ae
MD		 65#include <sys/buf.h>
66#include <sys/reboot.h>
67#include <sys/mbuf.h>
68#include <sys/msgbuf.h>
69#include <sys/sysent.h>
70#include <sys/sysctl.h>
71#include <sys/vmmeter.h>
72#include <sys/bus.h>
73#include <sys/upcall.h>
74#include <sys/usched.h>
75#include <sys/reg.h>
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
87#include <sys/thread2.h>
88
89#include <sys/user.h>
90#include <sys/exec.h>
91#include <sys/cons.h>
92
93#include <ddb/ddb.h>
94
95#include <machine/cpu.h>
96#include <machine/clock.h>
97#include <machine/specialreg.h>
98#if JG
99#include <machine/bootinfo.h>
100#endif
c8fe38ae
MD		 101#include <machine/md_var.h>
102#include <machine/metadata.h>
103#include <machine/pc/bios.h>
104#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
105#include <machine/globaldata.h> /* CPU_prvspace */
106#include <machine/smp.h>
107#ifdef PERFMON
108#include <machine/perfmon.h>
109#endif
110#include <machine/cputypes.h>
111
112#ifdef OLD_BUS_ARCH
46d4e165 113#include <bus/isa/isa_device.h>
c8fe38ae
MD		 114#endif
115#include <machine_base/isa/intr_machdep.h>
116#include <bus/isa/rtc.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
121#define PHYSMAP_ENTRIES 10
122
123extern void init386(int first);
124extern void dblfault_handler(void);
125extern u_int64_t hammer_time(u_int64_t, u_int64_t);
126
127extern void printcpuinfo(void); /* XXX header file */
128extern void identify_cpu(void);
129#if JG
130extern void finishidentcpu(void);
131#endif
132extern void panicifcpuunsupported(void);
c8fe38ae
MD		 133
134static void cpu_startup(void *);
135#ifndef CPU_DISABLE_SSE
136static void set_fpregs_xmm(struct save87 *, struct savexmm *);
137static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
138#endif /* CPU_DISABLE_SSE */
139#ifdef DIRECTIO
140extern void ffs_rawread_setup(void);
141#endif /* DIRECTIO */
142static void init_locks(void);
143
144SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
145
146#ifdef DDB
147extern vm_offset_t ksym_start, ksym_end;
148#endif
149
c8fe38ae
MD		 150uint64_t KPTphys;
151uint64_t SMPptpa;
152pt_entry_t *SMPpt;
c8fe38ae
MD		 153
154
9409ddbe 155struct privatespace CPU_prvspace[MAXCPU];
48ffc236 156
c8fe38ae
MD		 157int _udatasel, _ucodesel, _ucode32sel;
158u_long atdevbase;
159#ifdef SMP
160int64_t tsc_offsets[MAXCPU];
161#else
162int64_t tsc_offsets[1];
163#endif
164
165#if defined(SWTCH_OPTIM_STATS)
166extern int swtch_optim_stats;
167SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
168 CTLFLAG_RD, &swtch_optim_stats, 0, "");
169SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
170 CTLFLAG_RD, &tlb_flush_count, 0, "");
171#endif
172
173int physmem = 0;
174
175static int
176sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
177{
178 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
179 return (error);
180}
181
182SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
183 0, 0, sysctl_hw_physmem, "IU", "");
184
185static int
186sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
187{
188 int error = sysctl_handle_int(oidp, 0,
189 ctob(physmem - vmstats.v_wire_count), req);
190 return (error);
191}
192
193SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
194 0, 0, sysctl_hw_usermem, "IU", "");
195
196static int
197sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
198{
c8fe38ae 199 int error = sysctl_handle_int(oidp, 0,
c1543a89 200 x86_64_btop(avail_end - avail_start), req);
c8fe38ae 201 return (error);
c8fe38ae
MD		 202}
203
204SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
205 0, 0, sysctl_hw_availpages, "I", "");
206
c8fe38ae
MD		 207vm_paddr_t Maxmem = 0;
208
209/*
210 * The number of PHYSMAP entries must be one less than the number of
211 * PHYSSEG entries because the PHYSMAP entry that spans the largest
212 * physical address that is accessible by ISA DMA is split into two
213 * PHYSSEG entries.
214 */
215#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
216
217vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
218vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
219
220/* must be 2 less so 0 0 can signal end of chunks */
221#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
222#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
223
224static vm_offset_t buffer_sva, buffer_eva;
225vm_offset_t clean_sva, clean_eva;
226static vm_offset_t pager_sva, pager_eva;
227static struct trapframe proc0_tf;
228
229static void
230cpu_startup(void *dummy)
231{
232 caddr_t v;
233 vm_size_t size = 0;
234 vm_offset_t firstaddr;
235
236 if (boothowto & RB_VERBOSE)
237 bootverbose++;
238
239 /*
240 * Good {morning,afternoon,evening,night}.
241 */
242 kprintf("%s", version);
243 startrtclock();
244 printcpuinfo();
245 panicifcpuunsupported();
246#ifdef PERFMON
247 perfmon_init();
248#endif
bfc09ba0
MD		 249 kprintf("real memory = %ju (%juK bytes)\n",
250 (intmax_t)ptoa(Maxmem),
251 (intmax_t)ptoa(Maxmem) / 1024);
c8fe38ae
MD		 252 /*
253 * Display any holes after the first chunk of extended memory.
254 */
255 if (bootverbose) {
256 int indx;
257
258 kprintf("Physical memory chunk(s):\n");
259 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
260 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
261
bfc09ba0
MD		 262 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
263 (intmax_t)phys_avail[indx],
264 (intmax_t)phys_avail[indx + 1] - 1,
265 (intmax_t)size1,
266 (intmax_t)(size1 / PAGE_SIZE));
c8fe38ae
MD		 267 }
268 }
269
270 /*
271 * Allocate space for system data structures.
272 * The first available kernel virtual address is in "v".
273 * As pages of kernel virtual memory are allocated, "v" is incremented.
274 * As pages of memory are allocated and cleared,
275 * "firstaddr" is incremented.
276 * An index into the kernel page table corresponding to the
277 * virtual memory address maintained in "v" is kept in "mapaddr".
278 */
279
280 /*
281 * Make two passes. The first pass calculates how much memory is
282 * needed and allocates it. The second pass assigns virtual
283 * addresses to the various data structures.
284 */
285 firstaddr = 0;
286again:
287 v = (caddr_t)firstaddr;
288
289#define valloc(name, type, num) \
290 (name) = (type *)v; v = (caddr_t)((name)+(num))
291#define valloclim(name, type, num, lim) \
292 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
293
294 /*
295 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
296 * For the first 64MB of ram nominally allocate sufficient buffers to
297 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
298 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
299 * the buffer cache we limit the eventual kva reservation to
300 * maxbcache bytes.
301 *
302 * factor represents the 1/4 x ram conversion.
303 */
304 if (nbuf == 0) {
305 int factor = 4 * BKVASIZE / 1024;
306 int kbytes = physmem * (PAGE_SIZE / 1024);
307
308 nbuf = 50;
309 if (kbytes > 4096)
310 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
311 if (kbytes > 65536)
312 nbuf += (kbytes - 65536) * 2 / (factor * 5);
313 if (maxbcache && nbuf > maxbcache / BKVASIZE)
314 nbuf = maxbcache / BKVASIZE;
315 }
316
317 /*
318 * Do not allow the buffer_map to be more then 1/2 the size of the
319 * kernel_map.
320 */
321 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
322 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
323 kprintf("Warning: nbufs capped at %d\n", nbuf);
324 }
325
326 nswbuf = max(min(nbuf/4, 256), 16);
327#ifdef NSWBUF_MIN
328 if (nswbuf < NSWBUF_MIN)
329 nswbuf = NSWBUF_MIN;
330#endif
331#ifdef DIRECTIO
332 ffs_rawread_setup();
333#endif
334
335 valloc(swbuf, struct buf, nswbuf);
336 valloc(buf, struct buf, nbuf);
337
338 /*
339 * End of first pass, size has been calculated so allocate memory
340 */
341 if (firstaddr == 0) {
342 size = (vm_size_t)(v - firstaddr);
343 firstaddr = kmem_alloc(&kernel_map, round_page(size));
344 if (firstaddr == 0)
345 panic("startup: no room for tables");
346 goto again;
347 }
348
349 /*
350 * End of second pass, addresses have been assigned
351 */
352 if ((vm_size_t)(v - firstaddr) != size)
353 panic("startup: table size inconsistency");
354
355 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
356 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
357 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
358 (nbuf*BKVASIZE));
359 buffer_map.system_map = 1;
360 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
361 (nswbuf*MAXPHYS) + pager_map_size);
362 pager_map.system_map = 1;
363
364#if defined(USERCONFIG)
365 userconfig();
366 cninit(); /* the preferred console may have changed */
367#endif
368
5b9f6cc4
MD		 369 kprintf("avail memory = %lu (%luK bytes)\n",
370 ptoa(vmstats.v_free_count),
371 ptoa(vmstats.v_free_count) / 1024);
c8fe38ae
MD		 372
373 /*
374 * Set up buffers, so they can be used to read disk labels.
375 */
376 bufinit();
377 vm_pager_bufferinit();
378
379#ifdef SMP
380 /*
381 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
382 */
383 mp_start(); /* fire up the APs and APICs */
384 mp_announce();
385#endif /* SMP */
386 cpu_setregs();
387}
388
389/*
390 * Send an interrupt to process.
391 *
392 * Stack is set up to allow sigcode stored
393 * at top to call routine, followed by kcall
394 * to sigreturn routine below. After sigreturn
395 * resets the signal mask, the stack, and the
396 * frame pointer, it returns to the user
397 * specified pc, psl.
398 */
399void
400sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
401{
c8fe38ae
MD		 402 struct lwp *lp = curthread->td_lwp;
403 struct proc *p = lp->lwp_proc;
404 struct trapframe *regs;
405 struct sigacts *psp = p->p_sigacts;
406 struct sigframe sf, *sfp;
407 int oonstack;
a6a09809 408 char *sp;
c8fe38ae
MD		 409
410 regs = lp->lwp_md.md_regs;
411 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
412
a6a09809 413 /* Save user context */
c8fe38ae
MD		 414 bzero(&sf, sizeof(struct sigframe));
415 sf.sf_uc.uc_sigmask = *mask;
416 sf.sf_uc.uc_stack = lp->lwp_sigstk;
417 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
5b9f6cc4
MD		 418 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
419 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
c8fe38ae 420
a6a09809 421 /* Make the size of the saved context visible to userland */
c8fe38ae
MD		 422 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
423
a6a09809 424 /* Save mailbox pending state for syscall interlock semantics */
c8fe38ae
MD		 425 if (p->p_flag & P_MAILBOX)
426 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
c8fe38ae
MD		 427
428 /* Allocate and validate space for the signal handler context. */
429 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
430 SIGISMEMBER(psp->ps_sigonstack, sig)) {
a6a09809
MD		 431 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
432 sizeof(struct sigframe));
c8fe38ae
MD		 433 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
434 } else {
89954408
JG		 435 /* We take red zone into account */
436 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
c8fe38ae
MD		 437 }
438
a6a09809
MD		 439 /* Align to 16 bytes */
440 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL);
441
c8fe38ae
MD		 442 /* Translate the signal is appropriate */
443 if (p->p_sysent->sv_sigtbl) {
444 if (sig <= p->p_sysent->sv_sigsize)
445 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
446 }
447
a6a09809
MD		 448 /*
449 * Build the argument list for the signal handler.
450 *
451 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
452 */
453 regs->tf_rdi = sig; /* argument 1 */
454 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
455
c8fe38ae 456 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
a6a09809
MD		 457 /*
458 * Signal handler installed with SA_SIGINFO.
459 *
460 * action(signo, siginfo, ucontext)
461 */
462 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
463 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
c8fe38ae
MD		 464 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
465
466 /* fill siginfo structure */
467 sf.sf_si.si_signo = sig;
468 sf.sf_si.si_code = code;
a6a09809
MD		 469 sf.sf_si.si_addr = (void *)regs->tf_err;
470 } else {
471 /*
472 * Old FreeBSD-style arguments.
473 *
474 * handler (signo, code, [uc], addr)
475 */
476 regs->tf_rsi = (register_t)code; /* argument 2 */
477 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
c8fe38ae
MD		 478 sf.sf_ahu.sf_handler = catcher;
479 }
480
481 /*
482 * If we're a vm86 process, we want to save the segment registers.
483 * We also change eflags to be our emulated eflags, not the actual
484 * eflags.
485 */
486#if JG
487 if (regs->tf_eflags & PSL_VM) {
488 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
489 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
490
491 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
492 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
493 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
494 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
495
496 if (vm86->vm86_has_vme == 0)
497 sf.sf_uc.uc_mcontext.mc_eflags =
498 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
499 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
500
501 /*
502 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
503 * syscalls made by the signal handler. This just avoids
504 * wasting time for our lazy fixup of such faults. PSL_NT
505 * does nothing in vm86 mode, but vm86 programs can set it
506 * almost legitimately in probes for old cpu types.
507 */
508 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
509 }
510#endif
511
512 /*
513 * Save the FPU state and reinit the FP unit
514 */
c8fe38ae 515 npxpush(&sf.sf_uc.uc_mcontext);
c8fe38ae
MD		 516
517 /*
518 * Copy the sigframe out to the user's stack.
519 */
520 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
521 /*
522 * Something is wrong with the stack pointer.
523 * ...Kill the process.
524 */
525 sigexit(lp, SIGILL);
526 }
527
5b9f6cc4
MD		 528 regs->tf_rsp = (register_t)sfp;
529 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
c8fe38ae
MD		 530
531 /*
532 * i386 abi specifies that the direction flag must be cleared
533 * on function entry
534 */
5b9f6cc4 535 regs->tf_rflags &= ~(PSL_T|PSL_D);
c8fe38ae 536
c8fe38ae 537 /*
a6a09809
MD		 538 * 64 bit mode has a code and stack selector but
539 * no data or extra selector. %fs and %gs are not
540 * stored in-context.
c8fe38ae 541 */
a6a09809 542 regs->tf_cs = _ucodesel;
c8fe38ae
MD		 543 regs->tf_ss = _udatasel;
544}
545
546/*
547 * Sanitize the trapframe for a virtual kernel passing control to a custom
548 * VM context. Remove any items that would otherwise create a privilage
549 * issue.
550 *
551 * XXX at the moment we allow userland to set the resume flag. Is this a
552 * bad idea?
553 */
554int
555cpu_sanitize_frame(struct trapframe *frame)
556{
c8fe38ae 557 frame->tf_cs = _ucodesel;
c8fe38ae 558 frame->tf_ss = _udatasel;
5b9f6cc4
MD		 559 /* XXX VM (8086) mode not supported? */
560 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
561 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
562
c8fe38ae
MD		 563 return(0);
564}
565
566/*
567 * Sanitize the tls so loading the descriptor does not blow up
c1543a89 568 * on us. For x86_64 we don't have to do anything.
c8fe38ae
MD		 569 */
570int
571cpu_sanitize_tls(struct savetls *tls)
572{
573 return(0);
574}
575
576/*
577 * sigreturn(ucontext_t *sigcntxp)
578 *
579 * System call to cleanup state after a signal
580 * has been taken. Reset signal mask and
581 * stack state from context left by sendsig (above).
582 * Return to previous pc and psl as specified by
583 * context left by sendsig. Check carefully to
584 * make sure that the user has not modified the
585 * state to gain improper privileges.
586 */
587#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
588#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
589
590int
591sys_sigreturn(struct sigreturn_args *uap)
592{
593 struct lwp *lp = curthread->td_lwp;
594 struct proc *p = lp->lwp_proc;
595 struct trapframe *regs;
596 ucontext_t uc;
597 ucontext_t *ucp;
5b9f6cc4 598 register_t rflags;
c8fe38ae 599 int cs;
c8fe38ae
MD		 600 int error;
601
602 /*
603 * We have to copy the information into kernel space so userland
604 * can't modify it while we are sniffing it.
605 */
606 regs = lp->lwp_md.md_regs;
607 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
608 if (error)
609 return (error);
610 ucp = &uc;
5b9f6cc4
MD		 611 rflags = ucp->uc_mcontext.mc_rflags;
612
613 /* VM (8086) mode not supported */
614 rflags &= ~PSL_VM_UNSUPP;
c8fe38ae
MD		 615
616#if JG
617 if (eflags & PSL_VM) {
618 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
619 struct vm86_kernel *vm86;
620
621 /*
622 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
623 * set up the vm86 area, and we can't enter vm86 mode.
624 */
625 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
626 return (EINVAL);
627 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
628 if (vm86->vm86_inited == 0)
629 return (EINVAL);
630
631 /* go back to user mode if both flags are set */
632 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
633 trapsignal(lp, SIGBUS, 0);
634
635 if (vm86->vm86_has_vme) {
c8fe38ae
MD		 636 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
637 (eflags & VME_USERCHANGE) | PSL_VM;
c8fe38ae 638 } else {
c8fe38ae
MD		 639 vm86->vm86_eflags = eflags; /* save VIF, VIP */
640 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
641 (eflags & VM_USERCHANGE) | PSL_VM;
c8fe38ae 642 }
c8fe38ae
MD		 643 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
644 tf->tf_eflags = eflags;
c8fe38ae
MD		 645 tf->tf_vm86_ds = tf->tf_ds;
646 tf->tf_vm86_es = tf->tf_es;
647 tf->tf_vm86_fs = tf->tf_fs;
648 tf->tf_vm86_gs = tf->tf_gs;
649 tf->tf_ds = _udatasel;
650 tf->tf_es = _udatasel;
c8fe38ae
MD		 651 tf->tf_fs = _udatasel;
652 tf->tf_gs = _udatasel;
5b9f6cc4 653 } else
c8fe38ae 654#endif
5b9f6cc4 655 {
c8fe38ae
MD		 656 /*
657 * Don't allow users to change privileged or reserved flags.
658 */
659 /*
660 * XXX do allow users to change the privileged flag PSL_RF.
661 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
662 * should sometimes set it there too. tf_eflags is kept in
663 * the signal context during signal handling and there is no
664 * other place to remember it, so the PSL_RF bit may be
665 * corrupted by the signal handler without us knowing.
666 * Corruption of the PSL_RF bit at worst causes one more or
667 * one less debugger trap, so allowing it is fairly harmless.
668 */
5b9f6cc4
MD		 669 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
670 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
c8fe38ae
MD		 671 return(EINVAL);
672 }
c8fe38ae
MD		 673
674 /*
675 * Don't allow users to load a valid privileged %cs. Let the
676 * hardware check for invalid selectors, excess privilege in
677 * other selectors, invalid %eip's and invalid %esp's.
678 */
679 cs = ucp->uc_mcontext.mc_cs;
680 if (!CS_SECURE(cs)) {
681 kprintf("sigreturn: cs = 0x%x\n", cs);
682 trapsignal(lp, SIGBUS, T_PROTFLT);
683 return(EINVAL);
684 }
5b9f6cc4 685 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
c8fe38ae 686 }
c8fe38ae
MD		 687
688 /*
689 * Restore the FPU state from the frame
690 */
c8fe38ae 691 npxpop(&ucp->uc_mcontext);
c8fe38ae
MD		 692
693 /*
694 * Merge saved signal mailbox pending flag to maintain interlock
695 * semantics against system calls.
696 */
c8fe38ae
MD		 697 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
698 p->p_flag |= P_MAILBOX;
c8fe38ae
MD		 699
700 if (ucp->uc_mcontext.mc_onstack & 1)
701 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
702 else
703 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
704
705 lp->lwp_sigmask = ucp->uc_sigmask;
706 SIG_CANTMASK(lp->lwp_sigmask);
707 return(EJUSTRETURN);
708}
709
710/*
5b9f6cc4
MD		 711 * Stack frame on entry to function. %rax will contain the function vector,
712 * %rcx will contain the function data. flags, rcx, and rax will have
c8fe38ae
MD		 713 * already been pushed on the stack.
714 */
715struct upc_frame {
5b9f6cc4
MD		 716 register_t rax;
717 register_t rcx;
718 register_t rdx;
c8fe38ae
MD		 719 register_t flags;
720 register_t oldip;
721};
722
723void
724sendupcall(struct vmupcall *vu, int morepending)
725{
726 struct lwp *lp = curthread->td_lwp;
727 struct trapframe *regs;
728 struct upcall upcall;
729 struct upc_frame upc_frame;
730 int crit_count = 0;
731
732 /*
733 * If we are a virtual kernel running an emulated user process
734 * context, switch back to the virtual kernel context before
735 * trying to post the signal.
736 */
737 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
738 lp->lwp_md.md_regs->tf_trapno = 0;
739 vkernel_trap(lp, lp->lwp_md.md_regs);
740 }
741
742 /*
743 * Get the upcall data structure
744 */
745 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
746 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
747 ) {
748 vu->vu_pending = 0;
749 kprintf("bad upcall address\n");
750 return;
751 }
752
753 /*
754 * If the data structure is already marked pending or has a critical
755 * section count, mark the data structure as pending and return
756 * without doing an upcall. vu_pending is left set.
757 */
758 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
759 if (upcall.upc_pending < vu->vu_pending) {
760 upcall.upc_pending = vu->vu_pending;
761 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
762 sizeof(upcall.upc_pending));
763 }
764 return;
765 }
766
767 /*
768 * We can run this upcall now, clear vu_pending.
769 *
770 * Bump our critical section count and set or clear the
771 * user pending flag depending on whether more upcalls are
772 * pending. The user will be responsible for calling
773 * upc_dispatch(-1) to process remaining upcalls.
774 */
775 vu->vu_pending = 0;
776 upcall.upc_pending = morepending;
777 crit_count += TDPRI_CRIT;
778 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
779 sizeof(upcall.upc_pending));
780 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
781 sizeof(int));
782
783 /*
784 * Construct a stack frame and issue the upcall
785 */
786 regs = lp->lwp_md.md_regs;
5b9f6cc4
MD		 787 upc_frame.rax = regs->tf_rax;
788 upc_frame.rcx = regs->tf_rcx;
789 upc_frame.rdx = regs->tf_rdx;
790 upc_frame.flags = regs->tf_rflags;
791 upc_frame.oldip = regs->tf_rip;
792 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
c8fe38ae
MD		 793 sizeof(upc_frame)) != 0) {
794 kprintf("bad stack on upcall\n");
795 } else {
5b9f6cc4
MD		 796 regs->tf_rax = (register_t)vu->vu_func;
797 regs->tf_rcx = (register_t)vu->vu_data;
798 regs->tf_rdx = (register_t)lp->lwp_upcall;
799 regs->tf_rip = (register_t)vu->vu_ctx;
800 regs->tf_rsp -= sizeof(upc_frame);
c8fe38ae 801 }
c8fe38ae
MD		 802}
803
804/*
805 * fetchupcall occurs in the context of a system call, which means that
806 * we have to return EJUSTRETURN in order to prevent eax and edx from
807 * being overwritten by the syscall return value.
808 *
809 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
810 * and the function pointer in %eax.
811 */
812int
813fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
814{
815 struct upc_frame upc_frame;
816 struct lwp *lp = curthread->td_lwp;
817 struct trapframe *regs;
818 int error;
819 struct upcall upcall;
820 int crit_count;
821
822 regs = lp->lwp_md.md_regs;
823
824 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
825 if (error == 0) {
826 if (vu) {
827 /*
828 * This jumps us to the next ready context.
829 */
830 vu->vu_pending = 0;
831 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
832 crit_count = 0;
833 if (error == 0)
834 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
835 crit_count += TDPRI_CRIT;
836 if (error == 0)
837 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
5b9f6cc4
MD		 838 regs->tf_rax = (register_t)vu->vu_func;
839 regs->tf_rcx = (register_t)vu->vu_data;
840 regs->tf_rdx = (register_t)lp->lwp_upcall;
841 regs->tf_rip = (register_t)vu->vu_ctx;
842 regs->tf_rsp = (register_t)rsp;
c8fe38ae
MD		 843 } else {
844 /*
845 * This returns us to the originally interrupted code.
846 */
847 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
5b9f6cc4
MD		 848 regs->tf_rax = upc_frame.rax;
849 regs->tf_rcx = upc_frame.rcx;
850 regs->tf_rdx = upc_frame.rdx;
851 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
c8fe38ae 852 (upc_frame.flags & PSL_USERCHANGE);
5b9f6cc4
MD		 853 regs->tf_rip = upc_frame.oldip;
854 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
c8fe38ae
MD		 855 }
856 }
857 if (error == 0)
858 error = EJUSTRETURN;
859 return(error);
860}
861
862/*
863 * Machine dependent boot() routine
864 *
865 * I haven't seen anything to put here yet
866 * Possibly some stuff might be grafted back here from boot()
867 */
868void
869cpu_boot(int howto)
870{
871}
872
873/*
874 * Shutdown the CPU as much as possible
875 */
876void
877cpu_halt(void)
878{
879 for (;;)
880 __asm__ __volatile("hlt");
881}
882
883/*
884 * cpu_idle() represents the idle LWKT. You cannot return from this function
885 * (unless you want to blow things up!). Instead we look for runnable threads
886 * and loop or halt as appropriate. Giant is not held on entry to the thread.
887 *
888 * The main loop is entered with a critical section held, we must release
889 * the critical section before doing anything else. lwkt_switch() will
890 * check for pending interrupts due to entering and exiting its own
891 * critical section.
892 *
893 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
894 * to wake a HLTed cpu up. However, there are cases where the idlethread
895 * will be entered with the possibility that no IPI will occur and in such
896 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
897 */
898static int cpu_idle_hlt = 1;
899static int cpu_idle_hltcnt;
900static int cpu_idle_spincnt;
901SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
902 &cpu_idle_hlt, 0, "Idle loop HLT enable");
903SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
904 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
905SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
906 &cpu_idle_spincnt, 0, "Idle loop entry spins");
907
908static void
909cpu_idle_default_hook(void)
910{
911 /*
912 * We must guarentee that hlt is exactly the instruction
913 * following the sti.
914 */
915 __asm __volatile("sti; hlt");
916}
917
918/* Other subsystems (e.g., ACPI) can hook this later. */
919void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
920
921void
922cpu_idle(void)
923{
924 struct thread *td = curthread;
925
926 crit_exit();
927 KKASSERT(td->td_pri < TDPRI_CRIT);
928 for (;;) {
929 /*
930 * See if there are any LWKTs ready to go.
931 */
932 lwkt_switch();
933
934 /*
935 * If we are going to halt call splz unconditionally after
936 * CLIing to catch any interrupt races. Note that we are
937 * at SPL0 and interrupts are enabled.
938 */
939 if (cpu_idle_hlt && !lwkt_runnable() &&
940 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
941 __asm __volatile("cli");
942 splz();
943 if (!lwkt_runnable())
944 cpu_idle_hook();
945#ifdef SMP
946 else
947 __asm __volatile("pause");
948#endif
949 ++cpu_idle_hltcnt;
950 } else {
951 td->td_flags &= ~TDF_IDLE_NOHLT;
952 splz();
953#ifdef SMP
954 __asm __volatile("sti; pause");
955#else
956 __asm __volatile("sti");
957#endif
958 ++cpu_idle_spincnt;
959 }
960 }
961}
962
963/*
964 * This routine is called when the only runnable threads require
965 * the MP lock, and the scheduler couldn't get it. On a real cpu
966 * we let the scheduler spin.
967 */
968void
969cpu_mplock_contested(void)
970{
971 cpu_pause();
972}
973
974/*
975 * This routine is called if a spinlock has been held through the
976 * exponential backoff period and is seriously contested. On a real cpu
977 * we let it spin.
978 */
979void
980cpu_spinlock_contested(void)
981{
982 cpu_pause();
983}
984
985/*
986 * Clear registers on exec
987 */
988void
989exec_setregs(u_long entry, u_long stack, u_long ps_strings)
990{
991 struct thread *td = curthread;
992 struct lwp *lp = td->td_lwp;
993 struct pcb *pcb = td->td_pcb;
994 struct trapframe *regs = lp->lwp_md.md_regs;
995
c8fe38ae
MD		 996 /* was i386_user_cleanup() in NetBSD */
997 user_ldt_free(pcb);
998
999 bzero((char *)regs, sizeof(struct trapframe));
1000 regs->tf_rip = entry;
1001 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1002 regs->tf_rdi = stack; /* argv */
1003 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1004 regs->tf_ss = _udatasel;
1005 regs->tf_cs = _ucodesel;
1006 regs->tf_rbx = ps_strings;
1007
1008 /*
1009 * Reset the hardware debug registers if they were in use.
1010 * They won't have any meaning for the newly exec'd process.
1011 */
1012 if (pcb->pcb_flags & PCB_DBREGS) {
1013 pcb->pcb_dr0 = 0;
1014 pcb->pcb_dr1 = 0;
1015 pcb->pcb_dr2 = 0;
1016 pcb->pcb_dr3 = 0;
1017 pcb->pcb_dr6 = 0;
0855a2af 1018 pcb->pcb_dr7 = 0; /* JG set bit 10? */
c8fe38ae
MD		 1019 if (pcb == td->td_pcb) {
1020 /*
1021 * Clear the debug registers on the running
1022 * CPU, otherwise they will end up affecting
1023 * the next process we switch to.
1024 */
1025 reset_dbregs();
1026 }
1027 pcb->pcb_flags &= ~PCB_DBREGS;
1028 }
1029
1030 /*
1031 * Initialize the math emulator (if any) for the current process.
1032 * Actually, just clear the bit that says that the emulator has
1033 * been initialized. Initialization is delayed until the process
1034 * traps to the emulator (if it is done at all) mainly because
1035 * emulators don't provide an entry point for initialization.
1036 */
c8fe38ae 1037 pcb->pcb_flags &= ~FP_SOFTFP;
c8fe38ae
MD		 1038
1039 /*
5b9f6cc4
MD		 1040 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1041 * gd_npxthread. Otherwise a preemptive interrupt thread
1042 * may panic in npxdna().
c8fe38ae
MD		 1043 */
1044 crit_enter();
1045 load_cr0(rcr0() | CR0_MP);
1046
5b9f6cc4
MD		 1047 /*
1048 * NOTE: The MSR values must be correct so we can return to
1049 * userland. gd_user_fs/gs must be correct so the switch
1050 * code knows what the current MSR values are.
1051 */
1052 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
c8fe38ae 1053 pcb->pcb_gsbase = 0;
5b9f6cc4
MD		 1054 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1055 mdcpu->gd_user_gs = 0;
1056 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1057 wrmsr(MSR_KGSBASE, 0);
c8fe38ae 1058
c8fe38ae
MD		 1059 /* Initialize the npx (if any) for the current process. */
1060 npxinit(__INITIAL_NPXCW__);
c8fe38ae
MD		 1061 crit_exit();
1062
1063 pcb->pcb_ds = _udatasel;
1064 pcb->pcb_es = _udatasel;
1065 pcb->pcb_fs = _udatasel;
1066 pcb->pcb_gs = _udatasel;
1067}
1068
1069void
1070cpu_setregs(void)
1071{
1072 register_t cr0;
1073
1074 cr0 = rcr0();
1075 cr0 |= CR0_NE; /* Done by npxinit() */
1076 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1077 cr0 |= CR0_WP | CR0_AM;
1078 load_cr0(cr0);
1079 load_gs(_udatasel);
1080}
1081
1082static int
1083sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1084{
1085 int error;
1086 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1087 req);
1088 if (!error && req->newptr)
1089 resettodr();
1090 return (error);
1091}
1092
1093SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1094 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1095
1096#if JG
1097SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1098 CTLFLAG_RW, &disable_rtc_set, 0, "");
1099#endif
1100
1101#if JG
1102SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1103 CTLFLAG_RD, &bootinfo, bootinfo, "");
1104#endif
1105
1106SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1107 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1108
1109extern u_long bootdev; /* not a cdev_t - encoding is different */
1110SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1111 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1112
1113/*
1114 * Initialize 386 and configure to run kernel
1115 */
1116
1117/*
1118 * Initialize segments & interrupt table
1119 */
1120
1121int _default_ldt;
1122struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1123static struct gate_descriptor idt0[NIDT];
1124struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1125#if JG
1126union descriptor ldt[NLDT]; /* local descriptor table */
1127#endif
1128
1129/* table descriptors - used to load tables by cpu */
1130struct region_descriptor r_gdt, r_idt;
1131
1132#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1133extern int has_f00f_bug;
1134#endif
1135
1136static char dblfault_stack[PAGE_SIZE] __aligned(16);
1137
1138/* JG proc0paddr is a virtual address */
1139void *proc0paddr;
1140/* JG alignment? */
1141char proc0paddr_buff[LWKT_THREAD_STACK];
1142
1143
1144/* software prototypes -- in more palatable form */
1145struct soft_segment_descriptor gdt_segs[] = {
1146/* GNULL_SEL 0 Null Descriptor */
1147{ 0x0, /* segment base address */
1148 0x0, /* length */
1149 0, /* segment type */
1150 0, /* segment descriptor priority level */
1151 0, /* segment descriptor present */
1152 0, /* long */
1153 0, /* default 32 vs 16 bit size */
1154 0 /* limit granularity (byte/page units)*/ },
1155/* GCODE_SEL 1 Code Descriptor for kernel */
1156{ 0x0, /* segment base address */
1157 0xfffff, /* length - all address space */
1158 SDT_MEMERA, /* segment type */
1159 SEL_KPL, /* segment descriptor priority level */
1160 1, /* segment descriptor present */
1161 1, /* long */
1162 0, /* default 32 vs 16 bit size */
1163 1 /* limit granularity (byte/page units)*/ },
1164/* GDATA_SEL 2 Data Descriptor for kernel */
1165{ 0x0, /* segment base address */
1166 0xfffff, /* length - all address space */
1167 SDT_MEMRWA, /* segment type */
1168 SEL_KPL, /* segment descriptor priority level */
1169 1, /* segment descriptor present */
1170 1, /* long */
1171 0, /* default 32 vs 16 bit size */
1172 1 /* limit granularity (byte/page units)*/ },
1173/* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1174{ 0x0, /* segment base address */
1175 0xfffff, /* length - all address space */
1176 SDT_MEMERA, /* segment type */
1177 SEL_UPL, /* segment descriptor priority level */
1178 1, /* segment descriptor present */
1179 0, /* long */
1180 1, /* default 32 vs 16 bit size */
1181 1 /* limit granularity (byte/page units)*/ },
1182/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1183{ 0x0, /* segment base address */
1184 0xfffff, /* length - all address space */
1185 SDT_MEMRWA, /* segment type */
1186 SEL_UPL, /* segment descriptor priority level */
1187 1, /* segment descriptor present */
1188 0, /* long */
1189 1, /* default 32 vs 16 bit size */
1190 1 /* limit granularity (byte/page units)*/ },
1191/* GUCODE_SEL 5 64 bit Code Descriptor for user */
1192{ 0x0, /* segment base address */
1193 0xfffff, /* length - all address space */
1194 SDT_MEMERA, /* segment type */
1195 SEL_UPL, /* segment descriptor priority level */
1196 1, /* segment descriptor present */
1197 1, /* long */
1198 0, /* default 32 vs 16 bit size */
1199 1 /* limit granularity (byte/page units)*/ },
1200/* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1201{
1202 0x0, /* segment base address */
c1543a89 1203 sizeof(struct x86_64tss)-1,/* length - all address space */
c8fe38ae
MD		 1204 SDT_SYSTSS, /* segment type */
1205 SEL_KPL, /* segment descriptor priority level */
1206 1, /* segment descriptor present */
1207 0, /* long */
1208 0, /* unused - default 32 vs 16 bit size */
1209 0 /* limit granularity (byte/page units)*/ },
1210/* Actually, the TSS is a system descriptor which is double size */
1211{ 0x0, /* segment base address */
1212 0x0, /* length */
1213 0, /* segment type */
1214 0, /* segment descriptor priority level */
1215 0, /* segment descriptor present */
1216 0, /* long */
1217 0, /* default 32 vs 16 bit size */
1218 0 /* limit granularity (byte/page units)*/ },
1219/* GUGS32_SEL 8 32 bit GS Descriptor for user */
1220{ 0x0, /* segment base address */
1221 0xfffff, /* length - all address space */
1222 SDT_MEMRWA, /* segment type */
1223 SEL_UPL, /* segment descriptor priority level */
1224 1, /* segment descriptor present */
1225 0, /* long */
1226 1, /* default 32 vs 16 bit size */
1227 1 /* limit granularity (byte/page units)*/ },
1228};
1229
1230void
1231setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1232{
1233 struct gate_descriptor *ip;
1234
1235 ip = idt + idx;
1236 ip->gd_looffset = (uintptr_t)func;
1237 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1238 ip->gd_ist = ist;
1239 ip->gd_xx = 0;
1240 ip->gd_type = typ;
1241 ip->gd_dpl = dpl;
1242 ip->gd_p = 1;
1243 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1244}
1245
1246#define IDTVEC(name) __CONCAT(X,name)
1247
1248extern inthand_t
1249 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1250 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1251 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1252 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1253 IDTVEC(xmm), IDTVEC(dblfault),
1254 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1255
1256#ifdef DEBUG_INTERRUPTS
1257extern inthand_t *Xrsvdary[256];
1258#endif
1259
1260void
1261sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1262{
1263 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1264 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1265 ssd->ssd_type = sd->sd_type;
1266 ssd->ssd_dpl = sd->sd_dpl;
1267 ssd->ssd_p = sd->sd_p;
1268 ssd->ssd_def32 = sd->sd_def32;
1269 ssd->ssd_gran = sd->sd_gran;
1270}
1271
1272void
1273ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1274{
1275
1276 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1277 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1278 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1279 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1280 sd->sd_type = ssd->ssd_type;
1281 sd->sd_dpl = ssd->ssd_dpl;
1282 sd->sd_p = ssd->ssd_p;
1283 sd->sd_long = ssd->ssd_long;
1284 sd->sd_def32 = ssd->ssd_def32;
1285 sd->sd_gran = ssd->ssd_gran;
1286}
1287
1288void
1289ssdtosyssd(struct soft_segment_descriptor *ssd,
1290 struct system_segment_descriptor *sd)
1291{
1292
1293 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1294 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1295 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1296 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1297 sd->sd_type = ssd->ssd_type;
1298 sd->sd_dpl = ssd->ssd_dpl;
1299 sd->sd_p = ssd->ssd_p;
1300 sd->sd_gran = ssd->ssd_gran;
1301}
1302
1303u_int basemem;
1304
1305/*
1306 * Populate the (physmap) array with base/bound pairs describing the
1307 * available physical memory in the system, then test this memory and
1308 * build the phys_avail array describing the actually-available memory.
1309 *
1310 * If we cannot accurately determine the physical memory map, then use
1311 * value from the 0xE801 call, and failing that, the RTC.
1312 *
1313 * Total memory size may be set by the kernel environment variable
1314 * hw.physmem or the compile-time define MAXMEM.
1315 *
1316 * XXX first should be vm_paddr_t.
1317 */
1318static void
1319getmemsize(caddr_t kmdp, u_int64_t first)
1320{
1321 int i, off, physmap_idx, pa_indx, da_indx;
1322 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1323 u_long physmem_tunable;
1324 pt_entry_t *pte;
1325 struct bios_smap *smapbase, *smap, *smapend;
1326 u_int32_t smapsize;
1327 quad_t dcons_addr, dcons_size;
1328
1329 bzero(physmap, sizeof(physmap));
1330 basemem = 0;
1331 physmap_idx = 0;
1332
1333 /*
1334 * get memory map from INT 15:E820, kindly supplied by the loader.
1335 *
1336 * subr_module.c says:
1337 * "Consumer may safely assume that size value precedes data."
1338 * ie: an int32_t immediately precedes smap.
1339 */
1340 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1341 MODINFO_METADATA | MODINFOMD_SMAP);
1342 if (smapbase == NULL)
1343 panic("No BIOS smap info from loader!");
1344
1345 smapsize = *((u_int32_t *)smapbase - 1);
1346 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1347
1348 for (smap = smapbase; smap < smapend; smap++) {
1349 if (boothowto & RB_VERBOSE)
1350 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1351 smap->type, smap->base, smap->length);
1352
1353 if (smap->type != SMAP_TYPE_MEMORY)
1354 continue;
1355
1356 if (smap->length == 0)
1357 continue;
1358
1359 for (i = 0; i <= physmap_idx; i += 2) {
1360 if (smap->base < physmap[i + 1]) {
1361 if (boothowto & RB_VERBOSE)
1362 kprintf(
1363 "Overlapping or non-monotonic memory region, ignoring second region\n");
1364 continue;
1365 }
1366 }
1367
1368 if (smap->base == physmap[physmap_idx + 1]) {
1369 physmap[physmap_idx + 1] += smap->length;
1370 continue;
1371 }
1372
1373 physmap_idx += 2;
1374 if (physmap_idx == PHYSMAP_SIZE) {
1375 kprintf(
1376 "Too many segments in the physical address map, giving up\n");
1377 break;
1378 }
1379 physmap[physmap_idx] = smap->base;
1380 physmap[physmap_idx + 1] = smap->base + smap->length;
1381 }
1382
1383 /*
1384 * Find the 'base memory' segment for SMP
1385 */
1386 basemem = 0;
1387 for (i = 0; i <= physmap_idx; i += 2) {
1388 if (physmap[i] == 0x00000000) {
1389 basemem = physmap[i + 1] / 1024;
1390 break;
1391 }
1392 }
1393 if (basemem == 0)
1394 panic("BIOS smap did not include a basemem segment!");
1395
1396#ifdef SMP
1397 /* make hole for AP bootstrap code */
1398 physmap[1] = mp_bootaddress(physmap[1] / 1024);
2331304b
JG		 1399
1400 /* look for the MP hardware - needed for apic addresses */
1401 mp_probe();
c8fe38ae
MD		 1402#endif
1403
1404 /*
1405 * Maxmem isn't the "maximum memory", it's one larger than the
1406 * highest page of the physical address space. It should be
1407 * called something like "Maxphyspage". We may adjust this
1408 * based on ``hw.physmem'' and the results of the memory test.
1409 */
1410 Maxmem = atop(physmap[physmap_idx + 1]);
1411
1412#ifdef MAXMEM
1413 Maxmem = MAXMEM / 4;
1414#endif
1415
1416 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1417 Maxmem = atop(physmem_tunable);
1418
1419 /*
1420 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1421 * in the system.
1422 */
1423 if (Maxmem > atop(physmap[physmap_idx + 1]))
1424 Maxmem = atop(physmap[physmap_idx + 1]);
1425
1426 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1427 (boothowto & RB_VERBOSE))
1428 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1429
1430 /* call pmap initialization to make new kernel address space */
48ffc236 1431 pmap_bootstrap(&first);
c8fe38ae
MD		 1432
1433 /*
1434 * Size up each available chunk of physical memory.
1435 */
1436 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1437 pa_indx = 0;
1438 da_indx = 1;
1439 phys_avail[pa_indx++] = physmap[0];
1440 phys_avail[pa_indx] = physmap[0];
1441 dump_avail[da_indx] = physmap[0];
1442 pte = CMAP1;
1443
1444 /*
1445 * Get dcons buffer address
1446 */
1447 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1448 kgetenv_quad("dcons.size", &dcons_size) == 0)
1449 dcons_addr = 0;
1450
1451 /*
1452 * physmap is in bytes, so when converting to page boundaries,
1453 * round up the start address and round down the end address.
1454 */
1455 for (i = 0; i <= physmap_idx; i += 2) {
1456 vm_paddr_t end;
1457
1458 end = ptoa((vm_paddr_t)Maxmem);
1459 if (physmap[i + 1] < end)
1460 end = trunc_page(physmap[i + 1]);
1461 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1462 int tmp, page_bad, full;
1463 int *ptr = (int *)CADDR1;
1464
1465 full = FALSE;
1466 /*
1467 * block out kernel memory as not available.
1468 */
1469 if (pa >= 0x100000 && pa < first)
1470 goto do_dump_avail;
1471
1472 /*
1473 * block out dcons buffer
1474 */
1475 if (dcons_addr > 0
1476 && pa >= trunc_page(dcons_addr)
1477 && pa < dcons_addr + dcons_size)
1478 goto do_dump_avail;
1479
1480 page_bad = FALSE;
1481
1482 /*
1483 * map page into kernel: valid, read/write,non-cacheable
1484 */
1485 *pte = pa | PG_V | PG_RW | PG_N;
1486 cpu_invltlb();
1487
1488 tmp = *(int *)ptr;
1489 /*
1490 * Test for alternating 1's and 0's
1491 */
1492 *(volatile int *)ptr = 0xaaaaaaaa;
1493 if (*(volatile int *)ptr != 0xaaaaaaaa)
1494 page_bad = TRUE;
1495 /*
1496 * Test for alternating 0's and 1's
1497 */
1498 *(volatile int *)ptr = 0x55555555;
1499 if (*(volatile int *)ptr != 0x55555555)
1500 page_bad = TRUE;
1501 /*
1502 * Test for all 1's
1503 */
1504 *(volatile int *)ptr = 0xffffffff;
1505 if (*(volatile int *)ptr != 0xffffffff)
1506 page_bad = TRUE;
1507 /*
1508 * Test for all 0's
1509 */
1510 *(volatile int *)ptr = 0x0;
1511 if (*(volatile int *)ptr != 0x0)
1512 page_bad = TRUE;
1513 /*
1514 * Restore original value.
1515 */
1516 *(int *)ptr = tmp;
1517
1518 /*
1519 * Adjust array of valid/good pages.
1520 */
1521 if (page_bad == TRUE)
1522 continue;
1523 /*
1524 * If this good page is a continuation of the
1525 * previous set of good pages, then just increase
1526 * the end pointer. Otherwise start a new chunk.
1527 * Note that "end" points one higher than end,
1528 * making the range >= start and < end.
1529 * If we're also doing a speculative memory
1530 * test and we at or past the end, bump up Maxmem
1531 * so that we keep going. The first bad page
1532 * will terminate the loop.
1533 */
1534 if (phys_avail[pa_indx] == pa) {
1535 phys_avail[pa_indx] += PAGE_SIZE;
1536 } else {
1537 pa_indx++;
1538 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1539 kprintf(
1540 "Too many holes in the physical address space, giving up\n");
1541 pa_indx--;
1542 full = TRUE;
1543 goto do_dump_avail;
1544 }
1545 phys_avail[pa_indx++] = pa; /* start */
1546 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1547 }
1548 physmem++;
1549do_dump_avail:
1550 if (dump_avail[da_indx] == pa) {
1551 dump_avail[da_indx] += PAGE_SIZE;
1552 } else {
1553 da_indx++;
1554 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1555 da_indx--;
1556 goto do_next;
1557 }
1558 dump_avail[da_indx++] = pa; /* start */
1559 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1560 }
1561do_next:
1562 if (full)
1563 break;
1564 }
1565 }
1566 *pte = 0;
1567 cpu_invltlb();
1568
1569 /*
1570 * XXX
1571 * The last chunk must contain at least one page plus the message
1572 * buffer to avoid complicating other code (message buffer address
1573 * calculation, etc.).
1574 */
1575 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1576 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1577 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1578 phys_avail[pa_indx--] = 0;
1579 phys_avail[pa_indx--] = 0;
1580 }
1581
1582 Maxmem = atop(phys_avail[pa_indx]);
1583
1584 /* Trim off space for the message buffer. */
1585 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1586
1185babf
JG		 1587 avail_end = phys_avail[pa_indx];
1588
c8fe38ae
MD		 1589 /* Map the message buffer. */
1590 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1591 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1592 off);
1593}
1594
1595/*
1596 * IDT VECTORS:
1597 * 0 Divide by zero
1598 * 1 Debug
1599 * 2 NMI
1600 * 3 BreakPoint
1601 * 4 OverFlow
1602 * 5 Bound-Range
1603 * 6 Invalid OpCode
1604 * 7 Device Not Available (x87)
1605 * 8 Double-Fault
1606 * 9 Coprocessor Segment overrun (unsupported, reserved)
1607 * 10 Invalid-TSS
1608 * 11 Segment not present
1609 * 12 Stack
1610 * 13 General Protection
1611 * 14 Page Fault
1612 * 15 Reserved
1613 * 16 x87 FP Exception pending
1614 * 17 Alignment Check
1615 * 18 Machine Check
1616 * 19 SIMD floating point
1617 * 20-31 reserved
1618 * 32-255 INTn/external sources
1619 */
1620u_int64_t
1621hammer_time(u_int64_t modulep, u_int64_t physfree)
1622{
1623 caddr_t kmdp;
5b9f6cc4
MD		 1624 int gsel_tss, x;
1625#if JG
1626 int metadata_missing, off;
1627#endif
c8fe38ae
MD		 1628 struct mdglobaldata *gd;
1629 u_int64_t msr;
1630 char *env;
1631
48ffc236 1632#if JG
c8fe38ae
MD		 1633 /*
1634 * This must be done before the first references
1635 * to CPU_prvspace[0] are made.
1636 */
1637 init_paging(&physfree);
48ffc236 1638#endif
c8fe38ae
MD		 1639
1640 /*
1641 * Prevent lowering of the ipl if we call tsleep() early.
1642 */
1643 gd = &CPU_prvspace[0].mdglobaldata;
1644 bzero(gd, sizeof(*gd));
1645
1646 /*
1647 * Note: on both UP and SMP curthread must be set non-NULL
1648 * early in the boot sequence because the system assumes
1649 * that 'curthread' is never NULL.
1650 */
1651
1652 gd->mi.gd_curthread = &thread0;
1653 thread0.td_gd = &gd->mi;
1654
1655 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1656
1657#if JG
1658 metadata_missing = 0;
1659 if (bootinfo.bi_modulep) {
1660 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1661 preload_bootstrap_relocate(KERNBASE);
1662 } else {
1663 metadata_missing = 1;
1664 }
1665 if (bootinfo.bi_envp)
1666 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1667#endif
1668
1669 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1670 preload_bootstrap_relocate(PTOV_OFFSET);
1671 kmdp = preload_search_by_type("elf kernel");
1672 if (kmdp == NULL)
1673 kmdp = preload_search_by_type("elf64 kernel");
1674 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1675 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1676#ifdef DDB
1677 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1678 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1679#endif
1680
1681 /*
1682 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1683 * and ncpus_fit_mask remain 0.
1684 */
1685 ncpus = 1;
1686 ncpus2 = 1;
1687 ncpus_fit = 1;
1688 /* Init basic tunables, hz etc */
1689 init_param1();
1690
1691 /*
1692 * make gdt memory segments
1693 */
1694 gdt_segs[GPROC0_SEL].ssd_base =
1695 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1696
1697 gd->mi.gd_prvspace = &CPU_prvspace[0];
1698
1699 for (x = 0; x < NGDT; x++) {
1700 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1701 ssdtosd(&gdt_segs[x], &gdt[x]);
1702 }
1703 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1704 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
48ffc236 1705
c8fe38ae
MD		 1706 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1707 r_gdt.rd_base = (long) gdt;
1708 lgdt(&r_gdt);
1709
1710 wrmsr(MSR_FSBASE, 0); /* User value */
1711 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1712 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1713
1714 mi_gdinit(&gd->mi, 0);
1715 cpu_gdinit(gd, 0);
1716 proc0paddr = proc0paddr_buff;
1717 mi_proc0init(&gd->mi, proc0paddr);
1718 safepri = TDPRI_MAX;
1719
1720 /* spinlocks and the BGL */
1721 init_locks();
1722
1723 /* exceptions */
1724 for (x = 0; x < NIDT; x++)
1725 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1726 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1727 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1728 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1729 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1730 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1731 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1732 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1733 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1734 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1735 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1736 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1737 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1738 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1739 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1740 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1741 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1742 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1743 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1744 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1745
1746 r_idt.rd_limit = sizeof(idt0) - 1;
1747 r_idt.rd_base = (long) idt;
1748 lidt(&r_idt);
1749
1750 /*
1751 * Initialize the console before we print anything out.
1752 */
1753 cninit();
1754
1755#if JG
1756 if (metadata_missing)
1757 kprintf("WARNING: loader(8) metadata is missing!\n");
1758#endif
1759
1760#if NISA >0
1761 isa_defaultirq();
1762#endif
1763 rand_initialize();
1764
1765#ifdef DDB
1766 kdb_init();
1767 if (boothowto & RB_KDB)
1768 Debugger("Boot flags requested debugger");
1769#endif
1770
1771#if JG
1772 finishidentcpu(); /* Final stage of CPU initialization */
1773 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1774 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1775#endif
1776 identify_cpu(); /* Final stage of CPU initialization */
1777 initializecpu(); /* Initialize CPU registers */
1778
1779 /* make an initial tss so cpu can get interrupt stack on syscall! */
5b9f6cc4
MD		 1780 gd->gd_common_tss.tss_rsp0 =
1781 (register_t)(thread0.td_kstack +
1782 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
c8fe38ae
MD		 1783 /* Ensure the stack is aligned to 16 bytes */
1784 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1785 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1786
1787 /* doublefault stack space, runs on ist1 */
1788 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1789
1790 /* Set the IO permission bitmap (empty due to tss seg limit) */
c1543a89 1791 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
c8fe38ae
MD		 1792
1793 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1794 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1795 gd->gd_common_tssd = *gd->gd_tss_gdt;
1796 ltr(gsel_tss);
1797
1798 /* Set up the fast syscall stuff */
1799 msr = rdmsr(MSR_EFER) | EFER_SCE;
1800 wrmsr(MSR_EFER, msr);
1801 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1802 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1803 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1804 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1805 wrmsr(MSR_STAR, msr);
1806 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1807
1808 getmemsize(kmdp, physfree);
1809 init_param2(physmem);
1810
1811 /* now running on new page tables, configured,and u/iom is accessible */
1812
1813 /* Map the message buffer. */
1814#if JG
1815 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1816 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1817#endif
1818
1819 msgbufinit(msgbufp, MSGBUF_SIZE);
1820
1821
1822 /* transfer to user mode */
1823
1824 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1825 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1826 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1827
1828 load_ds(_udatasel);
1829 load_es(_udatasel);
1830 load_fs(_udatasel);
1831
1832 /* setup proc 0's pcb */
1833 thread0.td_pcb->pcb_flags = 0;
c8fe38ae 1834 thread0.td_pcb->pcb_cr3 = KPML4phys;
c8fe38ae
MD		 1835 thread0.td_pcb->pcb_ext = 0;
1836 lwp0.lwp_md.md_regs = &proc0_tf;
1837 env = kgetenv("kernelname");
1838 if (env != NULL)
1839 strlcpy(kernelname, env, sizeof(kernelname));
1840
1841 /* Location of kernel stack for locore */
1842 return ((u_int64_t)thread0.td_pcb);
1843}
1844
1845/*
1846 * Initialize machine-dependant portions of the global data structure.
1847 * Note that the global data area and cpu0's idlestack in the private
1848 * data space were allocated in locore.
1849 *
1850 * Note: the idlethread's cpl is 0
1851 *
1852 * WARNING! Called from early boot, 'mycpu' may not work yet.
1853 */
1854void
1855cpu_gdinit(struct mdglobaldata *gd, int cpu)
1856{
1857 if (cpu)
1858 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1859
1860 lwkt_init_thread(&gd->mi.gd_idlethread,
1861 gd->mi.gd_prvspace->idlestack,
1862 sizeof(gd->mi.gd_prvspace->idlestack),
1863 TDF_MPSAFE, &gd->mi);
1864 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1865 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1866 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1867 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1868}
1869
1870int
1871is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1872{
1873 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1874 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1875 return (TRUE);
1876 }
1877 return (FALSE);
1878}
1879
1880struct globaldata *
1881globaldata_find(int cpu)
1882{
1883 KKASSERT(cpu >= 0 && cpu < ncpus);
1884 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1885}
1886
1887#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1888static void f00f_hack(void *unused);
1889SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1890
1891static void
1892f00f_hack(void *unused)
1893{
1894 struct gate_descriptor *new_idt;
1895 vm_offset_t tmp;
1896
1897 if (!has_f00f_bug)
1898 return;
1899
1900 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1901
1902 r_idt.rd_limit = sizeof(idt0) - 1;
1903
1904 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1905 if (tmp == 0)
1906 panic("kmem_alloc returned 0");
1907 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1908 panic("kmem_alloc returned non-page-aligned memory");
1909 /* Put the first seven entries in the lower page */
1910 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1911 bcopy(idt, new_idt, sizeof(idt0));
1912 r_idt.rd_base = (int)new_idt;
1913 lidt(&r_idt);
1914 idt = new_idt;
1915 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1916 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1917 panic("vm_map_protect failed");
1918 return;
1919}
1920#endif /* defined(I586_CPU) && !NO_F00F_HACK */
1921
1922int
1923ptrace_set_pc(struct lwp *lp, unsigned long addr)
1924{
5b9f6cc4 1925 lp->lwp_md.md_regs->tf_rip = addr;
c8fe38ae
MD		 1926 return (0);
1927}
1928
1929int
1930ptrace_single_step(struct lwp *lp)
1931{
5b9f6cc4 1932 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
c8fe38ae
MD		 1933 return (0);
1934}
1935
1936int
1937fill_regs(struct lwp *lp, struct reg *regs)
1938{
1939 struct pcb *pcb;
1940 struct trapframe *tp;
1941
1942 tp = lp->lwp_md.md_regs;
5b9f6cc4
MD		 1943 bcopy(&tp->tf_rdi, &regs->r_rdi, sizeof(*regs));
1944
c8fe38ae
MD		 1945 pcb = lp->lwp_thread->td_pcb;
1946 return (0);
1947}
1948
1949int
1950set_regs(struct lwp *lp, struct reg *regs)
1951{
1952 struct pcb *pcb;
1953 struct trapframe *tp;
1954
1955 tp = lp->lwp_md.md_regs;
5b9f6cc4 1956 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
c8fe38ae
MD		 1957 !CS_SECURE(regs->r_cs))
1958 return (EINVAL);
5b9f6cc4 1959 bcopy(&regs->r_rdi, &tp->tf_rdi, sizeof(*regs));
c8fe38ae
MD		 1960 pcb = lp->lwp_thread->td_pcb;
1961 return (0);
1962}
1963
1964#ifndef CPU_DISABLE_SSE
1965static void
1966fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
1967{
1968 struct env87 *penv_87 = &sv_87->sv_env;
1969 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1970 int i;
1971
1972 /* FPU control/status */
1973 penv_87->en_cw = penv_xmm->en_cw;
1974 penv_87->en_sw = penv_xmm->en_sw;
1975 penv_87->en_tw = penv_xmm->en_tw;
1976 penv_87->en_fip = penv_xmm->en_fip;
1977 penv_87->en_fcs = penv_xmm->en_fcs;
1978 penv_87->en_opcode = penv_xmm->en_opcode;
1979 penv_87->en_foo = penv_xmm->en_foo;
1980 penv_87->en_fos = penv_xmm->en_fos;
1981
1982 /* FPU registers */
1983 for (i = 0; i < 8; ++i)
1984 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
1985
1986 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
1987}
1988
1989static void
1990set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
1991{
1992 struct env87 *penv_87 = &sv_87->sv_env;
1993 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1994 int i;
1995
1996 /* FPU control/status */
1997 penv_xmm->en_cw = penv_87->en_cw;
1998 penv_xmm->en_sw = penv_87->en_sw;
1999 penv_xmm->en_tw = penv_87->en_tw;
2000 penv_xmm->en_fip = penv_87->en_fip;
2001 penv_xmm->en_fcs = penv_87->en_fcs;
2002 penv_xmm->en_opcode = penv_87->en_opcode;
2003 penv_xmm->en_foo = penv_87->en_foo;
2004 penv_xmm->en_fos = penv_87->en_fos;
2005
2006 /* FPU registers */
2007 for (i = 0; i < 8; ++i)
2008 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2009
2010 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2011}
2012#endif /* CPU_DISABLE_SSE */
2013
2014int
2015fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2016{
2017#ifndef CPU_DISABLE_SSE
2018 if (cpu_fxsr) {
2019 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2020 (struct save87 *)fpregs);
2021 return (0);
2022 }
2023#endif /* CPU_DISABLE_SSE */
2024 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2025 return (0);
2026}
2027
2028int
2029set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2030{
2031#ifndef CPU_DISABLE_SSE
2032 if (cpu_fxsr) {
2033 set_fpregs_xmm((struct save87 *)fpregs,
2034 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2035 return (0);
2036 }
2037#endif /* CPU_DISABLE_SSE */
2038 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2039 return (0);
2040}
2041
2042int
2043fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2044{
2045 if (lp == NULL) {
0855a2af
JG		 2046 dbregs->dr[0] = rdr0();
2047 dbregs->dr[1] = rdr1();
2048 dbregs->dr[2] = rdr2();
2049 dbregs->dr[3] = rdr3();
2050 dbregs->dr[4] = rdr4();
2051 dbregs->dr[5] = rdr5();
2052 dbregs->dr[6] = rdr6();
2053 dbregs->dr[7] = rdr7();
c8fe38ae
MD		 2054 } else {
2055 struct pcb *pcb;
2056
2057 pcb = lp->lwp_thread->td_pcb;
0855a2af
JG		 2058 dbregs->dr[0] = pcb->pcb_dr0;
2059 dbregs->dr[1] = pcb->pcb_dr1;
2060 dbregs->dr[2] = pcb->pcb_dr2;
2061 dbregs->dr[3] = pcb->pcb_dr3;
2062 dbregs->dr[4] = 0;
2063 dbregs->dr[5] = 0;
2064 dbregs->dr[6] = pcb->pcb_dr6;
2065 dbregs->dr[7] = pcb->pcb_dr7;
c8fe38ae
MD		 2066 }
2067 return (0);
2068}
2069
2070int
2071set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2072{
2073 if (lp == NULL) {
0855a2af
JG		 2074 load_dr0(dbregs->dr[0]);
2075 load_dr1(dbregs->dr[1]);
2076 load_dr2(dbregs->dr[2]);
2077 load_dr3(dbregs->dr[3]);
2078 load_dr4(dbregs->dr[4]);
2079 load_dr5(dbregs->dr[5]);
2080 load_dr6(dbregs->dr[6]);
2081 load_dr7(dbregs->dr[7]);
c8fe38ae
MD		 2082 } else {
2083 struct pcb *pcb;
2084 struct ucred *ucred;
2085 int i;
0855a2af 2086 uint64_t mask1, mask2;
c8fe38ae
MD		 2087
2088 /*
2089 * Don't let an illegal value for dr7 get set. Specifically,
2090 * check for undefined settings. Setting these bit patterns
2091 * result in undefined behaviour and can lead to an unexpected
2092 * TRCTRAP.
2093 */
0855a2af
JG		 2094 /* JG this loop looks unreadable */
2095 /* Check 4 2-bit fields for invalid patterns.
2096 * These fields are R/Wi, for i = 0..3
2097 */
2098 /* Is 10 in LENi allowed when running in compatibility mode? */
2099 /* Pattern 10 in R/Wi might be used to indicate
2100 * breakpoint on I/O. Further analysis should be
2101 * carried to decide if it is safe and useful to
2102 * provide access to that capability
2103 */
2104 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2105 i++, mask1 <<= 4, mask2 <<= 4)
2106 if ((dbregs->dr[7] & mask1) == mask2)
c8fe38ae 2107 return (EINVAL);
c8fe38ae
MD		 2108
2109 pcb = lp->lwp_thread->td_pcb;
2110 ucred = lp->lwp_proc->p_ucred;
2111
2112 /*
2113 * Don't let a process set a breakpoint that is not within the
2114 * process's address space. If a process could do this, it
2115 * could halt the system by setting a breakpoint in the kernel
2116 * (if ddb was enabled). Thus, we need to check to make sure
2117 * that no breakpoints are being enabled for addresses outside
2118 * process's address space, unless, perhaps, we were called by
2119 * uid 0.
2120 *
2121 * XXX - what about when the watched area of the user's
2122 * address space is written into from within the kernel
2123 * ... wouldn't that still cause a breakpoint to be generated
2124 * from within kernel mode?
2125 */
2126
895c1f85 2127 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
0855a2af 2128 if (dbregs->dr[7] & 0x3) {
c8fe38ae 2129 /* dr0 is enabled */
0855a2af 2130 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD		 2131 return (EINVAL);
2132 }
2133
0855a2af 2134 if (dbregs->dr[7] & (0x3<<2)) {
c8fe38ae 2135 /* dr1 is enabled */
0855a2af 2136 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD		 2137 return (EINVAL);
2138 }
2139
0855a2af 2140 if (dbregs->dr[7] & (0x3<<4)) {
c8fe38ae 2141 /* dr2 is enabled */
0855a2af 2142 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD		 2143 return (EINVAL);
2144 }
2145
0855a2af 2146 if (dbregs->dr[7] & (0x3<<6)) {
c8fe38ae 2147 /* dr3 is enabled */
0855a2af 2148 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD		 2149 return (EINVAL);
2150 }
c8fe38ae
MD		 2151 }
2152
0855a2af
JG		 2153 pcb->pcb_dr0 = dbregs->dr[0];
2154 pcb->pcb_dr1 = dbregs->dr[1];
2155 pcb->pcb_dr2 = dbregs->dr[2];
2156 pcb->pcb_dr3 = dbregs->dr[3];
2157 pcb->pcb_dr6 = dbregs->dr[6];
2158 pcb->pcb_dr7 = dbregs->dr[7];
c8fe38ae
MD		 2159
2160 pcb->pcb_flags |= PCB_DBREGS;
2161 }
2162
2163 return (0);
2164}
2165
2166/*
2167 * Return > 0 if a hardware breakpoint has been hit, and the
2168 * breakpoint was in user space. Return 0, otherwise.
2169 */
2170int
2171user_dbreg_trap(void)
2172{
0855a2af
JG		 2173 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2174 u_int64_t bp; /* breakpoint bits extracted from dr6 */
c8fe38ae
MD		 2175 int nbp; /* number of breakpoints that triggered */
2176 caddr_t addr[4]; /* breakpoint addresses */
2177 int i;
2178
2179 dr7 = rdr7();
0855a2af 2180 if ((dr7 & 0xff) == 0) {
c8fe38ae
MD		 2181 /*
2182 * all GE and LE bits in the dr7 register are zero,
2183 * thus the trap couldn't have been caused by the
2184 * hardware debug registers
2185 */
2186 return 0;
2187 }
2188
2189 nbp = 0;
2190 dr6 = rdr6();
0855a2af 2191 bp = dr6 & 0xf;
c8fe38ae 2192
0855a2af 2193 if (bp == 0) {
c8fe38ae
MD		 2194 /*
2195 * None of the breakpoint bits are set meaning this
2196 * trap was not caused by any of the debug registers
2197 */
2198 return 0;
2199 }
2200
2201 /*
2202 * at least one of the breakpoints were hit, check to see
2203 * which ones and if any of them are user space addresses
2204 */
2205
2206 if (bp & 0x01) {
2207 addr[nbp++] = (caddr_t)rdr0();
2208 }
2209 if (bp & 0x02) {
2210 addr[nbp++] = (caddr_t)rdr1();
2211 }
2212 if (bp & 0x04) {
2213 addr[nbp++] = (caddr_t)rdr2();
2214 }
2215 if (bp & 0x08) {
2216 addr[nbp++] = (caddr_t)rdr3();
2217 }
2218
2219 for (i=0; i<nbp; i++) {
2220 if (addr[i] <
2221 (caddr_t)VM_MAX_USER_ADDRESS) {
2222 /*
2223 * addr[i] is in user space
2224 */
2225 return nbp;
2226 }
2227 }
2228
2229 /*
2230 * None of the breakpoints are in user space.
2231 */
2232 return 0;
2233}
2234
2235
2236#ifndef DDB
2237void
2238Debugger(const char *msg)
2239{
2240 kprintf("Debugger(\"%s\") called.\n", msg);
2241}
2242#endif /* no DDB */
2243
2244#ifdef DDB
2245
2246/*
2247 * Provide inb() and outb() as functions. They are normally only
2248 * available as macros calling inlined functions, thus cannot be
2249 * called inside DDB.
2250 *
2251 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2252 */
2253
2254#undef inb
2255#undef outb
2256
2257/* silence compiler warnings */
2258u_char inb(u_int);
2259void outb(u_int, u_char);
2260
2261u_char
2262inb(u_int port)
2263{
2264 u_char data;
2265 /*
2266 * We use %%dx and not %1 here because i/o is done at %dx and not at
2267 * %edx, while gcc generates inferior code (movw instead of movl)
2268 * if we tell it to load (u_short) port.
2269 */
2270 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2271 return (data);
2272}
2273
2274void
2275outb(u_int port, u_char data)
2276{
2277 u_char al;
2278 /*
2279 * Use an unnecessary assignment to help gcc's register allocator.
2280 * This make a large difference for gcc-1.40 and a tiny difference
2281 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2282 * best results. gcc-2.6.0 can't handle this.
2283 */
2284 al = data;
2285 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2286}
2287
2288#endif /* DDB */
2289
2290
2291
2292#include "opt_cpu.h"
2293
2294
2295/*
2296 * initialize all the SMP locks
2297 */
2298
2299/* critical region when masking or unmasking interupts */
2300struct spinlock_deprecated imen_spinlock;
2301
2302/* Make FAST_INTR() routines sequential */
2303struct spinlock_deprecated fast_intr_spinlock;
2304
2305/* critical region for old style disable_intr/enable_intr */
2306struct spinlock_deprecated mpintr_spinlock;
2307
2308/* critical region around INTR() routines */
2309struct spinlock_deprecated intr_spinlock;
2310
2311/* lock region used by kernel profiling */
2312struct spinlock_deprecated mcount_spinlock;
2313
2314/* locks com (tty) data/hardware accesses: a FASTINTR() */
2315struct spinlock_deprecated com_spinlock;
2316
2317/* locks kernel kprintfs */
2318struct spinlock_deprecated cons_spinlock;
2319
2320/* lock regions around the clock hardware */
2321struct spinlock_deprecated clock_spinlock;
2322
2323/* lock around the MP rendezvous */
2324struct spinlock_deprecated smp_rv_spinlock;
2325
2326static void
2327init_locks(void)
2328{
2329 /*
2330 * mp_lock = 0; BSP already owns the MP lock
2331 */
2332 /*
2333 * Get the initial mp_lock with a count of 1 for the BSP.
2334 * This uses a LOGICAL cpu ID, ie BSP == 0.
2335 */
2336#ifdef SMP
2337 cpu_get_initial_mplock();
2338#endif
2339 /* DEPRECATED */
2340 spin_lock_init(&mcount_spinlock);
2341 spin_lock_init(&fast_intr_spinlock);
2342 spin_lock_init(&intr_spinlock);
2343 spin_lock_init(&mpintr_spinlock);
2344 spin_lock_init(&imen_spinlock);
2345 spin_lock_init(&smp_rv_spinlock);
2346 spin_lock_init(&com_spinlock);
2347 spin_lock_init(&clock_spinlock);
2348 spin_lock_init(&cons_spinlock);
2349
2350 /* our token pool needs to work early */
2351 lwkt_token_pool_init();
2352}
2353
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