Minor cleanups to sysport. Use ms_msgsize in the sendsys() call.
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
093dd88e 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.47 2003/12/04 20:35:07 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
57#include "opt_user_ldt.h"
58#include "opt_userconfig.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/sysproto.h>
63#include <sys/signalvar.h>
64#include <sys/kernel.h>
65#include <sys/linker.h>
66#include <sys/malloc.h>
67#include <sys/proc.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/mbuf.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
a722be49 77#include <sys/upcall.h>
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78
79#include <vm/vm.h>
80#include <vm/vm_param.h>
81#include <sys/lock.h>
82#include <vm/vm_kern.h>
83#include <vm/vm_object.h>
84#include <vm/vm_page.h>
85#include <vm/vm_map.h>
86#include <vm/vm_pager.h>
87#include <vm/vm_extern.h>
88
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89#include <sys/thread2.h>
90
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91#include <sys/user.h>
92#include <sys/exec.h>
93#include <sys/cons.h>
94
95#include <ddb/ddb.h>
96
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97#include <machine/cpu.h>
98#include <machine/reg.h>
99#include <machine/clock.h>
100#include <machine/specialreg.h>
101#include <machine/bootinfo.h>
102#include <machine/ipl.h>
103#include <machine/md_var.h>
104#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 105#include <machine/globaldata.h> /* CPU_prvspace */
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106#ifdef SMP
107#include <machine/smp.h>
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108#endif
109#ifdef PERFMON
110#include <machine/perfmon.h>
111#endif
112#include <machine/cputypes.h>
113
114#ifdef OLD_BUS_ARCH
1f2de5d4 115#include <bus/isa/i386/isa_device.h>
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116#endif
117#include <i386/isa/intr_machdep.h>
1f2de5d4 118#include <bus/isa/rtc.h>
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119#include <machine/vm86.h>
120#include <sys/random.h>
121#include <sys/ptrace.h>
122#include <machine/sigframe.h>
123
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124extern void init386 (int first);
125extern void dblfault_handler (void);
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126
127extern void printcpuinfo(void); /* XXX header file */
128extern void finishidentcpu(void);
129extern void panicifcpuunsupported(void);
130extern void initializecpu(void);
131
3ae0cd58 132static void cpu_startup (void *);
642a6e88 133#ifndef CPU_DISABLE_SSE
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134static void set_fpregs_xmm (struct save87 *, struct savexmm *);
135static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 136#endif /* CPU_DISABLE_SSE */
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137#ifdef DIRECTIO
138extern void ffs_rawread_setup(void);
139#endif /* DIRECTIO */
8a8d5d85 140static void init_locks(void);
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141
142SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
143
144static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
145
146int _udatasel, _ucodesel;
147u_int atdevbase;
148
149#if defined(SWTCH_OPTIM_STATS)
150extern int swtch_optim_stats;
151SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
152 CTLFLAG_RD, &swtch_optim_stats, 0, "");
153SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
154 CTLFLAG_RD, &tlb_flush_count, 0, "");
155#endif
156
157#ifdef PC98
158static int ispc98 = 1;
159#else
160static int ispc98 = 0;
161#endif
162SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
163
164int physmem = 0;
165int cold = 1;
166
167static int
168sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
169{
170 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
171 return (error);
172}
173
174SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
175 0, 0, sysctl_hw_physmem, "IU", "");
176
177static int
178sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
179{
180 int error = sysctl_handle_int(oidp, 0,
12e4aaff 181 ctob(physmem - vmstats.v_wire_count), req);
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182 return (error);
183}
184
185SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
186 0, 0, sysctl_hw_usermem, "IU", "");
187
188static int
189sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
190{
191 int error = sysctl_handle_int(oidp, 0,
192 i386_btop(avail_end - avail_start), req);
193 return (error);
194}
195
196SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
197 0, 0, sysctl_hw_availpages, "I", "");
198
199static int
200sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
201{
202 int error;
203
204 /* Unwind the buffer, so that it's linear (possibly starting with
205 * some initial nulls).
206 */
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
208 msgbufp->msg_size-msgbufp->msg_bufr,req);
209 if(error) return(error);
210 if(msgbufp->msg_bufr>0) {
211 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
212 msgbufp->msg_bufr,req);
213 }
214 return(error);
215}
216
217SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
218 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
219
220static int msgbuf_clear;
221
222static int
223sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
224{
225 int error;
226 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
227 req);
228 if (!error && req->newptr) {
229 /* Clear the buffer and reset write pointer */
230 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
231 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
232 msgbuf_clear=0;
233 }
234 return (error);
235}
236
237SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
238 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
239 "Clear kernel message buffer");
240
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241int bootverbose = 0;
242vm_paddr_t Maxmem = 0;
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243long dumplo;
244
6ef943a3 245vm_paddr_t phys_avail[10];
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246
247/* must be 2 less so 0 0 can signal end of chunks */
248#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
249
250static vm_offset_t buffer_sva, buffer_eva;
251vm_offset_t clean_sva, clean_eva;
252static vm_offset_t pager_sva, pager_eva;
253static struct trapframe proc0_tf;
254
255static void
256cpu_startup(dummy)
257 void *dummy;
258{
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259 unsigned i;
260 caddr_t v;
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261 vm_offset_t maxaddr;
262 vm_size_t size = 0;
263 int firstaddr;
264 vm_offset_t minaddr;
265
266 if (boothowto & RB_VERBOSE)
267 bootverbose++;
268
269 /*
270 * Good {morning,afternoon,evening,night}.
271 */
272 printf("%s", version);
273 startrtclock();
274 printcpuinfo();
275 panicifcpuunsupported();
276#ifdef PERFMON
277 perfmon_init();
278#endif
6ef943a3 279 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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280 /*
281 * Display any holes after the first chunk of extended memory.
282 */
283 if (bootverbose) {
284 int indx;
285
286 printf("Physical memory chunk(s):\n");
287 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 288 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 289
6ef943a3 290 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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291 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
292 size1 / PAGE_SIZE);
293 }
294 }
295
296 /*
297 * Calculate callout wheel size
298 */
299 for (callwheelsize = 1, callwheelbits = 0;
300 callwheelsize < ncallout;
301 callwheelsize <<= 1, ++callwheelbits)
302 ;
303 callwheelmask = callwheelsize - 1;
304
305 /*
306 * Allocate space for system data structures.
307 * The first available kernel virtual address is in "v".
308 * As pages of kernel virtual memory are allocated, "v" is incremented.
309 * As pages of memory are allocated and cleared,
310 * "firstaddr" is incremented.
311 * An index into the kernel page table corresponding to the
312 * virtual memory address maintained in "v" is kept in "mapaddr".
313 */
314
315 /*
316 * Make two passes. The first pass calculates how much memory is
317 * needed and allocates it. The second pass assigns virtual
318 * addresses to the various data structures.
319 */
320 firstaddr = 0;
321again:
322 v = (caddr_t)firstaddr;
323
324#define valloc(name, type, num) \
325 (name) = (type *)v; v = (caddr_t)((name)+(num))
326#define valloclim(name, type, num, lim) \
327 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
328
329 valloc(callout, struct callout, ncallout);
330 valloc(callwheel, struct callout_tailq, callwheelsize);
331
332 /*
333 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
334 * For the first 64MB of ram nominally allocate sufficient buffers to
335 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
336 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
337 * the buffer cache we limit the eventual kva reservation to
338 * maxbcache bytes.
339 *
340 * factor represents the 1/4 x ram conversion.
341 */
342 if (nbuf == 0) {
343 int factor = 4 * BKVASIZE / 1024;
344 int kbytes = physmem * (PAGE_SIZE / 1024);
345
346 nbuf = 50;
347 if (kbytes > 4096)
348 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
349 if (kbytes > 65536)
350 nbuf += (kbytes - 65536) * 2 / (factor * 5);
351 if (maxbcache && nbuf > maxbcache / BKVASIZE)
352 nbuf = maxbcache / BKVASIZE;
353 }
354
355 /*
356 * Do not allow the buffer_map to be more then 1/2 the size of the
357 * kernel_map.
358 */
359 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
360 (BKVASIZE * 2)) {
361 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
362 (BKVASIZE * 2);
363 printf("Warning: nbufs capped at %d\n", nbuf);
364 }
365
366 nswbuf = max(min(nbuf/4, 256), 16);
367#ifdef NSWBUF_MIN
368 if (nswbuf < NSWBUF_MIN)
369 nswbuf = NSWBUF_MIN;
370#endif
371#ifdef DIRECTIO
372 ffs_rawread_setup();
373#endif
374
375 valloc(swbuf, struct buf, nswbuf);
376 valloc(buf, struct buf, nbuf);
377 v = bufhashinit(v);
378
379 /*
380 * End of first pass, size has been calculated so allocate memory
381 */
382 if (firstaddr == 0) {
383 size = (vm_size_t)(v - firstaddr);
384 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
385 if (firstaddr == 0)
386 panic("startup: no room for tables");
387 goto again;
388 }
389
390 /*
391 * End of second pass, addresses have been assigned
392 */
393 if ((vm_size_t)(v - firstaddr) != size)
394 panic("startup: table size inconsistency");
395
396 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
397 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
398 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
399 (nbuf*BKVASIZE));
400 buffer_map->system_map = 1;
401 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
402 (nswbuf*MAXPHYS) + pager_map_size);
403 pager_map->system_map = 1;
404 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
405 (16*(ARG_MAX+(PAGE_SIZE*3))));
406
407 /*
408 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
409 * we use the more space efficient malloc in place of kmem_alloc.
410 */
411 {
412 vm_offset_t mb_map_size;
413
414 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
415 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
416 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
417 bzero(mclrefcnt, mb_map_size / MCLBYTES);
ce634264 418 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
03aa8d99 419 &maxaddr, mb_map_size);
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420 mb_map->system_map = 1;
421 }
422
423 /*
424 * Initialize callouts
425 */
426 SLIST_INIT(&callfree);
427 for (i = 0; i < ncallout; i++) {
428 callout_init(&callout[i]);
429 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
430 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
431 }
432
433 for (i = 0; i < callwheelsize; i++) {
434 TAILQ_INIT(&callwheel[i]);
435 }
436
437#if defined(USERCONFIG)
438 userconfig();
439 cninit(); /* the preferred console may have changed */
440#endif
441
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442 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
443 ptoa(vmstats.v_free_count) / 1024);
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444
445 /*
446 * Set up buffers, so they can be used to read disk labels.
447 */
448 bufinit();
449 vm_pager_bufferinit();
450
451#ifdef SMP
452 /*
453 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
454 */
455 mp_start(); /* fire up the APs and APICs */
456 mp_announce();
457#endif /* SMP */
458 cpu_setregs();
459}
460
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461/*
462 * Send an interrupt to process.
463 *
464 * Stack is set up to allow sigcode stored
465 * at top to call routine, followed by kcall
466 * to sigreturn routine below. After sigreturn
467 * resets the signal mask, the stack, and the
468 * frame pointer, it returns to the user
469 * specified pc, psl.
470 */
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471void
472sendsig(catcher, sig, mask, code)
473 sig_t catcher;
474 int sig;
475 sigset_t *mask;
476 u_long code;
477{
478 struct proc *p = curproc;
479 struct trapframe *regs;
480 struct sigacts *psp = p->p_sigacts;
481 struct sigframe sf, *sfp;
482 int oonstack;
483
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484 regs = p->p_md.md_regs;
485 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
486
487 /* save user context */
488 bzero(&sf, sizeof(struct sigframe));
489 sf.sf_uc.uc_sigmask = *mask;
490 sf.sf_uc.uc_stack = p->p_sigstk;
491 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
492 sf.sf_uc.uc_mcontext.mc_gs = rgs();
493 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
494
495 /* Allocate and validate space for the signal handler context. */
496 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
497 SIGISMEMBER(psp->ps_sigonstack, sig)) {
498 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
499 p->p_sigstk.ss_size - sizeof(struct sigframe));
500 p->p_sigstk.ss_flags |= SS_ONSTACK;
501 }
502 else
503 sfp = (struct sigframe *)regs->tf_esp - 1;
504
505 /* Translate the signal is appropriate */
506 if (p->p_sysent->sv_sigtbl) {
507 if (sig <= p->p_sysent->sv_sigsize)
508 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
509 }
510
511 /* Build the argument list for the signal handler. */
512 sf.sf_signum = sig;
513 sf.sf_ucontext = (register_t)&sfp->sf_uc;
514 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
515 /* Signal handler installed with SA_SIGINFO. */
516 sf.sf_siginfo = (register_t)&sfp->sf_si;
517 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
518
519 /* fill siginfo structure */
520 sf.sf_si.si_signo = sig;
521 sf.sf_si.si_code = code;
522 sf.sf_si.si_addr = (void*)regs->tf_err;
523 }
524 else {
525 /* Old FreeBSD-style arguments. */
526 sf.sf_siginfo = code;
527 sf.sf_addr = regs->tf_err;
528 sf.sf_ahu.sf_handler = catcher;
529 }
530
531 /*
532 * If we're a vm86 process, we want to save the segment registers.
533 * We also change eflags to be our emulated eflags, not the actual
534 * eflags.
535 */
536 if (regs->tf_eflags & PSL_VM) {
537 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 538 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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539
540 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
541 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
542 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
543 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
544
545 if (vm86->vm86_has_vme == 0)
546 sf.sf_uc.uc_mcontext.mc_eflags =
547 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
548 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
549
550 /*
551 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
552 * syscalls made by the signal handler. This just avoids
553 * wasting time for our lazy fixup of such faults. PSL_NT
554 * does nothing in vm86 mode, but vm86 programs can set it
555 * almost legitimately in probes for old cpu types.
556 */
557 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
558 }
559
560 /*
561 * Copy the sigframe out to the user's stack.
562 */
563 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
564 /*
565 * Something is wrong with the stack pointer.
566 * ...Kill the process.
567 */
568 sigexit(p, SIGILL);
569 }
570
571 regs->tf_esp = (int)sfp;
572 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
573 regs->tf_eflags &= ~PSL_T;
574 regs->tf_cs = _ucodesel;
575 regs->tf_ds = _udatasel;
576 regs->tf_es = _udatasel;
577 regs->tf_fs = _udatasel;
578 load_gs(_udatasel);
579 regs->tf_ss = _udatasel;
580}
581
582/*
65957d54 583 * sigreturn(ucontext_t *sigcntxp)
41c20dac 584 *
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585 * System call to cleanup state after a signal
586 * has been taken. Reset signal mask and
587 * stack state from context left by sendsig (above).
588 * Return to previous pc and psl as specified by
589 * context left by sendsig. Check carefully to
590 * make sure that the user has not modified the
591 * state to gain improper privileges.
592 */
593#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
594#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
595
984263bc 596int
41c20dac 597sigreturn(struct sigreturn_args *uap)
984263bc 598{
41c20dac 599 struct proc *p = curproc;
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600 struct trapframe *regs;
601 ucontext_t *ucp;
602 int cs, eflags;
603
604 ucp = uap->sigcntxp;
605
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606 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
607 return (EFAULT);
608
609 regs = p->p_md.md_regs;
610 eflags = ucp->uc_mcontext.mc_eflags;
611
612 if (eflags & PSL_VM) {
613 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
614 struct vm86_kernel *vm86;
615
616 /*
617 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
618 * set up the vm86 area, and we can't enter vm86 mode.
619 */
b7c628e4 620 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 621 return (EINVAL);
b7c628e4 622 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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623 if (vm86->vm86_inited == 0)
624 return (EINVAL);
625
626 /* go back to user mode if both flags are set */
627 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
628 trapsignal(p, SIGBUS, 0);
629
630 if (vm86->vm86_has_vme) {
631 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
632 (eflags & VME_USERCHANGE) | PSL_VM;
633 } else {
634 vm86->vm86_eflags = eflags; /* save VIF, VIP */
635 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
636 }
637 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
638 tf->tf_eflags = eflags;
639 tf->tf_vm86_ds = tf->tf_ds;
640 tf->tf_vm86_es = tf->tf_es;
641 tf->tf_vm86_fs = tf->tf_fs;
642 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
643 tf->tf_ds = _udatasel;
644 tf->tf_es = _udatasel;
645 tf->tf_fs = _udatasel;
646 } else {
647 /*
648 * Don't allow users to change privileged or reserved flags.
649 */
650 /*
651 * XXX do allow users to change the privileged flag PSL_RF.
652 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
653 * should sometimes set it there too. tf_eflags is kept in
654 * the signal context during signal handling and there is no
655 * other place to remember it, so the PSL_RF bit may be
656 * corrupted by the signal handler without us knowing.
657 * Corruption of the PSL_RF bit at worst causes one more or
658 * one less debugger trap, so allowing it is fairly harmless.
659 */
660 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
661 printf("sigreturn: eflags = 0x%x\n", eflags);
662 return(EINVAL);
663 }
664
665 /*
666 * Don't allow users to load a valid privileged %cs. Let the
667 * hardware check for invalid selectors, excess privilege in
668 * other selectors, invalid %eip's and invalid %esp's.
669 */
670 cs = ucp->uc_mcontext.mc_cs;
671 if (!CS_SECURE(cs)) {
672 printf("sigreturn: cs = 0x%x\n", cs);
673 trapsignal(p, SIGBUS, T_PROTFLT);
674 return(EINVAL);
675 }
676 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
677 }
678
679 if (ucp->uc_mcontext.mc_onstack & 1)
680 p->p_sigstk.ss_flags |= SS_ONSTACK;
681 else
682 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
683
684 p->p_sigmask = ucp->uc_sigmask;
685 SIG_CANTMASK(p->p_sigmask);
686 return(EJUSTRETURN);
687}
688
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689/*
690 * Stack frame on entry to function. %eax will contain the function vector,
691 * %ecx will contain the function data. flags, ecx, and eax will have
692 * already been pushed on the stack.
693 */
694struct upc_frame {
695 register_t eax;
696 register_t ecx;
0a455ac5 697 register_t edx;
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698 register_t flags;
699 register_t oldip;
700};
701
702void
703sendupcall(struct vmupcall *vu, int morepending)
704{
705 struct proc *p = curproc;
706 struct trapframe *regs;
707 struct upcall upcall;
708 struct upc_frame upc_frame;
709
710 /*
711 * Get the upcall data structure
712 */
713 if (copyin(p->p_upcall, &upcall, sizeof(upcall))) {
714 vu->vu_pending = 0;
715 printf("bad upcall address\n");
716 return;
717 }
718
719 /*
720 * If the data structure is already marked pending or has a critical
721 * section count, mark the data structure as pending and return
722 * without doing an upcall. vu_pending is left set.
723 */
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724 if (upcall.pending || upcall.crit_count >= vu->vu_pending) {
725 if (upcall.pending < vu->vu_pending) {
726 upcall.pending = vu->vu_pending;
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727 copyout(&upcall.pending, &p->p_upcall->pending,
728 sizeof(upcall.pending));
729 }
730 return;
731 }
732
733 /*
734 * We can run this upcall now, clear vu_pending.
735 *
736 * Bump our critical section count and set or clear the
737 * user pending flag depending on whether more upcalls are
738 * pending. The user will be responsible for calling
739 * upc_dispatch(-1) to process remaining upcalls.
740 */
741 vu->vu_pending = 0;
742 upcall.pending = morepending;
743 upcall.crit_count += TDPRI_CRIT;
744 copyout(&upcall, p->p_upcall, sizeof(upcall));
745
746 /*
747 * Construct a stack frame and issue the upcall
748 */
749 regs = p->p_md.md_regs;
750 upc_frame.eax = regs->tf_eax;
751 upc_frame.ecx = regs->tf_ecx;
0a455ac5 752 upc_frame.edx = regs->tf_edx;
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753 upc_frame.flags = regs->tf_eflags;
754 upc_frame.oldip = regs->tf_eip;
755 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
756 sizeof(upc_frame)) != 0) {
757 printf("bad stack on upcall\n");
758 } else {
759 regs->tf_eax = (register_t)vu->vu_func;
760 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 761 regs->tf_edx = (register_t)p->p_upcall;
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762 regs->tf_eip = (register_t)vu->vu_ctx;
763 regs->tf_esp -= sizeof(upc_frame);
764 }
765}
766
767/*
768 * fetchupcall occurs in the context of a system call, which means that
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769 * we have to return EJUSTRETURN in order to prevent eax and edx from
770 * being overwritten by the syscall return value.
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771 *
772 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
773 * and the function pointer in %eax.
774 */
775int
0a455ac5 776fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
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777{
778 struct upc_frame upc_frame;
779 struct proc *p;
780 struct trapframe *regs;
781 int error;
782
783 p = curproc;
784 regs = p->p_md.md_regs;
785
786 error = copyout(&morepending, &p->p_upcall->pending, sizeof(int));
787 if (error == 0) {
788 if (vu) {
789 /*
790 * This jumps us to the next ready context.
791 */
792 vu->vu_pending = 0;
793 error = copyin(&p->p_upcall->crit_count, &morepending, sizeof(int));
794 morepending += TDPRI_CRIT;
795 if (error == 0)
796 error = copyout(&morepending, &p->p_upcall->crit_count, sizeof(int));
797 regs->tf_eax = (register_t)vu->vu_func;
798 regs->tf_ecx = (register_t)vu->vu_data;
0a455ac5 799 regs->tf_edx = (register_t)p->p_upcall;
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800 regs->tf_eip = (register_t)vu->vu_ctx;
801 regs->tf_esp = (register_t)rsp;
802 } else {
803 /*
804 * This returns us to the originally interrupted code.
805 */
806 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
807 regs->tf_eax = upc_frame.eax;
808 regs->tf_ecx = upc_frame.ecx;
0a455ac5 809 regs->tf_edx = upc_frame.edx;
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810 regs->tf_eflags = upc_frame.flags;
811 regs->tf_eip = upc_frame.oldip;
812 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
813 }
814 }
815 if (error == 0)
816 error = EJUSTRETURN;
817 return(error);
818}
819
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820/*
821 * Machine dependent boot() routine
822 *
823 * I haven't seen anything to put here yet
824 * Possibly some stuff might be grafted back here from boot()
825 */
826void
827cpu_boot(int howto)
828{
829}
830
831/*
832 * Shutdown the CPU as much as possible
833 */
834void
835cpu_halt(void)
836{
837 for (;;)
838 __asm__ ("hlt");
839}
840
841/*
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842 * cpu_idle() represents the idle LWKT. You cannot return from this function
843 * (unless you want to blow things up!). Instead we look for runnable threads
844 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 845 *
26a0694b 846 * The main loop is entered with a critical section held, we must release
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847 * the critical section before doing anything else. lwkt_switch() will
848 * check for pending interrupts due to entering and exiting its own
849 * critical section.
26a0694b 850 *
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851 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
852 * to wake a HLTed cpu up. However, there are cases where the idlethread
853 * will be entered with the possibility that no IPI will occur and in such
854 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 855 */
96728c05 856static int cpu_idle_hlt = 1;
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857SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
858 &cpu_idle_hlt, 0, "Idle loop HLT enable");
859
860void
861cpu_idle(void)
862{
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863 struct thread *td = curthread;
864
26a0694b 865 crit_exit();
a2a5ad0d 866 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 867 for (;;) {
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868 /*
869 * See if there are any LWKTs ready to go.
870 */
8ad65e08 871 lwkt_switch();
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872
873 /*
874 * If we are going to halt call splz unconditionally after
875 * CLIing to catch any interrupt races. Note that we are
876 * at SPL0 and interrupts are enabled.
877 */
878 if (cpu_idle_hlt && !lwkt_runnable() &&
879 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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880 /*
881 * We must guarentee that hlt is exactly the instruction
882 * following the sti.
883 */
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884 __asm __volatile("cli");
885 splz();
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886 __asm __volatile("sti; hlt");
887 } else {
a2a5ad0d 888 td->td_flags &= ~TDF_IDLE_NOHLT;
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889 __asm __volatile("sti");
890 }
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891 }
892}
893
894/*
895 * Clear registers on exec
896 */
897void
898setregs(p, entry, stack, ps_strings)
899 struct proc *p;
900 u_long entry;
901 u_long stack;
902 u_long ps_strings;
903{
904 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 905 struct pcb *pcb = p->p_thread->td_pcb;
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906
907 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
908 pcb->pcb_gs = _udatasel;
909 load_gs(_udatasel);
910
911#ifdef USER_LDT
912 /* was i386_user_cleanup() in NetBSD */
913 user_ldt_free(pcb);
914#endif
915
916 bzero((char *)regs, sizeof(struct trapframe));
917 regs->tf_eip = entry;
918 regs->tf_esp = stack;
919 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
920 regs->tf_ss = _udatasel;
921 regs->tf_ds = _udatasel;
922 regs->tf_es = _udatasel;
923 regs->tf_fs = _udatasel;
924 regs->tf_cs = _ucodesel;
925
926 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
927 regs->tf_ebx = ps_strings;
928
929 /*
930 * Reset the hardware debug registers if they were in use.
931 * They won't have any meaning for the newly exec'd process.
932 */
933 if (pcb->pcb_flags & PCB_DBREGS) {
934 pcb->pcb_dr0 = 0;
935 pcb->pcb_dr1 = 0;
936 pcb->pcb_dr2 = 0;
937 pcb->pcb_dr3 = 0;
938 pcb->pcb_dr6 = 0;
939 pcb->pcb_dr7 = 0;
b7c628e4 940 if (pcb == curthread->td_pcb) {
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941 /*
942 * Clear the debug registers on the running
943 * CPU, otherwise they will end up affecting
944 * the next process we switch to.
945 */
946 reset_dbregs();
947 }
948 pcb->pcb_flags &= ~PCB_DBREGS;
949 }
950
951 /*
952 * Initialize the math emulator (if any) for the current process.
953 * Actually, just clear the bit that says that the emulator has
954 * been initialized. Initialization is delayed until the process
955 * traps to the emulator (if it is done at all) mainly because
956 * emulators don't provide an entry point for initialization.
957 */
b7c628e4 958 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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959
960 /*
961 * Arrange to trap the next npx or `fwait' instruction (see npx.c
962 * for why fwait must be trapped at least if there is an npx or an
963 * emulator). This is mainly to handle the case where npx0 is not
964 * configured, since the npx routines normally set up the trap
965 * otherwise. It should be done only at boot time, but doing it
966 * here allows modifying `npx_exists' for testing the emulator on
967 * systems with an npx.
968 */
969 load_cr0(rcr0() | CR0_MP | CR0_TS);
970
971#if NNPX > 0
972 /* Initialize the npx (if any) for the current process. */
973 npxinit(__INITIAL_NPXCW__);
974#endif
975
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976 /*
977 * note: linux emulator needs edx to be 0x0 on entry, which is
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978 * handled in execve simply by setting the 64 bit syscall
979 * return value to 0.
90b9818c 980 */
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981}
982
983void
984cpu_setregs(void)
985{
986 unsigned int cr0;
987
988 cr0 = rcr0();
989 cr0 |= CR0_NE; /* Done by npxinit() */
990 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
991#ifdef I386_CPU
992 if (cpu_class != CPUCLASS_386)
993#endif
994 cr0 |= CR0_WP | CR0_AM;
995 load_cr0(cr0);
996 load_gs(_udatasel);
997}
998
999static int
1000sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1001{
1002 int error;
1003 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1004 req);
1005 if (!error && req->newptr)
1006 resettodr();
1007 return (error);
1008}
1009
1010SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1011 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1012
1013SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1014 CTLFLAG_RW, &disable_rtc_set, 0, "");
1015
1016SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1017 CTLFLAG_RD, &bootinfo, bootinfo, "");
1018
1019SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1020 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1021
1022extern u_long bootdev; /* not a dev_t - encoding is different */
1023SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1024 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1025
1026/*
1027 * Initialize 386 and configure to run kernel
1028 */
1029
1030/*
1031 * Initialize segments & interrupt table
1032 */
1033
1034int _default_ldt;
1035union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1036static struct gate_descriptor idt0[NIDT];
1037struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1038union descriptor ldt[NLDT]; /* local descriptor table */
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MD
1039
1040/* table descriptors - used to load tables by cpu */
984263bc 1041struct region_descriptor r_gdt, r_idt;
984263bc 1042
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MD
1043#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1044extern int has_f00f_bug;
1045#endif
1046
1047static struct i386tss dblfault_tss;
1048static char dblfault_stack[PAGE_SIZE];
1049
1050extern struct user *proc0paddr;
1051
1052
1053/* software prototypes -- in more palatable form */
1054struct soft_segment_descriptor gdt_segs[] = {
1055/* GNULL_SEL 0 Null Descriptor */
1056{ 0x0, /* segment base address */
1057 0x0, /* length */
1058 0, /* segment type */
1059 0, /* segment descriptor priority level */
1060 0, /* segment descriptor present */
1061 0, 0,
1062 0, /* default 32 vs 16 bit size */
1063 0 /* limit granularity (byte/page units)*/ },
1064/* GCODE_SEL 1 Code Descriptor for kernel */
1065{ 0x0, /* segment base address */
1066 0xfffff, /* length - all address space */
1067 SDT_MEMERA, /* segment type */
1068 0, /* segment descriptor priority level */
1069 1, /* segment descriptor present */
1070 0, 0,
1071 1, /* default 32 vs 16 bit size */
1072 1 /* limit granularity (byte/page units)*/ },
1073/* GDATA_SEL 2 Data Descriptor for kernel */
1074{ 0x0, /* segment base address */
1075 0xfffff, /* length - all address space */
1076 SDT_MEMRWA, /* segment type */
1077 0, /* segment descriptor priority level */
1078 1, /* segment descriptor present */
1079 0, 0,
1080 1, /* default 32 vs 16 bit size */
1081 1 /* limit granularity (byte/page units)*/ },
1082/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1083{ 0x0, /* segment base address */
1084 0xfffff, /* length - all address space */
1085 SDT_MEMRWA, /* segment type */
1086 0, /* segment descriptor priority level */
1087 1, /* segment descriptor present */
1088 0, 0,
1089 1, /* default 32 vs 16 bit size */
1090 1 /* limit granularity (byte/page units)*/ },
1091/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1092{
1093 0x0, /* segment base address */
1094 sizeof(struct i386tss)-1,/* length - all address space */
1095 SDT_SYS386TSS, /* segment type */
1096 0, /* segment descriptor priority level */
1097 1, /* segment descriptor present */
1098 0, 0,
1099 0, /* unused - default 32 vs 16 bit size */
1100 0 /* limit granularity (byte/page units)*/ },
1101/* GLDT_SEL 5 LDT Descriptor */
1102{ (int) ldt, /* segment base address */
1103 sizeof(ldt)-1, /* length - all address space */
1104 SDT_SYSLDT, /* segment type */
1105 SEL_UPL, /* segment descriptor priority level */
1106 1, /* segment descriptor present */
1107 0, 0,
1108 0, /* unused - default 32 vs 16 bit size */
1109 0 /* limit granularity (byte/page units)*/ },
1110/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1111{ (int) ldt, /* segment base address */
1112 (512 * sizeof(union descriptor)-1), /* length */
1113 SDT_SYSLDT, /* segment type */
1114 0, /* segment descriptor priority level */
1115 1, /* segment descriptor present */
1116 0, 0,
1117 0, /* unused - default 32 vs 16 bit size */
1118 0 /* limit granularity (byte/page units)*/ },
1119/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1120{ 0x0, /* segment base address */
1121 0x0, /* length - all address space */
1122 0, /* segment type */
1123 0, /* segment descriptor priority level */
1124 0, /* segment descriptor present */
1125 0, 0,
1126 0, /* default 32 vs 16 bit size */
1127 0 /* limit granularity (byte/page units)*/ },
1128/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1129{ 0x400, /* segment base address */
1130 0xfffff, /* length */
1131 SDT_MEMRWA, /* segment type */
1132 0, /* segment descriptor priority level */
1133 1, /* segment descriptor present */
1134 0, 0,
1135 1, /* default 32 vs 16 bit size */
1136 1 /* limit granularity (byte/page units)*/ },
1137/* GPANIC_SEL 9 Panic Tss Descriptor */
1138{ (int) &dblfault_tss, /* segment base address */
1139 sizeof(struct i386tss)-1,/* length - all address space */
1140 SDT_SYS386TSS, /* segment type */
1141 0, /* segment descriptor priority level */
1142 1, /* segment descriptor present */
1143 0, 0,
1144 0, /* unused - default 32 vs 16 bit size */
1145 0 /* limit granularity (byte/page units)*/ },
1146/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1147{ 0, /* segment base address (overwritten) */
1148 0xfffff, /* length */
1149 SDT_MEMERA, /* segment type */
1150 0, /* segment descriptor priority level */
1151 1, /* segment descriptor present */
1152 0, 0,
1153 0, /* default 32 vs 16 bit size */
1154 1 /* limit granularity (byte/page units)*/ },
1155/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1156{ 0, /* segment base address (overwritten) */
1157 0xfffff, /* length */
1158 SDT_MEMERA, /* segment type */
1159 0, /* segment descriptor priority level */
1160 1, /* segment descriptor present */
1161 0, 0,
1162 0, /* default 32 vs 16 bit size */
1163 1 /* limit granularity (byte/page units)*/ },
1164/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1165{ 0, /* segment base address (overwritten) */
1166 0xfffff, /* length */
1167 SDT_MEMRWA, /* segment type */
1168 0, /* segment descriptor priority level */
1169 1, /* segment descriptor present */
1170 0, 0,
1171 1, /* default 32 vs 16 bit size */
1172 1 /* limit granularity (byte/page units)*/ },
1173/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1174{ 0, /* segment base address (overwritten) */
1175 0xfffff, /* length */
1176 SDT_MEMRWA, /* segment type */
1177 0, /* segment descriptor priority level */
1178 1, /* segment descriptor present */
1179 0, 0,
1180 0, /* default 32 vs 16 bit size */
1181 1 /* limit granularity (byte/page units)*/ },
1182/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1183{ 0, /* segment base address (overwritten) */
1184 0xfffff, /* length */
1185 SDT_MEMRWA, /* segment type */
1186 0, /* segment descriptor priority level */
1187 1, /* segment descriptor present */
1188 0, 0,
1189 0, /* default 32 vs 16 bit size */
1190 1 /* limit granularity (byte/page units)*/ },
1191};
1192
1193static struct soft_segment_descriptor ldt_segs[] = {
1194 /* Null Descriptor - overwritten by call gate */
1195{ 0x0, /* segment base address */
1196 0x0, /* length - all address space */
1197 0, /* segment type */
1198 0, /* segment descriptor priority level */
1199 0, /* segment descriptor present */
1200 0, 0,
1201 0, /* default 32 vs 16 bit size */
1202 0 /* limit granularity (byte/page units)*/ },
1203 /* Null Descriptor - overwritten by call gate */
1204{ 0x0, /* segment base address */
1205 0x0, /* length - all address space */
1206 0, /* segment type */
1207 0, /* segment descriptor priority level */
1208 0, /* segment descriptor present */
1209 0, 0,
1210 0, /* default 32 vs 16 bit size */
1211 0 /* limit granularity (byte/page units)*/ },
1212 /* Null Descriptor - overwritten by call gate */
1213{ 0x0, /* segment base address */
1214 0x0, /* length - all address space */
1215 0, /* segment type */
1216 0, /* segment descriptor priority level */
1217 0, /* segment descriptor present */
1218 0, 0,
1219 0, /* default 32 vs 16 bit size */
1220 0 /* limit granularity (byte/page units)*/ },
1221 /* Code Descriptor for user */
1222{ 0x0, /* segment base address */
1223 0xfffff, /* length - all address space */
1224 SDT_MEMERA, /* segment type */
1225 SEL_UPL, /* segment descriptor priority level */
1226 1, /* segment descriptor present */
1227 0, 0,
1228 1, /* default 32 vs 16 bit size */
1229 1 /* limit granularity (byte/page units)*/ },
1230 /* Null Descriptor - overwritten by call gate */
1231{ 0x0, /* segment base address */
1232 0x0, /* length - all address space */
1233 0, /* segment type */
1234 0, /* segment descriptor priority level */
1235 0, /* segment descriptor present */
1236 0, 0,
1237 0, /* default 32 vs 16 bit size */
1238 0 /* limit granularity (byte/page units)*/ },
1239 /* Data Descriptor for user */
1240{ 0x0, /* segment base address */
1241 0xfffff, /* length - all address space */
1242 SDT_MEMRWA, /* segment type */
1243 SEL_UPL, /* segment descriptor priority level */
1244 1, /* segment descriptor present */
1245 0, 0,
1246 1, /* default 32 vs 16 bit size */
1247 1 /* limit granularity (byte/page units)*/ },
1248};
1249
1250void
1251setidt(idx, func, typ, dpl, selec)
1252 int idx;
1253 inthand_t *func;
1254 int typ;
1255 int dpl;
1256 int selec;
1257{
1258 struct gate_descriptor *ip;
1259
1260 ip = idt + idx;
1261 ip->gd_looffset = (int)func;
1262 ip->gd_selector = selec;
1263 ip->gd_stkcpy = 0;
1264 ip->gd_xx = 0;
1265 ip->gd_type = typ;
1266 ip->gd_dpl = dpl;
1267 ip->gd_p = 1;
1268 ip->gd_hioffset = ((int)func)>>16 ;
1269}
1270
1271#define IDTVEC(name) __CONCAT(X,name)
1272
1273extern inthand_t
1274 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1275 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1276 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1277 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1278 IDTVEC(xmm), IDTVEC(syscall),
1279 IDTVEC(rsvd0);
a64ba182
MD
1280extern inthand_t
1281 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1282
f7bc9806
MD
1283#ifdef DEBUG_INTERRUPTS
1284extern inthand_t *Xrsvdary[256];
1285#endif
1286
984263bc
MD
1287void
1288sdtossd(sd, ssd)
1289 struct segment_descriptor *sd;
1290 struct soft_segment_descriptor *ssd;
1291{
1292 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1293 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1294 ssd->ssd_type = sd->sd_type;
1295 ssd->ssd_dpl = sd->sd_dpl;
1296 ssd->ssd_p = sd->sd_p;
1297 ssd->ssd_def32 = sd->sd_def32;
1298 ssd->ssd_gran = sd->sd_gran;
1299}
1300
1301#define PHYSMAP_SIZE (2 * 8)
1302
1303/*
1304 * Populate the (physmap) array with base/bound pairs describing the
1305 * available physical memory in the system, then test this memory and
1306 * build the phys_avail array describing the actually-available memory.
1307 *
1308 * If we cannot accurately determine the physical memory map, then use
1309 * value from the 0xE801 call, and failing that, the RTC.
1310 *
1311 * Total memory size may be set by the kernel environment variable
1312 * hw.physmem or the compile-time define MAXMEM.
1313 */
1314static void
1315getmemsize(int first)
1316{
1317 int i, physmap_idx, pa_indx;
1318 int hasbrokenint12;
1319 u_int basemem, extmem;
1320 struct vm86frame vmf;
1321 struct vm86context vmc;
1322 vm_offset_t pa, physmap[PHYSMAP_SIZE];
b5b32410 1323 pt_entry_t *pte;
984263bc
MD
1324 const char *cp;
1325 struct {
1326 u_int64_t base;
1327 u_int64_t length;
1328 u_int32_t type;
1329 } *smap;
1330
1331 hasbrokenint12 = 0;
1332 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1333 bzero(&vmf, sizeof(struct vm86frame));
1334 bzero(physmap, sizeof(physmap));
1335 basemem = 0;
1336
1337 /*
1338 * Some newer BIOSes has broken INT 12H implementation which cause
1339 * kernel panic immediately. In this case, we need to scan SMAP
1340 * with INT 15:E820 first, then determine base memory size.
1341 */
1342 if (hasbrokenint12) {
1343 goto int15e820;
1344 }
1345
1346 /*
1347 * Perform "base memory" related probes & setup
1348 */
1349 vm86_intcall(0x12, &vmf);
1350 basemem = vmf.vmf_ax;
1351 if (basemem > 640) {
1352 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1353 basemem);
1354 basemem = 640;
1355 }
1356
1357 /*
1358 * XXX if biosbasemem is now < 640, there is a `hole'
1359 * between the end of base memory and the start of
1360 * ISA memory. The hole may be empty or it may
1361 * contain BIOS code or data. Map it read/write so
1362 * that the BIOS can write to it. (Memory from 0 to
1363 * the physical end of the kernel is mapped read-only
1364 * to begin with and then parts of it are remapped.
1365 * The parts that aren't remapped form holes that
1366 * remain read-only and are unused by the kernel.
1367 * The base memory area is below the physical end of
1368 * the kernel and right now forms a read-only hole.
1369 * The part of it from PAGE_SIZE to
1370 * (trunc_page(biosbasemem * 1024) - 1) will be
1371 * remapped and used by the kernel later.)
1372 *
1373 * This code is similar to the code used in
1374 * pmap_mapdev, but since no memory needs to be
1375 * allocated we simply change the mapping.
1376 */
1377 for (pa = trunc_page(basemem * 1024);
1378 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1379 pte = vtopte(pa + KERNBASE);
984263bc
MD
1380 *pte = pa | PG_RW | PG_V;
1381 }
1382
1383 /*
1384 * if basemem != 640, map pages r/w into vm86 page table so
1385 * that the bios can scribble on it.
1386 */
b5b32410 1387 pte = vm86paddr;
984263bc
MD
1388 for (i = basemem / 4; i < 160; i++)
1389 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1390
1391int15e820:
1392 /*
1393 * map page 1 R/W into the kernel page table so we can use it
1394 * as a buffer. The kernel will unmap this page later.
1395 */
b5b32410 1396 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1397 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1398
1399 /*
1400 * get memory map with INT 15:E820
1401 */
1402#define SMAPSIZ sizeof(*smap)
1403#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1404
1405 vmc.npages = 0;
1406 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1407 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1408
1409 physmap_idx = 0;
1410 vmf.vmf_ebx = 0;
1411 do {
1412 vmf.vmf_eax = 0xE820;
1413 vmf.vmf_edx = SMAP_SIG;
1414 vmf.vmf_ecx = SMAPSIZ;
1415 i = vm86_datacall(0x15, &vmf, &vmc);
1416 if (i || vmf.vmf_eax != SMAP_SIG)
1417 break;
1418 if (boothowto & RB_VERBOSE)
1419 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1420 smap->type,
1421 *(u_int32_t *)((char *)&smap->base + 4),
1422 (u_int32_t)smap->base,
1423 *(u_int32_t *)((char *)&smap->length + 4),
1424 (u_int32_t)smap->length);
1425
1426 if (smap->type != 0x01)
1427 goto next_run;
1428
1429 if (smap->length == 0)
1430 goto next_run;
1431
1432 if (smap->base >= 0xffffffff) {
1433 printf("%uK of memory above 4GB ignored\n",
1434 (u_int)(smap->length / 1024));
1435 goto next_run;
1436 }
1437
1438 for (i = 0; i <= physmap_idx; i += 2) {
1439 if (smap->base < physmap[i + 1]) {
1440 if (boothowto & RB_VERBOSE)
1441 printf(
1442 "Overlapping or non-montonic memory region, ignoring second region\n");
1443 goto next_run;
1444 }
1445 }
1446
1447 if (smap->base == physmap[physmap_idx + 1]) {
1448 physmap[physmap_idx + 1] += smap->length;
1449 goto next_run;
1450 }
1451
1452 physmap_idx += 2;
1453 if (physmap_idx == PHYSMAP_SIZE) {
1454 printf(
1455 "Too many segments in the physical address map, giving up\n");
1456 break;
1457 }
1458 physmap[physmap_idx] = smap->base;
1459 physmap[physmap_idx + 1] = smap->base + smap->length;
1460next_run:
6b08710e 1461 ; /* fix GCC3.x warning */
984263bc
MD
1462 } while (vmf.vmf_ebx != 0);
1463
1464 /*
1465 * Perform "base memory" related probes & setup based on SMAP
1466 */
1467 if (basemem == 0) {
1468 for (i = 0; i <= physmap_idx; i += 2) {
1469 if (physmap[i] == 0x00000000) {
1470 basemem = physmap[i + 1] / 1024;
1471 break;
1472 }
1473 }
1474
1475 if (basemem == 0) {
1476 basemem = 640;
1477 }
1478
1479 if (basemem > 640) {
1480 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1481 basemem);
1482 basemem = 640;
1483 }
1484
1485 for (pa = trunc_page(basemem * 1024);
1486 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1487 pte = vtopte(pa + KERNBASE);
984263bc
MD
1488 *pte = pa | PG_RW | PG_V;
1489 }
1490
b5b32410 1491 pte = vm86paddr;
984263bc
MD
1492 for (i = basemem / 4; i < 160; i++)
1493 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1494 }
1495
1496 if (physmap[1] != 0)
1497 goto physmap_done;
1498
1499 /*
1500 * If we failed above, try memory map with INT 15:E801
1501 */
1502 vmf.vmf_ax = 0xE801;
1503 if (vm86_intcall(0x15, &vmf) == 0) {
1504 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1505 } else {
1506#if 0
1507 vmf.vmf_ah = 0x88;
1508 vm86_intcall(0x15, &vmf);
1509 extmem = vmf.vmf_ax;
1510#else
1511 /*
1512 * Prefer the RTC value for extended memory.
1513 */
1514 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1515#endif
1516 }
1517
1518 /*
1519 * Special hack for chipsets that still remap the 384k hole when
1520 * there's 16MB of memory - this really confuses people that
1521 * are trying to use bus mastering ISA controllers with the
1522 * "16MB limit"; they only have 16MB, but the remapping puts
1523 * them beyond the limit.
1524 *
1525 * If extended memory is between 15-16MB (16-17MB phys address range),
1526 * chop it to 15MB.
1527 */
1528 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1529 extmem = 15 * 1024;
1530
1531 physmap[0] = 0;
1532 physmap[1] = basemem * 1024;
1533 physmap_idx = 2;
1534 physmap[physmap_idx] = 0x100000;
1535 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1536
1537physmap_done:
1538 /*
1539 * Now, physmap contains a map of physical memory.
1540 */
1541
1542#ifdef SMP
17a9f566 1543 /* make hole for AP bootstrap code YYY */
984263bc
MD
1544 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1545
1546 /* look for the MP hardware - needed for apic addresses */
1547 mp_probe();
1548#endif
1549
1550 /*
1551 * Maxmem isn't the "maximum memory", it's one larger than the
1552 * highest page of the physical address space. It should be
1553 * called something like "Maxphyspage". We may adjust this
1554 * based on ``hw.physmem'' and the results of the memory test.
1555 */
1556 Maxmem = atop(physmap[physmap_idx + 1]);
1557
1558#ifdef MAXMEM
1559 Maxmem = MAXMEM / 4;
1560#endif
1561
1562 /*
eb7d35b8 1563 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1564 * for the appropriate modifiers. This overrides MAXMEM.
1565 */
1566 if ((cp = getenv("hw.physmem")) != NULL) {
1567 u_int64_t AllowMem, sanity;
1568 char *ep;
1569
1570 sanity = AllowMem = strtouq(cp, &ep, 0);
1571 if ((ep != cp) && (*ep != 0)) {
1572 switch(*ep) {
1573 case 'g':
1574 case 'G':
1575 AllowMem <<= 10;
1576 case 'm':
1577 case 'M':
1578 AllowMem <<= 10;
1579 case 'k':
1580 case 'K':
1581 AllowMem <<= 10;
1582 break;
1583 default:
1584 AllowMem = sanity = 0;
1585 }
1586 if (AllowMem < sanity)
1587 AllowMem = 0;
1588 }
1589 if (AllowMem == 0)
1590 printf("Ignoring invalid memory size of '%s'\n", cp);
1591 else
1592 Maxmem = atop(AllowMem);
1593 }
1594
1595 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1596 (boothowto & RB_VERBOSE))
6ef943a3 1597 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1598
1599 /*
1600 * If Maxmem has been increased beyond what the system has detected,
1601 * extend the last memory segment to the new limit.
1602 */
1603 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1604 physmap[physmap_idx + 1] = ptoa(Maxmem);
1605
1606 /* call pmap initialization to make new kernel address space */
1607 pmap_bootstrap(first, 0);
1608
1609 /*
1610 * Size up each available chunk of physical memory.
1611 */
1612 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1613 pa_indx = 0;
1614 phys_avail[pa_indx++] = physmap[0];
1615 phys_avail[pa_indx] = physmap[0];
b5b32410 1616 pte = CMAP1;
984263bc
MD
1617
1618 /*
1619 * physmap is in bytes, so when converting to page boundaries,
1620 * round up the start address and round down the end address.
1621 */
1622 for (i = 0; i <= physmap_idx; i += 2) {
1623 vm_offset_t end;
1624
1625 end = ptoa(Maxmem);
1626 if (physmap[i + 1] < end)
1627 end = trunc_page(physmap[i + 1]);
1628 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1629 int tmp, page_bad;
1630#if 0
1631 int *ptr = 0;
1632#else
1633 int *ptr = (int *)CADDR1;
1634#endif
1635
1636 /*
1637 * block out kernel memory as not available.
1638 */
1639 if (pa >= 0x100000 && pa < first)
1640 continue;
1641
1642 page_bad = FALSE;
1643
1644 /*
1645 * map page into kernel: valid, read/write,non-cacheable
1646 */
1647 *pte = pa | PG_V | PG_RW | PG_N;
1648 invltlb();
1649
1650 tmp = *(int *)ptr;
1651 /*
1652 * Test for alternating 1's and 0's
1653 */
1654 *(volatile int *)ptr = 0xaaaaaaaa;
1655 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1656 page_bad = TRUE;
1657 }
1658 /*
1659 * Test for alternating 0's and 1's
1660 */
1661 *(volatile int *)ptr = 0x55555555;
1662 if (*(volatile int *)ptr != 0x55555555) {
1663 page_bad = TRUE;
1664 }
1665 /*
1666 * Test for all 1's
1667 */
1668 *(volatile int *)ptr = 0xffffffff;
1669 if (*(volatile int *)ptr != 0xffffffff) {
1670 page_bad = TRUE;
1671 }
1672 /*
1673 * Test for all 0's
1674 */
1675 *(volatile int *)ptr = 0x0;
1676 if (*(volatile int *)ptr != 0x0) {
1677 page_bad = TRUE;
1678 }
1679 /*
1680 * Restore original value.
1681 */
1682 *(int *)ptr = tmp;
1683
1684 /*
1685 * Adjust array of valid/good pages.
1686 */
1687 if (page_bad == TRUE) {
1688 continue;
1689 }
1690 /*
1691 * If this good page is a continuation of the
1692 * previous set of good pages, then just increase
1693 * the end pointer. Otherwise start a new chunk.
1694 * Note that "end" points one higher than end,
1695 * making the range >= start and < end.
1696 * If we're also doing a speculative memory
1697 * test and we at or past the end, bump up Maxmem
1698 * so that we keep going. The first bad page
1699 * will terminate the loop.
1700 */
1701 if (phys_avail[pa_indx] == pa) {
1702 phys_avail[pa_indx] += PAGE_SIZE;
1703 } else {
1704 pa_indx++;
1705 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1706 printf("Too many holes in the physical address space, giving up\n");
1707 pa_indx--;
1708 break;
1709 }
1710 phys_avail[pa_indx++] = pa; /* start */
1711 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1712 }
1713 physmem++;
1714 }
1715 }
1716 *pte = 0;
1717 invltlb();
1718
1719 /*
1720 * XXX
1721 * The last chunk must contain at least one page plus the message
1722 * buffer to avoid complicating other code (message buffer address
1723 * calculation, etc.).
1724 */
1725 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1726 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1727 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1728 phys_avail[pa_indx--] = 0;
1729 phys_avail[pa_indx--] = 0;
1730 }
1731
1732 Maxmem = atop(phys_avail[pa_indx]);
1733
1734 /* Trim off space for the message buffer. */
1735 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1736
1737 avail_end = phys_avail[pa_indx];
1738}
1739
f7bc9806
MD
1740/*
1741 * IDT VECTORS:
1742 * 0 Divide by zero
1743 * 1 Debug
1744 * 2 NMI
1745 * 3 BreakPoint
1746 * 4 OverFlow
1747 * 5 Bound-Range
1748 * 6 Invalid OpCode
1749 * 7 Device Not Available (x87)
1750 * 8 Double-Fault
1751 * 9 Coprocessor Segment overrun (unsupported, reserved)
1752 * 10 Invalid-TSS
1753 * 11 Segment not present
1754 * 12 Stack
1755 * 13 General Protection
1756 * 14 Page Fault
1757 * 15 Reserved
1758 * 16 x87 FP Exception pending
1759 * 17 Alignment Check
1760 * 18 Machine Check
1761 * 19 SIMD floating point
1762 * 20-31 reserved
1763 * 32-255 INTn/external sources
1764 */
984263bc 1765void
17a9f566 1766init386(int first)
984263bc
MD
1767{
1768 struct gate_descriptor *gdp;
1769 int gsel_tss, metadata_missing, off, x;
85100692 1770 struct mdglobaldata *gd;
984263bc
MD
1771
1772 /*
1773 * Prevent lowering of the ipl if we call tsleep() early.
1774 */
85100692 1775 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1776 bzero(gd, sizeof(*gd));
984263bc 1777
85100692 1778 gd->mi.gd_curthread = &thread0;
984263bc
MD
1779
1780 atdevbase = ISA_HOLE_START + KERNBASE;
1781
1782 metadata_missing = 0;
1783 if (bootinfo.bi_modulep) {
1784 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1785 preload_bootstrap_relocate(KERNBASE);
1786 } else {
1787 metadata_missing = 1;
1788 }
1789 if (bootinfo.bi_envp)
1790 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1791
4e8e646b
MD
1792 /* start with one cpu */
1793 ncpus = 1;
984263bc
MD
1794 /* Init basic tunables, hz etc */
1795 init_param1();
1796
1797 /*
1798 * make gdt memory segments, the code segment goes up to end of the
1799 * page with etext in it, the data segment goes to the end of
1800 * the address space
1801 */
1802 /*
1803 * XXX text protection is temporarily (?) disabled. The limit was
1804 * i386_btop(round_page(etext)) - 1.
1805 */
1806 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1807 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1808
984263bc
MD
1809 gdt_segs[GPRIV_SEL].ssd_limit =
1810 atop(sizeof(struct privatespace) - 1);
8ad65e08 1811 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1812 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1813 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1814
85100692 1815 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1816
84b592ba
MD
1817 /*
1818 * Note: on both UP and SMP curthread must be set non-NULL
1819 * early in the boot sequence because the system assumes
1820 * that 'curthread' is never NULL.
1821 */
984263bc
MD
1822
1823 for (x = 0; x < NGDT; x++) {
1824#ifdef BDE_DEBUGGER
1825 /* avoid overwriting db entries with APM ones */
1826 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1827 continue;
1828#endif
1829 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1830 }
1831
1832 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1833 r_gdt.rd_base = (int) gdt;
1834 lgdt(&r_gdt);
1835
73e4f7b9
MD
1836 mi_gdinit(&gd->mi, 0);
1837 cpu_gdinit(gd, 0);
1838 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1839 lwkt_set_comm(&thread0, "thread0");
1840 proc0.p_addr = (void *)thread0.td_kstack;
1841 proc0.p_thread = &thread0;
a2a5ad0d 1842 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
98a7f915 1843 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1844 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1845 thread0.td_proc = &proc0;
1846 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1847 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1848
984263bc
MD
1849 /* make ldt memory segments */
1850 /*
1851 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1852 * should be spelled ...MAX_USER...
1853 */
1854 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1855 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1856 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1857 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1858
1859 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1860 lldt(_default_ldt);
1861#ifdef USER_LDT
17a9f566 1862 gd->gd_currentldt = _default_ldt;
984263bc 1863#endif
8a8d5d85
MD
1864 /* spinlocks and the BGL */
1865 init_locks();
984263bc
MD
1866
1867 /* exceptions */
f7bc9806
MD
1868 for (x = 0; x < NIDT; x++) {
1869#ifdef DEBUG_INTERRUPTS
1870 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1871#else
1872 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1873#endif
1874 }
984263bc
MD
1875 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1876 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1877 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1878 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1879 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1880 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1881 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1882 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1883 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1884 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1885 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1886 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1887 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1888 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1889 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1890 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1891 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1892 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1893 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1894 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1895 setidt(0x80, &IDTVEC(int0x80_syscall),
1896 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1897 setidt(0x81, &IDTVEC(int0x81_syscall),
1898 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1899
1900 r_idt.rd_limit = sizeof(idt0) - 1;
1901 r_idt.rd_base = (int) idt;
1902 lidt(&r_idt);
1903
1904 /*
1905 * Initialize the console before we print anything out.
1906 */
1907 cninit();
1908
1909 if (metadata_missing)
1910 printf("WARNING: loader(8) metadata is missing!\n");
1911
984263bc
MD
1912#if NISA >0
1913 isa_defaultirq();
1914#endif
1915 rand_initialize();
1916
1917#ifdef DDB
1918 kdb_init();
1919 if (boothowto & RB_KDB)
1920 Debugger("Boot flags requested debugger");
1921#endif
1922
1923 finishidentcpu(); /* Final stage of CPU initialization */
1924 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1925 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1926 initializecpu(); /* Initialize CPU registers */
1927
b7c628e4
MD
1928 /*
1929 * make an initial tss so cpu can get interrupt stack on syscall!
1930 * The 16 bytes is to save room for a VM86 context.
1931 */
17a9f566
MD
1932 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1933 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1934 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1935 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1936 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1937 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1938 ltr(gsel_tss);
1939
1940 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1941 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1942 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1943 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1944 dblfault_tss.tss_cr3 = (int)IdlePTD;
1945 dblfault_tss.tss_eip = (int) dblfault_handler;
1946 dblfault_tss.tss_eflags = PSL_KERNEL;
1947 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1948 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1949 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1950 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1951 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1952
1953 vm86_initialize();
1954 getmemsize(first);
1955 init_param2(physmem);
1956
1957 /* now running on new page tables, configured,and u/iom is accessible */
1958
1959 /* Map the message buffer. */
1960 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1961 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1962
1963 msgbufinit(msgbufp, MSGBUF_SIZE);
1964
1965 /* make a call gate to reenter kernel with */
1966 gdp = &ldt[LSYS5CALLS_SEL].gd;
1967
1968 x = (int) &IDTVEC(syscall);
1969 gdp->gd_looffset = x++;
1970 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1971 gdp->gd_stkcpy = 1;
1972 gdp->gd_type = SDT_SYS386CGT;
1973 gdp->gd_dpl = SEL_UPL;
1974 gdp->gd_p = 1;
1975 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1976
1977 /* XXX does this work? */
1978 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1979 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1980
1981 /* transfer to user mode */
1982
1983 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1984 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1985
1986 /* setup proc 0's pcb */
b7c628e4
MD
1987 thread0.td_pcb->pcb_flags = 0;
1988 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 1989 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
1990 proc0.p_md.md_regs = &proc0_tf;
1991}
1992
8ad65e08 1993/*
17a9f566
MD
1994 * Initialize machine-dependant portions of the global data structure.
1995 * Note that the global data area and cpu0's idlestack in the private
1996 * data space were allocated in locore.
ef0fdad1
MD
1997 *
1998 * Note: the idlethread's cpl is 0
73e4f7b9
MD
1999 *
2000 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2001 */
2002void
85100692 2003cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
2004{
2005 char *sp;
8ad65e08 2006
7d0bac62 2007 if (cpu)
a2a5ad0d 2008 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2009
85100692 2010 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
2011 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
2012 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2013 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2014 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2015 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2016}
2017
12e4aaff
MD
2018struct globaldata *
2019globaldata_find(int cpu)
2020{
2021 KKASSERT(cpu >= 0 && cpu < ncpus);
2022 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2023}
2024
984263bc
MD
2025#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2026static void f00f_hack(void *unused);
2027SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2028
2029static void
17a9f566
MD
2030f00f_hack(void *unused)
2031{
984263bc 2032 struct gate_descriptor *new_idt;
984263bc
MD
2033 vm_offset_t tmp;
2034
2035 if (!has_f00f_bug)
2036 return;
2037
2038 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2039
2040 r_idt.rd_limit = sizeof(idt0) - 1;
2041
2042 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2043 if (tmp == 0)
2044 panic("kmem_alloc returned 0");
2045 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2046 panic("kmem_alloc returned non-page-aligned memory");
2047 /* Put the first seven entries in the lower page */
2048 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2049 bcopy(idt, new_idt, sizeof(idt0));
2050 r_idt.rd_base = (int)new_idt;
2051 lidt(&r_idt);
2052 idt = new_idt;
2053 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2054 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2055 panic("vm_map_protect failed");
2056 return;
2057}
2058#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2059
2060int
2061ptrace_set_pc(p, addr)
2062 struct proc *p;
2063 unsigned long addr;
2064{
2065 p->p_md.md_regs->tf_eip = addr;
2066 return (0);
2067}
2068
2069int
2070ptrace_single_step(p)
2071 struct proc *p;
2072{
2073 p->p_md.md_regs->tf_eflags |= PSL_T;
2074 return (0);
2075}
2076
2077int ptrace_read_u_check(p, addr, len)
2078 struct proc *p;
2079 vm_offset_t addr;
2080 size_t len;
2081{
2082 vm_offset_t gap;
2083
2084 if ((vm_offset_t) (addr + len) < addr)
2085 return EPERM;
2086 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2087 return 0;
2088
2089 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2090
2091 if ((vm_offset_t) addr < gap)
2092 return EPERM;
2093 if ((vm_offset_t) (addr + len) <=
2094 (vm_offset_t) (gap + sizeof(struct trapframe)))
2095 return 0;
2096 return EPERM;
2097}
2098
2099int ptrace_write_u(p, off, data)
2100 struct proc *p;
2101 vm_offset_t off;
2102 long data;
2103{
2104 struct trapframe frame_copy;
2105 vm_offset_t min;
2106 struct trapframe *tp;
2107
2108 /*
2109 * Privileged kernel state is scattered all over the user area.
2110 * Only allow write access to parts of regs and to fpregs.
2111 */
2112 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2113 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2114 tp = p->p_md.md_regs;
2115 frame_copy = *tp;
2116 *(int *)((char *)&frame_copy + (off - min)) = data;
2117 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2118 !CS_SECURE(frame_copy.tf_cs))
2119 return (EINVAL);
2120 *(int*)((char *)p->p_addr + off) = data;
2121 return (0);
2122 }
b7c628e4
MD
2123
2124 /*
2125 * The PCB is at the end of the user area YYY
2126 */
2127 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2128 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2129 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2130 *(int*)((char *)p->p_addr + off) = data;
2131 return (0);
2132 }
2133 return (EFAULT);
2134}
2135
2136int
2137fill_regs(p, regs)
2138 struct proc *p;
2139 struct reg *regs;
2140{
2141 struct pcb *pcb;
2142 struct trapframe *tp;
2143
2144 tp = p->p_md.md_regs;
2145 regs->r_fs = tp->tf_fs;
2146 regs->r_es = tp->tf_es;
2147 regs->r_ds = tp->tf_ds;
2148 regs->r_edi = tp->tf_edi;
2149 regs->r_esi = tp->tf_esi;
2150 regs->r_ebp = tp->tf_ebp;
2151 regs->r_ebx = tp->tf_ebx;
2152 regs->r_edx = tp->tf_edx;
2153 regs->r_ecx = tp->tf_ecx;
2154 regs->r_eax = tp->tf_eax;
2155 regs->r_eip = tp->tf_eip;
2156 regs->r_cs = tp->tf_cs;
2157 regs->r_eflags = tp->tf_eflags;
2158 regs->r_esp = tp->tf_esp;
2159 regs->r_ss = tp->tf_ss;
b7c628e4 2160 pcb = p->p_thread->td_pcb;
984263bc
MD
2161 regs->r_gs = pcb->pcb_gs;
2162 return (0);
2163}
2164
2165int
2166set_regs(p, regs)
2167 struct proc *p;
2168 struct reg *regs;
2169{
2170 struct pcb *pcb;
2171 struct trapframe *tp;
2172
2173 tp = p->p_md.md_regs;
2174 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2175 !CS_SECURE(regs->r_cs))
2176 return (EINVAL);
2177 tp->tf_fs = regs->r_fs;
2178 tp->tf_es = regs->r_es;
2179 tp->tf_ds = regs->r_ds;
2180 tp->tf_edi = regs->r_edi;
2181 tp->tf_esi = regs->r_esi;
2182 tp->tf_ebp = regs->r_ebp;
2183 tp->tf_ebx = regs->r_ebx;
2184 tp->tf_edx = regs->r_edx;
2185 tp->tf_ecx = regs->r_ecx;
2186 tp->tf_eax = regs->r_eax;
2187 tp->tf_eip = regs->r_eip;
2188 tp->tf_cs = regs->r_cs;
2189 tp->tf_eflags = regs->r_eflags;
2190 tp->tf_esp = regs->r_esp;
2191 tp->tf_ss = regs->r_ss;
b7c628e4 2192 pcb = p->p_thread->td_pcb;
984263bc
MD
2193 pcb->pcb_gs = regs->r_gs;
2194 return (0);
2195}
2196
642a6e88 2197#ifndef CPU_DISABLE_SSE
984263bc
MD
2198static void
2199fill_fpregs_xmm(sv_xmm, sv_87)
2200 struct savexmm *sv_xmm;
2201 struct save87 *sv_87;
2202{
c9faf524
RG
2203 struct env87 *penv_87 = &sv_87->sv_env;
2204 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2205 int i;
2206
2207 /* FPU control/status */
2208 penv_87->en_cw = penv_xmm->en_cw;
2209 penv_87->en_sw = penv_xmm->en_sw;
2210 penv_87->en_tw = penv_xmm->en_tw;
2211 penv_87->en_fip = penv_xmm->en_fip;
2212 penv_87->en_fcs = penv_xmm->en_fcs;
2213 penv_87->en_opcode = penv_xmm->en_opcode;
2214 penv_87->en_foo = penv_xmm->en_foo;
2215 penv_87->en_fos = penv_xmm->en_fos;
2216
2217 /* FPU registers */
2218 for (i = 0; i < 8; ++i)
2219 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2220
2221 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2222}
2223
2224static void
2225set_fpregs_xmm(sv_87, sv_xmm)
2226 struct save87 *sv_87;
2227 struct savexmm *sv_xmm;
2228{
c9faf524
RG
2229 struct env87 *penv_87 = &sv_87->sv_env;
2230 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2231 int i;
2232
2233 /* FPU control/status */
2234 penv_xmm->en_cw = penv_87->en_cw;
2235 penv_xmm->en_sw = penv_87->en_sw;
2236 penv_xmm->en_tw = penv_87->en_tw;
2237 penv_xmm->en_fip = penv_87->en_fip;
2238 penv_xmm->en_fcs = penv_87->en_fcs;
2239 penv_xmm->en_opcode = penv_87->en_opcode;
2240 penv_xmm->en_foo = penv_87->en_foo;
2241 penv_xmm->en_fos = penv_87->en_fos;
2242
2243 /* FPU registers */
2244 for (i = 0; i < 8; ++i)
2245 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2246
2247 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2248}
642a6e88 2249#endif /* CPU_DISABLE_SSE */
984263bc
MD
2250
2251int
2252fill_fpregs(p, fpregs)
2253 struct proc *p;
2254 struct fpreg *fpregs;
2255{
642a6e88 2256#ifndef CPU_DISABLE_SSE
984263bc 2257 if (cpu_fxsr) {
b7c628e4 2258 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2259 (struct save87 *)fpregs);
2260 return (0);
2261 }
642a6e88 2262#endif /* CPU_DISABLE_SSE */
b7c628e4 2263 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2264 return (0);
2265}
2266
2267int
2268set_fpregs(p, fpregs)
2269 struct proc *p;
2270 struct fpreg *fpregs;
2271{
642a6e88 2272#ifndef CPU_DISABLE_SSE
984263bc
MD
2273 if (cpu_fxsr) {
2274 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2275 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2276 return (0);
2277 }
642a6e88 2278#endif /* CPU_DISABLE_SSE */
b7c628e4 2279 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2280 return (0);
2281}
2282
2283int
2284fill_dbregs(p, dbregs)
2285 struct proc *p;
2286 struct dbreg *dbregs;
2287{
2288 struct pcb *pcb;
2289
2290 if (p == NULL) {
2291 dbregs->dr0 = rdr0();
2292 dbregs->dr1 = rdr1();
2293 dbregs->dr2 = rdr2();
2294 dbregs->dr3 = rdr3();
2295 dbregs->dr4 = rdr4();
2296 dbregs->dr5 = rdr5();
2297 dbregs->dr6 = rdr6();
2298 dbregs->dr7 = rdr7();
2299 }
2300 else {
b7c628e4 2301 pcb = p->p_thread->td_pcb;
984263bc
MD
2302 dbregs->dr0 = pcb->pcb_dr0;
2303 dbregs->dr1 = pcb->pcb_dr1;
2304 dbregs->dr2 = pcb->pcb_dr2;
2305 dbregs->dr3 = pcb->pcb_dr3;
2306 dbregs->dr4 = 0;
2307 dbregs->dr5 = 0;
2308 dbregs->dr6 = pcb->pcb_dr6;
2309 dbregs->dr7 = pcb->pcb_dr7;
2310 }
2311 return (0);
2312}
2313
2314int
2315set_dbregs(p, dbregs)
2316 struct proc *p;
2317 struct dbreg *dbregs;
2318{
2319 struct pcb *pcb;
2320 int i;
2321 u_int32_t mask1, mask2;
2322
2323 if (p == NULL) {
2324 load_dr0(dbregs->dr0);
2325 load_dr1(dbregs->dr1);
2326 load_dr2(dbregs->dr2);
2327 load_dr3(dbregs->dr3);
2328 load_dr4(dbregs->dr4);
2329 load_dr5(dbregs->dr5);
2330 load_dr6(dbregs->dr6);
2331 load_dr7(dbregs->dr7);
2332 }
2333 else {
2334 /*
2335 * Don't let an illegal value for dr7 get set. Specifically,
2336 * check for undefined settings. Setting these bit patterns
2337 * result in undefined behaviour and can lead to an unexpected
2338 * TRCTRAP.
2339 */
2340 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2341 i++, mask1 <<= 2, mask2 <<= 2)
2342 if ((dbregs->dr7 & mask1) == mask2)
2343 return (EINVAL);
2344
b7c628e4 2345 pcb = p->p_thread->td_pcb;
984263bc
MD
2346
2347 /*
2348 * Don't let a process set a breakpoint that is not within the
2349 * process's address space. If a process could do this, it
2350 * could halt the system by setting a breakpoint in the kernel
2351 * (if ddb was enabled). Thus, we need to check to make sure
2352 * that no breakpoints are being enabled for addresses outside
2353 * process's address space, unless, perhaps, we were called by
2354 * uid 0.
2355 *
2356 * XXX - what about when the watched area of the user's
2357 * address space is written into from within the kernel
2358 * ... wouldn't that still cause a breakpoint to be generated
2359 * from within kernel mode?
2360 */
2361
dadab5e9 2362 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2363 if (dbregs->dr7 & 0x3) {
2364 /* dr0 is enabled */
2365 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2366 return (EINVAL);
2367 }
2368
2369 if (dbregs->dr7 & (0x3<<2)) {
2370 /* dr1 is enabled */
2371 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2372 return (EINVAL);
2373 }
2374
2375 if (dbregs->dr7 & (0x3<<4)) {
2376 /* dr2 is enabled */
2377 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2378 return (EINVAL);
2379 }
2380
2381 if (dbregs->dr7 & (0x3<<6)) {
2382 /* dr3 is enabled */
2383 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2384 return (EINVAL);
2385 }
2386 }
2387
2388 pcb->pcb_dr0 = dbregs->dr0;
2389 pcb->pcb_dr1 = dbregs->dr1;
2390 pcb->pcb_dr2 = dbregs->dr2;
2391 pcb->pcb_dr3 = dbregs->dr3;
2392 pcb->pcb_dr6 = dbregs->dr6;
2393 pcb->pcb_dr7 = dbregs->dr7;
2394
2395 pcb->pcb_flags |= PCB_DBREGS;
2396 }
2397
2398 return (0);
2399}
2400
2401/*
2402 * Return > 0 if a hardware breakpoint has been hit, and the
2403 * breakpoint was in user space. Return 0, otherwise.
2404 */
2405int
2406user_dbreg_trap(void)
2407{
2408 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2409 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2410 int nbp; /* number of breakpoints that triggered */
2411 caddr_t addr[4]; /* breakpoint addresses */
2412 int i;
2413
2414 dr7 = rdr7();
2415 if ((dr7 & 0x000000ff) == 0) {
2416 /*
2417 * all GE and LE bits in the dr7 register are zero,
2418 * thus the trap couldn't have been caused by the
2419 * hardware debug registers
2420 */
2421 return 0;
2422 }
2423
2424 nbp = 0;
2425 dr6 = rdr6();
2426 bp = dr6 & 0x0000000f;
2427
2428 if (!bp) {
2429 /*
2430 * None of the breakpoint bits are set meaning this
2431 * trap was not caused by any of the debug registers
2432 */
2433 return 0;
2434 }
2435
2436 /*
2437 * at least one of the breakpoints were hit, check to see
2438 * which ones and if any of them are user space addresses
2439 */
2440
2441 if (bp & 0x01) {
2442 addr[nbp++] = (caddr_t)rdr0();
2443 }
2444 if (bp & 0x02) {
2445 addr[nbp++] = (caddr_t)rdr1();
2446 }
2447 if (bp & 0x04) {
2448 addr[nbp++] = (caddr_t)rdr2();
2449 }
2450 if (bp & 0x08) {
2451 addr[nbp++] = (caddr_t)rdr3();
2452 }
2453
2454 for (i=0; i<nbp; i++) {
2455 if (addr[i] <
2456 (caddr_t)VM_MAXUSER_ADDRESS) {
2457 /*
2458 * addr[i] is in user space
2459 */
2460 return nbp;
2461 }
2462 }
2463
2464 /*
2465 * None of the breakpoints are in user space.
2466 */
2467 return 0;
2468}
2469
2470
2471#ifndef DDB
2472void
2473Debugger(const char *msg)
2474{
2475 printf("Debugger(\"%s\") called.\n", msg);
2476}
2477#endif /* no DDB */
2478
2479#include <sys/disklabel.h>
2480
2481/*
2482 * Determine the size of the transfer, and make sure it is
2483 * within the boundaries of the partition. Adjust transfer
2484 * if needed, and signal errors or early completion.
2485 */
2486int
2487bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2488{
2489 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2490 int labelsect = lp->d_partitions[0].p_offset;
2491 int maxsz = p->p_size,
2492 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2493
2494 /* overwriting disk label ? */
2495 /* XXX should also protect bootstrap in first 8K */
2496 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2497#if LABELSECTOR != 0
2498 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2499#endif
2500 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2501 bp->b_error = EROFS;
2502 goto bad;
2503 }
2504
2505#if defined(DOSBBSECTOR) && defined(notyet)
2506 /* overwriting master boot record? */
2507 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2508 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2509 bp->b_error = EROFS;
2510 goto bad;
2511 }
2512#endif
2513
2514 /* beyond partition? */
2515 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2516 /* if exactly at end of disk, return an EOF */
2517 if (bp->b_blkno == maxsz) {
2518 bp->b_resid = bp->b_bcount;
2519 return(0);
2520 }
2521 /* or truncate if part of it fits */
2522 sz = maxsz - bp->b_blkno;
2523 if (sz <= 0) {
2524 bp->b_error = EINVAL;
2525 goto bad;
2526 }
2527 bp->b_bcount = sz << DEV_BSHIFT;
2528 }
2529
2530 bp->b_pblkno = bp->b_blkno + p->p_offset;
2531 return(1);
2532
2533bad:
2534 bp->b_flags |= B_ERROR;
2535 return(-1);
2536}
2537
2538#ifdef DDB
2539
2540/*
2541 * Provide inb() and outb() as functions. They are normally only
2542 * available as macros calling inlined functions, thus cannot be
2543 * called inside DDB.
2544 *
2545 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2546 */
2547
2548#undef inb
2549#undef outb
2550
2551/* silence compiler warnings */
2552u_char inb(u_int);
2553void outb(u_int, u_char);
2554
2555u_char
2556inb(u_int port)
2557{
2558 u_char data;
2559 /*
2560 * We use %%dx and not %1 here because i/o is done at %dx and not at
2561 * %edx, while gcc generates inferior code (movw instead of movl)
2562 * if we tell it to load (u_short) port.
2563 */
2564 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2565 return (data);
2566}
2567
2568void
2569outb(u_int port, u_char data)
2570{
2571 u_char al;
2572 /*
2573 * Use an unnecessary assignment to help gcc's register allocator.
2574 * This make a large difference for gcc-1.40 and a tiny difference
2575 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2576 * best results. gcc-2.6.0 can't handle this.
2577 */
2578 al = data;
2579 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2580}
2581
2582#endif /* DDB */
8a8d5d85
MD
2583
2584
2585
2586#include "opt_cpu.h"
2587#include "opt_htt.h"
2588#include "opt_user_ldt.h"
2589
2590
2591/*
2592 * initialize all the SMP locks
2593 */
2594
2595/* critical region around IO APIC, apic_imen */
2596struct spinlock imen_spinlock;
2597
2598/* Make FAST_INTR() routines sequential */
2599struct spinlock fast_intr_spinlock;
2600
2601/* critical region for old style disable_intr/enable_intr */
2602struct spinlock mpintr_spinlock;
2603
2604/* critical region around INTR() routines */
2605struct spinlock intr_spinlock;
2606
2607/* lock region used by kernel profiling */
2608struct spinlock mcount_spinlock;
2609
2610/* locks com (tty) data/hardware accesses: a FASTINTR() */
2611struct spinlock com_spinlock;
2612
2613/* locks kernel printfs */
2614struct spinlock cons_spinlock;
2615
2616/* lock regions around the clock hardware */
2617struct spinlock clock_spinlock;
2618
2619/* lock around the MP rendezvous */
2620struct spinlock smp_rv_spinlock;
2621
2622static void
2623init_locks(void)
2624{
2625 /*
2626 * mp_lock = 0; BSP already owns the MP lock
2627 */
2628 /*
2629 * Get the initial mp_lock with a count of 1 for the BSP.
2630 * This uses a LOGICAL cpu ID, ie BSP == 0.
2631 */
2632#ifdef SMP
2633 cpu_get_initial_mplock();
2634#endif
2635 spin_lock_init(&mcount_spinlock);
2636 spin_lock_init(&fast_intr_spinlock);
2637 spin_lock_init(&intr_spinlock);
2638 spin_lock_init(&mpintr_spinlock);
2639 spin_lock_init(&imen_spinlock);
2640 spin_lock_init(&smp_rv_spinlock);
2641 spin_lock_init(&com_spinlock);
2642 spin_lock_init(&clock_spinlock);
2643 spin_lock_init(&cons_spinlock);
2644}
2645