AMD64 - Enable floating point context switching
[dragonfly.git] / sys / platform / pc64 / amd64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
d7f50089 9 * All rights reserved.
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10 *
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
14 *
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15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
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18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
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21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 41 * SUCH DAMAGE.
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42 *
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
d7f50089 44 * $FreeBSD: src/sys/i386/i386/pmap.c,v 1.250.2.18 2002/03/06 22:48:53 silby Exp $
c8fe38ae 45 * $DragonFly: src/sys/platform/pc64/amd64/pmap.c,v 1.3 2008/08/29 17:07:10 dillon Exp $
d7f50089 46 */
c8fe38ae 47
d7f50089 48/*
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49 * Manages physical address maps.
50 *
51 * In addition to hardware address maps, this
52 * module is called upon to provide software-use-only
53 * maps which may or may not be stored in the same
54 * form as hardware maps. These pseudo-maps are
55 * used to store intermediate results from copy
56 * operations to and from address spaces.
57 *
58 * Since the information managed by this module is
59 * also stored by the logical address mapping module,
60 * this module may throw away valid virtual-to-physical
61 * mappings at almost any time. However, invalidations
62 * of virtual-to-physical mappings must be done as
63 * requested.
64 *
65 * In order to cope with hardware architectures which
66 * make virtual-to-physical map invalidates expensive,
67 * this module may delay invalidate or reduced protection
68 * operations until such time as they are actually
69 * necessary. This module is given full information as
70 * to which processors are currently using which maps,
71 * and to when physical maps must be made correct.
72 */
73
74#if JG
75#include "opt_disable_pse.h"
76#include "opt_pmap.h"
77#endif
78#include "opt_msgbuf.h"
d7f50089 79
c8fe38ae 80#include <sys/param.h>
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81#include <sys/systm.h>
82#include <sys/kernel.h>
d7f50089 83#include <sys/proc.h>
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84#include <sys/msgbuf.h>
85#include <sys/vmmeter.h>
86#include <sys/mman.h>
d7f50089 87
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88#include <vm/vm.h>
89#include <vm/vm_param.h>
90#include <sys/sysctl.h>
91#include <sys/lock.h>
d7f50089 92#include <vm/vm_kern.h>
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93#include <vm/vm_page.h>
94#include <vm/vm_map.h>
d7f50089 95#include <vm/vm_object.h>
c8fe38ae 96#include <vm/vm_extern.h>
d7f50089 97#include <vm/vm_pageout.h>
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98#include <vm/vm_pager.h>
99#include <vm/vm_zone.h>
100
101#include <sys/user.h>
102#include <sys/thread2.h>
103#include <sys/sysref2.h>
d7f50089 104
c8fe38ae 105#include <machine/cputypes.h>
d7f50089 106#include <machine/md_var.h>
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107#include <machine/specialreg.h>
108#include <machine/smp.h>
109#include <machine_base/apic/apicreg.h>
d7f50089 110#include <machine/globaldata.h>
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111#include <machine/pmap.h>
112#include <machine/pmap_inval.h>
113
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114#include <ddb/ddb.h>
115
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116#define PMAP_KEEP_PDIRS
117#ifndef PMAP_SHPGPERPROC
118#define PMAP_SHPGPERPROC 200
119#endif
120
121#if defined(DIAGNOSTIC)
122#define PMAP_DIAGNOSTIC
123#endif
124
125#define MINPV 2048
126
127#if !defined(PMAP_DIAGNOSTIC)
128#define PMAP_INLINE __inline
129#else
130#define PMAP_INLINE
131#endif
132
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133/* JGPMAP32 */
134#define PTDPTDI 0
135
136#define READY0
137#define READY1
138#define READY2
139#define READY3
140#define READY4
141#define READY5
142
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143/*
144 * Get PDEs and PTEs for user/kernel address space
145 */
48ffc236 146#if JGPMAP32
c8fe38ae 147#define pmap_pde(m, v) (&((m)->pm_pdir[(vm_offset_t)(v) >> PDRSHIFT]))
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148#endif
149static pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va);
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150#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
151
152#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
153#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
154#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
155#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
156#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
157
158
159/*
160 * Given a map and a machine independent protection code,
161 * convert to a vax protection code.
162 */
163#define pte_prot(m, p) \
164 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
165static int protection_codes[8];
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166
167struct pmap kernel_pmap;
c8fe38ae 168static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 169
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170vm_paddr_t avail_start; /* PA of first available physical page */
171vm_paddr_t avail_end; /* PA of last available physical page */
172vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
173vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
174vm_offset_t KvaStart; /* VA start of KVA space */
175vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
176vm_offset_t KvaSize; /* max size of kernel virtual address space */
177static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
178static int pgeflag; /* PG_G or-in */
179static int pseflag; /* PG_PS or-in */
d7f50089 180
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181static vm_object_t kptobj;
182
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183static int ndmpdp;
184static vm_paddr_t dmaplimit;
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185static int nkpt;
186vm_offset_t kernel_vm_end;
d7f50089 187
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188static uint64_t KPDphys; /* phys addr of kernel level 2 */
189uint64_t KPDPphys; /* phys addr of kernel level 3 */
190uint64_t KPML4phys; /* phys addr of kernel level 4 */
191
192static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
193static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
194
d7f50089 195/*
c8fe38ae 196 * Data for the pv entry allocation mechanism
d7f50089 197 */
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198static vm_zone_t pvzone;
199static struct vm_zone pvzone_store;
200static struct vm_object pvzone_obj;
201static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0;
202static int pmap_pagedaemon_waken = 0;
203static struct pv_entry *pvinit;
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204
205/*
c8fe38ae 206 * All those kernel PT submaps that BSD is so fond of
d7f50089 207 */
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208pt_entry_t *CMAP1 = 0, *ptmmap;
209caddr_t CADDR1 = 0, ptvmmap = 0;
210static pt_entry_t *msgbufmap;
211struct msgbuf *msgbufp=0;
d7f50089 212
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213/*
214 * Crashdump maps.
d7f50089 215 */
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216static pt_entry_t *pt_crashdumpmap;
217static caddr_t crashdumpmap;
218
219extern uint64_t KPTphys;
220extern pt_entry_t *SMPpt;
221extern uint64_t SMPptpa;
222
223#define DISABLE_PSE
224
225static PMAP_INLINE void free_pv_entry (pv_entry_t pv);
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226static pv_entry_t get_pv_entry (void);
227static void i386_protection_init (void);
228static __inline void pmap_clearbit (vm_page_t m, int bit);
229
230static void pmap_remove_all (vm_page_t m);
231static void pmap_enter_quick (pmap_t pmap, vm_offset_t va, vm_page_t m);
232static int pmap_remove_pte (struct pmap *pmap, pt_entry_t *ptq,
233 vm_offset_t sva, pmap_inval_info_t info);
234static void pmap_remove_page (struct pmap *pmap,
235 vm_offset_t va, pmap_inval_info_t info);
236static int pmap_remove_entry (struct pmap *pmap, vm_page_t m,
237 vm_offset_t va, pmap_inval_info_t info);
238static boolean_t pmap_testbit (vm_page_t m, int bit);
239static void pmap_insert_entry (pmap_t pmap, vm_offset_t va,
240 vm_page_t mpte, vm_page_t m);
241
242static vm_page_t pmap_allocpte (pmap_t pmap, vm_offset_t va);
243
244static int pmap_release_free_page (pmap_t pmap, vm_page_t p);
245static vm_page_t _pmap_allocpte (pmap_t pmap, vm_pindex_t ptepindex);
246static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
247static vm_page_t pmap_page_lookup (vm_object_t object, vm_pindex_t pindex);
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248static int pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
249 pmap_inval_info_t info);
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250static int pmap_unuse_pt (pmap_t, vm_offset_t, vm_page_t, pmap_inval_info_t);
251static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
252
253static unsigned pdir4mb;
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254
255/*
c8fe38ae 256 * Move the kernel virtual free pointer to the next
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257 * 2MB. This is used to help improve performance
258 * by using a large (2MB) page for much of the kernel
c8fe38ae 259 * (.text, .data, .bss)
d7f50089 260 */
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261static vm_offset_t
262pmap_kmem_choose(vm_offset_t addr)
f9cc0f15 263READY2
d7f50089 264{
c8fe38ae 265 vm_offset_t newaddr = addr;
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266
267 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 268 return newaddr;
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269}
270
d7f50089 271/*
c8fe38ae 272 * pmap_pte_quick:
d7f50089 273 *
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274 * Super fast pmap_pte routine best used when scanning the pv lists.
275 * This eliminates many course-grained invltlb calls. Note that many of
276 * the pv list scans are across different pmaps and it is very wasteful
277 * to do an entire invltlb when checking a single mapping.
278 *
279 * Should only be called while in a critical section.
280 */
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281static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
282
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283static pt_entry_t *
284pmap_pte_quick(pmap_t pmap, vm_offset_t va)
48ffc236 285READY0
c8fe38ae 286{
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287 return pmap_pte(pmap, va);
288}
289
290/* Return a non-clipped PD index for a given VA */
291static __inline vm_pindex_t
292pmap_pde_pindex(vm_offset_t va)
293READY1
294{
295 return va >> PDRSHIFT;
296}
297
298/* Return various clipped indexes for a given VA */
299static __inline vm_pindex_t
300pmap_pte_index(vm_offset_t va)
301READY1
302{
303
304 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
305}
306
307static __inline vm_pindex_t
308pmap_pde_index(vm_offset_t va)
309READY1
310{
311
312 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
313}
314
315static __inline vm_pindex_t
316pmap_pdpe_index(vm_offset_t va)
317READY1
318{
319
320 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
321}
322
323static __inline vm_pindex_t
324pmap_pml4e_index(vm_offset_t va)
325READY1
326{
327
328 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
329}
330
331/* Return a pointer to the PML4 slot that corresponds to a VA */
332static __inline pml4_entry_t *
333pmap_pml4e(pmap_t pmap, vm_offset_t va)
334READY1
335{
336
337 return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
338}
339
340/* Return a pointer to the PDP slot that corresponds to a VA */
341static __inline pdp_entry_t *
342pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
343READY1
344{
345 pdp_entry_t *pdpe;
346
347 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
348 return (&pdpe[pmap_pdpe_index(va)]);
349}
350
351/* Return a pointer to the PDP slot that corresponds to a VA */
352static __inline pdp_entry_t *
353pmap_pdpe(pmap_t pmap, vm_offset_t va)
354READY1
355{
356 pml4_entry_t *pml4e;
357
358 pml4e = pmap_pml4e(pmap, va);
359 if ((*pml4e & PG_V) == 0)
360 return NULL;
361 return (pmap_pml4e_to_pdpe(pml4e, va));
362}
363
364/* Return a pointer to the PD slot that corresponds to a VA */
365static __inline pd_entry_t *
366pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
367READY1
368{
369 pd_entry_t *pde;
370
371 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
372 return (&pde[pmap_pde_index(va)]);
373}
374
375/* Return a pointer to the PD slot that corresponds to a VA */
376static __inline pd_entry_t *
377pmap_pde(pmap_t pmap, vm_offset_t va)
378READY1
379{
380 pdp_entry_t *pdpe;
381
382 pdpe = pmap_pdpe(pmap, va);
383 if (pdpe == NULL || (*pdpe & PG_V) == 0)
384 return NULL;
385 return (pmap_pdpe_to_pde(pdpe, va));
386}
387
388/* Return a pointer to the PT slot that corresponds to a VA */
389static __inline pt_entry_t *
390pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
391READY1
392{
393 pt_entry_t *pte;
394
395 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
396 return (&pte[pmap_pte_index(va)]);
397}
398
399/* Return a pointer to the PT slot that corresponds to a VA */
400static __inline pt_entry_t *
401pmap_pte(pmap_t pmap, vm_offset_t va)
402READY1
403{
404 pd_entry_t *pde;
405
406 pde = pmap_pde(pmap, va);
407 if (pde == NULL || (*pde & PG_V) == 0)
408 return NULL;
409 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
410 return ((pt_entry_t *)pde);
411 return (pmap_pde_to_pte(pde, va));
412}
413
414
415PMAP_INLINE pt_entry_t *
416vtopte(vm_offset_t va)
417READY1
418{
419 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
420
421 return (PTmap + ((va >> PAGE_SHIFT) & mask));
c8fe38ae 422}
d7f50089 423
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424static __inline pd_entry_t *
425vtopde(vm_offset_t va)
426READY1
427{
428 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
429
430 return (PDmap + ((va >> PDRSHIFT) & mask));
431}
c8fe38ae 432
48ffc236 433static uint64_t
c8fe38ae 434allocpages(vm_paddr_t *firstaddr, int n)
48ffc236 435READY1
d7f50089 436{
48ffc236 437 uint64_t ret;
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438
439 ret = *firstaddr;
440 bzero((void *)ret, n * PAGE_SIZE);
441 *firstaddr += n * PAGE_SIZE;
442 return (ret);
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443}
444
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445void
446create_pagetables(vm_paddr_t *firstaddr)
48ffc236 447READY0
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448{
449 int i;
450 int count;
451 uint64_t cpu0pp, cpu0idlestk;
452 int idlestk_page_offset = offsetof(struct privatespace, idlestack) / PAGE_SIZE;
453
454 /* we are running (mostly) V=P at this point */
455
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456 /* Allocate pages */
457 KPTphys = allocpages(firstaddr, NKPT);
458 KPML4phys = allocpages(firstaddr, 1);
459 KPDPphys = allocpages(firstaddr, NKPML4E);
460 KPDphys = allocpages(firstaddr, NKPDPE);
461
462 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
463 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
464 ndmpdp = 4;
465 DMPDPphys = allocpages(firstaddr, NDMPML4E);
466 if ((amd_feature & AMDID_PAGE1GB) == 0)
467 DMPDphys = allocpages(firstaddr, ndmpdp);
468 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
469
470 /* Fill in the underlying page table pages */
471 /* Read-only from zero to physfree */
472 /* XXX not fully used, underneath 2M pages */
473 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
474 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
475 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
476 }
477
478 /* Now map the page tables at their location within PTmap */
479 for (i = 0; i < NKPT; i++) {
480 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
481 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
482 }
483
484 /* Map from zero to end of allocations under 2M pages */
485 /* This replaces some of the KPTphys entries above */
486 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
487 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
488 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
489 }
490
491 /* And connect up the PD to the PDP */
492 for (i = 0; i < NKPDPE; i++) {
493 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys +
494 (i << PAGE_SHIFT);
495 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
496 }
497
498 /* Now set up the direct map space using either 2MB or 1GB pages */
499 /* Preset PG_M and PG_A because demotion expects it */
500 if ((amd_feature & AMDID_PAGE1GB) == 0) {
501 for (i = 0; i < NPDEPG * ndmpdp; i++) {
502 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
503 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
504 PG_G | PG_M | PG_A;
505 }
506 /* And the direct map space's PDP */
507 for (i = 0; i < ndmpdp; i++) {
508 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
509 (i << PAGE_SHIFT);
510 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
511 }
512 } else {
513 for (i = 0; i < ndmpdp; i++) {
514 ((pdp_entry_t *)DMPDPphys)[i] =
515 (vm_paddr_t)i << PDPSHIFT;
516 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
517 PG_G | PG_M | PG_A;
518 }
519 }
520
521 /* And recursively map PML4 to itself in order to get PTmap */
522 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
523 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
524
525 /* Connect the Direct Map slot up to the PML4 */
526 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
527 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
528
529 /* Connect the KVA slot up to the PML4 */
530 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
531 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
532#if JGPMAP32
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533 common_lvl4_phys = allocpages(firstaddr, 1); /* 512 512G mappings */
534 common_lvl3_phys = allocpages(firstaddr, 1); /* 512 1G mappings */
535 KPTphys = allocpages(firstaddr, NKPT); /* kernel page table */
536 IdlePTD = allocpages(firstaddr, 1); /* kernel page dir */
537 cpu0pp = allocpages(firstaddr, MDGLOBALDATA_BASEALLOC_PAGES);
538 cpu0idlestk = allocpages(firstaddr, UPAGES);
539 SMPptpa = allocpages(firstaddr, 1);
540 SMPpt = (void *)(SMPptpa + KERNBASE);
541
542
543 /*
544 * Load kernel page table with kernel memory mappings
545 */
546 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
547 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
548 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V;
549 }
550
551#ifndef JG
552 for (i = 0; i < NKPT; i++) {
553 ((pd_entry_t *)IdlePTD)[i] = KPTphys + (i << PAGE_SHIFT);
554 ((pd_entry_t *)IdlePTD)[i] |= PG_RW | PG_V;
555 }
556#endif
557
558 /*
559 * Set up the kernel page table itself.
560 */
561 for (i = 0; i < NKPT; i++) {
562 ((pd_entry_t *)IdlePTD)[KPTDI + i] = KPTphys + (i << PAGE_SHIFT);
563 ((pd_entry_t *)IdlePTD)[KPTDI + i] |= PG_RW | PG_V;
564 }
565
566#ifndef JG
567 count = ISA_HOLE_LENGTH >> PAGE_SHIFT;
568 for (i = 0; i < count; i++) {
569 ((pt_entry_t *)KPTphys)[amd64_btop(ISA_HOLE_START) + i] = \
570 (ISA_HOLE_START + i * PAGE_SIZE) | PG_RW | PG_V;
571 }
572#endif
573
574 /*
575 * Self-mapping
576 */
577 ((pd_entry_t *)IdlePTD)[PTDPTDI] = (pd_entry_t)IdlePTD | PG_RW | PG_V;
578
579 /*
580 * Map CPU_prvspace[0].mdglobaldata
581 */
582 for (i = 0; i < MDGLOBALDATA_BASEALLOC_PAGES; i++) {
583 ((pt_entry_t *)SMPptpa)[i] = \
584 (cpu0pp + i * PAGE_SIZE) | PG_RW | PG_V;
585 }
586
587 /*
588 * Map CPU_prvspace[0].idlestack
589 */
590 for (i = 0; i < UPAGES; i++) {
591 ((pt_entry_t *)SMPptpa)[idlestk_page_offset + i] = \
592 (cpu0idlestk + i * PAGE_SIZE) | PG_RW | PG_V;
593 }
594
595 /*
596 * Link SMPpt.
597 */
598 ((pd_entry_t *)IdlePTD)[MPPTDI] = SMPptpa | PG_RW | PG_V;
599
600 /*
601 * PML4 maps level 3
602 */
603 ((pml4_entry_t *)common_lvl4_phys)[LINKPML4I] = common_lvl3_phys | PG_RW | PG_V | PG_U;
604
605 /*
606 * location of "virtual CR3" - a PDP entry that is loaded
607 * with a PD physical address (+ page attributes).
608 * Matt: location of user page directory entry (representing 1G)
609 */
610 link_pdpe = &((pdp_entry_t *)common_lvl3_phys)[LINKPDPI];
48ffc236 611#endif /* JGPMAP32 */
c8fe38ae
MD
612}
613
48ffc236 614READY0
c8fe38ae
MD
615void
616init_paging(vm_paddr_t *firstaddr) {
617 create_pagetables(firstaddr);
618
48ffc236 619#if JGPMAP32
c8fe38ae
MD
620 /* switch to the newly created page table */
621 *link_pdpe = IdlePTD | PG_RW | PG_V | PG_U;
622 load_cr3(common_lvl4_phys);
623 link_pdpe = (void *)((char *)link_pdpe + KERNBASE);
624
625 KvaStart = (vm_offset_t)VADDR(PTDPTDI, 0);
626 KvaEnd = (vm_offset_t)VADDR(APTDPTDI, 0);
627 KvaSize = KvaEnd - KvaStart;
48ffc236 628#endif
d7f50089
YY
629}
630
631/*
c8fe38ae
MD
632 * Bootstrap the system enough to run with virtual memory.
633 *
634 * On the i386 this is called after mapping has already been enabled
635 * and just syncs the pmap module with what has already been done.
636 * [We can't call it easily with mapping off since the kernel is not
637 * mapped with PA == VA, hence we would have to relocate every address
638 * from the linked base (virtual) address "KERNBASE" to the actual
639 * (physical) address starting relative to 0]
d7f50089
YY
640 */
641void
48ffc236
JG
642pmap_bootstrap(vm_paddr_t *firstaddr)
643READY0
c8fe38ae
MD
644{
645 vm_offset_t va;
646 pt_entry_t *pte;
647 struct mdglobaldata *gd;
648 int i;
649 int pg;
650
48ffc236
JG
651 KvaStart = VM_MIN_KERNEL_ADDRESS;
652 KvaEnd = VM_MAX_KERNEL_ADDRESS;
653 KvaSize = KvaEnd - KvaStart;
654
c8fe38ae
MD
655 avail_start = *firstaddr;
656
657 /*
48ffc236 658 * Create an initial set of page tables to run the kernel in.
c8fe38ae 659 */
48ffc236
JG
660 create_pagetables(firstaddr);
661
c8fe38ae
MD
662 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
663 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
664
665 virtual_end = VM_MAX_KERNEL_ADDRESS;
666
667 /* XXX do %cr0 as well */
668 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
669 load_cr3(KPML4phys);
c8fe38ae
MD
670
671 /*
672 * Initialize protection array.
673 */
674 i386_protection_init();
675
676 /*
677 * The kernel's pmap is statically allocated so we don't have to use
678 * pmap_create, which is unlikely to work correctly at this part of
679 * the boot sequence (XXX and which no longer exists).
680 */
48ffc236 681#if JGPMAP32
c8fe38ae 682 kernel_pmap.pm_pdir = (pd_entry_t *)(PTOV_OFFSET + (uint64_t)IdlePTD);
48ffc236
JG
683#endif
684 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
685 kernel_pmap.pm_count = 1;
686 kernel_pmap.pm_active = (cpumask_t)-1; /* don't allow deactivation */
687 TAILQ_INIT(&kernel_pmap.pm_pvlist);
688 nkpt = NKPT;
689
690 /*
691 * Reserve some special page table entries/VA space for temporary
692 * mapping of pages.
693 */
694#define SYSMAP(c, p, v, n) \
695 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
696
697 va = virtual_start;
48ffc236 698#ifdef JG
c8fe38ae 699 pte = (pt_entry_t *) pmap_pte(&kernel_pmap, va);
48ffc236
JG
700#else
701 pte = vtopte(va);
702#endif
c8fe38ae
MD
703
704 /*
705 * CMAP1/CMAP2 are used for zeroing and copying pages.
706 */
707 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
708
709 /*
710 * Crashdump maps.
711 */
712 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
713
714 /*
715 * ptvmmap is used for reading arbitrary physical pages via
716 * /dev/mem.
717 */
718 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
719
720 /*
721 * msgbufp is used to map the system message buffer.
722 * XXX msgbufmap is not used.
723 */
724 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
725 atop(round_page(MSGBUF_SIZE)))
726
727 virtual_start = va;
728
729 *CMAP1 = 0;
48ffc236 730#if JGPMAP32
c8fe38ae
MD
731 for (i = 0; i < NKPT; i++)
732 PTD[i] = 0;
48ffc236 733#endif
c8fe38ae
MD
734
735 /*
736 * PG_G is terribly broken on SMP because we IPI invltlb's in some
737 * cases rather then invl1pg. Actually, I don't even know why it
738 * works under UP because self-referential page table mappings
739 */
740#ifdef SMP
741 pgeflag = 0;
742#else
743 if (cpu_feature & CPUID_PGE)
744 pgeflag = PG_G;
745#endif
746
747/*
748 * Initialize the 4MB page size flag
749 */
750 pseflag = 0;
751/*
752 * The 4MB page version of the initial
753 * kernel page mapping.
754 */
755 pdir4mb = 0;
756
757#if !defined(DISABLE_PSE)
758 if (cpu_feature & CPUID_PSE) {
759 pt_entry_t ptditmp;
760 /*
761 * Note that we have enabled PSE mode
762 */
763 pseflag = PG_PS;
764 ptditmp = *(PTmap + amd64_btop(KERNBASE));
765 ptditmp &= ~(NBPDR - 1);
766 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
767 pdir4mb = ptditmp;
768
769#ifndef SMP
770 /*
771 * Enable the PSE mode. If we are SMP we can't do this
772 * now because the APs will not be able to use it when
773 * they boot up.
774 */
775 load_cr4(rcr4() | CR4_PSE);
776
777 /*
778 * We can do the mapping here for the single processor
779 * case. We simply ignore the old page table page from
780 * now on.
781 */
782 /*
783 * For SMP, we still need 4K pages to bootstrap APs,
784 * PSE will be enabled as soon as all APs are up.
785 */
786 PTD[KPTDI] = (pd_entry_t)ptditmp;
48ffc236 787#if JGPMAP32
c8fe38ae 788 kernel_pmap.pm_pdir[KPTDI] = (pd_entry_t)ptditmp;
48ffc236 789#endif
c8fe38ae
MD
790 cpu_invltlb();
791#endif
792 }
793#endif
794#ifdef SMP
795 if (cpu_apic_address == 0)
796 panic("pmap_bootstrap: no local apic!");
797
057877ac 798#if JGPMAP32
c8fe38ae
MD
799 /* local apic is mapped on last page */
800 SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N | pgeflag |
801 (cpu_apic_address & PG_FRAME));
057877ac 802#endif
c8fe38ae
MD
803#endif
804
805 /*
806 * We need to finish setting up the globaldata page for the BSP.
807 * locore has already populated the page table for the mdglobaldata
808 * portion.
809 */
810 pg = MDGLOBALDATA_BASEALLOC_PAGES;
811 gd = &CPU_prvspace[0].mdglobaldata;
812 gd->gd_CMAP1 = &SMPpt[pg + 0];
813 gd->gd_CMAP2 = &SMPpt[pg + 1];
814 gd->gd_CMAP3 = &SMPpt[pg + 2];
815 gd->gd_PMAP1 = &SMPpt[pg + 3];
816 gd->gd_CADDR1 = CPU_prvspace[0].CPAGE1;
817 gd->gd_CADDR2 = CPU_prvspace[0].CPAGE2;
818 gd->gd_CADDR3 = CPU_prvspace[0].CPAGE3;
819 gd->gd_PADDR1 = (pt_entry_t *)CPU_prvspace[0].PPAGE1;
820
821 cpu_invltlb();
d7f50089
YY
822}
823
c8fe38ae 824#ifdef SMP
d7f50089 825/*
c8fe38ae 826 * Set 4mb pdir for mp startup
d7f50089
YY
827 */
828void
c8fe38ae 829pmap_set_opt(void)
48ffc236 830READY0
c8fe38ae
MD
831{
832 if (pseflag && (cpu_feature & CPUID_PSE)) {
833 load_cr4(rcr4() | CR4_PSE);
834 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
48ffc236 835#if JGPMAP32
c8fe38ae
MD
836 kernel_pmap.pm_pdir[KPTDI] =
837 PTD[KPTDI] = (pd_entry_t)pdir4mb;
48ffc236 838#endif
c8fe38ae
MD
839 cpu_invltlb();
840 }
841 }
d7f50089 842}
c8fe38ae 843#endif
d7f50089 844
c8fe38ae
MD
845/*
846 * Initialize the pmap module.
847 * Called by vm_init, to initialize any structures that the pmap
848 * system needs to map virtual memory.
849 * pmap_init has been enhanced to support in a fairly consistant
850 * way, discontiguous physical memory.
d7f50089
YY
851 */
852void
c8fe38ae 853pmap_init(void)
48ffc236 854READY0
d7f50089 855{
c8fe38ae
MD
856 int i;
857 int initial_pvs;
858
859 /*
860 * object for kernel page table pages
861 */
48ffc236
JG
862 /* JG I think the number can be arbitrary */
863 kptobj = vm_object_allocate(OBJT_DEFAULT, 5);
c8fe38ae
MD
864
865 /*
866 * Allocate memory for random pmap data structures. Includes the
867 * pv_head_table.
868 */
869
870 for(i = 0; i < vm_page_array_size; i++) {
871 vm_page_t m;
872
873 m = &vm_page_array[i];
874 TAILQ_INIT(&m->md.pv_list);
875 m->md.pv_list_count = 0;
876 }
877
878 /*
879 * init the pv free list
880 */
881 initial_pvs = vm_page_array_size;
882 if (initial_pvs < MINPV)
883 initial_pvs = MINPV;
884 pvzone = &pvzone_store;
885 pvinit = (struct pv_entry *) kmem_alloc(&kernel_map,
886 initial_pvs * sizeof (struct pv_entry));
887 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry), pvinit,
888 initial_pvs);
889
890 /*
891 * Now it is safe to enable pv_table recording.
892 */
893 pmap_initialized = TRUE;
d887674b 894#ifdef SMP
057877ac 895 lapic = pmap_mapdev_uncacheable(cpu_apic_address, sizeof(struct LAPIC));
d887674b 896#endif
d7f50089
YY
897}
898
c8fe38ae
MD
899/*
900 * Initialize the address space (zone) for the pv_entries. Set a
901 * high water mark so that the system can recover from excessive
902 * numbers of pv entries.
903 */
d7f50089 904void
c8fe38ae 905pmap_init2(void)
48ffc236 906READY0
d7f50089 907{
c8fe38ae
MD
908 int shpgperproc = PMAP_SHPGPERPROC;
909
910 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
911 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
912 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
913 pv_entry_high_water = 9 * (pv_entry_max / 10);
914 zinitna(pvzone, &pvzone_obj, NULL, 0, pv_entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
915}
916
c8fe38ae
MD
917
918/***************************************************
919 * Low level helper routines.....
920 ***************************************************/
921
922#if defined(PMAP_DIAGNOSTIC)
d7f50089
YY
923
924/*
c8fe38ae
MD
925 * This code checks for non-writeable/modified pages.
926 * This should be an invalid condition.
d7f50089 927 */
c8fe38ae 928static int
48ffc236
JG
929pmap_nw_modified(pt_entry_t pte)
930READY1
d7f50089 931{
c8fe38ae
MD
932 if ((pte & (PG_M|PG_RW)) == PG_M)
933 return 1;
934 else
935 return 0;
d7f50089 936}
c8fe38ae
MD
937#endif
938
d7f50089 939
c8fe38ae
MD
940/*
941 * this routine defines the region(s) of memory that should
942 * not be tested for the modified bit.
943 */
944static PMAP_INLINE int
945pmap_track_modified(vm_offset_t va)
48ffc236 946READY0
d7f50089 947{
c8fe38ae
MD
948 if ((va < clean_sva) || (va >= clean_eva))
949 return 1;
950 else
951 return 0;
d7f50089
YY
952}
953
d7f50089 954/*
c8fe38ae
MD
955 * pmap_extract:
956 *
957 * Extract the physical page address associated with the map/VA pair.
958 *
959 * This function may not be called from an interrupt if the pmap is
960 * not kernel_pmap.
d7f50089 961 */
c8fe38ae
MD
962vm_paddr_t
963pmap_extract(pmap_t pmap, vm_offset_t va)
48ffc236 964READY1
d7f50089 965{
48ffc236
JG
966 vm_paddr_t rtval;
967 pt_entry_t *pte;
968 pd_entry_t pde, *pdep;
c8fe38ae 969
48ffc236
JG
970 rtval = 0;
971 pdep = pmap_pde(pmap, va);
972 if (pdep != NULL) {
973 pde = *pdep;
974 if (pde) {
975 if ((pde & PG_PS) != 0) {
976 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
977 } else {
978 pte = pmap_pde_to_pte(pdep, va);
979 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
980 }
c8fe38ae 981 }
c8fe38ae 982 }
48ffc236
JG
983 return rtval;
984}
985
986/*
987 * Routine: pmap_kextract
988 * Function:
989 * Extract the physical page address associated
990 * kernel virtual address.
991 */
992vm_paddr_t
993pmap_kextract(vm_offset_t va)
994READY1
995{
996 pd_entry_t pde;
997 vm_paddr_t pa;
998
999 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
1000 pa = DMAP_TO_PHYS(va);
1001 } else {
1002 pde = *vtopde(va);
1003 if (pde & PG_PS) {
1004 pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
1005 } else {
1006 /*
1007 * Beware of a concurrent promotion that changes the
1008 * PDE at this point! For example, vtopte() must not
1009 * be used to access the PTE because it would use the
1010 * new PDE. It is, however, safe to use the old PDE
1011 * because the page table page is preserved by the
1012 * promotion.
1013 */
1014 pa = *pmap_pde_to_pte(&pde, va);
1015 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
1016 }
1017 }
1018 return pa;
d7f50089
YY
1019}
1020
c8fe38ae
MD
1021/***************************************************
1022 * Low level mapping routines.....
1023 ***************************************************/
1024
d7f50089 1025/*
c8fe38ae
MD
1026 * Routine: pmap_kenter
1027 * Function:
1028 * Add a wired page to the KVA
1029 * NOTE! note that in order for the mapping to take effect -- you
1030 * should do an invltlb after doing the pmap_kenter().
d7f50089 1031 */
c8fe38ae 1032void
d7f50089 1033pmap_kenter(vm_offset_t va, vm_paddr_t pa)
48ffc236 1034READY1
d7f50089 1035{
c8fe38ae
MD
1036 pt_entry_t *pte;
1037 pt_entry_t npte;
1038 pmap_inval_info info;
1039
1040 pmap_inval_init(&info);
1041 npte = pa | PG_RW | PG_V | pgeflag;
1042 pte = vtopte(va);
1043 pmap_inval_add(&info, &kernel_pmap, va);
1044 *pte = npte;
1045 pmap_inval_flush(&info);
d7f50089
YY
1046}
1047
1048/*
c8fe38ae
MD
1049 * Routine: pmap_kenter_quick
1050 * Function:
1051 * Similar to pmap_kenter(), except we only invalidate the
1052 * mapping on the current CPU.
d7f50089 1053 */
c8fe38ae
MD
1054void
1055pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
48ffc236 1056READY1
c8fe38ae
MD
1057{
1058 pt_entry_t *pte;
1059 pt_entry_t npte;
1060
1061 npte = pa | PG_RW | PG_V | pgeflag;
1062 pte = vtopte(va);
1063 *pte = npte;
1064 cpu_invlpg((void *)va);
1065}
1066
d7f50089
YY
1067void
1068pmap_kenter_sync(vm_offset_t va)
48ffc236 1069READY1
d7f50089 1070{
c8fe38ae
MD
1071 pmap_inval_info info;
1072
1073 pmap_inval_init(&info);
1074 pmap_inval_add(&info, &kernel_pmap, va);
1075 pmap_inval_flush(&info);
d7f50089
YY
1076}
1077
d7f50089
YY
1078void
1079pmap_kenter_sync_quick(vm_offset_t va)
48ffc236 1080READY1
d7f50089 1081{
c8fe38ae 1082 cpu_invlpg((void *)va);
d7f50089
YY
1083}
1084
d7f50089 1085/*
c8fe38ae 1086 * remove a page from the kernel pagetables
d7f50089
YY
1087 */
1088void
c8fe38ae 1089pmap_kremove(vm_offset_t va)
48ffc236 1090READY1
d7f50089 1091{
c8fe38ae
MD
1092 pt_entry_t *pte;
1093 pmap_inval_info info;
1094
1095 pmap_inval_init(&info);
1096 pte = vtopte(va);
1097 pmap_inval_add(&info, &kernel_pmap, va);
1098 *pte = 0;
1099 pmap_inval_flush(&info);
1100}
1101
1102void
1103pmap_kremove_quick(vm_offset_t va)
48ffc236 1104READY1
c8fe38ae
MD
1105{
1106 pt_entry_t *pte;
1107 pte = vtopte(va);
1108 *pte = 0;
1109 cpu_invlpg((void *)va);
d7f50089
YY
1110}
1111
1112/*
c8fe38ae 1113 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
1114 */
1115void
c8fe38ae 1116pmap_kmodify_rw(vm_offset_t va)
48ffc236 1117READY1
d7f50089 1118{
c8fe38ae
MD
1119 *vtopte(va) |= PG_RW;
1120 cpu_invlpg((void *)va);
d7f50089
YY
1121}
1122
c8fe38ae
MD
1123void
1124pmap_kmodify_nc(vm_offset_t va)
48ffc236 1125READY1
c8fe38ae
MD
1126{
1127 *vtopte(va) |= PG_N;
1128 cpu_invlpg((void *)va);
1129}
d7f50089
YY
1130
1131/*
c8fe38ae
MD
1132 * Used to map a range of physical addresses into kernel
1133 * virtual address space.
1134 *
1135 * For now, VM is already on, we only need to map the
1136 * specified memory.
d7f50089
YY
1137 */
1138vm_offset_t
1139pmap_map(vm_offset_t virt, vm_paddr_t start, vm_paddr_t end, int prot)
8fdd3267 1140READY3
d7f50089 1141{
8fdd3267 1142 return PHYS_TO_DMAP(start);
d7f50089
YY
1143}
1144
c8fe38ae 1145
d7f50089 1146/*
c8fe38ae
MD
1147 * Add a list of wired pages to the kva
1148 * this routine is only used for temporary
1149 * kernel mappings that do not need to have
1150 * page modification or references recorded.
1151 * Note that old mappings are simply written
1152 * over. The page *must* be wired.
d7f50089
YY
1153 */
1154void
c8fe38ae 1155pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
48ffc236 1156READY1
d7f50089 1157{
c8fe38ae
MD
1158 vm_offset_t end_va;
1159
1160 end_va = va + count * PAGE_SIZE;
1161
1162 while (va < end_va) {
1163 pt_entry_t *pte;
1164
1165 pte = vtopte(va);
1166 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1167 cpu_invlpg((void *)va);
1168 va += PAGE_SIZE;
1169 m++;
1170 }
1171#ifdef SMP
1172 smp_invltlb(); /* XXX */
1173#endif
1174}
1175
1176void
1177pmap_qenter2(vm_offset_t va, vm_page_t *m, int count, cpumask_t *mask)
48ffc236 1178READY1
c8fe38ae
MD
1179{
1180 vm_offset_t end_va;
1181 cpumask_t cmask = mycpu->gd_cpumask;
1182
1183 end_va = va + count * PAGE_SIZE;
1184
1185 while (va < end_va) {
1186 pt_entry_t *pte;
1187 pt_entry_t pteval;
1188
1189 /*
1190 * Install the new PTE. If the pte changed from the prior
1191 * mapping we must reset the cpu mask and invalidate the page.
1192 * If the pte is the same but we have not seen it on the
1193 * current cpu, invlpg the existing mapping. Otherwise the
1194 * entry is optimal and no invalidation is required.
1195 */
1196 pte = vtopte(va);
1197 pteval = VM_PAGE_TO_PHYS(*m) | PG_A | PG_RW | PG_V | pgeflag;
1198 if (*pte != pteval) {
1199 *mask = 0;
1200 *pte = pteval;
1201 cpu_invlpg((void *)va);
1202 } else if ((*mask & cmask) == 0) {
1203 cpu_invlpg((void *)va);
1204 }
1205 va += PAGE_SIZE;
1206 m++;
1207 }
1208 *mask |= cmask;
d7f50089
YY
1209}
1210
1211/*
c8fe38ae
MD
1212 * this routine jerks page mappings from the
1213 * kernel -- it is meant only for temporary mappings.
d7f50089 1214 */
c8fe38ae
MD
1215void
1216pmap_qremove(vm_offset_t va, int count)
48ffc236 1217READY1
d7f50089 1218{
c8fe38ae
MD
1219 vm_offset_t end_va;
1220
48ffc236 1221 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1222
1223 while (va < end_va) {
1224 pt_entry_t *pte;
1225
1226 pte = vtopte(va);
1227 *pte = 0;
1228 cpu_invlpg((void *)va);
1229 va += PAGE_SIZE;
1230 }
1231#ifdef SMP
1232 smp_invltlb();
1233#endif
d7f50089
YY
1234}
1235
1236/*
c8fe38ae
MD
1237 * This routine works like vm_page_lookup() but also blocks as long as the
1238 * page is busy. This routine does not busy the page it returns.
1239 *
1240 * Unless the caller is managing objects whos pages are in a known state,
1241 * the call should be made with a critical section held so the page's object
1242 * association remains valid on return.
d7f50089 1243 */
c8fe38ae
MD
1244static vm_page_t
1245pmap_page_lookup(vm_object_t object, vm_pindex_t pindex)
48ffc236 1246READY1
d7f50089 1247{
c8fe38ae
MD
1248 vm_page_t m;
1249
1250 do {
1251 m = vm_page_lookup(object, pindex);
1252 } while (m && vm_page_sleep_busy(m, FALSE, "pplookp"));
1253
1254 return(m);
d7f50089
YY
1255}
1256
1257/*
c8fe38ae
MD
1258 * Create a new thread and optionally associate it with a (new) process.
1259 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1260 */
1261void
c8fe38ae 1262pmap_init_thread(thread_t td)
48ffc236 1263READY1
d7f50089 1264{
c8fe38ae
MD
1265 /* enforce pcb placement */
1266 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
1267 td->td_savefpu = &td->td_pcb->pcb_save;
48ffc236 1268 td->td_sp = (char *)td->td_pcb - 16; /* JG is -16 needed on amd64? */
d7f50089
YY
1269}
1270
1271/*
c8fe38ae 1272 * This routine directly affects the fork perf for a process.
d7f50089
YY
1273 */
1274void
c8fe38ae 1275pmap_init_proc(struct proc *p)
48ffc236 1276READY1
d7f50089
YY
1277{
1278}
1279
1280/*
c8fe38ae
MD
1281 * Dispose the UPAGES for a process that has exited.
1282 * This routine directly impacts the exit perf of a process.
d7f50089
YY
1283 */
1284void
c8fe38ae 1285pmap_dispose_proc(struct proc *p)
48ffc236 1286READY1
d7f50089 1287{
c8fe38ae 1288 KASSERT(p->p_lock == 0, ("attempt to dispose referenced proc! %p", p));
d7f50089
YY
1289}
1290
c8fe38ae
MD
1291/***************************************************
1292 * Page table page management routines.....
1293 ***************************************************/
1294
d7f50089 1295/*
c8fe38ae
MD
1296 * This routine unholds page table pages, and if the hold count
1297 * drops to zero, then it decrements the wire count.
d7f50089 1298 */
c8fe38ae 1299static int
48ffc236
JG
1300_pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, pmap_inval_info_t info)
1301READY1
c8fe38ae
MD
1302{
1303 /*
1304 * Wait until we can busy the page ourselves. We cannot have
1305 * any active flushes if we block.
1306 */
1307 if (m->flags & PG_BUSY) {
1308 pmap_inval_flush(info);
1309 while (vm_page_sleep_busy(m, FALSE, "pmuwpt"))
1310 ;
1311 }
1312 KASSERT(m->queue == PQ_NONE,
1313 ("_pmap_unwire_pte_hold: %p->queue != PQ_NONE", m));
1314
1315 if (m->hold_count == 1) {
1316 /*
1317 * Unmap the page table page
1318 */
1319 vm_page_busy(m);
1320 pmap_inval_add(info, pmap, -1);
48ffc236
JG
1321
1322 if (m->pindex >= (NUPDE + NUPDPE)) {
1323 /* PDP page */
1324 pml4_entry_t *pml4;
1325 pml4 = pmap_pml4e(pmap, va);
1326 *pml4 = 0;
1327 } else if (m->pindex >= NUPDE) {
1328 /* PD page */
1329 pdp_entry_t *pdp;
1330 pdp = pmap_pdpe(pmap, va);
1331 *pdp = 0;
1332 } else {
3535204a 1333 /* PT page */
48ffc236
JG
1334 pd_entry_t *pd;
1335 pd = pmap_pde(pmap, va);
1336 *pd = 0;
1337 }
c8fe38ae
MD
1338
1339 KKASSERT(pmap->pm_stats.resident_count > 0);
1340 --pmap->pm_stats.resident_count;
1341
1342 if (pmap->pm_ptphint == m)
1343 pmap->pm_ptphint = NULL;
1344
48ffc236
JG
1345 if (m->pindex < NUPDE) {
1346 /* We just released a PT, unhold the matching PD */
1347 vm_page_t pdpg;
1348
1349 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
1350 pmap_unwire_pte_hold(pmap, va, pdpg, info);
1351 }
1352 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
1353 /* We just released a PD, unhold the matching PDP */
1354 vm_page_t pdppg;
1355
1356 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
1357 pmap_unwire_pte_hold(pmap, va, pdppg, info);
1358 }
48ffc236 1359
c8fe38ae
MD
1360 /*
1361 * This was our last hold, the page had better be unwired
1362 * after we decrement wire_count.
1363 *
1364 * FUTURE NOTE: shared page directory page could result in
1365 * multiple wire counts.
1366 */
1367 vm_page_unhold(m);
1368 --m->wire_count;
1369 KKASSERT(m->wire_count == 0);
1370 --vmstats.v_wire_count;
1371 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1372 vm_page_flash(m);
1373 vm_page_free_zero(m);
1374 return 1;
1375 } else {
1b2e0b92 1376 /* JG Can we get here? */
c8fe38ae
MD
1377 KKASSERT(m->hold_count > 1);
1378 vm_page_unhold(m);
1379 return 0;
1380 }
1381}
1382
1383static PMAP_INLINE int
48ffc236
JG
1384pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, pmap_inval_info_t info)
1385READY1
d7f50089 1386{
c8fe38ae
MD
1387 KKASSERT(m->hold_count > 0);
1388 if (m->hold_count > 1) {
1389 vm_page_unhold(m);
1390 return 0;
1391 } else {
48ffc236 1392 return _pmap_unwire_pte_hold(pmap, va, m, info);
c8fe38ae 1393 }
d7f50089
YY
1394}
1395
c8fe38ae
MD
1396/*
1397 * After removing a page table entry, this routine is used to
1398 * conditionally free the page, and manage the hold/wire counts.
d7f50089 1399 */
c8fe38ae
MD
1400static int
1401pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte,
1402 pmap_inval_info_t info)
48ffc236 1403READY1
c8fe38ae 1404{
48ffc236 1405 /* JG Use FreeBSD/amd64 or FreeBSD/i386 ptepde approaches? */
c8fe38ae 1406 vm_pindex_t ptepindex;
48ffc236 1407 if (va >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
1408 return 0;
1409
1410 if (mpte == NULL) {
48ffc236
JG
1411 ptepindex = pmap_pde_pindex(va);
1412#if JGHINT
c8fe38ae
MD
1413 if (pmap->pm_ptphint &&
1414 (pmap->pm_ptphint->pindex == ptepindex)) {
1415 mpte = pmap->pm_ptphint;
1416 } else {
48ffc236 1417#endif
c8fe38ae 1418 pmap_inval_flush(info);
48ffc236 1419 mpte = pmap_page_lookup(pmap->pm_pteobj, ptepindex);
c8fe38ae 1420 pmap->pm_ptphint = mpte;
48ffc236 1421#if JGHINT
c8fe38ae 1422 }
48ffc236 1423#endif
c8fe38ae
MD
1424 }
1425
48ffc236 1426 return pmap_unwire_pte_hold(pmap, va, mpte, info);
c8fe38ae 1427}
d7f50089
YY
1428
1429/*
c8fe38ae
MD
1430 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1431 * it, and IdlePTD, represents the template used to update all other pmaps.
1432 *
1433 * On architectures where the kernel pmap is not integrated into the user
1434 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1435 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1436 */
1437void
c8fe38ae 1438pmap_pinit0(struct pmap *pmap)
48ffc236 1439READY1
d7f50089 1440{
48ffc236 1441#if JGPMAP32
c8fe38ae
MD
1442 pmap->pm_pdir =
1443 (pd_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
1444 pmap_kenter((vm_offset_t)pmap->pm_pdir, (vm_offset_t) IdlePTD);
48ffc236
JG
1445#endif
1446 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1447 pmap->pm_count = 1;
1448 pmap->pm_active = 0;
1449 pmap->pm_ptphint = NULL;
1450 TAILQ_INIT(&pmap->pm_pvlist);
1451 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1452}
1453
1454/*
c8fe38ae
MD
1455 * Initialize a preallocated and zeroed pmap structure,
1456 * such as one in a vmspace structure.
d7f50089
YY
1457 */
1458void
c8fe38ae 1459pmap_pinit(struct pmap *pmap)
48ffc236 1460READY1
d7f50089 1461{
c8fe38ae
MD
1462 vm_page_t ptdpg;
1463
1464 /*
1465 * No need to allocate page table space yet but we do need a valid
1466 * page directory table.
1467 */
48ffc236
JG
1468 if (pmap->pm_pml4 == NULL) {
1469 pmap->pm_pml4 =
1470 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1471 }
1472
1473 /*
1474 * Allocate an object for the ptes
1475 */
1476 if (pmap->pm_pteobj == NULL)
0a5c555b 1477 pmap->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, NUPDE + NUPDPE + PML4PML4I + 1);
c8fe38ae
MD
1478
1479 /*
1480 * Allocate the page directory page, unless we already have
1481 * one cached. If we used the cached page the wire_count will
1482 * already be set appropriately.
1483 */
1484 if ((ptdpg = pmap->pm_pdirm) == NULL) {
0a5c555b 1485 ptdpg = vm_page_grab(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I,
c8fe38ae
MD
1486 VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1487 pmap->pm_pdirm = ptdpg;
1488 vm_page_flag_clear(ptdpg, PG_MAPPED | PG_BUSY);
1489 ptdpg->valid = VM_PAGE_BITS_ALL;
1490 ptdpg->wire_count = 1;
1491 ++vmstats.v_wire_count;
48ffc236 1492 pmap_kenter((vm_offset_t)pmap->pm_pml4, VM_PAGE_TO_PHYS(ptdpg));
c8fe38ae
MD
1493 }
1494 if ((ptdpg->flags & PG_ZERO) == 0)
48ffc236 1495 bzero(pmap->pm_pml4, PAGE_SIZE);
c8fe38ae 1496
48ffc236
JG
1497 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
1498 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
c8fe38ae
MD
1499
1500 /* install self-referential address mapping entry */
48ffc236 1501 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(ptdpg) | PG_V | PG_RW | PG_A | PG_M;
c8fe38ae
MD
1502
1503 pmap->pm_count = 1;
1504 pmap->pm_active = 0;
1505 pmap->pm_ptphint = NULL;
1506 TAILQ_INIT(&pmap->pm_pvlist);
1507 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1508 pmap->pm_stats.resident_count = 1;
d7f50089
YY
1509}
1510
1511/*
c8fe38ae
MD
1512 * Clean up a pmap structure so it can be physically freed. This routine
1513 * is called by the vmspace dtor function. A great deal of pmap data is
1514 * left passively mapped to improve vmspace management so we have a bit
1515 * of cleanup work to do here.
d7f50089
YY
1516 */
1517void
c8fe38ae 1518pmap_puninit(pmap_t pmap)
48ffc236 1519READY1
d7f50089 1520{
c8fe38ae
MD
1521 vm_page_t p;
1522
1523 KKASSERT(pmap->pm_active == 0);
1524 if ((p = pmap->pm_pdirm) != NULL) {
48ffc236
JG
1525 KKASSERT(pmap->pm_pml4 != NULL);
1526 KKASSERT(pmap->pm_pml4 != (PTOV_OFFSET + KPML4phys));
1527 pmap_kremove((vm_offset_t)pmap->pm_pml4);
c8fe38ae
MD
1528 p->wire_count--;
1529 vmstats.v_wire_count--;
1530 KKASSERT((p->flags & PG_BUSY) == 0);
1531 vm_page_busy(p);
1532 vm_page_free_zero(p);
1533 pmap->pm_pdirm = NULL;
1534 }
48ffc236
JG
1535 if (pmap->pm_pml4) {
1536 KKASSERT(pmap->pm_pml4 != (PTOV_OFFSET + KPML4phys));
1537 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1538 pmap->pm_pml4 = NULL;
c8fe38ae
MD
1539 }
1540 if (pmap->pm_pteobj) {
1541 vm_object_deallocate(pmap->pm_pteobj);
1542 pmap->pm_pteobj = NULL;
1543 }
d7f50089
YY
1544}
1545
1546/*
c8fe38ae
MD
1547 * Wire in kernel global address entries. To avoid a race condition
1548 * between pmap initialization and pmap_growkernel, this procedure
1549 * adds the pmap to the master list (which growkernel scans to update),
1550 * then copies the template.
d7f50089
YY
1551 */
1552void
c8fe38ae 1553pmap_pinit2(struct pmap *pmap)
48ffc236 1554READY0
d7f50089 1555{
c8fe38ae
MD
1556 crit_enter();
1557 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
1558 /* XXX copies current process, does not fill in MPPTDI */
48ffc236 1559#if JGPMAP32
c8fe38ae 1560 bcopy(PTD + KPTDI, pmap->pm_pdir + KPTDI, nkpt * PTESIZE);
48ffc236 1561#endif
c8fe38ae 1562 crit_exit();
d7f50089
YY
1563}
1564
1565/*
c8fe38ae
MD
1566 * Attempt to release and free a vm_page in a pmap. Returns 1 on success,
1567 * 0 on failure (if the procedure had to sleep).
d7f50089 1568 *
c8fe38ae
MD
1569 * When asked to remove the page directory page itself, we actually just
1570 * leave it cached so we do not have to incur the SMP inval overhead of
1571 * removing the kernel mapping. pmap_puninit() will take care of it.
d7f50089
YY
1572 */
1573static int
c8fe38ae 1574pmap_release_free_page(struct pmap *pmap, vm_page_t p)
48ffc236 1575READY1
d7f50089 1576{
48ffc236 1577 pml4_entry_t *pml4 = pmap->pm_pml4;
c8fe38ae
MD
1578 /*
1579 * This code optimizes the case of freeing non-busy
1580 * page-table pages. Those pages are zero now, and
1581 * might as well be placed directly into the zero queue.
1582 */
1583 if (vm_page_sleep_busy(p, FALSE, "pmaprl"))
d7f50089 1584 return 0;
d7f50089 1585
c8fe38ae
MD
1586 vm_page_busy(p);
1587
1588 /*
1589 * Remove the page table page from the processes address space.
1590 */
1b2e0b92
JG
1591 if (p->pindex >= (NUPDE + NUPDPE) && p->pindex != (NUPDE + NUPDPE + PML4PML4I)) {
1592 /*
1593 * We are a PDP page.
1594 * We look for the PML4 entry that points to us.
1595 */
1596 vm_page_t m4 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I);
1597 KKASSERT(m4 != NULL);
1598 pml4_entry_t *pml4 = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m4));
1599 int idx = (p->pindex - (NUPDE + NUPDPE)) % NPML4EPG;
1600 KKASSERT(pml4[idx] != 0);
1601 pml4[idx] = 0;
1602 m4->hold_count--;
1603 /* JG What about wire_count? */
1604 } else if (p->pindex >= NUPDE) {
1605 /*
1606 * We are a PD page.
1607 * We look for the PDP entry that points to us.
1608 */
1609 vm_page_t m3 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + (p->pindex - NUPDE) / NPDPEPG);
1610 KKASSERT(m3 != NULL);
1611 pdp_entry_t *pdp = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m3));
1612 int idx = (p->pindex - NUPDE) % NPDPEPG;
1613 KKASSERT(pdp[idx] != 0);
1614 pdp[idx] = 0;
1615 m3->hold_count--;
1616 /* JG What about wire_count? */
1617 } else {
1618 /* We are a PT page.
1619 * We look for the PD entry that points to us.
1620 */
1621 vm_page_t m2 = vm_page_lookup(pmap->pm_pteobj, NUPDE + p->pindex / NPDEPG);
1622 KKASSERT(m2 != NULL);
1623 pd_entry_t *pd = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m2));
1624 int idx = p->pindex % NPDEPG;
1625 pd[idx] = 0;
1626 m2->hold_count--;
1627 /* JG What about wire_count? */
1628 }
c8fe38ae
MD
1629 KKASSERT(pmap->pm_stats.resident_count > 0);
1630 --pmap->pm_stats.resident_count;
1631
1632 if (p->hold_count) {
1633 panic("pmap_release: freeing held page table page");
1634 }
1635 if (pmap->pm_ptphint && (pmap->pm_ptphint->pindex == p->pindex))
1636 pmap->pm_ptphint = NULL;
1637
1b2e0b92
JG
1638 /*
1639 * We leave the top-level page table page cached, wired, and mapped in
1640 * the pmap until the dtor function (pmap_puninit()) gets called.
1641 * However, still clean it up so we can set PG_ZERO.
1642 */
1643 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1644 bzero(pmap->pm_pml4, PAGE_SIZE);
1645 vm_page_flag_set(p, PG_ZERO);
1646 vm_page_wakeup(p);
1647 } else {
1648 p->wire_count--;
1649 vmstats.v_wire_count--;
1650 /* JG eventually revert to using vm_page_free_zero() */
1651 vm_page_free(p);
1652 }
c8fe38ae
MD
1653 return 1;
1654}
d7f50089
YY
1655
1656/*
c8fe38ae
MD
1657 * this routine is called if the page table page is not
1658 * mapped correctly.
d7f50089
YY
1659 */
1660static vm_page_t
c8fe38ae 1661_pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex)
48ffc236 1662READY1
c8fe38ae 1663{
48ffc236 1664 vm_page_t m, pdppg, pdpg;
c8fe38ae
MD
1665
1666 /*
1667 * Find or fabricate a new pagetable page
1668 */
1669 m = vm_page_grab(pmap->pm_pteobj, ptepindex,
1670 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
1671
48ffc236
JG
1672
1673 if ((m->flags & PG_ZERO) == 0) {
1674 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1675 }
1676
c8fe38ae
MD
1677 KASSERT(m->queue == PQ_NONE,
1678 ("_pmap_allocpte: %p->queue != PQ_NONE", m));
1679
1680 /*
1681 * Increment the hold count for the page we will be returning to
1682 * the caller.
1683 */
1684 m->hold_count++;
1685
1686 /*
1687 * It is possible that someone else got in and mapped by the page
1688 * directory page while we were blocked, if so just unbusy and
1689 * return the held page.
1690 */
48ffc236 1691#if JGPMAP32
c8fe38ae
MD
1692 if ((ptepa = pmap->pm_pdir[ptepindex]) != 0) {
1693 KKASSERT((ptepa & PG_FRAME) == VM_PAGE_TO_PHYS(m));
1694 vm_page_wakeup(m);
1695 return(m);
1696 }
48ffc236 1697#endif
c8fe38ae
MD
1698
1699 if (m->wire_count == 0)
1700 vmstats.v_wire_count++;
1701 m->wire_count++;
1702
1703
1704 /*
1705 * Map the pagetable page into the process address space, if
1706 * it isn't already there.
1707 */
1708
1709 ++pmap->pm_stats.resident_count;
1710
48ffc236 1711#if JGPMAP32
c8fe38ae
MD
1712 ptepa = VM_PAGE_TO_PHYS(m);
1713 pmap->pm_pdir[ptepindex] =
1714 (pd_entry_t) (ptepa | PG_U | PG_RW | PG_V | PG_A | PG_M);
48ffc236
JG
1715#endif
1716 if (ptepindex >= (NUPDE + NUPDPE)) {
1717 pml4_entry_t *pml4;
1718 vm_pindex_t pml4index;
1719
3535204a 1720 /* Wire up a new PDP page */
48ffc236
JG
1721 pml4index = ptepindex - (NUPDE + NUPDPE);
1722 pml4 = &pmap->pm_pml4[pml4index];
1723 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
1724
1725 } else if (ptepindex >= NUPDE) {
1726 vm_pindex_t pml4index;
1727 vm_pindex_t pdpindex;
1728 pml4_entry_t *pml4;
1729 pdp_entry_t *pdp;
1730
3535204a 1731 /* Wire up a new PD page */
48ffc236
JG
1732 pdpindex = ptepindex - NUPDE;
1733 pml4index = pdpindex >> NPML4EPGSHIFT;
1734
1735 pml4 = &pmap->pm_pml4[pml4index];
1736 if ((*pml4 & PG_V) == 0) {
9f5109e6 1737 /* Have to allocate a new PDP page, recurse */
48ffc236
JG
1738 if (_pmap_allocpte(pmap, NUPDE + NUPDPE + pml4index)
1739 == NULL) {
1740 --m->wire_count;
1741 vm_page_free(m);
1742 return (NULL);
1743 }
1744 } else {
9f5109e6 1745 /* Add reference to the PDP page */
48ffc236 1746 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
1b2e0b92 1747 pdppg->hold_count++;
48ffc236
JG
1748 }
1749 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
c8fe38ae 1750
48ffc236
JG
1751 /* Now find the pdp page */
1752 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1b2e0b92 1753 KKASSERT(*pdp == 0); /* JG DEBUG64 */
48ffc236 1754 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
c8fe38ae 1755
48ffc236
JG
1756 } else {
1757 vm_pindex_t pml4index;
1758 vm_pindex_t pdpindex;
1759 pml4_entry_t *pml4;
1760 pdp_entry_t *pdp;
1761 pd_entry_t *pd;
1762
3535204a 1763 /* Wire up a new PT page */
48ffc236
JG
1764 pdpindex = ptepindex >> NPDPEPGSHIFT;
1765 pml4index = pdpindex >> NPML4EPGSHIFT;
1766
1767 /* First, find the pdp and check that its valid. */
1768 pml4 = &pmap->pm_pml4[pml4index];
1769 if ((*pml4 & PG_V) == 0) {
9f5109e6
JG
1770 /* We miss a PDP page. We ultimately need a PD page.
1771 * Recursively allocating a PD page will allocate
1772 * the missing PDP page and will also allocate
1773 * the PD page we need.
1774 */
1775 /* Have to allocate a new PD page, recurse */
48ffc236
JG
1776 if (_pmap_allocpte(pmap, NUPDE + pdpindex)
1777 == NULL) {
1778 --m->wire_count;
1779 vm_page_free(m);
1780 return (NULL);
1781 }
1782 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1783 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
c8fe38ae 1784 } else {
48ffc236
JG
1785 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1786 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1787 if ((*pdp & PG_V) == 0) {
9f5109e6 1788 /* Have to allocate a new PD page, recurse */
48ffc236
JG
1789 if (_pmap_allocpte(pmap, NUPDE + pdpindex)
1790 == NULL) {
1791 --m->wire_count;
1792 vm_page_free(m);
1793 return (NULL);
1794 }
1795 } else {
9f5109e6 1796 /* Add reference to the PD page */
48ffc236 1797 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1b2e0b92 1798 pdpg->hold_count++;
48ffc236 1799 }
c8fe38ae 1800 }
48ffc236
JG
1801 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
1802
1803 /* Now we know where the page directory page is */
1804 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
1b2e0b92 1805 KKASSERT(*pd == 0); /* JG DEBUG64 */
48ffc236 1806 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
c8fe38ae
MD
1807 }
1808
48ffc236
JG
1809
1810 /*
1811 * Set the page table hint
1812 */
1813 pmap->pm_ptphint = m;
1814
c8fe38ae
MD
1815 m->valid = VM_PAGE_BITS_ALL;
1816 vm_page_flag_clear(m, PG_ZERO);
1817 vm_page_flag_set(m, PG_MAPPED);
1818 vm_page_wakeup(m);
1819
1820 return m;
1821}
1822
1823static vm_page_t
1824pmap_allocpte(pmap_t pmap, vm_offset_t va)
48ffc236 1825READY1
d7f50089 1826{
c8fe38ae 1827 vm_pindex_t ptepindex;
48ffc236 1828 pd_entry_t *pd;
c8fe38ae
MD
1829 vm_page_t m;
1830
1831 /*
1832 * Calculate pagetable page index
1833 */
48ffc236 1834 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
1835
1836 /*
1837 * Get the page directory entry
1838 */
48ffc236 1839 pd = pmap_pde(pmap, va);
c8fe38ae
MD
1840
1841 /*
48ffc236 1842 * This supports switching from a 2MB page to a
c8fe38ae
MD
1843 * normal 4K page.
1844 */
48ffc236 1845 if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
1b2e0b92 1846 panic("no promotion/demotion yet");
48ffc236
JG
1847 *pd = 0;
1848 pd = NULL;
c8fe38ae
MD
1849 cpu_invltlb();
1850 smp_invltlb();
1851 }
1852
1853 /*
1854 * If the page table page is mapped, we just increment the
1855 * hold count, and activate it.
1856 */
48ffc236
JG
1857 if (pd != NULL && (*pd & PG_V) != 0) {
1858 /* YYY hint is used here on i386 */
1859 m = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
1860 pmap->pm_ptphint = m;
c8fe38ae
MD
1861 m->hold_count++;
1862 return m;
1863 }
1864 /*
1865 * Here if the pte page isn't mapped, or if it has been deallocated.
1866 */
1867 return _pmap_allocpte(pmap, ptepindex);
d7f50089
YY
1868}
1869
c8fe38ae
MD
1870
1871/***************************************************
1872 * Pmap allocation/deallocation routines.
1873 ***************************************************/
1874
d7f50089 1875/*
c8fe38ae
MD
1876 * Release any resources held by the given physical map.
1877 * Called when a pmap initialized by pmap_pinit is being released.
1878 * Should only be called if the map contains no valid mappings.
d7f50089 1879 */
c8fe38ae 1880static int pmap_release_callback(struct vm_page *p, void *data);
d7f50089 1881
c8fe38ae
MD
1882void
1883pmap_release(struct pmap *pmap)
48ffc236 1884READY1
d7f50089 1885{
c8fe38ae
MD
1886 vm_object_t object = pmap->pm_pteobj;
1887 struct rb_vm_page_scan_info info;
1888
1889 KASSERT(pmap->pm_active == 0, ("pmap still active! %08x", pmap->pm_active));
1890#if defined(DIAGNOSTIC)
1891 if (object->ref_count != 1)
1892 panic("pmap_release: pteobj reference count != 1");
1893#endif
1894
1895 info.pmap = pmap;
1896 info.object = object;
1897 crit_enter();
1898 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1899 crit_exit();
1900
1901 do {
1902 crit_enter();
1903 info.error = 0;
1904 info.mpte = NULL;
1905 info.limit = object->generation;
1906
1907 vm_page_rb_tree_RB_SCAN(&object->rb_memq, NULL,
1908 pmap_release_callback, &info);
1909 if (info.error == 0 && info.mpte) {
1910 if (!pmap_release_free_page(pmap, info.mpte))
1911 info.error = 1;
1912 }
1913 crit_exit();
1914 } while (info.error);
d7f50089
YY
1915}
1916
d7f50089 1917static int
c8fe38ae 1918pmap_release_callback(struct vm_page *p, void *data)
48ffc236 1919READY1
d7f50089 1920{
c8fe38ae
MD
1921 struct rb_vm_page_scan_info *info = data;
1922
0a5c555b 1923 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
c8fe38ae
MD
1924 info->mpte = p;
1925 return(0);
1926 }
1927 if (!pmap_release_free_page(info->pmap, p)) {
1928 info->error = 1;
1929 return(-1);
1930 }
1931 if (info->object->generation != info->limit) {
1932 info->error = 1;
1933 return(-1);
1934 }
1935 return(0);
d7f50089
YY
1936}
1937
1938/*
c8fe38ae 1939 * Grow the number of kernel page table entries, if needed.
d7f50089 1940 */
c8fe38ae
MD
1941
1942void
1943pmap_growkernel(vm_offset_t addr)
48ffc236 1944READY1
d7f50089 1945{
48ffc236 1946 vm_paddr_t paddr;
c8fe38ae
MD
1947 struct pmap *pmap;
1948 vm_offset_t ptppaddr;
1949 vm_page_t nkpg;
48ffc236
JG
1950 pd_entry_t *pde, newpdir;
1951 pdp_entry_t newpdp;
c8fe38ae
MD
1952
1953 crit_enter();
1954 if (kernel_vm_end == 0) {
1955 kernel_vm_end = KERNBASE;
1956 nkpt = 0;
48ffc236 1957 while ((*pmap_pde(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
c8fe38ae
MD
1958 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1959 nkpt++;
48ffc236
JG
1960 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1961 kernel_vm_end = kernel_map.max_offset;
1962 break;
1963 }
c8fe38ae
MD
1964 }
1965 }
48ffc236
JG
1966 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1967 if (addr - 1 >= kernel_map.max_offset)
1968 addr = kernel_map.max_offset;
c8fe38ae 1969 while (kernel_vm_end < addr) {
48ffc236
JG
1970 pde = pmap_pde(&kernel_pmap, kernel_vm_end);
1971 if (pde == NULL) {
1972 /* We need a new PDP entry */
1973 nkpg = vm_page_alloc(kptobj, nkpt,
1974 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM
1975 | VM_ALLOC_INTERRUPT);
1976 if (nkpg == NULL)
1977 panic("pmap_growkernel: no memory to grow kernel");
1978 if ((nkpg->flags & PG_ZERO) == 0)
1979 pmap_zero_page(nkpg);
1980 paddr = VM_PAGE_TO_PHYS(nkpg);
1981 newpdp = (pdp_entry_t)
1982 (paddr | PG_V | PG_RW | PG_A | PG_M);
1983 *pmap_pdpe(&kernel_pmap, kernel_vm_end) = newpdp;
1984 continue; /* try again */
1985 }
1986 if ((*pde & PG_V) != 0) {
c8fe38ae 1987 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
48ffc236
JG
1988 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1989 kernel_vm_end = kernel_map.max_offset;
1990 break;
1991 }
c8fe38ae
MD
1992 continue;
1993 }
1994
1995 /*
1996 * This index is bogus, but out of the way
1997 */
48ffc236 1998 nkpg = vm_page_alloc(kptobj, nkpt,
c8fe38ae
MD
1999 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM | VM_ALLOC_INTERRUPT);
2000 if (nkpg == NULL)
2001 panic("pmap_growkernel: no memory to grow kernel");
2002
2003 vm_page_wire(nkpg);
2004 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
2005 pmap_zero_page(ptppaddr);
2006 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
c8fe38ae
MD
2007 *pmap_pde(&kernel_pmap, kernel_vm_end) = newpdir;
2008 nkpt++;
2009
48ffc236
JG
2010 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
2011 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
2012 kernel_vm_end = kernel_map.max_offset;
2013 break;
c8fe38ae 2014 }
c8fe38ae
MD
2015 }
2016 crit_exit();
d7f50089
YY
2017}
2018
2019/*
c8fe38ae
MD
2020 * Retire the given physical map from service.
2021 * Should only be called if the map contains
2022 * no valid mappings.
d7f50089 2023 */
c8fe38ae
MD
2024void
2025pmap_destroy(pmap_t pmap)
48ffc236 2026READY0
d7f50089 2027{
c8fe38ae
MD
2028 int count;
2029
2030 if (pmap == NULL)
2031 return;
2032
2033 count = --pmap->pm_count;
2034 if (count == 0) {
2035 pmap_release(pmap);
2036 panic("destroying a pmap is not yet implemented");
2037 }
d7f50089
YY
2038}
2039
2040/*
c8fe38ae 2041 * Add a reference to the specified pmap.
d7f50089 2042 */
c8fe38ae
MD
2043void
2044pmap_reference(pmap_t pmap)
48ffc236 2045READY2
d7f50089 2046{
c8fe38ae
MD
2047 if (pmap != NULL) {
2048 pmap->pm_count++;
2049 }
d7f50089
YY
2050}
2051
c8fe38ae
MD
2052/***************************************************
2053* page management routines.
2054 ***************************************************/
d7f50089
YY
2055
2056/*
2057 * free the pv_entry back to the free list. This function may be
2058 * called from an interrupt.
2059 */
c8fe38ae 2060static PMAP_INLINE void
d7f50089 2061free_pv_entry(pv_entry_t pv)
48ffc236 2062READY2
d7f50089 2063{
c8fe38ae 2064 pv_entry_count--;
48ffc236 2065 KKASSERT(pv_entry_count >= 0);
c8fe38ae 2066 zfree(pvzone, pv);
d7f50089
YY
2067}
2068
2069/*
2070 * get a new pv_entry, allocating a block from the system
2071 * when needed. This function may be called from an interrupt.
2072 */
2073static pv_entry_t
2074get_pv_entry(void)
48ffc236 2075READY2
d7f50089 2076{
c8fe38ae
MD
2077 pv_entry_count++;
2078 if (pv_entry_high_water &&
48ffc236
JG
2079 (pv_entry_count > pv_entry_high_water) &&
2080 (pmap_pagedaemon_waken == 0)) {
c8fe38ae 2081 pmap_pagedaemon_waken = 1;
48ffc236 2082 wakeup(&vm_pages_needed);
c8fe38ae
MD
2083 }
2084 return zalloc(pvzone);
d7f50089
YY
2085}
2086
2087/*
2088 * This routine is very drastic, but can save the system
2089 * in a pinch.
2090 */
2091void
2092pmap_collect(void)
48ffc236 2093READY0
d7f50089 2094{
c8fe38ae
MD
2095 int i;
2096 vm_page_t m;
2097 static int warningdone=0;
2098
2099 if (pmap_pagedaemon_waken == 0)
2100 return;
2101
2102 if (warningdone < 5) {
2103 kprintf("pmap_collect: collecting pv entries -- suggest increasing PMAP_SHPGPERPROC\n");
2104 warningdone++;
2105 }
2106
2107 for(i = 0; i < vm_page_array_size; i++) {
2108 m = &vm_page_array[i];
2109 if (m->wire_count || m->hold_count || m->busy ||
2110 (m->flags & PG_BUSY))
2111 continue;
2112 pmap_remove_all(m);
2113 }
48ffc236 2114 pmap_pagedaemon_waken = 0;
d7f50089
YY
2115}
2116
c8fe38ae 2117
d7f50089
YY
2118/*
2119 * If it is the first entry on the list, it is actually
2120 * in the header and we must copy the following entry up
2121 * to the header. Otherwise we must search the list for
2122 * the entry. In either case we free the now unused entry.
2123 */
2124static int
c8fe38ae
MD
2125pmap_remove_entry(struct pmap *pmap, vm_page_t m,
2126 vm_offset_t va, pmap_inval_info_t info)
48ffc236 2127READY1
c8fe38ae
MD
2128{
2129 pv_entry_t pv;
2130 int rtval;
2131
2132 crit_enter();
2133 if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
2134 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2135 if (pmap == pv->pv_pmap && va == pv->pv_va)
2136 break;
2137 }
2138 } else {
2139 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
2140 if (va == pv->pv_va)
2141 break;
2142 }
2143 }
2144
2145 rtval = 0;
48ffc236 2146 /* JGXXX When can 'pv' be NULL? */
c8fe38ae
MD
2147 if (pv) {
2148 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2149 m->md.pv_list_count--;
48ffc236 2150 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2151 if (TAILQ_EMPTY(&m->md.pv_list))
2152 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2153 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
2154 ++pmap->pm_generation;
2155 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem, info);
2156 free_pv_entry(pv);
2157 }
2158 crit_exit();
2159 return rtval;
d7f50089
YY
2160}
2161
2162/*
c8fe38ae
MD
2163 * Create a pv entry for page at pa for
2164 * (pmap, va).
d7f50089
YY
2165 */
2166static void
2167pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m)
48ffc236 2168READY1
d7f50089 2169{
c8fe38ae
MD
2170 pv_entry_t pv;
2171
2172 crit_enter();
2173 pv = get_pv_entry();
2174 pv->pv_va = va;
2175 pv->pv_pmap = pmap;
2176 pv->pv_ptem = mpte;
2177
2178 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
2179 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2180 m->md.pv_list_count++;
2181
2182 crit_exit();
d7f50089
YY
2183}
2184
2185/*
2186 * pmap_remove_pte: do the things to unmap a page in a process
2187 */
2188static int
c8fe38ae
MD
2189pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
2190 pmap_inval_info_t info)
48ffc236 2191READY1
c8fe38ae
MD
2192{
2193 pt_entry_t oldpte;
2194 vm_page_t m;
2195
2196 pmap_inval_add(info, pmap, va);
2197 oldpte = pte_load_clear(ptq);
2198 if (oldpte & PG_W)
2199 pmap->pm_stats.wired_count -= 1;
2200 /*
2201 * Machines that don't support invlpg, also don't support
2202 * PG_G. XXX PG_G is disabled for SMP so don't worry about
2203 * the SMP case.
2204 */
2205 if (oldpte & PG_G)
2206 cpu_invlpg((void *)va);
2207 KKASSERT(pmap->pm_stats.resident_count > 0);
2208 --pmap->pm_stats.resident_count;
2209 if (oldpte & PG_MANAGED) {
2210 m = PHYS_TO_VM_PAGE(oldpte);
2211 if (oldpte & PG_M) {
2212#if defined(PMAP_DIAGNOSTIC)
2213 if (pmap_nw_modified((pt_entry_t) oldpte)) {
2214 kprintf(
48ffc236 2215 "pmap_remove: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2216 va, oldpte);
2217 }
2218#endif
2219 if (pmap_track_modified(va))
2220 vm_page_dirty(m);
2221 }
2222 if (oldpte & PG_A)
2223 vm_page_flag_set(m, PG_REFERENCED);
2224 return pmap_remove_entry(pmap, m, va, info);
2225 } else {
2226 return pmap_unuse_pt(pmap, va, NULL, info);
2227 }
2228
d7f50089
YY
2229 return 0;
2230}
2231
2232/*
2233 * pmap_remove_page:
2234 *
2235 * Remove a single page from a process address space.
2236 *
2237 * This function may not be called from an interrupt if the pmap is
2238 * not kernel_pmap.
2239 */
2240static void
c8fe38ae 2241pmap_remove_page(struct pmap *pmap, vm_offset_t va, pmap_inval_info_t info)
48ffc236 2242READY1
c8fe38ae 2243{
48ffc236 2244 pt_entry_t *pte;
c8fe38ae 2245
48ffc236
JG
2246 pte = pmap_pte(pmap, va);
2247 if (pte == NULL)
2248 return;
2249 if ((*pte & PG_V) == 0)
2250 return;
2251 pmap_remove_pte(pmap, pte, va, info);
d7f50089
YY
2252}
2253
2254/*
2255 * pmap_remove:
2256 *
2257 * Remove the given range of addresses from the specified map.
2258 *
2259 * It is assumed that the start and end are properly
2260 * rounded to the page size.
2261 *
2262 * This function may not be called from an interrupt if the pmap is
2263 * not kernel_pmap.
2264 */
2265void
2266pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
48ffc236 2267READY1
d7f50089 2268{
48ffc236
JG
2269 vm_offset_t va_next;
2270 pml4_entry_t *pml4e;
2271 pdp_entry_t *pdpe;
2272 pd_entry_t ptpaddr, *pde;
2273 pt_entry_t *pte;
c8fe38ae
MD
2274 struct pmap_inval_info info;
2275
2276 if (pmap == NULL)
2277 return;
2278
2279 if (pmap->pm_stats.resident_count == 0)
2280 return;
2281
2282 pmap_inval_init(&info);
2283
2284 /*
2285 * special handling of removing one page. a very
2286 * common operation and easy to short circuit some
2287 * code.
2288 */
48ffc236
JG
2289 if (sva + PAGE_SIZE == eva) {
2290 pde = pmap_pde(pmap, sva);
2291 if (pde && (*pde & PG_PS) == 0) {
2292 pmap_remove_page(pmap, sva, &info);
2293 pmap_inval_flush(&info);
2294 return;
2295 }
c8fe38ae
MD
2296 }
2297
48ffc236
JG
2298 for (; sva < eva; sva = va_next) {
2299 pml4e = pmap_pml4e(pmap, sva);
2300 if ((*pml4e & PG_V) == 0) {
2301 va_next = (sva + NBPML4) & ~PML4MASK;
2302 if (va_next < sva)
2303 va_next = eva;
2304 continue;
2305 }
c8fe38ae 2306
48ffc236
JG
2307 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2308 if ((*pdpe & PG_V) == 0) {
2309 va_next = (sva + NBPDP) & ~PDPMASK;
2310 if (va_next < sva)
2311 va_next = eva;
2312 continue;
2313 }
c8fe38ae
MD
2314
2315 /*
2316 * Calculate index for next page table.
2317 */
48ffc236
JG
2318 va_next = (sva + NBPDR) & ~PDRMASK;
2319 if (va_next < sva)
2320 va_next = eva;
c8fe38ae 2321
48ffc236
JG
2322 pde = pmap_pdpe_to_pde(pdpe, sva);
2323 ptpaddr = *pde;
c8fe38ae
MD
2324
2325 /*
48ffc236 2326 * Weed out invalid mappings.
c8fe38ae
MD
2327 */
2328 if (ptpaddr == 0)
2329 continue;
2330
48ffc236
JG
2331 /*
2332 * Check for large page.
2333 */
2334 if ((ptpaddr & PG_PS) != 0) {
2335 /* JG FreeBSD has more complex treatment here */
2336 pmap_inval_add(&info, pmap, -1);
2337 *pde = 0;
2338 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2339 continue;
2340 }
2341
c8fe38ae
MD
2342 /*
2343 * Limit our scan to either the end of the va represented
2344 * by the current page table page, or to the end of the
2345 * range being removed.
2346 */
48ffc236
JG
2347 if (va_next > eva)
2348 va_next = eva;
c8fe38ae
MD
2349
2350 /*
2351 * NOTE: pmap_remove_pte() can block.
2352 */
48ffc236
JG
2353 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2354 sva += PAGE_SIZE) {
2355 if (*pte == 0)
c8fe38ae 2356 continue;
48ffc236 2357 if (pmap_remove_pte(pmap, pte, sva, &info))
c8fe38ae
MD
2358 break;
2359 }
2360 }
2361 pmap_inval_flush(&info);
d7f50089
YY
2362}
2363
2364/*
2365 * pmap_remove_all:
2366 *
c8fe38ae
MD
2367 * Removes this physical page from all physical maps in which it resides.
2368 * Reflects back modify bits to the pager.
d7f50089 2369 *
c8fe38ae 2370 * This routine may not be called from an interrupt.
d7f50089 2371 */
c8fe38ae 2372
d7f50089
YY
2373static void
2374pmap_remove_all(vm_page_t m)
48ffc236 2375READY1
d7f50089 2376{
c8fe38ae
MD
2377 struct pmap_inval_info info;
2378 pt_entry_t *pte, tpte;
2379 pv_entry_t pv;
2380
2381 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2382 return;
2383
2384 pmap_inval_init(&info);
2385 crit_enter();
2386 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2387 KKASSERT(pv->pv_pmap->pm_stats.resident_count > 0);
2388 --pv->pv_pmap->pm_stats.resident_count;
2389
2390 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
2391 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
2392 tpte = pte_load_clear(pte);
2393
2394 if (tpte & PG_W)
2395 pv->pv_pmap->pm_stats.wired_count--;
2396
2397 if (tpte & PG_A)
2398 vm_page_flag_set(m, PG_REFERENCED);
2399
2400 /*
2401 * Update the vm_page_t clean and reference bits.
2402 */
2403 if (tpte & PG_M) {
2404#if defined(PMAP_DIAGNOSTIC)
48ffc236 2405 if (pmap_nw_modified(tpte)) {
c8fe38ae 2406 kprintf(
48ffc236 2407 "pmap_remove_all: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2408 pv->pv_va, tpte);
2409 }
2410#endif
2411 if (pmap_track_modified(pv->pv_va))
2412 vm_page_dirty(m);
2413 }
2414 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2415 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist);
2416 ++pv->pv_pmap->pm_generation;
2417 m->md.pv_list_count--;
48ffc236 2418 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2419 if (TAILQ_EMPTY(&m->md.pv_list))
2420 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2421 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem, &info);
2422 free_pv_entry(pv);
2423 }
2424 crit_exit();
2425 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
2426 pmap_inval_flush(&info);
d7f50089
YY
2427}
2428
2429/*
2430 * pmap_protect:
2431 *
2432 * Set the physical protection on the specified range of this map
2433 * as requested.
2434 *
2435 * This function may not be called from an interrupt if the map is
2436 * not the kernel_pmap.
2437 */
2438void
2439pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
48ffc236 2440READY1
d7f50089 2441{
48ffc236
JG
2442 vm_offset_t va_next;
2443 pml4_entry_t *pml4e;
2444 pdp_entry_t *pdpe;
2445 pd_entry_t ptpaddr, *pde;
2446 pt_entry_t *pte;
c8fe38ae
MD
2447 pmap_inval_info info;
2448
48ffc236
JG
2449 /* JG review for NX */
2450
c8fe38ae
MD
2451 if (pmap == NULL)
2452 return;
2453
2454 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2455 pmap_remove(pmap, sva, eva);
2456 return;
2457 }
2458
2459 if (prot & VM_PROT_WRITE)
2460 return;
2461
2462 pmap_inval_init(&info);
2463
48ffc236 2464 for (; sva < eva; sva = va_next) {
c8fe38ae 2465
48ffc236
JG
2466 pml4e = pmap_pml4e(pmap, sva);
2467 if ((*pml4e & PG_V) == 0) {
2468 va_next = (sva + NBPML4) & ~PML4MASK;
2469 if (va_next < sva)
2470 va_next = eva;
2471 continue;
2472 }
c8fe38ae 2473
48ffc236
JG
2474 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2475 if ((*pdpe & PG_V) == 0) {
2476 va_next = (sva + NBPDP) & ~PDPMASK;
2477 if (va_next < sva)
2478 va_next = eva;
2479 continue;
2480 }
c8fe38ae 2481
48ffc236
JG
2482 va_next = (sva + NBPDR) & ~PDRMASK;
2483 if (va_next < sva)
2484 va_next = eva;
c8fe38ae 2485
48ffc236
JG
2486 pde = pmap_pdpe_to_pde(pdpe, sva);
2487 ptpaddr = *pde;
c8fe38ae 2488
48ffc236
JG
2489 /*
2490 * Check for large page.
2491 */
2492 if ((ptpaddr & PG_PS) != 0) {
c8fe38ae 2493 pmap_inval_add(&info, pmap, -1);
48ffc236 2494 *pde &= ~(PG_M|PG_RW);
c8fe38ae
MD
2495 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2496 continue;
2497 }
2498
2499 /*
2500 * Weed out invalid mappings. Note: we assume that the page
2501 * directory table is always allocated, and in kernel virtual.
2502 */
2503 if (ptpaddr == 0)
2504 continue;
2505
48ffc236
JG
2506 if (va_next > eva)
2507 va_next = eva;
c8fe38ae 2508
48ffc236
JG
2509 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2510 sva += PAGE_SIZE) {
2511 pt_entry_t obits, pbits;
c8fe38ae
MD
2512 vm_page_t m;
2513
2514 /*
2515 * XXX non-optimal. Note also that there can be
2516 * no pmap_inval_flush() calls until after we modify
2517 * ptbase[sindex] (or otherwise we have to do another
2518 * pmap_inval_add() call).
2519 */
48ffc236
JG
2520 pmap_inval_add(&info, pmap, sva);
2521 obits = pbits = *pte;
2522 if ((pbits & PG_V) == 0)
2523 continue;
c8fe38ae
MD
2524 if (pbits & PG_MANAGED) {
2525 m = NULL;
2526 if (pbits & PG_A) {
48ffc236 2527 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2528 vm_page_flag_set(m, PG_REFERENCED);
2529 pbits &= ~PG_A;
2530 }
2531 if (pbits & PG_M) {
48ffc236 2532 if (pmap_track_modified(sva)) {
c8fe38ae 2533 if (m == NULL)
3cfe1a9f 2534 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2535 vm_page_dirty(m);
2536 pbits &= ~PG_M;
2537 }
2538 }
2539 }
2540
2541 pbits &= ~PG_RW;
2542
48ffc236
JG
2543 if (pbits != obits) {
2544 *pte = pbits;
c8fe38ae
MD
2545 }
2546 }
2547 }
2548 pmap_inval_flush(&info);
d7f50089
YY
2549}
2550
2551/*
c8fe38ae
MD
2552 * Insert the given physical page (p) at
2553 * the specified virtual address (v) in the
2554 * target physical map with the protection requested.
d7f50089 2555 *
c8fe38ae
MD
2556 * If specified, the page will be wired down, meaning
2557 * that the related pte can not be reclaimed.
d7f50089 2558 *
c8fe38ae
MD
2559 * NB: This is the only routine which MAY NOT lazy-evaluate
2560 * or lose information. That is, this routine must actually
2561 * insert this page into the given map NOW.
d7f50089
YY
2562 */
2563void
2564pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2565 boolean_t wired)
48ffc236 2566READY1
d7f50089 2567{
c8fe38ae 2568 vm_paddr_t pa;
48ffc236 2569 pd_entry_t *pde;
c8fe38ae
MD
2570 pt_entry_t *pte;
2571 vm_paddr_t opa;
48ffc236 2572 pt_entry_t origpte, newpte;
c8fe38ae
MD
2573 vm_page_t mpte;
2574 pmap_inval_info info;
2575
2576 if (pmap == NULL)
2577 return;
2578
48ffc236 2579 va = trunc_page(va);
c8fe38ae
MD
2580#ifdef PMAP_DIAGNOSTIC
2581 if (va >= KvaEnd)
2582 panic("pmap_enter: toobig");
2583 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
48ffc236 2584 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
c8fe38ae
MD
2585#endif
2586 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2587 kprintf("Warning: pmap_enter called on UVA with kernel_pmap\n");
48ffc236
JG
2588#ifdef DDB
2589 db_print_backtrace();
2590#endif
c8fe38ae
MD
2591 }
2592 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2593 kprintf("Warning: pmap_enter called on KVA without kernel_pmap\n");
48ffc236
JG
2594#ifdef DDB
2595 db_print_backtrace();
2596#endif
c8fe38ae
MD
2597 }
2598
2599 /*
2600 * In the case that a page table page is not
2601 * resident, we are creating it here.
2602 */
48ffc236 2603 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2604 mpte = pmap_allocpte(pmap, va);
2605 else
2606 mpte = NULL;
2607
2608 pmap_inval_init(&info);
48ffc236
JG
2609 pde = pmap_pde(pmap, va);
2610 if (pde != NULL && (*pde & PG_V) != 0) {
2611 if ((*pde & PG_PS) != 0)
2612 panic("pmap_enter: attempted pmap_enter on 2MB page");
2613 pte = pmap_pde_to_pte(pde, va);
2614 } else
2615 panic("pmap_enter: invalid page directory va=%#lx", va);
2616
2617 KKASSERT(pte != NULL);
2618 pa = VM_PAGE_TO_PHYS(m);
48ffc236 2619 origpte = *pte;
c8fe38ae
MD
2620 opa = origpte & PG_FRAME;
2621
c8fe38ae
MD
2622 /*
2623 * Mapping has not changed, must be protection or wiring change.
2624 */
2625 if (origpte && (opa == pa)) {
2626 /*
2627 * Wiring change, just update stats. We don't worry about
2628 * wiring PT pages as they remain resident as long as there
2629 * are valid mappings in them. Hence, if a user page is wired,
2630 * the PT page will be also.
2631 */
2632 if (wired && ((origpte & PG_W) == 0))
2633 pmap->pm_stats.wired_count++;
2634 else if (!wired && (origpte & PG_W))
2635 pmap->pm_stats.wired_count--;
2636
2637#if defined(PMAP_DIAGNOSTIC)
48ffc236 2638 if (pmap_nw_modified(origpte)) {
c8fe38ae 2639 kprintf(
48ffc236 2640 "pmap_enter: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2641 va, origpte);
2642 }
2643#endif
2644
2645 /*
2646 * Remove the extra pte reference. Note that we cannot
2647 * optimize the RO->RW case because we have adjusted the
2648 * wiring count above and may need to adjust the wiring
2649 * bits below.
2650 */
2651 if (mpte)
2652 mpte->hold_count--;
2653
2654 /*
2655 * We might be turning off write access to the page,
2656 * so we go ahead and sense modify status.
2657 */
2658 if (origpte & PG_MANAGED) {
2659 if ((origpte & PG_M) && pmap_track_modified(va)) {
2660 vm_page_t om;
2661 om = PHYS_TO_VM_PAGE(opa);
2662 vm_page_dirty(om);
2663 }
2664 pa |= PG_MANAGED;
2665 KKASSERT(m->flags & PG_MAPPED);
2666 }
2667 goto validate;
2668 }
2669 /*
2670 * Mapping has changed, invalidate old range and fall through to
2671 * handle validating new mapping.
2672 */
2673 if (opa) {
2674 int err;
2675 err = pmap_remove_pte(pmap, pte, va, &info);
2676 if (err)
48ffc236 2677 panic("pmap_enter: pte vanished, va: 0x%lx", va);
c8fe38ae
MD
2678 }
2679
2680 /*
2681 * Enter on the PV list if part of our managed memory. Note that we
2682 * raise IPL while manipulating pv_table since pmap_enter can be
2683 * called at interrupt time.
2684 */
2685 if (pmap_initialized &&
2686 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2687 pmap_insert_entry(pmap, va, mpte, m);
2688 pa |= PG_MANAGED;
2689 vm_page_flag_set(m, PG_MAPPED);
2690 }
2691
2692 /*
2693 * Increment counters
2694 */
2695 ++pmap->pm_stats.resident_count;
2696 if (wired)
2697 pmap->pm_stats.wired_count++;
2698
2699validate:
2700 /*
2701 * Now validate mapping with desired protection/wiring.
2702 */
48ffc236 2703 newpte = (pt_entry_t) (pa | pte_prot(pmap, prot) | PG_V);
c8fe38ae
MD
2704
2705 if (wired)
2706 newpte |= PG_W;
48ffc236 2707 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2708 newpte |= PG_U;
2709 if (pmap == &kernel_pmap)
2710 newpte |= pgeflag;
2711
2712 /*
2713 * if the mapping or permission bits are different, we need
2714 * to update the pte.
2715 */
2716 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2717 pmap_inval_add(&info, pmap, va);
2718 *pte = newpte | PG_A;
2719 if (newpte & PG_RW)
2720 vm_page_flag_set(m, PG_WRITEABLE);
2721 }
2722 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
2723 pmap_inval_flush(&info);
d7f50089
YY
2724}
2725
2726/*
c8fe38ae
MD
2727 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
2728 * This code also assumes that the pmap has no pre-existing entry for this
2729 * VA.
d7f50089 2730 *
c8fe38ae 2731 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 2732 */
c8fe38ae
MD
2733static void
2734pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
48ffc236 2735READY1
d7f50089 2736{
c8fe38ae
MD
2737 pt_entry_t *pte;
2738 vm_paddr_t pa;
2739 vm_page_t mpte;
2740 vm_pindex_t ptepindex;
48ffc236 2741 pd_entry_t *ptepa;
c8fe38ae
MD
2742 pmap_inval_info info;
2743
2744 pmap_inval_init(&info);
2745
2746 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2747 kprintf("Warning: pmap_enter_quick called on UVA with kernel_pmap\n");
48ffc236
JG
2748#ifdef DDB
2749 db_print_backtrace();
2750#endif
c8fe38ae
MD
2751 }
2752 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2753 kprintf("Warning: pmap_enter_quick called on KVA without kernel_pmap\n");
48ffc236
JG
2754#ifdef DDB
2755 db_print_backtrace();
2756#endif
c8fe38ae
MD
2757 }
2758
2759 KKASSERT(va < UPT_MIN_ADDRESS); /* assert used on user pmaps only */
2760
2761 /*
2762 * Calculate the page table page (mpte), allocating it if necessary.
2763 *
2764 * A held page table page (mpte), or NULL, is passed onto the
2765 * section following.
2766 */
48ffc236 2767 if (va < VM_MAX_USER_ADDRESS) {
c8fe38ae
MD
2768 /*
2769 * Calculate pagetable page index
2770 */
48ffc236 2771 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
2772
2773 do {
2774 /*
2775 * Get the page directory entry
2776 */
48ffc236 2777 ptepa = pmap_pde(pmap, va);
c8fe38ae
MD
2778
2779 /*
2780 * If the page table page is mapped, we just increment
2781 * the hold count, and activate it.
2782 */
48ffc236
JG
2783 if (ptepa && (*ptepa & PG_V) != 0) {
2784 if (*ptepa & PG_PS)
2785 panic("pmap_enter_quick: unexpected mapping into 2MB page");
2786// if (pmap->pm_ptphint &&
2787// (pmap->pm_ptphint->pindex == ptepindex)) {
2788// mpte = pmap->pm_ptphint;
2789// } else {
c8fe38ae
MD
2790 mpte = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
2791 pmap->pm_ptphint = mpte;
48ffc236 2792// }
c8fe38ae
MD
2793 if (mpte)
2794 mpte->hold_count++;
2795 } else {
2796 mpte = _pmap_allocpte(pmap, ptepindex);
2797 }
2798 } while (mpte == NULL);
2799 } else {
2800 mpte = NULL;
2801 /* this code path is not yet used */
2802 }
2803
2804 /*
2805 * With a valid (and held) page directory page, we can just use
2806 * vtopte() to get to the pte. If the pte is already present
2807 * we do not disturb it.
2808 */
2809 pte = vtopte(va);
2810 if (*pte & PG_V) {
2811 if (mpte)
48ffc236 2812 pmap_unwire_pte_hold(pmap, va, mpte, &info);
c8fe38ae
MD
2813 pa = VM_PAGE_TO_PHYS(m);
2814 KKASSERT(((*pte ^ pa) & PG_FRAME) == 0);
2815 return;
2816 }
2817
2818 /*
2819 * Enter on the PV list if part of our managed memory
2820 */
2821 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2822 pmap_insert_entry(pmap, va, mpte, m);
2823 vm_page_flag_set(m, PG_MAPPED);
2824 }
2825
2826 /*
2827 * Increment counters
2828 */
2829 ++pmap->pm_stats.resident_count;
2830
2831 pa = VM_PAGE_TO_PHYS(m);
2832
2833 /*
2834 * Now validate mapping with RO protection
2835 */
2836 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2837 *pte = pa | PG_V | PG_U;
2838 else
2839 *pte = pa | PG_V | PG_U | PG_MANAGED;
2840/* pmap_inval_add(&info, pmap, va); shouldn't be needed inval->valid */
2841 pmap_inval_flush(&info);
d7f50089
YY
2842}
2843
2844/*
c8fe38ae
MD
2845 * Make a temporary mapping for a physical address. This is only intended
2846 * to be used for panic dumps.
d7f50089 2847 */
48ffc236 2848/* JG Needed on amd64? */
c8fe38ae
MD
2849void *
2850pmap_kenter_temporary(vm_paddr_t pa, int i)
48ffc236 2851READY2
d7f50089 2852{
c8fe38ae
MD
2853 pmap_kenter((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
2854 return ((void *)crashdumpmap);
d7f50089
YY
2855}
2856
c8fe38ae
MD
2857#define MAX_INIT_PT (96)
2858
d7f50089
YY
2859/*
2860 * This routine preloads the ptes for a given object into the specified pmap.
2861 * This eliminates the blast of soft faults on process startup and
2862 * immediately after an mmap.
2863 */
2864static int pmap_object_init_pt_callback(vm_page_t p, void *data);
2865
2866void
2867pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
2868 vm_object_t object, vm_pindex_t pindex,
2869 vm_size_t size, int limit)
48ffc236 2870READY1
d7f50089 2871{
c8fe38ae
MD
2872 struct rb_vm_page_scan_info info;
2873 struct lwp *lp;
48ffc236 2874 vm_size_t psize;
c8fe38ae
MD
2875
2876 /*
2877 * We can't preinit if read access isn't set or there is no pmap
2878 * or object.
2879 */
2880 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
2881 return;
2882
2883 /*
2884 * We can't preinit if the pmap is not the current pmap
2885 */
2886 lp = curthread->td_lwp;
2887 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
2888 return;
2889
2890 psize = amd64_btop(size);
2891
2892 if ((object->type != OBJT_VNODE) ||
2893 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
2894 (object->resident_page_count > MAX_INIT_PT))) {
2895 return;
2896 }
2897
2898 if (psize + pindex > object->size) {
2899 if (object->size < pindex)
2900 return;
2901 psize = object->size - pindex;
2902 }
2903
2904 if (psize == 0)
2905 return;
2906
2907 /*
2908 * Use a red-black scan to traverse the requested range and load
2909 * any valid pages found into the pmap.
2910 *
2911 * We cannot safely scan the object's memq unless we are in a
2912 * critical section since interrupts can remove pages from objects.
2913 */
2914 info.start_pindex = pindex;
2915 info.end_pindex = pindex + psize - 1;
2916 info.limit = limit;
2917 info.mpte = NULL;
2918 info.addr = addr;
2919 info.pmap = pmap;
2920
2921 crit_enter();
2922 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
2923 pmap_object_init_pt_callback, &info);
2924 crit_exit();
d7f50089
YY
2925}
2926
2927static
2928int
2929pmap_object_init_pt_callback(vm_page_t p, void *data)
48ffc236 2930READY1
d7f50089 2931{
c8fe38ae
MD
2932 struct rb_vm_page_scan_info *info = data;
2933 vm_pindex_t rel_index;
2934 /*
2935 * don't allow an madvise to blow away our really
2936 * free pages allocating pv entries.
2937 */
2938 if ((info->limit & MAP_PREFAULT_MADVISE) &&
2939 vmstats.v_free_count < vmstats.v_free_reserved) {
2940 return(-1);
2941 }
2942 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2943 (p->busy == 0) && (p->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2944 if ((p->queue - p->pc) == PQ_CACHE)
2945 vm_page_deactivate(p);
2946 vm_page_busy(p);
2947 rel_index = p->pindex - info->start_pindex;
2948 pmap_enter_quick(info->pmap,
2949 info->addr + amd64_ptob(rel_index), p);
2950 vm_page_wakeup(p);
2951 }
d7f50089
YY
2952 return(0);
2953}
2954
2955/*
2956 * pmap_prefault provides a quick way of clustering pagefaults into a
2957 * processes address space. It is a "cousin" of pmap_object_init_pt,
2958 * except it runs at page fault time instead of mmap time.
2959 */
2960#define PFBAK 4
2961#define PFFOR 4
2962#define PAGEORDER_SIZE (PFBAK+PFFOR)
2963
2964static int pmap_prefault_pageorder[] = {
2965 -PAGE_SIZE, PAGE_SIZE,
2966 -2 * PAGE_SIZE, 2 * PAGE_SIZE,
2967 -3 * PAGE_SIZE, 3 * PAGE_SIZE,
2968 -4 * PAGE_SIZE, 4 * PAGE_SIZE
2969};
2970
2971void
2972pmap_prefault(pmap_t pmap, vm_offset_t addra, vm_map_entry_t entry)
48ffc236 2973READY0
d7f50089 2974{
c8fe38ae
MD
2975 int i;
2976 vm_offset_t starta;
2977 vm_offset_t addr;
2978 vm_pindex_t pindex;
2979 vm_page_t m;
2980 vm_object_t object;
2981 struct lwp *lp;
2982
2983 /*
2984 * We do not currently prefault mappings that use virtual page
2985 * tables. We do not prefault foreign pmaps.
2986 */
2987 if (entry->maptype == VM_MAPTYPE_VPAGETABLE)
2988 return;
2989 lp = curthread->td_lwp;
2990 if (lp == NULL || (pmap != vmspace_pmap(lp->lwp_vmspace)))
2991 return;
2992
2993 object = entry->object.vm_object;
2994
2995 starta = addra - PFBAK * PAGE_SIZE;
2996 if (starta < entry->start)
2997 starta = entry->start;
2998 else if (starta > addra)
2999 starta = 0;
3000
3001 /*
3002 * critical section protection is required to maintain the
3003 * page/object association, interrupts can free pages and remove
3004 * them from their objects.
3005 */
3006 crit_enter();
3007 for (i = 0; i < PAGEORDER_SIZE; i++) {
3008 vm_object_t lobject;
3009 pt_entry_t *pte;
3010
3011 addr = addra + pmap_prefault_pageorder[i];
3012 if (addr > addra + (PFFOR * PAGE_SIZE))
3013 addr = 0;
3014
3015 if (addr < starta || addr >= entry->end)
3016 continue;
3017
3018 if ((*pmap_pde(pmap, addr)) == 0)
3019 continue;
3020
3021 pte = vtopte(addr);
3022 if (*pte)
3023 continue;
3024
3025 pindex = ((addr - entry->start) + entry->offset) >> PAGE_SHIFT;
3026 lobject = object;
3027
3028 for (m = vm_page_lookup(lobject, pindex);
3029 (!m && (lobject->type == OBJT_DEFAULT) &&
3030 (lobject->backing_object));
3031 lobject = lobject->backing_object
3032 ) {
3033 if (lobject->backing_object_offset & PAGE_MASK)
3034 break;
3035 pindex += (lobject->backing_object_offset >> PAGE_SHIFT);
3036 m = vm_page_lookup(lobject->backing_object, pindex);
3037 }
3038
3039 /*
3040 * give-up when a page is not in memory
3041 */
3042 if (m == NULL)
3043 break;
3044
3045 if (((m->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
3046 (m->busy == 0) &&
3047 (m->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
3048
3049 if ((m->queue - m->pc) == PQ_CACHE) {
3050 vm_page_deactivate(m);
3051 }
3052 vm_page_busy(m);
3053 pmap_enter_quick(pmap, addr, m);
3054 vm_page_wakeup(m);
3055 }
3056 }
3057 crit_exit();
d7f50089
YY
3058}
3059
3060/*
3061 * Routine: pmap_change_wiring
3062 * Function: Change the wiring attribute for a map/virtual-address
3063 * pair.
3064 * In/out conditions:
3065 * The mapping must already exist in the pmap.
3066 */
3067void
3068pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
48ffc236 3069READY0
d7f50089 3070{
c8fe38ae
MD
3071 pt_entry_t *pte;
3072
3073 if (pmap == NULL)
3074 return;
3075
3076 pte = pmap_pte(pmap, va);
3077
3078 if (wired && !pmap_pte_w(pte))
3079 pmap->pm_stats.wired_count++;
3080 else if (!wired && pmap_pte_w(pte))
3081 pmap->pm_stats.wired_count--;
3082
3083 /*
3084 * Wiring is not a hardware characteristic so there is no need to
3085 * invalidate TLB. However, in an SMP environment we must use
3086 * a locked bus cycle to update the pte (if we are not using
3087 * the pmap_inval_*() API that is)... it's ok to do this for simple
3088 * wiring changes.
3089 */
3090#ifdef SMP
3091 if (wired)
71577ce5 3092 atomic_set_long(pte, PG_W);
c8fe38ae 3093 else
71577ce5 3094 atomic_clear_long(pte, PG_W);
c8fe38ae
MD
3095#else
3096 if (wired)
71577ce5 3097 atomic_set_long_nonlocked(pte, PG_W);
c8fe38ae 3098 else
71577ce5 3099 atomic_clear_long_nonlocked(pte, PG_W);
c8fe38ae 3100#endif
d7f50089
YY
3101}
3102
c8fe38ae
MD
3103
3104
d7f50089
YY
3105/*
3106 * Copy the range specified by src_addr/len
3107 * from the source map to the range dst_addr/len
3108 * in the destination map.
3109 *
3110 * This routine is only advisory and need not do anything.
3111 */
3112void
3113pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
3114 vm_size_t len, vm_offset_t src_addr)
48ffc236 3115READY0
d7f50089 3116{
c8fe38ae
MD
3117 pmap_inval_info info;
3118 vm_offset_t addr;
3119 vm_offset_t end_addr = src_addr + len;
3120 vm_offset_t pdnxt;
3121 pd_entry_t src_frame, dst_frame;
3122 vm_page_t m;
3123
3124 if (dst_addr != src_addr)
3125 return;
3126 /*
3127 * XXX BUGGY. Amoung other things srcmpte is assumed to remain
3128 * valid through blocking calls, and that's just not going to
3129 * be the case.
3130 *
3131 * FIXME!
3132 */
3133 return;
3134
48ffc236 3135#if JGPMAP32
c8fe38ae
MD
3136 src_frame = src_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
3137 if (src_frame != (PTDpde & PG_FRAME)) {
3138 return;
3139 }
3140
3141 dst_frame = dst_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
3142 if (dst_frame != (APTDpde & PG_FRAME)) {
3143 APTDpde = (pd_entry_t) (dst_frame | PG_RW | PG_V);
3144 /* The page directory is not shared between CPUs */
3145 cpu_invltlb();
3146 }
48ffc236 3147#endif
c8fe38ae
MD
3148 pmap_inval_init(&info);
3149 pmap_inval_add(&info, dst_pmap, -1);
3150 pmap_inval_add(&info, src_pmap, -1);
3151
3152 /*
3153 * critical section protection is required to maintain the page/object
3154 * association, interrupts can free pages and remove them from
3155 * their objects.
3156 */
3157 crit_enter();
3158 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
3159 pt_entry_t *src_pte, *dst_pte;
3160 vm_page_t dstmpte, srcmpte;
3161 vm_offset_t srcptepaddr;
3162 vm_pindex_t ptepindex;
3163
3164 if (addr >= UPT_MIN_ADDRESS)
3165 panic("pmap_copy: invalid to pmap_copy page tables\n");
3166
3167 /*
3168 * Don't let optional prefaulting of pages make us go
3169 * way below the low water mark of free pages or way
3170 * above high water mark of used pv entries.
3171 */
3172 if (vmstats.v_free_count < vmstats.v_free_reserved ||
3173 pv_entry_count > pv_entry_high_water)
3174 break;
3175
3176 pdnxt = ((addr + PAGE_SIZE*NPTEPG) & ~(PAGE_SIZE*NPTEPG - 1));
3177 ptepindex = addr >> PDRSHIFT;
3178
48ffc236 3179#if JGPMAP32
c8fe38ae 3180 srcptepaddr = (vm_offset_t) src_pmap->pm_pdir[ptepindex];
48ffc236 3181#endif
c8fe38ae
MD
3182 if (srcptepaddr == 0)
3183 continue;
3184
3185 if (srcptepaddr & PG_PS) {
48ffc236 3186#if JGPMAP32
c8fe38ae
MD
3187 if (dst_pmap->pm_pdir[ptepindex] == 0) {
3188 dst_pmap->pm_pdir[ptepindex] = (pd_entry_t) srcptepaddr;
3189 dst_pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3190 }
48ffc236 3191#endif
c8fe38ae
MD
3192 continue;
3193 }
3194
3195 srcmpte = vm_page_lookup(src_pmap->pm_pteobj, ptepindex);
3196 if ((srcmpte == NULL) || (srcmpte->hold_count == 0) ||
3197 (srcmpte->flags & PG_BUSY)) {
3198 continue;
3199 }
3200
3201 if (pdnxt > end_addr)
3202 pdnxt = end_addr;
3203
3204 src_pte = vtopte(addr);
48ffc236 3205#if JGPMAP32
c8fe38ae 3206 dst_pte = avtopte(addr);
48ffc236 3207#endif
c8fe38ae
MD
3208 while (addr < pdnxt) {
3209 pt_entry_t ptetemp;
3210
3211 ptetemp = *src_pte;
3212 /*
3213 * we only virtual copy managed pages
3214 */
3215 if ((ptetemp & PG_MANAGED) != 0) {
3216 /*
3217 * We have to check after allocpte for the
3218 * pte still being around... allocpte can
3219 * block.
3220 *
3221 * pmap_allocpte() can block. If we lose
3222 * our page directory mappings we stop.
3223 */
3224 dstmpte = pmap_allocpte(dst_pmap, addr);
3225
48ffc236 3226#if JGPMAP32
c8fe38ae
MD
3227 if (src_frame != (PTDpde & PG_FRAME) ||
3228 dst_frame != (APTDpde & PG_FRAME)
3229 ) {
3230 kprintf("WARNING: pmap_copy: detected and corrected race\n");
3231 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3232 goto failed;
3233 } else if ((*dst_pte == 0) &&
3234 (ptetemp = *src_pte) != 0 &&
3235 (ptetemp & PG_MANAGED)) {
3236 /*
3237 * Clear the modified and
3238 * accessed (referenced) bits
3239 * during the copy.
3240 */
3241 m = PHYS_TO_VM_PAGE(ptetemp);
3242 *dst_pte = ptetemp & ~(PG_M | PG_A);
3243 ++dst_pmap->pm_stats.resident_count;
3244 pmap_insert_entry(dst_pmap, addr,
3245 dstmpte, m);
3246 KKASSERT(m->flags & PG_MAPPED);
3247 } else {
3248 kprintf("WARNING: pmap_copy: dst_pte race detected and corrected\n");
3249 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3250 goto failed;
3251 }
48ffc236 3252#endif
c8fe38ae
MD
3253 if (dstmpte->hold_count >= srcmpte->hold_count)
3254 break;
3255 }
3256 addr += PAGE_SIZE;
3257 src_pte++;
3258 dst_pte++;
3259 }
3260 }
3261failed:
3262 crit_exit();
3263 pmap_inval_flush(&info);
d7f50089
YY
3264}
3265
3266/*
3267 * pmap_zero_page:
3268 *
48ffc236 3269 * Zero the specified physical page.
d7f50089
YY
3270 *
3271 * This function may be called from an interrupt and no locking is
3272 * required.
3273 */
3274void
3275pmap_zero_page(vm_paddr_t phys)
48ffc236 3276READY1
d7f50089 3277{
48ffc236 3278 vm_offset_t va = PHYS_TO_DMAP(phys);
c8fe38ae 3279
48ffc236 3280 pagezero((void *)va);
d7f50089
YY
3281}
3282
3283/*
3284 * pmap_page_assertzero:
3285 *
3286 * Assert that a page is empty, panic if it isn't.
3287 */
3288void
3289pmap_page_assertzero(vm_paddr_t phys)
48ffc236 3290READY1
d7f50089 3291{
c8fe38ae
MD
3292 struct mdglobaldata *gd = mdcpu;
3293 int i;
3294
3295 crit_enter();
48ffc236
JG
3296 vm_offset_t virt = PHYS_TO_DMAP(phys);
3297
c8fe38ae 3298 for (i = 0; i < PAGE_SIZE; i += sizeof(int)) {
48ffc236 3299 if (*(int *)((char *)virt + i) != 0) {
c8fe38ae 3300 panic("pmap_page_assertzero() @ %p not zero!\n",
48ffc236 3301 (void *)virt);
c8fe38ae
MD
3302 }
3303 }
c8fe38ae 3304 crit_exit();
d7f50089
YY
3305}
3306
3307/*
3308 * pmap_zero_page:
3309 *
3310 * Zero part of a physical page by mapping it into memory and clearing
3311 * its contents with bzero.
3312 *
3313 * off and size may not cover an area beyond a single hardware page.
3314 */
3315void
3316pmap_zero_page_area(vm_paddr_t phys, int off, int size)
48ffc236 3317READY1
d7f50089 3318{
c8fe38ae
MD
3319 struct mdglobaldata *gd = mdcpu;
3320
3321 crit_enter();
48ffc236
JG
3322 vm_offset_t virt = PHYS_TO_DMAP(phys);
3323 bzero((char *)virt + off, size);
c8fe38ae 3324 crit_exit();
d7f50089
YY
3325}
3326
3327/*
3328 * pmap_copy_page:
3329 *
3330 * Copy the physical page from the source PA to the target PA.
3331 * This function may be called from an interrupt. No locking
3332 * is required.
3333 */
3334void
3335pmap_copy_page(vm_paddr_t src, vm_paddr_t dst)
48ffc236 3336READY1
d7f50089 3337{
48ffc236 3338 vm_offset_t src_virt, dst_virt;
c8fe38ae
MD
3339
3340 crit_enter();
48ffc236
JG
3341 src_virt = PHYS_TO_DMAP(src);
3342 dst_virt = PHYS_TO_DMAP(dst);
3343 bcopy(src_virt, dst_virt, PAGE_SIZE);
c8fe38ae 3344 crit_exit();
d7f50089
YY
3345}
3346
3347/*
3348 * pmap_copy_page_frag:
3349 *
3350 * Copy the physical page from the source PA to the target PA.
3351 * This function may be called from an interrupt. No locking
3352 * is required.
3353 */
3354void
3355pmap_copy_page_frag(vm_paddr_t src, vm_paddr_t dst, size_t bytes)
48ffc236 3356READY1
d7f50089 3357{
48ffc236 3358 vm_offset_t src_virt, dst_virt;
c8fe38ae
MD
3359
3360 crit_enter();
48ffc236
JG
3361 src_virt = PHYS_TO_DMAP(src);
3362 dst_virt = PHYS_TO_DMAP(dst);
3363 bcopy((char *)src_virt + (src & PAGE_MASK),
3364 (char *)dst_virt + (dst & PAGE_MASK),
c8fe38ae 3365 bytes);
c8fe38ae 3366 crit_exit();
d7f50089
YY
3367}
3368
3369/*
3370 * Returns true if the pmap's pv is one of the first
3371 * 16 pvs linked to from this page. This count may
3372 * be changed upwards or downwards in the future; it
3373 * is only necessary that true be returned for a small
3374 * subset of pmaps for proper page aging.
3375 */
3376boolean_t
3377pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
48ffc236 3378READY2
d7f50089 3379{
c8fe38ae
MD
3380 pv_entry_t pv;
3381 int loops = 0;
3382
3383 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3384 return FALSE;
3385
3386 crit_enter();
3387
3388 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3389 if (pv->pv_pmap == pmap) {
3390 crit_exit();
3391 return TRUE;
3392 }
3393 loops++;
3394 if (loops >= 16)
3395 break;
3396 }
3397 crit_exit();
d7f50089
YY
3398 return (FALSE);
3399}
3400
3401/*
3402 * Remove all pages from specified address space
3403 * this aids process exit speeds. Also, this code
3404 * is special cased for current process only, but
3405 * can have the more generic (and slightly slower)
3406 * mode enabled. This is much faster than pmap_remove
3407 * in the case of running down an entire address space.
3408 */
3409void
3410pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
48ffc236 3411READY1
d7f50089 3412{
c8fe38ae
MD
3413 struct lwp *lp;
3414 pt_entry_t *pte, tpte;
3415 pv_entry_t pv, npv;
3416 vm_page_t m;
3417 pmap_inval_info info;
3418 int iscurrentpmap;
48ffc236 3419 int save_generation;
c8fe38ae
MD
3420
3421 lp = curthread->td_lwp;
3422 if (lp && pmap == vmspace_pmap(lp->lwp_vmspace))
3423 iscurrentpmap = 1;
3424 else
3425 iscurrentpmap = 0;
3426
3427 pmap_inval_init(&info);
3428 crit_enter();
3429 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
3430 if (pv->pv_va >= eva || pv->pv_va < sva) {
3431 npv = TAILQ_NEXT(pv, pv_plist);
3432 continue;
3433 }
3434
3435 KKASSERT(pmap == pv->pv_pmap);
3436
3437 if (iscurrentpmap)
3438 pte = vtopte(pv->pv_va);
3439 else
3440 pte = pmap_pte_quick(pmap, pv->pv_va);
3441 if (pmap->pm_active)
3442 pmap_inval_add(&info, pmap, pv->pv_va);
3443
3444 /*
3445 * We cannot remove wired pages from a process' mapping
3446 * at this time
3447 */
3448 if (*pte & PG_W) {
3449 npv = TAILQ_NEXT(pv, pv_plist);
3450 continue;
3451 }
3452 tpte = pte_load_clear(pte);
3453
48ffc236 3454 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
c8fe38ae
MD
3455
3456 KASSERT(m < &vm_page_array[vm_page_array_size],
48ffc236 3457 ("pmap_remove_pages: bad tpte %lx", tpte));
c8fe38ae
MD
3458
3459 KKASSERT(pmap->pm_stats.resident_count > 0);
3460 --pmap->pm_stats.resident_count;
3461
3462 /*
3463 * Update the vm_page_t clean and reference bits.
3464 */
3465 if (tpte & PG_M) {
3466 vm_page_dirty(m);
3467 }
3468
3469 npv = TAILQ_NEXT(pv, pv_plist);
3470 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
3471 save_generation = ++pmap->pm_generation;
3472
3473 m->md.pv_list_count--;
3474 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3475 if (TAILQ_EMPTY(&m->md.pv_list))
3476 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
3477
3478 pmap_unuse_pt(pmap, pv->pv_va, pv->pv_ptem, &info);
3479 free_pv_entry(pv);
3480
3481 /*
3482 * Restart the scan if we blocked during the unuse or free
3483 * calls and other removals were made.
3484 */
3485 if (save_generation != pmap->pm_generation) {
3486 kprintf("Warning: pmap_remove_pages race-A avoided\n");
3487 pv = TAILQ_FIRST(&pmap->pm_pvlist);
3488 }
3489 }
3490 pmap_inval_flush(&info);
3491 crit_exit();
d7f50089
YY
3492}
3493
3494/*
c8fe38ae
MD
3495 * pmap_testbit tests bits in pte's
3496 * note that the testbit/clearbit routines are inline,
3497 * and a lot of things compile-time evaluate.
d7f50089
YY
3498 */
3499static boolean_t
3500pmap_testbit(vm_page_t m, int bit)
48ffc236 3501READY1
d7f50089 3502{
c8fe38ae
MD
3503 pv_entry_t pv;
3504 pt_entry_t *pte;
3505
3506 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3507 return FALSE;
3508
3509 if (TAILQ_FIRST(&m->md.pv_list) == NULL)
3510 return FALSE;
3511
3512 crit_enter();
3513
3514 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3515 /*
3516 * if the bit being tested is the modified bit, then
3517 * mark clean_map and ptes as never
3518 * modified.
3519 */
3520 if (bit & (PG_A|PG_M)) {
3521 if (!pmap_track_modified(pv->pv_va))
3522 continue;
3523 }
3524
3525#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3526 if (pv->pv_pmap == NULL) {
3527 kprintf("Null pmap (tb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3528 continue;
3529 }
3530#endif
3531 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3532 if (*pte & bit) {
3533 crit_exit();
3534 return TRUE;
3535 }
3536 }
3537 crit_exit();
d7f50089
YY
3538 return (FALSE);
3539}
3540
3541/*
c8fe38ae 3542 * this routine is used to modify bits in ptes
d7f50089
YY
3543 */
3544static __inline void
3545pmap_clearbit(vm_page_t m, int bit)
48ffc236 3546READY1
d7f50089 3547{
c8fe38ae
MD
3548 struct pmap_inval_info info;
3549 pv_entry_t pv;
3550 pt_entry_t *pte;
3551 pt_entry_t pbits;
3552
3553 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3554 return;
3555
3556 pmap_inval_init(&info);
3557 crit_enter();
3558
3559 /*
3560 * Loop over all current mappings setting/clearing as appropos If
3561 * setting RO do we need to clear the VAC?
3562 */
3563 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3564 /*
3565 * don't write protect pager mappings
3566 */
3567 if (bit == PG_RW) {
3568 if (!pmap_track_modified(pv->pv_va))
3569 continue;
3570 }
3571
3572#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3573 if (pv->pv_pmap == NULL) {
3574 kprintf("Null pmap (cb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3575 continue;
3576 }
3577#endif
3578
3579 /*
3580 * Careful here. We can use a locked bus instruction to
3581 * clear PG_A or PG_M safely but we need to synchronize
3582 * with the target cpus when we mess with PG_RW.
3583 *
3584 * We do not have to force synchronization when clearing
3585 * PG_M even for PTEs generated via virtual memory maps,
3586 * because the virtual kernel will invalidate the pmap
3587 * entry when/if it needs to resynchronize the Modify bit.
3588 */
3589 if (bit & PG_RW)
3590 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
3591 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3592again:
3593 pbits = *pte;
3594 if (pbits & bit) {
3595 if (bit == PG_RW) {
3596 if (pbits & PG_M) {
3597 vm_page_dirty(m);
48ffc236 3598 atomic_clear_long(pte, PG_M|PG_RW);
c8fe38ae
MD
3599 } else {
3600 /*
3601 * The cpu may be trying to set PG_M
3602 * simultaniously with our clearing
3603 * of PG_RW.
3604 */
48ffc236 3605 if (!atomic_cmpset_long(pte, pbits,
c8fe38ae
MD
3606 pbits & ~PG_RW))
3607 goto again;
3608 }
3609 } else if (bit == PG_M) {
3610 /*
3611 * We could also clear PG_RW here to force
3612 * a fault on write to redetect PG_M for
3613 * virtual kernels, but it isn't necessary
3614 * since virtual kernels invalidate the pte
3615 * when they clear the VPTE_M bit in their
3616 * virtual page tables.
3617 */
48ffc236 3618 atomic_clear_long(pte, PG_M);
c8fe38ae 3619 } else {
48ffc236 3620 atomic_clear_long(pte, bit);
c8fe38ae
MD
3621 }
3622 }