| Commit | Line | Data |
|---|---|---|
| 984263bc | 1 | /* |
| 033a4603 | 2 | * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved. |
| ef0fdad1 | 3 | * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved. |
| 984263bc MD |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without | |
| 6 | * modification, are permitted provided that the following conditions | |
| 7 | * are met: | |
| 8 | * 1. Redistributions of source code must retain the above copyright | |
| 9 | * notice unmodified, this list of conditions, and the following | |
| 10 | * disclaimer. | |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
| 12 | * notice, this list of conditions and the following disclaimer in the | |
| 13 | * documentation and/or other materials provided with the distribution. | |
| 14 | * | |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
| 16 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
| 17 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
| 18 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 19 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
| 20 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
| 21 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
| 22 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
| 23 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
| 24 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 25 | * | |
| 26 | * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $ | |
| c2bfaa3d | 27 | * $DragonFly: src/sys/kern/kern_intr.c,v 1.55 2008/09/01 12:49:00 sephe Exp $ |
| 984263bc MD |
28 | * |
| 29 | */ | |
| 30 | ||
| 984263bc MD |
31 | #include <sys/param.h> |
| 32 | #include <sys/systm.h> | |
| 33 | #include <sys/malloc.h> | |
| 34 | #include <sys/kernel.h> | |
| 35 | #include <sys/sysctl.h> | |
| ef0fdad1 MD |
36 | #include <sys/thread.h> |
| 37 | #include <sys/proc.h> | |
| 7e071e7a | 38 | #include <sys/random.h> |
| 477d3c1c | 39 | #include <sys/serialize.h> |
| a7231bde | 40 | #include <sys/interrupt.h> |
| 477d3c1c | 41 | #include <sys/bus.h> |
| 37e7efec | 42 | #include <sys/machintr.h> |
| 984263bc | 43 | |
| 477d3c1c | 44 | #include <machine/frame.h> |
| 984263bc MD |
45 | |
| 46 | #include <sys/interrupt.h> | |
| 47 | ||
| 684a93c4 MD |
48 | #include <sys/thread2.h> |
| 49 | #include <sys/mplock2.h> | |
| 50 | ||
| 9d522d14 MD |
51 | struct info_info; |
| 52 | ||
| ef0fdad1 MD |
53 | typedef struct intrec { |
| 54 | struct intrec *next; | |
| 9d522d14 | 55 | struct intr_info *info; |
| ef0fdad1 MD |
56 | inthand2_t *handler; |
| 57 | void *argument; | |
| 477d3c1c | 58 | char *name; |
| ef0fdad1 | 59 | int intr; |
| 477d3c1c MD |
60 | int intr_flags; |
| 61 | struct lwkt_serialize *serializer; | |
| 62 | } *intrec_t; | |
| 63 | ||
| 64 | struct intr_info { | |
| 65 | intrec_t i_reclist; | |
| 66 | struct thread i_thread; | |
| 67 | struct random_softc i_random; | |
| 68 | int i_running; | |
| 862f2618 MD |
69 | long i_count; /* interrupts dispatched */ |
| 70 | int i_mplock_required; | |
| 477d3c1c MD |
71 | int i_fast; |
| 72 | int i_slow; | |
| f33e9c1c | 73 | int i_state; |
| b560de96 MD |
74 | int i_errorticks; |
| 75 | unsigned long i_straycount; | |
| 5f456c40 MD |
76 | } intr_info_ary[MAX_INTS]; |
| 77 | ||
| 78 | int max_installed_hard_intr; | |
| 79 | int max_installed_soft_intr; | |
| 477d3c1c | 80 | |
| a9d00ec1 MD |
81 | #define EMERGENCY_INTR_POLLING_FREQ_MAX 20000 |
| 82 | ||
| 83 | static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS); | |
| 84 | static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS); | |
| 85 | static void emergency_intr_timer_callback(systimer_t, struct intrframe *); | |
| 86 | static void ithread_handler(void *arg); | |
| 87 | static void ithread_emergency(void *arg); | |
| b560de96 | 88 | static void report_stray_interrupt(int intr, struct intr_info *info); |
| 4c846371 SZ |
89 | static void int_moveto_destcpu(int *, int *, int); |
| 90 | static void int_moveto_origcpu(int, int); | |
| a9d00ec1 | 91 | |
| 477d3c1c | 92 | int intr_info_size = sizeof(intr_info_ary) / sizeof(intr_info_ary[0]); |
| 37d44089 | 93 | |
| a9d00ec1 MD |
94 | static struct systimer emergency_intr_timer; |
| 95 | static struct thread emergency_intr_thread; | |
| 96 | ||
| f33e9c1c MD |
97 | #define ISTATE_NOTHREAD 0 |
| 98 | #define ISTATE_NORMAL 1 | |
| 99 | #define ISTATE_LIVELOCKED 2 | |
| 37d44089 | 100 | |
| b560de96 | 101 | static int livelock_limit = 40000; |
| 0e6beaa3 | 102 | static int livelock_lowater = 20000; |
| b560de96 | 103 | static int livelock_debug = -1; |
| 37d44089 MD |
104 | SYSCTL_INT(_kern, OID_AUTO, livelock_limit, |
| 105 | CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit"); | |
| f33e9c1c MD |
106 | SYSCTL_INT(_kern, OID_AUTO, livelock_lowater, |
| 107 | CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore"); | |
| b560de96 MD |
108 | SYSCTL_INT(_kern, OID_AUTO, livelock_debug, |
| 109 | CTLFLAG_RW, &livelock_debug, 0, "Livelock debug intr#"); | |
| 984263bc | 110 | |
| a9d00ec1 MD |
111 | static int emergency_intr_enable = 0; /* emergency interrupt polling */ |
| 112 | TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable); | |
| 113 | SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW, | |
| 114 | 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable"); | |
| 115 | ||
| 116 | static int emergency_intr_freq = 10; /* emergency polling frequency */ | |
| 117 | TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq); | |
| 118 | SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW, | |
| 119 | 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency"); | |
| 120 | ||
| 121 | /* | |
| 122 | * Sysctl support routines | |
| 123 | */ | |
| 124 | static int | |
| 125 | sysctl_emergency_enable(SYSCTL_HANDLER_ARGS) | |
| 126 | { | |
| 127 | int error, enabled; | |
| 128 | ||
| 129 | enabled = emergency_intr_enable; | |
| 130 | error = sysctl_handle_int(oidp, &enabled, 0, req); | |
| 131 | if (error || req->newptr == NULL) | |
| 132 | return error; | |
| 133 | emergency_intr_enable = enabled; | |
| 134 | if (emergency_intr_enable) { | |
| ba39e2e0 MD |
135 | systimer_adjust_periodic(&emergency_intr_timer, |
| 136 | emergency_intr_freq); | |
| a9d00ec1 | 137 | } else { |
| ba39e2e0 | 138 | systimer_adjust_periodic(&emergency_intr_timer, 1); |
| a9d00ec1 MD |
139 | } |
| 140 | return 0; | |
| 141 | } | |
| 142 | ||
| 143 | static int | |
| 144 | sysctl_emergency_freq(SYSCTL_HANDLER_ARGS) | |
| 145 | { | |
| 146 | int error, phz; | |
| 147 | ||
| 148 | phz = emergency_intr_freq; | |
| 149 | error = sysctl_handle_int(oidp, &phz, 0, req); | |
| 150 | if (error || req->newptr == NULL) | |
| 151 | return error; | |
| 152 | if (phz <= 0) | |
| 153 | return EINVAL; | |
| 154 | else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX) | |
| 155 | phz = EMERGENCY_INTR_POLLING_FREQ_MAX; | |
| 156 | ||
| 157 | emergency_intr_freq = phz; | |
| 158 | if (emergency_intr_enable) { | |
| ba39e2e0 MD |
159 | systimer_adjust_periodic(&emergency_intr_timer, |
| 160 | emergency_intr_freq); | |
| a9d00ec1 | 161 | } else { |
| ba39e2e0 | 162 | systimer_adjust_periodic(&emergency_intr_timer, 1); |
| a9d00ec1 MD |
163 | } |
| 164 | return 0; | |
| 165 | } | |
| 984263bc | 166 | |
| 45d76888 MD |
167 | /* |
| 168 | * Register an SWI or INTerrupt handler. | |
| 45d76888 | 169 | */ |
| 477d3c1c MD |
170 | void * |
| 171 | register_swi(int intr, inthand2_t *handler, void *arg, const char *name, | |
| 172 | struct lwkt_serialize *serializer) | |
| 984263bc | 173 | { |
| 5f456c40 | 174 | if (intr < FIRST_SOFTINT || intr >= MAX_INTS) |
| ef0fdad1 | 175 | panic("register_swi: bad intr %d", intr); |
| 477d3c1c | 176 | return(register_int(intr, handler, arg, name, serializer, 0)); |
| 984263bc MD |
177 | } |
| 178 | ||
| 477d3c1c | 179 | void * |
| 8619d09d AH |
180 | register_swi_mp(int intr, inthand2_t *handler, void *arg, const char *name, |
| 181 | struct lwkt_serialize *serializer) | |
| 182 | { | |
| 183 | if (intr < FIRST_SOFTINT || intr >= MAX_INTS) | |
| 184 | panic("register_swi: bad intr %d", intr); | |
| 185 | return(register_int(intr, handler, arg, name, serializer, INTR_MPSAFE)); | |
| 186 | } | |
| 187 | ||
| 188 | void * | |
| 477d3c1c MD |
189 | register_int(int intr, inthand2_t *handler, void *arg, const char *name, |
| 190 | struct lwkt_serialize *serializer, int intr_flags) | |
| 984263bc | 191 | { |
| 477d3c1c MD |
192 | struct intr_info *info; |
| 193 | struct intrec **list; | |
| 194 | intrec_t rec; | |
| 4c846371 | 195 | int orig_cpuid, cpuid; |
| ef0fdad1 | 196 | |
| 5f456c40 | 197 | if (intr < 0 || intr >= MAX_INTS) |
| ef0fdad1 | 198 | panic("register_int: bad intr %d", intr); |
| 477d3c1c MD |
199 | if (name == NULL) |
| 200 | name = "???"; | |
| 201 | info = &intr_info_ary[intr]; | |
| 202 | ||
| 9d522d14 MD |
203 | /* |
| 204 | * Construct an interrupt handler record | |
| 205 | */ | |
| efda3bd0 MD |
206 | rec = kmalloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT); |
| 207 | rec->name = kmalloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT); | |
| 477d3c1c | 208 | strcpy(rec->name, name); |
| ef0fdad1 | 209 | |
| 9d522d14 | 210 | rec->info = info; |
| ef0fdad1 MD |
211 | rec->handler = handler; |
| 212 | rec->argument = arg; | |
| ef0fdad1 | 213 | rec->intr = intr; |
| 477d3c1c | 214 | rec->intr_flags = intr_flags; |
| ef0fdad1 | 215 | rec->next = NULL; |
| 477d3c1c | 216 | rec->serializer = serializer; |
| ef0fdad1 | 217 | |
| ef0fdad1 | 218 | /* |
| a9d00ec1 MD |
219 | * Create an emergency polling thread and set up a systimer to wake |
| 220 | * it up. | |
| 221 | */ | |
| 222 | if (emergency_intr_thread.td_kstack == NULL) { | |
| 223 | lwkt_create(ithread_emergency, NULL, NULL, | |
| c9e9fb21 MD |
224 | &emergency_intr_thread, |
| 225 | TDF_STOPREQ|TDF_INTTHREAD|TDF_MPSAFE, | |
| 226 | -1, "ithread emerg"); | |
| a9d00ec1 MD |
227 | systimer_init_periodic_nq(&emergency_intr_timer, |
| 228 | emergency_intr_timer_callback, &emergency_intr_thread, | |
| 229 | (emergency_intr_enable ? emergency_intr_freq : 1)); | |
| 230 | } | |
| 231 | ||
| 4c846371 | 232 | int_moveto_destcpu(&orig_cpuid, &cpuid, intr); |
| db958607 | 233 | |
| a9d00ec1 | 234 | /* |
| ef0fdad1 | 235 | * Create an interrupt thread if necessary, leave it in an unscheduled |
| 45d76888 | 236 | * state. |
| ef0fdad1 | 237 | */ |
| f33e9c1c MD |
238 | if (info->i_state == ISTATE_NOTHREAD) { |
| 239 | info->i_state = ISTATE_NORMAL; | |
| 973c11b9 | 240 | lwkt_create((void *)ithread_handler, (void *)(intptr_t)intr, NULL, |
| 862f2618 | 241 | &info->i_thread, TDF_STOPREQ|TDF_INTTHREAD|TDF_MPSAFE, -1, |
| 75cdbe6c | 242 | "ithread %d", intr); |
| 5f456c40 | 243 | if (intr >= FIRST_SOFTINT) |
| 477d3c1c | 244 | lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM); |
| 4b5f931b | 245 | else |
| 477d3c1c MD |
246 | lwkt_setpri(&info->i_thread, TDPRI_INT_MED); |
| 247 | info->i_thread.td_preemptable = lwkt_preempt; | |
| ef0fdad1 MD |
248 | } |
| 249 | ||
| 9d522d14 MD |
250 | list = &info->i_reclist; |
| 251 | ||
| ef0fdad1 | 252 | /* |
| 9d522d14 | 253 | * Keep track of how many fast and slow interrupts we have. |
| 862f2618 MD |
254 | * Set i_mplock_required if any handler in the chain requires |
| 255 | * the MP lock to operate. | |
| ef0fdad1 | 256 | */ |
| 862f2618 MD |
257 | if ((intr_flags & INTR_MPSAFE) == 0) |
| 258 | info->i_mplock_required = 1; | |
| f8a09be1 | 259 | if (intr_flags & INTR_CLOCK) |
| 9d522d14 MD |
260 | ++info->i_fast; |
| 261 | else | |
| 262 | ++info->i_slow; | |
| 263 | ||
| 264 | /* | |
| 8b3ec75a MD |
265 | * Enable random number generation keying off of this interrupt. |
| 266 | */ | |
| 267 | if ((intr_flags & INTR_NOENTROPY) == 0 && info->i_random.sc_enabled == 0) { | |
| 268 | info->i_random.sc_enabled = 1; | |
| 269 | info->i_random.sc_intr = intr; | |
| 270 | } | |
| 271 | ||
| 272 | /* | |
| 9d522d14 MD |
273 | * Add the record to the interrupt list. |
| 274 | */ | |
| 275 | crit_enter(); | |
| ef0fdad1 MD |
276 | while (*list != NULL) |
| 277 | list = &(*list)->next; | |
| 278 | *list = rec; | |
| 279 | crit_exit(); | |
| 5f456c40 MD |
280 | |
| 281 | /* | |
| 282 | * Update max_installed_hard_intr to make the emergency intr poll | |
| 283 | * a bit more efficient. | |
| 284 | */ | |
| 285 | if (intr < FIRST_SOFTINT) { | |
| 286 | if (max_installed_hard_intr <= intr) | |
| 287 | max_installed_hard_intr = intr + 1; | |
| 288 | } else { | |
| 289 | if (max_installed_soft_intr <= intr) | |
| 290 | max_installed_soft_intr = intr + 1; | |
| 291 | } | |
| 9d522d14 MD |
292 | |
| 293 | /* | |
| 294 | * Setup the machine level interrupt vector | |
| 4612bd39 AP |
295 | * |
| 296 | * XXX temporary workaround for some ACPI brokedness. ACPI installs | |
| 297 | * its interrupt too early, before the IOAPICs have been configured, | |
| 298 | * which means the IOAPIC is not enabled by the registration of the | |
| 299 | * ACPI interrupt. Anything else sharing that IRQ will wind up not | |
| 300 | * being enabled. Temporarily work around the problem by always | |
| 301 | * installing and enabling on every new interrupt handler, even | |
| 302 | * if one has already been setup on that irq. | |
| 9d522d14 | 303 | */ |
| 4612bd39 | 304 | if (intr < FIRST_SOFTINT /* && info->i_slow + info->i_fast == 1*/) { |
| 9d522d14 | 305 | if (machintr_vector_setup(intr, intr_flags)) |
| 6ea70f76 | 306 | kprintf("machintr_vector_setup: failed on irq %d\n", intr); |
| 9d522d14 MD |
307 | } |
| 308 | ||
| 4c846371 | 309 | int_moveto_origcpu(orig_cpuid, cpuid); |
| db958607 | 310 | |
| 477d3c1c | 311 | return(rec); |
| ef0fdad1 | 312 | } |
| 984263bc | 313 | |
| 9d522d14 | 314 | void |
| 477d3c1c | 315 | unregister_swi(void *id) |
| ef0fdad1 | 316 | { |
| 9d522d14 | 317 | unregister_int(id); |
| 984263bc MD |
318 | } |
| 319 | ||
| 9d522d14 | 320 | void |
| 477d3c1c | 321 | unregister_int(void *id) |
| 984263bc | 322 | { |
| 477d3c1c MD |
323 | struct intr_info *info; |
| 324 | struct intrec **list; | |
| 325 | intrec_t rec; | |
| 4c846371 | 326 | int intr, orig_cpuid, cpuid; |
| 477d3c1c MD |
327 | |
| 328 | intr = ((intrec_t)id)->intr; | |
| ef0fdad1 | 329 | |
| 5f456c40 | 330 | if (intr < 0 || intr >= MAX_INTS) |
| ef0fdad1 | 331 | panic("register_int: bad intr %d", intr); |
| 477d3c1c MD |
332 | |
| 333 | info = &intr_info_ary[intr]; | |
| 334 | ||
| 4c846371 SZ |
335 | int_moveto_destcpu(&orig_cpuid, &cpuid, intr); |
| 336 | ||
| 477d3c1c | 337 | /* |
| 9d522d14 MD |
338 | * Remove the interrupt descriptor, adjust the descriptor count, |
| 339 | * and teardown the machine level vector if this was the last interrupt. | |
| 477d3c1c | 340 | */ |
| ef0fdad1 | 341 | crit_enter(); |
| 477d3c1c | 342 | list = &info->i_reclist; |
| ef0fdad1 | 343 | while ((rec = *list) != NULL) { |
| 9d522d14 | 344 | if (rec == id) |
| ef0fdad1 | 345 | break; |
| ef0fdad1 MD |
346 | list = &rec->next; |
| 347 | } | |
| 9d522d14 | 348 | if (rec) { |
| acf7409e SZ |
349 | intrec_t rec0; |
| 350 | ||
| 9d522d14 | 351 | *list = rec->next; |
| f8a09be1 | 352 | if (rec->intr_flags & INTR_CLOCK) |
| 9d522d14 MD |
353 | --info->i_fast; |
| 354 | else | |
| 355 | --info->i_slow; | |
| e8727dce | 356 | if (intr < FIRST_SOFTINT && info->i_fast + info->i_slow == 0) |
| 9d522d14 | 357 | machintr_vector_teardown(intr); |
| 862f2618 | 358 | |
| acf7409e SZ |
359 | /* |
| 360 | * Clear i_mplock_required if no handlers in the chain require the | |
| 361 | * MP lock. | |
| 362 | */ | |
| 363 | for (rec0 = info->i_reclist; rec0; rec0 = rec0->next) { | |
| 364 | if ((rec0->intr_flags & INTR_MPSAFE) == 0) | |
| 365 | break; | |
| 366 | } | |
| 367 | if (rec0 == NULL) | |
| 862f2618 | 368 | info->i_mplock_required = 0; |
| acf7409e | 369 | } |
| 862f2618 | 370 | |
| ef0fdad1 | 371 | crit_exit(); |
| 477d3c1c | 372 | |
| 4c846371 SZ |
373 | int_moveto_origcpu(orig_cpuid, cpuid); |
| 374 | ||
| 477d3c1c | 375 | /* |
| 9d522d14 | 376 | * Free the record. |
| 477d3c1c | 377 | */ |
| ef0fdad1 | 378 | if (rec != NULL) { |
| efda3bd0 MD |
379 | kfree(rec->name, M_DEVBUF); |
| 380 | kfree(rec, M_DEVBUF); | |
| ef0fdad1 | 381 | } else { |
| 6ea70f76 | 382 | kprintf("warning: unregister_int: int %d handler for %s not found\n", |
| 477d3c1c | 383 | intr, ((intrec_t)id)->name); |
| ef0fdad1 | 384 | } |
| 477d3c1c MD |
385 | } |
| 386 | ||
| 387 | const char * | |
| 388 | get_registered_name(int intr) | |
| 389 | { | |
| 390 | intrec_t rec; | |
| 391 | ||
| 5f456c40 | 392 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
393 | panic("register_int: bad intr %d", intr); |
| 394 | ||
| 395 | if ((rec = intr_info_ary[intr].i_reclist) == NULL) | |
| 396 | return(NULL); | |
| 397 | else if (rec->next) | |
| 398 | return("mux"); | |
| 399 | else | |
| 400 | return(rec->name); | |
| 984263bc MD |
401 | } |
| 402 | ||
| 477d3c1c MD |
403 | int |
| 404 | count_registered_ints(int intr) | |
| 405 | { | |
| 406 | struct intr_info *info; | |
| 407 | ||
| 5f456c40 | 408 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
409 | panic("register_int: bad intr %d", intr); |
| 410 | info = &intr_info_ary[intr]; | |
| 411 | return(info->i_fast + info->i_slow); | |
| 412 | } | |
| 413 | ||
| 414 | long | |
| 415 | get_interrupt_counter(int intr) | |
| 416 | { | |
| 417 | struct intr_info *info; | |
| 418 | ||
| 5f456c40 | 419 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
420 | panic("register_int: bad intr %d", intr); |
| 421 | info = &intr_info_ary[intr]; | |
| 422 | return(info->i_count); | |
| 423 | } | |
| 424 | ||
| 425 | ||
| 4b5f931b MD |
426 | void |
| 427 | swi_setpriority(int intr, int pri) | |
| 428 | { | |
| 477d3c1c | 429 | struct intr_info *info; |
| 4b5f931b | 430 | |
| 5f456c40 | 431 | if (intr < FIRST_SOFTINT || intr >= MAX_INTS) |
| 4b5f931b | 432 | panic("register_swi: bad intr %d", intr); |
| 477d3c1c | 433 | info = &intr_info_ary[intr]; |
| f33e9c1c | 434 | if (info->i_state != ISTATE_NOTHREAD) |
| 477d3c1c | 435 | lwkt_setpri(&info->i_thread, pri); |
| 4b5f931b MD |
436 | } |
| 437 | ||
| 7e071e7a MD |
438 | void |
| 439 | register_randintr(int intr) | |
| 440 | { | |
| 477d3c1c MD |
441 | struct intr_info *info; |
| 442 | ||
| 5f456c40 | 443 | if (intr < 0 || intr >= MAX_INTS) |
| 417c990a | 444 | panic("register_randintr: bad intr %d", intr); |
| 477d3c1c MD |
445 | info = &intr_info_ary[intr]; |
| 446 | info->i_random.sc_intr = intr; | |
| 447 | info->i_random.sc_enabled = 1; | |
| 7e071e7a MD |
448 | } |
| 449 | ||
| 450 | void | |
| 451 | unregister_randintr(int intr) | |
| 452 | { | |
| 477d3c1c MD |
453 | struct intr_info *info; |
| 454 | ||
| 5f456c40 | 455 | if (intr < 0 || intr >= MAX_INTS) |
| 477d3c1c MD |
456 | panic("register_swi: bad intr %d", intr); |
| 457 | info = &intr_info_ary[intr]; | |
| 8b3ec75a | 458 | info->i_random.sc_enabled = -1; |
| 7e071e7a MD |
459 | } |
| 460 | ||
| 5f456c40 MD |
461 | int |
| 462 | next_registered_randintr(int intr) | |
| 463 | { | |
| 464 | struct intr_info *info; | |
| 465 | ||
| 466 | if (intr < 0 || intr >= MAX_INTS) | |
| 467 | panic("register_swi: bad intr %d", intr); | |
| 468 | while (intr < MAX_INTS) { | |
| 469 | info = &intr_info_ary[intr]; | |
| 8b3ec75a | 470 | if (info->i_random.sc_enabled > 0) |
| 5f456c40 MD |
471 | break; |
| 472 | ++intr; | |
| 473 | } | |
| 474 | return(intr); | |
| 475 | } | |
| 476 | ||
| ef0fdad1 | 477 | /* |
| b68b7282 MD |
478 | * Dispatch an interrupt. If there's nothing to do we have a stray |
| 479 | * interrupt and can just return, leaving the interrupt masked. | |
| 96728c05 | 480 | * |
| 477d3c1c | 481 | * We need to schedule the interrupt and set its i_running bit. If |
| 96728c05 MD |
482 | * we are not on the interrupt thread's cpu we have to send a message |
| 483 | * to the correct cpu that will issue the desired action (interlocking | |
| f33e9c1c MD |
484 | * with the interrupt thread's critical section). We do NOT attempt to |
| 485 | * reschedule interrupts whos i_running bit is already set because | |
| 486 | * this would prematurely wakeup a livelock-limited interrupt thread. | |
| 487 | * | |
| 488 | * i_running is only tested/set on the same cpu as the interrupt thread. | |
| 96728c05 MD |
489 | * |
| 490 | * We are NOT in a critical section, which will allow the scheduled | |
| 71ef2f5c | 491 | * interrupt to preempt us. The MP lock might *NOT* be held here. |
| ef0fdad1 | 492 | */ |
| b8a98473 MD |
493 | #ifdef SMP |
| 494 | ||
| 96728c05 MD |
495 | static void |
| 496 | sched_ithd_remote(void *arg) | |
| 497 | { | |
| bfc09ba0 | 498 | sched_ithd((int)(intptr_t)arg); |
| 96728c05 MD |
499 | } |
| 500 | ||
| b8a98473 MD |
501 | #endif |
| 502 | ||
| ef0fdad1 MD |
503 | void |
| 504 | sched_ithd(int intr) | |
| 505 | { | |
| 477d3c1c | 506 | struct intr_info *info; |
| ef0fdad1 | 507 | |
| 477d3c1c MD |
508 | info = &intr_info_ary[intr]; |
| 509 | ||
| 510 | ++info->i_count; | |
| f33e9c1c | 511 | if (info->i_state != ISTATE_NOTHREAD) { |
| 477d3c1c | 512 | if (info->i_reclist == NULL) { |
| b560de96 | 513 | report_stray_interrupt(intr, info); |
| b68b7282 | 514 | } else { |
| b8a98473 | 515 | #ifdef SMP |
| 477d3c1c | 516 | if (info->i_thread.td_gd == mycpu) { |
| f33e9c1c MD |
517 | if (info->i_running == 0) { |
| 518 | info->i_running = 1; | |
| 519 | if (info->i_state != ISTATE_LIVELOCKED) | |
| 520 | lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */ | |
| 521 | } | |
| 96728c05 | 522 | } else { |
| 477d3c1c | 523 | lwkt_send_ipiq(info->i_thread.td_gd, |
| bfc09ba0 | 524 | sched_ithd_remote, (void *)(intptr_t)intr); |
| 96728c05 | 525 | } |
| b8a98473 | 526 | #else |
| f33e9c1c MD |
527 | if (info->i_running == 0) { |
| 528 | info->i_running = 1; | |
| 529 | if (info->i_state != ISTATE_LIVELOCKED) | |
| 530 | lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */ | |
| 531 | } | |
| b8a98473 | 532 | #endif |
| b68b7282 | 533 | } |
| ef0fdad1 | 534 | } else { |
| b560de96 | 535 | report_stray_interrupt(intr, info); |
| ef0fdad1 MD |
536 | } |
| 537 | } | |
| 538 | ||
| b560de96 MD |
539 | static void |
| 540 | report_stray_interrupt(int intr, struct intr_info *info) | |
| 541 | { | |
| 542 | ++info->i_straycount; | |
| 543 | if (info->i_straycount < 10) { | |
| 544 | if (info->i_errorticks == ticks) | |
| 545 | return; | |
| 546 | info->i_errorticks = ticks; | |
| 547 | kprintf("sched_ithd: stray interrupt %d on cpu %d\n", | |
| 548 | intr, mycpuid); | |
| 7e88c0e6 | 549 | } else if (info->i_straycount == 10) { |
| b560de96 MD |
550 | kprintf("sched_ithd: %ld stray interrupts %d on cpu %d - " |
| 551 | "there will be no further reports\n", | |
| 552 | info->i_straycount, intr, mycpuid); | |
| 553 | } | |
| 554 | } | |
| 555 | ||
| b68b7282 | 556 | /* |
| 37d44089 MD |
557 | * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL |
| 558 | * might not be held). | |
| 559 | */ | |
| 560 | static void | |
| 477d3c1c | 561 | ithread_livelock_wakeup(systimer_t st) |
| 37d44089 | 562 | { |
| 477d3c1c | 563 | struct intr_info *info; |
| 37d44089 | 564 | |
| 973c11b9 | 565 | info = &intr_info_ary[(int)(intptr_t)st->data]; |
| f33e9c1c | 566 | if (info->i_state != ISTATE_NOTHREAD) |
| 477d3c1c | 567 | lwkt_schedule(&info->i_thread); |
| 37d44089 MD |
568 | } |
| 569 | ||
| 67b9bb39 | 570 | /* |
| 729e15a8 SZ |
571 | * Schedule ithread within fast intr handler |
| 572 | * | |
| 573 | * XXX Protect sched_ithd() call with gd_intr_nesting_level? | |
| 574 | * Interrupts aren't enabled, but still... | |
| 575 | */ | |
| 576 | static __inline void | |
| 577 | ithread_fast_sched(int intr, thread_t td) | |
| 578 | { | |
| 579 | ++td->td_nest_count; | |
| 580 | ||
| 581 | /* | |
| 582 | * We are already in critical section, exit it now to | |
| 583 | * allow preemption. | |
| 584 | */ | |
| 585 | crit_exit_quick(td); | |
| 586 | sched_ithd(intr); | |
| 587 | crit_enter_quick(td); | |
| 588 | ||
| 589 | --td->td_nest_count; | |
| 590 | } | |
| 591 | ||
| 592 | /* | |
| 7bd34050 | 593 | * This function is called directly from the ICU or APIC vector code assembly |
| 477d3c1c MD |
594 | * to process an interrupt. The critical section and interrupt deferral |
| 595 | * checks have already been done but the function is entered WITHOUT | |
| 596 | * a critical section held. The BGL may or may not be held. | |
| 597 | * | |
| 598 | * Must return non-zero if we do not want the vector code to re-enable | |
| 599 | * the interrupt (which we don't if we have to schedule the interrupt) | |
| 67b9bb39 | 600 | */ |
| c7eb0589 | 601 | int ithread_fast_handler(struct intrframe *frame); |
| 477d3c1c MD |
602 | |
| 603 | int | |
| c7eb0589 | 604 | ithread_fast_handler(struct intrframe *frame) |
| 477d3c1c MD |
605 | { |
| 606 | int intr; | |
| 607 | struct intr_info *info; | |
| 608 | struct intrec **list; | |
| 609 | int must_schedule; | |
| 610 | #ifdef SMP | |
| 611 | int got_mplock; | |
| 612 | #endif | |
| 613 | intrec_t rec, next_rec; | |
| 614 | globaldata_t gd; | |
| 729e15a8 | 615 | thread_t td; |
| 477d3c1c | 616 | |
| c7eb0589 | 617 | intr = frame->if_vec; |
| 477d3c1c | 618 | gd = mycpu; |
| 729e15a8 SZ |
619 | td = curthread; |
| 620 | ||
| 621 | /* We must be in critical section. */ | |
| f9235b6d | 622 | KKASSERT(td->td_critcount); |
| 477d3c1c MD |
623 | |
| 624 | info = &intr_info_ary[intr]; | |
| 625 | ||
| 626 | /* | |
| 627 | * If we are not processing any FAST interrupts, just schedule the thing. | |
| 477d3c1c MD |
628 | */ |
| 629 | if (info->i_fast == 0) { | |
| 3848f1c7 | 630 | ++gd->gd_cnt.v_intr; |
| 729e15a8 | 631 | ithread_fast_sched(intr, td); |
| 477d3c1c MD |
632 | return(1); |
| 633 | } | |
| 634 | ||
| 635 | /* | |
| 636 | * This should not normally occur since interrupts ought to be | |
| 637 | * masked if the ithread has been scheduled or is running. | |
| 638 | */ | |
| 639 | if (info->i_running) | |
| 640 | return(1); | |
| 641 | ||
| 642 | /* | |
| 643 | * Bump the interrupt nesting level to process any FAST interrupts. | |
| 644 | * Obtain the MP lock as necessary. If the MP lock cannot be obtained, | |
| 645 | * schedule the interrupt thread to deal with the issue instead. | |
| 646 | * | |
| 647 | * To reduce overhead, just leave the MP lock held once it has been | |
| 648 | * obtained. | |
| 649 | */ | |
| 477d3c1c MD |
650 | ++gd->gd_intr_nesting_level; |
| 651 | ++gd->gd_cnt.v_intr; | |
| 652 | must_schedule = info->i_slow; | |
| 653 | #ifdef SMP | |
| 654 | got_mplock = 0; | |
| 655 | #endif | |
| 656 | ||
| 657 | list = &info->i_reclist; | |
| 658 | for (rec = *list; rec; rec = next_rec) { | |
| 659 | next_rec = rec->next; /* rec may be invalid after call */ | |
| 660 | ||
| f8a09be1 | 661 | if (rec->intr_flags & INTR_CLOCK) { |
| 477d3c1c MD |
662 | #ifdef SMP |
| 663 | if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) { | |
| 664 | if (try_mplock() == 0) { | |
| f5c2d910 SZ |
665 | /* Couldn't get the MP lock; just schedule it. */ |
| 666 | must_schedule = 1; | |
| 477d3c1c MD |
667 | break; |
| 668 | } | |
| 669 | got_mplock = 1; | |
| 670 | } | |
| 671 | #endif | |
| 672 | if (rec->serializer) { | |
| 673 | must_schedule += lwkt_serialize_handler_try( | |
| 674 | rec->serializer, rec->handler, | |
| c7eb0589 | 675 | rec->argument, frame); |
| 477d3c1c | 676 | } else { |
| c7eb0589 | 677 | rec->handler(rec->argument, frame); |
| 477d3c1c MD |
678 | } |
| 679 | } | |
| 680 | } | |
| 681 | ||
| 682 | /* | |
| 683 | * Cleanup | |
| 684 | */ | |
| 685 | --gd->gd_intr_nesting_level; | |
| 686 | #ifdef SMP | |
| 687 | if (got_mplock) | |
| 688 | rel_mplock(); | |
| 689 | #endif | |
| 477d3c1c MD |
690 | |
| 691 | /* | |
| 729e15a8 SZ |
692 | * If we had a problem, or mixed fast and slow interrupt handlers are |
| 693 | * registered, schedule the ithread to catch the missed records (it | |
| 694 | * will just re-run all of them). A return value of 0 indicates that | |
| 695 | * all handlers have been run and the interrupt can be re-enabled, and | |
| 696 | * a non-zero return indicates that the interrupt thread controls | |
| 697 | * re-enablement. | |
| 477d3c1c | 698 | */ |
| afd7b1c0 | 699 | if (must_schedule > 0) |
| 729e15a8 | 700 | ithread_fast_sched(intr, td); |
| afd7b1c0 | 701 | else if (must_schedule == 0) |
| 477d3c1c MD |
702 | ++info->i_count; |
| 703 | return(must_schedule); | |
| 704 | } | |
| 705 | ||
| 37d44089 | 706 | /* |
| 45d76888 MD |
707 | * Interrupt threads run this as their main loop. |
| 708 | * | |
| 68b3ccd4 | 709 | * The handler begins execution outside a critical section and no MP lock. |
| 37d44089 | 710 | * |
| 477d3c1c | 711 | * The i_running state starts at 0. When an interrupt occurs, the hardware |
| 37d44089 MD |
712 | * interrupt is disabled and sched_ithd() The HW interrupt remains disabled |
| 713 | * until all routines have run. We then call ithread_done() to reenable | |
| 45d76888 MD |
714 | * the HW interrupt and deschedule us until the next interrupt. |
| 715 | * | |
| 477d3c1c | 716 | * We are responsible for atomically checking i_running and ithread_done() |
| 45d76888 | 717 | * is responsible for atomically checking for platform-specific delayed |
| 477d3c1c | 718 | * interrupts. i_running for our irq is only set in the context of our cpu, |
| 45d76888 | 719 | * so a critical section is a sufficient interlock. |
| b68b7282 | 720 | */ |
| 93781523 MD |
721 | #define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */ |
| 722 | ||
| ef0fdad1 MD |
723 | static void |
| 724 | ithread_handler(void *arg) | |
| 725 | { | |
| 477d3c1c | 726 | struct intr_info *info; |
| f33e9c1c | 727 | int use_limit; |
| b560de96 | 728 | __uint32_t lseconds; |
| 477d3c1c | 729 | int intr; |
| 9d522d14 | 730 | int mpheld; |
| 477d3c1c MD |
731 | struct intrec **list; |
| 732 | intrec_t rec, nrec; | |
| f33e9c1c | 733 | globaldata_t gd; |
| 67b9bb39 | 734 | struct systimer ill_timer; /* enforced freq. timer */ |
| f33e9c1c | 735 | u_int ill_count; /* interrupt livelock counter */ |
| 45d76888 | 736 | |
| f33e9c1c | 737 | ill_count = 0; |
| 973c11b9 | 738 | intr = (int)(intptr_t)arg; |
| 477d3c1c MD |
739 | info = &intr_info_ary[intr]; |
| 740 | list = &info->i_reclist; | |
| 477d3c1c | 741 | |
| 45d76888 | 742 | /* |
| 862f2618 MD |
743 | * The loop must be entered with one critical section held. The thread |
| 744 | * is created with TDF_MPSAFE so the MP lock is not held on start. | |
| 45d76888 | 745 | */ |
| e381e77c MD |
746 | gd = mycpu; |
| 747 | lseconds = gd->gd_time_seconds; | |
| 45d76888 | 748 | crit_enter_gd(gd); |
| 862f2618 | 749 | mpheld = 0; |
| ef0fdad1 | 750 | |
| ef0fdad1 | 751 | for (;;) { |
| 93781523 | 752 | /* |
| 862f2618 MD |
753 | * The chain is only considered MPSAFE if all its interrupt handlers |
| 754 | * are MPSAFE. However, if intr_mpsafe has been turned off we | |
| 755 | * always operate with the BGL. | |
| 756 | */ | |
| 0e6beaa3 | 757 | #ifdef SMP |
| c9e9fb21 | 758 | if (info->i_mplock_required != mpheld) { |
| 862f2618 MD |
759 | if (info->i_mplock_required) { |
| 760 | KKASSERT(mpheld == 0); | |
| c9e9fb21 | 761 | get_mplock(); |
| 862f2618 MD |
762 | mpheld = 1; |
| 763 | } else { | |
| 764 | KKASSERT(mpheld != 0); | |
| 765 | rel_mplock(); | |
| 766 | mpheld = 0; | |
| 767 | } | |
| 768 | } | |
| 0e6beaa3 | 769 | #endif |
| 862f2618 MD |
770 | |
| 771 | /* | |
| f33e9c1c MD |
772 | * If an interrupt is pending, clear i_running and execute the |
| 773 | * handlers. Note that certain types of interrupts can re-trigger | |
| 774 | * and set i_running again. | |
| 45d76888 | 775 | * |
| f33e9c1c | 776 | * Each handler is run in a critical section. Note that we run both |
| 862f2618 | 777 | * FAST and SLOW designated service routines. |
| 93781523 | 778 | */ |
| f33e9c1c MD |
779 | if (info->i_running) { |
| 780 | ++ill_count; | |
| 781 | info->i_running = 0; | |
| 9d522d14 | 782 | |
| b560de96 MD |
783 | if (*list == NULL) |
| 784 | report_stray_interrupt(intr, info); | |
| 785 | ||
| f33e9c1c MD |
786 | for (rec = *list; rec; rec = nrec) { |
| 787 | nrec = rec->next; | |
| 788 | if (rec->serializer) { | |
| 789 | lwkt_serialize_handler_call(rec->serializer, rec->handler, | |
| 790 | rec->argument, NULL); | |
| 791 | } else { | |
| 792 | rec->handler(rec->argument, NULL); | |
| 793 | } | |
| 477d3c1c | 794 | } |
| ef0fdad1 | 795 | } |
| 37d44089 MD |
796 | |
| 797 | /* | |
| 798 | * This is our interrupt hook to add rate randomness to the random | |
| 799 | * number generator. | |
| 800 | */ | |
| 8b3ec75a | 801 | if (info->i_random.sc_enabled > 0) |
| 96728c05 | 802 | add_interrupt_randomness(intr); |
| 37d44089 MD |
803 | |
| 804 | /* | |
| f33e9c1c MD |
805 | * Unmask the interrupt to allow it to trigger again. This only |
| 806 | * applies to certain types of interrupts (typ level interrupts). | |
| 807 | * This can result in the interrupt retriggering, but the retrigger | |
| 808 | * will not be processed until we cycle our critical section. | |
| 363d922a MD |
809 | * |
| 810 | * Only unmask interrupts while handlers are installed. It is | |
| 811 | * possible to hit a situation where no handlers are installed | |
| 812 | * due to a device driver livelocking and then tearing down its | |
| 813 | * interrupt on close (the parallel bus being a good example). | |
| 37d44089 | 814 | */ |
| 363d922a | 815 | if (*list) |
| 37e7efec | 816 | machintr_intren(intr); |
| f33e9c1c MD |
817 | |
| 818 | /* | |
| 819 | * Do a quick exit/enter to catch any higher-priority interrupt | |
| 820 | * sources, such as the statclock, so thread time accounting | |
| 821 | * will still work. This may also cause an interrupt to re-trigger. | |
| 822 | */ | |
| 823 | crit_exit_gd(gd); | |
| 824 | crit_enter_gd(gd); | |
| 825 | ||
| 826 | /* | |
| 827 | * LIVELOCK STATE MACHINE | |
| 828 | */ | |
| 829 | switch(info->i_state) { | |
| 830 | case ISTATE_NORMAL: | |
| 831 | /* | |
| b560de96 | 832 | * Reset the count each second. |
| f33e9c1c | 833 | */ |
| b560de96 MD |
834 | if (lseconds != gd->gd_time_seconds) { |
| 835 | lseconds = gd->gd_time_seconds; | |
| 836 | ill_count = 0; | |
| f33e9c1c MD |
837 | } |
| 838 | ||
| 839 | /* | |
| 840 | * If we did not exceed the frequency limit, we are done. | |
| 841 | * If the interrupt has not retriggered we deschedule ourselves. | |
| 842 | */ | |
| 843 | if (ill_count <= livelock_limit) { | |
| 844 | if (info->i_running == 0) { | |
| 845 | lwkt_deschedule_self(gd->gd_curthread); | |
| 846 | lwkt_switch(); | |
| 847 | } | |
| 37d44089 | 848 | break; |
| f33e9c1c MD |
849 | } |
| 850 | ||
| 851 | /* | |
| 852 | * Otherwise we are livelocked. Set up a periodic systimer | |
| 853 | * to wake the thread up at the limit frequency. | |
| 854 | */ | |
| b560de96 | 855 | kprintf("intr %d at %d/%d hz, livelocked limit engaged!\n", |
| 59d9413f | 856 | intr, ill_count, livelock_limit); |
| f33e9c1c MD |
857 | info->i_state = ISTATE_LIVELOCKED; |
| 858 | if ((use_limit = livelock_limit) < 100) | |
| 859 | use_limit = 100; | |
| 860 | else if (use_limit > 500000) | |
| 861 | use_limit = 500000; | |
| 79b38af2 | 862 | systimer_init_periodic_nq(&ill_timer, ithread_livelock_wakeup, |
| 973c11b9 | 863 | (void *)(intptr_t)intr, use_limit); |
| 37d44089 | 864 | /* fall through */ |
| f33e9c1c | 865 | case ISTATE_LIVELOCKED: |
| 37d44089 | 866 | /* |
| f33e9c1c MD |
867 | * Wait for our periodic timer to go off. Since the interrupt |
| 868 | * has re-armed it can still set i_running, but it will not | |
| 869 | * reschedule us while we are in a livelocked state. | |
| 37d44089 | 870 | */ |
| f33e9c1c | 871 | lwkt_deschedule_self(gd->gd_curthread); |
| 37d44089 | 872 | lwkt_switch(); |
| 93781523 | 873 | |
| 37d44089 | 874 | /* |
| b560de96 MD |
875 | * Check once a second to see if the livelock condition no |
| 876 | * longer applies. | |
| 37d44089 | 877 | */ |
| b560de96 MD |
878 | if (lseconds != gd->gd_time_seconds) { |
| 879 | lseconds = gd->gd_time_seconds; | |
| f33e9c1c | 880 | if (ill_count < livelock_lowater) { |
| b560de96 MD |
881 | info->i_state = ISTATE_NORMAL; |
| 882 | systimer_del(&ill_timer); | |
| 883 | kprintf("intr %d at %d/%d hz, livelock removed\n", | |
| 884 | intr, ill_count, livelock_lowater); | |
| 885 | } else if (livelock_debug == intr || | |
| 886 | (bootverbose && cold)) { | |
| 887 | kprintf("intr %d at %d/%d hz, in livelock\n", | |
| 888 | intr, ill_count, livelock_lowater); | |
| f33e9c1c | 889 | } |
| b560de96 | 890 | ill_count = 0; |
| 37d44089 MD |
891 | } |
| 892 | break; | |
| 893 | } | |
| ef0fdad1 | 894 | } |
| e43a034f | 895 | /* not reached */ |
| ef0fdad1 MD |
896 | } |
| 897 | ||
| a9d00ec1 MD |
898 | /* |
| 899 | * Emergency interrupt polling thread. The thread begins execution | |
| 900 | * outside a critical section with the BGL held. | |
| 901 | * | |
| 902 | * If emergency interrupt polling is enabled, this thread will | |
| 903 | * execute all system interrupts not marked INTR_NOPOLL at the | |
| 904 | * specified polling frequency. | |
| 905 | * | |
| 906 | * WARNING! This thread runs *ALL* interrupt service routines that | |
| 907 | * are not marked INTR_NOPOLL, which basically means everything except | |
| 908 | * the 8254 clock interrupt and the ATA interrupt. It has very high | |
| 909 | * overhead and should only be used in situations where the machine | |
| 910 | * cannot otherwise be made to work. Due to the severe performance | |
| 911 | * degredation, it should not be enabled on production machines. | |
| 912 | */ | |
| 913 | static void | |
| 914 | ithread_emergency(void *arg __unused) | |
| 915 | { | |
| 916 | struct intr_info *info; | |
| 917 | intrec_t rec, nrec; | |
| 918 | int intr; | |
| 919 | ||
| c9e9fb21 MD |
920 | get_mplock(); |
| 921 | ||
| a9d00ec1 | 922 | for (;;) { |
| 5f456c40 | 923 | for (intr = 0; intr < max_installed_hard_intr; ++intr) { |
| a9d00ec1 MD |
924 | info = &intr_info_ary[intr]; |
| 925 | for (rec = info->i_reclist; rec; rec = nrec) { | |
| 926 | if ((rec->intr_flags & INTR_NOPOLL) == 0) { | |
| 927 | if (rec->serializer) { | |
| 928 | lwkt_serialize_handler_call(rec->serializer, | |
| 929 | rec->handler, rec->argument, NULL); | |
| 930 | } else { | |
| 931 | rec->handler(rec->argument, NULL); | |
| 932 | } | |
| 933 | } | |
| 934 | nrec = rec->next; | |
| 935 | } | |
| 936 | } | |
| 937 | lwkt_deschedule_self(curthread); | |
| 938 | lwkt_switch(); | |
| 939 | } | |
| 940 | } | |
| 941 | ||
| 942 | /* | |
| 943 | * Systimer callback - schedule the emergency interrupt poll thread | |
| 944 | * if emergency polling is enabled. | |
| 945 | */ | |
| 946 | static | |
| 947 | void | |
| 948 | emergency_intr_timer_callback(systimer_t info, struct intrframe *frame __unused) | |
| 949 | { | |
| 950 | if (emergency_intr_enable) | |
| 951 | lwkt_schedule(info->data); | |
| 952 | } | |
| 953 | ||
| 9db4b353 SZ |
954 | int |
| 955 | ithread_cpuid(int intr) | |
| 956 | { | |
| 957 | const struct intr_info *info; | |
| 958 | ||
| 959 | KKASSERT(intr >= 0 && intr < MAX_INTS); | |
| 960 | info = &intr_info_ary[intr]; | |
| 961 | ||
| 962 | if (info->i_state == ISTATE_NOTHREAD) | |
| 963 | return -1; | |
| 964 | return info->i_thread.td_gd->gd_cpuid; | |
| 965 | } | |
| 966 | ||
| 984263bc MD |
967 | /* |
| 968 | * Sysctls used by systat and others: hw.intrnames and hw.intrcnt. | |
| 969 | * The data for this machine dependent, and the declarations are in machine | |
| 970 | * dependent code. The layout of intrnames and intrcnt however is machine | |
| 971 | * independent. | |
| 972 | * | |
| 973 | * We do not know the length of intrcnt and intrnames at compile time, so | |
| 974 | * calculate things at run time. | |
| 975 | */ | |
| 477d3c1c | 976 | |
| 984263bc MD |
977 | static int |
| 978 | sysctl_intrnames(SYSCTL_HANDLER_ARGS) | |
| 979 | { | |
| 477d3c1c MD |
980 | struct intr_info *info; |
| 981 | intrec_t rec; | |
| 982 | int error = 0; | |
| 983 | int len; | |
| 984 | int intr; | |
| 985 | char buf[64]; | |
| 986 | ||
| 5f456c40 | 987 | for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) { |
| 477d3c1c MD |
988 | info = &intr_info_ary[intr]; |
| 989 | ||
| 990 | len = 0; | |
| 991 | buf[0] = 0; | |
| 992 | for (rec = info->i_reclist; rec; rec = rec->next) { | |
| f8c7a42d | 993 | ksnprintf(buf + len, sizeof(buf) - len, "%s%s", |
| 477d3c1c MD |
994 | (len ? "/" : ""), rec->name); |
| 995 | len += strlen(buf + len); | |
| 996 | } | |
| 997 | if (len == 0) { | |
| f8c7a42d | 998 | ksnprintf(buf, sizeof(buf), "irq%d", intr); |
| 477d3c1c MD |
999 | len = strlen(buf); |
| 1000 | } | |
| 1001 | error = SYSCTL_OUT(req, buf, len + 1); | |
| 1002 | } | |
| 1003 | return (error); | |
| 984263bc MD |
1004 | } |
| 1005 | ||
| 477d3c1c | 1006 | |
| 984263bc MD |
1007 | SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD, |
| 1008 | NULL, 0, sysctl_intrnames, "", "Interrupt Names"); | |
| 1009 | ||
| 1010 | static int | |
| 1011 | sysctl_intrcnt(SYSCTL_HANDLER_ARGS) | |
| 1012 | { | |
| 477d3c1c MD |
1013 | struct intr_info *info; |
| 1014 | int error = 0; | |
| 1015 | int intr; | |
| 1016 | ||
| 5f456c40 | 1017 | for (intr = 0; intr < max_installed_hard_intr; ++intr) { |
| 477d3c1c MD |
1018 | info = &intr_info_ary[intr]; |
| 1019 | ||
| 1020 | error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count)); | |
| 1021 | if (error) | |
| 5f456c40 MD |
1022 | goto failed; |
| 1023 | } | |
| 1024 | for (intr = FIRST_SOFTINT; intr < max_installed_soft_intr; ++intr) { | |
| 1025 | info = &intr_info_ary[intr]; | |
| 1026 | ||
| 1027 | error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count)); | |
| 1028 | if (error) | |
| 1029 | goto failed; | |
| 477d3c1c | 1030 | } |
| 5f456c40 | 1031 | failed: |
| 477d3c1c | 1032 | return(error); |
| 984263bc MD |
1033 | } |
| 1034 | ||
| 1035 | SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD, | |
| 1036 | NULL, 0, sysctl_intrcnt, "", "Interrupt Counts"); | |
| 477d3c1c | 1037 | |
| 4c846371 SZ |
1038 | static void |
| 1039 | int_moveto_destcpu(int *orig_cpuid0, int *cpuid0, int intr) | |
| 1040 | { | |
| 1041 | int orig_cpuid = mycpuid, cpuid; | |
| 1042 | char envpath[32]; | |
| 1043 | ||
| 1044 | cpuid = orig_cpuid; | |
| 1045 | ksnprintf(envpath, sizeof(envpath), "hw.irq.%d.dest", intr); | |
| 1046 | kgetenv_int(envpath, &cpuid); | |
| 1047 | if (cpuid >= ncpus) | |
| 1048 | cpuid = orig_cpuid; | |
| 1049 | ||
| 1050 | if (cpuid != orig_cpuid) | |
| 1051 | lwkt_migratecpu(cpuid); | |
| 1052 | ||
| 1053 | *orig_cpuid0 = orig_cpuid; | |
| 1054 | *cpuid0 = cpuid; | |
| 1055 | } | |
| 1056 | ||
| 1057 | static void | |
| 1058 | int_moveto_origcpu(int orig_cpuid, int cpuid) | |
| 1059 | { | |
| 1060 | if (cpuid != orig_cpuid) | |
| 1061 | lwkt_migratecpu(orig_cpuid); | |
| 1062 | } |