Remove some __P macros in sbin that my script missed.
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
6ef943a3 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.41 2003/11/03 17:11:18 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
57#include "opt_user_ldt.h"
58#include "opt_userconfig.h"
59
60#include <sys/param.h>
61#include <sys/systm.h>
62#include <sys/sysproto.h>
63#include <sys/signalvar.h>
64#include <sys/kernel.h>
65#include <sys/linker.h>
66#include <sys/malloc.h>
67#include <sys/proc.h>
68#include <sys/buf.h>
69#include <sys/reboot.h>
70#include <sys/callout.h>
71#include <sys/mbuf.h>
72#include <sys/msgbuf.h>
73#include <sys/sysent.h>
74#include <sys/sysctl.h>
75#include <sys/vmmeter.h>
76#include <sys/bus.h>
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
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105#ifdef SMP
106#include <machine/smp.h>
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107#endif
108#ifdef PERFMON
109#include <machine/perfmon.h>
110#endif
111#include <machine/cputypes.h>
112
113#ifdef OLD_BUS_ARCH
1f2de5d4 114#include <bus/isa/i386/isa_device.h>
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115#endif
116#include <i386/isa/intr_machdep.h>
1f2de5d4 117#include <bus/isa/rtc.h>
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118#include <machine/vm86.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
143static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
144
145int _udatasel, _ucodesel;
146u_int atdevbase;
147
148#if defined(SWTCH_OPTIM_STATS)
149extern int swtch_optim_stats;
150SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
151 CTLFLAG_RD, &swtch_optim_stats, 0, "");
152SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
153 CTLFLAG_RD, &tlb_flush_count, 0, "");
154#endif
155
156#ifdef PC98
157static int ispc98 = 1;
158#else
159static int ispc98 = 0;
160#endif
161SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
162
163int physmem = 0;
164int cold = 1;
165
166static int
167sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
168{
169 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 return (error);
171}
172
173SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
174 0, 0, sysctl_hw_physmem, "IU", "");
175
176static int
177sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
178{
179 int error = sysctl_handle_int(oidp, 0,
12e4aaff 180 ctob(physmem - vmstats.v_wire_count), req);
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181 return (error);
182}
183
184SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
185 0, 0, sysctl_hw_usermem, "IU", "");
186
187static int
188sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
189{
190 int error = sysctl_handle_int(oidp, 0,
191 i386_btop(avail_end - avail_start), req);
192 return (error);
193}
194
195SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
196 0, 0, sysctl_hw_availpages, "I", "");
197
198static int
199sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200{
201 int error;
202
203 /* Unwind the buffer, so that it's linear (possibly starting with
204 * some initial nulls).
205 */
206 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
207 msgbufp->msg_size-msgbufp->msg_bufr,req);
208 if(error) return(error);
209 if(msgbufp->msg_bufr>0) {
210 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
211 msgbufp->msg_bufr,req);
212 }
213 return(error);
214}
215
216SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
217 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
218
219static int msgbuf_clear;
220
221static int
222sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
223{
224 int error;
225 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
226 req);
227 if (!error && req->newptr) {
228 /* Clear the buffer and reset write pointer */
229 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
230 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
231 msgbuf_clear=0;
232 }
233 return (error);
234}
235
236SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
237 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
238 "Clear kernel message buffer");
239
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240int bootverbose = 0;
241vm_paddr_t Maxmem = 0;
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242long dumplo;
243
6ef943a3 244vm_paddr_t phys_avail[10];
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245
246/* must be 2 less so 0 0 can signal end of chunks */
247#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
248
249static vm_offset_t buffer_sva, buffer_eva;
250vm_offset_t clean_sva, clean_eva;
251static vm_offset_t pager_sva, pager_eva;
252static struct trapframe proc0_tf;
253
254static void
255cpu_startup(dummy)
256 void *dummy;
257{
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258 unsigned i;
259 caddr_t v;
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260 vm_offset_t maxaddr;
261 vm_size_t size = 0;
262 int firstaddr;
263 vm_offset_t minaddr;
264
265 if (boothowto & RB_VERBOSE)
266 bootverbose++;
267
268 /*
269 * Good {morning,afternoon,evening,night}.
270 */
271 printf("%s", version);
272 startrtclock();
273 printcpuinfo();
274 panicifcpuunsupported();
275#ifdef PERFMON
276 perfmon_init();
277#endif
6ef943a3 278 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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279 /*
280 * Display any holes after the first chunk of extended memory.
281 */
282 if (bootverbose) {
283 int indx;
284
285 printf("Physical memory chunk(s):\n");
286 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 287 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 288
6ef943a3 289 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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290 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
291 size1 / PAGE_SIZE);
292 }
293 }
294
295 /*
296 * Calculate callout wheel size
297 */
298 for (callwheelsize = 1, callwheelbits = 0;
299 callwheelsize < ncallout;
300 callwheelsize <<= 1, ++callwheelbits)
301 ;
302 callwheelmask = callwheelsize - 1;
303
304 /*
305 * Allocate space for system data structures.
306 * The first available kernel virtual address is in "v".
307 * As pages of kernel virtual memory are allocated, "v" is incremented.
308 * As pages of memory are allocated and cleared,
309 * "firstaddr" is incremented.
310 * An index into the kernel page table corresponding to the
311 * virtual memory address maintained in "v" is kept in "mapaddr".
312 */
313
314 /*
315 * Make two passes. The first pass calculates how much memory is
316 * needed and allocates it. The second pass assigns virtual
317 * addresses to the various data structures.
318 */
319 firstaddr = 0;
320again:
321 v = (caddr_t)firstaddr;
322
323#define valloc(name, type, num) \
324 (name) = (type *)v; v = (caddr_t)((name)+(num))
325#define valloclim(name, type, num, lim) \
326 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
327
328 valloc(callout, struct callout, ncallout);
329 valloc(callwheel, struct callout_tailq, callwheelsize);
330
331 /*
332 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
333 * For the first 64MB of ram nominally allocate sufficient buffers to
334 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
335 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
336 * the buffer cache we limit the eventual kva reservation to
337 * maxbcache bytes.
338 *
339 * factor represents the 1/4 x ram conversion.
340 */
341 if (nbuf == 0) {
342 int factor = 4 * BKVASIZE / 1024;
343 int kbytes = physmem * (PAGE_SIZE / 1024);
344
345 nbuf = 50;
346 if (kbytes > 4096)
347 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
348 if (kbytes > 65536)
349 nbuf += (kbytes - 65536) * 2 / (factor * 5);
350 if (maxbcache && nbuf > maxbcache / BKVASIZE)
351 nbuf = maxbcache / BKVASIZE;
352 }
353
354 /*
355 * Do not allow the buffer_map to be more then 1/2 the size of the
356 * kernel_map.
357 */
358 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
359 (BKVASIZE * 2)) {
360 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
361 (BKVASIZE * 2);
362 printf("Warning: nbufs capped at %d\n", nbuf);
363 }
364
365 nswbuf = max(min(nbuf/4, 256), 16);
366#ifdef NSWBUF_MIN
367 if (nswbuf < NSWBUF_MIN)
368 nswbuf = NSWBUF_MIN;
369#endif
370#ifdef DIRECTIO
371 ffs_rawread_setup();
372#endif
373
374 valloc(swbuf, struct buf, nswbuf);
375 valloc(buf, struct buf, nbuf);
376 v = bufhashinit(v);
377
378 /*
379 * End of first pass, size has been calculated so allocate memory
380 */
381 if (firstaddr == 0) {
382 size = (vm_size_t)(v - firstaddr);
383 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
384 if (firstaddr == 0)
385 panic("startup: no room for tables");
386 goto again;
387 }
388
389 /*
390 * End of second pass, addresses have been assigned
391 */
392 if ((vm_size_t)(v - firstaddr) != size)
393 panic("startup: table size inconsistency");
394
395 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
396 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
397 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
398 (nbuf*BKVASIZE));
399 buffer_map->system_map = 1;
400 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
401 (nswbuf*MAXPHYS) + pager_map_size);
402 pager_map->system_map = 1;
403 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
404 (16*(ARG_MAX+(PAGE_SIZE*3))));
405
406 /*
407 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
408 * we use the more space efficient malloc in place of kmem_alloc.
409 */
410 {
411 vm_offset_t mb_map_size;
412
413 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
414 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
415 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
416 bzero(mclrefcnt, mb_map_size / MCLBYTES);
ce634264 417 mb_map = kmem_suballoc(kernel_map, (vm_offset_t *)&mbutl,
03aa8d99 418 &maxaddr, mb_map_size);
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419 mb_map->system_map = 1;
420 }
421
422 /*
423 * Initialize callouts
424 */
425 SLIST_INIT(&callfree);
426 for (i = 0; i < ncallout; i++) {
427 callout_init(&callout[i]);
428 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
429 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
430 }
431
432 for (i = 0; i < callwheelsize; i++) {
433 TAILQ_INIT(&callwheel[i]);
434 }
435
436#if defined(USERCONFIG)
437 userconfig();
438 cninit(); /* the preferred console may have changed */
439#endif
440
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441 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
442 ptoa(vmstats.v_free_count) / 1024);
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443
444 /*
445 * Set up buffers, so they can be used to read disk labels.
446 */
447 bufinit();
448 vm_pager_bufferinit();
449
450#ifdef SMP
451 /*
452 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
453 */
454 mp_start(); /* fire up the APs and APICs */
455 mp_announce();
456#endif /* SMP */
457 cpu_setregs();
458}
459
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460/*
461 * Send an interrupt to process.
462 *
463 * Stack is set up to allow sigcode stored
464 * at top to call routine, followed by kcall
465 * to sigreturn routine below. After sigreturn
466 * resets the signal mask, the stack, and the
467 * frame pointer, it returns to the user
468 * specified pc, psl.
469 */
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470void
471sendsig(catcher, sig, mask, code)
472 sig_t catcher;
473 int sig;
474 sigset_t *mask;
475 u_long code;
476{
477 struct proc *p = curproc;
478 struct trapframe *regs;
479 struct sigacts *psp = p->p_sigacts;
480 struct sigframe sf, *sfp;
481 int oonstack;
482
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483 regs = p->p_md.md_regs;
484 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
485
486 /* save user context */
487 bzero(&sf, sizeof(struct sigframe));
488 sf.sf_uc.uc_sigmask = *mask;
489 sf.sf_uc.uc_stack = p->p_sigstk;
490 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
491 sf.sf_uc.uc_mcontext.mc_gs = rgs();
492 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
493
494 /* Allocate and validate space for the signal handler context. */
495 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
496 SIGISMEMBER(psp->ps_sigonstack, sig)) {
497 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
498 p->p_sigstk.ss_size - sizeof(struct sigframe));
499 p->p_sigstk.ss_flags |= SS_ONSTACK;
500 }
501 else
502 sfp = (struct sigframe *)regs->tf_esp - 1;
503
504 /* Translate the signal is appropriate */
505 if (p->p_sysent->sv_sigtbl) {
506 if (sig <= p->p_sysent->sv_sigsize)
507 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
508 }
509
510 /* Build the argument list for the signal handler. */
511 sf.sf_signum = sig;
512 sf.sf_ucontext = (register_t)&sfp->sf_uc;
513 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
514 /* Signal handler installed with SA_SIGINFO. */
515 sf.sf_siginfo = (register_t)&sfp->sf_si;
516 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
517
518 /* fill siginfo structure */
519 sf.sf_si.si_signo = sig;
520 sf.sf_si.si_code = code;
521 sf.sf_si.si_addr = (void*)regs->tf_err;
522 }
523 else {
524 /* Old FreeBSD-style arguments. */
525 sf.sf_siginfo = code;
526 sf.sf_addr = regs->tf_err;
527 sf.sf_ahu.sf_handler = catcher;
528 }
529
530 /*
531 * If we're a vm86 process, we want to save the segment registers.
532 * We also change eflags to be our emulated eflags, not the actual
533 * eflags.
534 */
535 if (regs->tf_eflags & PSL_VM) {
536 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 537 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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538
539 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
540 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
541 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
542 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
543
544 if (vm86->vm86_has_vme == 0)
545 sf.sf_uc.uc_mcontext.mc_eflags =
546 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
547 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
548
549 /*
550 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
551 * syscalls made by the signal handler. This just avoids
552 * wasting time for our lazy fixup of such faults. PSL_NT
553 * does nothing in vm86 mode, but vm86 programs can set it
554 * almost legitimately in probes for old cpu types.
555 */
556 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
557 }
558
559 /*
560 * Copy the sigframe out to the user's stack.
561 */
562 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
563 /*
564 * Something is wrong with the stack pointer.
565 * ...Kill the process.
566 */
567 sigexit(p, SIGILL);
568 }
569
570 regs->tf_esp = (int)sfp;
571 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
572 regs->tf_eflags &= ~PSL_T;
573 regs->tf_cs = _ucodesel;
574 regs->tf_ds = _udatasel;
575 regs->tf_es = _udatasel;
576 regs->tf_fs = _udatasel;
577 load_gs(_udatasel);
578 regs->tf_ss = _udatasel;
579}
580
581/*
65957d54 582 * sigreturn(ucontext_t *sigcntxp)
41c20dac 583 *
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584 * System call to cleanup state after a signal
585 * has been taken. Reset signal mask and
586 * stack state from context left by sendsig (above).
587 * Return to previous pc and psl as specified by
588 * context left by sendsig. Check carefully to
589 * make sure that the user has not modified the
590 * state to gain improper privileges.
591 */
592#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
593#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
594
984263bc 595int
41c20dac 596sigreturn(struct sigreturn_args *uap)
984263bc 597{
41c20dac 598 struct proc *p = curproc;
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599 struct trapframe *regs;
600 ucontext_t *ucp;
601 int cs, eflags;
602
603 ucp = uap->sigcntxp;
604
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605 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
606 return (EFAULT);
607
608 regs = p->p_md.md_regs;
609 eflags = ucp->uc_mcontext.mc_eflags;
610
611 if (eflags & PSL_VM) {
612 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
613 struct vm86_kernel *vm86;
614
615 /*
616 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
617 * set up the vm86 area, and we can't enter vm86 mode.
618 */
b7c628e4 619 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 620 return (EINVAL);
b7c628e4 621 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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622 if (vm86->vm86_inited == 0)
623 return (EINVAL);
624
625 /* go back to user mode if both flags are set */
626 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
627 trapsignal(p, SIGBUS, 0);
628
629 if (vm86->vm86_has_vme) {
630 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
631 (eflags & VME_USERCHANGE) | PSL_VM;
632 } else {
633 vm86->vm86_eflags = eflags; /* save VIF, VIP */
634 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
635 }
636 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
637 tf->tf_eflags = eflags;
638 tf->tf_vm86_ds = tf->tf_ds;
639 tf->tf_vm86_es = tf->tf_es;
640 tf->tf_vm86_fs = tf->tf_fs;
641 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
642 tf->tf_ds = _udatasel;
643 tf->tf_es = _udatasel;
644 tf->tf_fs = _udatasel;
645 } else {
646 /*
647 * Don't allow users to change privileged or reserved flags.
648 */
649 /*
650 * XXX do allow users to change the privileged flag PSL_RF.
651 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
652 * should sometimes set it there too. tf_eflags is kept in
653 * the signal context during signal handling and there is no
654 * other place to remember it, so the PSL_RF bit may be
655 * corrupted by the signal handler without us knowing.
656 * Corruption of the PSL_RF bit at worst causes one more or
657 * one less debugger trap, so allowing it is fairly harmless.
658 */
659 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
660 printf("sigreturn: eflags = 0x%x\n", eflags);
661 return(EINVAL);
662 }
663
664 /*
665 * Don't allow users to load a valid privileged %cs. Let the
666 * hardware check for invalid selectors, excess privilege in
667 * other selectors, invalid %eip's and invalid %esp's.
668 */
669 cs = ucp->uc_mcontext.mc_cs;
670 if (!CS_SECURE(cs)) {
671 printf("sigreturn: cs = 0x%x\n", cs);
672 trapsignal(p, SIGBUS, T_PROTFLT);
673 return(EINVAL);
674 }
675 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
676 }
677
678 if (ucp->uc_mcontext.mc_onstack & 1)
679 p->p_sigstk.ss_flags |= SS_ONSTACK;
680 else
681 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
682
683 p->p_sigmask = ucp->uc_sigmask;
684 SIG_CANTMASK(p->p_sigmask);
685 return(EJUSTRETURN);
686}
687
688/*
689 * Machine dependent boot() routine
690 *
691 * I haven't seen anything to put here yet
692 * Possibly some stuff might be grafted back here from boot()
693 */
694void
695cpu_boot(int howto)
696{
697}
698
699/*
700 * Shutdown the CPU as much as possible
701 */
702void
703cpu_halt(void)
704{
705 for (;;)
706 __asm__ ("hlt");
707}
708
709/*
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710 * cpu_idle() represents the idle LWKT. You cannot return from this function
711 * (unless you want to blow things up!). Instead we look for runnable threads
712 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 713 *
26a0694b 714 * The main loop is entered with a critical section held, we must release
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715 * the critical section before doing anything else. lwkt_switch() will
716 * check for pending interrupts due to entering and exiting its own
717 * critical section.
26a0694b 718 *
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719 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
720 * to wake a HLTed cpu up. However, there are cases where the idlethread
721 * will be entered with the possibility that no IPI will occur and in such
722 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 723 */
96728c05 724static int cpu_idle_hlt = 1;
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725SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
726 &cpu_idle_hlt, 0, "Idle loop HLT enable");
727
728void
729cpu_idle(void)
730{
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731 struct thread *td = curthread;
732
26a0694b 733 crit_exit();
a2a5ad0d 734 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 735 for (;;) {
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736 /*
737 * See if there are any LWKTs ready to go.
738 */
8ad65e08 739 lwkt_switch();
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740
741 /*
742 * If we are going to halt call splz unconditionally after
743 * CLIing to catch any interrupt races. Note that we are
744 * at SPL0 and interrupts are enabled.
745 */
746 if (cpu_idle_hlt && !lwkt_runnable() &&
747 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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748 /*
749 * We must guarentee that hlt is exactly the instruction
750 * following the sti.
751 */
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752 __asm __volatile("cli");
753 splz();
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754 __asm __volatile("sti; hlt");
755 } else {
a2a5ad0d 756 td->td_flags &= ~TDF_IDLE_NOHLT;
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757 __asm __volatile("sti");
758 }
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759 }
760}
761
762/*
763 * Clear registers on exec
764 */
765void
766setregs(p, entry, stack, ps_strings)
767 struct proc *p;
768 u_long entry;
769 u_long stack;
770 u_long ps_strings;
771{
772 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 773 struct pcb *pcb = p->p_thread->td_pcb;
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774
775 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
776 pcb->pcb_gs = _udatasel;
777 load_gs(_udatasel);
778
779#ifdef USER_LDT
780 /* was i386_user_cleanup() in NetBSD */
781 user_ldt_free(pcb);
782#endif
783
784 bzero((char *)regs, sizeof(struct trapframe));
785 regs->tf_eip = entry;
786 regs->tf_esp = stack;
787 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
788 regs->tf_ss = _udatasel;
789 regs->tf_ds = _udatasel;
790 regs->tf_es = _udatasel;
791 regs->tf_fs = _udatasel;
792 regs->tf_cs = _ucodesel;
793
794 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
795 regs->tf_ebx = ps_strings;
796
797 /*
798 * Reset the hardware debug registers if they were in use.
799 * They won't have any meaning for the newly exec'd process.
800 */
801 if (pcb->pcb_flags & PCB_DBREGS) {
802 pcb->pcb_dr0 = 0;
803 pcb->pcb_dr1 = 0;
804 pcb->pcb_dr2 = 0;
805 pcb->pcb_dr3 = 0;
806 pcb->pcb_dr6 = 0;
807 pcb->pcb_dr7 = 0;
b7c628e4 808 if (pcb == curthread->td_pcb) {
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809 /*
810 * Clear the debug registers on the running
811 * CPU, otherwise they will end up affecting
812 * the next process we switch to.
813 */
814 reset_dbregs();
815 }
816 pcb->pcb_flags &= ~PCB_DBREGS;
817 }
818
819 /*
820 * Initialize the math emulator (if any) for the current process.
821 * Actually, just clear the bit that says that the emulator has
822 * been initialized. Initialization is delayed until the process
823 * traps to the emulator (if it is done at all) mainly because
824 * emulators don't provide an entry point for initialization.
825 */
b7c628e4 826 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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827
828 /*
829 * Arrange to trap the next npx or `fwait' instruction (see npx.c
830 * for why fwait must be trapped at least if there is an npx or an
831 * emulator). This is mainly to handle the case where npx0 is not
832 * configured, since the npx routines normally set up the trap
833 * otherwise. It should be done only at boot time, but doing it
834 * here allows modifying `npx_exists' for testing the emulator on
835 * systems with an npx.
836 */
837 load_cr0(rcr0() | CR0_MP | CR0_TS);
838
839#if NNPX > 0
840 /* Initialize the npx (if any) for the current process. */
841 npxinit(__INITIAL_NPXCW__);
842#endif
843
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844 /*
845 * note: linux emulator needs edx to be 0x0 on entry, which is
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846 * handled in execve simply by setting the 64 bit syscall
847 * return value to 0.
90b9818c 848 */
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849}
850
851void
852cpu_setregs(void)
853{
854 unsigned int cr0;
855
856 cr0 = rcr0();
857 cr0 |= CR0_NE; /* Done by npxinit() */
858 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
859#ifdef I386_CPU
860 if (cpu_class != CPUCLASS_386)
861#endif
862 cr0 |= CR0_WP | CR0_AM;
863 load_cr0(cr0);
864 load_gs(_udatasel);
865}
866
867static int
868sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
869{
870 int error;
871 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
872 req);
873 if (!error && req->newptr)
874 resettodr();
875 return (error);
876}
877
878SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
879 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
880
881SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
882 CTLFLAG_RW, &disable_rtc_set, 0, "");
883
884SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
885 CTLFLAG_RD, &bootinfo, bootinfo, "");
886
887SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
888 CTLFLAG_RW, &wall_cmos_clock, 0, "");
889
890extern u_long bootdev; /* not a dev_t - encoding is different */
891SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
892 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
893
894/*
895 * Initialize 386 and configure to run kernel
896 */
897
898/*
899 * Initialize segments & interrupt table
900 */
901
902int _default_ldt;
903union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
904static struct gate_descriptor idt0[NIDT];
905struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
906union descriptor ldt[NLDT]; /* local descriptor table */
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907
908/* table descriptors - used to load tables by cpu */
984263bc 909struct region_descriptor r_gdt, r_idt;
984263bc 910
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911#if defined(I586_CPU) && !defined(NO_F00F_HACK)
912extern int has_f00f_bug;
913#endif
914
915static struct i386tss dblfault_tss;
916static char dblfault_stack[PAGE_SIZE];
917
918extern struct user *proc0paddr;
919
920
921/* software prototypes -- in more palatable form */
922struct soft_segment_descriptor gdt_segs[] = {
923/* GNULL_SEL 0 Null Descriptor */
924{ 0x0, /* segment base address */
925 0x0, /* length */
926 0, /* segment type */
927 0, /* segment descriptor priority level */
928 0, /* segment descriptor present */
929 0, 0,
930 0, /* default 32 vs 16 bit size */
931 0 /* limit granularity (byte/page units)*/ },
932/* GCODE_SEL 1 Code Descriptor for kernel */
933{ 0x0, /* segment base address */
934 0xfffff, /* length - all address space */
935 SDT_MEMERA, /* segment type */
936 0, /* segment descriptor priority level */
937 1, /* segment descriptor present */
938 0, 0,
939 1, /* default 32 vs 16 bit size */
940 1 /* limit granularity (byte/page units)*/ },
941/* GDATA_SEL 2 Data Descriptor for kernel */
942{ 0x0, /* segment base address */
943 0xfffff, /* length - all address space */
944 SDT_MEMRWA, /* segment type */
945 0, /* segment descriptor priority level */
946 1, /* segment descriptor present */
947 0, 0,
948 1, /* default 32 vs 16 bit size */
949 1 /* limit granularity (byte/page units)*/ },
950/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
951{ 0x0, /* segment base address */
952 0xfffff, /* length - all address space */
953 SDT_MEMRWA, /* segment type */
954 0, /* segment descriptor priority level */
955 1, /* segment descriptor present */
956 0, 0,
957 1, /* default 32 vs 16 bit size */
958 1 /* limit granularity (byte/page units)*/ },
959/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
960{
961 0x0, /* segment base address */
962 sizeof(struct i386tss)-1,/* length - all address space */
963 SDT_SYS386TSS, /* segment type */
964 0, /* segment descriptor priority level */
965 1, /* segment descriptor present */
966 0, 0,
967 0, /* unused - default 32 vs 16 bit size */
968 0 /* limit granularity (byte/page units)*/ },
969/* GLDT_SEL 5 LDT Descriptor */
970{ (int) ldt, /* segment base address */
971 sizeof(ldt)-1, /* length - all address space */
972 SDT_SYSLDT, /* segment type */
973 SEL_UPL, /* segment descriptor priority level */
974 1, /* segment descriptor present */
975 0, 0,
976 0, /* unused - default 32 vs 16 bit size */
977 0 /* limit granularity (byte/page units)*/ },
978/* GUSERLDT_SEL 6 User LDT Descriptor per process */
979{ (int) ldt, /* segment base address */
980 (512 * sizeof(union descriptor)-1), /* length */
981 SDT_SYSLDT, /* segment type */
982 0, /* segment descriptor priority level */
983 1, /* segment descriptor present */
984 0, 0,
985 0, /* unused - default 32 vs 16 bit size */
986 0 /* limit granularity (byte/page units)*/ },
987/* GTGATE_SEL 7 Null Descriptor - Placeholder */
988{ 0x0, /* segment base address */
989 0x0, /* length - all address space */
990 0, /* segment type */
991 0, /* segment descriptor priority level */
992 0, /* segment descriptor present */
993 0, 0,
994 0, /* default 32 vs 16 bit size */
995 0 /* limit granularity (byte/page units)*/ },
996/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
997{ 0x400, /* segment base address */
998 0xfffff, /* length */
999 SDT_MEMRWA, /* segment type */
1000 0, /* segment descriptor priority level */
1001 1, /* segment descriptor present */
1002 0, 0,
1003 1, /* default 32 vs 16 bit size */
1004 1 /* limit granularity (byte/page units)*/ },
1005/* GPANIC_SEL 9 Panic Tss Descriptor */
1006{ (int) &dblfault_tss, /* segment base address */
1007 sizeof(struct i386tss)-1,/* length - all address space */
1008 SDT_SYS386TSS, /* segment type */
1009 0, /* segment descriptor priority level */
1010 1, /* segment descriptor present */
1011 0, 0,
1012 0, /* unused - default 32 vs 16 bit size */
1013 0 /* limit granularity (byte/page units)*/ },
1014/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1015{ 0, /* segment base address (overwritten) */
1016 0xfffff, /* length */
1017 SDT_MEMERA, /* segment type */
1018 0, /* segment descriptor priority level */
1019 1, /* segment descriptor present */
1020 0, 0,
1021 0, /* default 32 vs 16 bit size */
1022 1 /* limit granularity (byte/page units)*/ },
1023/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1024{ 0, /* segment base address (overwritten) */
1025 0xfffff, /* length */
1026 SDT_MEMERA, /* segment type */
1027 0, /* segment descriptor priority level */
1028 1, /* segment descriptor present */
1029 0, 0,
1030 0, /* default 32 vs 16 bit size */
1031 1 /* limit granularity (byte/page units)*/ },
1032/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1033{ 0, /* segment base address (overwritten) */
1034 0xfffff, /* length */
1035 SDT_MEMRWA, /* segment type */
1036 0, /* segment descriptor priority level */
1037 1, /* segment descriptor present */
1038 0, 0,
1039 1, /* default 32 vs 16 bit size */
1040 1 /* limit granularity (byte/page units)*/ },
1041/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1042{ 0, /* segment base address (overwritten) */
1043 0xfffff, /* length */
1044 SDT_MEMRWA, /* segment type */
1045 0, /* segment descriptor priority level */
1046 1, /* segment descriptor present */
1047 0, 0,
1048 0, /* default 32 vs 16 bit size */
1049 1 /* limit granularity (byte/page units)*/ },
1050/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1051{ 0, /* segment base address (overwritten) */
1052 0xfffff, /* length */
1053 SDT_MEMRWA, /* segment type */
1054 0, /* segment descriptor priority level */
1055 1, /* segment descriptor present */
1056 0, 0,
1057 0, /* default 32 vs 16 bit size */
1058 1 /* limit granularity (byte/page units)*/ },
1059};
1060
1061static struct soft_segment_descriptor ldt_segs[] = {
1062 /* Null Descriptor - overwritten by call gate */
1063{ 0x0, /* segment base address */
1064 0x0, /* length - all address space */
1065 0, /* segment type */
1066 0, /* segment descriptor priority level */
1067 0, /* segment descriptor present */
1068 0, 0,
1069 0, /* default 32 vs 16 bit size */
1070 0 /* limit granularity (byte/page units)*/ },
1071 /* Null Descriptor - overwritten by call gate */
1072{ 0x0, /* segment base address */
1073 0x0, /* length - all address space */
1074 0, /* segment type */
1075 0, /* segment descriptor priority level */
1076 0, /* segment descriptor present */
1077 0, 0,
1078 0, /* default 32 vs 16 bit size */
1079 0 /* limit granularity (byte/page units)*/ },
1080 /* Null Descriptor - overwritten by call gate */
1081{ 0x0, /* segment base address */
1082 0x0, /* length - all address space */
1083 0, /* segment type */
1084 0, /* segment descriptor priority level */
1085 0, /* segment descriptor present */
1086 0, 0,
1087 0, /* default 32 vs 16 bit size */
1088 0 /* limit granularity (byte/page units)*/ },
1089 /* Code Descriptor for user */
1090{ 0x0, /* segment base address */
1091 0xfffff, /* length - all address space */
1092 SDT_MEMERA, /* segment type */
1093 SEL_UPL, /* segment descriptor priority level */
1094 1, /* segment descriptor present */
1095 0, 0,
1096 1, /* default 32 vs 16 bit size */
1097 1 /* limit granularity (byte/page units)*/ },
1098 /* Null Descriptor - overwritten by call gate */
1099{ 0x0, /* segment base address */
1100 0x0, /* length - all address space */
1101 0, /* segment type */
1102 0, /* segment descriptor priority level */
1103 0, /* segment descriptor present */
1104 0, 0,
1105 0, /* default 32 vs 16 bit size */
1106 0 /* limit granularity (byte/page units)*/ },
1107 /* Data Descriptor for user */
1108{ 0x0, /* segment base address */
1109 0xfffff, /* length - all address space */
1110 SDT_MEMRWA, /* segment type */
1111 SEL_UPL, /* segment descriptor priority level */
1112 1, /* segment descriptor present */
1113 0, 0,
1114 1, /* default 32 vs 16 bit size */
1115 1 /* limit granularity (byte/page units)*/ },
1116};
1117
1118void
1119setidt(idx, func, typ, dpl, selec)
1120 int idx;
1121 inthand_t *func;
1122 int typ;
1123 int dpl;
1124 int selec;
1125{
1126 struct gate_descriptor *ip;
1127
1128 ip = idt + idx;
1129 ip->gd_looffset = (int)func;
1130 ip->gd_selector = selec;
1131 ip->gd_stkcpy = 0;
1132 ip->gd_xx = 0;
1133 ip->gd_type = typ;
1134 ip->gd_dpl = dpl;
1135 ip->gd_p = 1;
1136 ip->gd_hioffset = ((int)func)>>16 ;
1137}
1138
1139#define IDTVEC(name) __CONCAT(X,name)
1140
1141extern inthand_t
1142 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1143 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1144 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
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1145 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1146 IDTVEC(xmm), IDTVEC(syscall),
1147 IDTVEC(rsvd0);
a64ba182
MD
1148extern inthand_t
1149 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall);
984263bc 1150
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1151#ifdef DEBUG_INTERRUPTS
1152extern inthand_t *Xrsvdary[256];
1153#endif
1154
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1155void
1156sdtossd(sd, ssd)
1157 struct segment_descriptor *sd;
1158 struct soft_segment_descriptor *ssd;
1159{
1160 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1161 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1162 ssd->ssd_type = sd->sd_type;
1163 ssd->ssd_dpl = sd->sd_dpl;
1164 ssd->ssd_p = sd->sd_p;
1165 ssd->ssd_def32 = sd->sd_def32;
1166 ssd->ssd_gran = sd->sd_gran;
1167}
1168
1169#define PHYSMAP_SIZE (2 * 8)
1170
1171/*
1172 * Populate the (physmap) array with base/bound pairs describing the
1173 * available physical memory in the system, then test this memory and
1174 * build the phys_avail array describing the actually-available memory.
1175 *
1176 * If we cannot accurately determine the physical memory map, then use
1177 * value from the 0xE801 call, and failing that, the RTC.
1178 *
1179 * Total memory size may be set by the kernel environment variable
1180 * hw.physmem or the compile-time define MAXMEM.
1181 */
1182static void
1183getmemsize(int first)
1184{
1185 int i, physmap_idx, pa_indx;
1186 int hasbrokenint12;
1187 u_int basemem, extmem;
1188 struct vm86frame vmf;
1189 struct vm86context vmc;
1190 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1191 pt_entry_t pte;
1192 const char *cp;
1193 struct {
1194 u_int64_t base;
1195 u_int64_t length;
1196 u_int32_t type;
1197 } *smap;
1198
1199 hasbrokenint12 = 0;
1200 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1201 bzero(&vmf, sizeof(struct vm86frame));
1202 bzero(physmap, sizeof(physmap));
1203 basemem = 0;
1204
1205 /*
1206 * Some newer BIOSes has broken INT 12H implementation which cause
1207 * kernel panic immediately. In this case, we need to scan SMAP
1208 * with INT 15:E820 first, then determine base memory size.
1209 */
1210 if (hasbrokenint12) {
1211 goto int15e820;
1212 }
1213
1214 /*
1215 * Perform "base memory" related probes & setup
1216 */
1217 vm86_intcall(0x12, &vmf);
1218 basemem = vmf.vmf_ax;
1219 if (basemem > 640) {
1220 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1221 basemem);
1222 basemem = 640;
1223 }
1224
1225 /*
1226 * XXX if biosbasemem is now < 640, there is a `hole'
1227 * between the end of base memory and the start of
1228 * ISA memory. The hole may be empty or it may
1229 * contain BIOS code or data. Map it read/write so
1230 * that the BIOS can write to it. (Memory from 0 to
1231 * the physical end of the kernel is mapped read-only
1232 * to begin with and then parts of it are remapped.
1233 * The parts that aren't remapped form holes that
1234 * remain read-only and are unused by the kernel.
1235 * The base memory area is below the physical end of
1236 * the kernel and right now forms a read-only hole.
1237 * The part of it from PAGE_SIZE to
1238 * (trunc_page(biosbasemem * 1024) - 1) will be
1239 * remapped and used by the kernel later.)
1240 *
1241 * This code is similar to the code used in
1242 * pmap_mapdev, but since no memory needs to be
1243 * allocated we simply change the mapping.
1244 */
1245 for (pa = trunc_page(basemem * 1024);
1246 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1247 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1248 *pte = pa | PG_RW | PG_V;
1249 }
1250
1251 /*
1252 * if basemem != 640, map pages r/w into vm86 page table so
1253 * that the bios can scribble on it.
1254 */
1255 pte = (pt_entry_t)vm86paddr;
1256 for (i = basemem / 4; i < 160; i++)
1257 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1258
1259int15e820:
1260 /*
1261 * map page 1 R/W into the kernel page table so we can use it
1262 * as a buffer. The kernel will unmap this page later.
1263 */
1264 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1265 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1266
1267 /*
1268 * get memory map with INT 15:E820
1269 */
1270#define SMAPSIZ sizeof(*smap)
1271#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1272
1273 vmc.npages = 0;
1274 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1275 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1276
1277 physmap_idx = 0;
1278 vmf.vmf_ebx = 0;
1279 do {
1280 vmf.vmf_eax = 0xE820;
1281 vmf.vmf_edx = SMAP_SIG;
1282 vmf.vmf_ecx = SMAPSIZ;
1283 i = vm86_datacall(0x15, &vmf, &vmc);
1284 if (i || vmf.vmf_eax != SMAP_SIG)
1285 break;
1286 if (boothowto & RB_VERBOSE)
1287 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1288 smap->type,
1289 *(u_int32_t *)((char *)&smap->base + 4),
1290 (u_int32_t)smap->base,
1291 *(u_int32_t *)((char *)&smap->length + 4),
1292 (u_int32_t)smap->length);
1293
1294 if (smap->type != 0x01)
1295 goto next_run;
1296
1297 if (smap->length == 0)
1298 goto next_run;
1299
1300 if (smap->base >= 0xffffffff) {
1301 printf("%uK of memory above 4GB ignored\n",
1302 (u_int)(smap->length / 1024));
1303 goto next_run;
1304 }
1305
1306 for (i = 0; i <= physmap_idx; i += 2) {
1307 if (smap->base < physmap[i + 1]) {
1308 if (boothowto & RB_VERBOSE)
1309 printf(
1310 "Overlapping or non-montonic memory region, ignoring second region\n");
1311 goto next_run;
1312 }
1313 }
1314
1315 if (smap->base == physmap[physmap_idx + 1]) {
1316 physmap[physmap_idx + 1] += smap->length;
1317 goto next_run;
1318 }
1319
1320 physmap_idx += 2;
1321 if (physmap_idx == PHYSMAP_SIZE) {
1322 printf(
1323 "Too many segments in the physical address map, giving up\n");
1324 break;
1325 }
1326 physmap[physmap_idx] = smap->base;
1327 physmap[physmap_idx + 1] = smap->base + smap->length;
1328next_run:
1329 } while (vmf.vmf_ebx != 0);
1330
1331 /*
1332 * Perform "base memory" related probes & setup based on SMAP
1333 */
1334 if (basemem == 0) {
1335 for (i = 0; i <= physmap_idx; i += 2) {
1336 if (physmap[i] == 0x00000000) {
1337 basemem = physmap[i + 1] / 1024;
1338 break;
1339 }
1340 }
1341
1342 if (basemem == 0) {
1343 basemem = 640;
1344 }
1345
1346 if (basemem > 640) {
1347 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1348 basemem);
1349 basemem = 640;
1350 }
1351
1352 for (pa = trunc_page(basemem * 1024);
1353 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1354 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1355 *pte = pa | PG_RW | PG_V;
1356 }
1357
1358 pte = (pt_entry_t)vm86paddr;
1359 for (i = basemem / 4; i < 160; i++)
1360 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1361 }
1362
1363 if (physmap[1] != 0)
1364 goto physmap_done;
1365
1366 /*
1367 * If we failed above, try memory map with INT 15:E801
1368 */
1369 vmf.vmf_ax = 0xE801;
1370 if (vm86_intcall(0x15, &vmf) == 0) {
1371 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1372 } else {
1373#if 0
1374 vmf.vmf_ah = 0x88;
1375 vm86_intcall(0x15, &vmf);
1376 extmem = vmf.vmf_ax;
1377#else
1378 /*
1379 * Prefer the RTC value for extended memory.
1380 */
1381 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1382#endif
1383 }
1384
1385 /*
1386 * Special hack for chipsets that still remap the 384k hole when
1387 * there's 16MB of memory - this really confuses people that
1388 * are trying to use bus mastering ISA controllers with the
1389 * "16MB limit"; they only have 16MB, but the remapping puts
1390 * them beyond the limit.
1391 *
1392 * If extended memory is between 15-16MB (16-17MB phys address range),
1393 * chop it to 15MB.
1394 */
1395 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1396 extmem = 15 * 1024;
1397
1398 physmap[0] = 0;
1399 physmap[1] = basemem * 1024;
1400 physmap_idx = 2;
1401 physmap[physmap_idx] = 0x100000;
1402 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1403
1404physmap_done:
1405 /*
1406 * Now, physmap contains a map of physical memory.
1407 */
1408
1409#ifdef SMP
17a9f566 1410 /* make hole for AP bootstrap code YYY */
984263bc
MD
1411 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1412
1413 /* look for the MP hardware - needed for apic addresses */
1414 mp_probe();
1415#endif
1416
1417 /*
1418 * Maxmem isn't the "maximum memory", it's one larger than the
1419 * highest page of the physical address space. It should be
1420 * called something like "Maxphyspage". We may adjust this
1421 * based on ``hw.physmem'' and the results of the memory test.
1422 */
1423 Maxmem = atop(physmap[physmap_idx + 1]);
1424
1425#ifdef MAXMEM
1426 Maxmem = MAXMEM / 4;
1427#endif
1428
1429 /*
eb7d35b8 1430 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1431 * for the appropriate modifiers. This overrides MAXMEM.
1432 */
1433 if ((cp = getenv("hw.physmem")) != NULL) {
1434 u_int64_t AllowMem, sanity;
1435 char *ep;
1436
1437 sanity = AllowMem = strtouq(cp, &ep, 0);
1438 if ((ep != cp) && (*ep != 0)) {
1439 switch(*ep) {
1440 case 'g':
1441 case 'G':
1442 AllowMem <<= 10;
1443 case 'm':
1444 case 'M':
1445 AllowMem <<= 10;
1446 case 'k':
1447 case 'K':
1448 AllowMem <<= 10;
1449 break;
1450 default:
1451 AllowMem = sanity = 0;
1452 }
1453 if (AllowMem < sanity)
1454 AllowMem = 0;
1455 }
1456 if (AllowMem == 0)
1457 printf("Ignoring invalid memory size of '%s'\n", cp);
1458 else
1459 Maxmem = atop(AllowMem);
1460 }
1461
1462 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1463 (boothowto & RB_VERBOSE))
6ef943a3 1464 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1465
1466 /*
1467 * If Maxmem has been increased beyond what the system has detected,
1468 * extend the last memory segment to the new limit.
1469 */
1470 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1471 physmap[physmap_idx + 1] = ptoa(Maxmem);
1472
1473 /* call pmap initialization to make new kernel address space */
1474 pmap_bootstrap(first, 0);
1475
1476 /*
1477 * Size up each available chunk of physical memory.
1478 */
1479 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1480 pa_indx = 0;
1481 phys_avail[pa_indx++] = physmap[0];
1482 phys_avail[pa_indx] = physmap[0];
1483#if 0
1484 pte = (pt_entry_t)vtopte(KERNBASE);
1485#else
1486 pte = (pt_entry_t)CMAP1;
1487#endif
1488
1489 /*
1490 * physmap is in bytes, so when converting to page boundaries,
1491 * round up the start address and round down the end address.
1492 */
1493 for (i = 0; i <= physmap_idx; i += 2) {
1494 vm_offset_t end;
1495
1496 end = ptoa(Maxmem);
1497 if (physmap[i + 1] < end)
1498 end = trunc_page(physmap[i + 1]);
1499 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1500 int tmp, page_bad;
1501#if 0
1502 int *ptr = 0;
1503#else
1504 int *ptr = (int *)CADDR1;
1505#endif
1506
1507 /*
1508 * block out kernel memory as not available.
1509 */
1510 if (pa >= 0x100000 && pa < first)
1511 continue;
1512
1513 page_bad = FALSE;
1514
1515 /*
1516 * map page into kernel: valid, read/write,non-cacheable
1517 */
1518 *pte = pa | PG_V | PG_RW | PG_N;
1519 invltlb();
1520
1521 tmp = *(int *)ptr;
1522 /*
1523 * Test for alternating 1's and 0's
1524 */
1525 *(volatile int *)ptr = 0xaaaaaaaa;
1526 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1527 page_bad = TRUE;
1528 }
1529 /*
1530 * Test for alternating 0's and 1's
1531 */
1532 *(volatile int *)ptr = 0x55555555;
1533 if (*(volatile int *)ptr != 0x55555555) {
1534 page_bad = TRUE;
1535 }
1536 /*
1537 * Test for all 1's
1538 */
1539 *(volatile int *)ptr = 0xffffffff;
1540 if (*(volatile int *)ptr != 0xffffffff) {
1541 page_bad = TRUE;
1542 }
1543 /*
1544 * Test for all 0's
1545 */
1546 *(volatile int *)ptr = 0x0;
1547 if (*(volatile int *)ptr != 0x0) {
1548 page_bad = TRUE;
1549 }
1550 /*
1551 * Restore original value.
1552 */
1553 *(int *)ptr = tmp;
1554
1555 /*
1556 * Adjust array of valid/good pages.
1557 */
1558 if (page_bad == TRUE) {
1559 continue;
1560 }
1561 /*
1562 * If this good page is a continuation of the
1563 * previous set of good pages, then just increase
1564 * the end pointer. Otherwise start a new chunk.
1565 * Note that "end" points one higher than end,
1566 * making the range >= start and < end.
1567 * If we're also doing a speculative memory
1568 * test and we at or past the end, bump up Maxmem
1569 * so that we keep going. The first bad page
1570 * will terminate the loop.
1571 */
1572 if (phys_avail[pa_indx] == pa) {
1573 phys_avail[pa_indx] += PAGE_SIZE;
1574 } else {
1575 pa_indx++;
1576 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1577 printf("Too many holes in the physical address space, giving up\n");
1578 pa_indx--;
1579 break;
1580 }
1581 phys_avail[pa_indx++] = pa; /* start */
1582 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1583 }
1584 physmem++;
1585 }
1586 }
1587 *pte = 0;
1588 invltlb();
1589
1590 /*
1591 * XXX
1592 * The last chunk must contain at least one page plus the message
1593 * buffer to avoid complicating other code (message buffer address
1594 * calculation, etc.).
1595 */
1596 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1597 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1598 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1599 phys_avail[pa_indx--] = 0;
1600 phys_avail[pa_indx--] = 0;
1601 }
1602
1603 Maxmem = atop(phys_avail[pa_indx]);
1604
1605 /* Trim off space for the message buffer. */
1606 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1607
1608 avail_end = phys_avail[pa_indx];
1609}
1610
f7bc9806
MD
1611/*
1612 * IDT VECTORS:
1613 * 0 Divide by zero
1614 * 1 Debug
1615 * 2 NMI
1616 * 3 BreakPoint
1617 * 4 OverFlow
1618 * 5 Bound-Range
1619 * 6 Invalid OpCode
1620 * 7 Device Not Available (x87)
1621 * 8 Double-Fault
1622 * 9 Coprocessor Segment overrun (unsupported, reserved)
1623 * 10 Invalid-TSS
1624 * 11 Segment not present
1625 * 12 Stack
1626 * 13 General Protection
1627 * 14 Page Fault
1628 * 15 Reserved
1629 * 16 x87 FP Exception pending
1630 * 17 Alignment Check
1631 * 18 Machine Check
1632 * 19 SIMD floating point
1633 * 20-31 reserved
1634 * 32-255 INTn/external sources
1635 */
984263bc 1636void
17a9f566 1637init386(int first)
984263bc
MD
1638{
1639 struct gate_descriptor *gdp;
1640 int gsel_tss, metadata_missing, off, x;
85100692 1641 struct mdglobaldata *gd;
984263bc
MD
1642
1643 /*
1644 * Prevent lowering of the ipl if we call tsleep() early.
1645 */
85100692 1646 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1647 bzero(gd, sizeof(*gd));
984263bc 1648
85100692 1649 gd->mi.gd_curthread = &thread0;
984263bc
MD
1650
1651 atdevbase = ISA_HOLE_START + KERNBASE;
1652
1653 metadata_missing = 0;
1654 if (bootinfo.bi_modulep) {
1655 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1656 preload_bootstrap_relocate(KERNBASE);
1657 } else {
1658 metadata_missing = 1;
1659 }
1660 if (bootinfo.bi_envp)
1661 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1662
4e8e646b
MD
1663 /* start with one cpu */
1664 ncpus = 1;
984263bc
MD
1665 /* Init basic tunables, hz etc */
1666 init_param1();
1667
1668 /*
1669 * make gdt memory segments, the code segment goes up to end of the
1670 * page with etext in it, the data segment goes to the end of
1671 * the address space
1672 */
1673 /*
1674 * XXX text protection is temporarily (?) disabled. The limit was
1675 * i386_btop(round_page(etext)) - 1.
1676 */
1677 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1678 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1679
984263bc
MD
1680 gdt_segs[GPRIV_SEL].ssd_limit =
1681 atop(sizeof(struct privatespace) - 1);
8ad65e08 1682 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1683 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1684 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1685
85100692 1686 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1687
84b592ba
MD
1688 /*
1689 * Note: on both UP and SMP curthread must be set non-NULL
1690 * early in the boot sequence because the system assumes
1691 * that 'curthread' is never NULL.
1692 */
984263bc
MD
1693
1694 for (x = 0; x < NGDT; x++) {
1695#ifdef BDE_DEBUGGER
1696 /* avoid overwriting db entries with APM ones */
1697 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1698 continue;
1699#endif
1700 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1701 }
1702
1703 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1704 r_gdt.rd_base = (int) gdt;
1705 lgdt(&r_gdt);
1706
73e4f7b9
MD
1707 mi_gdinit(&gd->mi, 0);
1708 cpu_gdinit(gd, 0);
1709 lwkt_init_thread(&thread0, proc0paddr, 0, &gd->mi);
1710 lwkt_set_comm(&thread0, "thread0");
1711 proc0.p_addr = (void *)thread0.td_kstack;
1712 proc0.p_thread = &thread0;
a2a5ad0d 1713 proc0.p_flag |= P_CP_RELEASED; /* early set. See also init_main.c */
d9eea1a5 1714 thread0.td_flags |= TDF_RUNNING;
73e4f7b9
MD
1715 thread0.td_proc = &proc0;
1716 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
1717 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
1718
984263bc
MD
1719 /* make ldt memory segments */
1720 /*
1721 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1722 * should be spelled ...MAX_USER...
1723 */
1724 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1725 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1726 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1727 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1728
1729 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1730 lldt(_default_ldt);
1731#ifdef USER_LDT
17a9f566 1732 gd->gd_currentldt = _default_ldt;
984263bc 1733#endif
8a8d5d85
MD
1734 /* spinlocks and the BGL */
1735 init_locks();
984263bc
MD
1736
1737 /* exceptions */
f7bc9806
MD
1738 for (x = 0; x < NIDT; x++) {
1739#ifdef DEBUG_INTERRUPTS
1740 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1741#else
1742 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1743#endif
1744 }
984263bc
MD
1745 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1746 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1747 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1748 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1749 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1750 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1751 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1752 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1753 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1754 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1755 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1756 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1757 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1758 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1759 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1760 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1761 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1762 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1763 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1764 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1765 setidt(0x80, &IDTVEC(int0x80_syscall),
1766 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1767 setidt(0x81, &IDTVEC(int0x81_syscall),
1768 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1769
1770 r_idt.rd_limit = sizeof(idt0) - 1;
1771 r_idt.rd_base = (int) idt;
1772 lidt(&r_idt);
1773
1774 /*
1775 * Initialize the console before we print anything out.
1776 */
1777 cninit();
1778
1779 if (metadata_missing)
1780 printf("WARNING: loader(8) metadata is missing!\n");
1781
984263bc
MD
1782#if NISA >0
1783 isa_defaultirq();
1784#endif
1785 rand_initialize();
1786
1787#ifdef DDB
1788 kdb_init();
1789 if (boothowto & RB_KDB)
1790 Debugger("Boot flags requested debugger");
1791#endif
1792
1793 finishidentcpu(); /* Final stage of CPU initialization */
1794 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1795 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1796 initializecpu(); /* Initialize CPU registers */
1797
b7c628e4
MD
1798 /*
1799 * make an initial tss so cpu can get interrupt stack on syscall!
1800 * The 16 bytes is to save room for a VM86 context.
1801 */
17a9f566
MD
1802 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1803 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1804 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1805 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1806 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1807 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1808 ltr(gsel_tss);
1809
1810 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1811 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1812 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1813 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1814 dblfault_tss.tss_cr3 = (int)IdlePTD;
1815 dblfault_tss.tss_eip = (int) dblfault_handler;
1816 dblfault_tss.tss_eflags = PSL_KERNEL;
1817 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1818 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1819 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1820 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1821 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1822
1823 vm86_initialize();
1824 getmemsize(first);
1825 init_param2(physmem);
1826
1827 /* now running on new page tables, configured,and u/iom is accessible */
1828
1829 /* Map the message buffer. */
1830 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1831 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1832
1833 msgbufinit(msgbufp, MSGBUF_SIZE);
1834
1835 /* make a call gate to reenter kernel with */
1836 gdp = &ldt[LSYS5CALLS_SEL].gd;
1837
1838 x = (int) &IDTVEC(syscall);
1839 gdp->gd_looffset = x++;
1840 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
1841 gdp->gd_stkcpy = 1;
1842 gdp->gd_type = SDT_SYS386CGT;
1843 gdp->gd_dpl = SEL_UPL;
1844 gdp->gd_p = 1;
1845 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
1846
1847 /* XXX does this work? */
1848 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
1849 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
1850
1851 /* transfer to user mode */
1852
1853 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
1854 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
1855
1856 /* setup proc 0's pcb */
b7c628e4
MD
1857 thread0.td_pcb->pcb_flags = 0;
1858 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 1859 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
1860 proc0.p_md.md_regs = &proc0_tf;
1861}
1862
8ad65e08 1863/*
17a9f566
MD
1864 * Initialize machine-dependant portions of the global data structure.
1865 * Note that the global data area and cpu0's idlestack in the private
1866 * data space were allocated in locore.
ef0fdad1
MD
1867 *
1868 * Note: the idlethread's cpl is 0
73e4f7b9
MD
1869 *
1870 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
1871 */
1872void
85100692 1873cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08
MD
1874{
1875 char *sp;
8ad65e08 1876
7d0bac62 1877 if (cpu)
a2a5ad0d 1878 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 1879
85100692 1880 sp = gd->mi.gd_prvspace->idlestack;
a2a5ad0d
MD
1881 lwkt_init_thread(&gd->mi.gd_idlethread, sp, 0, &gd->mi);
1882 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1883 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1884 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1885 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
1886}
1887
12e4aaff
MD
1888struct globaldata *
1889globaldata_find(int cpu)
1890{
1891 KKASSERT(cpu >= 0 && cpu < ncpus);
1892 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1893}
1894
984263bc
MD
1895#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1896static void f00f_hack(void *unused);
1897SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
1898
1899static void
17a9f566
MD
1900f00f_hack(void *unused)
1901{
984263bc 1902 struct gate_descriptor *new_idt;
984263bc
MD
1903 vm_offset_t tmp;
1904
1905 if (!has_f00f_bug)
1906 return;
1907
1908 printf("Intel Pentium detected, installing workaround for F00F bug\n");
1909
1910 r_idt.rd_limit = sizeof(idt0) - 1;
1911
1912 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
1913 if (tmp == 0)
1914 panic("kmem_alloc returned 0");
1915 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1916 panic("kmem_alloc returned non-page-aligned memory");
1917 /* Put the first seven entries in the lower page */
1918 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1919 bcopy(idt, new_idt, sizeof(idt0));
1920 r_idt.rd_base = (int)new_idt;
1921 lidt(&r_idt);
1922 idt = new_idt;
1923 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
1924 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1925 panic("vm_map_protect failed");
1926 return;
1927}
1928#endif /* defined(I586_CPU) && !NO_F00F_HACK */
1929
1930int
1931ptrace_set_pc(p, addr)
1932 struct proc *p;
1933 unsigned long addr;
1934{
1935 p->p_md.md_regs->tf_eip = addr;
1936 return (0);
1937}
1938
1939int
1940ptrace_single_step(p)
1941 struct proc *p;
1942{
1943 p->p_md.md_regs->tf_eflags |= PSL_T;
1944 return (0);
1945}
1946
1947int ptrace_read_u_check(p, addr, len)
1948 struct proc *p;
1949 vm_offset_t addr;
1950 size_t len;
1951{
1952 vm_offset_t gap;
1953
1954 if ((vm_offset_t) (addr + len) < addr)
1955 return EPERM;
1956 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
1957 return 0;
1958
1959 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
1960
1961 if ((vm_offset_t) addr < gap)
1962 return EPERM;
1963 if ((vm_offset_t) (addr + len) <=
1964 (vm_offset_t) (gap + sizeof(struct trapframe)))
1965 return 0;
1966 return EPERM;
1967}
1968
1969int ptrace_write_u(p, off, data)
1970 struct proc *p;
1971 vm_offset_t off;
1972 long data;
1973{
1974 struct trapframe frame_copy;
1975 vm_offset_t min;
1976 struct trapframe *tp;
1977
1978 /*
1979 * Privileged kernel state is scattered all over the user area.
1980 * Only allow write access to parts of regs and to fpregs.
1981 */
1982 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
1983 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
1984 tp = p->p_md.md_regs;
1985 frame_copy = *tp;
1986 *(int *)((char *)&frame_copy + (off - min)) = data;
1987 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
1988 !CS_SECURE(frame_copy.tf_cs))
1989 return (EINVAL);
1990 *(int*)((char *)p->p_addr + off) = data;
1991 return (0);
1992 }
b7c628e4
MD
1993
1994 /*
1995 * The PCB is at the end of the user area YYY
1996 */
1997 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
1998 min += offsetof(struct pcb, pcb_save);
984263bc
MD
1999 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2000 *(int*)((char *)p->p_addr + off) = data;
2001 return (0);
2002 }
2003 return (EFAULT);
2004}
2005
2006int
2007fill_regs(p, regs)
2008 struct proc *p;
2009 struct reg *regs;
2010{
2011 struct pcb *pcb;
2012 struct trapframe *tp;
2013
2014 tp = p->p_md.md_regs;
2015 regs->r_fs = tp->tf_fs;
2016 regs->r_es = tp->tf_es;
2017 regs->r_ds = tp->tf_ds;
2018 regs->r_edi = tp->tf_edi;
2019 regs->r_esi = tp->tf_esi;
2020 regs->r_ebp = tp->tf_ebp;
2021 regs->r_ebx = tp->tf_ebx;
2022 regs->r_edx = tp->tf_edx;
2023 regs->r_ecx = tp->tf_ecx;
2024 regs->r_eax = tp->tf_eax;
2025 regs->r_eip = tp->tf_eip;
2026 regs->r_cs = tp->tf_cs;
2027 regs->r_eflags = tp->tf_eflags;
2028 regs->r_esp = tp->tf_esp;
2029 regs->r_ss = tp->tf_ss;
b7c628e4 2030 pcb = p->p_thread->td_pcb;
984263bc
MD
2031 regs->r_gs = pcb->pcb_gs;
2032 return (0);
2033}
2034
2035int
2036set_regs(p, regs)
2037 struct proc *p;
2038 struct reg *regs;
2039{
2040 struct pcb *pcb;
2041 struct trapframe *tp;
2042
2043 tp = p->p_md.md_regs;
2044 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2045 !CS_SECURE(regs->r_cs))
2046 return (EINVAL);
2047 tp->tf_fs = regs->r_fs;
2048 tp->tf_es = regs->r_es;
2049 tp->tf_ds = regs->r_ds;
2050 tp->tf_edi = regs->r_edi;
2051 tp->tf_esi = regs->r_esi;
2052 tp->tf_ebp = regs->r_ebp;
2053 tp->tf_ebx = regs->r_ebx;
2054 tp->tf_edx = regs->r_edx;
2055 tp->tf_ecx = regs->r_ecx;
2056 tp->tf_eax = regs->r_eax;
2057 tp->tf_eip = regs->r_eip;
2058 tp->tf_cs = regs->r_cs;
2059 tp->tf_eflags = regs->r_eflags;
2060 tp->tf_esp = regs->r_esp;
2061 tp->tf_ss = regs->r_ss;
b7c628e4 2062 pcb = p->p_thread->td_pcb;
984263bc
MD
2063 pcb->pcb_gs = regs->r_gs;
2064 return (0);
2065}
2066
642a6e88 2067#ifndef CPU_DISABLE_SSE
984263bc
MD
2068static void
2069fill_fpregs_xmm(sv_xmm, sv_87)
2070 struct savexmm *sv_xmm;
2071 struct save87 *sv_87;
2072{
c9faf524
RG
2073 struct env87 *penv_87 = &sv_87->sv_env;
2074 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2075 int i;
2076
2077 /* FPU control/status */
2078 penv_87->en_cw = penv_xmm->en_cw;
2079 penv_87->en_sw = penv_xmm->en_sw;
2080 penv_87->en_tw = penv_xmm->en_tw;
2081 penv_87->en_fip = penv_xmm->en_fip;
2082 penv_87->en_fcs = penv_xmm->en_fcs;
2083 penv_87->en_opcode = penv_xmm->en_opcode;
2084 penv_87->en_foo = penv_xmm->en_foo;
2085 penv_87->en_fos = penv_xmm->en_fos;
2086
2087 /* FPU registers */
2088 for (i = 0; i < 8; ++i)
2089 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2090
2091 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2092}
2093
2094static void
2095set_fpregs_xmm(sv_87, sv_xmm)
2096 struct save87 *sv_87;
2097 struct savexmm *sv_xmm;
2098{
c9faf524
RG
2099 struct env87 *penv_87 = &sv_87->sv_env;
2100 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2101 int i;
2102
2103 /* FPU control/status */
2104 penv_xmm->en_cw = penv_87->en_cw;
2105 penv_xmm->en_sw = penv_87->en_sw;
2106 penv_xmm->en_tw = penv_87->en_tw;
2107 penv_xmm->en_fip = penv_87->en_fip;
2108 penv_xmm->en_fcs = penv_87->en_fcs;
2109 penv_xmm->en_opcode = penv_87->en_opcode;
2110 penv_xmm->en_foo = penv_87->en_foo;
2111 penv_xmm->en_fos = penv_87->en_fos;
2112
2113 /* FPU registers */
2114 for (i = 0; i < 8; ++i)
2115 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2116
2117 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2118}
642a6e88 2119#endif /* CPU_DISABLE_SSE */
984263bc
MD
2120
2121int
2122fill_fpregs(p, fpregs)
2123 struct proc *p;
2124 struct fpreg *fpregs;
2125{
642a6e88 2126#ifndef CPU_DISABLE_SSE
984263bc 2127 if (cpu_fxsr) {
b7c628e4 2128 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2129 (struct save87 *)fpregs);
2130 return (0);
2131 }
642a6e88 2132#endif /* CPU_DISABLE_SSE */
b7c628e4 2133 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2134 return (0);
2135}
2136
2137int
2138set_fpregs(p, fpregs)
2139 struct proc *p;
2140 struct fpreg *fpregs;
2141{
642a6e88 2142#ifndef CPU_DISABLE_SSE
984263bc
MD
2143 if (cpu_fxsr) {
2144 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2145 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2146 return (0);
2147 }
642a6e88 2148#endif /* CPU_DISABLE_SSE */
b7c628e4 2149 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2150 return (0);
2151}
2152
2153int
2154fill_dbregs(p, dbregs)
2155 struct proc *p;
2156 struct dbreg *dbregs;
2157{
2158 struct pcb *pcb;
2159
2160 if (p == NULL) {
2161 dbregs->dr0 = rdr0();
2162 dbregs->dr1 = rdr1();
2163 dbregs->dr2 = rdr2();
2164 dbregs->dr3 = rdr3();
2165 dbregs->dr4 = rdr4();
2166 dbregs->dr5 = rdr5();
2167 dbregs->dr6 = rdr6();
2168 dbregs->dr7 = rdr7();
2169 }
2170 else {
b7c628e4 2171 pcb = p->p_thread->td_pcb;
984263bc
MD
2172 dbregs->dr0 = pcb->pcb_dr0;
2173 dbregs->dr1 = pcb->pcb_dr1;
2174 dbregs->dr2 = pcb->pcb_dr2;
2175 dbregs->dr3 = pcb->pcb_dr3;
2176 dbregs->dr4 = 0;
2177 dbregs->dr5 = 0;
2178 dbregs->dr6 = pcb->pcb_dr6;
2179 dbregs->dr7 = pcb->pcb_dr7;
2180 }
2181 return (0);
2182}
2183
2184int
2185set_dbregs(p, dbregs)
2186 struct proc *p;
2187 struct dbreg *dbregs;
2188{
2189 struct pcb *pcb;
2190 int i;
2191 u_int32_t mask1, mask2;
2192
2193 if (p == NULL) {
2194 load_dr0(dbregs->dr0);
2195 load_dr1(dbregs->dr1);
2196 load_dr2(dbregs->dr2);
2197 load_dr3(dbregs->dr3);
2198 load_dr4(dbregs->dr4);
2199 load_dr5(dbregs->dr5);
2200 load_dr6(dbregs->dr6);
2201 load_dr7(dbregs->dr7);
2202 }
2203 else {
2204 /*
2205 * Don't let an illegal value for dr7 get set. Specifically,
2206 * check for undefined settings. Setting these bit patterns
2207 * result in undefined behaviour and can lead to an unexpected
2208 * TRCTRAP.
2209 */
2210 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2211 i++, mask1 <<= 2, mask2 <<= 2)
2212 if ((dbregs->dr7 & mask1) == mask2)
2213 return (EINVAL);
2214
b7c628e4 2215 pcb = p->p_thread->td_pcb;
984263bc
MD
2216
2217 /*
2218 * Don't let a process set a breakpoint that is not within the
2219 * process's address space. If a process could do this, it
2220 * could halt the system by setting a breakpoint in the kernel
2221 * (if ddb was enabled). Thus, we need to check to make sure
2222 * that no breakpoints are being enabled for addresses outside
2223 * process's address space, unless, perhaps, we were called by
2224 * uid 0.
2225 *
2226 * XXX - what about when the watched area of the user's
2227 * address space is written into from within the kernel
2228 * ... wouldn't that still cause a breakpoint to be generated
2229 * from within kernel mode?
2230 */
2231
dadab5e9 2232 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2233 if (dbregs->dr7 & 0x3) {
2234 /* dr0 is enabled */
2235 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2236 return (EINVAL);
2237 }
2238
2239 if (dbregs->dr7 & (0x3<<2)) {
2240 /* dr1 is enabled */
2241 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2242 return (EINVAL);
2243 }
2244
2245 if (dbregs->dr7 & (0x3<<4)) {
2246 /* dr2 is enabled */
2247 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2248 return (EINVAL);
2249 }
2250
2251 if (dbregs->dr7 & (0x3<<6)) {
2252 /* dr3 is enabled */
2253 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2254 return (EINVAL);
2255 }
2256 }
2257
2258 pcb->pcb_dr0 = dbregs->dr0;
2259 pcb->pcb_dr1 = dbregs->dr1;
2260 pcb->pcb_dr2 = dbregs->dr2;
2261 pcb->pcb_dr3 = dbregs->dr3;
2262 pcb->pcb_dr6 = dbregs->dr6;
2263 pcb->pcb_dr7 = dbregs->dr7;
2264
2265 pcb->pcb_flags |= PCB_DBREGS;
2266 }
2267
2268 return (0);
2269}
2270
2271/*
2272 * Return > 0 if a hardware breakpoint has been hit, and the
2273 * breakpoint was in user space. Return 0, otherwise.
2274 */
2275int
2276user_dbreg_trap(void)
2277{
2278 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2279 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2280 int nbp; /* number of breakpoints that triggered */
2281 caddr_t addr[4]; /* breakpoint addresses */
2282 int i;
2283
2284 dr7 = rdr7();
2285 if ((dr7 & 0x000000ff) == 0) {
2286 /*
2287 * all GE and LE bits in the dr7 register are zero,
2288 * thus the trap couldn't have been caused by the
2289 * hardware debug registers
2290 */
2291 return 0;
2292 }
2293
2294 nbp = 0;
2295 dr6 = rdr6();
2296 bp = dr6 & 0x0000000f;
2297
2298 if (!bp) {
2299 /*
2300 * None of the breakpoint bits are set meaning this
2301 * trap was not caused by any of the debug registers
2302 */
2303 return 0;
2304 }
2305
2306 /*
2307 * at least one of the breakpoints were hit, check to see
2308 * which ones and if any of them are user space addresses
2309 */
2310
2311 if (bp & 0x01) {
2312 addr[nbp++] = (caddr_t)rdr0();
2313 }
2314 if (bp & 0x02) {
2315 addr[nbp++] = (caddr_t)rdr1();
2316 }
2317 if (bp & 0x04) {
2318 addr[nbp++] = (caddr_t)rdr2();
2319 }
2320 if (bp & 0x08) {
2321 addr[nbp++] = (caddr_t)rdr3();
2322 }
2323
2324 for (i=0; i<nbp; i++) {
2325 if (addr[i] <
2326 (caddr_t)VM_MAXUSER_ADDRESS) {
2327 /*
2328 * addr[i] is in user space
2329 */
2330 return nbp;
2331 }
2332 }
2333
2334 /*
2335 * None of the breakpoints are in user space.
2336 */
2337 return 0;
2338}
2339
2340
2341#ifndef DDB
2342void
2343Debugger(const char *msg)
2344{
2345 printf("Debugger(\"%s\") called.\n", msg);
2346}
2347#endif /* no DDB */
2348
2349#include <sys/disklabel.h>
2350
2351/*
2352 * Determine the size of the transfer, and make sure it is
2353 * within the boundaries of the partition. Adjust transfer
2354 * if needed, and signal errors or early completion.
2355 */
2356int
2357bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2358{
2359 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2360 int labelsect = lp->d_partitions[0].p_offset;
2361 int maxsz = p->p_size,
2362 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2363
2364 /* overwriting disk label ? */
2365 /* XXX should also protect bootstrap in first 8K */
2366 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2367#if LABELSECTOR != 0
2368 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2369#endif
2370 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2371 bp->b_error = EROFS;
2372 goto bad;
2373 }
2374
2375#if defined(DOSBBSECTOR) && defined(notyet)
2376 /* overwriting master boot record? */
2377 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2378 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2379 bp->b_error = EROFS;
2380 goto bad;
2381 }
2382#endif
2383
2384 /* beyond partition? */
2385 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2386 /* if exactly at end of disk, return an EOF */
2387 if (bp->b_blkno == maxsz) {
2388 bp->b_resid = bp->b_bcount;
2389 return(0);
2390 }
2391 /* or truncate if part of it fits */
2392 sz = maxsz - bp->b_blkno;
2393 if (sz <= 0) {
2394 bp->b_error = EINVAL;
2395 goto bad;
2396 }
2397 bp->b_bcount = sz << DEV_BSHIFT;
2398 }
2399
2400 bp->b_pblkno = bp->b_blkno + p->p_offset;
2401 return(1);
2402
2403bad:
2404 bp->b_flags |= B_ERROR;
2405 return(-1);
2406}
2407
2408#ifdef DDB
2409
2410/*
2411 * Provide inb() and outb() as functions. They are normally only
2412 * available as macros calling inlined functions, thus cannot be
2413 * called inside DDB.
2414 *
2415 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2416 */
2417
2418#undef inb
2419#undef outb
2420
2421/* silence compiler warnings */
2422u_char inb(u_int);
2423void outb(u_int, u_char);
2424
2425u_char
2426inb(u_int port)
2427{
2428 u_char data;
2429 /*
2430 * We use %%dx and not %1 here because i/o is done at %dx and not at
2431 * %edx, while gcc generates inferior code (movw instead of movl)
2432 * if we tell it to load (u_short) port.
2433 */
2434 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2435 return (data);
2436}
2437
2438void
2439outb(u_int port, u_char data)
2440{
2441 u_char al;
2442 /*
2443 * Use an unnecessary assignment to help gcc's register allocator.
2444 * This make a large difference for gcc-1.40 and a tiny difference
2445 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2446 * best results. gcc-2.6.0 can't handle this.
2447 */
2448 al = data;
2449 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2450}
2451
2452#endif /* DDB */
8a8d5d85
MD
2453
2454
2455
2456#include "opt_cpu.h"
2457#include "opt_htt.h"
2458#include "opt_user_ldt.h"
2459
2460
2461/*
2462 * initialize all the SMP locks
2463 */
2464
2465/* critical region around IO APIC, apic_imen */
2466struct spinlock imen_spinlock;
2467
2468/* Make FAST_INTR() routines sequential */
2469struct spinlock fast_intr_spinlock;
2470
2471/* critical region for old style disable_intr/enable_intr */
2472struct spinlock mpintr_spinlock;
2473
2474/* critical region around INTR() routines */
2475struct spinlock intr_spinlock;
2476
2477/* lock region used by kernel profiling */
2478struct spinlock mcount_spinlock;
2479
2480/* locks com (tty) data/hardware accesses: a FASTINTR() */
2481struct spinlock com_spinlock;
2482
2483/* locks kernel printfs */
2484struct spinlock cons_spinlock;
2485
2486/* lock regions around the clock hardware */
2487struct spinlock clock_spinlock;
2488
2489/* lock around the MP rendezvous */
2490struct spinlock smp_rv_spinlock;
2491
2492static void
2493init_locks(void)
2494{
2495 /*
2496 * mp_lock = 0; BSP already owns the MP lock
2497 */
2498 /*
2499 * Get the initial mp_lock with a count of 1 for the BSP.
2500 * This uses a LOGICAL cpu ID, ie BSP == 0.
2501 */
2502#ifdef SMP
2503 cpu_get_initial_mplock();
2504#endif
2505 spin_lock_init(&mcount_spinlock);
2506 spin_lock_init(&fast_intr_spinlock);
2507 spin_lock_init(&intr_spinlock);
2508 spin_lock_init(&mpintr_spinlock);
2509 spin_lock_init(&imen_spinlock);
2510 spin_lock_init(&smp_rv_spinlock);
2511 spin_lock_init(&com_spinlock);
2512 spin_lock_init(&clock_spinlock);
2513 spin_lock_init(&cons_spinlock);
2514}
2515