go back to using gd_cpuid instead of gd_cpu.
[dragonfly.git] / sys / i386 / i386 / swtch.s
CommitLineData
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1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
f1d1c3fa 4 * LWKT threads Copyright (c) 2003 Matthew Dillon
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5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
99df837e 38 * $DragonFly: src/sys/i386/i386/Attic/swtch.s,v 1.14 2003/06/27 03:30:37 dillon Exp $
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39 */
40
41#include "npx.h"
42#include "opt_user_ldt.h"
43
44#include <sys/rtprio.h>
45
46#include <machine/asmacros.h>
47#include <machine/ipl.h>
48
49#ifdef SMP
50#include <machine/pmap.h>
51#include <machine/smptests.h> /** GRAB_LOPRIO */
52#include <machine/apic.h>
53#include <machine/lock.h>
54#endif /* SMP */
55
56#include "assym.s"
57
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58 .data
59
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60 .globl _panic
61
62#if defined(SWTCH_OPTIM_STATS)
63 .globl _swtch_optim_stats, _tlb_flush_count
64_swtch_optim_stats: .long 0 /* number of _swtch_optims */
65_tlb_flush_count: .long 0
66#endif
67
68 .text
69
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70
71/*
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72 * cpu_heavy_switch(next_thread)
73 *
74 * Switch from the current thread to a new thread. This entry
75 * is normally called via the thread->td_switch function, and will
76 * only be called when the current thread is a heavy weight process.
77 *
78 * YYY disable interrupts once giant is removed.
984263bc 79 */
8ad65e08 80ENTRY(cpu_heavy_switch)
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81 movl _curthread,%ecx
82 movl TD_PROC(%ecx),%ecx
984263bc 83
8ad65e08 84 cli
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85#ifdef SMP
86 movb P_ONCPU(%ecx), %al /* save "last" cpu */
87 movb %al, P_LASTCPU(%ecx)
88 movb $0xff, P_ONCPU(%ecx) /* "leave" the cpu */
89#endif /* SMP */
90 movl P_VMSPACE(%ecx), %edx
91#ifdef SMP
92 movl _cpuid, %eax
93#else
94 xorl %eax, %eax
95#endif /* SMP */
96 btrl %eax, VM_PMAP+PM_ACTIVE(%edx)
97
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98 /*
99 * Save general regs
100 */
101 movl P_THREAD(%ecx),%edx
b7c628e4 102 movl TD_PCB(%edx),%edx
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103 movl (%esp),%eax /* Hardware registers */
104 movl %eax,PCB_EIP(%edx)
105 movl %ebx,PCB_EBX(%edx)
106 movl %esp,PCB_ESP(%edx)
107 movl %ebp,PCB_EBP(%edx)
108 movl %esi,PCB_ESI(%edx)
109 movl %edi,PCB_EDI(%edx)
110 movl %gs,PCB_GS(%edx)
111
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112 /*
113 * Push the LWKT switch restore function, which resumes a heavy
114 * weight process. Note that the LWKT switcher is based on
115 * TD_SP, while the heavy weight process switcher is based on
116 * PCB_ESP. TD_SP is usually one pointer pushed relative to
117 * PCB_ESP.
118 */
119 movl P_THREAD(%ecx),%eax
120 pushl $cpu_heavy_restore
121 movl %esp,TD_SP(%eax)
122
123 /*
124 * Save debug regs if necessary
125 */
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126 movb PCB_FLAGS(%edx),%al
127 andb $PCB_DBREGS,%al
128 jz 1f /* no, skip over */
129 movl %dr7,%eax /* yes, do the save */
130 movl %eax,PCB_DR7(%edx)
131 andl $0x0000fc00, %eax /* disable all watchpoints */
132 movl %eax,%dr7
133 movl %dr6,%eax
134 movl %eax,PCB_DR6(%edx)
135 movl %dr3,%eax
136 movl %eax,PCB_DR3(%edx)
137 movl %dr2,%eax
138 movl %eax,PCB_DR2(%edx)
139 movl %dr1,%eax
140 movl %eax,PCB_DR1(%edx)
141 movl %dr0,%eax
142 movl %eax,PCB_DR0(%edx)
1431:
144
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145 /*
146 * Save BGL nesting count. Note that we hold the BGL with a
147 * count of at least 1 on entry to cpu_heavy_switch().
148 */
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149#ifdef SMP
150 movl _mp_lock, %eax
151 /* XXX FIXME: we should be saving the local APIC TPR */
152#ifdef DIAGNOSTIC
153 cmpl $FREE_LOCK, %eax /* is it free? */
154 je badsw4 /* yes, bad medicine! */
155#endif /* DIAGNOSTIC */
156 andl $COUNT_FIELD, %eax /* clear CPU portion */
157 movl %eax, PCB_MPNEST(%edx) /* store it */
158#endif /* SMP */
159
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160 /*
161 * Save the FP state if we have used the FP.
162 */
984263bc 163#if NNPX > 0
263e4574 164 movl P_THREAD(%ecx),%ecx
af0bff84 165 cmpl %ecx,_npxthread
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166 jne 1f
167 addl $PCB_SAVEFPU,%edx /* h/w bugs make saving complicated */
168 pushl %edx
169 call _npxsave /* do it in a big C function */
170 popl %eax
1711:
af0bff84 172 /* %ecx,%edx trashed */
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173#endif /* NNPX > 0 */
174
84b592ba 175 /*
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176 * Switch to the next thread, which was passed as an argument
177 * to cpu_heavy_switch(). Due to the switch-restore function we pushed,
178 * the argument is at 8(%esp). Set the current thread, load the
179 * stack pointer, and 'ret' into the switch-restore function.
84b592ba 180 */
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181 movl 8(%esp),%eax
182 movl %eax,_curthread
183 movl TD_SP(%eax),%esp
184 ret
984263bc 185
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186/*
187 * cpu_exit_switch()
188 *
189 * The switch function is changed to this when a thread is going away
190 * for good. We have to ensure that the MMU state is not cached, and
191 * we don't bother saving the existing thread state before switching.
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192 *
193 * At this point we are in a critical section and this cpu owns the
194 * thread's token, which serves as an interlock until the switchout is
195 * complete.
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196 */
197ENTRY(cpu_exit_switch)
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198 /*
199 * Get us out of the vmspace
200 */
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201 movl _IdlePTD,%ecx
202 movl %cr3,%eax
203 cmpl %ecx,%eax
204 je 1f
205 movl %ecx,%cr3
ae8050a4 206 movl _curthread,%ecx
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208 /*
209 * Switch to the next thread.
210 */
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211 cli
212 movl 4(%esp),%eax
213 movl %eax,_curthread
214 movl TD_SP(%eax),%esp
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215
216 /*
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217 * We are now the next thread, set the exited flag and wakeup
218 * any waiters.
ae8050a4 219 */
99df837e 220 orl $TDF_EXITED,TD_FLAGS(%ecx)
ae8050a4 221 pushl %eax
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222 pushl %ecx /* wakeup(oldthread) */
223 call wakeup
ae8050a4 224 addl $4,%esp
99df837e 225 popl %eax /* note: next thread expects curthread in %eax */
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226
227 /*
228 * Restore the next thread's state and resume it. Note: the
229 * restore function assumes that the next thread's address is
230 * in %eax.
231 */
8ad65e08 232 ret
984263bc 233
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234/*
235 * cpu_heavy_restore() (current thread in %eax on entry)
236 *
237 * Restore the thread after an LWKT switch. This entry is normally
238 * called via the LWKT switch restore function, which was pulled
239 * off the thread stack and jumped to.
240 *
241 * This entry is only called if the thread was previously saved
242 * using cpu_heavy_switch() (the heavy weight process thread switcher).
243 *
244 * YYY theoretically we do not have to restore everything here, a lot
245 * of this junk can wait until we return to usermode. But for now
246 * we restore everything.
247 *
248 * YYY STI/CLI sequencing.
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249 *
250 * YYY note: spl check is done in mi_switch when it splx()'s.
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251 */
252ENTRY(cpu_heavy_restore)
253 /* interrupts are disabled */
8f41e33b 254 movl TD_PCB(%eax),%edx
8ad65e08 255 movl TD_PROC(%eax),%ecx
984263bc 256#ifdef DIAGNOSTIC
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257 cmpb $SRUN,P_STAT(%ecx)
258 jne badsw2
259#endif
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260
261#if defined(SWTCH_OPTIM_STATS)
262 incl _swtch_optim_stats
263#endif
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264 /*
265 * Restore the MMU address space
266 */
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267 movl %cr3,%ebx
268 cmpl PCB_CR3(%edx),%ebx
269 je 4f
270#if defined(SWTCH_OPTIM_STATS)
271 decl _swtch_optim_stats
272 incl _tlb_flush_count
273#endif
274 movl PCB_CR3(%edx),%ebx
275 movl %ebx,%cr3
2764:
277
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278 /*
279 * Deal with the PCB extension, restore the private tss
280 */
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281#ifdef SMP
282 movl _cpuid, %esi
283#else
284 xorl %esi, %esi
285#endif
286 cmpl $0, PCB_EXT(%edx) /* has pcb extension? */
287 je 1f
288 btsl %esi, _private_tss /* mark use of private tss */
289 movl PCB_EXT(%edx), %edi /* new tss descriptor */
290 jmp 2f
2911:
292
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293 /*
294 * update common_tss.tss_esp0 pointer. This is the supervisor
295 * stack pointer on entry from user mode. Since the pcb is
296 * at the top of the supervisor stack esp0 starts just below it.
297 * We leave enough space for vm86 (16 bytes).
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298 *
299 * common_tss.tss_esp0 is needed when user mode traps into the
300 * kernel.
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301 */
302 leal -16(%edx),%ebx
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303 movl %ebx, _common_tss + TSS_ESP0
304
305 btrl %esi, _private_tss
306 jae 3f
307#ifdef SMP
308 movl $gd_common_tssd, %edi
309 addl %fs:0, %edi
310#else
311 movl $_common_tssd, %edi
312#endif
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313 /*
314 * Move the correct TSS descriptor into the GDT slot, then reload
315 * tr. YYY not sure what is going on here
316 */
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318 movl _tss_gdt, %ebx /* entry in GDT */
319 movl 0(%edi), %eax
320 movl %eax, 0(%ebx)
321 movl 4(%edi), %eax
322 movl %eax, 4(%ebx)
323 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
324 ltr %si
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325
326 /*
327 * Tell the pmap that our cpu is using the VMSPACE now.
328 */
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3293:
330 movl P_VMSPACE(%ecx), %ebx
331#ifdef SMP
332 movl _cpuid, %eax
333#else
334 xorl %eax, %eax
335#endif
336 btsl %eax, VM_PMAP+PM_ACTIVE(%ebx)
337
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338 /*
339 * Restore general registers.
340 */
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341 movl PCB_EBX(%edx),%ebx
342 movl PCB_ESP(%edx),%esp
343 movl PCB_EBP(%edx),%ebp
344 movl PCB_ESI(%edx),%esi
345 movl PCB_EDI(%edx),%edi
346 movl PCB_EIP(%edx),%eax
347 movl %eax,(%esp)
348
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349 /*
350 * SMP ickyness to direct interrupts.
351 */
352
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353#ifdef SMP
354#ifdef GRAB_LOPRIO /* hold LOPRIO for INTs */
355#ifdef CHEAP_TPR
356 movl $0, lapic_tpr
357#else
358 andl $~APIC_TPR_PRIO, lapic_tpr
359#endif /** CHEAP_TPR */
360#endif /** GRAB_LOPRIO */
361 movl _cpuid,%eax
362 movb %al, P_ONCPU(%ecx)
363#endif /* SMP */
984263bc 364
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365 /*
366 * Restore the BGL nesting count. Note that the nesting count will
367 * be at least 1.
368 */
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369#ifdef SMP
370 movl _cpu_lockid, %eax
371 orl PCB_MPNEST(%edx), %eax /* add next count from PROC */
372 movl %eax, _mp_lock /* load the mp_lock */
373 /* XXX FIXME: we should be restoring the local APIC TPR */
374#endif /* SMP */
375
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376 /*
377 * Restore the user LDT if we have one
378 */
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379#ifdef USER_LDT
380 cmpl $0, PCB_USERLDT(%edx)
381 jnz 1f
382 movl __default_ldt,%eax
383 cmpl _currentldt,%eax
384 je 2f
385 lldt __default_ldt
386 movl %eax,_currentldt
387 jmp 2f
3881: pushl %edx
389 call _set_user_ldt
390 popl %edx
3912:
392#endif
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393 /*
394 * Restore the %gs segment register, which must be done after
395 * loading the user LDT. Since user processes can modify the
396 * register via procfs, this may result in a fault which is
397 * detected by checking the fault address against cpu_switch_load_gs
398 * in i386/i386/trap.c
399 */
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400 .globl cpu_switch_load_gs
401cpu_switch_load_gs:
402 movl PCB_GS(%edx),%gs
403
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404 /*
405 * Restore the DEBUG register state if necessary.
406 */
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407 movb PCB_FLAGS(%edx),%al
408 andb $PCB_DBREGS,%al
409 jz 1f /* no, skip over */
410 movl PCB_DR6(%edx),%eax /* yes, do the restore */
411 movl %eax,%dr6
412 movl PCB_DR3(%edx),%eax
413 movl %eax,%dr3
414 movl PCB_DR2(%edx),%eax
415 movl %eax,%dr2
416 movl PCB_DR1(%edx),%eax
417 movl %eax,%dr1
418 movl PCB_DR0(%edx),%eax
419 movl %eax,%dr0
420 movl %dr7,%eax /* load dr7 so as not to disturb */
421 andl $0x0000fc00,%eax /* reserved bits */
422 pushl %ebx
423 movl PCB_DR7(%edx),%ebx
424 andl $~0x0000fc00,%ebx
425 orl %ebx,%eax
426 popl %ebx
427 movl %eax,%dr7
4281:
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429#if 0
430 /*
431 * Remove the heavy weight process from the heavy weight queue.
432 * this will also have the side effect of removing the thread from
433 * the run queue. YYY temporary?
434 *
435 * LWKT threads stay on the run queue until explicitly removed.
436 */
437 pushl %ecx
438 call remrunqueue
439 addl $4,%esp
440#endif
984263bc 441
8ad65e08 442 sti /* XXX */
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443 ret
444
445CROSSJUMPTARGET(sw1a)
446
447#ifdef DIAGNOSTIC
448badsw1:
449 pushl $sw0_1
450 call _panic
451
452sw0_1: .asciz "cpu_switch: has wchan"
453
454badsw2:
455 pushl $sw0_2
456 call _panic
457
458sw0_2: .asciz "cpu_switch: not SRUN"
459#endif
460
461#if defined(SMP) && defined(DIAGNOSTIC)
462badsw4:
463 pushl $sw0_4
464 call _panic
465
466sw0_4: .asciz "cpu_switch: do not have lock"
467#endif /* SMP && DIAGNOSTIC */
468
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469string: .asciz "SWITCHING\n"
470
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471/*
472 * savectx(pcb)
473 * Update pcb, saving current processor state.
474 */
475ENTRY(savectx)
476 /* fetch PCB */
477 movl 4(%esp),%ecx
478
479 /* caller's return address - child won't execute this routine */
480 movl (%esp),%eax
481 movl %eax,PCB_EIP(%ecx)
482
483 movl %cr3,%eax
484 movl %eax,PCB_CR3(%ecx)
485
486 movl %ebx,PCB_EBX(%ecx)
487 movl %esp,PCB_ESP(%ecx)
488 movl %ebp,PCB_EBP(%ecx)
489 movl %esi,PCB_ESI(%ecx)
490 movl %edi,PCB_EDI(%ecx)
491 movl %gs,PCB_GS(%ecx)
492
493#if NNPX > 0
494 /*
af0bff84 495 * If npxthread == NULL, then the npx h/w state is irrelevant and the
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496 * state had better already be in the pcb. This is true for forks
497 * but not for dumps (the old book-keeping with FP flags in the pcb
498 * always lost for dumps because the dump pcb has 0 flags).
499 *
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500 * If npxthread != NULL, then we have to save the npx h/w state to
501 * npxthread's pcb and copy it to the requested pcb, or save to the
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502 * requested pcb and reload. Copying is easier because we would
503 * have to handle h/w bugs for reloading. We used to lose the
504 * parent's npx state for forks by forgetting to reload.
505 */
af0bff84 506 movl _npxthread,%eax
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507 testl %eax,%eax
508 je 1f
509
510 pushl %ecx
b7c628e4 511 movl TD_PCB(%eax),%eax
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512 leal PCB_SAVEFPU(%eax),%eax
513 pushl %eax
514 pushl %eax
515 call _npxsave
516 addl $4,%esp
517 popl %eax
518 popl %ecx
519
520 pushl $PCB_SAVEFPU_SIZE
521 leal PCB_SAVEFPU(%ecx),%ecx
522 pushl %ecx
523 pushl %eax
524 call _bcopy
525 addl $12,%esp
526#endif /* NNPX > 0 */
527
5281:
529 ret
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530
531/*
532 * cpu_idle_restore() (current thread in %eax on entry)
533 *
534 * Don't bother setting up any regs other then %ebp so backtraces
535 * don't die. This restore function is used to bootstrap into the
536 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
537 * switching.
538 */
539ENTRY(cpu_idle_restore)
540 movl $0,%ebp
541 pushl $0
542 jmp cpu_idle
543
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544/*
545 * cpu_kthread_restore() (current thread is %eax on entry)
546 *
547 * Don't bother setting up any regs other then %ebp so backtraces
548 * don't die. This restore function is used to bootstrap into an
549 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
550 * after this.
551 */
552ENTRY(cpu_kthread_restore)
553 movl TD_PCB(%eax),%ebx
554 movl $0,%ebp
555 popl %edx /* kthread exit function */
556 pushl PCB_EBX(%ebx) /* argument to ESI function */
557 pushl %edx /* set exit func as return address */
558 movl PCB_ESI(%ebx),%eax
559 jmp *%eax
560
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561/*
562 * cpu_lwkt_switch()
563 *
564 * Standard LWKT switching function. Only non-scratch registers are
565 * saved and we don't bother with the MMU state or anything else.
566 * YYY BGL, SPL
567 */
568ENTRY(cpu_lwkt_switch)
569 movl 4(%esp),%eax
570 pushl %ebp
571 pushl %ebx
572 pushl %esi
573 pushl %edi
574 pushfl
575 movl _curthread,%ecx
576 pushl $cpu_lwkt_restore
577 cli
578 movl %esp,TD_SP(%ecx)
579 movl %eax,_curthread
580 movl TD_SP(%eax),%esp
581 ret
582
583/*
584 * cpu_idle_restore() (current thread in %eax on entry)
585 *
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586 */
587ENTRY(cpu_lwkt_restore)
588 popfl
589 popl %edi
590 popl %esi
591 popl %ebx
592 popl %ebp
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593 movl TD_MACH+MTD_CPL(%eax),%ecx /* unmasked cpl? YYY too complex */
594 notl %ecx
8f41e33b 595 andl _ipending,%ecx
7d0bac62 596 je 1f
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597 cmpl $0,_intr_nesting_level /* don't stack too deeply */
598 jne 1f
8f41e33b 599 call splz /* execute unmasked ints */
7d0bac62 6001:
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601 ret
602