Upgrade GCC from 4.4.6-RELEASE to 4.4.7 snapshot 2011-10-25
[dragonfly.git] / contrib / gcc-4.4 / gcc / expr.c
CommitLineData
c251ad9e
SS
1/* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4b1e227d 3 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
c251ad9e
SS
4 Free Software Foundation, Inc.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
21
22#include "config.h"
23#include "system.h"
24#include "coretypes.h"
25#include "tm.h"
26#include "machmode.h"
27#include "real.h"
28#include "rtl.h"
29#include "tree.h"
30#include "flags.h"
31#include "regs.h"
32#include "hard-reg-set.h"
33#include "except.h"
34#include "function.h"
35#include "insn-config.h"
36#include "insn-attr.h"
37/* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
38#include "expr.h"
39#include "optabs.h"
40#include "libfuncs.h"
41#include "recog.h"
42#include "reload.h"
43#include "output.h"
44#include "typeclass.h"
45#include "toplev.h"
46#include "ggc.h"
47#include "langhooks.h"
48#include "intl.h"
49#include "tm_p.h"
50#include "tree-iterator.h"
51#include "tree-pass.h"
52#include "tree-flow.h"
53#include "target.h"
54#include "timevar.h"
55#include "df.h"
56#include "diagnostic.h"
57
58/* Decide whether a function's arguments should be processed
59 from first to last or from last to first.
60
61 They should if the stack and args grow in opposite directions, but
62 only if we have push insns. */
63
64#ifdef PUSH_ROUNDING
65
66#ifndef PUSH_ARGS_REVERSED
67#if defined (STACK_GROWS_DOWNWARD) != defined (ARGS_GROW_DOWNWARD)
68#define PUSH_ARGS_REVERSED /* If it's last to first. */
69#endif
70#endif
71
72#endif
73
74#ifndef STACK_PUSH_CODE
75#ifdef STACK_GROWS_DOWNWARD
76#define STACK_PUSH_CODE PRE_DEC
77#else
78#define STACK_PUSH_CODE PRE_INC
79#endif
80#endif
81
82
83/* If this is nonzero, we do not bother generating VOLATILE
84 around volatile memory references, and we are willing to
85 output indirect addresses. If cse is to follow, we reject
86 indirect addresses so a useful potential cse is generated;
87 if it is used only once, instruction combination will produce
88 the same indirect address eventually. */
89int cse_not_expected;
90
91/* This structure is used by move_by_pieces to describe the move to
92 be performed. */
93struct move_by_pieces
94{
95 rtx to;
96 rtx to_addr;
97 int autinc_to;
98 int explicit_inc_to;
99 rtx from;
100 rtx from_addr;
101 int autinc_from;
102 int explicit_inc_from;
103 unsigned HOST_WIDE_INT len;
104 HOST_WIDE_INT offset;
105 int reverse;
106};
107
108/* This structure is used by store_by_pieces to describe the clear to
109 be performed. */
110
111struct store_by_pieces
112{
113 rtx to;
114 rtx to_addr;
115 int autinc_to;
116 int explicit_inc_to;
117 unsigned HOST_WIDE_INT len;
118 HOST_WIDE_INT offset;
119 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode);
120 void *constfundata;
121 int reverse;
122};
123
124static unsigned HOST_WIDE_INT move_by_pieces_ninsns (unsigned HOST_WIDE_INT,
125 unsigned int,
126 unsigned int);
127static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
128 struct move_by_pieces *);
129static bool block_move_libcall_safe_for_call_parm (void);
130static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT);
131static tree emit_block_move_libcall_fn (int);
132static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
133static rtx clear_by_pieces_1 (void *, HOST_WIDE_INT, enum machine_mode);
134static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
135static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
136static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
137 struct store_by_pieces *);
138static tree clear_storage_libcall_fn (int);
139static rtx compress_float_constant (rtx, rtx);
140static rtx get_subtarget (rtx);
141static void store_constructor_field (rtx, unsigned HOST_WIDE_INT,
142 HOST_WIDE_INT, enum machine_mode,
143 tree, tree, int, alias_set_type);
144static void store_constructor (tree, rtx, int, HOST_WIDE_INT);
145static rtx store_field (rtx, HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode,
146 tree, tree, alias_set_type, bool);
147
148static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
149
150static int is_aligning_offset (const_tree, const_tree);
151static void expand_operands (tree, tree, rtx, rtx*, rtx*,
152 enum expand_modifier);
153static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
154static rtx do_store_flag (tree, rtx, enum machine_mode, int);
155#ifdef PUSH_ROUNDING
156static void emit_single_push_insn (enum machine_mode, rtx, tree);
157#endif
158static void do_tablejump (rtx, enum machine_mode, rtx, rtx, rtx);
159static rtx const_vector_from_tree (tree);
160static void write_complex_part (rtx, rtx, bool);
161
162/* Record for each mode whether we can move a register directly to or
163 from an object of that mode in memory. If we can't, we won't try
164 to use that mode directly when accessing a field of that mode. */
165
166static char direct_load[NUM_MACHINE_MODES];
167static char direct_store[NUM_MACHINE_MODES];
168
169/* Record for each mode whether we can float-extend from memory. */
170
171static bool float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
172
173/* This macro is used to determine whether move_by_pieces should be called
174 to perform a structure copy. */
175#ifndef MOVE_BY_PIECES_P
176#define MOVE_BY_PIECES_P(SIZE, ALIGN) \
177 (move_by_pieces_ninsns (SIZE, ALIGN, MOVE_MAX_PIECES + 1) \
178 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
179#endif
180
181/* This macro is used to determine whether clear_by_pieces should be
182 called to clear storage. */
183#ifndef CLEAR_BY_PIECES_P
184#define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
185 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
186 < (unsigned int) CLEAR_RATIO (optimize_insn_for_speed_p ()))
187#endif
188
189/* This macro is used to determine whether store_by_pieces should be
190 called to "memset" storage with byte values other than zero. */
191#ifndef SET_BY_PIECES_P
192#define SET_BY_PIECES_P(SIZE, ALIGN) \
193 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
194 < (unsigned int) SET_RATIO (optimize_insn_for_speed_p ()))
195#endif
196
197/* This macro is used to determine whether store_by_pieces should be
198 called to "memcpy" storage when the source is a constant string. */
199#ifndef STORE_BY_PIECES_P
200#define STORE_BY_PIECES_P(SIZE, ALIGN) \
201 (move_by_pieces_ninsns (SIZE, ALIGN, STORE_MAX_PIECES + 1) \
202 < (unsigned int) MOVE_RATIO (optimize_insn_for_speed_p ()))
203#endif
204
205/* This array records the insn_code of insns to perform block moves. */
206enum insn_code movmem_optab[NUM_MACHINE_MODES];
207
208/* This array records the insn_code of insns to perform block sets. */
209enum insn_code setmem_optab[NUM_MACHINE_MODES];
210
211/* These arrays record the insn_code of three different kinds of insns
212 to perform block compares. */
213enum insn_code cmpstr_optab[NUM_MACHINE_MODES];
214enum insn_code cmpstrn_optab[NUM_MACHINE_MODES];
215enum insn_code cmpmem_optab[NUM_MACHINE_MODES];
216
217/* Synchronization primitives. */
218enum insn_code sync_add_optab[NUM_MACHINE_MODES];
219enum insn_code sync_sub_optab[NUM_MACHINE_MODES];
220enum insn_code sync_ior_optab[NUM_MACHINE_MODES];
221enum insn_code sync_and_optab[NUM_MACHINE_MODES];
222enum insn_code sync_xor_optab[NUM_MACHINE_MODES];
223enum insn_code sync_nand_optab[NUM_MACHINE_MODES];
224enum insn_code sync_old_add_optab[NUM_MACHINE_MODES];
225enum insn_code sync_old_sub_optab[NUM_MACHINE_MODES];
226enum insn_code sync_old_ior_optab[NUM_MACHINE_MODES];
227enum insn_code sync_old_and_optab[NUM_MACHINE_MODES];
228enum insn_code sync_old_xor_optab[NUM_MACHINE_MODES];
229enum insn_code sync_old_nand_optab[NUM_MACHINE_MODES];
230enum insn_code sync_new_add_optab[NUM_MACHINE_MODES];
231enum insn_code sync_new_sub_optab[NUM_MACHINE_MODES];
232enum insn_code sync_new_ior_optab[NUM_MACHINE_MODES];
233enum insn_code sync_new_and_optab[NUM_MACHINE_MODES];
234enum insn_code sync_new_xor_optab[NUM_MACHINE_MODES];
235enum insn_code sync_new_nand_optab[NUM_MACHINE_MODES];
236enum insn_code sync_compare_and_swap[NUM_MACHINE_MODES];
237enum insn_code sync_compare_and_swap_cc[NUM_MACHINE_MODES];
238enum insn_code sync_lock_test_and_set[NUM_MACHINE_MODES];
239enum insn_code sync_lock_release[NUM_MACHINE_MODES];
240
241/* SLOW_UNALIGNED_ACCESS is nonzero if unaligned accesses are very slow. */
242
243#ifndef SLOW_UNALIGNED_ACCESS
244#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) STRICT_ALIGNMENT
245#endif
246\f
247/* This is run to set up which modes can be used
248 directly in memory and to initialize the block move optab. It is run
249 at the beginning of compilation and when the target is reinitialized. */
250
251void
252init_expr_target (void)
253{
254 rtx insn, pat;
255 enum machine_mode mode;
256 int num_clobbers;
257 rtx mem, mem1;
258 rtx reg;
259
260 /* Try indexing by frame ptr and try by stack ptr.
261 It is known that on the Convex the stack ptr isn't a valid index.
262 With luck, one or the other is valid on any machine. */
263 mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx);
264 mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx);
265
266 /* A scratch register we can modify in-place below to avoid
267 useless RTL allocations. */
268 reg = gen_rtx_REG (VOIDmode, -1);
269
270 insn = rtx_alloc (INSN);
271 pat = gen_rtx_SET (0, NULL_RTX, NULL_RTX);
272 PATTERN (insn) = pat;
273
274 for (mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
275 mode = (enum machine_mode) ((int) mode + 1))
276 {
277 int regno;
278
279 direct_load[(int) mode] = direct_store[(int) mode] = 0;
280 PUT_MODE (mem, mode);
281 PUT_MODE (mem1, mode);
282 PUT_MODE (reg, mode);
283
284 /* See if there is some register that can be used in this mode and
285 directly loaded or stored from memory. */
286
287 if (mode != VOIDmode && mode != BLKmode)
288 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
289 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
290 regno++)
291 {
292 if (! HARD_REGNO_MODE_OK (regno, mode))
293 continue;
294
295 SET_REGNO (reg, regno);
296
297 SET_SRC (pat) = mem;
298 SET_DEST (pat) = reg;
299 if (recog (pat, insn, &num_clobbers) >= 0)
300 direct_load[(int) mode] = 1;
301
302 SET_SRC (pat) = mem1;
303 SET_DEST (pat) = reg;
304 if (recog (pat, insn, &num_clobbers) >= 0)
305 direct_load[(int) mode] = 1;
306
307 SET_SRC (pat) = reg;
308 SET_DEST (pat) = mem;
309 if (recog (pat, insn, &num_clobbers) >= 0)
310 direct_store[(int) mode] = 1;
311
312 SET_SRC (pat) = reg;
313 SET_DEST (pat) = mem1;
314 if (recog (pat, insn, &num_clobbers) >= 0)
315 direct_store[(int) mode] = 1;
316 }
317 }
318
319 mem = gen_rtx_MEM (VOIDmode, gen_rtx_raw_REG (Pmode, 10000));
320
321 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
322 mode = GET_MODE_WIDER_MODE (mode))
323 {
324 enum machine_mode srcmode;
325 for (srcmode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); srcmode != mode;
326 srcmode = GET_MODE_WIDER_MODE (srcmode))
327 {
328 enum insn_code ic;
329
330 ic = can_extend_p (mode, srcmode, 0);
331 if (ic == CODE_FOR_nothing)
332 continue;
333
334 PUT_MODE (mem, srcmode);
335
336 if ((*insn_data[ic].operand[1].predicate) (mem, srcmode))
337 float_extend_from_mem[mode][srcmode] = true;
338 }
339 }
340}
341
342/* This is run at the start of compiling a function. */
343
344void
345init_expr (void)
346{
347 memset (&crtl->expr, 0, sizeof (crtl->expr));
348}
349\f
350/* Copy data from FROM to TO, where the machine modes are not the same.
351 Both modes may be integer, or both may be floating, or both may be
352 fixed-point.
353 UNSIGNEDP should be nonzero if FROM is an unsigned type.
354 This causes zero-extension instead of sign-extension. */
355
356void
357convert_move (rtx to, rtx from, int unsignedp)
358{
359 enum machine_mode to_mode = GET_MODE (to);
360 enum machine_mode from_mode = GET_MODE (from);
361 int to_real = SCALAR_FLOAT_MODE_P (to_mode);
362 int from_real = SCALAR_FLOAT_MODE_P (from_mode);
363 enum insn_code code;
364 rtx libcall;
365
366 /* rtx code for making an equivalent value. */
367 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
368 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
369
370
371 gcc_assert (to_real == from_real);
372 gcc_assert (to_mode != BLKmode);
373 gcc_assert (from_mode != BLKmode);
374
375 /* If the source and destination are already the same, then there's
376 nothing to do. */
377 if (to == from)
378 return;
379
380 /* If FROM is a SUBREG that indicates that we have already done at least
381 the required extension, strip it. We don't handle such SUBREGs as
382 TO here. */
383
384 if (GET_CODE (from) == SUBREG && SUBREG_PROMOTED_VAR_P (from)
385 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (from)))
386 >= GET_MODE_SIZE (to_mode))
387 && SUBREG_PROMOTED_UNSIGNED_P (from) == unsignedp)
388 from = gen_lowpart (to_mode, from), from_mode = to_mode;
389
390 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
391
392 if (to_mode == from_mode
393 || (from_mode == VOIDmode && CONSTANT_P (from)))
394 {
395 emit_move_insn (to, from);
396 return;
397 }
398
399 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
400 {
401 gcc_assert (GET_MODE_BITSIZE (from_mode) == GET_MODE_BITSIZE (to_mode));
402
403 if (VECTOR_MODE_P (to_mode))
404 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
405 else
406 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
407
408 emit_move_insn (to, from);
409 return;
410 }
411
412 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
413 {
414 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
415 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
416 return;
417 }
418
419 if (to_real)
420 {
421 rtx value, insns;
422 convert_optab tab;
423
424 gcc_assert ((GET_MODE_PRECISION (from_mode)
425 != GET_MODE_PRECISION (to_mode))
426 || (DECIMAL_FLOAT_MODE_P (from_mode)
427 != DECIMAL_FLOAT_MODE_P (to_mode)));
428
429 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
430 /* Conversion between decimal float and binary float, same size. */
431 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
432 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
433 tab = sext_optab;
434 else
435 tab = trunc_optab;
436
437 /* Try converting directly if the insn is supported. */
438
439 code = convert_optab_handler (tab, to_mode, from_mode)->insn_code;
440 if (code != CODE_FOR_nothing)
441 {
442 emit_unop_insn (code, to, from,
443 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
444 return;
445 }
446
447 /* Otherwise use a libcall. */
448 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
449
450 /* Is this conversion implemented yet? */
451 gcc_assert (libcall);
452
453 start_sequence ();
454 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
455 1, from, from_mode);
456 insns = get_insns ();
457 end_sequence ();
458 emit_libcall_block (insns, to, value,
459 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
460 from)
461 : gen_rtx_FLOAT_EXTEND (to_mode, from));
462 return;
463 }
464
465 /* Handle pointer conversion. */ /* SPEE 900220. */
466 /* Targets are expected to provide conversion insns between PxImode and
467 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
468 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
469 {
470 enum machine_mode full_mode
471 = smallest_mode_for_size (GET_MODE_BITSIZE (to_mode), MODE_INT);
472
473 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)->insn_code
474 != CODE_FOR_nothing);
475
476 if (full_mode != from_mode)
477 from = convert_to_mode (full_mode, from, unsignedp);
478 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode)->insn_code,
479 to, from, UNKNOWN);
480 return;
481 }
482 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
483 {
484 rtx new_from;
485 enum machine_mode full_mode
486 = smallest_mode_for_size (GET_MODE_BITSIZE (from_mode), MODE_INT);
487
488 gcc_assert (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code
489 != CODE_FOR_nothing);
490
491 if (to_mode == full_mode)
492 {
493 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code,
494 to, from, UNKNOWN);
495 return;
496 }
497
498 new_from = gen_reg_rtx (full_mode);
499 emit_unop_insn (convert_optab_handler (sext_optab, full_mode, from_mode)->insn_code,
500 new_from, from, UNKNOWN);
501
502 /* else proceed to integer conversions below. */
503 from_mode = full_mode;
504 from = new_from;
505 }
506
507 /* Make sure both are fixed-point modes or both are not. */
508 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
509 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
510 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
511 {
512 /* If we widen from_mode to to_mode and they are in the same class,
513 we won't saturate the result.
514 Otherwise, always saturate the result to play safe. */
515 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
516 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
517 expand_fixed_convert (to, from, 0, 0);
518 else
519 expand_fixed_convert (to, from, 0, 1);
520 return;
521 }
522
523 /* Now both modes are integers. */
524
525 /* Handle expanding beyond a word. */
526 if (GET_MODE_BITSIZE (from_mode) < GET_MODE_BITSIZE (to_mode)
527 && GET_MODE_BITSIZE (to_mode) > BITS_PER_WORD)
528 {
529 rtx insns;
530 rtx lowpart;
531 rtx fill_value;
532 rtx lowfrom;
533 int i;
534 enum machine_mode lowpart_mode;
535 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
536
537 /* Try converting directly if the insn is supported. */
538 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
539 != CODE_FOR_nothing)
540 {
541 /* If FROM is a SUBREG, put it into a register. Do this
542 so that we always generate the same set of insns for
543 better cse'ing; if an intermediate assignment occurred,
544 we won't be doing the operation directly on the SUBREG. */
545 if (optimize > 0 && GET_CODE (from) == SUBREG)
546 from = force_reg (from_mode, from);
547 emit_unop_insn (code, to, from, equiv_code);
548 return;
549 }
550 /* Next, try converting via full word. */
551 else if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD
552 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
553 != CODE_FOR_nothing))
554 {
555 rtx word_to = gen_reg_rtx (word_mode);
556 if (REG_P (to))
557 {
558 if (reg_overlap_mentioned_p (to, from))
559 from = force_reg (from_mode, from);
560 emit_clobber (to);
561 }
562 convert_move (word_to, from, unsignedp);
563 emit_unop_insn (code, to, word_to, equiv_code);
564 return;
565 }
566
567 /* No special multiword conversion insn; do it by hand. */
568 start_sequence ();
569
570 /* Since we will turn this into a no conflict block, we must ensure
571 that the source does not overlap the target. */
572
573 if (reg_overlap_mentioned_p (to, from))
574 from = force_reg (from_mode, from);
575
576 /* Get a copy of FROM widened to a word, if necessary. */
577 if (GET_MODE_BITSIZE (from_mode) < BITS_PER_WORD)
578 lowpart_mode = word_mode;
579 else
580 lowpart_mode = from_mode;
581
582 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
583
584 lowpart = gen_lowpart (lowpart_mode, to);
585 emit_move_insn (lowpart, lowfrom);
586
587 /* Compute the value to put in each remaining word. */
588 if (unsignedp)
589 fill_value = const0_rtx;
590 else
591 {
592#ifdef HAVE_slt
593 if (HAVE_slt
594 && insn_data[(int) CODE_FOR_slt].operand[0].mode == word_mode
595 && STORE_FLAG_VALUE == -1)
596 {
597 emit_cmp_insn (lowfrom, const0_rtx, NE, NULL_RTX,
598 lowpart_mode, 0);
599 fill_value = gen_reg_rtx (word_mode);
600 emit_insn (gen_slt (fill_value));
601 }
602 else
603#endif
604 {
605 fill_value
606 = expand_shift (RSHIFT_EXPR, lowpart_mode, lowfrom,
607 size_int (GET_MODE_BITSIZE (lowpart_mode) - 1),
608 NULL_RTX, 0);
609 fill_value = convert_to_mode (word_mode, fill_value, 1);
610 }
611 }
612
613 /* Fill the remaining words. */
614 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
615 {
616 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
617 rtx subword = operand_subword (to, index, 1, to_mode);
618
619 gcc_assert (subword);
620
621 if (fill_value != subword)
622 emit_move_insn (subword, fill_value);
623 }
624
625 insns = get_insns ();
626 end_sequence ();
627
628 emit_insn (insns);
629 return;
630 }
631
632 /* Truncating multi-word to a word or less. */
633 if (GET_MODE_BITSIZE (from_mode) > BITS_PER_WORD
634 && GET_MODE_BITSIZE (to_mode) <= BITS_PER_WORD)
635 {
636 if (!((MEM_P (from)
637 && ! MEM_VOLATILE_P (from)
638 && direct_load[(int) to_mode]
639 && ! mode_dependent_address_p (XEXP (from, 0)))
640 || REG_P (from)
641 || GET_CODE (from) == SUBREG))
642 from = force_reg (from_mode, from);
643 convert_move (to, gen_lowpart (word_mode, from), 0);
644 return;
645 }
646
647 /* Now follow all the conversions between integers
648 no more than a word long. */
649
650 /* For truncation, usually we can just refer to FROM in a narrower mode. */
651 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
652 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
653 GET_MODE_BITSIZE (from_mode)))
654 {
655 if (!((MEM_P (from)
656 && ! MEM_VOLATILE_P (from)
657 && direct_load[(int) to_mode]
658 && ! mode_dependent_address_p (XEXP (from, 0)))
659 || REG_P (from)
660 || GET_CODE (from) == SUBREG))
661 from = force_reg (from_mode, from);
662 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
663 && ! HARD_REGNO_MODE_OK (REGNO (from), to_mode))
664 from = copy_to_reg (from);
665 emit_move_insn (to, gen_lowpart (to_mode, from));
666 return;
667 }
668
669 /* Handle extension. */
670 if (GET_MODE_BITSIZE (to_mode) > GET_MODE_BITSIZE (from_mode))
671 {
672 /* Convert directly if that works. */
673 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
674 != CODE_FOR_nothing)
675 {
676 emit_unop_insn (code, to, from, equiv_code);
677 return;
678 }
679 else
680 {
681 enum machine_mode intermediate;
682 rtx tmp;
683 tree shift_amount;
684
685 /* Search for a mode to convert via. */
686 for (intermediate = from_mode; intermediate != VOIDmode;
687 intermediate = GET_MODE_WIDER_MODE (intermediate))
688 if (((can_extend_p (to_mode, intermediate, unsignedp)
689 != CODE_FOR_nothing)
690 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
691 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (to_mode),
692 GET_MODE_BITSIZE (intermediate))))
693 && (can_extend_p (intermediate, from_mode, unsignedp)
694 != CODE_FOR_nothing))
695 {
696 convert_move (to, convert_to_mode (intermediate, from,
697 unsignedp), unsignedp);
698 return;
699 }
700
701 /* No suitable intermediate mode.
702 Generate what we need with shifts. */
703 shift_amount = build_int_cst (NULL_TREE,
704 GET_MODE_BITSIZE (to_mode)
705 - GET_MODE_BITSIZE (from_mode));
706 from = gen_lowpart (to_mode, force_reg (from_mode, from));
707 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
708 to, unsignedp);
709 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
710 to, unsignedp);
711 if (tmp != to)
712 emit_move_insn (to, tmp);
713 return;
714 }
715 }
716
717 /* Support special truncate insns for certain modes. */
718 if (convert_optab_handler (trunc_optab, to_mode, from_mode)->insn_code != CODE_FOR_nothing)
719 {
720 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode)->insn_code,
721 to, from, UNKNOWN);
722 return;
723 }
724
725 /* Handle truncation of volatile memrefs, and so on;
726 the things that couldn't be truncated directly,
727 and for which there was no special instruction.
728
729 ??? Code above formerly short-circuited this, for most integer
730 mode pairs, with a force_reg in from_mode followed by a recursive
731 call to this routine. Appears always to have been wrong. */
732 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode))
733 {
734 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
735 emit_move_insn (to, temp);
736 return;
737 }
738
739 /* Mode combination is not recognized. */
740 gcc_unreachable ();
741}
742
743/* Return an rtx for a value that would result
744 from converting X to mode MODE.
745 Both X and MODE may be floating, or both integer.
746 UNSIGNEDP is nonzero if X is an unsigned value.
747 This can be done by referring to a part of X in place
748 or by copying to a new temporary with conversion. */
749
750rtx
751convert_to_mode (enum machine_mode mode, rtx x, int unsignedp)
752{
753 return convert_modes (mode, VOIDmode, x, unsignedp);
754}
755
756/* Return an rtx for a value that would result
757 from converting X from mode OLDMODE to mode MODE.
758 Both modes may be floating, or both integer.
759 UNSIGNEDP is nonzero if X is an unsigned value.
760
761 This can be done by referring to a part of X in place
762 or by copying to a new temporary with conversion.
763
764 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
765
766rtx
767convert_modes (enum machine_mode mode, enum machine_mode oldmode, rtx x, int unsignedp)
768{
769 rtx temp;
770
771 /* If FROM is a SUBREG that indicates that we have already done at least
772 the required extension, strip it. */
773
774 if (GET_CODE (x) == SUBREG && SUBREG_PROMOTED_VAR_P (x)
775 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) >= GET_MODE_SIZE (mode)
776 && SUBREG_PROMOTED_UNSIGNED_P (x) == unsignedp)
777 x = gen_lowpart (mode, x);
778
779 if (GET_MODE (x) != VOIDmode)
780 oldmode = GET_MODE (x);
781
782 if (mode == oldmode)
783 return x;
784
785 /* There is one case that we must handle specially: If we are converting
786 a CONST_INT into a mode whose size is twice HOST_BITS_PER_WIDE_INT and
787 we are to interpret the constant as unsigned, gen_lowpart will do
788 the wrong if the constant appears negative. What we want to do is
789 make the high-order word of the constant zero, not all ones. */
790
791 if (unsignedp && GET_MODE_CLASS (mode) == MODE_INT
792 && GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT
793 && GET_CODE (x) == CONST_INT && INTVAL (x) < 0)
794 {
795 HOST_WIDE_INT val = INTVAL (x);
796
797 if (oldmode != VOIDmode
798 && HOST_BITS_PER_WIDE_INT > GET_MODE_BITSIZE (oldmode))
799 {
800 int width = GET_MODE_BITSIZE (oldmode);
801
802 /* We need to zero extend VAL. */
803 val &= ((HOST_WIDE_INT) 1 << width) - 1;
804 }
805
806 return immed_double_const (val, (HOST_WIDE_INT) 0, mode);
807 }
808
809 /* We can do this with a gen_lowpart if both desired and current modes
810 are integer, and this is either a constant integer, a register, or a
811 non-volatile MEM. Except for the constant case where MODE is no
812 wider than HOST_BITS_PER_WIDE_INT, we must be narrowing the operand. */
813
814 if ((GET_CODE (x) == CONST_INT
815 && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
816 || (GET_MODE_CLASS (mode) == MODE_INT
817 && GET_MODE_CLASS (oldmode) == MODE_INT
818 && (GET_CODE (x) == CONST_DOUBLE
819 || (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (oldmode)
820 && ((MEM_P (x) && ! MEM_VOLATILE_P (x)
821 && direct_load[(int) mode])
822 || (REG_P (x)
823 && (! HARD_REGISTER_P (x)
824 || HARD_REGNO_MODE_OK (REGNO (x), mode))
825 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
826 GET_MODE_BITSIZE (GET_MODE (x)))))))))
827 {
828 /* ?? If we don't know OLDMODE, we have to assume here that
829 X does not need sign- or zero-extension. This may not be
830 the case, but it's the best we can do. */
831 if (GET_CODE (x) == CONST_INT && oldmode != VOIDmode
832 && GET_MODE_SIZE (mode) > GET_MODE_SIZE (oldmode))
833 {
834 HOST_WIDE_INT val = INTVAL (x);
835 int width = GET_MODE_BITSIZE (oldmode);
836
837 /* We must sign or zero-extend in this case. Start by
838 zero-extending, then sign extend if we need to. */
839 val &= ((HOST_WIDE_INT) 1 << width) - 1;
840 if (! unsignedp
841 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
842 val |= (HOST_WIDE_INT) (-1) << width;
843
844 return gen_int_mode (val, mode);
845 }
846
847 return gen_lowpart (mode, x);
848 }
849
850 /* Converting from integer constant into mode is always equivalent to an
851 subreg operation. */
852 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
853 {
854 gcc_assert (GET_MODE_BITSIZE (mode) == GET_MODE_BITSIZE (oldmode));
855 return simplify_gen_subreg (mode, x, oldmode, 0);
856 }
857
858 temp = gen_reg_rtx (mode);
859 convert_move (temp, x, unsignedp);
860 return temp;
861}
862\f
863/* STORE_MAX_PIECES is the number of bytes at a time that we can
864 store efficiently. Due to internal GCC limitations, this is
865 MOVE_MAX_PIECES limited by the number of bytes GCC can represent
866 for an immediate constant. */
867
868#define STORE_MAX_PIECES MIN (MOVE_MAX_PIECES, 2 * sizeof (HOST_WIDE_INT))
869
870/* Determine whether the LEN bytes can be moved by using several move
871 instructions. Return nonzero if a call to move_by_pieces should
872 succeed. */
873
874int
875can_move_by_pieces (unsigned HOST_WIDE_INT len,
876 unsigned int align ATTRIBUTE_UNUSED)
877{
878 return MOVE_BY_PIECES_P (len, align);
879}
880
881/* Generate several move instructions to copy LEN bytes from block FROM to
882 block TO. (These are MEM rtx's with BLKmode).
883
884 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
885 used to push FROM to the stack.
886
887 ALIGN is maximum stack alignment we can assume.
888
889 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
890 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
891 stpcpy. */
892
893rtx
894move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
895 unsigned int align, int endp)
896{
897 struct move_by_pieces data;
898 rtx to_addr, from_addr = XEXP (from, 0);
899 unsigned int max_size = MOVE_MAX_PIECES + 1;
900 enum machine_mode mode = VOIDmode, tmode;
901 enum insn_code icode;
902
903 align = MIN (to ? MEM_ALIGN (to) : align, MEM_ALIGN (from));
904
905 data.offset = 0;
906 data.from_addr = from_addr;
907 if (to)
908 {
909 to_addr = XEXP (to, 0);
910 data.to = to;
911 data.autinc_to
912 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
913 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
914 data.reverse
915 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
916 }
917 else
918 {
919 to_addr = NULL_RTX;
920 data.to = NULL_RTX;
921 data.autinc_to = 1;
922#ifdef STACK_GROWS_DOWNWARD
923 data.reverse = 1;
924#else
925 data.reverse = 0;
926#endif
927 }
928 data.to_addr = to_addr;
929 data.from = from;
930 data.autinc_from
931 = (GET_CODE (from_addr) == PRE_INC || GET_CODE (from_addr) == PRE_DEC
932 || GET_CODE (from_addr) == POST_INC
933 || GET_CODE (from_addr) == POST_DEC);
934
935 data.explicit_inc_from = 0;
936 data.explicit_inc_to = 0;
937 if (data.reverse) data.offset = len;
938 data.len = len;
939
940 /* If copying requires more than two move insns,
941 copy addresses to registers (to make displacements shorter)
942 and use post-increment if available. */
943 if (!(data.autinc_from && data.autinc_to)
944 && move_by_pieces_ninsns (len, align, max_size) > 2)
945 {
946 /* Find the mode of the largest move... */
947 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
948 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
949 if (GET_MODE_SIZE (tmode) < max_size)
950 mode = tmode;
951
952 if (USE_LOAD_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_from)
953 {
954 data.from_addr = copy_addr_to_reg (plus_constant (from_addr, len));
955 data.autinc_from = 1;
956 data.explicit_inc_from = -1;
957 }
958 if (USE_LOAD_POST_INCREMENT (mode) && ! data.autinc_from)
959 {
960 data.from_addr = copy_addr_to_reg (from_addr);
961 data.autinc_from = 1;
962 data.explicit_inc_from = 1;
963 }
964 if (!data.autinc_from && CONSTANT_P (from_addr))
965 data.from_addr = copy_addr_to_reg (from_addr);
966 if (USE_STORE_PRE_DECREMENT (mode) && data.reverse && ! data.autinc_to)
967 {
968 data.to_addr = copy_addr_to_reg (plus_constant (to_addr, len));
969 data.autinc_to = 1;
970 data.explicit_inc_to = -1;
971 }
972 if (USE_STORE_POST_INCREMENT (mode) && ! data.reverse && ! data.autinc_to)
973 {
974 data.to_addr = copy_addr_to_reg (to_addr);
975 data.autinc_to = 1;
976 data.explicit_inc_to = 1;
977 }
978 if (!data.autinc_to && CONSTANT_P (to_addr))
979 data.to_addr = copy_addr_to_reg (to_addr);
980 }
981
982 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
983 if (align >= GET_MODE_ALIGNMENT (tmode))
984 align = GET_MODE_ALIGNMENT (tmode);
985 else
986 {
987 enum machine_mode xmode;
988
989 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
990 tmode != VOIDmode;
991 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
992 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
993 || SLOW_UNALIGNED_ACCESS (tmode, align))
994 break;
995
996 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
997 }
998
999 /* First move what we can in the largest integer mode, then go to
1000 successively smaller modes. */
1001
1002 while (max_size > 1)
1003 {
1004 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1005 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1006 if (GET_MODE_SIZE (tmode) < max_size)
1007 mode = tmode;
1008
1009 if (mode == VOIDmode)
1010 break;
1011
1012 icode = optab_handler (mov_optab, mode)->insn_code;
1013 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1014 move_by_pieces_1 (GEN_FCN (icode), mode, &data);
1015
1016 max_size = GET_MODE_SIZE (mode);
1017 }
1018
1019 /* The code above should have handled everything. */
1020 gcc_assert (!data.len);
1021
1022 if (endp)
1023 {
1024 rtx to1;
1025
1026 gcc_assert (!data.reverse);
1027 if (data.autinc_to)
1028 {
1029 if (endp == 2)
1030 {
1031 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
1032 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
1033 else
1034 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
1035 -1));
1036 }
1037 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
1038 data.offset);
1039 }
1040 else
1041 {
1042 if (endp == 2)
1043 --data.offset;
1044 to1 = adjust_address (data.to, QImode, data.offset);
1045 }
1046 return to1;
1047 }
1048 else
1049 return data.to;
1050}
1051
1052/* Return number of insns required to move L bytes by pieces.
1053 ALIGN (in bits) is maximum alignment we can assume. */
1054
1055static unsigned HOST_WIDE_INT
1056move_by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
1057 unsigned int max_size)
1058{
1059 unsigned HOST_WIDE_INT n_insns = 0;
1060 enum machine_mode tmode;
1061
1062 tmode = mode_for_size (MOVE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
1063 if (align >= GET_MODE_ALIGNMENT (tmode))
1064 align = GET_MODE_ALIGNMENT (tmode);
1065 else
1066 {
1067 enum machine_mode tmode, xmode;
1068
1069 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
1070 tmode != VOIDmode;
1071 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
1072 if (GET_MODE_SIZE (tmode) > MOVE_MAX_PIECES
1073 || SLOW_UNALIGNED_ACCESS (tmode, align))
1074 break;
1075
1076 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
1077 }
1078
1079 while (max_size > 1)
1080 {
1081 enum machine_mode mode = VOIDmode;
1082 enum insn_code icode;
1083
1084 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
1085 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
1086 if (GET_MODE_SIZE (tmode) < max_size)
1087 mode = tmode;
1088
1089 if (mode == VOIDmode)
1090 break;
1091
1092 icode = optab_handler (mov_optab, mode)->insn_code;
1093 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
1094 n_insns += l / GET_MODE_SIZE (mode), l %= GET_MODE_SIZE (mode);
1095
1096 max_size = GET_MODE_SIZE (mode);
1097 }
1098
1099 gcc_assert (!l);
1100 return n_insns;
1101}
1102
1103/* Subroutine of move_by_pieces. Move as many bytes as appropriate
1104 with move instructions for mode MODE. GENFUN is the gen_... function
1105 to make a move insn for that mode. DATA has all the other info. */
1106
1107static void
1108move_by_pieces_1 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
1109 struct move_by_pieces *data)
1110{
1111 unsigned int size = GET_MODE_SIZE (mode);
1112 rtx to1 = NULL_RTX, from1;
1113
1114 while (data->len >= size)
1115 {
1116 if (data->reverse)
1117 data->offset -= size;
1118
1119 if (data->to)
1120 {
1121 if (data->autinc_to)
1122 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
1123 data->offset);
1124 else
1125 to1 = adjust_address (data->to, mode, data->offset);
1126 }
1127
1128 if (data->autinc_from)
1129 from1 = adjust_automodify_address (data->from, mode, data->from_addr,
1130 data->offset);
1131 else
1132 from1 = adjust_address (data->from, mode, data->offset);
1133
1134 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
1135 emit_insn (gen_add2_insn (data->to_addr,
1136 GEN_INT (-(HOST_WIDE_INT)size)));
1137 if (HAVE_PRE_DECREMENT && data->explicit_inc_from < 0)
1138 emit_insn (gen_add2_insn (data->from_addr,
1139 GEN_INT (-(HOST_WIDE_INT)size)));
1140
1141 if (data->to)
1142 emit_insn ((*genfun) (to1, from1));
1143 else
1144 {
1145#ifdef PUSH_ROUNDING
1146 emit_single_push_insn (mode, from1, NULL);
1147#else
1148 gcc_unreachable ();
1149#endif
1150 }
1151
1152 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
1153 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
1154 if (HAVE_POST_INCREMENT && data->explicit_inc_from > 0)
1155 emit_insn (gen_add2_insn (data->from_addr, GEN_INT (size)));
1156
1157 if (! data->reverse)
1158 data->offset += size;
1159
1160 data->len -= size;
1161 }
1162}
1163\f
1164/* Emit code to move a block Y to a block X. This may be done with
1165 string-move instructions, with multiple scalar move instructions,
1166 or with a library call.
1167
1168 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1169 SIZE is an rtx that says how long they are.
1170 ALIGN is the maximum alignment we can assume they have.
1171 METHOD describes what kind of copy this is, and what mechanisms may be used.
1172
1173 Return the address of the new block, if memcpy is called and returns it,
1174 0 otherwise. */
1175
1176rtx
1177emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1178 unsigned int expected_align, HOST_WIDE_INT expected_size)
1179{
1180 bool may_use_call;
1181 rtx retval = 0;
1182 unsigned int align;
1183
1184 switch (method)
1185 {
1186 case BLOCK_OP_NORMAL:
1187 case BLOCK_OP_TAILCALL:
1188 may_use_call = true;
1189 break;
1190
1191 case BLOCK_OP_CALL_PARM:
1192 may_use_call = block_move_libcall_safe_for_call_parm ();
1193
1194 /* Make inhibit_defer_pop nonzero around the library call
1195 to force it to pop the arguments right away. */
1196 NO_DEFER_POP;
1197 break;
1198
1199 case BLOCK_OP_NO_LIBCALL:
1200 may_use_call = false;
1201 break;
1202
1203 default:
1204 gcc_unreachable ();
1205 }
1206
1207 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1208
1209 gcc_assert (MEM_P (x));
1210 gcc_assert (MEM_P (y));
1211 gcc_assert (size);
1212
1213 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1214 block copy is more efficient for other large modes, e.g. DCmode. */
1215 x = adjust_address (x, BLKmode, 0);
1216 y = adjust_address (y, BLKmode, 0);
1217
1218 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1219 can be incorrect is coming from __builtin_memcpy. */
1220 if (GET_CODE (size) == CONST_INT)
1221 {
1222 if (INTVAL (size) == 0)
1223 return 0;
1224
1225 x = shallow_copy_rtx (x);
1226 y = shallow_copy_rtx (y);
1227 set_mem_size (x, size);
1228 set_mem_size (y, size);
1229 }
1230
1231 if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
1232 move_by_pieces (x, y, INTVAL (size), align, 0);
1233 else if (emit_block_move_via_movmem (x, y, size, align,
1234 expected_align, expected_size))
1235 ;
1236 else if (may_use_call)
1237 retval = emit_block_move_via_libcall (x, y, size,
1238 method == BLOCK_OP_TAILCALL);
1239 else
1240 emit_block_move_via_loop (x, y, size, align);
1241
1242 if (method == BLOCK_OP_CALL_PARM)
1243 OK_DEFER_POP;
1244
1245 return retval;
1246}
1247
1248rtx
1249emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1250{
1251 return emit_block_move_hints (x, y, size, method, 0, -1);
1252}
1253
1254/* A subroutine of emit_block_move. Returns true if calling the
1255 block move libcall will not clobber any parameters which may have
1256 already been placed on the stack. */
1257
1258static bool
1259block_move_libcall_safe_for_call_parm (void)
1260{
1261#if defined (REG_PARM_STACK_SPACE)
1262 tree fn;
1263#endif
1264
1265 /* If arguments are pushed on the stack, then they're safe. */
1266 if (PUSH_ARGS)
1267 return true;
1268
1269 /* If registers go on the stack anyway, any argument is sure to clobber
1270 an outgoing argument. */
1271#if defined (REG_PARM_STACK_SPACE)
1272 fn = emit_block_move_libcall_fn (false);
1273 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1274 && REG_PARM_STACK_SPACE (fn) != 0)
1275 return false;
1276#endif
1277
1278 /* If any argument goes in memory, then it might clobber an outgoing
1279 argument. */
1280 {
1281 CUMULATIVE_ARGS args_so_far;
1282 tree fn, arg;
1283
1284 fn = emit_block_move_libcall_fn (false);
1285 INIT_CUMULATIVE_ARGS (args_so_far, TREE_TYPE (fn), NULL_RTX, 0, 3);
1286
1287 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1288 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1289 {
1290 enum machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1291 rtx tmp = FUNCTION_ARG (args_so_far, mode, NULL_TREE, 1);
1292 if (!tmp || !REG_P (tmp))
1293 return false;
1294 if (targetm.calls.arg_partial_bytes (&args_so_far, mode, NULL, 1))
1295 return false;
1296 FUNCTION_ARG_ADVANCE (args_so_far, mode, NULL_TREE, 1);
1297 }
1298 }
1299 return true;
1300}
1301
1302/* A subroutine of emit_block_move. Expand a movmem pattern;
1303 return true if successful. */
1304
1305static bool
1306emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1307 unsigned int expected_align, HOST_WIDE_INT expected_size)
1308{
1309 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
1310 int save_volatile_ok = volatile_ok;
1311 enum machine_mode mode;
1312
1313 if (expected_align < align)
1314 expected_align = align;
1315
1316 /* Since this is a move insn, we don't care about volatility. */
1317 volatile_ok = 1;
1318
1319 /* Try the most limited insn first, because there's no point
1320 including more than one in the machine description unless
1321 the more limited one has some advantage. */
1322
1323 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1324 mode = GET_MODE_WIDER_MODE (mode))
1325 {
1326 enum insn_code code = movmem_optab[(int) mode];
1327 insn_operand_predicate_fn pred;
1328
1329 if (code != CODE_FOR_nothing
1330 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1331 here because if SIZE is less than the mode mask, as it is
1332 returned by the macro, it will definitely be less than the
1333 actual mode mask. */
1334 && ((GET_CODE (size) == CONST_INT
1335 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1336 <= (GET_MODE_MASK (mode) >> 1)))
1337 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
1338 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
1339 || (*pred) (x, BLKmode))
1340 && ((pred = insn_data[(int) code].operand[1].predicate) == 0
1341 || (*pred) (y, BLKmode))
1342 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
1343 || (*pred) (opalign, VOIDmode)))
1344 {
1345 rtx op2;
1346 rtx last = get_last_insn ();
1347 rtx pat;
1348
1349 op2 = convert_to_mode (mode, size, 1);
1350 pred = insn_data[(int) code].operand[2].predicate;
1351 if (pred != 0 && ! (*pred) (op2, mode))
1352 op2 = copy_to_mode_reg (mode, op2);
1353
1354 /* ??? When called via emit_block_move_for_call, it'd be
1355 nice if there were some way to inform the backend, so
1356 that it doesn't fail the expansion because it thinks
1357 emitting the libcall would be more efficient. */
1358
1359 if (insn_data[(int) code].n_operands == 4)
1360 pat = GEN_FCN ((int) code) (x, y, op2, opalign);
1361 else
1362 pat = GEN_FCN ((int) code) (x, y, op2, opalign,
1363 GEN_INT (expected_align
1364 / BITS_PER_UNIT),
1365 GEN_INT (expected_size));
1366 if (pat)
1367 {
1368 emit_insn (pat);
1369 volatile_ok = save_volatile_ok;
1370 return true;
1371 }
1372 else
1373 delete_insns_since (last);
1374 }
1375 }
1376
1377 volatile_ok = save_volatile_ok;
1378 return false;
1379}
1380
1381/* A subroutine of emit_block_move. Expand a call to memcpy.
1382 Return the return value from memcpy, 0 otherwise. */
1383
1384rtx
1385emit_block_move_via_libcall (rtx dst, rtx src, rtx size, bool tailcall)
1386{
1387 rtx dst_addr, src_addr;
1388 tree call_expr, fn, src_tree, dst_tree, size_tree;
1389 enum machine_mode size_mode;
1390 rtx retval;
1391
1392 /* Emit code to copy the addresses of DST and SRC and SIZE into new
1393 pseudos. We can then place those new pseudos into a VAR_DECL and
1394 use them later. */
1395
1396 dst_addr = copy_to_mode_reg (Pmode, XEXP (dst, 0));
1397 src_addr = copy_to_mode_reg (Pmode, XEXP (src, 0));
1398
1399 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1400 src_addr = convert_memory_address (ptr_mode, src_addr);
1401
1402 dst_tree = make_tree (ptr_type_node, dst_addr);
1403 src_tree = make_tree (ptr_type_node, src_addr);
1404
1405 size_mode = TYPE_MODE (sizetype);
1406
1407 size = convert_to_mode (size_mode, size, 1);
1408 size = copy_to_mode_reg (size_mode, size);
1409
1410 /* It is incorrect to use the libcall calling conventions to call
1411 memcpy in this context. This could be a user call to memcpy and
1412 the user may wish to examine the return value from memcpy. For
1413 targets where libcalls and normal calls have different conventions
1414 for returning pointers, we could end up generating incorrect code. */
1415
1416 size_tree = make_tree (sizetype, size);
1417
1418 fn = emit_block_move_libcall_fn (true);
1419 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1420 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1421
1422 retval = expand_normal (call_expr);
1423
1424 return retval;
1425}
1426
1427/* A subroutine of emit_block_move_via_libcall. Create the tree node
1428 for the function we use for block copies. The first time FOR_CALL
1429 is true, we call assemble_external. */
1430
1431static GTY(()) tree block_move_fn;
1432
1433void
1434init_block_move_fn (const char *asmspec)
1435{
1436 if (!block_move_fn)
1437 {
1438 tree args, fn;
1439
1440 fn = get_identifier ("memcpy");
1441 args = build_function_type_list (ptr_type_node, ptr_type_node,
1442 const_ptr_type_node, sizetype,
1443 NULL_TREE);
1444
1445 fn = build_decl (FUNCTION_DECL, fn, args);
1446 DECL_EXTERNAL (fn) = 1;
1447 TREE_PUBLIC (fn) = 1;
1448 DECL_ARTIFICIAL (fn) = 1;
1449 TREE_NOTHROW (fn) = 1;
1450 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
1451 DECL_VISIBILITY_SPECIFIED (fn) = 1;
1452
1453 block_move_fn = fn;
1454 }
1455
1456 if (asmspec)
1457 set_user_assembler_name (block_move_fn, asmspec);
1458}
1459
1460static tree
1461emit_block_move_libcall_fn (int for_call)
1462{
1463 static bool emitted_extern;
1464
1465 if (!block_move_fn)
1466 init_block_move_fn (NULL);
1467
1468 if (for_call && !emitted_extern)
1469 {
1470 emitted_extern = true;
1471 make_decl_rtl (block_move_fn);
1472 assemble_external (block_move_fn);
1473 }
1474
1475 return block_move_fn;
1476}
1477
1478/* A subroutine of emit_block_move. Copy the data via an explicit
1479 loop. This is used only when libcalls are forbidden. */
1480/* ??? It'd be nice to copy in hunks larger than QImode. */
1481
1482static void
1483emit_block_move_via_loop (rtx x, rtx y, rtx size,
1484 unsigned int align ATTRIBUTE_UNUSED)
1485{
1486 rtx cmp_label, top_label, iter, x_addr, y_addr, tmp;
1487 enum machine_mode iter_mode;
1488
1489 iter_mode = GET_MODE (size);
1490 if (iter_mode == VOIDmode)
1491 iter_mode = word_mode;
1492
1493 top_label = gen_label_rtx ();
1494 cmp_label = gen_label_rtx ();
1495 iter = gen_reg_rtx (iter_mode);
1496
1497 emit_move_insn (iter, const0_rtx);
1498
1499 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1500 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1501 do_pending_stack_adjust ();
1502
1503 emit_jump (cmp_label);
1504 emit_label (top_label);
1505
1506 tmp = convert_modes (Pmode, iter_mode, iter, true);
1507 x_addr = gen_rtx_PLUS (Pmode, x_addr, tmp);
1508 y_addr = gen_rtx_PLUS (Pmode, y_addr, tmp);
1509 x = change_address (x, QImode, x_addr);
1510 y = change_address (y, QImode, y_addr);
1511
1512 emit_move_insn (x, y);
1513
1514 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1515 true, OPTAB_LIB_WIDEN);
1516 if (tmp != iter)
1517 emit_move_insn (iter, tmp);
1518
1519 emit_label (cmp_label);
1520
1521 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1522 true, top_label);
1523}
1524\f
1525/* Copy all or part of a value X into registers starting at REGNO.
1526 The number of registers to be filled is NREGS. */
1527
1528void
1529move_block_to_reg (int regno, rtx x, int nregs, enum machine_mode mode)
1530{
1531 int i;
1532#ifdef HAVE_load_multiple
1533 rtx pat;
1534 rtx last;
1535#endif
1536
1537 if (nregs == 0)
1538 return;
1539
1540 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
1541 x = validize_mem (force_const_mem (mode, x));
1542
1543 /* See if the machine can do this with a load multiple insn. */
1544#ifdef HAVE_load_multiple
1545 if (HAVE_load_multiple)
1546 {
1547 last = get_last_insn ();
1548 pat = gen_load_multiple (gen_rtx_REG (word_mode, regno), x,
1549 GEN_INT (nregs));
1550 if (pat)
1551 {
1552 emit_insn (pat);
1553 return;
1554 }
1555 else
1556 delete_insns_since (last);
1557 }
1558#endif
1559
1560 for (i = 0; i < nregs; i++)
1561 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
1562 operand_subword_force (x, i, mode));
1563}
1564
1565/* Copy all or part of a BLKmode value X out of registers starting at REGNO.
1566 The number of registers to be filled is NREGS. */
1567
1568void
1569move_block_from_reg (int regno, rtx x, int nregs)
1570{
1571 int i;
1572
1573 if (nregs == 0)
1574 return;
1575
1576 /* See if the machine can do this with a store multiple insn. */
1577#ifdef HAVE_store_multiple
1578 if (HAVE_store_multiple)
1579 {
1580 rtx last = get_last_insn ();
1581 rtx pat = gen_store_multiple (x, gen_rtx_REG (word_mode, regno),
1582 GEN_INT (nregs));
1583 if (pat)
1584 {
1585 emit_insn (pat);
1586 return;
1587 }
1588 else
1589 delete_insns_since (last);
1590 }
1591#endif
1592
1593 for (i = 0; i < nregs; i++)
1594 {
1595 rtx tem = operand_subword (x, i, 1, BLKmode);
1596
1597 gcc_assert (tem);
1598
1599 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
1600 }
1601}
1602
1603/* Generate a PARALLEL rtx for a new non-consecutive group of registers from
1604 ORIG, where ORIG is a non-consecutive group of registers represented by
1605 a PARALLEL. The clone is identical to the original except in that the
1606 original set of registers is replaced by a new set of pseudo registers.
1607 The new set has the same modes as the original set. */
1608
1609rtx
1610gen_group_rtx (rtx orig)
1611{
1612 int i, length;
1613 rtx *tmps;
1614
1615 gcc_assert (GET_CODE (orig) == PARALLEL);
1616
1617 length = XVECLEN (orig, 0);
1618 tmps = XALLOCAVEC (rtx, length);
1619
1620 /* Skip a NULL entry in first slot. */
1621 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
1622
1623 if (i)
1624 tmps[0] = 0;
1625
1626 for (; i < length; i++)
1627 {
1628 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
1629 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
1630
1631 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
1632 }
1633
1634 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
1635}
1636
1637/* A subroutine of emit_group_load. Arguments as for emit_group_load,
1638 except that values are placed in TMPS[i], and must later be moved
1639 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
1640
1641static void
1642emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
1643{
1644 rtx src;
1645 int start, i;
1646 enum machine_mode m = GET_MODE (orig_src);
1647
1648 gcc_assert (GET_CODE (dst) == PARALLEL);
1649
1650 if (m != VOIDmode
1651 && !SCALAR_INT_MODE_P (m)
1652 && !MEM_P (orig_src)
1653 && GET_CODE (orig_src) != CONCAT)
1654 {
1655 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_src));
1656 if (imode == BLKmode)
1657 src = assign_stack_temp (GET_MODE (orig_src), ssize, 0);
1658 else
1659 src = gen_reg_rtx (imode);
1660 if (imode != BLKmode)
1661 src = gen_lowpart (GET_MODE (orig_src), src);
1662 emit_move_insn (src, orig_src);
1663 /* ...and back again. */
1664 if (imode != BLKmode)
1665 src = gen_lowpart (imode, src);
1666 emit_group_load_1 (tmps, dst, src, type, ssize);
1667 return;
1668 }
1669
1670 /* Check for a NULL entry, used to indicate that the parameter goes
1671 both on the stack and in registers. */
1672 if (XEXP (XVECEXP (dst, 0, 0), 0))
1673 start = 0;
1674 else
1675 start = 1;
1676
1677 /* Process the pieces. */
1678 for (i = start; i < XVECLEN (dst, 0); i++)
1679 {
1680 enum machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
1681 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
1682 unsigned int bytelen = GET_MODE_SIZE (mode);
1683 int shift = 0;
1684
1685 /* Handle trailing fragments that run over the size of the struct. */
1686 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
1687 {
1688 /* Arrange to shift the fragment to where it belongs.
1689 extract_bit_field loads to the lsb of the reg. */
1690 if (
1691#ifdef BLOCK_REG_PADDING
1692 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
1693 == (BYTES_BIG_ENDIAN ? upward : downward)
1694#else
1695 BYTES_BIG_ENDIAN
1696#endif
1697 )
1698 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
1699 bytelen = ssize - bytepos;
1700 gcc_assert (bytelen > 0);
1701 }
1702
1703 /* If we won't be loading directly from memory, protect the real source
1704 from strange tricks we might play; but make sure that the source can
1705 be loaded directly into the destination. */
1706 src = orig_src;
1707 if (!MEM_P (orig_src)
1708 && (!CONSTANT_P (orig_src)
1709 || (GET_MODE (orig_src) != mode
1710 && GET_MODE (orig_src) != VOIDmode)))
1711 {
1712 if (GET_MODE (orig_src) == VOIDmode)
1713 src = gen_reg_rtx (mode);
1714 else
1715 src = gen_reg_rtx (GET_MODE (orig_src));
1716
1717 emit_move_insn (src, orig_src);
1718 }
1719
1720 /* Optimize the access just a bit. */
1721 if (MEM_P (src)
1722 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (src))
1723 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
1724 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
1725 && bytelen == GET_MODE_SIZE (mode))
1726 {
1727 tmps[i] = gen_reg_rtx (mode);
1728 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
1729 }
1730 else if (COMPLEX_MODE_P (mode)
1731 && GET_MODE (src) == mode
1732 && bytelen == GET_MODE_SIZE (mode))
1733 /* Let emit_move_complex do the bulk of the work. */
1734 tmps[i] = src;
1735 else if (GET_CODE (src) == CONCAT)
1736 {
1737 unsigned int slen = GET_MODE_SIZE (GET_MODE (src));
1738 unsigned int slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
1739
1740 if ((bytepos == 0 && bytelen == slen0)
1741 || (bytepos != 0 && bytepos + bytelen <= slen))
1742 {
1743 /* The following assumes that the concatenated objects all
1744 have the same size. In this case, a simple calculation
1745 can be used to determine the object and the bit field
1746 to be extracted. */
1747 tmps[i] = XEXP (src, bytepos / slen0);
1748 if (! CONSTANT_P (tmps[i])
1749 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
1750 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
1751 (bytepos % slen0) * BITS_PER_UNIT,
1752 1, NULL_RTX, mode, mode);
1753 }
1754 else
1755 {
1756 rtx mem;
1757
1758 gcc_assert (!bytepos);
1759 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1760 emit_move_insn (mem, src);
1761 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
1762 0, 1, NULL_RTX, mode, mode);
1763 }
1764 }
1765 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
1766 SIMD register, which is currently broken. While we get GCC
1767 to emit proper RTL for these cases, let's dump to memory. */
1768 else if (VECTOR_MODE_P (GET_MODE (dst))
1769 && REG_P (src))
1770 {
1771 int slen = GET_MODE_SIZE (GET_MODE (src));
1772 rtx mem;
1773
1774 mem = assign_stack_temp (GET_MODE (src), slen, 0);
1775 emit_move_insn (mem, src);
1776 tmps[i] = adjust_address (mem, mode, (int) bytepos);
1777 }
1778 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
1779 && XVECLEN (dst, 0) > 1)
1780 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE(dst), bytepos);
1781 else if (CONSTANT_P (src))
1782 {
1783 HOST_WIDE_INT len = (HOST_WIDE_INT) bytelen;
1784
1785 if (len == ssize)
1786 tmps[i] = src;
1787 else
1788 {
1789 rtx first, second;
1790
1791 gcc_assert (2 * len == ssize);
1792 split_double (src, &first, &second);
1793 if (i)
1794 tmps[i] = second;
1795 else
1796 tmps[i] = first;
1797 }
1798 }
1799 else if (REG_P (src) && GET_MODE (src) == mode)
1800 tmps[i] = src;
1801 else
1802 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
1803 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
1804 mode, mode);
1805
1806 if (shift)
1807 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
1808 build_int_cst (NULL_TREE, shift), tmps[i], 0);
1809 }
1810}
1811
1812/* Emit code to move a block SRC of type TYPE to a block DST,
1813 where DST is non-consecutive registers represented by a PARALLEL.
1814 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
1815 if not known. */
1816
1817void
1818emit_group_load (rtx dst, rtx src, tree type, int ssize)
1819{
1820 rtx *tmps;
1821 int i;
1822
1823 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
1824 emit_group_load_1 (tmps, dst, src, type, ssize);
1825
1826 /* Copy the extracted pieces into the proper (probable) hard regs. */
1827 for (i = 0; i < XVECLEN (dst, 0); i++)
1828 {
1829 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
1830 if (d == NULL)
1831 continue;
1832 emit_move_insn (d, tmps[i]);
1833 }
1834}
1835
1836/* Similar, but load SRC into new pseudos in a format that looks like
1837 PARALLEL. This can later be fed to emit_group_move to get things
1838 in the right place. */
1839
1840rtx
1841emit_group_load_into_temps (rtx parallel, rtx src, tree type, int ssize)
1842{
1843 rtvec vec;
1844 int i;
1845
1846 vec = rtvec_alloc (XVECLEN (parallel, 0));
1847 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
1848
1849 /* Convert the vector to look just like the original PARALLEL, except
1850 with the computed values. */
1851 for (i = 0; i < XVECLEN (parallel, 0); i++)
1852 {
1853 rtx e = XVECEXP (parallel, 0, i);
1854 rtx d = XEXP (e, 0);
1855
1856 if (d)
1857 {
1858 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
1859 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
1860 }
1861 RTVEC_ELT (vec, i) = e;
1862 }
1863
1864 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
1865}
1866
1867/* Emit code to move a block SRC to block DST, where SRC and DST are
1868 non-consecutive groups of registers, each represented by a PARALLEL. */
1869
1870void
1871emit_group_move (rtx dst, rtx src)
1872{
1873 int i;
1874
1875 gcc_assert (GET_CODE (src) == PARALLEL
1876 && GET_CODE (dst) == PARALLEL
1877 && XVECLEN (src, 0) == XVECLEN (dst, 0));
1878
1879 /* Skip first entry if NULL. */
1880 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
1881 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
1882 XEXP (XVECEXP (src, 0, i), 0));
1883}
1884
1885/* Move a group of registers represented by a PARALLEL into pseudos. */
1886
1887rtx
1888emit_group_move_into_temps (rtx src)
1889{
1890 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
1891 int i;
1892
1893 for (i = 0; i < XVECLEN (src, 0); i++)
1894 {
1895 rtx e = XVECEXP (src, 0, i);
1896 rtx d = XEXP (e, 0);
1897
1898 if (d)
1899 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
1900 RTVEC_ELT (vec, i) = e;
1901 }
1902
1903 return gen_rtx_PARALLEL (GET_MODE (src), vec);
1904}
1905
1906/* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
1907 where SRC is non-consecutive registers represented by a PARALLEL.
1908 SSIZE represents the total size of block ORIG_DST, or -1 if not
1909 known. */
1910
1911void
1912emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, int ssize)
1913{
1914 rtx *tmps, dst;
1915 int start, finish, i;
1916 enum machine_mode m = GET_MODE (orig_dst);
1917
1918 gcc_assert (GET_CODE (src) == PARALLEL);
1919
1920 if (!SCALAR_INT_MODE_P (m)
1921 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
1922 {
1923 enum machine_mode imode = int_mode_for_mode (GET_MODE (orig_dst));
1924 if (imode == BLKmode)
1925 dst = assign_stack_temp (GET_MODE (orig_dst), ssize, 0);
1926 else
1927 dst = gen_reg_rtx (imode);
1928 emit_group_store (dst, src, type, ssize);
1929 if (imode != BLKmode)
1930 dst = gen_lowpart (GET_MODE (orig_dst), dst);
1931 emit_move_insn (orig_dst, dst);
1932 return;
1933 }
1934
1935 /* Check for a NULL entry, used to indicate that the parameter goes
1936 both on the stack and in registers. */
1937 if (XEXP (XVECEXP (src, 0, 0), 0))
1938 start = 0;
1939 else
1940 start = 1;
1941 finish = XVECLEN (src, 0);
1942
1943 tmps = XALLOCAVEC (rtx, finish);
1944
1945 /* Copy the (probable) hard regs into pseudos. */
1946 for (i = start; i < finish; i++)
1947 {
1948 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
1949 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
1950 {
1951 tmps[i] = gen_reg_rtx (GET_MODE (reg));
1952 emit_move_insn (tmps[i], reg);
1953 }
1954 else
1955 tmps[i] = reg;
1956 }
1957
1958 /* If we won't be storing directly into memory, protect the real destination
1959 from strange tricks we might play. */
1960 dst = orig_dst;
1961 if (GET_CODE (dst) == PARALLEL)
1962 {
1963 rtx temp;
1964
1965 /* We can get a PARALLEL dst if there is a conditional expression in
1966 a return statement. In that case, the dst and src are the same,
1967 so no action is necessary. */
1968 if (rtx_equal_p (dst, src))
1969 return;
1970
1971 /* It is unclear if we can ever reach here, but we may as well handle
1972 it. Allocate a temporary, and split this into a store/load to/from
1973 the temporary. */
1974
1975 temp = assign_stack_temp (GET_MODE (dst), ssize, 0);
1976 emit_group_store (temp, src, type, ssize);
1977 emit_group_load (dst, temp, type, ssize);
1978 return;
1979 }
1980 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
1981 {
1982 enum machine_mode outer = GET_MODE (dst);
1983 enum machine_mode inner;
1984 HOST_WIDE_INT bytepos;
1985 bool done = false;
1986 rtx temp;
1987
1988 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1989 dst = gen_reg_rtx (outer);
1990
1991 /* Make life a bit easier for combine. */
1992 /* If the first element of the vector is the low part
1993 of the destination mode, use a paradoxical subreg to
1994 initialize the destination. */
1995 if (start < finish)
1996 {
1997 inner = GET_MODE (tmps[start]);
1998 bytepos = subreg_lowpart_offset (inner, outer);
1999 if (INTVAL (XEXP (XVECEXP (src, 0, start), 1)) == bytepos)
2000 {
2001 temp = simplify_gen_subreg (outer, tmps[start],
2002 inner, 0);
2003 if (temp)
2004 {
2005 emit_move_insn (dst, temp);
2006 done = true;
2007 start++;
2008 }
2009 }
2010 }
2011
2012 /* If the first element wasn't the low part, try the last. */
2013 if (!done
2014 && start < finish - 1)
2015 {
2016 inner = GET_MODE (tmps[finish - 1]);
2017 bytepos = subreg_lowpart_offset (inner, outer);
2018 if (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)) == bytepos)
2019 {
2020 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2021 inner, 0);
2022 if (temp)
2023 {
2024 emit_move_insn (dst, temp);
2025 done = true;
2026 finish--;
2027 }
2028 }
2029 }
2030
2031 /* Otherwise, simply initialize the result to zero. */
2032 if (!done)
2033 emit_move_insn (dst, CONST0_RTX (outer));
2034 }
2035
2036 /* Process the pieces. */
2037 for (i = start; i < finish; i++)
2038 {
2039 HOST_WIDE_INT bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2040 enum machine_mode mode = GET_MODE (tmps[i]);
2041 unsigned int bytelen = GET_MODE_SIZE (mode);
2042 unsigned int adj_bytelen = bytelen;
2043 rtx dest = dst;
2044
2045 /* Handle trailing fragments that run over the size of the struct. */
2046 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2047 adj_bytelen = ssize - bytepos;
2048
2049 if (GET_CODE (dst) == CONCAT)
2050 {
2051 if (bytepos + adj_bytelen
2052 <= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2053 dest = XEXP (dst, 0);
2054 else if (bytepos >= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))
2055 {
2056 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2057 dest = XEXP (dst, 1);
2058 }
2059 else
2060 {
2061 enum machine_mode dest_mode = GET_MODE (dest);
2062 enum machine_mode tmp_mode = GET_MODE (tmps[i]);
2063
2064 gcc_assert (bytepos == 0 && XVECLEN (src, 0));
2065
2066 if (GET_MODE_ALIGNMENT (dest_mode)
2067 >= GET_MODE_ALIGNMENT (tmp_mode))
2068 {
2069 dest = assign_stack_temp (dest_mode,
2070 GET_MODE_SIZE (dest_mode),
2071 0);
2072 emit_move_insn (adjust_address (dest,
2073 tmp_mode,
2074 bytepos),
2075 tmps[i]);
2076 dst = dest;
2077 }
2078 else
2079 {
2080 dest = assign_stack_temp (tmp_mode,
2081 GET_MODE_SIZE (tmp_mode),
2082 0);
2083 emit_move_insn (dest, tmps[i]);
2084 dst = adjust_address (dest, dest_mode, bytepos);
2085 }
2086 break;
2087 }
2088 }
2089
2090 if (ssize >= 0 && bytepos + (HOST_WIDE_INT) bytelen > ssize)
2091 {
2092 /* store_bit_field always takes its value from the lsb.
2093 Move the fragment to the lsb if it's not already there. */
2094 if (
2095#ifdef BLOCK_REG_PADDING
2096 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2097 == (BYTES_BIG_ENDIAN ? upward : downward)
2098#else
2099 BYTES_BIG_ENDIAN
2100#endif
2101 )
2102 {
2103 int shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2104 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2105 build_int_cst (NULL_TREE, shift),
2106 tmps[i], 0);
2107 }
2108 bytelen = adj_bytelen;
2109 }
2110
2111 /* Optimize the access just a bit. */
2112 if (MEM_P (dest)
2113 && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (dest))
2114 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2115 && bytepos * BITS_PER_UNIT % GET_MODE_ALIGNMENT (mode) == 0
2116 && bytelen == GET_MODE_SIZE (mode))
2117 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2118 else
2119 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2120 mode, tmps[i]);
2121 }
2122
2123 /* Copy from the pseudo into the (probable) hard reg. */
2124 if (orig_dst != dst)
2125 emit_move_insn (orig_dst, dst);
2126}
2127
2128/* Generate code to copy a BLKmode object of TYPE out of a
2129 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2130 is null, a stack temporary is created. TGTBLK is returned.
2131
2132 The purpose of this routine is to handle functions that return
2133 BLKmode structures in registers. Some machines (the PA for example)
2134 want to return all small structures in registers regardless of the
2135 structure's alignment. */
2136
2137rtx
2138copy_blkmode_from_reg (rtx tgtblk, rtx srcreg, tree type)
2139{
2140 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2141 rtx src = NULL, dst = NULL;
2142 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2143 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2144 enum machine_mode copy_mode;
2145
2146 if (tgtblk == 0)
2147 {
2148 tgtblk = assign_temp (build_qualified_type (type,
2149 (TYPE_QUALS (type)
2150 | TYPE_QUAL_CONST)),
2151 0, 1, 1);
2152 preserve_temp_slots (tgtblk);
2153 }
2154
2155 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2156 into a new pseudo which is a full word. */
2157
2158 if (GET_MODE (srcreg) != BLKmode
2159 && GET_MODE_SIZE (GET_MODE (srcreg)) < UNITS_PER_WORD)
2160 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2161
2162 /* If the structure doesn't take up a whole number of words, see whether
2163 SRCREG is padded on the left or on the right. If it's on the left,
2164 set PADDING_CORRECTION to the number of bits to skip.
2165
2166 In most ABIs, the structure will be returned at the least end of
2167 the register, which translates to right padding on little-endian
2168 targets and left padding on big-endian targets. The opposite
2169 holds if the structure is returned at the most significant
2170 end of the register. */
2171 if (bytes % UNITS_PER_WORD != 0
2172 && (targetm.calls.return_in_msb (type)
2173 ? !BYTES_BIG_ENDIAN
2174 : BYTES_BIG_ENDIAN))
2175 padding_correction
2176 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2177
2178 /* Copy the structure BITSIZE bits at a time. If the target lives in
2179 memory, take care of not reading/writing past its end by selecting
2180 a copy mode suited to BITSIZE. This should always be possible given
2181 how it is computed.
2182
2183 We could probably emit more efficient code for machines which do not use
2184 strict alignment, but it doesn't seem worth the effort at the current
2185 time. */
2186
2187 copy_mode = word_mode;
2188 if (MEM_P (tgtblk))
2189 {
2190 enum machine_mode mem_mode = mode_for_size (bitsize, MODE_INT, 1);
2191 if (mem_mode != BLKmode)
2192 copy_mode = mem_mode;
2193 }
2194
2195 for (bitpos = 0, xbitpos = padding_correction;
2196 bitpos < bytes * BITS_PER_UNIT;
2197 bitpos += bitsize, xbitpos += bitsize)
2198 {
2199 /* We need a new source operand each time xbitpos is on a
2200 word boundary and when xbitpos == padding_correction
2201 (the first time through). */
2202 if (xbitpos % BITS_PER_WORD == 0
2203 || xbitpos == padding_correction)
2204 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD,
2205 GET_MODE (srcreg));
2206
2207 /* We need a new destination operand each time bitpos is on
2208 a word boundary. */
2209 if (bitpos % BITS_PER_WORD == 0)
2210 dst = operand_subword (tgtblk, bitpos / BITS_PER_WORD, 1, BLKmode);
2211
2212 /* Use xbitpos for the source extraction (right justified) and
2213 bitpos for the destination store (left justified). */
2214 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
2215 extract_bit_field (src, bitsize,
2216 xbitpos % BITS_PER_WORD, 1,
2217 NULL_RTX, copy_mode, copy_mode));
2218 }
2219
2220 return tgtblk;
2221}
2222
2223/* Add a USE expression for REG to the (possibly empty) list pointed
2224 to by CALL_FUSAGE. REG must denote a hard register. */
2225
2226void
2227use_reg (rtx *call_fusage, rtx reg)
2228{
2229 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2230
2231 *call_fusage
2232 = gen_rtx_EXPR_LIST (VOIDmode,
2233 gen_rtx_USE (VOIDmode, reg), *call_fusage);
2234}
2235
2236/* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2237 starting at REGNO. All of these registers must be hard registers. */
2238
2239void
2240use_regs (rtx *call_fusage, int regno, int nregs)
2241{
2242 int i;
2243
2244 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2245
2246 for (i = 0; i < nregs; i++)
2247 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2248}
2249
2250/* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2251 PARALLEL REGS. This is for calls that pass values in multiple
2252 non-contiguous locations. The Irix 6 ABI has examples of this. */
2253
2254void
2255use_group_regs (rtx *call_fusage, rtx regs)
2256{
2257 int i;
2258
2259 for (i = 0; i < XVECLEN (regs, 0); i++)
2260 {
2261 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2262
2263 /* A NULL entry means the parameter goes both on the stack and in
2264 registers. This can also be a MEM for targets that pass values
2265 partially on the stack and partially in registers. */
2266 if (reg != 0 && REG_P (reg))
2267 use_reg (call_fusage, reg);
2268 }
2269}
2270\f
2271
2272/* Determine whether the LEN bytes generated by CONSTFUN can be
2273 stored to memory using several move instructions. CONSTFUNDATA is
2274 a pointer which will be passed as argument in every CONSTFUN call.
2275 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2276 a memset operation and false if it's a copy of a constant string.
2277 Return nonzero if a call to store_by_pieces should succeed. */
2278
2279int
2280can_store_by_pieces (unsigned HOST_WIDE_INT len,
2281 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2282 void *constfundata, unsigned int align, bool memsetp)
2283{
2284 unsigned HOST_WIDE_INT l;
2285 unsigned int max_size;
2286 HOST_WIDE_INT offset = 0;
2287 enum machine_mode mode, tmode;
2288 enum insn_code icode;
2289 int reverse;
2290 rtx cst;
2291
2292 if (len == 0)
2293 return 1;
2294
2295 if (! (memsetp
2296 ? SET_BY_PIECES_P (len, align)
2297 : STORE_BY_PIECES_P (len, align)))
2298 return 0;
2299
2300 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2301 if (align >= GET_MODE_ALIGNMENT (tmode))
2302 align = GET_MODE_ALIGNMENT (tmode);
2303 else
2304 {
2305 enum machine_mode xmode;
2306
2307 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2308 tmode != VOIDmode;
2309 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2310 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2311 || SLOW_UNALIGNED_ACCESS (tmode, align))
2312 break;
2313
2314 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2315 }
2316
2317 /* We would first store what we can in the largest integer mode, then go to
2318 successively smaller modes. */
2319
2320 for (reverse = 0;
2321 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
2322 reverse++)
2323 {
2324 l = len;
2325 mode = VOIDmode;
2326 max_size = STORE_MAX_PIECES + 1;
2327 while (max_size > 1)
2328 {
2329 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2330 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2331 if (GET_MODE_SIZE (tmode) < max_size)
2332 mode = tmode;
2333
2334 if (mode == VOIDmode)
2335 break;
2336
2337 icode = optab_handler (mov_optab, mode)->insn_code;
2338 if (icode != CODE_FOR_nothing
2339 && align >= GET_MODE_ALIGNMENT (mode))
2340 {
2341 unsigned int size = GET_MODE_SIZE (mode);
2342
2343 while (l >= size)
2344 {
2345 if (reverse)
2346 offset -= size;
2347
2348 cst = (*constfun) (constfundata, offset, mode);
2349 if (!LEGITIMATE_CONSTANT_P (cst))
2350 return 0;
2351
2352 if (!reverse)
2353 offset += size;
2354
2355 l -= size;
2356 }
2357 }
2358
2359 max_size = GET_MODE_SIZE (mode);
2360 }
2361
2362 /* The code above should have handled everything. */
2363 gcc_assert (!l);
2364 }
2365
2366 return 1;
2367}
2368
2369/* Generate several move instructions to store LEN bytes generated by
2370 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
2371 pointer which will be passed as argument in every CONSTFUN call.
2372 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
2373 a memset operation and false if it's a copy of a constant string.
2374 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
2375 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
2376 stpcpy. */
2377
2378rtx
2379store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
2380 rtx (*constfun) (void *, HOST_WIDE_INT, enum machine_mode),
2381 void *constfundata, unsigned int align, bool memsetp, int endp)
2382{
2383 struct store_by_pieces data;
2384
2385 if (len == 0)
2386 {
2387 gcc_assert (endp != 2);
2388 return to;
2389 }
2390
2391 gcc_assert (memsetp
2392 ? SET_BY_PIECES_P (len, align)
2393 : STORE_BY_PIECES_P (len, align));
2394 data.constfun = constfun;
2395 data.constfundata = constfundata;
2396 data.len = len;
2397 data.to = to;
2398 store_by_pieces_1 (&data, align);
2399 if (endp)
2400 {
2401 rtx to1;
2402
2403 gcc_assert (!data.reverse);
2404 if (data.autinc_to)
2405 {
2406 if (endp == 2)
2407 {
2408 if (HAVE_POST_INCREMENT && data.explicit_inc_to > 0)
2409 emit_insn (gen_add2_insn (data.to_addr, constm1_rtx));
2410 else
2411 data.to_addr = copy_addr_to_reg (plus_constant (data.to_addr,
2412 -1));
2413 }
2414 to1 = adjust_automodify_address (data.to, QImode, data.to_addr,
2415 data.offset);
2416 }
2417 else
2418 {
2419 if (endp == 2)
2420 --data.offset;
2421 to1 = adjust_address (data.to, QImode, data.offset);
2422 }
2423 return to1;
2424 }
2425 else
2426 return data.to;
2427}
2428
2429/* Generate several move instructions to clear LEN bytes of block TO. (A MEM
2430 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2431
2432static void
2433clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
2434{
2435 struct store_by_pieces data;
2436
2437 if (len == 0)
2438 return;
2439
2440 data.constfun = clear_by_pieces_1;
2441 data.constfundata = NULL;
2442 data.len = len;
2443 data.to = to;
2444 store_by_pieces_1 (&data, align);
2445}
2446
2447/* Callback routine for clear_by_pieces.
2448 Return const0_rtx unconditionally. */
2449
2450static rtx
2451clear_by_pieces_1 (void *data ATTRIBUTE_UNUSED,
2452 HOST_WIDE_INT offset ATTRIBUTE_UNUSED,
2453 enum machine_mode mode ATTRIBUTE_UNUSED)
2454{
2455 return const0_rtx;
2456}
2457
2458/* Subroutine of clear_by_pieces and store_by_pieces.
2459 Generate several move instructions to store LEN bytes of block TO. (A MEM
2460 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
2461
2462static void
2463store_by_pieces_1 (struct store_by_pieces *data ATTRIBUTE_UNUSED,
2464 unsigned int align ATTRIBUTE_UNUSED)
2465{
2466 rtx to_addr = XEXP (data->to, 0);
2467 unsigned int max_size = STORE_MAX_PIECES + 1;
2468 enum machine_mode mode = VOIDmode, tmode;
2469 enum insn_code icode;
2470
2471 data->offset = 0;
2472 data->to_addr = to_addr;
2473 data->autinc_to
2474 = (GET_CODE (to_addr) == PRE_INC || GET_CODE (to_addr) == PRE_DEC
2475 || GET_CODE (to_addr) == POST_INC || GET_CODE (to_addr) == POST_DEC);
2476
2477 data->explicit_inc_to = 0;
2478 data->reverse
2479 = (GET_CODE (to_addr) == PRE_DEC || GET_CODE (to_addr) == POST_DEC);
2480 if (data->reverse)
2481 data->offset = data->len;
2482
2483 /* If storing requires more than two move insns,
2484 copy addresses to registers (to make displacements shorter)
2485 and use post-increment if available. */
2486 if (!data->autinc_to
2487 && move_by_pieces_ninsns (data->len, align, max_size) > 2)
2488 {
2489 /* Determine the main mode we'll be using. */
2490 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2491 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2492 if (GET_MODE_SIZE (tmode) < max_size)
2493 mode = tmode;
2494
2495 if (USE_STORE_PRE_DECREMENT (mode) && data->reverse && ! data->autinc_to)
2496 {
2497 data->to_addr = copy_addr_to_reg (plus_constant (to_addr, data->len));
2498 data->autinc_to = 1;
2499 data->explicit_inc_to = -1;
2500 }
2501
2502 if (USE_STORE_POST_INCREMENT (mode) && ! data->reverse
2503 && ! data->autinc_to)
2504 {
2505 data->to_addr = copy_addr_to_reg (to_addr);
2506 data->autinc_to = 1;
2507 data->explicit_inc_to = 1;
2508 }
2509
2510 if ( !data->autinc_to && CONSTANT_P (to_addr))
2511 data->to_addr = copy_addr_to_reg (to_addr);
2512 }
2513
2514 tmode = mode_for_size (STORE_MAX_PIECES * BITS_PER_UNIT, MODE_INT, 1);
2515 if (align >= GET_MODE_ALIGNMENT (tmode))
2516 align = GET_MODE_ALIGNMENT (tmode);
2517 else
2518 {
2519 enum machine_mode xmode;
2520
2521 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT), xmode = tmode;
2522 tmode != VOIDmode;
2523 xmode = tmode, tmode = GET_MODE_WIDER_MODE (tmode))
2524 if (GET_MODE_SIZE (tmode) > STORE_MAX_PIECES
2525 || SLOW_UNALIGNED_ACCESS (tmode, align))
2526 break;
2527
2528 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
2529 }
2530
2531 /* First store what we can in the largest integer mode, then go to
2532 successively smaller modes. */
2533
2534 while (max_size > 1)
2535 {
2536 for (tmode = GET_CLASS_NARROWEST_MODE (MODE_INT);
2537 tmode != VOIDmode; tmode = GET_MODE_WIDER_MODE (tmode))
2538 if (GET_MODE_SIZE (tmode) < max_size)
2539 mode = tmode;
2540
2541 if (mode == VOIDmode)
2542 break;
2543
2544 icode = optab_handler (mov_optab, mode)->insn_code;
2545 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
2546 store_by_pieces_2 (GEN_FCN (icode), mode, data);
2547
2548 max_size = GET_MODE_SIZE (mode);
2549 }
2550
2551 /* The code above should have handled everything. */
2552 gcc_assert (!data->len);
2553}
2554
2555/* Subroutine of store_by_pieces_1. Store as many bytes as appropriate
2556 with move instructions for mode MODE. GENFUN is the gen_... function
2557 to make a move insn for that mode. DATA has all the other info. */
2558
2559static void
2560store_by_pieces_2 (rtx (*genfun) (rtx, ...), enum machine_mode mode,
2561 struct store_by_pieces *data)
2562{
2563 unsigned int size = GET_MODE_SIZE (mode);
2564 rtx to1, cst;
2565
2566 while (data->len >= size)
2567 {
2568 if (data->reverse)
2569 data->offset -= size;
2570
2571 if (data->autinc_to)
2572 to1 = adjust_automodify_address (data->to, mode, data->to_addr,
2573 data->offset);
2574 else
2575 to1 = adjust_address (data->to, mode, data->offset);
2576
2577 if (HAVE_PRE_DECREMENT && data->explicit_inc_to < 0)
2578 emit_insn (gen_add2_insn (data->to_addr,
2579 GEN_INT (-(HOST_WIDE_INT) size)));
2580
2581 cst = (*data->constfun) (data->constfundata, data->offset, mode);
2582 emit_insn ((*genfun) (to1, cst));
2583
2584 if (HAVE_POST_INCREMENT && data->explicit_inc_to > 0)
2585 emit_insn (gen_add2_insn (data->to_addr, GEN_INT (size)));
2586
2587 if (! data->reverse)
2588 data->offset += size;
2589
2590 data->len -= size;
2591 }
2592}
2593\f
2594/* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2595 its length in bytes. */
2596
2597rtx
2598clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2599 unsigned int expected_align, HOST_WIDE_INT expected_size)
2600{
2601 enum machine_mode mode = GET_MODE (object);
2602 unsigned int align;
2603
2604 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2605
2606 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2607 just move a zero. Otherwise, do this a piece at a time. */
2608 if (mode != BLKmode
2609 && GET_CODE (size) == CONST_INT
2610 && INTVAL (size) == (HOST_WIDE_INT) GET_MODE_SIZE (mode))
2611 {
2612 rtx zero = CONST0_RTX (mode);
2613 if (zero != NULL)
2614 {
2615 emit_move_insn (object, zero);
2616 return NULL;
2617 }
2618
2619 if (COMPLEX_MODE_P (mode))
2620 {
2621 zero = CONST0_RTX (GET_MODE_INNER (mode));
2622 if (zero != NULL)
2623 {
2624 write_complex_part (object, zero, 0);
2625 write_complex_part (object, zero, 1);
2626 return NULL;
2627 }
2628 }
2629 }
2630
2631 if (size == const0_rtx)
2632 return NULL;
2633
2634 align = MEM_ALIGN (object);
2635
2636 if (GET_CODE (size) == CONST_INT
2637 && CLEAR_BY_PIECES_P (INTVAL (size), align))
2638 clear_by_pieces (object, INTVAL (size), align);
2639 else if (set_storage_via_setmem (object, size, const0_rtx, align,
2640 expected_align, expected_size))
2641 ;
2642 else
2643 return set_storage_via_libcall (object, size, const0_rtx,
2644 method == BLOCK_OP_TAILCALL);
2645
2646 return NULL;
2647}
2648
2649rtx
2650clear_storage (rtx object, rtx size, enum block_op_methods method)
2651{
2652 return clear_storage_hints (object, size, method, 0, -1);
2653}
2654
2655
2656/* A subroutine of clear_storage. Expand a call to memset.
2657 Return the return value of memset, 0 otherwise. */
2658
2659rtx
2660set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
2661{
2662 tree call_expr, fn, object_tree, size_tree, val_tree;
2663 enum machine_mode size_mode;
2664 rtx retval;
2665
2666 /* Emit code to copy OBJECT and SIZE into new pseudos. We can then
2667 place those into new pseudos into a VAR_DECL and use them later. */
2668
2669 object = copy_to_mode_reg (Pmode, XEXP (object, 0));
2670
2671 size_mode = TYPE_MODE (sizetype);
2672 size = convert_to_mode (size_mode, size, 1);
2673 size = copy_to_mode_reg (size_mode, size);
2674
2675 /* It is incorrect to use the libcall calling conventions to call
2676 memset in this context. This could be a user call to memset and
2677 the user may wish to examine the return value from memset. For
2678 targets where libcalls and normal calls have different conventions
2679 for returning pointers, we could end up generating incorrect code. */
2680
2681 object_tree = make_tree (ptr_type_node, object);
2682 if (GET_CODE (val) != CONST_INT)
2683 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
2684 size_tree = make_tree (sizetype, size);
2685 val_tree = make_tree (integer_type_node, val);
2686
2687 fn = clear_storage_libcall_fn (true);
2688 call_expr = build_call_expr (fn, 3,
2689 object_tree, integer_zero_node, size_tree);
2690 CALL_EXPR_TAILCALL (call_expr) = tailcall;
2691
2692 retval = expand_normal (call_expr);
2693
2694 return retval;
2695}
2696
2697/* A subroutine of set_storage_via_libcall. Create the tree node
2698 for the function we use for block clears. The first time FOR_CALL
2699 is true, we call assemble_external. */
2700
2701tree block_clear_fn;
2702
2703void
2704init_block_clear_fn (const char *asmspec)
2705{
2706 if (!block_clear_fn)
2707 {
2708 tree fn, args;
2709
2710 fn = get_identifier ("memset");
2711 args = build_function_type_list (ptr_type_node, ptr_type_node,
2712 integer_type_node, sizetype,
2713 NULL_TREE);
2714
2715 fn = build_decl (FUNCTION_DECL, fn, args);
2716 DECL_EXTERNAL (fn) = 1;
2717 TREE_PUBLIC (fn) = 1;
2718 DECL_ARTIFICIAL (fn) = 1;
2719 TREE_NOTHROW (fn) = 1;
2720 DECL_VISIBILITY (fn) = VISIBILITY_DEFAULT;
2721 DECL_VISIBILITY_SPECIFIED (fn) = 1;
2722
2723 block_clear_fn = fn;
2724 }
2725
2726 if (asmspec)
2727 set_user_assembler_name (block_clear_fn, asmspec);
2728}
2729
2730static tree
2731clear_storage_libcall_fn (int for_call)
2732{
2733 static bool emitted_extern;
2734
2735 if (!block_clear_fn)
2736 init_block_clear_fn (NULL);
2737
2738 if (for_call && !emitted_extern)
2739 {
2740 emitted_extern = true;
2741 make_decl_rtl (block_clear_fn);
2742 assemble_external (block_clear_fn);
2743 }
2744
2745 return block_clear_fn;
2746}
2747\f
2748/* Expand a setmem pattern; return true if successful. */
2749
2750bool
2751set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
2752 unsigned int expected_align, HOST_WIDE_INT expected_size)
2753{
2754 /* Try the most limited insn first, because there's no point
2755 including more than one in the machine description unless
2756 the more limited one has some advantage. */
2757
2758 rtx opalign = GEN_INT (align / BITS_PER_UNIT);
2759 enum machine_mode mode;
2760
2761 if (expected_align < align)
2762 expected_align = align;
2763
2764 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
2765 mode = GET_MODE_WIDER_MODE (mode))
2766 {
2767 enum insn_code code = setmem_optab[(int) mode];
2768 insn_operand_predicate_fn pred;
2769
2770 if (code != CODE_FOR_nothing
2771 /* We don't need MODE to be narrower than
2772 BITS_PER_HOST_WIDE_INT here because if SIZE is less than
2773 the mode mask, as it is returned by the macro, it will
2774 definitely be less than the actual mode mask. */
2775 && ((GET_CODE (size) == CONST_INT
2776 && ((unsigned HOST_WIDE_INT) INTVAL (size)
2777 <= (GET_MODE_MASK (mode) >> 1)))
2778 || GET_MODE_BITSIZE (mode) >= BITS_PER_WORD)
2779 && ((pred = insn_data[(int) code].operand[0].predicate) == 0
2780 || (*pred) (object, BLKmode))
2781 && ((pred = insn_data[(int) code].operand[3].predicate) == 0
2782 || (*pred) (opalign, VOIDmode)))
2783 {
2784 rtx opsize, opchar;
2785 enum machine_mode char_mode;
2786 rtx last = get_last_insn ();
2787 rtx pat;
2788
2789 opsize = convert_to_mode (mode, size, 1);
2790 pred = insn_data[(int) code].operand[1].predicate;
2791 if (pred != 0 && ! (*pred) (opsize, mode))
2792 opsize = copy_to_mode_reg (mode, opsize);
2793
2794 opchar = val;
2795 char_mode = insn_data[(int) code].operand[2].mode;
2796 if (char_mode != VOIDmode)
2797 {
2798 opchar = convert_to_mode (char_mode, opchar, 1);
2799 pred = insn_data[(int) code].operand[2].predicate;
2800 if (pred != 0 && ! (*pred) (opchar, char_mode))
2801 opchar = copy_to_mode_reg (char_mode, opchar);
2802 }
2803
2804 if (insn_data[(int) code].n_operands == 4)
2805 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign);
2806 else
2807 pat = GEN_FCN ((int) code) (object, opsize, opchar, opalign,
2808 GEN_INT (expected_align
2809 / BITS_PER_UNIT),
2810 GEN_INT (expected_size));
2811 if (pat)
2812 {
2813 emit_insn (pat);
2814 return true;
2815 }
2816 else
2817 delete_insns_since (last);
2818 }
2819 }
2820
2821 return false;
2822}
2823
2824\f
2825/* Write to one of the components of the complex value CPLX. Write VAL to
2826 the real part if IMAG_P is false, and the imaginary part if its true. */
2827
2828static void
2829write_complex_part (rtx cplx, rtx val, bool imag_p)
2830{
2831 enum machine_mode cmode;
2832 enum machine_mode imode;
2833 unsigned ibitsize;
2834
2835 if (GET_CODE (cplx) == CONCAT)
2836 {
2837 emit_move_insn (XEXP (cplx, imag_p), val);
2838 return;
2839 }
2840
2841 cmode = GET_MODE (cplx);
2842 imode = GET_MODE_INNER (cmode);
2843 ibitsize = GET_MODE_BITSIZE (imode);
2844
2845 /* For MEMs simplify_gen_subreg may generate an invalid new address
2846 because, e.g., the original address is considered mode-dependent
2847 by the target, which restricts simplify_subreg from invoking
2848 adjust_address_nv. Instead of preparing fallback support for an
2849 invalid address, we call adjust_address_nv directly. */
2850 if (MEM_P (cplx))
2851 {
2852 emit_move_insn (adjust_address_nv (cplx, imode,
2853 imag_p ? GET_MODE_SIZE (imode) : 0),
2854 val);
2855 return;
2856 }
2857
2858 /* If the sub-object is at least word sized, then we know that subregging
2859 will work. This special case is important, since store_bit_field
2860 wants to operate on integer modes, and there's rarely an OImode to
2861 correspond to TCmode. */
2862 if (ibitsize >= BITS_PER_WORD
2863 /* For hard regs we have exact predicates. Assume we can split
2864 the original object if it spans an even number of hard regs.
2865 This special case is important for SCmode on 64-bit platforms
2866 where the natural size of floating-point regs is 32-bit. */
2867 || (REG_P (cplx)
2868 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2869 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2870 {
2871 rtx part = simplify_gen_subreg (imode, cplx, cmode,
2872 imag_p ? GET_MODE_SIZE (imode) : 0);
2873 if (part)
2874 {
2875 emit_move_insn (part, val);
2876 return;
2877 }
2878 else
2879 /* simplify_gen_subreg may fail for sub-word MEMs. */
2880 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2881 }
2882
2883 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, imode, val);
2884}
2885
2886/* Extract one of the components of the complex value CPLX. Extract the
2887 real part if IMAG_P is false, and the imaginary part if it's true. */
2888
2889static rtx
2890read_complex_part (rtx cplx, bool imag_p)
2891{
2892 enum machine_mode cmode, imode;
2893 unsigned ibitsize;
2894
2895 if (GET_CODE (cplx) == CONCAT)
2896 return XEXP (cplx, imag_p);
2897
2898 cmode = GET_MODE (cplx);
2899 imode = GET_MODE_INNER (cmode);
2900 ibitsize = GET_MODE_BITSIZE (imode);
2901
2902 /* Special case reads from complex constants that got spilled to memory. */
2903 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
2904 {
2905 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
2906 if (decl && TREE_CODE (decl) == COMPLEX_CST)
2907 {
2908 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
2909 if (CONSTANT_CLASS_P (part))
2910 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
2911 }
2912 }
2913
2914 /* For MEMs simplify_gen_subreg may generate an invalid new address
2915 because, e.g., the original address is considered mode-dependent
2916 by the target, which restricts simplify_subreg from invoking
2917 adjust_address_nv. Instead of preparing fallback support for an
2918 invalid address, we call adjust_address_nv directly. */
2919 if (MEM_P (cplx))
2920 return adjust_address_nv (cplx, imode,
2921 imag_p ? GET_MODE_SIZE (imode) : 0);
2922
2923 /* If the sub-object is at least word sized, then we know that subregging
2924 will work. This special case is important, since extract_bit_field
2925 wants to operate on integer modes, and there's rarely an OImode to
2926 correspond to TCmode. */
2927 if (ibitsize >= BITS_PER_WORD
2928 /* For hard regs we have exact predicates. Assume we can split
2929 the original object if it spans an even number of hard regs.
2930 This special case is important for SCmode on 64-bit platforms
2931 where the natural size of floating-point regs is 32-bit. */
2932 || (REG_P (cplx)
2933 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
2934 && hard_regno_nregs[REGNO (cplx)][cmode] % 2 == 0))
2935 {
2936 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
2937 imag_p ? GET_MODE_SIZE (imode) : 0);
2938 if (ret)
2939 return ret;
2940 else
2941 /* simplify_gen_subreg may fail for sub-word MEMs. */
2942 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
2943 }
2944
2945 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
2946 true, NULL_RTX, imode, imode);
2947}
2948\f
2949/* A subroutine of emit_move_insn_1. Yet another lowpart generator.
2950 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
2951 represented in NEW_MODE. If FORCE is true, this will never happen, as
2952 we'll force-create a SUBREG if needed. */
2953
2954static rtx
2955emit_move_change_mode (enum machine_mode new_mode,
2956 enum machine_mode old_mode, rtx x, bool force)
2957{
2958 rtx ret;
2959
2960 if (push_operand (x, GET_MODE (x)))
2961 {
2962 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
2963 MEM_COPY_ATTRIBUTES (ret, x);
2964 }
2965 else if (MEM_P (x))
2966 {
2967 /* We don't have to worry about changing the address since the
2968 size in bytes is supposed to be the same. */
2969 if (reload_in_progress)
2970 {
2971 /* Copy the MEM to change the mode and move any
2972 substitutions from the old MEM to the new one. */
2973 ret = adjust_address_nv (x, new_mode, 0);
2974 copy_replacements (x, ret);
2975 }
2976 else
2977 ret = adjust_address (x, new_mode, 0);
2978 }
2979 else
2980 {
2981 /* Note that we do want simplify_subreg's behavior of validating
2982 that the new mode is ok for a hard register. If we were to use
2983 simplify_gen_subreg, we would create the subreg, but would
2984 probably run into the target not being able to implement it. */
2985 /* Except, of course, when FORCE is true, when this is exactly what
2986 we want. Which is needed for CCmodes on some targets. */
2987 if (force)
2988 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
2989 else
2990 ret = simplify_subreg (new_mode, x, old_mode, 0);
2991 }
2992
2993 return ret;
2994}
2995
2996/* A subroutine of emit_move_insn_1. Generate a move from Y into X using
2997 an integer mode of the same size as MODE. Returns the instruction
2998 emitted, or NULL if such a move could not be generated. */
2999
3000static rtx
3001emit_move_via_integer (enum machine_mode mode, rtx x, rtx y, bool force)
3002{
3003 enum machine_mode imode;
3004 enum insn_code code;
3005
3006 /* There must exist a mode of the exact size we require. */
3007 imode = int_mode_for_mode (mode);
3008 if (imode == BLKmode)
3009 return NULL_RTX;
3010
3011 /* The target must support moves in this mode. */
3012 code = optab_handler (mov_optab, imode)->insn_code;
3013 if (code == CODE_FOR_nothing)
3014 return NULL_RTX;
3015
3016 x = emit_move_change_mode (imode, mode, x, force);
3017 if (x == NULL_RTX)
3018 return NULL_RTX;
3019 y = emit_move_change_mode (imode, mode, y, force);
3020 if (y == NULL_RTX)
3021 return NULL_RTX;
3022 return emit_insn (GEN_FCN (code) (x, y));
3023}
3024
3025/* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3026 Return an equivalent MEM that does not use an auto-increment. */
3027
3028static rtx
3029emit_move_resolve_push (enum machine_mode mode, rtx x)
3030{
3031 enum rtx_code code = GET_CODE (XEXP (x, 0));
3032 HOST_WIDE_INT adjust;
3033 rtx temp;
3034
3035 adjust = GET_MODE_SIZE (mode);
3036#ifdef PUSH_ROUNDING
3037 adjust = PUSH_ROUNDING (adjust);
3038#endif
3039 if (code == PRE_DEC || code == POST_DEC)
3040 adjust = -adjust;
3041 else if (code == PRE_MODIFY || code == POST_MODIFY)
3042 {
3043 rtx expr = XEXP (XEXP (x, 0), 1);
3044 HOST_WIDE_INT val;
3045
3046 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3047 gcc_assert (GET_CODE (XEXP (expr, 1)) == CONST_INT);
3048 val = INTVAL (XEXP (expr, 1));
3049 if (GET_CODE (expr) == MINUS)
3050 val = -val;
3051 gcc_assert (adjust == val || adjust == -val);
3052 adjust = val;
3053 }
3054
3055 /* Do not use anti_adjust_stack, since we don't want to update
3056 stack_pointer_delta. */
3057 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3058 GEN_INT (adjust), stack_pointer_rtx,
3059 0, OPTAB_LIB_WIDEN);
3060 if (temp != stack_pointer_rtx)
3061 emit_move_insn (stack_pointer_rtx, temp);
3062
3063 switch (code)
3064 {
3065 case PRE_INC:
3066 case PRE_DEC:
3067 case PRE_MODIFY:
3068 temp = stack_pointer_rtx;
3069 break;
3070 case POST_INC:
3071 case POST_DEC:
3072 case POST_MODIFY:
3073 temp = plus_constant (stack_pointer_rtx, -adjust);
3074 break;
3075 default:
3076 gcc_unreachable ();
3077 }
3078
3079 return replace_equiv_address (x, temp);
3080}
3081
3082/* A subroutine of emit_move_complex. Generate a move from Y into X.
3083 X is known to satisfy push_operand, and MODE is known to be complex.
3084 Returns the last instruction emitted. */
3085
3086rtx
3087emit_move_complex_push (enum machine_mode mode, rtx x, rtx y)
3088{
3089 enum machine_mode submode = GET_MODE_INNER (mode);
3090 bool imag_first;
3091
3092#ifdef PUSH_ROUNDING
3093 unsigned int submodesize = GET_MODE_SIZE (submode);
3094
3095 /* In case we output to the stack, but the size is smaller than the
3096 machine can push exactly, we need to use move instructions. */
3097 if (PUSH_ROUNDING (submodesize) != submodesize)
3098 {
3099 x = emit_move_resolve_push (mode, x);
3100 return emit_move_insn (x, y);
3101 }
3102#endif
3103
3104 /* Note that the real part always precedes the imag part in memory
3105 regardless of machine's endianness. */
3106 switch (GET_CODE (XEXP (x, 0)))
3107 {
3108 case PRE_DEC:
3109 case POST_DEC:
3110 imag_first = true;
3111 break;
3112 case PRE_INC:
3113 case POST_INC:
3114 imag_first = false;
3115 break;
3116 default:
3117 gcc_unreachable ();
3118 }
3119
3120 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3121 read_complex_part (y, imag_first));
3122 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3123 read_complex_part (y, !imag_first));
3124}
3125
3126/* A subroutine of emit_move_complex. Perform the move from Y to X
3127 via two moves of the parts. Returns the last instruction emitted. */
3128
3129rtx
3130emit_move_complex_parts (rtx x, rtx y)
3131{
3132 /* Show the output dies here. This is necessary for SUBREGs
3133 of pseudos since we cannot track their lifetimes correctly;
3134 hard regs shouldn't appear here except as return values. */
3135 if (!reload_completed && !reload_in_progress
3136 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3137 emit_clobber (x);
3138
3139 write_complex_part (x, read_complex_part (y, false), false);
3140 write_complex_part (x, read_complex_part (y, true), true);
3141
3142 return get_last_insn ();
3143}
3144
3145/* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3146 MODE is known to be complex. Returns the last instruction emitted. */
3147
3148static rtx
3149emit_move_complex (enum machine_mode mode, rtx x, rtx y)
3150{
3151 bool try_int;
3152
3153 /* Need to take special care for pushes, to maintain proper ordering
3154 of the data, and possibly extra padding. */
3155 if (push_operand (x, mode))
3156 return emit_move_complex_push (mode, x, y);
3157
3158 /* See if we can coerce the target into moving both values at once. */
3159
3160 /* Move floating point as parts. */
3161 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3162 && optab_handler (mov_optab, GET_MODE_INNER (mode))->insn_code != CODE_FOR_nothing)
3163 try_int = false;
3164 /* Not possible if the values are inherently not adjacent. */
3165 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3166 try_int = false;
3167 /* Is possible if both are registers (or subregs of registers). */
3168 else if (register_operand (x, mode) && register_operand (y, mode))
3169 try_int = true;
3170 /* If one of the operands is a memory, and alignment constraints
3171 are friendly enough, we may be able to do combined memory operations.
3172 We do not attempt this if Y is a constant because that combination is
3173 usually better with the by-parts thing below. */
3174 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3175 && (!STRICT_ALIGNMENT
3176 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3177 try_int = true;
3178 else
3179 try_int = false;
3180
3181 if (try_int)
3182 {
3183 rtx ret;
3184
3185 /* For memory to memory moves, optimal behavior can be had with the
3186 existing block move logic. */
3187 if (MEM_P (x) && MEM_P (y))
3188 {
3189 emit_block_move (x, y, GEN_INT (GET_MODE_SIZE (mode)),
3190 BLOCK_OP_NO_LIBCALL);
3191 return get_last_insn ();
3192 }
3193
3194 ret = emit_move_via_integer (mode, x, y, true);
3195 if (ret)
3196 return ret;
3197 }
3198
3199 return emit_move_complex_parts (x, y);
3200}
3201
3202/* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3203 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3204
3205static rtx
3206emit_move_ccmode (enum machine_mode mode, rtx x, rtx y)
3207{
3208 rtx ret;
3209
3210 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3211 if (mode != CCmode)
3212 {
3213 enum insn_code code = optab_handler (mov_optab, CCmode)->insn_code;
3214 if (code != CODE_FOR_nothing)
3215 {
3216 x = emit_move_change_mode (CCmode, mode, x, true);
3217 y = emit_move_change_mode (CCmode, mode, y, true);
3218 return emit_insn (GEN_FCN (code) (x, y));
3219 }
3220 }
3221
3222 /* Otherwise, find the MODE_INT mode of the same width. */
3223 ret = emit_move_via_integer (mode, x, y, false);
3224 gcc_assert (ret != NULL);
3225 return ret;
3226}
3227
3228/* Return true if word I of OP lies entirely in the
3229 undefined bits of a paradoxical subreg. */
3230
3231static bool
3232undefined_operand_subword_p (const_rtx op, int i)
3233{
3234 enum machine_mode innermode, innermostmode;
3235 int offset;
3236 if (GET_CODE (op) != SUBREG)
3237 return false;
3238 innermode = GET_MODE (op);
3239 innermostmode = GET_MODE (SUBREG_REG (op));
3240 offset = i * UNITS_PER_WORD + SUBREG_BYTE (op);
3241 /* The SUBREG_BYTE represents offset, as if the value were stored in
3242 memory, except for a paradoxical subreg where we define
3243 SUBREG_BYTE to be 0; undo this exception as in
3244 simplify_subreg. */
3245 if (SUBREG_BYTE (op) == 0
3246 && GET_MODE_SIZE (innermostmode) < GET_MODE_SIZE (innermode))
3247 {
3248 int difference = (GET_MODE_SIZE (innermostmode) - GET_MODE_SIZE (innermode));
3249 if (WORDS_BIG_ENDIAN)
3250 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
3251 if (BYTES_BIG_ENDIAN)
3252 offset += difference % UNITS_PER_WORD;
3253 }
3254 if (offset >= GET_MODE_SIZE (innermostmode)
3255 || offset <= -GET_MODE_SIZE (word_mode))
3256 return true;
3257 return false;
3258}
3259
3260/* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3261 MODE is any multi-word or full-word mode that lacks a move_insn
3262 pattern. Note that you will get better code if you define such
3263 patterns, even if they must turn into multiple assembler instructions. */
3264
3265static rtx
3266emit_move_multi_word (enum machine_mode mode, rtx x, rtx y)
3267{
3268 rtx last_insn = 0;
3269 rtx seq, inner;
3270 bool need_clobber;
3271 int i;
3272
3273 gcc_assert (GET_MODE_SIZE (mode) >= UNITS_PER_WORD);
3274
3275 /* If X is a push on the stack, do the push now and replace
3276 X with a reference to the stack pointer. */
3277 if (push_operand (x, mode))
3278 x = emit_move_resolve_push (mode, x);
3279
3280 /* If we are in reload, see if either operand is a MEM whose address
3281 is scheduled for replacement. */
3282 if (reload_in_progress && MEM_P (x)
3283 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3284 x = replace_equiv_address_nv (x, inner);
3285 if (reload_in_progress && MEM_P (y)
3286 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3287 y = replace_equiv_address_nv (y, inner);
3288
3289 start_sequence ();
3290
3291 need_clobber = false;
3292 for (i = 0;
3293 i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD;
3294 i++)
3295 {
3296 rtx xpart = operand_subword (x, i, 1, mode);
3297 rtx ypart;
3298
3299 /* Do not generate code for a move if it would come entirely
3300 from the undefined bits of a paradoxical subreg. */
3301 if (undefined_operand_subword_p (y, i))
3302 continue;
3303
3304 ypart = operand_subword (y, i, 1, mode);
3305
3306 /* If we can't get a part of Y, put Y into memory if it is a
3307 constant. Otherwise, force it into a register. Then we must
3308 be able to get a part of Y. */
3309 if (ypart == 0 && CONSTANT_P (y))
3310 {
3311 y = use_anchored_address (force_const_mem (mode, y));
3312 ypart = operand_subword (y, i, 1, mode);
3313 }
3314 else if (ypart == 0)
3315 ypart = operand_subword_force (y, i, mode);
3316
3317 gcc_assert (xpart && ypart);
3318
3319 need_clobber |= (GET_CODE (xpart) == SUBREG);
3320
3321 last_insn = emit_move_insn (xpart, ypart);
3322 }
3323
3324 seq = get_insns ();
3325 end_sequence ();
3326
3327 /* Show the output dies here. This is necessary for SUBREGs
3328 of pseudos since we cannot track their lifetimes correctly;
3329 hard regs shouldn't appear here except as return values.
3330 We never want to emit such a clobber after reload. */
3331 if (x != y
3332 && ! (reload_in_progress || reload_completed)
3333 && need_clobber != 0)
3334 emit_clobber (x);
3335
3336 emit_insn (seq);
3337
3338 return last_insn;
3339}
3340
3341/* Low level part of emit_move_insn.
3342 Called just like emit_move_insn, but assumes X and Y
3343 are basically valid. */
3344
3345rtx
3346emit_move_insn_1 (rtx x, rtx y)
3347{
3348 enum machine_mode mode = GET_MODE (x);
3349 enum insn_code code;
3350
3351 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3352
3353 code = optab_handler (mov_optab, mode)->insn_code;
3354 if (code != CODE_FOR_nothing)
3355 return emit_insn (GEN_FCN (code) (x, y));
3356
3357 /* Expand complex moves by moving real part and imag part. */
3358 if (COMPLEX_MODE_P (mode))
3359 return emit_move_complex (mode, x, y);
3360
3361 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3362 || ALL_FIXED_POINT_MODE_P (mode))
3363 {
3364 rtx result = emit_move_via_integer (mode, x, y, true);
3365
3366 /* If we can't find an integer mode, use multi words. */
3367 if (result)
3368 return result;
3369 else
3370 return emit_move_multi_word (mode, x, y);
3371 }
3372
3373 if (GET_MODE_CLASS (mode) == MODE_CC)
3374 return emit_move_ccmode (mode, x, y);
3375
3376 /* Try using a move pattern for the corresponding integer mode. This is
3377 only safe when simplify_subreg can convert MODE constants into integer
3378 constants. At present, it can only do this reliably if the value
3379 fits within a HOST_WIDE_INT. */
3380 if (!CONSTANT_P (y) || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3381 {
3382 rtx ret = emit_move_via_integer (mode, x, y, false);
3383 if (ret)
3384 return ret;
3385 }
3386
3387 return emit_move_multi_word (mode, x, y);
3388}
3389
3390/* Generate code to copy Y into X.
3391 Both Y and X must have the same mode, except that
3392 Y can be a constant with VOIDmode.
3393 This mode cannot be BLKmode; use emit_block_move for that.
3394
3395 Return the last instruction emitted. */
3396
3397rtx
3398emit_move_insn (rtx x, rtx y)
3399{
3400 enum machine_mode mode = GET_MODE (x);
3401 rtx y_cst = NULL_RTX;
3402 rtx last_insn, set;
3403
3404 gcc_assert (mode != BLKmode
3405 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3406
3407 if (CONSTANT_P (y))
3408 {
3409 if (optimize
3410 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3411 && (last_insn = compress_float_constant (x, y)))
3412 return last_insn;
3413
3414 y_cst = y;
3415
3416 if (!LEGITIMATE_CONSTANT_P (y))
3417 {
3418 y = force_const_mem (mode, y);
3419
3420 /* If the target's cannot_force_const_mem prevented the spill,
3421 assume that the target's move expanders will also take care
3422 of the non-legitimate constant. */
3423 if (!y)
3424 y = y_cst;
3425 else
3426 y = use_anchored_address (y);
3427 }
3428 }
3429
3430 /* If X or Y are memory references, verify that their addresses are valid
3431 for the machine. */
3432 if (MEM_P (x)
3433 && (! memory_address_p (GET_MODE (x), XEXP (x, 0))
3434 && ! push_operand (x, GET_MODE (x))))
3435 x = validize_mem (x);
3436
3437 if (MEM_P (y)
3438 && ! memory_address_p (GET_MODE (y), XEXP (y, 0)))
3439 y = validize_mem (y);
3440
3441 gcc_assert (mode != BLKmode);
3442
3443 last_insn = emit_move_insn_1 (x, y);
3444
3445 if (y_cst && REG_P (x)
3446 && (set = single_set (last_insn)) != NULL_RTX
3447 && SET_DEST (set) == x
3448 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3449 set_unique_reg_note (last_insn, REG_EQUAL, y_cst);
3450
3451 return last_insn;
3452}
3453
3454/* If Y is representable exactly in a narrower mode, and the target can
3455 perform the extension directly from constant or memory, then emit the
3456 move as an extension. */
3457
3458static rtx
3459compress_float_constant (rtx x, rtx y)
3460{
3461 enum machine_mode dstmode = GET_MODE (x);
3462 enum machine_mode orig_srcmode = GET_MODE (y);
3463 enum machine_mode srcmode;
3464 REAL_VALUE_TYPE r;
3465 int oldcost, newcost;
3466 bool speed = optimize_insn_for_speed_p ();
3467
3468 REAL_VALUE_FROM_CONST_DOUBLE (r, y);
3469
3470 if (LEGITIMATE_CONSTANT_P (y))
3471 oldcost = rtx_cost (y, SET, speed);
3472 else
3473 oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed);
3474
3475 for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode));
3476 srcmode != orig_srcmode;
3477 srcmode = GET_MODE_WIDER_MODE (srcmode))
3478 {
3479 enum insn_code ic;
3480 rtx trunc_y, last_insn;
3481
3482 /* Skip if the target can't extend this way. */
3483 ic = can_extend_p (dstmode, srcmode, 0);
3484 if (ic == CODE_FOR_nothing)
3485 continue;
3486
3487 /* Skip if the narrowed value isn't exact. */
3488 if (! exact_real_truncate (srcmode, &r))
3489 continue;
3490
3491 trunc_y = CONST_DOUBLE_FROM_REAL_VALUE (r, srcmode);
3492
3493 if (LEGITIMATE_CONSTANT_P (trunc_y))
3494 {
3495 /* Skip if the target needs extra instructions to perform
3496 the extension. */
3497 if (! (*insn_data[ic].operand[1].predicate) (trunc_y, srcmode))
3498 continue;
3499 /* This is valid, but may not be cheaper than the original. */
3500 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3501 if (oldcost < newcost)
3502 continue;
3503 }
3504 else if (float_extend_from_mem[dstmode][srcmode])
3505 {
3506 trunc_y = force_const_mem (srcmode, trunc_y);
3507 /* This is valid, but may not be cheaper than the original. */
3508 newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed);
3509 if (oldcost < newcost)
3510 continue;
3511 trunc_y = validize_mem (trunc_y);
3512 }
3513 else
3514 continue;
3515
3516 /* For CSE's benefit, force the compressed constant pool entry
3517 into a new pseudo. This constant may be used in different modes,
3518 and if not, combine will put things back together for us. */
3519 trunc_y = force_reg (srcmode, trunc_y);
3520 emit_unop_insn (ic, x, trunc_y, UNKNOWN);
3521 last_insn = get_last_insn ();
3522
3523 if (REG_P (x))
3524 set_unique_reg_note (last_insn, REG_EQUAL, y);
3525
3526 return last_insn;
3527 }
3528
3529 return NULL_RTX;
3530}
3531\f
3532/* Pushing data onto the stack. */
3533
3534/* Push a block of length SIZE (perhaps variable)
3535 and return an rtx to address the beginning of the block.
3536 The value may be virtual_outgoing_args_rtx.
3537
3538 EXTRA is the number of bytes of padding to push in addition to SIZE.
3539 BELOW nonzero means this padding comes at low addresses;
3540 otherwise, the padding comes at high addresses. */
3541
3542rtx
3543push_block (rtx size, int extra, int below)
3544{
3545 rtx temp;
3546
3547 size = convert_modes (Pmode, ptr_mode, size, 1);
3548 if (CONSTANT_P (size))
3549 anti_adjust_stack (plus_constant (size, extra));
3550 else if (REG_P (size) && extra == 0)
3551 anti_adjust_stack (size);
3552 else
3553 {
3554 temp = copy_to_mode_reg (Pmode, size);
3555 if (extra != 0)
3556 temp = expand_binop (Pmode, add_optab, temp, GEN_INT (extra),
3557 temp, 0, OPTAB_LIB_WIDEN);
3558 anti_adjust_stack (temp);
3559 }
3560
3561#ifndef STACK_GROWS_DOWNWARD
3562 if (0)
3563#else
3564 if (1)
3565#endif
3566 {
3567 temp = virtual_outgoing_args_rtx;
3568 if (extra != 0 && below)
3569 temp = plus_constant (temp, extra);
3570 }
3571 else
3572 {
3573 if (GET_CODE (size) == CONST_INT)
3574 temp = plus_constant (virtual_outgoing_args_rtx,
3575 -INTVAL (size) - (below ? 0 : extra));
3576 else if (extra != 0 && !below)
3577 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3578 negate_rtx (Pmode, plus_constant (size, extra)));
3579 else
3580 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3581 negate_rtx (Pmode, size));
3582 }
3583
3584 return memory_address (GET_CLASS_NARROWEST_MODE (MODE_INT), temp);
3585}
3586
3587#ifdef PUSH_ROUNDING
3588
3589/* Emit single push insn. */
3590
3591static void
3592emit_single_push_insn (enum machine_mode mode, rtx x, tree type)
3593{
3594 rtx dest_addr;
3595 unsigned rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
3596 rtx dest;
3597 enum insn_code icode;
3598 insn_operand_predicate_fn pred;
3599
3600 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
3601 /* If there is push pattern, use it. Otherwise try old way of throwing
3602 MEM representing push operation to move expander. */
3603 icode = optab_handler (push_optab, mode)->insn_code;
3604 if (icode != CODE_FOR_nothing)
3605 {
3606 if (((pred = insn_data[(int) icode].operand[0].predicate)
3607 && !((*pred) (x, mode))))
3608 x = force_reg (mode, x);
3609 emit_insn (GEN_FCN (icode) (x));
3610 return;
3611 }
3612 if (GET_MODE_SIZE (mode) == rounded_size)
3613 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
3614 /* If we are to pad downward, adjust the stack pointer first and
3615 then store X into the stack location using an offset. This is
3616 because emit_move_insn does not know how to pad; it does not have
3617 access to type. */
3618 else if (FUNCTION_ARG_PADDING (mode, type) == downward)
3619 {
3620 unsigned padding_size = rounded_size - GET_MODE_SIZE (mode);
3621 HOST_WIDE_INT offset;
3622
3623 emit_move_insn (stack_pointer_rtx,
3624 expand_binop (Pmode,
3625#ifdef STACK_GROWS_DOWNWARD
3626 sub_optab,
3627#else
3628 add_optab,
3629#endif
3630 stack_pointer_rtx,
3631 GEN_INT (rounded_size),
3632 NULL_RTX, 0, OPTAB_LIB_WIDEN));
3633
3634 offset = (HOST_WIDE_INT) padding_size;
3635#ifdef STACK_GROWS_DOWNWARD
3636 if (STACK_PUSH_CODE == POST_DEC)
3637 /* We have already decremented the stack pointer, so get the
3638 previous value. */
3639 offset += (HOST_WIDE_INT) rounded_size;
3640#else
3641 if (STACK_PUSH_CODE == POST_INC)
3642 /* We have already incremented the stack pointer, so get the
3643 previous value. */
3644 offset -= (HOST_WIDE_INT) rounded_size;
3645#endif
3646 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (offset));
3647 }
3648 else
3649 {
3650#ifdef STACK_GROWS_DOWNWARD
3651 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
3652 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3653 GEN_INT (-(HOST_WIDE_INT) rounded_size));
3654#else
3655 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
3656 dest_addr = gen_rtx_PLUS (Pmode, stack_pointer_rtx,
3657 GEN_INT (rounded_size));
3658#endif
3659 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
3660 }
3661
3662 dest = gen_rtx_MEM (mode, dest_addr);
3663
3664 if (type != 0)
3665 {
3666 set_mem_attributes (dest, type, 1);
3667
3668 if (flag_optimize_sibling_calls)
3669 /* Function incoming arguments may overlap with sibling call
3670 outgoing arguments and we cannot allow reordering of reads
3671 from function arguments with stores to outgoing arguments
3672 of sibling calls. */
3673 set_mem_alias_set (dest, 0);
3674 }
3675 emit_move_insn (dest, x);
3676}
3677#endif
3678
3679/* Generate code to push X onto the stack, assuming it has mode MODE and
3680 type TYPE.
3681 MODE is redundant except when X is a CONST_INT (since they don't
3682 carry mode info).
3683 SIZE is an rtx for the size of data to be copied (in bytes),
3684 needed only if X is BLKmode.
3685
3686 ALIGN (in bits) is maximum alignment we can assume.
3687
3688 If PARTIAL and REG are both nonzero, then copy that many of the first
3689 bytes of X into registers starting with REG, and push the rest of X.
3690 The amount of space pushed is decreased by PARTIAL bytes.
3691 REG must be a hard register in this case.
3692 If REG is zero but PARTIAL is not, take any all others actions for an
3693 argument partially in registers, but do not actually load any
3694 registers.
3695
3696 EXTRA is the amount in bytes of extra space to leave next to this arg.
3697 This is ignored if an argument block has already been allocated.
3698
3699 On a machine that lacks real push insns, ARGS_ADDR is the address of
3700 the bottom of the argument block for this call. We use indexing off there
3701 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
3702 argument block has not been preallocated.
3703
3704 ARGS_SO_FAR is the size of args previously pushed for this call.
3705
3706 REG_PARM_STACK_SPACE is nonzero if functions require stack space
3707 for arguments passed in registers. If nonzero, it will be the number
3708 of bytes required. */
3709
3710void
3711emit_push_insn (rtx x, enum machine_mode mode, tree type, rtx size,
3712 unsigned int align, int partial, rtx reg, int extra,
3713 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
3714 rtx alignment_pad)
3715{
3716 rtx xinner;
3717 enum direction stack_direction
3718#ifdef STACK_GROWS_DOWNWARD
3719 = downward;
3720#else
3721 = upward;
3722#endif
3723
3724 /* Decide where to pad the argument: `downward' for below,
3725 `upward' for above, or `none' for don't pad it.
3726 Default is below for small data on big-endian machines; else above. */
3727 enum direction where_pad = FUNCTION_ARG_PADDING (mode, type);
3728
3729 /* Invert direction if stack is post-decrement.
3730 FIXME: why? */
3731 if (STACK_PUSH_CODE == POST_DEC)
3732 if (where_pad != none)
3733 where_pad = (where_pad == downward ? upward : downward);
3734
3735 xinner = x;
3736
3737 if (mode == BLKmode
3738 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
3739 {
3740 /* Copy a block into the stack, entirely or partially. */
3741
3742 rtx temp;
3743 int used;
3744 int offset;
3745 int skip;
3746
3747 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3748 used = partial - offset;
3749
3750 if (mode != BLKmode)
3751 {
3752 /* A value is to be stored in an insufficiently aligned
3753 stack slot; copy via a suitably aligned slot if
3754 necessary. */
3755 size = GEN_INT (GET_MODE_SIZE (mode));
3756 if (!MEM_P (xinner))
3757 {
3758 temp = assign_temp (type, 0, 1, 1);
3759 emit_move_insn (temp, xinner);
3760 xinner = temp;
3761 }
3762 }
3763
3764 gcc_assert (size);
3765
3766 /* USED is now the # of bytes we need not copy to the stack
3767 because registers will take care of them. */
3768
3769 if (partial != 0)
3770 xinner = adjust_address (xinner, BLKmode, used);
3771
3772 /* If the partial register-part of the arg counts in its stack size,
3773 skip the part of stack space corresponding to the registers.
3774 Otherwise, start copying to the beginning of the stack space,
3775 by setting SKIP to 0. */
3776 skip = (reg_parm_stack_space == 0) ? 0 : used;
3777
3778#ifdef PUSH_ROUNDING
3779 /* Do it with several push insns if that doesn't take lots of insns
3780 and if there is no difficulty with push insns that skip bytes
3781 on the stack for alignment purposes. */
3782 if (args_addr == 0
3783 && PUSH_ARGS
3784 && GET_CODE (size) == CONST_INT
3785 && skip == 0
3786 && MEM_ALIGN (xinner) >= align
3787 && (MOVE_BY_PIECES_P ((unsigned) INTVAL (size) - used, align))
3788 /* Here we avoid the case of a structure whose weak alignment
3789 forces many pushes of a small amount of data,
3790 and such small pushes do rounding that causes trouble. */
3791 && ((! SLOW_UNALIGNED_ACCESS (word_mode, align))
3792 || align >= BIGGEST_ALIGNMENT
3793 || (PUSH_ROUNDING (align / BITS_PER_UNIT)
3794 == (align / BITS_PER_UNIT)))
3795 && PUSH_ROUNDING (INTVAL (size)) == INTVAL (size))
3796 {
3797 /* Push padding now if padding above and stack grows down,
3798 or if padding below and stack grows up.
3799 But if space already allocated, this has already been done. */
3800 if (extra && args_addr == 0
3801 && where_pad != none && where_pad != stack_direction)
3802 anti_adjust_stack (GEN_INT (extra));
3803
3804 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
3805 }
3806 else
3807#endif /* PUSH_ROUNDING */
3808 {
3809 rtx target;
3810
3811 /* Otherwise make space on the stack and copy the data
3812 to the address of that space. */
3813
3814 /* Deduct words put into registers from the size we must copy. */
3815 if (partial != 0)
3816 {
3817 if (GET_CODE (size) == CONST_INT)
3818 size = GEN_INT (INTVAL (size) - used);
3819 else
3820 size = expand_binop (GET_MODE (size), sub_optab, size,
3821 GEN_INT (used), NULL_RTX, 0,
3822 OPTAB_LIB_WIDEN);
3823 }
3824
3825 /* Get the address of the stack space.
3826 In this case, we do not deal with EXTRA separately.
3827 A single stack adjust will do. */
3828 if (! args_addr)
3829 {
3830 temp = push_block (size, extra, where_pad == downward);
3831 extra = 0;
3832 }
3833 else if (GET_CODE (args_so_far) == CONST_INT)
3834 temp = memory_address (BLKmode,
3835 plus_constant (args_addr,
3836 skip + INTVAL (args_so_far)));
3837 else
3838 temp = memory_address (BLKmode,
3839 plus_constant (gen_rtx_PLUS (Pmode,
3840 args_addr,
3841 args_so_far),
3842 skip));
3843
3844 if (!ACCUMULATE_OUTGOING_ARGS)
3845 {
3846 /* If the source is referenced relative to the stack pointer,
3847 copy it to another register to stabilize it. We do not need
3848 to do this if we know that we won't be changing sp. */
3849
3850 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
3851 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
3852 temp = copy_to_reg (temp);
3853 }
3854
3855 target = gen_rtx_MEM (BLKmode, temp);
3856
3857 /* We do *not* set_mem_attributes here, because incoming arguments
3858 may overlap with sibling call outgoing arguments and we cannot
3859 allow reordering of reads from function arguments with stores
3860 to outgoing arguments of sibling calls. We do, however, want
3861 to record the alignment of the stack slot. */
3862 /* ALIGN may well be better aligned than TYPE, e.g. due to
3863 PARM_BOUNDARY. Assume the caller isn't lying. */
3864 set_mem_align (target, align);
3865
3866 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
3867 }
3868 }
3869 else if (partial > 0)
3870 {
3871 /* Scalar partly in registers. */
3872
3873 int size = GET_MODE_SIZE (mode) / UNITS_PER_WORD;
3874 int i;
3875 int not_stack;
3876 /* # bytes of start of argument
3877 that we must make space for but need not store. */
3878 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
3879 int args_offset = INTVAL (args_so_far);
3880 int skip;
3881
3882 /* Push padding now if padding above and stack grows down,
3883 or if padding below and stack grows up.
3884 But if space already allocated, this has already been done. */
3885 if (extra && args_addr == 0
3886 && where_pad != none && where_pad != stack_direction)
3887 anti_adjust_stack (GEN_INT (extra));
3888
3889 /* If we make space by pushing it, we might as well push
3890 the real data. Otherwise, we can leave OFFSET nonzero
3891 and leave the space uninitialized. */
3892 if (args_addr == 0)
3893 offset = 0;
3894
3895 /* Now NOT_STACK gets the number of words that we don't need to
3896 allocate on the stack. Convert OFFSET to words too. */
3897 not_stack = (partial - offset) / UNITS_PER_WORD;
3898 offset /= UNITS_PER_WORD;
3899
3900 /* If the partial register-part of the arg counts in its stack size,
3901 skip the part of stack space corresponding to the registers.
3902 Otherwise, start copying to the beginning of the stack space,
3903 by setting SKIP to 0. */
3904 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
3905
3906 if (CONSTANT_P (x) && ! LEGITIMATE_CONSTANT_P (x))
3907 x = validize_mem (force_const_mem (mode, x));
3908
3909 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
3910 SUBREGs of such registers are not allowed. */
3911 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
3912 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
3913 x = copy_to_reg (x);
3914
3915 /* Loop over all the words allocated on the stack for this arg. */
3916 /* We can do it by words, because any scalar bigger than a word
3917 has a size a multiple of a word. */
3918#ifndef PUSH_ARGS_REVERSED
3919 for (i = not_stack; i < size; i++)
3920#else
3921 for (i = size - 1; i >= not_stack; i--)
3922#endif
3923 if (i >= not_stack + offset)
3924 emit_push_insn (operand_subword_force (x, i, mode),
3925 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
3926 0, args_addr,
3927 GEN_INT (args_offset + ((i - not_stack + skip)
3928 * UNITS_PER_WORD)),
3929 reg_parm_stack_space, alignment_pad);
3930 }
3931 else
3932 {
3933 rtx addr;
3934 rtx dest;
3935
3936 /* Push padding now if padding above and stack grows down,
3937 or if padding below and stack grows up.
3938 But if space already allocated, this has already been done. */
3939 if (extra && args_addr == 0
3940 && where_pad != none && where_pad != stack_direction)
3941 anti_adjust_stack (GEN_INT (extra));
3942
3943#ifdef PUSH_ROUNDING
3944 if (args_addr == 0 && PUSH_ARGS)
3945 emit_single_push_insn (mode, x, type);
3946 else
3947#endif
3948 {
3949 if (GET_CODE (args_so_far) == CONST_INT)
3950 addr
3951 = memory_address (mode,
3952 plus_constant (args_addr,
3953 INTVAL (args_so_far)));
3954 else
3955 addr = memory_address (mode, gen_rtx_PLUS (Pmode, args_addr,
3956 args_so_far));
3957 dest = gen_rtx_MEM (mode, addr);
3958
3959 /* We do *not* set_mem_attributes here, because incoming arguments
3960 may overlap with sibling call outgoing arguments and we cannot
3961 allow reordering of reads from function arguments with stores
3962 to outgoing arguments of sibling calls. We do, however, want
3963 to record the alignment of the stack slot. */
3964 /* ALIGN may well be better aligned than TYPE, e.g. due to
3965 PARM_BOUNDARY. Assume the caller isn't lying. */
3966 set_mem_align (dest, align);
3967
3968 emit_move_insn (dest, x);
3969 }
3970 }
3971
3972 /* If part should go in registers, copy that part
3973 into the appropriate registers. Do this now, at the end,
3974 since mem-to-mem copies above may do function calls. */
3975 if (partial > 0 && reg != 0)
3976 {
3977 /* Handle calls that pass values in multiple non-contiguous locations.
3978 The Irix 6 ABI has examples of this. */
3979 if (GET_CODE (reg) == PARALLEL)
3980 emit_group_load (reg, x, type, -1);
3981 else
3982 {
3983 gcc_assert (partial % UNITS_PER_WORD == 0);
3984 move_block_to_reg (REGNO (reg), x, partial / UNITS_PER_WORD, mode);
3985 }
3986 }
3987
3988 if (extra && args_addr == 0 && where_pad == stack_direction)
3989 anti_adjust_stack (GEN_INT (extra));
3990
3991 if (alignment_pad && args_addr == 0)
3992 anti_adjust_stack (alignment_pad);
3993}
3994\f
3995/* Return X if X can be used as a subtarget in a sequence of arithmetic
3996 operations. */
3997
3998static rtx
3999get_subtarget (rtx x)
4000{
4001 return (optimize
4002 || x == 0
4003 /* Only registers can be subtargets. */