proc->thread stage 4: rework the VFS and DEVICE subsystems to take thread
[dragonfly.git] / sys / dev / serial / cy / cy.c
CommitLineData
984263bc
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1/*-
2 * cyclades cyclom-y serial driver
3 * Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993
4 *
5 * Copyright (c) 1993 Andrew Herbert.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name Andrew Herbert may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
20 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
22 * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
23 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
24 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
25 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
26 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
27 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * $FreeBSD: src/sys/i386/isa/cy.c,v 1.97.2.2 2001/08/22 13:04:58 bde Exp $
dadab5e9 31 * $DragonFly: src/sys/dev/serial/cy/cy.c,v 1.3 2003/06/25 03:55:54 dillon Exp $
984263bc
MD
32 */
33
34#include "opt_compat.h"
35#include "cy.h"
36
37/*
38 * TODO:
39 * Atomic COR change.
40 * Consoles.
41 */
42
43/*
44 * Temporary compile-time configuration options.
45 */
46#define RxFifoThreshold (CD1400_RX_FIFO_SIZE / 2)
47 /* Number of chars in the receiver FIFO before an
48 * an interrupt is generated. Should depend on
49 * line speed. Needs to be about 6 on a 486DX33
50 * for 4 active ports at 115200 bps. Why doesn't
51 * 10 work?
52 */
53#define PollMode /* Use polling-based irq service routine, not the
54 * hardware svcack lines. Must be defined for
55 * Cyclom-16Y boards. Less efficient for Cyclom-8Ys,
56 * and stops 4 * 115200 bps from working.
57 */
58#undef Smarts /* Enable slightly more CD1400 intelligence. Mainly
59 * the output CR/LF processing, plus we can avoid a
60 * few checks usually done in ttyinput().
61 *
62 * XXX not fully implemented, and not particularly
63 * worthwhile.
64 */
65#undef CyDebug /* Include debugging code (not very expensive). */
66
67/* These will go away. */
68#undef SOFT_CTS_OFLOW
69#define SOFT_HOTCHAR
70
71#include <sys/param.h>
72#include <sys/systm.h>
73#include <sys/tty.h>
74#include <sys/proc.h>
75#include <sys/conf.h>
76#include <sys/dkstat.h>
77#include <sys/fcntl.h>
78#include <sys/interrupt.h>
79#include <sys/kernel.h>
80#include <sys/malloc.h>
81#include <sys/syslog.h>
82#include <machine/clock.h>
83#include <machine/ipl.h>
84#ifndef SMP
85#include <machine/lock.h>
86#endif
87#include <machine/psl.h>
88
89#include <i386/isa/isa_device.h>
90#include <i386/isa/cyreg.h>
91#include <i386/isa/ic/cd1400.h>
92
93#ifdef SMP
94#define disable_intr() COM_DISABLE_INTR()
95#define enable_intr() COM_ENABLE_INTR()
96#endif /* SMP */
97
98/*
99 * Dictionary so that I can name everything *sio* or *com* to compare with
100 * sio.c. There is also lots of ugly formatting and unnecessary ifdefs to
101 * simplify the comparision. These will go away.
102 */
103#define LSR_BI CD1400_RDSR_BREAK
104#define LSR_FE CD1400_RDSR_FE
105#define LSR_OE CD1400_RDSR_OE
106#define LSR_PE CD1400_RDSR_PE
107#define MCR_DTR CD1400_MSVR2_DTR
108#define MCR_RTS CD1400_MSVR1_RTS
109#define MSR_CTS CD1400_MSVR2_CTS
110#define MSR_DCD CD1400_MSVR2_CD
111#define MSR_DSR CD1400_MSVR2_DSR
112#define MSR_RI CD1400_MSVR2_RI
113#define NSIO (NCY * CY_MAX_PORTS)
114#define comconsole cyconsole
115#define comdefaultrate cydefaultrate
116#define com_events cy_events
117#define comhardclose cyhardclose
118#define commctl cymctl
119#define comparam cyparam
120#define comspeed cyspeed
121#define comstart cystart
122#define comwakeup cywakeup
123#define nsio_tty ncy_tty
124#define p_com_addr p_cy_addr
125#define sioattach cyattach
126#define sioclose cyclose
127#define siodriver cydriver
128#define siodtrwakeup cydtrwakeup
129#define sioinput cyinput
130#define siointr cyintr
131#define siointr1 cyintr1
132#define sioioctl cyioctl
133#define sioopen cyopen
134#define siopoll cypoll
135#define sioprobe cyprobe
136#define siosettimeout cysettimeout
137#define siosetwater cysetwater
138#define comstop cystop
139#define siowrite cywrite
140#define sio_registered cy_registered
141#define sio_timeout cy_timeout
142#define sio_timeout_handle cy_timeout_handle
143#define sio_timeouts_until_log cy_timeouts_until_log
144#define sio_tty cy_tty
145
146#define CY_MAX_PORTS (CD1400_NO_OF_CHANNELS * CY_MAX_CD1400s)
147
148/* We encode the cyclom unit number (cyu) in spare bits in the IVR's. */
149#define CD1400_xIVR_CHAN_SHIFT 3
150#define CD1400_xIVR_CHAN 0x1F
151
152/*
153 * ETC states. com->etc may also contain a hardware ETC command value,
154 * meaning that execution of that command is pending.
155 */
156#define ETC_NONE 0 /* we depend on bzero() setting this */
157#define ETC_BREAK_STARTING 1
158#define ETC_BREAK_STARTED 2
159#define ETC_BREAK_ENDING 3
160#define ETC_BREAK_ENDED 4
161
162#define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
163
164#define CALLOUT_MASK 0x80
165#define CONTROL_MASK 0x60
166#define CONTROL_INIT_STATE 0x20
167#define CONTROL_LOCK_STATE 0x40
168#define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
169#define MINOR_MAGIC_MASK (CALLOUT_MASK | CONTROL_MASK)
170/*
171 * Not all of the magic is parametrized in the following macros. 16 and
172 * 0xff are related to the bitfields in a udev_t. CY_MAX_PORTS must be
173 * ((0xff & ~MINOR_MAGIC_MASK) + 1) for things to work.
174 */
175#define MINOR_TO_UNIT(mynor) (((mynor) >> 16) * CY_MAX_PORTS \
176 | (((mynor) & 0xff) & ~MINOR_MAGIC_MASK))
177#define UNIT_TO_MINOR(unit) (((unit) / CY_MAX_PORTS) << 16 \
178 | (((unit) & 0xff) & ~MINOR_MAGIC_MASK))
179
180/*
181 * com state bits.
182 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
183 * than the other bits so that they can be tested as a group without masking
184 * off the low bits.
185 *
186 * The following com and tty flags correspond closely:
187 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
188 * comstop())
189 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
190 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
191 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
192 * TS_FLUSH is not used.
193 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
194 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
195 */
196#define CS_BUSY 0x80 /* output in progress */
197#define CS_TTGO 0x40 /* output not stopped by XOFF */
198#define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
199#define CS_CHECKMSR 1 /* check of MSR scheduled */
200#define CS_CTS_OFLOW 2 /* use CTS output flow control */
201#define CS_DTR_OFF 0x10 /* DTR held off */
202#define CS_ODONE 4 /* output completed */
203#define CS_RTS_IFLOW 8 /* use RTS input flow control */
204#define CSE_ODONE 1 /* output transmitted */
205
206static char const * const error_desc[] = {
207#define CE_OVERRUN 0
208 "silo overflow",
209#define CE_INTERRUPT_BUF_OVERFLOW 1
210 "interrupt-level buffer overflow",
211#define CE_TTY_BUF_OVERFLOW 2
212 "tty-level buffer overflow",
213};
214
215#define CE_NTYPES 3
216#define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum])
217
218/* types. XXX - should be elsewhere */
219typedef u_char bool_t; /* boolean */
220typedef u_char volatile *cy_addr;
221
222/* queue of linear buffers */
223struct lbq {
224 u_char *l_head; /* next char to process */
225 u_char *l_tail; /* one past the last char to process */
226 struct lbq *l_next; /* next in queue */
227 bool_t l_queued; /* nonzero if queued */
228};
229
230/* com device structure */
231struct com_s {
232 u_char state; /* miscellaneous flag bits */
233 bool_t active_out; /* nonzero if the callout device is open */
234#if 0
235 u_char cfcr_image; /* copy of value written to CFCR */
236#endif
237 u_char etc; /* pending Embedded Transmit Command */
238 u_char extra_state; /* more flag bits, separate for order trick */
239#if 0
240 u_char fifo_image; /* copy of value written to FIFO */
241#endif
242 u_char gfrcr_image; /* copy of value read from GFRCR */
243#if 0
244 bool_t hasfifo; /* nonzero for 16550 UARTs */
245 bool_t loses_outints; /* nonzero if device loses output interrupts */
246#endif
247 u_char mcr_dtr; /* MCR bit that is wired to DTR */
248 u_char mcr_image; /* copy of value written to MCR */
249 u_char mcr_rts; /* MCR bit that is wired to RTS */
250#if 0
251#ifdef COM_MULTIPORT
252 bool_t multiport; /* is this unit part of a multiport device? */
253#endif /* COM_MULTIPORT */
254 bool_t no_irq; /* nonzero if irq is not attached */
255 bool_t poll; /* nonzero if polling is required */
256 bool_t poll_output; /* nonzero if polling for output is required */
257#endif
258 int unit; /* unit number */
259 int dtr_wait; /* time to hold DTR down on close (* 1/hz) */
260#if 0
261 u_int tx_fifo_size;
262#endif
263 u_int wopeners; /* # processes waiting for DCD in open() */
264
265 /*
266 * The high level of the driver never reads status registers directly
267 * because there would be too many side effects to handle conveniently.
268 * Instead, it reads copies of the registers stored here by the
269 * interrupt handler.
270 */
271 u_char last_modem_status; /* last MSR read by intr handler */
272 u_char prev_modem_status; /* last MSR handled by high level */
273
274 u_char hotchar; /* ldisc-specific char to be handled ASAP */
275 u_char *ibuf; /* start of input buffer */
276 u_char *ibufend; /* end of input buffer */
277 u_char *ibufold; /* old input buffer, to be freed */
278 u_char *ihighwater; /* threshold in input buffer */
279 u_char *iptr; /* next free spot in input buffer */
280 int ibufsize; /* size of ibuf (not include error bytes) */
281 int ierroff; /* offset of error bytes in ibuf */
282
283 struct lbq obufq; /* head of queue of output buffers */
284 struct lbq obufs[2]; /* output buffers */
285
286 int cy_align; /* index for register alignment */
287 cy_addr cy_iobase; /* base address of this port's cyclom */
288 cy_addr iobase; /* base address of this port's cd1400 */
289 int mcr_rts_reg; /* cd1400 reg number of reg holding mcr_rts */
290
291 struct tty *tp; /* cross reference */
292
293 /* Initial state. */
294 struct termios it_in; /* should be in struct tty */
295 struct termios it_out;
296
297 /* Lock state. */
298 struct termios lt_in; /* should be in struct tty */
299 struct termios lt_out;
300
301 bool_t do_timestamp;
302 bool_t do_dcd_timestamp;
303 struct timeval timestamp;
304 struct timeval dcd_timestamp;
305
306 u_long bytes_in; /* statistics */
307 u_long bytes_out;
308 u_int delta_error_counts[CE_NTYPES];
309 u_long error_counts[CE_NTYPES];
310
311 u_int recv_exception; /* exception chars received */
312 u_int mdm; /* modem signal changes */
313#ifdef CyDebug
314 u_int start_count; /* no. of calls to comstart() */
315 u_int start_real; /* no. of calls that did something */
316#endif
317 u_char car; /* CD1400 CAR shadow (if first unit in cd) */
318 u_char channel_control;/* CD1400 CCR control command shadow */
319 u_char cor[3]; /* CD1400 COR1-3 shadows */
320 u_char intr_enable; /* CD1400 SRER shadow */
321
322 /*
323 * Data area for output buffers. Someday we should build the output
324 * buffer queue without copying data.
325 */
326 u_char obuf1[256];
327 u_char obuf2[256];
328};
329
330/* PCI driver entry point. */
331int cyattach_common __P((cy_addr cy_iobase, int cy_align));
332ointhand2_t siointr;
333
334static int cy_units __P((cy_addr cy_iobase, int cy_align));
335static int sioattach __P((struct isa_device *dev));
336static void cd1400_channel_cmd __P((struct com_s *com, int cmd));
337static void cd1400_channel_cmd_wait __P((struct com_s *com));
338static void cd_etc __P((struct com_s *com, int etc));
339static int cd_getreg __P((struct com_s *com, int reg));
340static void cd_setreg __P((struct com_s *com, int reg, int val));
341static timeout_t siodtrwakeup;
342static void comhardclose __P((struct com_s *com));
343static void sioinput __P((struct com_s *com));
344#if 0
345static void siointr1 __P((struct com_s *com));
346#endif
347static int commctl __P((struct com_s *com, int bits, int how));
348static int comparam __P((struct tty *tp, struct termios *t));
349static swihand_t siopoll;
350static int sioprobe __P((struct isa_device *dev));
351static void siosettimeout __P((void));
352static int siosetwater __P((struct com_s *com, speed_t speed));
353static int comspeed __P((speed_t speed, u_long cy_clock,
354 int *prescaler_io));
355static void comstart __P((struct tty *tp));
356static void comstop __P((struct tty *tp, int rw));
357static timeout_t comwakeup;
358static void disc_optim __P((struct tty *tp, struct termios *t,
359 struct com_s *com));
360
361#ifdef CyDebug
362void cystatus __P((int unit));
363#endif
364
365static char driver_name[] = "cy";
366
367/* table and macro for fast conversion from a unit number to its com struct */
368static struct com_s *p_com_addr[NSIO];
369#define com_addr(unit) (p_com_addr[unit])
370
371struct isa_driver siodriver = {
372 sioprobe, sioattach, driver_name
373};
374
375static d_open_t sioopen;
376static d_close_t sioclose;
377static d_write_t siowrite;
378static d_ioctl_t sioioctl;
379
380#define CDEV_MAJOR 48
381static struct cdevsw sio_cdevsw = {
382 /* open */ sioopen,
383 /* close */ sioclose,
384 /* read */ ttyread,
385 /* write */ siowrite,
386 /* ioctl */ sioioctl,
387 /* poll */ ttypoll,
388 /* mmap */ nommap,
389 /* strategy */ nostrategy,
390 /* name */ driver_name,
391 /* maj */ CDEV_MAJOR,
392 /* dump */ nodump,
393 /* psize */ nopsize,
394 /* flags */ D_TTY | D_KQFILTER,
395 /* bmaj */ -1,
396 /* kqfilter */ ttykqfilter,
397};
398
399static int comconsole = -1;
400static speed_t comdefaultrate = TTYDEF_SPEED;
401static u_int com_events; /* input chars + weighted output completions */
402static bool_t sio_registered;
403static int sio_timeout;
404static int sio_timeouts_until_log;
405static struct callout_handle sio_timeout_handle
406 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
407#if 0 /* XXX */
408static struct tty *sio_tty[NSIO];
409#else
410static struct tty sio_tty[NSIO];
411#endif
412static const int nsio_tty = NSIO;
413
414#ifdef CyDebug
415static u_int cd_inbs;
416static u_int cy_inbs;
417static u_int cd_outbs;
418static u_int cy_outbs;
419static u_int cy_svrr_probes;
420static u_int cy_timeouts;
421#endif
422
423static int cy_chip_offset[] = {
424 0x0000, 0x0400, 0x0800, 0x0c00, 0x0200, 0x0600, 0x0a00, 0x0e00,
425};
426static int cy_nr_cd1400s[NCY];
427static int cy_total_devices;
428#undef RxFifoThreshold
429static int volatile RxFifoThreshold = (CD1400_RX_FIFO_SIZE / 2);
430
431static int
432sioprobe(dev)
433 struct isa_device *dev;
434{
435 cy_addr iobase;
436
437 iobase = (cy_addr)dev->id_maddr;
438
439 /* Cyclom-16Y hardware reset (Cyclom-8Ys don't care) */
440 cy_inb(iobase, CY16_RESET, 0); /* XXX? */
441 DELAY(500); /* wait for the board to get its act together */
442
443 /* this is needed to get the board out of reset */
444 cy_outb(iobase, CY_CLEAR_INTR, 0, 0);
445 DELAY(500);
446
447 return (cy_units(iobase, 0) == 0 ? 0 : -1);
448}
449
450static int
451cy_units(cy_iobase, cy_align)
452 cy_addr cy_iobase;
453 int cy_align;
454{
455 int cyu;
456 u_char firmware_version;
457 int i;
458 cy_addr iobase;
459
460 for (cyu = 0; cyu < CY_MAX_CD1400s; ++cyu) {
461 iobase = cy_iobase + (cy_chip_offset[cyu] << cy_align);
462
463 /* wait for chip to become ready for new command */
464 for (i = 0; i < 10; i++) {
465 DELAY(50);
466 if (!cd_inb(iobase, CD1400_CCR, cy_align))
467 break;
468 }
469
470 /* clear the GFRCR register */
471 cd_outb(iobase, CD1400_GFRCR, cy_align, 0);
472
473 /* issue a reset command */
474 cd_outb(iobase, CD1400_CCR, cy_align,
475 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET);
476
477 /* wait for the CD1400 to initialize itself */
478 for (i = 0; i < 200; i++) {
479 DELAY(50);
480
481 /* retrieve firmware version */
482 firmware_version = cd_inb(iobase, CD1400_GFRCR,
483 cy_align);
484 if ((firmware_version & 0xf0) == 0x40)
485 break;
486 }
487
488 /*
489 * Anything in the 0x40-0x4F range is fine.
490 * If one CD1400 is bad then we don't support higher
491 * numbered good ones on this board.
492 */
493 if ((firmware_version & 0xf0) != 0x40)
494 break;
495 }
496 return (cyu);
497}
498
499static int
500sioattach(isdp)
501 struct isa_device *isdp;
502{
503 int adapter;
504
505 adapter = cyattach_common((cy_addr) isdp->id_maddr, 0);
506 if (adapter < 0)
507 return (0);
508
509 /*
510 * XXX
511 * This kludge is to allow ISA/PCI device specifications in the
512 * kernel config file to be in any order.
513 */
514 if (isdp->id_unit != adapter) {
515 printf("cy%d: attached as cy%d\n", isdp->id_unit, adapter);
516 isdp->id_unit = adapter; /* XXX */
517 }
518 isdp->id_ointr = siointr;
519 /* isdp->id_ri_flags |= RI_FAST; XXX unimplemented - use newbus! */
520 return (1);
521}
522
523int
524cyattach_common(cy_iobase, cy_align)
525 cy_addr cy_iobase;
526 int cy_align;
527{
528 int adapter;
529 int cyu;
530 u_char firmware_version;
531 cy_addr iobase;
532 int minorbase;
533 int ncyu;
534 int unit;
535
536 adapter = cy_total_devices;
537 if ((u_int)adapter >= NCY) {
538 printf(
539 "cy%d: can't attach adapter: insufficient cy devices configured\n",
540 adapter);
541 return (-1);
542 }
543 ncyu = cy_units(cy_iobase, cy_align);
544 if (ncyu == 0)
545 return (-1);
546 cy_nr_cd1400s[adapter] = ncyu;
547 cy_total_devices++;
548
549 unit = adapter * CY_MAX_PORTS;
550 for (cyu = 0; cyu < ncyu; ++cyu) {
551 int cdu;
552
553 iobase = (cy_addr) (cy_iobase
554 + (cy_chip_offset[cyu] << cy_align));
555 firmware_version = cd_inb(iobase, CD1400_GFRCR, cy_align);
556
557 /* Set up a receive timeout period of than 1+ ms. */
558 cd_outb(iobase, CD1400_PPR, cy_align,
559 howmany(CY_CLOCK(firmware_version)
560 / CD1400_PPR_PRESCALER, 1000));
561
562 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; ++cdu, ++unit) {
563 struct com_s *com;
564 int s;
565
566 com = malloc(sizeof *com, M_DEVBUF, M_NOWAIT);
567 if (com == NULL)
568 break;
569 bzero(com, sizeof *com);
570 com->unit = unit;
571 com->gfrcr_image = firmware_version;
572 if (CY_RTS_DTR_SWAPPED(firmware_version)) {
573 com->mcr_dtr = MCR_RTS;
574 com->mcr_rts = MCR_DTR;
575 com->mcr_rts_reg = CD1400_MSVR2;
576 } else {
577 com->mcr_dtr = MCR_DTR;
578 com->mcr_rts = MCR_RTS;
579 com->mcr_rts_reg = CD1400_MSVR1;
580 }
581 com->dtr_wait = 3 * hz;
582 com->obufs[0].l_head = com->obuf1;
583 com->obufs[1].l_head = com->obuf2;
584
585 com->cy_align = cy_align;
586 com->cy_iobase = cy_iobase;
587 com->iobase = iobase;
588 com->car = ~CD1400_CAR_CHAN;
589
590 /*
591 * We don't use all the flags from <sys/ttydefaults.h> since they
592 * are only relevant for logins. It's important to have echo off
593 * initially so that the line doesn't start blathering before the
594 * echo flag can be turned off.
595 */
596 com->it_in.c_iflag = 0;
597 com->it_in.c_oflag = 0;
598 com->it_in.c_cflag = TTYDEF_CFLAG;
599 com->it_in.c_lflag = 0;
600 if (unit == comconsole) {
601 com->it_in.c_iflag = TTYDEF_IFLAG;
602 com->it_in.c_oflag = TTYDEF_OFLAG;
603 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
604 com->it_in.c_lflag = TTYDEF_LFLAG;
605 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL;
606 }
607 if (siosetwater(com, com->it_in.c_ispeed) != 0) {
608 enable_intr();
609 free(com, M_DEVBUF);
610 return (0);
611 }
612 enable_intr();
613 termioschars(&com->it_in);
614 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate;
615 com->it_out = com->it_in;
616
617 s = spltty();
618 com_addr(unit) = com;
619 splx(s);
620
621 if (!sio_registered) {
622 cdevsw_add(&sio_cdevsw);
623 register_swi(SWI_TTY, siopoll);
624 sio_registered = TRUE;
625 }
626 minorbase = UNIT_TO_MINOR(unit);
627 make_dev(&sio_cdevsw, minorbase,
628 UID_ROOT, GID_WHEEL, 0600, "ttyc%r%r", adapter,
629 unit % CY_MAX_PORTS);
630 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE,
631 UID_ROOT, GID_WHEEL, 0600, "ttyic%r%r", adapter,
632 unit % CY_MAX_PORTS);
633 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE,
634 UID_ROOT, GID_WHEEL, 0600, "ttylc%r%r", adapter,
635 unit % CY_MAX_PORTS);
636 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
637 UID_UUCP, GID_DIALER, 0660, "cuac%r%r", adapter,
638 unit % CY_MAX_PORTS);
639 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
640 UID_UUCP, GID_DIALER, 0660, "cuaic%r%r", adapter,
641 unit % CY_MAX_PORTS);
642 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
643 UID_UUCP, GID_DIALER, 0660, "cualc%r%r", adapter,
644 unit % CY_MAX_PORTS);
645 }
646 }
647
648 /* ensure an edge for the next interrupt */
649 cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
650
651 return (adapter);
652}
653
654static int
dadab5e9 655sioopen(dev_t dev; int flag; int mode; struct thread *td)
984263bc
MD
656{
657 struct com_s *com;
658 int error;
659 int mynor;
660 int s;
661 struct tty *tp;
662 int unit;
663
664 mynor = minor(dev);
665 unit = MINOR_TO_UNIT(mynor);
666 if ((u_int) unit >= NSIO || (com = com_addr(unit)) == NULL)
667 return (ENXIO);
668 if (mynor & CONTROL_MASK)
669 return (0);
670#if 0 /* XXX */
671 tp = com->tp = sio_tty[unit] = ttymalloc(sio_tty[unit]);
672#else
673 tp = com->tp = &sio_tty[unit];
674#endif
675 dev->si_tty = tp;
676 s = spltty();
677 /*
678 * We jump to this label after all non-interrupted sleeps to pick
679 * up any changes of the device state.
680 */
681open_top:
682 while (com->state & CS_DTR_OFF) {
683 error = tsleep(&com->dtr_wait, TTIPRI | PCATCH, "cydtr", 0);
684 if (error != 0)
685 goto out;
686 }
687 if (tp->t_state & TS_ISOPEN) {
688 /*
689 * The device is open, so everything has been initialized.
690 * Handle conflicts.
691 */
692 if (mynor & CALLOUT_MASK) {
693 if (!com->active_out) {
694 error = EBUSY;
695 goto out;
696 }
697 } else {
698 if (com->active_out) {
699 if (flag & O_NONBLOCK) {
700 error = EBUSY;
701 goto out;
702 }
703 error = tsleep(&com->active_out,
704 TTIPRI | PCATCH, "cybi", 0);
705 if (error != 0)
706 goto out;
707 goto open_top;
708 }
709 }
710 if (tp->t_state & TS_XCLUDE &&
dadab5e9 711 suser(td)) {
984263bc
MD
712 error = EBUSY;
713 goto out;
714 }
715 } else {
716 /*
717 * The device isn't open, so there are no conflicts.
718 * Initialize it. Initialization is done twice in many
719 * cases: to preempt sleeping callin opens if we are
720 * callout, and to complete a callin open after DCD rises.
721 */
722 tp->t_oproc = comstart;
723 tp->t_stop = comstop;
724 tp->t_param = comparam;
725 tp->t_dev = dev;
726 tp->t_termios = mynor & CALLOUT_MASK
727 ? com->it_out : com->it_in;
728
729 /* Encode per-board unit in LIVR for access in intr routines. */
730 cd_setreg(com, CD1400_LIVR,
731 (unit & CD1400_xIVR_CHAN) << CD1400_xIVR_CHAN_SHIFT);
732
733 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET);
734#if 0
735 com->poll = com->no_irq;
736 com->poll_output = com->loses_outints;
737#endif
738 ++com->wopeners;
739 error = comparam(tp, &tp->t_termios);
740 --com->wopeners;
741 if (error != 0)
742 goto out;
743#if 0
744 if (com->hasfifo) {
745 /*
746 * (Re)enable and flush fifos.
747 *
748 * Certain SMC chips cause problems if the fifos
749 * are enabled while input is ready. Turn off the
750 * fifo if necessary to clear the input. We test
751 * the input ready bit after enabling the fifos
752 * since we've already enabled them in comparam()
753 * and to handle races between enabling and fresh
754 * input.
755 */
756 while (TRUE) {
757 outb(iobase + com_fifo,
758 FIFO_RCV_RST | FIFO_XMT_RST
759 | com->fifo_image);
760 DELAY(100);
761 if (!(inb(com->line_status_port) & LSR_RXRDY))
762 break;
763 outb(iobase + com_fifo, 0);
764 DELAY(100);
765 (void) inb(com->data_port);
766 }
767 }
768
769 disable_intr();
770 (void) inb(com->line_status_port);
771 (void) inb(com->data_port);
772 com->prev_modem_status = com->last_modem_status
773 = inb(com->modem_status_port);
774 outb(iobase + com_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS
775 | IER_EMSC);
776 enable_intr();
777#else /* !0 */
778 /*
779 * Flush fifos. This requires a full channel reset which
780 * also disables the transmitter and receiver. Recover
781 * from this.
782 */
783 cd1400_channel_cmd(com,
784 CD1400_CCR_CMDRESET | CD1400_CCR_CHANRESET);
785 cd1400_channel_cmd(com, com->channel_control);
786
787 disable_intr();
788 com->prev_modem_status = com->last_modem_status
789 = cd_getreg(com, CD1400_MSVR2);
790 cd_setreg(com, CD1400_SRER,
791 com->intr_enable
792 = CD1400_SRER_MDMCH | CD1400_SRER_RXDATA);
793 enable_intr();
794#endif /* 0 */
795 /*
796 * Handle initial DCD. Callout devices get a fake initial
797 * DCD (trapdoor DCD). If we are callout, then any sleeping
798 * callin opens get woken up and resume sleeping on "cybi"
799 * instead of "cydcd".
800 */
801 /*
802 * XXX `mynor & CALLOUT_MASK' should be
803 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
804 * TRAPDOOR_CARRIER is the default initial state for callout
805 * devices and SOFT_CARRIER is like CLOCAL except it hides
806 * the true carrier.
807 */
808 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
809 (*linesw[tp->t_line].l_modem)(tp, 1);
810 }
811 /*
812 * Wait for DCD if necessary.
813 */
814 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
815 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
816 ++com->wopeners;
817 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "cydcd", 0);
818 --com->wopeners;
819 if (error != 0)
820 goto out;
821 goto open_top;
822 }
823 error = (*linesw[tp->t_line].l_open)(dev, tp);
824 disc_optim(tp, &tp->t_termios, com);
825 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
826 com->active_out = TRUE;
827 siosettimeout();
828out:
829 splx(s);
830 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
831 comhardclose(com);
832 return (error);
833}
834
835static int
dadab5e9 836sioclose(dev_t dev, int flag, int mode, struct thread *td)
984263bc
MD
837{
838 struct com_s *com;
839 int mynor;
840 int s;
841 struct tty *tp;
842
843 mynor = minor(dev);
844 if (mynor & CONTROL_MASK)
845 return (0);
846 com = com_addr(MINOR_TO_UNIT(mynor));
847 tp = com->tp;
848 s = spltty();
849 cd_etc(com, CD1400_ETC_STOPBREAK);
850 (*linesw[tp->t_line].l_close)(tp, flag);
851 disc_optim(tp, &tp->t_termios, com);
852 comstop(tp, FREAD | FWRITE);
853 comhardclose(com);
854 ttyclose(tp);
855 siosettimeout();
856 splx(s);
857#ifdef broken /* session holds a ref to the tty; can't deallocate */
858 ttyfree(tp);
859 com->tp = sio_tty[unit] = NULL;
860#endif
861 return (0);
862}
863
864static void
865comhardclose(com)
866 struct com_s *com;
867{
868 cy_addr iobase;
869 int s;
870 struct tty *tp;
871 int unit;
872
873 unit = com->unit;
874 iobase = com->iobase;
875 s = spltty();
876#if 0
877 com->poll = FALSE;
878 com->poll_output = FALSE;
879#endif
880 com->do_timestamp = 0;
881#if 0
882 outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
883#else
884 /* XXX */
885 disable_intr();
886 com->etc = ETC_NONE;
887 cd_setreg(com, CD1400_COR2, com->cor[1] &= ~CD1400_COR2_ETC);
888 enable_intr();
889 cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
890#endif
891
892 {
893#if 0
894 outb(iobase + com_ier, 0);
895#else
896 disable_intr();
897 cd_setreg(com, CD1400_SRER, com->intr_enable = 0);
898 enable_intr();
899#endif
900 tp = com->tp;
901 if ((tp->t_cflag & HUPCL)
902 /*
903 * XXX we will miss any carrier drop between here and the
904 * next open. Perhaps we should watch DCD even when the
905 * port is closed; it is not sufficient to check it at
906 * the next open because it might go up and down while
907 * we're not watching.
908 */
909 || (!com->active_out
910 && !(com->prev_modem_status & MSR_DCD)
911 && !(com->it_in.c_cflag & CLOCAL))
912 || !(tp->t_state & TS_ISOPEN)) {
913 (void)commctl(com, TIOCM_DTR, DMBIC);
914
915 /* Disable receiver (leave transmitter enabled). */
916 com->channel_control = CD1400_CCR_CMDCHANCTL
917 | CD1400_CCR_XMTEN
918 | CD1400_CCR_RCVDIS;
919 cd1400_channel_cmd(com, com->channel_control);
920
921 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) {
922 timeout(siodtrwakeup, com, com->dtr_wait);
923 com->state |= CS_DTR_OFF;
924 }
925 }
926 }
927#if 0
928 if (com->hasfifo) {
929 /*
930 * Disable fifos so that they are off after controlled
931 * reboots. Some BIOSes fail to detect 16550s when the
932 * fifos are enabled.
933 */
934 outb(iobase + com_fifo, 0);
935 }
936#endif
937 com->active_out = FALSE;
938 wakeup(&com->active_out);
939 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
940 splx(s);
941}
942
943static int
944siowrite(dev, uio, flag)
945 dev_t dev;
946 struct uio *uio;
947 int flag;
948{
949 int mynor;
950 struct tty *tp;
951 int unit;
952
953 mynor = minor(dev);
954 if (mynor & CONTROL_MASK)
955 return (ENODEV);
956
957 unit = MINOR_TO_UNIT(mynor);
958 tp = com_addr(unit)->tp;
959 /*
960 * (XXX) We disallow virtual consoles if the physical console is
961 * a serial port. This is in case there is a display attached that
962 * is not the console. In that situation we don't need/want the X
963 * server taking over the console.
964 */
965 if (constty != NULL && unit == comconsole)
966 constty = NULL;
967#ifdef Smarts
968 /* XXX duplicate ttwrite(), but without so much output processing on
969 * CR & LF chars. Hardly worth the effort, given that high-throughput
970 * sessions are raw anyhow.
971 */
972#else
973 return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
974#endif
975}
976
977static void
978siodtrwakeup(chan)
979 void *chan;
980{
981 struct com_s *com;
982
983 com = (struct com_s *)chan;
984 com->state &= ~CS_DTR_OFF;
985 wakeup(&com->dtr_wait);
986}
987
988static void
989sioinput(com)
990 struct com_s *com;
991{
992 u_char *buf;
993 int incc;
994 u_char line_status;
995 int recv_data;
996 struct tty *tp;
997
998 buf = com->ibuf;
999 tp = com->tp;
1000 if (!(tp->t_state & TS_ISOPEN)) {
1001 com_events -= (com->iptr - com->ibuf);
1002 com->iptr = com->ibuf;
1003 return;
1004 }
1005 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1006 /*
1007 * Avoid the grotesquely inefficient lineswitch routine
1008 * (ttyinput) in "raw" mode. It usually takes about 450
1009 * instructions (that's without canonical processing or echo!).
1010 * slinput is reasonably fast (usually 40 instructions plus
1011 * call overhead).
1012 */
1013 do {
1014 enable_intr();
1015 incc = com->iptr - buf;
1016 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1017 && (com->state & CS_RTS_IFLOW
1018 || tp->t_iflag & IXOFF)
1019 && !(tp->t_state & TS_TBLOCK))
1020 ttyblock(tp);
1021 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1022 += b_to_q((char *)buf, incc, &tp->t_rawq);
1023 buf += incc;
1024 tk_nin += incc;
1025 tk_rawcc += incc;
1026 tp->t_rawcc += incc;
1027 ttwakeup(tp);
1028 if (tp->t_state & TS_TTSTOP
1029 && (tp->t_iflag & IXANY
1030 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1031 tp->t_state &= ~TS_TTSTOP;
1032 tp->t_lflag &= ~FLUSHO;
1033 comstart(tp);
1034 }
1035 disable_intr();
1036 } while (buf < com->iptr);
1037 } else {
1038 do {
1039 enable_intr();
1040 line_status = buf[com->ierroff];
1041 recv_data = *buf++;
1042 if (line_status
1043 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1044 if (line_status & LSR_BI)
1045 recv_data |= TTY_BI;
1046 if (line_status & LSR_FE)
1047 recv_data |= TTY_FE;
1048 if (line_status & LSR_OE)
1049 recv_data |= TTY_OE;
1050 if (line_status & LSR_PE)
1051 recv_data |= TTY_PE;
1052 }
1053 (*linesw[tp->t_line].l_rint)(recv_data, tp);
1054 disable_intr();
1055 } while (buf < com->iptr);
1056 }
1057 com_events -= (com->iptr - com->ibuf);
1058 com->iptr = com->ibuf;
1059
1060 /*
1061 * There is now room for another low-level buffer full of input,
1062 * so enable RTS if it is now disabled and there is room in the
1063 * high-level buffer.
1064 */
1065 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & com->mcr_rts) &&
1066 !(tp->t_state & TS_TBLOCK))
1067#if 0
1068 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1069#else
1070 cd_setreg(com, com->mcr_rts_reg,
1071 com->mcr_image |= com->mcr_rts);
1072#endif
1073}
1074
1075void
1076siointr(unit)
1077 int unit;
1078{
1079 int baseu;
1080 int cy_align;
1081 cy_addr cy_iobase;
1082 int cyu;
1083 cy_addr iobase;
1084 u_char status;
1085
1086 COM_LOCK(); /* XXX could this be placed down lower in the loop? */
1087
1088 baseu = unit * CY_MAX_PORTS;
1089 cy_align = com_addr(baseu)->cy_align;
1090 cy_iobase = com_addr(baseu)->cy_iobase;
1091
1092 /* check each CD1400 in turn */
1093 for (cyu = 0; cyu < cy_nr_cd1400s[unit]; ++cyu) {
1094 iobase = (cy_addr) (cy_iobase
1095 + (cy_chip_offset[cyu] << cy_align));
1096 /* poll to see if it has any work */
1097 status = cd_inb(iobase, CD1400_SVRR, cy_align);
1098 if (status == 0)
1099 continue;
1100#ifdef CyDebug
1101 ++cy_svrr_probes;
1102#endif
1103 /* service requests as appropriate, giving priority to RX */
1104 if (status & CD1400_SVRR_RXRDY) {
1105 struct com_s *com;
1106 u_int count;
1107 u_char *ioptr;
1108 u_char line_status;
1109 u_char recv_data;
1110 u_char serv_type;
1111#ifdef PollMode
1112 u_char save_rir;
1113#endif
1114
1115#ifdef PollMode
1116 save_rir = cd_inb(iobase, CD1400_RIR, cy_align);
1117
1118 /* enter rx service */
1119 cd_outb(iobase, CD1400_CAR, cy_align, save_rir);
1120 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1121 = save_rir & CD1400_CAR_CHAN;
1122
1123 serv_type = cd_inb(iobase, CD1400_RIVR, cy_align);
1124 com = com_addr(baseu
1125 + ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
1126 & CD1400_xIVR_CHAN));
1127#else
1128 /* ack receive service */
1129 serv_type = cy_inb(iobase, CY8_SVCACKR, cy_align);
1130
1131 com = com_addr(baseu +
1132 + ((serv_type >> CD1400_xIVR_CHAN_SHIFT)
1133 & CD1400_xIVR_CHAN));
1134#endif
1135
1136 if (serv_type & CD1400_RIVR_EXCEPTION) {
1137 ++com->recv_exception;
1138 line_status = cd_inb(iobase, CD1400_RDSR, cy_align);
1139 /* break/unnattached error bits or real input? */
1140 recv_data = cd_inb(iobase, CD1400_RDSR, cy_align);
1141#ifndef SOFT_HOTCHAR
1142 if (line_status & CD1400_RDSR_SPECIAL
1143 && com->hotchar != 0)
1144 setsofttty();
1145#endif
1146#if 1 /* XXX "intelligent" PFO error handling would break O error handling */
1147 if (line_status & (LSR_PE|LSR_FE|LSR_BI)) {
1148 /*
1149 Don't store PE if IGNPAR and BI if IGNBRK,
1150 this hack allows "raw" tty optimization
1151 works even if IGN* is set.
1152 */
1153 if ( com->tp == NULL
1154 || !(com->tp->t_state & TS_ISOPEN)
1155 || ((line_status & (LSR_PE|LSR_FE))
1156 && (com->tp->t_iflag & IGNPAR))
1157 || ((line_status & LSR_BI)
1158 && (com->tp->t_iflag & IGNBRK)))
1159 goto cont;
1160 if ( (line_status & (LSR_PE|LSR_FE))
1161 && (com->tp->t_state & TS_CAN_BYPASS_L_RINT)
1162 && ((line_status & LSR_FE)
1163 || ((line_status & LSR_PE)
1164 && (com->tp->t_iflag & INPCK))))
1165 recv_data = 0;
1166 }
1167#endif /* 1 */
1168 ++com->bytes_in;
1169#ifdef SOFT_HOTCHAR
1170 if (com->hotchar != 0 && recv_data == com->hotchar)
1171 setsofttty();
1172#endif
1173 ioptr = com->iptr;
1174 if (ioptr >= com->ibufend)
1175 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1176 else {
1177 if (com->do_timestamp)
1178 microtime(&com->timestamp);
1179 ++com_events;
1180 ioptr[0] = recv_data;
1181 ioptr[com->ierroff] = line_status;
1182 com->iptr = ++ioptr;
1183 if (ioptr == com->ihighwater
1184 && com->state & CS_RTS_IFLOW)
1185#if 0
1186 outb(com->modem_ctl_port,
1187 com->mcr_image &= ~MCR_RTS);
1188#else
1189 cd_outb(iobase, com->mcr_rts_reg,
1190 cy_align,
1191 com->mcr_image &=
1192 ~com->mcr_rts);
1193#endif
1194 if (line_status & LSR_OE)
1195 CE_RECORD(com, CE_OVERRUN);
1196 }
1197 goto cont;
1198 } else {
1199 int ifree;
1200
1201 count = cd_inb(iobase, CD1400_RDCR, cy_align);
1202 if (!count)
1203 goto cont;
1204 com->bytes_in += count;
1205 ioptr = com->iptr;
1206 ifree = com->ibufend - ioptr;
1207 if (count > ifree) {
1208 count -= ifree;
1209 com_events += ifree;
1210 if (ifree != 0) {
1211 if (com->do_timestamp)
1212 microtime(&com->timestamp);
1213 do {
1214 recv_data = cd_inb(iobase,
1215 CD1400_RDSR,
1216 cy_align);
1217#ifdef SOFT_HOTCHAR
1218 if (com->hotchar != 0
1219 && recv_data
1220 == com->hotchar)
1221 setsofttty();
1222#endif
1223 ioptr[0] = recv_data;
1224 ioptr[com->ierroff] = 0;
1225 ++ioptr;
1226 } while (--ifree != 0);
1227 }
1228 com->delta_error_counts
1229 [CE_INTERRUPT_BUF_OVERFLOW] += count;
1230 do {
1231 recv_data = cd_inb(iobase, CD1400_RDSR,
1232 cy_align);
1233#ifdef SOFT_HOTCHAR
1234 if (com->hotchar != 0
1235 && recv_data == com->hotchar)
1236 setsofttty();
1237#endif
1238 } while (--count != 0);
1239 } else {
1240 if (com->do_timestamp)
1241 microtime(&com->timestamp);
1242 if (ioptr <= com->ihighwater
1243 && ioptr + count > com->ihighwater
1244 && com->state & CS_RTS_IFLOW)
1245#if 0
1246 outb(com->modem_ctl_port,
1247 com->mcr_image &= ~MCR_RTS);
1248#else
1249 cd_outb(iobase, com->mcr_rts_reg,
1250 cy_align,
1251 com->mcr_image
1252 &= ~com->mcr_rts);
1253#endif
1254 com_events += count;
1255 do {
1256 recv_data = cd_inb(iobase, CD1400_RDSR,
1257 cy_align);
1258#ifdef SOFT_HOTCHAR
1259 if (com->hotchar != 0
1260 && recv_data == com->hotchar)
1261 setsofttty();
1262#endif
1263 ioptr[0] = recv_data;
1264 ioptr[com->ierroff] = 0;
1265 ++ioptr;
1266 } while (--count != 0);
1267 }
1268 com->iptr = ioptr;
1269 }
1270cont:
1271
1272 /* terminate service context */
1273#ifdef PollMode
1274 cd_outb(iobase, CD1400_RIR, cy_align,
1275 save_rir
1276 & ~(CD1400_RIR_RDIREQ | CD1400_RIR_RBUSY));
1277#else
1278 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1279#endif
1280 }
1281 if (status & CD1400_SVRR_MDMCH) {
1282 struct com_s *com;
1283 u_char modem_status;
1284#ifdef PollMode
1285 u_char save_mir;
1286#else
1287 u_char vector;
1288#endif
1289
1290#ifdef PollMode
1291 save_mir = cd_inb(iobase, CD1400_MIR, cy_align);
1292
1293 /* enter modem service */
1294 cd_outb(iobase, CD1400_CAR, cy_align, save_mir);
1295 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1296 = save_mir & CD1400_CAR_CHAN;
1297
1298 com = com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS
1299 + (save_mir & CD1400_MIR_CHAN));
1300#else
1301 /* ack modem service */
1302 vector = cy_inb(iobase, CY8_SVCACKM, cy_align);
1303
1304 com = com_addr(baseu
1305 + ((vector >> CD1400_xIVR_CHAN_SHIFT)
1306 & CD1400_xIVR_CHAN));
1307#endif
1308 ++com->mdm;
1309 modem_status = cd_inb(iobase, CD1400_MSVR2, cy_align);
1310 if (modem_status != com->last_modem_status) {
1311 if (com->do_dcd_timestamp
1312 && !(com->last_modem_status & MSR_DCD)
1313 && modem_status & MSR_DCD)
1314 microtime(&com->dcd_timestamp);
1315
1316 /*
1317 * Schedule high level to handle DCD changes. Note
1318 * that we don't use the delta bits anywhere. Some
1319 * UARTs mess them up, and it's easy to remember the
1320 * previous bits and calculate the delta.
1321 */
1322 com->last_modem_status = modem_status;
1323 if (!(com->state & CS_CHECKMSR)) {
1324 com_events += LOTS_OF_EVENTS;
1325 com->state |= CS_CHECKMSR;
1326 setsofttty();
1327 }
1328
1329#ifdef SOFT_CTS_OFLOW
1330 /* handle CTS change immediately for crisp flow ctl */
1331 if (com->state & CS_CTS_OFLOW) {
1332 if (modem_status & MSR_CTS) {
1333 com->state |= CS_ODEVREADY;
1334 if (com->state >= (CS_BUSY | CS_TTGO
1335 | CS_ODEVREADY)
1336 && !(com->intr_enable
1337 & CD1400_SRER_TXRDY))
1338 cd_outb(iobase, CD1400_SRER,
1339 cy_align,
1340 com->intr_enable
1341 = com->intr_enable
1342 & ~CD1400_SRER_TXMPTY
1343 | CD1400_SRER_TXRDY);
1344 } else {
1345 com->state &= ~CS_ODEVREADY;
1346 if (com->intr_enable
1347 & CD1400_SRER_TXRDY)
1348 cd_outb(iobase, CD1400_SRER,
1349 cy_align,
1350 com->intr_enable
1351 = com->intr_enable
1352 & ~CD1400_SRER_TXRDY
1353 | CD1400_SRER_TXMPTY);
1354 }
1355 }
1356#endif
1357 }
1358
1359 /* terminate service context */
1360#ifdef PollMode
1361 cd_outb(iobase, CD1400_MIR, cy_align,
1362 save_mir
1363 & ~(CD1400_MIR_RDIREQ | CD1400_MIR_RBUSY));
1364#else
1365 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1366#endif
1367 }
1368 if (status & CD1400_SVRR_TXRDY) {
1369 struct com_s *com;
1370#ifdef PollMode
1371 u_char save_tir;
1372#else
1373 u_char vector;
1374#endif
1375
1376#ifdef PollMode
1377 save_tir = cd_inb(iobase, CD1400_TIR, cy_align);
1378
1379 /* enter tx service */
1380 cd_outb(iobase, CD1400_CAR, cy_align, save_tir);
1381 com_addr(baseu + cyu * CD1400_NO_OF_CHANNELS)->car
1382 = save_tir & CD1400_CAR_CHAN;
1383
1384 com = com_addr(baseu
1385 + cyu * CD1400_NO_OF_CHANNELS
1386 + (save_tir & CD1400_TIR_CHAN));
1387#else
1388 /* ack transmit service */
1389 vector = cy_inb(iobase, CY8_SVCACKT, cy_align);
1390
1391 com = com_addr(baseu
1392 + ((vector >> CD1400_xIVR_CHAN_SHIFT)
1393 & CD1400_xIVR_CHAN));
1394#endif
1395
1396 if (com->etc != ETC_NONE) {
1397 if (com->intr_enable & CD1400_SRER_TXRDY) {
1398 /*
1399 * Here due to sloppy SRER_TXRDY
1400 * enabling. Ignore. Come back when
1401 * tx is empty.
1402 */
1403 cd_outb(iobase, CD1400_SRER, cy_align,
1404 com->intr_enable
1405 = (com->intr_enable
1406 & ~CD1400_SRER_TXRDY)
1407 | CD1400_SRER_TXMPTY);
1408 goto terminate_tx_service;
1409 }
1410 switch (com->etc) {
1411 case CD1400_ETC_SENDBREAK:
1412 case CD1400_ETC_STOPBREAK:
1413 /*
1414 * Start the command. Come back on
1415 * next tx empty interrupt, hopefully
1416 * after command has been executed.
1417 */
1418 cd_outb(iobase, CD1400_COR2, cy_align,
1419 com->cor[1] |= CD1400_COR2_ETC);
1420 cd_outb(iobase, CD1400_TDR, cy_align,
1421 CD1400_ETC_CMD);
1422 cd_outb(iobase, CD1400_TDR, cy_align,
1423 com->etc);
1424 if (com->etc == CD1400_ETC_SENDBREAK)
1425 com->etc = ETC_BREAK_STARTING;
1426 else
1427 com->etc = ETC_BREAK_ENDING;
1428 goto terminate_tx_service;
1429 case ETC_BREAK_STARTING:
1430 /*
1431 * BREAK is now on. Continue with
1432 * SRER_TXMPTY processing, hopefully
1433 * don't come back.
1434 */
1435 com->etc = ETC_BREAK_STARTED;
1436 break;
1437 case ETC_BREAK_STARTED:
1438 /*
1439 * Came back due to sloppy SRER_TXMPTY
1440 * enabling. Hope again.
1441 */
1442 break;
1443 case ETC_BREAK_ENDING:
1444 /*
1445 * BREAK is now off. Continue with
1446 * SRER_TXMPTY processing and don't
1447 * come back. The SWI handler will
1448 * restart tx interrupts if necessary.
1449 */
1450 cd_outb(iobase, CD1400_COR2, cy_align,
1451 com->cor[1]
1452 &= ~CD1400_COR2_ETC);
1453 com->etc = ETC_BREAK_ENDED;
1454 if (!(com->state & CS_ODONE)) {
1455 com_events += LOTS_OF_EVENTS;
1456 com->state |= CS_ODONE;
1457 setsofttty();
1458 }
1459 break;
1460 case ETC_BREAK_ENDED:
1461 /*
1462 * Shouldn't get here. Hope again.
1463 */
1464 break;
1465 }
1466 }
1467 if (com->intr_enable & CD1400_SRER_TXMPTY) {
1468 if (!(com->extra_state & CSE_ODONE)) {
1469 com_events += LOTS_OF_EVENTS;
1470 com->extra_state |= CSE_ODONE;
1471 setsofttty();
1472 }
1473 cd_outb(iobase, CD1400_SRER, cy_align,
1474 com->intr_enable
1475 &= ~CD1400_SRER_TXMPTY);
1476 goto terminate_tx_service;
1477 }
1478 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1479 u_char *ioptr;
1480 u_int ocount;
1481
1482 ioptr = com->obufq.l_head;
1483 ocount = com->obufq.l_tail - ioptr;
1484 if (ocount > CD1400_TX_FIFO_SIZE)
1485 ocount = CD1400_TX_FIFO_SIZE;
1486 com->bytes_out += ocount;
1487 do
1488 cd_outb(iobase, CD1400_TDR, cy_align,
1489 *ioptr++);
1490 while (--ocount != 0);
1491 com->obufq.l_head = ioptr;
1492 if (ioptr >= com->obufq.l_tail) {
1493 struct lbq *qp;
1494
1495 qp = com->obufq.l_next;
1496 qp->l_queued = FALSE;
1497 qp = qp->l_next;
1498 if (qp != NULL) {
1499 com->obufq.l_head = qp->l_head;
1500 com->obufq.l_tail = qp->l_tail;
1501 com->obufq.l_next = qp;
1502 } else {
1503 /* output just completed */
1504 com->state &= ~CS_BUSY;
1505
1506 /*
1507 * The setting of CSE_ODONE may be
1508 * stale here. We currently only
1509 * use it when CS_BUSY is set, and
1510 * fixing it when we clear CS_BUSY
1511 * is easiest.
1512 */
1513 if (com->extra_state & CSE_ODONE) {
1514 com_events -= LOTS_OF_EVENTS;
1515 com->extra_state &= ~CSE_ODONE;
1516 }
1517
1518 cd_outb(iobase, CD1400_SRER, cy_align,
1519 com->intr_enable
1520 = (com->intr_enable
1521 & ~CD1400_SRER_TXRDY)
1522 | CD1400_SRER_TXMPTY);
1523 }
1524 if (!(com->state & CS_ODONE)) {
1525 com_events += LOTS_OF_EVENTS;
1526 com->state |= CS_ODONE;
1527
1528 /* handle at high level ASAP */
1529 setsofttty();
1530 }
1531 }
1532 }
1533
1534 /* terminate service context */
1535terminate_tx_service:
1536#ifdef PollMode
1537 cd_outb(iobase, CD1400_TIR, cy_align,
1538 save_tir
1539 & ~(CD1400_TIR_RDIREQ | CD1400_TIR_RBUSY));
1540#else
1541 cd_outb(iobase, CD1400_EOSRR, cy_align, 0);
1542#endif
1543 }
1544 }
1545
1546 /* ensure an edge for the next interrupt */
1547 cy_outb(cy_iobase, CY_CLEAR_INTR, cy_align, 0);
1548
1549 schedsofttty();
1550
1551 COM_UNLOCK();
1552}
1553
1554#if 0
1555static void
1556siointr1(com)
1557 struct com_s *com;
1558{
1559}
1560#endif
1561
1562static int
dadab5e9 1563sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td)
984263bc
MD
1564{
1565 struct com_s *com;
1566 int error;
1567 int mynor;
1568 int s;
1569 struct tty *tp;
1570#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1571 int oldcmd;
1572 struct termios term;
1573#endif
1574
1575 mynor = minor(dev);
1576 com = com_addr(MINOR_TO_UNIT(mynor));
1577 if (mynor & CONTROL_MASK) {
1578 struct termios *ct;
1579
1580 switch (mynor & CONTROL_MASK) {
1581 case CONTROL_INIT_STATE:
1582 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in;
1583 break;
1584 case CONTROL_LOCK_STATE:
1585 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in;
1586 break;
1587 default:
1588 return (ENODEV); /* /dev/nodev */
1589 }
1590 switch (cmd) {
1591 case TIOCSETA:
dadab5e9 1592 error = suser(td);
984263bc
MD
1593 if (error != 0)
1594 return (error);
1595 *ct = *(struct termios *)data;
1596 return (0);
1597 case TIOCGETA:
1598 *(struct termios *)data = *ct;
1599 return (0);
1600 case TIOCGETD:
1601 *(int *)data = TTYDISC;
1602 return (0);
1603 case TIOCGWINSZ:
1604 bzero(data, sizeof(struct winsize));
1605 return (0);
1606 default:
1607 return (ENOTTY);
1608 }
1609 }
1610 tp = com->tp;
1611#if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1612 term = tp->t_termios;
1613 oldcmd = cmd;
1614 error = ttsetcompat(tp, &cmd, data, &term);
1615 if (error != 0)
1616 return (error);
1617 if (cmd != oldcmd)
1618 data = (caddr_t)&term;
1619#endif
1620 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
1621 int cc;
1622 struct termios *dt = (struct termios *)data;
1623 struct termios *lt = mynor & CALLOUT_MASK
1624 ? &com->lt_out : &com->lt_in;
1625
1626 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
1627 | (dt->c_iflag & ~lt->c_iflag);
1628 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
1629 | (dt->c_oflag & ~lt->c_oflag);
1630 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
1631 | (dt->c_cflag & ~lt->c_cflag);
1632 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
1633 | (dt->c_lflag & ~lt->c_lflag);
1634 for (cc = 0; cc < NCCS; ++cc)
1635 if (lt->c_cc[cc] != 0)
1636 dt->c_cc[cc] = tp->t_cc[cc];
1637 if (lt->c_ispeed != 0)
1638 dt->c_ispeed = tp->t_ispeed;
1639 if (lt->c_ospeed != 0)
1640 dt->c_ospeed = tp->t_ospeed;
1641 }
1642 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
1643 if (error != ENOIOCTL)
1644 return (error);
1645 s = spltty();
1646 error = ttioctl(tp, cmd, data, flag);
1647 disc_optim(tp, &tp->t_termios, com);
1648 if (error != ENOIOCTL) {
1649 splx(s);
1650 return (error);
1651 }
1652 switch (cmd) {
1653 case TIOCSBRK:
1654#if 0
1655 outb(iobase + com_cfcr, com->cfcr_image |= CFCR_SBREAK);
1656#else
1657 cd_etc(com, CD1400_ETC_SENDBREAK);
1658#endif
1659 break;
1660 case TIOCCBRK:
1661#if 0
1662 outb(iobase + com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1663#else
1664 cd_etc(com, CD1400_ETC_STOPBREAK);
1665#endif
1666 break;
1667 case TIOCSDTR:
1668 (void)commctl(com, TIOCM_DTR, DMBIS);
1669 break;
1670 case TIOCCDTR:
1671 (void)commctl(com, TIOCM_DTR, DMBIC);
1672 break;
1673 /*
1674 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
1675 * changes get undone on the next call to comparam().
1676 */
1677 case TIOCMSET:
1678 (void)commctl(com, *(int *)data, DMSET);
1679 break;
1680 case TIOCMBIS:
1681 (void)commctl(com, *(int *)data, DMBIS);
1682 break;
1683 case TIOCMBIC:
1684 (void)commctl(com, *(int *)data, DMBIC);
1685 break;
1686 case TIOCMGET:
1687 *(int *)data = commctl(com, 0, DMGET);
1688 break;
1689 case TIOCMSDTRWAIT:
1690 /* must be root since the wait applies to following logins */
dadab5e9 1691 error = suser(td);
984263bc
MD
1692 if (error != 0) {
1693 splx(s);
1694 return (error);
1695 }
1696 com->dtr_wait = *(int *)data * hz / 100;
1697 break;
1698 case TIOCMGDTRWAIT:
1699 *(int *)data = com->dtr_wait * 100 / hz;
1700 break;
1701 case TIOCTIMESTAMP:
1702 com->do_timestamp = TRUE;
1703 *(struct timeval *)data = com->timestamp;
1704 break;
1705 case TIOCDCDTIMESTAMP:
1706 com->do_dcd_timestamp = TRUE;
1707 *(struct timeval *)data = com->dcd_timestamp;
1708 break;
1709 default:
1710 splx(s);
1711 return (ENOTTY);
1712 }
1713 splx(s);
1714 return (0);
1715}
1716
1717static void
1718siopoll()
1719{
1720 int unit;
1721
1722#ifdef CyDebug
1723 ++cy_timeouts;
1724#endif
1725 if (com_events == 0)
1726 return;
1727repeat:
1728 for (unit = 0; unit < NSIO; ++unit) {
1729 struct com_s *com;
1730 int incc;
1731 struct tty *tp;
1732
1733 com = com_addr(unit);
1734 if (com == NULL)
1735 continue;
1736 tp = com->tp;
1737 if (tp == NULL) {
1738 /*
1739 * XXX forget any events related to closed devices
1740 * (actually never opened devices) so that we don't
1741 * loop.
1742 */
1743 disable_intr();
1744 incc = com->iptr - com->ibuf;
1745 com->iptr = com->ibuf;
1746 if (com->state & CS_CHECKMSR) {
1747 incc += LOTS_OF_EVENTS;
1748 com->state &= ~CS_CHECKMSR;
1749 }
1750 com_events -= incc;
1751 enable_intr();
1752 if (incc != 0)
1753 log(LOG_DEBUG,
1754 "sio%d: %d events for device with no tp\n",
1755 unit, incc);
1756 continue;
1757 }
1758 if (com->iptr != com->ibuf) {
1759 disable_intr();
1760 sioinput(com);
1761 enable_intr();
1762 }
1763 if (com->state & CS_CHECKMSR) {
1764 u_char delta_modem_status;
1765
1766 disable_intr();
1767 delta_modem_status = com->last_modem_status
1768 ^ com->prev_modem_status;
1769 com->prev_modem_status = com->last_modem_status;
1770 com_events -= LOTS_OF_EVENTS;
1771 com->state &= ~CS_CHECKMSR;
1772 enable_intr();
1773 if (delta_modem_status & MSR_DCD)
1774 (*linesw[tp->t_line].l_modem)
1775 (tp, com->prev_modem_status & MSR_DCD);
1776 }
1777 if (com->extra_state & CSE_ODONE) {
1778 disable_intr();
1779 com_events -= LOTS_OF_EVENTS;
1780 com->extra_state &= ~CSE_ODONE;
1781 enable_intr();
1782 if (!(com->state & CS_BUSY)) {
1783 tp->t_state &= ~TS_BUSY;
1784 ttwwakeup(com->tp);
1785 }
1786 if (com->etc != ETC_NONE) {
1787 if (com->etc == ETC_BREAK_ENDED)
1788 com->etc = ETC_NONE;
1789 wakeup(&com->etc);
1790 }
1791 }
1792 if (com->state & CS_ODONE) {
1793 disable_intr();
1794 com_events -= LOTS_OF_EVENTS;
1795 com->state &= ~CS_ODONE;
1796 enable_intr();
1797 (*linesw[tp->t_line].l_start)(tp);
1798 }
1799 if (com_events == 0)
1800 break;
1801 }
1802 if (com_events >= LOTS_OF_EVENTS)
1803 goto repeat;
1804}
1805
1806static int
1807comparam(tp, t)
1808 struct tty *tp;
1809 struct termios *t;
1810{
1811 int bits;
1812 int cflag;
1813 struct com_s *com;
1814 u_char cor_change;
1815 u_long cy_clock;
1816 int idivisor;
1817 int iflag;
1818 int iprescaler;
1819 int itimeout;
1820 int odivisor;
1821 int oprescaler;
1822 u_char opt;
1823 int s;
1824 int unit;
1825
1826 /* do historical conversions */
1827 if (t->c_ispeed == 0)
1828 t->c_ispeed = t->c_ospeed;
1829
1830 unit = DEV_TO_UNIT(tp->t_dev);
1831 com = com_addr(unit);
1832
1833 /* check requested parameters */
1834 cy_clock = CY_CLOCK(com->gfrcr_image);
1835 idivisor = comspeed(t->c_ispeed, cy_clock, &iprescaler);
1836 if (idivisor < 0)
1837 return (EINVAL);
1838 odivisor = comspeed(t->c_ospeed, cy_clock, &oprescaler);
1839 if (odivisor < 0)
1840 return (EINVAL);
1841
1842 /* parameters are OK, convert them to the com struct and the device */
1843 s = spltty();
1844 if (odivisor == 0)
1845 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */
1846 else
1847 (void)commctl(com, TIOCM_DTR, DMBIS);
1848
1849 /*
1850 * This returns with interrupts disabled so that we can complete
1851 * the speed change atomically.
1852 */
1853 (void) siosetwater(com, t->c_ispeed);
1854
1855 /* XXX we don't actually change the speed atomically. */
1856 enable_intr();
1857
1858 if (idivisor != 0) {
1859 cd_setreg(com, CD1400_RBPR, idivisor);
1860 cd_setreg(com, CD1400_RCOR, iprescaler);
1861 }
1862 if (odivisor != 0) {
1863 cd_setreg(com, CD1400_TBPR, odivisor);
1864 cd_setreg(com, CD1400_TCOR, oprescaler);
1865 }
1866
1867 /*
1868 * channel control
1869 * receiver enable
1870 * transmitter enable (always set)
1871 */
1872 cflag = t->c_cflag;
1873 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN
1874 | (cflag & CREAD ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS);
1875 if (opt != com->channel_control) {
1876 com->channel_control = opt;
1877 cd1400_channel_cmd(com, opt);
1878 }
1879
1880#ifdef Smarts
1881 /* set special chars */
1882 /* XXX if one is _POSIX_VDISABLE, can't use some others */
1883 if (t->c_cc[VSTOP] != _POSIX_VDISABLE)
1884 cd_setreg(com, CD1400_SCHR1, t->c_cc[VSTOP]);
1885 if (t->c_cc[VSTART] != _POSIX_VDISABLE)
1886 cd_setreg(com, CD1400_SCHR2, t->c_cc[VSTART]);
1887 if (t->c_cc[VINTR] != _POSIX_VDISABLE)
1888 cd_setreg(com, CD1400_SCHR3, t->c_cc[VINTR]);
1889 if (t->c_cc[VSUSP] != _POSIX_VDISABLE)
1890 cd_setreg(com, CD1400_SCHR4, t->c_cc[VSUSP]);
1891#endif
1892
1893 /*
1894 * set channel option register 1 -
1895 * parity mode
1896 * stop bits
1897 * char length
1898 */
1899 opt = 0;
1900 /* parity */
1901 if (cflag & PARENB) {
1902 if (cflag & PARODD)
1903 opt |= CD1400_COR1_PARODD;
1904 opt |= CD1400_COR1_PARNORMAL;
1905 }
1906 iflag = t->c_iflag;
1907 if (!(iflag & INPCK))
1908 opt |= CD1400_COR1_NOINPCK;
1909 bits = 1 + 1;
1910 /* stop bits */
1911 if (cflag & CSTOPB) {
1912 ++bits;
1913 opt |= CD1400_COR1_STOP2;
1914 }
1915 /* char length */
1916 switch (cflag & CSIZE) {
1917 case CS5:
1918 bits += 5;
1919 opt |= CD1400_COR1_CS5;
1920 break;
1921 case CS6:
1922 bits += 6;
1923 opt |= CD1400_COR1_CS6;
1924 break;
1925 case CS7:
1926 bits += 7;
1927 opt |= CD1400_COR1_CS7;
1928 break;
1929 default:
1930 bits += 8;
1931 opt |= CD1400_COR1_CS8;
1932 break;
1933 }
1934 cor_change = 0;
1935 if (opt != com->cor[0]) {
1936 cor_change |= CD1400_CCR_COR1;
1937 cd_setreg(com, CD1400_COR1, com->cor[0] = opt);
1938 }
1939
1940 /*
1941 * Set receive time-out period, normally to max(one char time, 5 ms).
1942 */
1943 if (t->c_ispeed == 0)
1944 itimeout = cd_getreg(com, CD1400_RTPR);
1945 else {
1946 itimeout = (1000 * bits + t->c_ispeed - 1) / t->c_ispeed;
1947#ifdef SOFT_HOTCHAR
1948#define MIN_RTP 1
1949#else
1950#define MIN_RTP 5
1951#endif
1952 if (itimeout < MIN_RTP)
1953 itimeout = MIN_RTP;
1954 }
1955 if (!(t->c_lflag & ICANON) && t->c_cc[VMIN] != 0 && t->c_cc[VTIME] != 0
1956 && t->c_cc[VTIME] * 10 > itimeout)
1957 itimeout = t->c_cc[VTIME] * 10;
1958 if (itimeout > 255)
1959 itimeout = 255;
1960 cd_setreg(com, CD1400_RTPR, itimeout);
1961
1962 /*
1963 * set channel option register 2 -
1964 * flow control
1965 */
1966 opt = 0;
1967#ifdef Smarts
1968 if (iflag & IXANY)
1969 opt |= CD1400_COR2_IXANY;
1970 if (iflag & IXOFF)
1971 opt |= CD1400_COR2_IXOFF;
1972#endif
1973#ifndef SOFT_CTS_OFLOW
1974 if (cflag & CCTS_OFLOW)
1975 opt |= CD1400_COR2_CCTS_OFLOW;
1976#endif
1977 disable_intr();
1978 if (opt != com->cor[1]) {
1979 cor_change |= CD1400_CCR_COR2;
1980 cd_setreg(com, CD1400_COR2, com->cor[1] = opt);
1981 }
1982 enable_intr();
1983
1984 /*
1985 * set channel option register 3 -
1986 * receiver FIFO interrupt threshold
1987 * flow control
1988 */
1989 opt = RxFifoThreshold;
1990#ifdef Smarts
1991 if (t->c_lflag & ICANON)
1992 opt |= CD1400_COR3_SCD34; /* detect INTR & SUSP chars */
1993 if (iflag & IXOFF)
1994 /* detect and transparently handle START and STOP chars */
1995 opt |= CD1400_COR3_FCT | CD1400_COR3_SCD12;
1996#endif
1997 if (opt != com->cor[2]) {
1998 cor_change |= CD1400_CCR_COR3;
1999 cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
2000 }
2001
2002 /* notify the CD1400 if COR1-3 have changed */
2003 if (cor_change)
2004 cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | cor_change);
2005
2006 /*
2007 * set channel option register 4 -
2008 * CR/NL processing
2009 * break processing
2010 * received exception processing
2011 */
2012 opt = 0;
2013 if (iflag & IGNCR)
2014 opt |= CD1400_COR4_IGNCR;
2015#ifdef Smarts
2016 /*
2017 * we need a new ttyinput() for this, as we don't want to
2018 * have ICRNL && INLCR being done in both layers, or to have
2019 * synchronisation problems
2020 */
2021 if (iflag & ICRNL)
2022 opt |= CD1400_COR4_ICRNL;
2023 if (iflag & INLCR)
2024 opt |= CD1400_COR4_INLCR;
2025#endif
2026 if (iflag & IGNBRK)
2027 opt |= CD1400_COR4_IGNBRK | CD1400_COR4_NOBRKINT;
2028 /*
2029 * The `-ignbrk -brkint parmrk' case is not handled by the hardware,
2030 * so only tell the hardware about -brkint if -parmrk.
2031 */
2032 if (!(iflag & (BRKINT | PARMRK)))
2033 opt |= CD1400_COR4_NOBRKINT;
2034#if 0
2035 /* XXX using this "intelligence" breaks reporting of overruns. */
2036 if (iflag & IGNPAR)
2037 opt |= CD1400_COR4_PFO_DISCARD;
2038 else {
2039 if (iflag & PARMRK)
2040 opt |= CD1400_COR4_PFO_ESC;
2041 else
2042 opt |= CD1400_COR4_PFO_NUL;
2043 }
2044#else
2045 opt |= CD1400_COR4_PFO_EXCEPTION;
2046#endif
2047 cd_setreg(com, CD1400_COR4, opt);
2048
2049 /*
2050 * set channel option register 5 -
2051 */
2052 opt = 0;
2053 if (iflag & ISTRIP)
2054 opt |= CD1400_COR5_ISTRIP;
2055 if (t->c_iflag & IEXTEN)
2056 /* enable LNEXT (e.g. ctrl-v quoting) handling */
2057 opt |= CD1400_COR5_LNEXT;
2058#ifdef Smarts
2059 if (t->c_oflag & ONLCR)
2060 opt |= CD1400_COR5_ONLCR;
2061 if (t->c_oflag & OCRNL)
2062 opt |= CD1400_COR5_OCRNL;
2063#endif
2064 cd_setreg(com, CD1400_COR5, opt);
2065
2066 /*
2067 * We always generate modem status change interrupts for CD changes.
2068 * Among other things, this is necessary to track TS_CARR_ON for
2069 * pstat to print even when the driver doesn't care. CD changes
2070 * should be rare so interrupts for them are not worth extra code to
2071 * avoid. We avoid interrupts for other modem status changes (except
2072 * for CTS changes when SOFT_CTS_OFLOW is configured) since this is
2073 * simplest and best.
2074 */
2075
2076 /*
2077 * set modem change option register 1
2078 * generate modem interrupts on which 1 -> 0 input transitions
2079 * also controls auto-DTR output flow-control, which we don't use
2080 */
2081 opt = CD1400_MCOR1_CDzd;
2082#ifdef SOFT_CTS_OFLOW
2083 if (cflag & CCTS_OFLOW)
2084 opt |= CD1400_MCOR1_CTSzd;
2085#endif
2086 cd_setreg(com, CD1400_MCOR1, opt);
2087
2088 /*
2089 * set modem change option register 2
2090 * generate modem interrupts on specific 0 -> 1 input transitions
2091 */
2092 opt = CD1400_MCOR2_CDod;
2093#ifdef SOFT_CTS_OFLOW
2094 if (cflag & CCTS_OFLOW)
2095 opt |= CD1400_MCOR2_CTSod;
2096#endif
2097 cd_setreg(com, CD1400_MCOR2, opt);
2098
2099 /*
2100 * XXX should have done this long ago, but there is too much state
2101 * to change all atomically.
2102 */
2103 disable_intr();
2104
2105 com->state &= ~CS_TTGO;
2106 if (!(tp->t_state & TS_TTSTOP))
2107 com->state |= CS_TTGO;
2108 if (cflag & CRTS_IFLOW) {
2109 com->state |= CS_RTS_IFLOW;
2110 /*
2111 * If CS_RTS_IFLOW just changed from off to on, the change
2112 * needs to be propagated to MCR_RTS. This isn't urgent,
2113 * so do it later by calling comstart() instead of repeating
2114 * a lot of code from comstart() here.
2115 */
2116 } else if (com->state & CS_RTS_IFLOW) {
2117 com->state &= ~CS_RTS_IFLOW;
2118 /*
2119 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2120 * on here, since comstart() won't do it later.
2121 */
2122#if 0
2123 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2124#else
2125 cd_setreg(com, com->mcr_rts_reg,
2126 com->mcr_image |= com->mcr_rts);
2127#endif
2128 }
2129
2130 /*
2131 * Set up state to handle output flow control.
2132 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2133 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2134 */
2135 com->state |= CS_ODEVREADY;
2136#ifdef SOFT_CTS_OFLOW
2137 com->state &= ~CS_CTS_OFLOW;
2138 if (cflag & CCTS_OFLOW) {
2139 com->state |= CS_CTS_OFLOW;
2140 if (!(com->last_modem_status & MSR_CTS))
2141 com->state &= ~CS_ODEVREADY;
2142 }
2143#endif
2144 /* XXX shouldn't call functions while intrs are disabled. */
2145 disc_optim(tp, t, com);
2146#if 0
2147 /*
2148 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2149 * unconditionally, but that defeated the careful discarding of
2150 * stale input in sioopen().
2151 */
2152 if (com->state >= (CS_BUSY | CS_TTGO))
2153 siointr1(com);
2154#endif
2155 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
2156 if (!(com->intr_enable & CD1400_SRER_TXRDY))
2157 cd_setreg(com, CD1400_SRER,
2158 com->intr_enable
2159 = (com->intr_enable & ~CD1400_SRER_TXMPTY)
2160 | CD1400_SRER_TXRDY);
2161 } else {
2162 if (com->intr_enable & CD1400_SRER_TXRDY)
2163 cd_setreg(com, CD1400_SRER,
2164 com->intr_enable
2165 = (com->intr_enable & ~CD1400_SRER_TXRDY)
2166 | CD1400_SRER_TXMPTY);
2167 }
2168
2169 enable_intr();
2170 splx(s);
2171 comstart(tp);
2172 if (com->ibufold != NULL) {
2173 free(com->ibufold, M_DEVBUF);
2174 com->ibufold = NULL;
2175 }
2176 return (0);
2177}
2178
2179static int
2180siosetwater(com, speed)
2181 struct com_s *com;
2182 speed_t speed;
2183{
2184 int cp4ticks;
2185 u_char *ibuf;
2186 int ibufsize;
2187 struct tty *tp;
2188
2189 /*
2190 * Make the buffer size large enough to handle a softtty interrupt
2191 * latency of about 2 ticks without loss of throughput or data
2192 * (about 3 ticks if input flow control is not used or not honoured,
2193 * but a bit less for CS5-CS7 modes).
2194 */
2195 cp4ticks = speed / 10 / hz * 4;
2196 for (ibufsize = 128; ibufsize < cp4ticks;)
2197 ibufsize <<= 1;
2198 if (ibufsize == com->ibufsize) {
2199 disable_intr();
2200 return (0);
2201 }
2202
2203 /*
2204 * Allocate input buffer. The extra factor of 2 in the size is
2205 * to allow for an error byte for each input byte.
2206 */
2207 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2208 if (ibuf == NULL) {
2209 disable_intr();
2210 return (ENOMEM);
2211 }
2212
2213 /* Initialize non-critical variables. */
2214 com->ibufold = com->ibuf;
2215 com->ibufsize = ibufsize;
2216 tp = com->tp;
2217 if (tp != NULL) {
2218 tp->t_ififosize = 2 * ibufsize;
2219 tp->t_ispeedwat = (speed_t)-1;
2220 tp->t_ospeedwat = (speed_t)-1;
2221 }
2222
2223 /*
2224 * Read current input buffer, if any. Continue with interrupts
2225 * disabled.
2226 */
2227 disable_intr();
2228 if (com->iptr != com->ibuf)
2229 sioinput(com);
2230
2231 /*-
2232 * Initialize critical variables, including input buffer watermarks.
2233 * The external device is asked to stop sending when the buffer
2234 * exactly reaches high water, or when the high level requests it.
2235 * The high level is notified immediately (rather than at a later
2236 * clock tick) when this watermark is reached.
2237 * The buffer size is chosen so the watermark should almost never
2238 * be reached.
2239 * The low watermark is invisibly 0 since the buffer is always
2240 * emptied all at once.
2241 */
2242 com->iptr = com->ibuf = ibuf;
2243 com->ibufend = ibuf + ibufsize;
2244 com->ierroff = ibufsize;
2245 com->ihighwater = ibuf + 3 * ibufsize / 4;
2246 return (0);
2247}
2248
2249static void
2250comstart(tp)
2251 struct tty *tp;
2252{
2253 struct com_s *com;
2254 int s;
2255#ifdef CyDebug
2256 bool_t started;
2257#endif
2258 int unit;
2259
2260 unit = DEV_TO_UNIT(tp->t_dev);
2261 com = com_addr(unit);
2262 s = spltty();
2263
2264#ifdef CyDebug
2265 ++com->start_count;
2266 started = FALSE;
2267#endif
2268
2269 disable_intr();
2270 if (tp->t_state & TS_TTSTOP) {
2271 com->state &= ~CS_TTGO;
2272 if (com->intr_enable & CD1400_SRER_TXRDY)
2273 cd_setreg(com, CD1400_SRER,
2274 com->intr_enable
2275 = (com->intr_enable & ~CD1400_SRER_TXRDY)
2276 | CD1400_SRER_TXMPTY);
2277 } else {
2278 com->state |= CS_TTGO;
2279 if (com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)
2280 && !(com->intr_enable & CD1400_SRER_TXRDY))
2281 cd_setreg(com, CD1400_SRER,
2282 com->intr_enable
2283 = (com->intr_enable & ~CD1400_SRER_TXMPTY)
2284 | CD1400_SRER_TXRDY);
2285 }
2286 if (tp->t_state & TS_TBLOCK) {
2287 if (com->mcr_image & com->mcr_rts && com->state & CS_RTS_IFLOW)
2288#if 0
2289 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2290#else
2291 cd_setreg(com, com->mcr_rts_reg,
2292 com->mcr_image &= ~com->mcr_rts);
2293#endif
2294 } else {
2295 if (!(com->mcr_image & com->mcr_rts)
2296 && com->iptr < com->ihighwater
2297 && com->state & CS_RTS_IFLOW)
2298#if 0
2299 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2300#else
2301 cd_setreg(com, com->mcr_rts_reg,
2302 com->mcr_image |= com->mcr_rts);
2303#endif
2304 }
2305 enable_intr();
2306 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2307 ttwwakeup(tp);
2308 splx(s);
2309 return;
2310 }
2311 if (tp->t_outq.c_cc != 0) {
2312 struct lbq *qp;
2313 struct lbq *next;
2314
2315 if (!com->obufs[0].l_queued) {
2316#ifdef CyDebug
2317 started = TRUE;
2318#endif
2319 com->obufs[0].l_tail
2320 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2321 sizeof com->obuf1);
2322 com->obufs[0].l_next = NULL;
2323 com->obufs[0].l_queued = TRUE;
2324 disable_intr();
2325 if (com->state & CS_BUSY) {
2326 qp = com->obufq.l_next;
2327 while ((next = qp->l_next) != NULL)
2328 qp = next;
2329 qp->l_next = &com->obufs[0];
2330 } else {
2331 com->obufq.l_head = com->obufs[0].l_head;
2332 com->obufq.l_tail = com->obufs[0].l_tail;
2333 com->obufq.l_next = &com->obufs[0];
2334 com->state |= CS_BUSY;
2335 if (com->state >= (CS_BUSY | CS_TTGO
2336 | CS_ODEVREADY))
2337 cd_setreg(com, CD1400_SRER,
2338 com->intr_enable
2339 = (com->intr_enable
2340 & ~CD1400_SRER_TXMPTY)
2341 | CD1400_SRER_TXRDY);
2342 }
2343 enable_intr();
2344 }
2345 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2346#ifdef CyDebug
2347 started = TRUE;
2348#endif
2349 com->obufs[1].l_tail
2350 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2351 sizeof com->obuf2);
2352 com->obufs[1].l_next = NULL;
2353 com->obufs[1].l_queued = TRUE;
2354 disable_intr();
2355 if (com->state & CS_BUSY) {
2356 qp = com->obufq.l_next;
2357 while ((next = qp->l_next) != NULL)
2358 qp = next;
2359 qp->l_next = &com->obufs[1];
2360 } else {
2361 com->obufq.l_head = com->obufs[1].l_head;
2362 com->obufq.l_tail = com->obufs[1].l_tail;
2363 com->obufq.l_next = &com->obufs[1];
2364 com->state |= CS_BUSY;
2365 if (com->state >= (CS_BUSY | CS_TTGO
2366 | CS_ODEVREADY))
2367 cd_setreg(com, CD1400_SRER,
2368 com->intr_enable
2369 = (com->intr_enable
2370 & ~CD1400_SRER_TXMPTY)
2371 | CD1400_SRER_TXRDY);
2372 }
2373 enable_intr();
2374 }
2375 tp->t_state |= TS_BUSY;
2376 }
2377#ifdef CyDebug
2378 if (started)
2379 ++com->start_real;
2380#endif
2381#if 0
2382 disable_intr();
2383 if (com->state >= (CS_BUSY | CS_TTGO))
2384 siointr1(com); /* fake interrupt to start output */
2385 enable_intr();
2386#endif
2387 ttwwakeup(tp);
2388 splx(s);
2389}
2390
2391static void
2392comstop(tp, rw)
2393 struct tty *tp;
2394 int rw;
2395{
2396 struct com_s *com;
2397 bool_t wakeup_etc;
2398
2399 com = com_addr(DEV_TO_UNIT(tp->t_dev));
2400 wakeup_etc = FALSE;
2401 disable_intr();
2402 if (rw & FWRITE) {
2403 com->obufs[0].l_queued = FALSE;
2404 com->obufs[1].l_queued = FALSE;
2405 if (com->extra_state & CSE_ODONE) {
2406 com_events -= LOTS_OF_EVENTS;
2407 com->extra_state &= ~CSE_ODONE;
2408 if (com->etc != ETC_NONE) {
2409 if (com->etc == ETC_BREAK_ENDED)
2410 com->etc = ETC_NONE;
2411 wakeup_etc = TRUE;
2412 }
2413 }
2414 com->tp->t_state &= ~TS_BUSY;
2415 if (com->state & CS_ODONE)
2416 com_events -= LOTS_OF_EVENTS;
2417 com->state &= ~(CS_ODONE | CS_BUSY);
2418 }
2419 if (rw & FREAD) {
2420 /* XXX no way to reset only input fifo. */
2421 com_events -= (com->iptr - com->ibuf);
2422 com->iptr = com->ibuf;
2423 }
2424 enable_intr();
2425 if (wakeup_etc)
2426 wakeup(&com->etc);
2427 if (rw & FWRITE && com->etc == ETC_NONE)
2428 cd1400_channel_cmd(com, CD1400_CCR_CMDRESET | CD1400_CCR_FTF);
2429 comstart(tp);
2430}
2431
2432static int
2433commctl(com, bits, how)
2434 struct com_s *com;
2435 int bits;
2436 int how;
2437{
2438 int mcr;
2439 int msr;
2440
2441 if (how == DMGET) {
2442 if (com->channel_control & CD1400_CCR_RCVEN)
2443 bits |= TIOCM_LE;
2444 mcr = com->mcr_image;
2445 if (mcr & com->mcr_dtr)
2446 bits |= TIOCM_DTR;
2447 if (mcr & com->mcr_rts)
2448 /* XXX wired on for Cyclom-8Ys */
2449 bits |= TIOCM_RTS;
2450
2451 /*
2452 * We must read the modem status from the hardware because
2453 * we don't generate modem status change interrupts for all
2454 * changes, so com->prev_modem_status is not guaranteed to
2455 * be up to date. This is safe, unlike for sio, because
2456 * reading the status register doesn't clear pending modem
2457 * status change interrupts.
2458 */
2459 msr = cd_getreg(com, CD1400_MSVR2);
2460
2461 if (msr & MSR_CTS)
2462 bits |= TIOCM_CTS;
2463 if (msr & MSR_DCD)
2464 bits |= TIOCM_CD;
2465 if (msr & MSR_DSR)
2466 bits |= TIOCM_DSR;
2467 if (msr & MSR_RI)
2468 /* XXX not connected except for Cyclom-16Y? */
2469 bits |= TIOCM_RI;
2470 return (bits);
2471 }
2472 mcr = 0;
2473 if (bits & TIOCM_DTR)
2474 mcr |= com->mcr_dtr;
2475 if (bits & TIOCM_RTS)
2476 mcr |= com->mcr_rts;
2477 disable_intr();
2478 switch (how) {
2479 case DMSET:
2480 com->mcr_image = mcr;
2481 cd_setreg(com, CD1400_MSVR1, mcr);
2482 cd_setreg(com, CD1400_MSVR2, mcr);
2483 break;
2484 case DMBIS:
2485 com->mcr_image = mcr = com->mcr_image | mcr;
2486 cd_setreg(com, CD1400_MSVR1, mcr);
2487 cd_setreg(com, CD1400_MSVR2, mcr);
2488 break;
2489 case DMBIC:
2490 com->mcr_image = mcr = com->mcr_image & ~mcr;
2491 cd_setreg(com, CD1400_MSVR1, mcr);
2492 cd_setreg(com, CD1400_MSVR2, mcr);
2493 break;
2494 }
2495 enable_intr();
2496 return (0);
2497}
2498
2499static void
2500siosettimeout()
2501{
2502 struct com_s *com;
2503 bool_t someopen;
2504 int unit;
2505
2506 /*
2507 * Set our timeout period to 1 second if no polled devices are open.
2508 * Otherwise set it to max(1/200, 1/hz).
2509 * Enable timeouts iff some device is open.
2510 */
2511 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2512 sio_timeout = hz;
2513 someopen = FALSE;
2514 for (unit = 0; unit < NSIO; ++unit) {
2515 com = com_addr(unit);
2516 if (com != NULL && com->tp != NULL
2517 && com->tp->t_state & TS_ISOPEN) {
2518 someopen = TRUE;
2519#if 0
2520 if (com->poll || com->poll_output) {
2521 sio_timeout = hz > 200 ? hz / 200 : 1;
2522 break;
2523 }
2524#endif
2525 }
2526 }
2527 if (someopen) {
2528 sio_timeouts_until_log = hz / sio_timeout;
2529 sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2530 sio_timeout);
2531 } else {
2532 /* Flush error messages, if any. */
2533 sio_timeouts_until_log = 1;
2534 comwakeup((void *)NULL);
2535 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2536 }
2537}
2538
2539static void
2540comwakeup(chan)
2541 void *chan;
2542{
2543 struct com_s *com;
2544 int unit;
2545
2546 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2547
2548#if 0
2549 /*
2550 * Recover from lost output interrupts.
2551 * Poll any lines that don't use interrupts.
2552 */
2553 for (unit = 0; unit < NSIO; ++unit) {
2554 com = com_addr(unit);
2555 if (com != NULL
2556 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2557 disable_intr();
2558 siointr1(com);
2559 enable_intr();
2560 }
2561 }
2562#endif
2563
2564 /*
2565 * Check for and log errors, but not too often.
2566 */
2567 if (--sio_timeouts_until_log > 0)
2568 return;
2569 sio_timeouts_until_log = hz / sio_timeout;
2570 for (unit = 0; unit < NSIO; ++unit) {
2571 int errnum;
2572
2573 com = com_addr(unit);
2574 if (com == NULL)
2575 continue;
2576 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2577 u_int delta;
2578 u_long total;
2579
2580 disable_intr();
2581 delta = com->delta_error_counts[errnum];
2582 com->delta_error_counts[errnum] = 0;
2583 enable_intr();
2584 if (delta == 0)
2585 continue;
2586 total = com->error_counts[errnum] += delta;
2587 log(LOG_ERR, "cy%d: %u more %s%s (total %lu)\n",
2588 unit, delta, error_desc[errnum],
2589 delta == 1 ? "" : "s", total);
2590 }
2591 }
2592}
2593
2594static void
2595disc_optim(tp, t, com)
2596 struct tty *tp;
2597 struct termios *t;
2598 struct com_s *com;
2599{
2600#ifndef SOFT_HOTCHAR
2601 u_char opt;
2602#endif
2603
2604 /*
2605 * XXX can skip a lot more cases if Smarts. Maybe
2606 * (IGNCR | ISTRIP | IXON) in c_iflag. But perhaps we
2607 * shouldn't skip if (TS_CNTTB | TS_LNCH) is set in t_state.
2608 */
2609 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON))
2610 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK))
2611 && (!(t->c_iflag & PARMRK)
2612 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
2613 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN))
2614 && linesw[tp->t_line].l_rint == ttyinput)
2615 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2616 else
2617 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2618 com->hotchar = linesw[tp->t_line].l_hotchar;
2619#ifndef SOFT_HOTCHAR
2620 opt = com->cor[2] & ~CD1400_COR3_SCD34;
2621 if (com->hotchar != 0) {
2622 cd_setreg(com, CD1400_SCHR3, com->hotchar);
2623 cd_setreg(com, CD1400_SCHR4, com->hotchar);
2624 opt |= CD1400_COR3_SCD34;
2625 }
2626 if (opt != com->cor[2]) {
2627 cd_setreg(com, CD1400_COR3, com->cor[2] = opt);
2628 cd1400_channel_cmd(com, CD1400_CCR_CMDCORCHG | CD1400_CCR_COR3);
2629 }
2630#endif
2631}
2632
2633#ifdef Smarts
2634/* standard line discipline input routine */
2635int
2636cyinput(c, tp)
2637 int c;
2638 struct tty *tp;
2639{
2640 /* XXX duplicate ttyinput(), but without the IXOFF/IXON/ISTRIP/IPARMRK
2641 * bits, as they are done by the CD1400. Hardly worth the effort,
2642 * given that high-throughput sessions are raw anyhow.
2643 */
2644}
2645#endif /* Smarts */
2646
2647static int
2648comspeed(speed, cy_clock, prescaler_io)
2649 speed_t speed;
2650 u_long cy_clock;
2651 int *prescaler_io;
2652{
2653 int actual;
2654 int error;
2655 int divider;
2656 int prescaler;
2657 int prescaler_unit;
2658
2659 if (speed == 0)
2660 return (0);
2661 if (speed < 0 || speed > 150000)
2662 return (-1);
2663
2664 /* determine which prescaler to use */
2665 for (prescaler_unit = 4, prescaler = 2048; prescaler_unit;
2666 prescaler_unit--, prescaler >>= 2) {
2667 if (cy_clock / prescaler / speed > 63)
2668 break;
2669 }
2670
2671 divider = (cy_clock / prescaler * 2 / speed + 1) / 2; /* round off */
2672 if (divider > 255)
2673 divider = 255;
2674 actual = cy_clock/prescaler/divider;
2675
2676 /* 10 times error in percent: */
2677 error = ((actual - (long)speed) * 2000 / (long)speed + 1) / 2;
2678
2679 /* 3.0% max error tolerance */
2680 if (error < -30 || error > 30)
2681 return (-1);
2682
2683#if 0
2684 printf("prescaler = %d (%d)\n", prescaler, prescaler_unit);
2685 printf("divider = %d (%x)\n", divider, divider);
2686 printf("actual = %d\n", actual);
2687 printf("error = %d\n", error);
2688#endif
2689
2690 *prescaler_io = prescaler_unit;
2691 return (divider);
2692}
2693
2694static void
2695cd1400_channel_cmd(com, cmd)
2696 struct com_s *com;
2697 int cmd;
2698{
2699 cd1400_channel_cmd_wait(com);
2700 cd_setreg(com, CD1400_CCR, cmd);
2701 cd1400_channel_cmd_wait(com);
2702}
2703
2704static void
2705cd1400_channel_cmd_wait(com)
2706 struct com_s *com;
2707{
2708 struct timeval start;
2709 struct timeval tv;
2710 long usec;
2711
2712 if (cd_getreg(com, CD1400_CCR) == 0)
2713 return;
2714 microtime(&start);
2715 for (;;) {
2716 if (cd_getreg(com, CD1400_CCR) == 0)
2717 return;
2718 microtime(&tv);
2719 usec = 1000000 * (tv.tv_sec - start.tv_sec) +
2720 tv.tv_usec - start.tv_usec;
2721 if (usec >= 5000) {
2722 log(LOG_ERR,
2723 "cy%d: channel command timeout (%ld usec)\n",
2724 com->unit, usec);
2725 return;
2726 }
2727 }
2728}
2729
2730static void
2731cd_etc(com, etc)
2732 struct com_s *com;
2733 int etc;
2734{
2735 /*
2736 * We can't change the hardware's ETC state while there are any
2737 * characters in the tx fifo, since those characters would be
2738 * interpreted as commands! Unputting characters from the fifo
2739 * is difficult, so we wait up to 12 character times for the fifo
2740 * to drain. The command will be delayed for up to 2 character
2741 * times for the tx to become empty. Unputting characters from
2742 * the tx holding and shift registers is impossible, so we wait
2743 * for the tx to become empty so that the command is sure to be
2744 * executed soon after we issue it.
2745 */
2746 disable_intr();
2747 if (com->etc == etc) {
2748 enable_intr();
2749 goto wait;
2750 }
2751 if ((etc == CD1400_ETC_SENDBREAK
2752 && (com->etc == ETC_BREAK_STARTING
2753 || com->etc == ETC_BREAK_STARTED))
2754 || (etc == CD1400_ETC_STOPBREAK
2755 && (com->etc == ETC_BREAK_ENDING || com->etc == ETC_BREAK_ENDED
2756 || com->etc == ETC_NONE))) {
2757 enable_intr();
2758 return;
2759 }
2760 com->etc = etc;
2761 cd_setreg(com, CD1400_SRER,
2762 com->intr_enable
2763 = (com->intr_enable & ~CD1400_SRER_TXRDY) | CD1400_SRER_TXMPTY);
2764 enable_intr();
2765wait:
2766 while (com->etc == etc
2767 && tsleep(&com->etc, TTIPRI | PCATCH, "cyetc", 0) == 0)
2768 continue;
2769}
2770
2771static int
2772cd_getreg(com, reg)
2773 struct com_s *com;
2774 int reg;
2775{
2776 struct com_s *basecom;
2777 u_char car;
2778 int cy_align;
2779 u_long ef;
2780 cy_addr iobase;
2781 int val;
2782
2783 basecom = com_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
2784 car = com->unit & CD1400_CAR_CHAN;
2785 cy_align = com->cy_align;
2786 iobase = com->iobase;
2787 ef = read_eflags();
2788 if (ef & PSL_I)
2789 disable_intr();
2790 if (basecom->car != car)
2791 cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
2792 val = cd_inb(iobase, reg, cy_align);
2793 if (ef & PSL_I)
2794 enable_intr();
2795 return (val);
2796}
2797
2798static void
2799cd_setreg(com, reg, val)
2800 struct com_s *com;
2801 int reg;
2802 int val;
2803{
2804 struct com_s *basecom;
2805 u_char car;
2806 int cy_align;
2807 u_long ef;
2808 cy_addr iobase;
2809
2810 basecom = com_addr(com->unit & ~(CD1400_NO_OF_CHANNELS - 1));
2811 car = com->unit & CD1400_CAR_CHAN;
2812 cy_align = com->cy_align;
2813 iobase = com->iobase;
2814 ef = read_eflags();
2815 if (ef & PSL_I)
2816 disable_intr();
2817 if (basecom->car != car)
2818 cd_outb(iobase, CD1400_CAR, cy_align, basecom->car = car);
2819 cd_outb(iobase, reg, cy_align, val);
2820 if (ef & PSL_I)
2821 enable_intr();
2822}
2823
2824#ifdef CyDebug
2825/* useful in ddb */
2826void
2827cystatus(unit)
2828 int unit;
2829{
2830 struct com_s *com;
2831 cy_addr iobase;
2832 u_int ocount;
2833 struct tty *tp;
2834
2835 com = com_addr(unit);
2836 printf("info for channel %d\n", unit);
2837 printf("------------------\n");
2838 printf("total cyclom service probes:\t%d\n", cy_svrr_probes);
2839 printf("calls to upper layer:\t\t%d\n", cy_timeouts);
2840 if (com == NULL)
2841 return;
2842 iobase = com->iobase;
2843 printf("\n");
2844 printf("cd1400 base address:\\tt%p\n", iobase);
2845 printf("saved channel_control:\t\t0x%02x\n", com->channel_control);
2846 printf("saved cor1-3:\t\t\t0x%02x 0x%02x 0x%02x\n",
2847 com->cor[0], com->cor[1], com->cor[2]);
2848 printf("service request enable reg:\t0x%02x (0x%02x cached)\n",
2849 cd_getreg(com, CD1400_SRER), com->intr_enable);
2850 printf("service request register:\t0x%02x\n",
2851 cd_inb(iobase, CD1400_SVRR, com->cy_align));
2852 printf("modem status:\t\t\t0x%02x (0x%02x cached)\n",
2853 cd_getreg(com, CD1400_MSVR2), com->prev_modem_status);
2854 printf("rx/tx/mdm interrupt registers:\t0x%02x 0x%02x 0x%02x\n",
2855 cd_inb(iobase, CD1400_RIR, com->cy_align),
2856 cd_inb(iobase, CD1400_TIR, com->cy_align),
2857 cd_inb(iobase, CD1400_MIR, com->cy_align));
2858 printf("\n");
2859 printf("com state:\t\t\t0x%02x\n", com->state);
2860 printf("calls to comstart():\t\t%d (%d useful)\n",
2861 com->start_count, com->start_real);
2862 printf("rx buffer chars free:\t\t%d\n", com->iptr - com->ibuf);
2863 ocount = 0;
2864 if (com->obufs[0].l_queued)
2865 ocount += com->obufs[0].l_tail - com->obufs[0].l_head;
2866 if (com->obufs[1].l_queued)
2867 ocount += com->obufs[1].l_tail - com->obufs[1].l_head;
2868 printf("tx buffer chars:\t\t%u\n", ocount);
2869 printf("received chars:\t\t\t%d\n", com->bytes_in);
2870 printf("received exceptions:\t\t%d\n", com->recv_exception);
2871 printf("modem signal deltas:\t\t%d\n", com->mdm);
2872 printf("transmitted chars:\t\t%d\n", com->bytes_out);
2873 printf("\n");
2874 tp = com->tp;
2875 if (tp != NULL) {
2876 printf("tty state:\t\t\t0x%08x\n", tp->t_state);
2877 printf(
2878 "upper layer queue lengths:\t%d raw, %d canon, %d output\n",
2879 tp->t_rawq.c_cc, tp->t_canq.c_cc, tp->t_outq.c_cc);
2880 } else
2881 printf("tty state:\t\t\tclosed\n");
2882}
2883#endif /* CyDebug */