proc->thread stage 4: rework the VFS and DEVICE subsystems to take thread
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
dadab5e9 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.12 2003/06/25 03:55:53 dillon Exp $
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40 */
41
42#include "apm.h"
43#include "ether.h"
44#include "npx.h"
45#include "opt_atalk.h"
46#include "opt_compat.h"
47#include "opt_cpu.h"
48#include "opt_ddb.h"
49#include "opt_directio.h"
50#include "opt_inet.h"
51#include "opt_ipx.h"
52#include "opt_maxmem.h"
53#include "opt_msgbuf.h"
54#include "opt_perfmon.h"
55#include "opt_swap.h"
56#include "opt_user_ldt.h"
57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
69#include <sys/callout.h>
70#include <sys/mbuf.h>
71#include <sys/msgbuf.h>
72#include <sys/sysent.h>
73#include <sys/sysctl.h>
74#include <sys/vmmeter.h>
75#include <sys/bus.h>
76
77#include <vm/vm.h>
78#include <vm/vm_param.h>
79#include <sys/lock.h>
80#include <vm/vm_kern.h>
81#include <vm/vm_object.h>
82#include <vm/vm_page.h>
83#include <vm/vm_map.h>
84#include <vm/vm_pager.h>
85#include <vm/vm_extern.h>
86
87#include <sys/user.h>
88#include <sys/exec.h>
89#include <sys/cons.h>
90
91#include <ddb/ddb.h>
92
93#include <net/netisr.h>
94
95#include <machine/cpu.h>
96#include <machine/reg.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#include <machine/bootinfo.h>
100#include <machine/ipl.h>
101#include <machine/md_var.h>
102#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
103#ifdef SMP
104#include <machine/smp.h>
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105#endif
106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
112#include <i386/isa/isa_device.h>
113#endif
114#include <i386/isa/intr_machdep.h>
115#include <isa/rtc.h>
116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
121extern void init386 __P((int first));
122extern void dblfault_handler __P((void));
123
124extern void printcpuinfo(void); /* XXX header file */
125extern void finishidentcpu(void);
126extern void panicifcpuunsupported(void);
127extern void initializecpu(void);
128
129static void cpu_startup __P((void *));
130#ifdef CPU_ENABLE_SSE
131static void set_fpregs_xmm __P((struct save87 *, struct savexmm *));
132static void fill_fpregs_xmm __P((struct savexmm *, struct save87 *));
133#endif /* CPU_ENABLE_SSE */
134#ifdef DIRECTIO
135extern void ffs_rawread_setup(void);
136#endif /* DIRECTIO */
137
138SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
139
140static MALLOC_DEFINE(M_MBUF, "mbuf", "mbuf");
141
142int _udatasel, _ucodesel;
143u_int atdevbase;
144
145#if defined(SWTCH_OPTIM_STATS)
146extern int swtch_optim_stats;
147SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
148 CTLFLAG_RD, &swtch_optim_stats, 0, "");
149SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
150 CTLFLAG_RD, &tlb_flush_count, 0, "");
151#endif
152
153#ifdef PC98
154static int ispc98 = 1;
155#else
156static int ispc98 = 0;
157#endif
158SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
159
160int physmem = 0;
161int cold = 1;
162
163static int
164sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
165{
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
167 return (error);
168}
169
170SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
172
173static int
174sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
175{
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - cnt.v_wire_count), req);
178 return (error);
179}
180
181SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
183
184static int
185sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
186{
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
189 return (error);
190}
191
192SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
194
195static int
196sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
197{
198 int error;
199
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
202 */
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
209 }
210 return(error);
211}
212
213SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
215
216static int msgbuf_clear;
217
218static int
219sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
220{
221 int error;
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
223 req);
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
228 msgbuf_clear=0;
229 }
230 return (error);
231}
232
233SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
236
237int bootverbose = 0, Maxmem = 0;
238long dumplo;
239
240vm_offset_t phys_avail[10];
241
242/* must be 2 less so 0 0 can signal end of chunks */
243#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
244
245static vm_offset_t buffer_sva, buffer_eva;
246vm_offset_t clean_sva, clean_eva;
247static vm_offset_t pager_sva, pager_eva;
248static struct trapframe proc0_tf;
249
250static void
251cpu_startup(dummy)
252 void *dummy;
253{
254 register unsigned i;
255 register caddr_t v;
256 vm_offset_t maxaddr;
257 vm_size_t size = 0;
258 int firstaddr;
259 vm_offset_t minaddr;
260
261 if (boothowto & RB_VERBOSE)
262 bootverbose++;
263
264 /*
265 * Good {morning,afternoon,evening,night}.
266 */
267 printf("%s", version);
268 startrtclock();
269 printcpuinfo();
270 panicifcpuunsupported();
271#ifdef PERFMON
272 perfmon_init();
273#endif
274 printf("real memory = %u (%uK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
275 /*
276 * Display any holes after the first chunk of extended memory.
277 */
278 if (bootverbose) {
279 int indx;
280
281 printf("Physical memory chunk(s):\n");
282 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
283 unsigned int size1 = phys_avail[indx + 1] - phys_avail[indx];
284
285 printf("0x%08x - 0x%08x, %u bytes (%u pages)\n",
286 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
287 size1 / PAGE_SIZE);
288 }
289 }
290
291 /*
292 * Calculate callout wheel size
293 */
294 for (callwheelsize = 1, callwheelbits = 0;
295 callwheelsize < ncallout;
296 callwheelsize <<= 1, ++callwheelbits)
297 ;
298 callwheelmask = callwheelsize - 1;
299
300 /*
301 * Allocate space for system data structures.
302 * The first available kernel virtual address is in "v".
303 * As pages of kernel virtual memory are allocated, "v" is incremented.
304 * As pages of memory are allocated and cleared,
305 * "firstaddr" is incremented.
306 * An index into the kernel page table corresponding to the
307 * virtual memory address maintained in "v" is kept in "mapaddr".
308 */
309
310 /*
311 * Make two passes. The first pass calculates how much memory is
312 * needed and allocates it. The second pass assigns virtual
313 * addresses to the various data structures.
314 */
315 firstaddr = 0;
316again:
317 v = (caddr_t)firstaddr;
318
319#define valloc(name, type, num) \
320 (name) = (type *)v; v = (caddr_t)((name)+(num))
321#define valloclim(name, type, num, lim) \
322 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
323
324 valloc(callout, struct callout, ncallout);
325 valloc(callwheel, struct callout_tailq, callwheelsize);
326
327 /*
328 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
329 * For the first 64MB of ram nominally allocate sufficient buffers to
330 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
331 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
332 * the buffer cache we limit the eventual kva reservation to
333 * maxbcache bytes.
334 *
335 * factor represents the 1/4 x ram conversion.
336 */
337 if (nbuf == 0) {
338 int factor = 4 * BKVASIZE / 1024;
339 int kbytes = physmem * (PAGE_SIZE / 1024);
340
341 nbuf = 50;
342 if (kbytes > 4096)
343 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
344 if (kbytes > 65536)
345 nbuf += (kbytes - 65536) * 2 / (factor * 5);
346 if (maxbcache && nbuf > maxbcache / BKVASIZE)
347 nbuf = maxbcache / BKVASIZE;
348 }
349
350 /*
351 * Do not allow the buffer_map to be more then 1/2 the size of the
352 * kernel_map.
353 */
354 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
355 (BKVASIZE * 2)) {
356 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
357 (BKVASIZE * 2);
358 printf("Warning: nbufs capped at %d\n", nbuf);
359 }
360
361 nswbuf = max(min(nbuf/4, 256), 16);
362#ifdef NSWBUF_MIN
363 if (nswbuf < NSWBUF_MIN)
364 nswbuf = NSWBUF_MIN;
365#endif
366#ifdef DIRECTIO
367 ffs_rawread_setup();
368#endif
369
370 valloc(swbuf, struct buf, nswbuf);
371 valloc(buf, struct buf, nbuf);
372 v = bufhashinit(v);
373
374 /*
375 * End of first pass, size has been calculated so allocate memory
376 */
377 if (firstaddr == 0) {
378 size = (vm_size_t)(v - firstaddr);
379 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
380 if (firstaddr == 0)
381 panic("startup: no room for tables");
382 goto again;
383 }
384
385 /*
386 * End of second pass, addresses have been assigned
387 */
388 if ((vm_size_t)(v - firstaddr) != size)
389 panic("startup: table size inconsistency");
390
391 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
392 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
393 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
394 (nbuf*BKVASIZE));
395 buffer_map->system_map = 1;
396 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
397 (nswbuf*MAXPHYS) + pager_map_size);
398 pager_map->system_map = 1;
399 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
400 (16*(ARG_MAX+(PAGE_SIZE*3))));
401
402 /*
403 * Finally, allocate mbuf pool. Since mclrefcnt is an off-size
404 * we use the more space efficient malloc in place of kmem_alloc.
405 */
406 {
407 vm_offset_t mb_map_size;
408
409 mb_map_size = nmbufs * MSIZE + nmbclusters * MCLBYTES;
410 mb_map_size = roundup2(mb_map_size, max(MCLBYTES, PAGE_SIZE));
411 mclrefcnt = malloc(mb_map_size / MCLBYTES, M_MBUF, M_NOWAIT);
412 bzero(mclrefcnt, mb_map_size / MCLBYTES);
413 mb_map = kmem_suballoc(kmem_map, (vm_offset_t *)&mbutl, &maxaddr,
414 mb_map_size);
415 mb_map->system_map = 1;
416 }
417
418 /*
419 * Initialize callouts
420 */
421 SLIST_INIT(&callfree);
422 for (i = 0; i < ncallout; i++) {
423 callout_init(&callout[i]);
424 callout[i].c_flags = CALLOUT_LOCAL_ALLOC;
425 SLIST_INSERT_HEAD(&callfree, &callout[i], c_links.sle);
426 }
427
428 for (i = 0; i < callwheelsize; i++) {
429 TAILQ_INIT(&callwheel[i]);
430 }
431
432#if defined(USERCONFIG)
433 userconfig();
434 cninit(); /* the preferred console may have changed */
435#endif
436
437 printf("avail memory = %u (%uK bytes)\n", ptoa(cnt.v_free_count),
438 ptoa(cnt.v_free_count) / 1024);
439
440 /*
441 * Set up buffers, so they can be used to read disk labels.
442 */
443 bufinit();
444 vm_pager_bufferinit();
445
446#ifdef SMP
447 /*
448 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
449 */
450 mp_start(); /* fire up the APs and APICs */
451 mp_announce();
452#endif /* SMP */
453 cpu_setregs();
454}
455
456int
457register_netisr(num, handler)
458 int num;
459 netisr_t *handler;
460{
461
462 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
463 printf("register_netisr: bad isr number: %d\n", num);
464 return (EINVAL);
465 }
466 netisrs[num] = handler;
467 return (0);
468}
469
470int
471unregister_netisr(num)
472 int num;
473{
474
475 if (num < 0 || num >= (sizeof(netisrs)/sizeof(*netisrs)) ) {
476 printf("unregister_netisr: bad isr number: %d\n", num);
477 return (EINVAL);
478 }
479 netisrs[num] = NULL;
480 return (0);
481}
482
483/*
484 * Send an interrupt to process.
485 *
486 * Stack is set up to allow sigcode stored
487 * at top to call routine, followed by kcall
488 * to sigreturn routine below. After sigreturn
489 * resets the signal mask, the stack, and the
490 * frame pointer, it returns to the user
491 * specified pc, psl.
492 */
493static void
494osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
495{
496 register struct proc *p = curproc;
497 register struct trapframe *regs;
498 register struct osigframe *fp;
499 struct osigframe sf;
500 struct sigacts *psp = p->p_sigacts;
501 int oonstack;
502
503 regs = p->p_md.md_regs;
504 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
505
506 /* Allocate and validate space for the signal handler context. */
507 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
508 SIGISMEMBER(psp->ps_sigonstack, sig)) {
509 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
510 p->p_sigstk.ss_size - sizeof(struct osigframe));
511 p->p_sigstk.ss_flags |= SS_ONSTACK;
512 }
513 else
514 fp = (struct osigframe *)regs->tf_esp - 1;
515
516 /* Translate the signal if appropriate */
517 if (p->p_sysent->sv_sigtbl) {
518 if (sig <= p->p_sysent->sv_sigsize)
519 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
520 }
521
522 /* Build the argument list for the signal handler. */
523 sf.sf_signum = sig;
524 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
525 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
526 /* Signal handler installed with SA_SIGINFO. */
527 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
528 sf.sf_siginfo.si_signo = sig;
529 sf.sf_siginfo.si_code = code;
530 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
531 }
532 else {
533 /* Old FreeBSD-style arguments. */
534 sf.sf_arg2 = code;
535 sf.sf_addr = regs->tf_err;
536 sf.sf_ahu.sf_handler = catcher;
537 }
538
539 /* save scratch registers */
540 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
541 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
542 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
543 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
544 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
545 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
546 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
547 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
548 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
549 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
550 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
551 sf.sf_siginfo.si_sc.sc_gs = rgs();
552 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
553
554 /* Build the signal context to be used by sigreturn. */
555 sf.sf_siginfo.si_sc.sc_onstack = oonstack;
556 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
557 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
558 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
559 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
560 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
561 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
562 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
563
564 /*
565 * If we're a vm86 process, we want to save the segment registers.
566 * We also change eflags to be our emulated eflags, not the actual
567 * eflags.
568 */
569 if (regs->tf_eflags & PSL_VM) {
570 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 571 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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572
573 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
574 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
575 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
576 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
577
578 if (vm86->vm86_has_vme == 0)
579 sf.sf_siginfo.si_sc.sc_ps =
580 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP))
581 | (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
582 /* see sendsig for comment */
583 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
584 }
585
586 /* Copy the sigframe out to the user's stack. */
587 if (copyout(&sf, fp, sizeof(struct osigframe)) != 0) {
588 /*
589 * Something is wrong with the stack pointer.
590 * ...Kill the process.
591 */
592 sigexit(p, SIGILL);
593 }
594
595 regs->tf_esp = (int)fp;
596 regs->tf_eip = PS_STRINGS - szosigcode;
597 regs->tf_eflags &= ~PSL_T;
598 regs->tf_cs = _ucodesel;
599 regs->tf_ds = _udatasel;
600 regs->tf_es = _udatasel;
601 regs->tf_fs = _udatasel;
602 load_gs(_udatasel);
603 regs->tf_ss = _udatasel;
604}
605
606void
607sendsig(catcher, sig, mask, code)
608 sig_t catcher;
609 int sig;
610 sigset_t *mask;
611 u_long code;
612{
613 struct proc *p = curproc;
614 struct trapframe *regs;
615 struct sigacts *psp = p->p_sigacts;
616 struct sigframe sf, *sfp;
617 int oonstack;
618
619 if (SIGISMEMBER(psp->ps_osigset, sig)) {
620 osendsig(catcher, sig, mask, code);
621 return;
622 }
623
624 regs = p->p_md.md_regs;
625 oonstack = (p->p_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
626
627 /* save user context */
628 bzero(&sf, sizeof(struct sigframe));
629 sf.sf_uc.uc_sigmask = *mask;
630 sf.sf_uc.uc_stack = p->p_sigstk;
631 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
632 sf.sf_uc.uc_mcontext.mc_gs = rgs();
633 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
634
635 /* Allocate and validate space for the signal handler context. */
636 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
637 SIGISMEMBER(psp->ps_sigonstack, sig)) {
638 sfp = (struct sigframe *)(p->p_sigstk.ss_sp +
639 p->p_sigstk.ss_size - sizeof(struct sigframe));
640 p->p_sigstk.ss_flags |= SS_ONSTACK;
641 }
642 else
643 sfp = (struct sigframe *)regs->tf_esp - 1;
644
645 /* Translate the signal is appropriate */
646 if (p->p_sysent->sv_sigtbl) {
647 if (sig <= p->p_sysent->sv_sigsize)
648 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
649 }
650
651 /* Build the argument list for the signal handler. */
652 sf.sf_signum = sig;
653 sf.sf_ucontext = (register_t)&sfp->sf_uc;
654 if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) {
655 /* Signal handler installed with SA_SIGINFO. */
656 sf.sf_siginfo = (register_t)&sfp->sf_si;
657 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
658
659 /* fill siginfo structure */
660 sf.sf_si.si_signo = sig;
661 sf.sf_si.si_code = code;
662 sf.sf_si.si_addr = (void*)regs->tf_err;
663 }
664 else {
665 /* Old FreeBSD-style arguments. */
666 sf.sf_siginfo = code;
667 sf.sf_addr = regs->tf_err;
668 sf.sf_ahu.sf_handler = catcher;
669 }
670
671 /*
672 * If we're a vm86 process, we want to save the segment registers.
673 * We also change eflags to be our emulated eflags, not the actual
674 * eflags.
675 */
676 if (regs->tf_eflags & PSL_VM) {
677 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
b7c628e4 678 struct vm86_kernel *vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
984263bc
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679
680 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
681 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
682 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
683 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
684
685 if (vm86->vm86_has_vme == 0)
686 sf.sf_uc.uc_mcontext.mc_eflags =
687 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
688 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
689
690 /*
691 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
692 * syscalls made by the signal handler. This just avoids
693 * wasting time for our lazy fixup of such faults. PSL_NT
694 * does nothing in vm86 mode, but vm86 programs can set it
695 * almost legitimately in probes for old cpu types.
696 */
697 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
698 }
699
700 /*
701 * Copy the sigframe out to the user's stack.
702 */
703 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
704 /*
705 * Something is wrong with the stack pointer.
706 * ...Kill the process.
707 */
708 sigexit(p, SIGILL);
709 }
710
711 regs->tf_esp = (int)sfp;
712 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
713 regs->tf_eflags &= ~PSL_T;
714 regs->tf_cs = _ucodesel;
715 regs->tf_ds = _udatasel;
716 regs->tf_es = _udatasel;
717 regs->tf_fs = _udatasel;
718 load_gs(_udatasel);
719 regs->tf_ss = _udatasel;
720}
721
722/*
41c20dac
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723 * osigreturn_args(struct osigcontext *sigcntxp)
724 *
984263bc
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725 * System call to cleanup state after a signal
726 * has been taken. Reset signal mask and
727 * stack state from context left by sendsig (above).
728 * Return to previous pc and psl as specified by
729 * context left by sendsig. Check carefully to
730 * make sure that the user has not modified the
731 * state to gain improper privileges.
732 */
733#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
734#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
735
736int
41c20dac 737osigreturn(struct osigreturn_args *uap)
984263bc 738{
41c20dac
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739 struct proc *p = curproc;
740 struct osigcontext *scp;
741 struct trapframe *regs = p->p_md.md_regs;
984263bc
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742 int eflags;
743
744 scp = uap->sigcntxp;
745
746 if (!useracc((caddr_t)scp, sizeof (struct osigcontext), VM_PROT_READ))
747 return(EFAULT);
748
749 eflags = scp->sc_ps;
750 if (eflags & PSL_VM) {
751 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
752 struct vm86_kernel *vm86;
753
754 /*
755 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
756 * set up the vm86 area, and we can't enter vm86 mode.
757 */
b7c628e4 758 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 759 return (EINVAL);
b7c628e4 760 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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761 if (vm86->vm86_inited == 0)
762 return (EINVAL);
763
764 /* go back to user mode if both flags are set */
765 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
766 trapsignal(p, SIGBUS, 0);
767
768 if (vm86->vm86_has_vme) {
769 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
770 (eflags & VME_USERCHANGE) | PSL_VM;
771 } else {
772 vm86->vm86_eflags = eflags; /* save VIF, VIP */
773 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
774 }
775 tf->tf_vm86_ds = scp->sc_ds;
776 tf->tf_vm86_es = scp->sc_es;
777 tf->tf_vm86_fs = scp->sc_fs;
778 tf->tf_vm86_gs = scp->sc_gs;
779 tf->tf_ds = _udatasel;
780 tf->tf_es = _udatasel;
781 tf->tf_fs = _udatasel;
782 } else {
783 /*
784 * Don't allow users to change privileged or reserved flags.
785 */
786 /*
787 * XXX do allow users to change the privileged flag PSL_RF.
788 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
789 * should sometimes set it there too. tf_eflags is kept in
790 * the signal context during signal handling and there is no
791 * other place to remember it, so the PSL_RF bit may be
792 * corrupted by the signal handler without us knowing.
793 * Corruption of the PSL_RF bit at worst causes one more or
794 * one less debugger trap, so allowing it is fairly harmless.
795 */
796 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
797 return(EINVAL);
798 }
799
800 /*
801 * Don't allow users to load a valid privileged %cs. Let the
802 * hardware check for invalid selectors, excess privilege in
803 * other selectors, invalid %eip's and invalid %esp's.
804 */
805 if (!CS_SECURE(scp->sc_cs)) {
806 trapsignal(p, SIGBUS, T_PROTFLT);
807 return(EINVAL);
808 }
809 regs->tf_ds = scp->sc_ds;
810 regs->tf_es = scp->sc_es;
811 regs->tf_fs = scp->sc_fs;
812 }
813
814 /* restore scratch registers */
815 regs->tf_eax = scp->sc_eax;
816 regs->tf_ebx = scp->sc_ebx;
817 regs->tf_ecx = scp->sc_ecx;
818 regs->tf_edx = scp->sc_edx;
819 regs->tf_esi = scp->sc_esi;
820 regs->tf_edi = scp->sc_edi;
821 regs->tf_cs = scp->sc_cs;
822 regs->tf_ss = scp->sc_ss;
823 regs->tf_isp = scp->sc_isp;
824
825 if (scp->sc_onstack & 01)
826 p->p_sigstk.ss_flags |= SS_ONSTACK;
827 else
828 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
829
830 SIGSETOLD(p->p_sigmask, scp->sc_mask);
831 SIG_CANTMASK(p->p_sigmask);
832 regs->tf_ebp = scp->sc_fp;
833 regs->tf_esp = scp->sc_sp;
834 regs->tf_eip = scp->sc_pc;
835 regs->tf_eflags = eflags;
836 return(EJUSTRETURN);
837}
838
41c20dac
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839/*
840 * sigreturn(ucontext_t *sigcntxp)
841 */
984263bc 842int
41c20dac 843sigreturn(struct sigreturn_args *uap)
984263bc 844{
41c20dac 845 struct proc *p = curproc;
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846 struct trapframe *regs;
847 ucontext_t *ucp;
848 int cs, eflags;
849
850 ucp = uap->sigcntxp;
851
852 if (!useracc((caddr_t)ucp, sizeof(struct osigcontext), VM_PROT_READ))
853 return (EFAULT);
854 if (((struct osigcontext *)ucp)->sc_trapno == 0x01d516)
41c20dac 855 return (osigreturn((struct osigreturn_args *)uap));
984263bc
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856
857 /*
858 * Since ucp is not an osigcontext but a ucontext_t, we have to
859 * check again if all of it is accessible. A ucontext_t is
860 * much larger, so instead of just checking for the pointer
861 * being valid for the size of an osigcontext, now check for
862 * it being valid for a whole, new-style ucontext_t.
863 */
864 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
865 return (EFAULT);
866
867 regs = p->p_md.md_regs;
868 eflags = ucp->uc_mcontext.mc_eflags;
869
870 if (eflags & PSL_VM) {
871 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
872 struct vm86_kernel *vm86;
873
874 /*
875 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
876 * set up the vm86 area, and we can't enter vm86 mode.
877 */
b7c628e4 878 if (p->p_thread->td_pcb->pcb_ext == 0)
984263bc 879 return (EINVAL);
b7c628e4 880 vm86 = &p->p_thread->td_pcb->pcb_ext->ext_vm86;
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881 if (vm86->vm86_inited == 0)
882 return (EINVAL);
883
884 /* go back to user mode if both flags are set */
885 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
886 trapsignal(p, SIGBUS, 0);
887
888 if (vm86->vm86_has_vme) {
889 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
890 (eflags & VME_USERCHANGE) | PSL_VM;
891 } else {
892 vm86->vm86_eflags = eflags; /* save VIF, VIP */
893 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
894 }
895 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
896 tf->tf_eflags = eflags;
897 tf->tf_vm86_ds = tf->tf_ds;
898 tf->tf_vm86_es = tf->tf_es;
899 tf->tf_vm86_fs = tf->tf_fs;
900 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
901 tf->tf_ds = _udatasel;
902 tf->tf_es = _udatasel;
903 tf->tf_fs = _udatasel;
904 } else {
905 /*
906 * Don't allow users to change privileged or reserved flags.
907 */
908 /*
909 * XXX do allow users to change the privileged flag PSL_RF.
910 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
911 * should sometimes set it there too. tf_eflags is kept in
912 * the signal context during signal handling and there is no
913 * other place to remember it, so the PSL_RF bit may be
914 * corrupted by the signal handler without us knowing.
915 * Corruption of the PSL_RF bit at worst causes one more or
916 * one less debugger trap, so allowing it is fairly harmless.
917 */
918 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
919 printf("sigreturn: eflags = 0x%x\n", eflags);
920 return(EINVAL);
921 }
922
923 /*
924 * Don't allow users to load a valid privileged %cs. Let the
925 * hardware check for invalid selectors, excess privilege in
926 * other selectors, invalid %eip's and invalid %esp's.
927 */
928 cs = ucp->uc_mcontext.mc_cs;
929 if (!CS_SECURE(cs)) {
930 printf("sigreturn: cs = 0x%x\n", cs);
931 trapsignal(p, SIGBUS, T_PROTFLT);
932 return(EINVAL);
933 }
934 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
935 }
936
937 if (ucp->uc_mcontext.mc_onstack & 1)
938 p->p_sigstk.ss_flags |= SS_ONSTACK;
939 else
940 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
941
942 p->p_sigmask = ucp->uc_sigmask;
943 SIG_CANTMASK(p->p_sigmask);
944 return(EJUSTRETURN);
945}
946
947/*
948 * Machine dependent boot() routine
949 *
950 * I haven't seen anything to put here yet
951 * Possibly some stuff might be grafted back here from boot()
952 */
953void
954cpu_boot(int howto)
955{
956}
957
958/*
959 * Shutdown the CPU as much as possible
960 */
961void
962cpu_halt(void)
963{
964 for (;;)
965 __asm__ ("hlt");
966}
967
968/*
8ad65e08
MD
969 * cpu_idle() represents the idle LWKT. You cannot return from this function
970 * (unless you want to blow things up!). Instead we look for runnable threads
971 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 972 *
8ad65e08
MD
973 * Note on cpu_idle_hlt: On an SMP system this may cause the system to
974 * halt until the next clock tick, even if a thread is ready YYY
984263bc
MD
975 */
976#ifdef SMP
977static int cpu_idle_hlt = 0;
978#else
979static int cpu_idle_hlt = 1;
980#endif
981SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
982 &cpu_idle_hlt, 0, "Idle loop HLT enable");
983
984void
985cpu_idle(void)
986{
f1d1c3fa 987 spl0();
8ad65e08 988 for (;;) {
8ad65e08
MD
989 lwkt_switch();
990 if (cpu_idle_hlt) {
991 /*
992 * We must guarentee that hlt is exactly the instruction
993 * following the sti.
994 */
995 __asm __volatile("sti; hlt");
996 } else {
997 __asm __volatile("sti");
998 }
8ad65e08 999 /* YYY BGL */
984263bc
MD
1000 }
1001}
1002
1003/*
1004 * Clear registers on exec
1005 */
1006void
1007setregs(p, entry, stack, ps_strings)
1008 struct proc *p;
1009 u_long entry;
1010 u_long stack;
1011 u_long ps_strings;
1012{
1013 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 1014 struct pcb *pcb = p->p_thread->td_pcb;
984263bc
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1015
1016 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1017 pcb->pcb_gs = _udatasel;
1018 load_gs(_udatasel);
1019
1020#ifdef USER_LDT
1021 /* was i386_user_cleanup() in NetBSD */
1022 user_ldt_free(pcb);
1023#endif
1024
1025 bzero((char *)regs, sizeof(struct trapframe));
1026 regs->tf_eip = entry;
1027 regs->tf_esp = stack;
1028 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1029 regs->tf_ss = _udatasel;
1030 regs->tf_ds = _udatasel;
1031 regs->tf_es = _udatasel;
1032 regs->tf_fs = _udatasel;
1033 regs->tf_cs = _ucodesel;
1034
1035 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1036 regs->tf_ebx = ps_strings;
1037
1038 /*
1039 * Reset the hardware debug registers if they were in use.
1040 * They won't have any meaning for the newly exec'd process.
1041 */
1042 if (pcb->pcb_flags & PCB_DBREGS) {
1043 pcb->pcb_dr0 = 0;
1044 pcb->pcb_dr1 = 0;
1045 pcb->pcb_dr2 = 0;
1046 pcb->pcb_dr3 = 0;
1047 pcb->pcb_dr6 = 0;
1048 pcb->pcb_dr7 = 0;
b7c628e4 1049 if (pcb == curthread->td_pcb) {
984263bc
MD
1050 /*
1051 * Clear the debug registers on the running
1052 * CPU, otherwise they will end up affecting
1053 * the next process we switch to.
1054 */
1055 reset_dbregs();
1056 }
1057 pcb->pcb_flags &= ~PCB_DBREGS;
1058 }
1059
1060 /*
1061 * Initialize the math emulator (if any) for the current process.
1062 * Actually, just clear the bit that says that the emulator has
1063 * been initialized. Initialization is delayed until the process
1064 * traps to the emulator (if it is done at all) mainly because
1065 * emulators don't provide an entry point for initialization.
1066 */
b7c628e4 1067 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
984263bc
MD
1068
1069 /*
1070 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1071 * for why fwait must be trapped at least if there is an npx or an
1072 * emulator). This is mainly to handle the case where npx0 is not
1073 * configured, since the npx routines normally set up the trap
1074 * otherwise. It should be done only at boot time, but doing it
1075 * here allows modifying `npx_exists' for testing the emulator on
1076 * systems with an npx.
1077 */
1078 load_cr0(rcr0() | CR0_MP | CR0_TS);
1079
1080#if NNPX > 0
1081 /* Initialize the npx (if any) for the current process. */
1082 npxinit(__INITIAL_NPXCW__);
1083#endif
1084
1085 /*
1086 * XXX - Linux emulator
1087 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1088 * on it.
1089 */
1090 p->p_retval[1] = 0;
1091}
1092
1093void
1094cpu_setregs(void)
1095{
1096 unsigned int cr0;
1097
1098 cr0 = rcr0();
1099 cr0 |= CR0_NE; /* Done by npxinit() */
1100 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1101#ifdef I386_CPU
1102 if (cpu_class != CPUCLASS_386)
1103#endif
1104 cr0 |= CR0_WP | CR0_AM;
1105 load_cr0(cr0);
1106 load_gs(_udatasel);
1107}
1108
1109static int
1110sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1111{
1112 int error;
1113 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1114 req);
1115 if (!error && req->newptr)
1116 resettodr();
1117 return (error);
1118}
1119
1120SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1121 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1122
1123SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1124 CTLFLAG_RW, &disable_rtc_set, 0, "");
1125
1126SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1127 CTLFLAG_RD, &bootinfo, bootinfo, "");
1128
1129SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1130 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1131
1132extern u_long bootdev; /* not a dev_t - encoding is different */
1133SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1134 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1135
1136/*
1137 * Initialize 386 and configure to run kernel
1138 */
1139
1140/*
1141 * Initialize segments & interrupt table
1142 */
1143
1144int _default_ldt;
1145union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1146static struct gate_descriptor idt0[NIDT];
1147struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1148union descriptor ldt[NLDT]; /* local descriptor table */
1149#ifdef SMP
1150/* table descriptors - used to load tables by microp */
1151struct region_descriptor r_gdt, r_idt;
1152#endif
1153
1154#ifndef SMP
1155extern struct segment_descriptor common_tssd, *tss_gdt;
1156#endif
1157int private_tss; /* flag indicating private tss */
1158
1159#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1160extern int has_f00f_bug;
1161#endif
1162
1163static struct i386tss dblfault_tss;
1164static char dblfault_stack[PAGE_SIZE];
1165
1166extern struct user *proc0paddr;
1167
1168
1169/* software prototypes -- in more palatable form */
1170struct soft_segment_descriptor gdt_segs[] = {
1171/* GNULL_SEL 0 Null Descriptor */
1172{ 0x0, /* segment base address */
1173 0x0, /* length */
1174 0, /* segment type */
1175 0, /* segment descriptor priority level */
1176 0, /* segment descriptor present */
1177 0, 0,
1178 0, /* default 32 vs 16 bit size */
1179 0 /* limit granularity (byte/page units)*/ },
1180/* GCODE_SEL 1 Code Descriptor for kernel */
1181{ 0x0, /* segment base address */
1182 0xfffff, /* length - all address space */
1183 SDT_MEMERA, /* segment type */
1184 0, /* segment descriptor priority level */
1185 1, /* segment descriptor present */
1186 0, 0,
1187 1, /* default 32 vs 16 bit size */
1188 1 /* limit granularity (byte/page units)*/ },
1189/* GDATA_SEL 2 Data Descriptor for kernel */
1190{ 0x0, /* segment base address */
1191 0xfffff, /* length - all address space */
1192 SDT_MEMRWA, /* segment type */
1193 0, /* segment descriptor priority level */
1194 1, /* segment descriptor present */
1195 0, 0,
1196 1, /* default 32 vs 16 bit size */
1197 1 /* limit granularity (byte/page units)*/ },
1198/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1199{ 0x0, /* segment base address */
1200 0xfffff, /* length - all address space */
1201 SDT_MEMRWA, /* segment type */
1202 0, /* segment descriptor priority level */
1203 1, /* segment descriptor present */
1204 0, 0,
1205 1, /* default 32 vs 16 bit size */
1206 1 /* limit granularity (byte/page units)*/ },
1207/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1208{
1209 0x0, /* segment base address */
1210 sizeof(struct i386tss)-1,/* length - all address space */
1211 SDT_SYS386TSS, /* segment type */
1212 0, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1214 0, 0,
1215 0, /* unused - default 32 vs 16 bit size */
1216 0 /* limit granularity (byte/page units)*/ },
1217/* GLDT_SEL 5 LDT Descriptor */
1218{ (int) ldt, /* segment base address */
1219 sizeof(ldt)-1, /* length - all address space */
1220 SDT_SYSLDT, /* segment type */
1221 SEL_UPL, /* segment descriptor priority level */
1222 1, /* segment descriptor present */
1223 0, 0,
1224 0, /* unused - default 32 vs 16 bit size */
1225 0 /* limit granularity (byte/page units)*/ },
1226/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1227{ (int) ldt, /* segment base address */
1228 (512 * sizeof(union descriptor)-1), /* length */
1229 SDT_SYSLDT, /* segment type */
1230 0, /* segment descriptor priority level */
1231 1, /* segment descriptor present */
1232 0, 0,
1233 0, /* unused - default 32 vs 16 bit size */
1234 0 /* limit granularity (byte/page units)*/ },
1235/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1236{ 0x0, /* segment base address */
1237 0x0, /* length - all address space */
1238 0, /* segment type */
1239 0, /* segment descriptor priority level */
1240 0, /* segment descriptor present */
1241 0, 0,
1242 0, /* default 32 vs 16 bit size */
1243 0 /* limit granularity (byte/page units)*/ },
1244/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1245{ 0x400, /* segment base address */
1246 0xfffff, /* length */
1247 SDT_MEMRWA, /* segment type */
1248 0, /* segment descriptor priority level */
1249 1, /* segment descriptor present */
1250 0, 0,
1251 1, /* default 32 vs 16 bit size */
1252 1 /* limit granularity (byte/page units)*/ },
1253/* GPANIC_SEL 9 Panic Tss Descriptor */
1254{ (int) &dblfault_tss, /* segment base address */
1255 sizeof(struct i386tss)-1,/* length - all address space */
1256 SDT_SYS386TSS, /* segment type */
1257 0, /* segment descriptor priority level */
1258 1, /* segment descriptor present */
1259 0, 0,
1260 0, /* unused - default 32 vs 16 bit size */
1261 0 /* limit granularity (byte/page units)*/ },
1262/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1263{ 0, /* segment base address (overwritten) */
1264 0xfffff, /* length */
1265 SDT_MEMERA, /* segment type */
1266 0, /* segment descriptor priority level */
1267 1, /* segment descriptor present */
1268 0, 0,
1269 0, /* default 32 vs 16 bit size */
1270 1 /* limit granularity (byte/page units)*/ },
1271/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1272{ 0, /* segment base address (overwritten) */
1273 0xfffff, /* length */
1274 SDT_MEMERA, /* segment type */
1275 0, /* segment descriptor priority level */
1276 1, /* segment descriptor present */
1277 0, 0,
1278 0, /* default 32 vs 16 bit size */
1279 1 /* limit granularity (byte/page units)*/ },
1280/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1281{ 0, /* segment base address (overwritten) */
1282 0xfffff, /* length */
1283 SDT_MEMRWA, /* segment type */
1284 0, /* segment descriptor priority level */
1285 1, /* segment descriptor present */
1286 0, 0,
1287 1, /* default 32 vs 16 bit size */
1288 1 /* limit granularity (byte/page units)*/ },
1289/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1290{ 0, /* segment base address (overwritten) */
1291 0xfffff, /* length */
1292 SDT_MEMRWA, /* segment type */
1293 0, /* segment descriptor priority level */
1294 1, /* segment descriptor present */
1295 0, 0,
1296 0, /* default 32 vs 16 bit size */
1297 1 /* limit granularity (byte/page units)*/ },
1298/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1299{ 0, /* segment base address (overwritten) */
1300 0xfffff, /* length */
1301 SDT_MEMRWA, /* segment type */
1302 0, /* segment descriptor priority level */
1303 1, /* segment descriptor present */
1304 0, 0,
1305 0, /* default 32 vs 16 bit size */
1306 1 /* limit granularity (byte/page units)*/ },
1307};
1308
1309static struct soft_segment_descriptor ldt_segs[] = {
1310 /* Null Descriptor - overwritten by call gate */
1311{ 0x0, /* segment base address */
1312 0x0, /* length - all address space */
1313 0, /* segment type */
1314 0, /* segment descriptor priority level */
1315 0, /* segment descriptor present */
1316 0, 0,
1317 0, /* default 32 vs 16 bit size */
1318 0 /* limit granularity (byte/page units)*/ },
1319 /* Null Descriptor - overwritten by call gate */
1320{ 0x0, /* segment base address */
1321 0x0, /* length - all address space */
1322 0, /* segment type */
1323 0, /* segment descriptor priority level */
1324 0, /* segment descriptor present */
1325 0, 0,
1326 0, /* default 32 vs 16 bit size */
1327 0 /* limit granularity (byte/page units)*/ },
1328 /* Null Descriptor - overwritten by call gate */
1329{ 0x0, /* segment base address */
1330 0x0, /* length - all address space */
1331 0, /* segment type */
1332 0, /* segment descriptor priority level */
1333 0, /* segment descriptor present */
1334 0, 0,
1335 0, /* default 32 vs 16 bit size */
1336 0 /* limit granularity (byte/page units)*/ },
1337 /* Code Descriptor for user */
1338{ 0x0, /* segment base address */
1339 0xfffff, /* length - all address space */
1340 SDT_MEMERA, /* segment type */
1341 SEL_UPL, /* segment descriptor priority level */
1342 1, /* segment descriptor present */
1343 0, 0,
1344 1, /* default 32 vs 16 bit size */
1345 1 /* limit granularity (byte/page units)*/ },
1346 /* Null Descriptor - overwritten by call gate */
1347{ 0x0, /* segment base address */
1348 0x0, /* length - all address space */
1349 0, /* segment type */
1350 0, /* segment descriptor priority level */
1351 0, /* segment descriptor present */
1352 0, 0,
1353 0, /* default 32 vs 16 bit size */
1354 0 /* limit granularity (byte/page units)*/ },
1355 /* Data Descriptor for user */
1356{ 0x0, /* segment base address */
1357 0xfffff, /* length - all address space */
1358 SDT_MEMRWA, /* segment type */
1359 SEL_UPL, /* segment descriptor priority level */
1360 1, /* segment descriptor present */
1361 0, 0,
1362 1, /* default 32 vs 16 bit size */
1363 1 /* limit granularity (byte/page units)*/ },
1364};
1365
1366void
1367setidt(idx, func, typ, dpl, selec)
1368 int idx;
1369 inthand_t *func;
1370 int typ;
1371 int dpl;
1372 int selec;
1373{
1374 struct gate_descriptor *ip;
1375
1376 ip = idt + idx;
1377 ip->gd_looffset = (int)func;
1378 ip->gd_selector = selec;
1379 ip->gd_stkcpy = 0;
1380 ip->gd_xx = 0;
1381 ip->gd_type = typ;
1382 ip->gd_dpl = dpl;
1383 ip->gd_p = 1;
1384 ip->gd_hioffset = ((int)func)>>16 ;
1385}
1386
1387#define IDTVEC(name) __CONCAT(X,name)
1388
1389extern inthand_t
1390 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1391 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1392 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1393 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1394 IDTVEC(xmm), IDTVEC(syscall), IDTVEC(int0x80_syscall);
1395
1396void
1397sdtossd(sd, ssd)
1398 struct segment_descriptor *sd;
1399 struct soft_segment_descriptor *ssd;
1400{
1401 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1402 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1403 ssd->ssd_type = sd->sd_type;
1404 ssd->ssd_dpl = sd->sd_dpl;
1405 ssd->ssd_p = sd->sd_p;
1406 ssd->ssd_def32 = sd->sd_def32;
1407 ssd->ssd_gran = sd->sd_gran;
1408}
1409
1410#define PHYSMAP_SIZE (2 * 8)
1411
1412/*
1413 * Populate the (physmap) array with base/bound pairs describing the
1414 * available physical memory in the system, then test this memory and
1415 * build the phys_avail array describing the actually-available memory.
1416 *
1417 * If we cannot accurately determine the physical memory map, then use
1418 * value from the 0xE801 call, and failing that, the RTC.
1419 *
1420 * Total memory size may be set by the kernel environment variable
1421 * hw.physmem or the compile-time define MAXMEM.
1422 */
1423static void
1424getmemsize(int first)
1425{
1426 int i, physmap_idx, pa_indx;
1427 int hasbrokenint12;
1428 u_int basemem, extmem;
1429 struct vm86frame vmf;
1430 struct vm86context vmc;
1431 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1432 pt_entry_t pte;
1433 const char *cp;
1434 struct {
1435 u_int64_t base;
1436 u_int64_t length;
1437 u_int32_t type;
1438 } *smap;
1439
1440 hasbrokenint12 = 0;
1441 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1442 bzero(&vmf, sizeof(struct vm86frame));
1443 bzero(physmap, sizeof(physmap));
1444 basemem = 0;
1445
1446 /*
1447 * Some newer BIOSes has broken INT 12H implementation which cause
1448 * kernel panic immediately. In this case, we need to scan SMAP
1449 * with INT 15:E820 first, then determine base memory size.
1450 */
1451 if (hasbrokenint12) {
1452 goto int15e820;
1453 }
1454
1455 /*
1456 * Perform "base memory" related probes & setup
1457 */
1458 vm86_intcall(0x12, &vmf);
1459 basemem = vmf.vmf_ax;
1460 if (basemem > 640) {
1461 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1462 basemem);
1463 basemem = 640;
1464 }
1465
1466 /*
1467 * XXX if biosbasemem is now < 640, there is a `hole'
1468 * between the end of base memory and the start of
1469 * ISA memory. The hole may be empty or it may
1470 * contain BIOS code or data. Map it read/write so
1471 * that the BIOS can write to it. (Memory from 0 to
1472 * the physical end of the kernel is mapped read-only
1473 * to begin with and then parts of it are remapped.
1474 * The parts that aren't remapped form holes that
1475 * remain read-only and are unused by the kernel.
1476 * The base memory area is below the physical end of
1477 * the kernel and right now forms a read-only hole.
1478 * The part of it from PAGE_SIZE to
1479 * (trunc_page(biosbasemem * 1024) - 1) will be
1480 * remapped and used by the kernel later.)
1481 *
1482 * This code is similar to the code used in
1483 * pmap_mapdev, but since no memory needs to be
1484 * allocated we simply change the mapping.
1485 */
1486 for (pa = trunc_page(basemem * 1024);
1487 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1488 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1489 *pte = pa | PG_RW | PG_V;
1490 }
1491
1492 /*
1493 * if basemem != 640, map pages r/w into vm86 page table so
1494 * that the bios can scribble on it.
1495 */
1496 pte = (pt_entry_t)vm86paddr;
1497 for (i = basemem / 4; i < 160; i++)
1498 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1499
1500int15e820:
1501 /*
1502 * map page 1 R/W into the kernel page table so we can use it
1503 * as a buffer. The kernel will unmap this page later.
1504 */
1505 pte = (pt_entry_t)vtopte(KERNBASE + (1 << PAGE_SHIFT));
1506 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1507
1508 /*
1509 * get memory map with INT 15:E820
1510 */
1511#define SMAPSIZ sizeof(*smap)
1512#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1513
1514 vmc.npages = 0;
1515 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1516 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1517
1518 physmap_idx = 0;
1519 vmf.vmf_ebx = 0;
1520 do {
1521 vmf.vmf_eax = 0xE820;
1522 vmf.vmf_edx = SMAP_SIG;
1523 vmf.vmf_ecx = SMAPSIZ;
1524 i = vm86_datacall(0x15, &vmf, &vmc);
1525 if (i || vmf.vmf_eax != SMAP_SIG)
1526 break;
1527 if (boothowto & RB_VERBOSE)
1528 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1529 smap->type,
1530 *(u_int32_t *)((char *)&smap->base + 4),
1531 (u_int32_t)smap->base,
1532 *(u_int32_t *)((char *)&smap->length + 4),
1533 (u_int32_t)smap->length);
1534
1535 if (smap->type != 0x01)
1536 goto next_run;
1537
1538 if (smap->length == 0)
1539 goto next_run;
1540
1541 if (smap->base >= 0xffffffff) {
1542 printf("%uK of memory above 4GB ignored\n",
1543 (u_int)(smap->length / 1024));
1544 goto next_run;
1545 }
1546
1547 for (i = 0; i <= physmap_idx; i += 2) {
1548 if (smap->base < physmap[i + 1]) {
1549 if (boothowto & RB_VERBOSE)
1550 printf(
1551 "Overlapping or non-montonic memory region, ignoring second region\n");
1552 goto next_run;
1553 }
1554 }
1555
1556 if (smap->base == physmap[physmap_idx + 1]) {
1557 physmap[physmap_idx + 1] += smap->length;
1558 goto next_run;
1559 }
1560
1561 physmap_idx += 2;
1562 if (physmap_idx == PHYSMAP_SIZE) {
1563 printf(
1564 "Too many segments in the physical address map, giving up\n");
1565 break;
1566 }
1567 physmap[physmap_idx] = smap->base;
1568 physmap[physmap_idx + 1] = smap->base + smap->length;
1569next_run:
1570 } while (vmf.vmf_ebx != 0);
1571
1572 /*
1573 * Perform "base memory" related probes & setup based on SMAP
1574 */
1575 if (basemem == 0) {
1576 for (i = 0; i <= physmap_idx; i += 2) {
1577 if (physmap[i] == 0x00000000) {
1578 basemem = physmap[i + 1] / 1024;
1579 break;
1580 }
1581 }
1582
1583 if (basemem == 0) {
1584 basemem = 640;
1585 }
1586
1587 if (basemem > 640) {
1588 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1589 basemem);
1590 basemem = 640;
1591 }
1592
1593 for (pa = trunc_page(basemem * 1024);
1594 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1595 pte = (pt_entry_t)vtopte(pa + KERNBASE);
1596 *pte = pa | PG_RW | PG_V;
1597 }
1598
1599 pte = (pt_entry_t)vm86paddr;
1600 for (i = basemem / 4; i < 160; i++)
1601 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1602 }
1603
1604 if (physmap[1] != 0)
1605 goto physmap_done;
1606
1607 /*
1608 * If we failed above, try memory map with INT 15:E801
1609 */
1610 vmf.vmf_ax = 0xE801;
1611 if (vm86_intcall(0x15, &vmf) == 0) {
1612 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1613 } else {
1614#if 0
1615 vmf.vmf_ah = 0x88;
1616 vm86_intcall(0x15, &vmf);
1617 extmem = vmf.vmf_ax;
1618#else
1619 /*
1620 * Prefer the RTC value for extended memory.
1621 */
1622 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1623#endif
1624 }
1625
1626 /*
1627 * Special hack for chipsets that still remap the 384k hole when
1628 * there's 16MB of memory - this really confuses people that
1629 * are trying to use bus mastering ISA controllers with the
1630 * "16MB limit"; they only have 16MB, but the remapping puts
1631 * them beyond the limit.
1632 *
1633 * If extended memory is between 15-16MB (16-17MB phys address range),
1634 * chop it to 15MB.
1635 */
1636 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1637 extmem = 15 * 1024;
1638
1639 physmap[0] = 0;
1640 physmap[1] = basemem * 1024;
1641 physmap_idx = 2;
1642 physmap[physmap_idx] = 0x100000;
1643 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1644
1645physmap_done:
1646 /*
1647 * Now, physmap contains a map of physical memory.
1648 */
1649
1650#ifdef SMP
1651 /* make hole for AP bootstrap code */
1652 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1653
1654 /* look for the MP hardware - needed for apic addresses */
1655 mp_probe();
1656#endif
1657
1658 /*
1659 * Maxmem isn't the "maximum memory", it's one larger than the
1660 * highest page of the physical address space. It should be
1661 * called something like "Maxphyspage". We may adjust this
1662 * based on ``hw.physmem'' and the results of the memory test.
1663 */
1664 Maxmem = atop(physmap[physmap_idx + 1]);
1665
1666#ifdef MAXMEM
1667 Maxmem = MAXMEM / 4;
1668#endif
1669
1670 /*
1671 * hw.maxmem is a size in bytes; we also allow k, m, and g suffixes
1672 * for the appropriate modifiers. This overrides MAXMEM.
1673 */
1674 if ((cp = getenv("hw.physmem")) != NULL) {
1675 u_int64_t AllowMem, sanity;
1676 char *ep;
1677
1678 sanity = AllowMem = strtouq(cp, &ep, 0);
1679 if ((ep != cp) && (*ep != 0)) {
1680 switch(*ep) {
1681 case 'g':
1682 case 'G':
1683 AllowMem <<= 10;
1684 case 'm':
1685 case 'M':
1686 AllowMem <<= 10;
1687 case 'k':
1688 case 'K':
1689 AllowMem <<= 10;
1690 break;
1691 default:
1692 AllowMem = sanity = 0;
1693 }
1694 if (AllowMem < sanity)
1695 AllowMem = 0;
1696 }
1697 if (AllowMem == 0)
1698 printf("Ignoring invalid memory size of '%s'\n", cp);
1699 else
1700 Maxmem = atop(AllowMem);
1701 }
1702
1703 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1704 (boothowto & RB_VERBOSE))
1705 printf("Physical memory use set to %uK\n", Maxmem * 4);
1706
1707 /*
1708 * If Maxmem has been increased beyond what the system has detected,
1709 * extend the last memory segment to the new limit.
1710 */
1711 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1712 physmap[physmap_idx + 1] = ptoa(Maxmem);
1713
1714 /* call pmap initialization to make new kernel address space */
1715 pmap_bootstrap(first, 0);
1716
1717 /*
1718 * Size up each available chunk of physical memory.
1719 */
1720 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1721 pa_indx = 0;
1722 phys_avail[pa_indx++] = physmap[0];
1723 phys_avail[pa_indx] = physmap[0];
1724#if 0
1725 pte = (pt_entry_t)vtopte(KERNBASE);
1726#else
1727 pte = (pt_entry_t)CMAP1;
1728#endif
1729
1730 /*
1731 * physmap is in bytes, so when converting to page boundaries,
1732 * round up the start address and round down the end address.
1733 */
1734 for (i = 0; i <= physmap_idx; i += 2) {
1735 vm_offset_t end;
1736
1737 end = ptoa(Maxmem);
1738 if (physmap[i + 1] < end)
1739 end = trunc_page(physmap[i + 1]);
1740 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1741 int tmp, page_bad;
1742#if 0
1743 int *ptr = 0;
1744#else
1745 int *ptr = (int *)CADDR1;
1746#endif
1747
1748 /*
1749 * block out kernel memory as not available.
1750 */
1751 if (pa >= 0x100000 && pa < first)
1752 continue;
1753
1754 page_bad = FALSE;
1755
1756 /*
1757 * map page into kernel: valid, read/write,non-cacheable
1758 */
1759 *pte = pa | PG_V | PG_RW | PG_N;
1760 invltlb();
1761
1762 tmp = *(int *)ptr;
1763 /*
1764 * Test for alternating 1's and 0's
1765 */
1766 *(volatile int *)ptr = 0xaaaaaaaa;
1767 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1768 page_bad = TRUE;
1769 }
1770 /*
1771 * Test for alternating 0's and 1's
1772 */
1773 *(volatile int *)ptr = 0x55555555;
1774 if (*(volatile int *)ptr != 0x55555555) {
1775 page_bad = TRUE;
1776 }
1777 /*
1778 * Test for all 1's
1779 */
1780 *(volatile int *)ptr = 0xffffffff;
1781 if (*(volatile int *)ptr != 0xffffffff) {
1782 page_bad = TRUE;
1783 }
1784 /*
1785 * Test for all 0's
1786 */
1787 *(volatile int *)ptr = 0x0;
1788 if (*(volatile int *)ptr != 0x0) {
1789 page_bad = TRUE;
1790 }
1791 /*
1792 * Restore original value.
1793 */
1794 *(int *)ptr = tmp;
1795
1796 /*
1797 * Adjust array of valid/good pages.
1798 */
1799 if (page_bad == TRUE) {
1800 continue;
1801 }
1802 /*
1803 * If this good page is a continuation of the
1804 * previous set of good pages, then just increase
1805 * the end pointer. Otherwise start a new chunk.
1806 * Note that "end" points one higher than end,
1807 * making the range >= start and < end.
1808 * If we're also doing a speculative memory
1809 * test and we at or past the end, bump up Maxmem
1810 * so that we keep going. The first bad page
1811 * will terminate the loop.
1812 */
1813 if (phys_avail[pa_indx] == pa) {
1814 phys_avail[pa_indx] += PAGE_SIZE;
1815 } else {
1816 pa_indx++;
1817 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1818 printf("Too many holes in the physical address space, giving up\n");
1819 pa_indx--;
1820 break;
1821 }
1822 phys_avail[pa_indx++] = pa; /* start */
1823 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1824 }
1825 physmem++;
1826 }
1827 }
1828 *pte = 0;
1829 invltlb();
1830
1831 /*
1832 * XXX
1833 * The last chunk must contain at least one page plus the message
1834 * buffer to avoid complicating other code (message buffer address
1835 * calculation, etc.).
1836 */
1837 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1838 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1839 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1840 phys_avail[pa_indx--] = 0;
1841 phys_avail[pa_indx--] = 0;
1842 }
1843
1844 Maxmem = atop(phys_avail[pa_indx]);
1845
1846 /* Trim off space for the message buffer. */
1847 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1848
1849 avail_end = phys_avail[pa_indx];
1850}
1851
1852void
1853init386(first)
1854 int first;
1855{
1856 struct gate_descriptor *gdp;
1857 int gsel_tss, metadata_missing, off, x;
1858#ifndef SMP
1859 /* table descriptors - used to load tables by microp */
1860 struct region_descriptor r_gdt, r_idt;
1861#endif
84b592ba 1862 struct globaldata *gd;
984263bc
MD
1863
1864 /*
1865 * Prevent lowering of the ipl if we call tsleep() early.
1866 */
7d0bac62 1867 gd = &CPU_prvspace[0].globaldata;
984263bc 1868
7d0bac62
MD
1869 lwkt_init_thread(&thread0, proc0paddr);
1870 gd->gd_curthread = &thread0;
8f41e33b 1871 safepri = thread0.td_cpl = SWI_MASK | HWI_MASK;
7d0bac62 1872 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
7e1d4bf4 1873 proc0.p_addr = (void *)thread0.td_kstack;
b7c628e4
MD
1874 proc0.p_thread = &thread0;
1875 thread0.td_proc = &proc0;
f1d1c3fa 1876 thread0.td_flags = TDF_RUNNING;
984263bc
MD
1877
1878 atdevbase = ISA_HOLE_START + KERNBASE;
1879
1880 metadata_missing = 0;
1881 if (bootinfo.bi_modulep) {
1882 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1883 preload_bootstrap_relocate(KERNBASE);
1884 } else {
1885 metadata_missing = 1;
1886 }
1887 if (bootinfo.bi_envp)
1888 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1889
1890 /* Init basic tunables, hz etc */
1891 init_param1();
1892
1893 /*
1894 * make gdt memory segments, the code segment goes up to end of the
1895 * page with etext in it, the data segment goes to the end of
1896 * the address space
1897 */
1898 /*
1899 * XXX text protection is temporarily (?) disabled. The limit was
1900 * i386_btop(round_page(etext)) - 1.
1901 */
1902 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1903 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1904#ifdef SMP
1905 gdt_segs[GPRIV_SEL].ssd_limit =
1906 atop(sizeof(struct privatespace) - 1);
8ad65e08 1907 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1908 gdt_segs[GPROC0_SEL].ssd_base =
8ad65e08 1909 (int) &CPU_prvspace[0].globaldata.gd_common_tss;
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1910#else
1911 gdt_segs[GPRIV_SEL].ssd_limit = atop(0 - 1);
1912 gdt_segs[GPROC0_SEL].ssd_base = (int) &common_tss;
1913#endif
8ad65e08 1914 gd->gd_prvspace = &CPU_prvspace[0];
84b592ba
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1915 /*
1916 * Note: on both UP and SMP curthread must be set non-NULL
1917 * early in the boot sequence because the system assumes
1918 * that 'curthread' is never NULL.
1919 */
1920 /* YYY use prvspace for UP too and set here rather then later */
8ad65e08
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1921 mi_gdinit(gd, 0);
1922 cpu_gdinit(gd, 0);
984263bc
MD
1923
1924 for (x = 0; x < NGDT; x++) {
1925#ifdef BDE_DEBUGGER
1926 /* avoid overwriting db entries with APM ones */
1927 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1928 continue;
1929#endif
1930 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1931 }
1932
1933 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1934 r_gdt.rd_base = (int) gdt;
1935 lgdt(&r_gdt);
1936
1937 /* make ldt memory segments */
1938 /*
1939 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1940 * should be spelled ...MAX_USER...
1941 */
1942 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1943 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1944 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1945 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1946
1947 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1948 lldt(_default_ldt);
1949#ifdef USER_LDT
1950 currentldt = _default_ldt;
1951#endif
1952
1953 /* exceptions */
1954 for (x = 0; x < NIDT; x++)
1955 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1965 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1966 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1967 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1968 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1969 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1970 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1971 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1972 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1973 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1974 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1975 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1976 setidt(0x80, &IDTVEC(int0x80_syscall),
1977 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1978
1979 r_idt.rd_limit = sizeof(idt0) - 1;
1980 r_idt.rd_base = (int) idt;
1981 lidt(&r_idt);
1982
1983 /*
1984 * Initialize the console before we print anything out.
1985 */
1986 cninit();
1987
1988 if (metadata_missing)
1989 printf("WARNING: loader(8) metadata is missing!\n");
1990
1991#include "isa.h"
1992#if NISA >0
1993 isa_defaultirq();
1994#endif
1995 rand_initialize();
1996
1997#ifdef DDB
1998 kdb_init();
1999 if (boothowto & RB_KDB)
2000 Debugger("Boot flags requested debugger");
2001#endif
2002
2003 finishidentcpu(); /* Final stage of CPU initialization */
2004 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2005 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2006 initializecpu(); /* Initialize CPU registers */
2007
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2008 /*
2009 * make an initial tss so cpu can get interrupt stack on syscall!
2010 * The 16 bytes is to save room for a VM86 context.
2011 */
2012 common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
984263bc
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2013 common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2014 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2015 private_tss = 0;
2016 tss_gdt = &gdt[GPROC0_SEL].sd;
2017 common_tssd = *tss_gdt;
2018 common_tss.tss_ioopt = (sizeof common_tss) << 16;
2019 ltr(gsel_tss);
2020
2021 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2022 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2023 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2024 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2025 dblfault_tss.tss_cr3 = (int)IdlePTD;
2026 dblfault_tss.tss_eip = (int) dblfault_handler;
2027 dblfault_tss.tss_eflags = PSL_KERNEL;
2028 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2029 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2030 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2031 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2032 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2033
2034 vm86_initialize();
2035 getmemsize(first);
2036 init_param2(physmem);
2037
2038 /* now running on new page tables, configured,and u/iom is accessible */
2039
2040 /* Map the message buffer. */
2041 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2042 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2043
2044 msgbufinit(msgbufp, MSGBUF_SIZE);
2045
2046 /* make a call gate to reenter kernel with */
2047 gdp = &ldt[LSYS5CALLS_SEL].gd;
2048
2049 x = (int) &IDTVEC(syscall);
2050 gdp->gd_looffset = x++;
2051 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2052 gdp->gd_stkcpy = 1;
2053 gdp->gd_type = SDT_SYS386CGT;
2054 gdp->gd_dpl = SEL_UPL;
2055 gdp->gd_p = 1;
2056 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2057
2058 /* XXX does this work? */
2059 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2060 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2061
2062 /* transfer to user mode */
2063
2064 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2065 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2066
2067 /* setup proc 0's pcb */
b7c628e4
MD
2068 thread0.td_pcb->pcb_flags = 0;
2069 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
984263bc 2070#ifdef SMP
b7c628e4 2071 thread0.td_pcb->pcb_mpnest = 1;
984263bc 2072#endif
b7c628e4 2073 thread0.td_pcb->pcb_ext = 0;
984263bc
MD
2074 proc0.p_md.md_regs = &proc0_tf;
2075}
2076
8ad65e08
MD
2077/*
2078 * Initialize machine-dependant portions of the global data structure
2079 *
2080 * YYY do we need to reserve pcb space for idlethread?
2081 */
2082void
2083cpu_gdinit(struct globaldata *gd, int cpu)
2084{
2085 char *sp;
8ad65e08 2086
7d0bac62
MD
2087 TAILQ_INIT(&gd->gd_tdfreeq); /* for pmap_{new,dispose}_thread() */
2088 if (cpu)
8ad65e08
MD
2089 gd->gd_curthread = &gd->gd_idlethread;
2090 sp = gd->gd_prvspace->idlestack;
7d0bac62 2091 lwkt_init_thread(&gd->gd_idlethread, sp);
8ad65e08 2092 gd->gd_idlethread.td_switch = cpu_lwkt_switch;
7d0bac62 2093 gd->gd_idlethread.td_sp -= sizeof(void *);
8ad65e08 2094 *(void **)gd->gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2095}
2096
984263bc
MD
2097#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2098static void f00f_hack(void *unused);
2099SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2100
2101static void
2102f00f_hack(void *unused) {
2103 struct gate_descriptor *new_idt;
2104#ifndef SMP
2105 struct region_descriptor r_idt;
2106#endif
2107 vm_offset_t tmp;
2108
2109 if (!has_f00f_bug)
2110 return;
2111
2112 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2113
2114 r_idt.rd_limit = sizeof(idt0) - 1;
2115
2116 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2117 if (tmp == 0)
2118 panic("kmem_alloc returned 0");
2119 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2120 panic("kmem_alloc returned non-page-aligned memory");
2121 /* Put the first seven entries in the lower page */
2122 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2123 bcopy(idt, new_idt, sizeof(idt0));
2124 r_idt.rd_base = (int)new_idt;
2125 lidt(&r_idt);
2126 idt = new_idt;
2127 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2128 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2129 panic("vm_map_protect failed");
2130 return;
2131}
2132#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2133
2134int
2135ptrace_set_pc(p, addr)
2136 struct proc *p;
2137 unsigned long addr;
2138{
2139 p->p_md.md_regs->tf_eip = addr;
2140 return (0);
2141}
2142
2143int
2144ptrace_single_step(p)
2145 struct proc *p;
2146{
2147 p->p_md.md_regs->tf_eflags |= PSL_T;
2148 return (0);
2149}
2150
2151int ptrace_read_u_check(p, addr, len)
2152 struct proc *p;
2153 vm_offset_t addr;
2154 size_t len;
2155{
2156 vm_offset_t gap;
2157
2158 if ((vm_offset_t) (addr + len) < addr)
2159 return EPERM;
2160 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2161 return 0;
2162
2163 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2164
2165 if ((vm_offset_t) addr < gap)
2166 return EPERM;
2167 if ((vm_offset_t) (addr + len) <=
2168 (vm_offset_t) (gap + sizeof(struct trapframe)))
2169 return 0;
2170 return EPERM;
2171}
2172
2173int ptrace_write_u(p, off, data)
2174 struct proc *p;
2175 vm_offset_t off;
2176 long data;
2177{
2178 struct trapframe frame_copy;
2179 vm_offset_t min;
2180 struct trapframe *tp;
2181
2182 /*
2183 * Privileged kernel state is scattered all over the user area.
2184 * Only allow write access to parts of regs and to fpregs.
2185 */
2186 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2187 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2188 tp = p->p_md.md_regs;
2189 frame_copy = *tp;
2190 *(int *)((char *)&frame_copy + (off - min)) = data;
2191 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2192 !CS_SECURE(frame_copy.tf_cs))
2193 return (EINVAL);
2194 *(int*)((char *)p->p_addr + off) = data;
2195 return (0);
2196 }
b7c628e4
MD
2197
2198 /*
2199 * The PCB is at the end of the user area YYY
2200 */
2201 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2202 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2203 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2204 *(int*)((char *)p->p_addr + off) = data;
2205 return (0);
2206 }
2207 return (EFAULT);
2208}
2209
2210int
2211fill_regs(p, regs)
2212 struct proc *p;
2213 struct reg *regs;
2214{
2215 struct pcb *pcb;
2216 struct trapframe *tp;
2217
2218 tp = p->p_md.md_regs;
2219 regs->r_fs = tp->tf_fs;
2220 regs->r_es = tp->tf_es;
2221 regs->r_ds = tp->tf_ds;
2222 regs->r_edi = tp->tf_edi;
2223 regs->r_esi = tp->tf_esi;
2224 regs->r_ebp = tp->tf_ebp;
2225 regs->r_ebx = tp->tf_ebx;
2226 regs->r_edx = tp->tf_edx;
2227 regs->r_ecx = tp->tf_ecx;
2228 regs->r_eax = tp->tf_eax;
2229 regs->r_eip = tp->tf_eip;
2230 regs->r_cs = tp->tf_cs;
2231 regs->r_eflags = tp->tf_eflags;
2232 regs->r_esp = tp->tf_esp;
2233 regs->r_ss = tp->tf_ss;
b7c628e4 2234 pcb = p->p_thread->td_pcb;
984263bc
MD
2235 regs->r_gs = pcb->pcb_gs;
2236 return (0);
2237}
2238
2239int
2240set_regs(p, regs)
2241 struct proc *p;
2242 struct reg *regs;
2243{
2244 struct pcb *pcb;
2245 struct trapframe *tp;
2246
2247 tp = p->p_md.md_regs;
2248 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2249 !CS_SECURE(regs->r_cs))
2250 return (EINVAL);
2251 tp->tf_fs = regs->r_fs;
2252 tp->tf_es = regs->r_es;
2253 tp->tf_ds = regs->r_ds;
2254 tp->tf_edi = regs->r_edi;
2255 tp->tf_esi = regs->r_esi;
2256 tp->tf_ebp = regs->r_ebp;
2257 tp->tf_ebx = regs->r_ebx;
2258 tp->tf_edx = regs->r_edx;
2259 tp->tf_ecx = regs->r_ecx;
2260 tp->tf_eax = regs->r_eax;
2261 tp->tf_eip = regs->r_eip;
2262 tp->tf_cs = regs->r_cs;
2263 tp->tf_eflags = regs->r_eflags;
2264 tp->tf_esp = regs->r_esp;
2265 tp->tf_ss = regs->r_ss;
b7c628e4 2266 pcb = p->p_thread->td_pcb;
984263bc
MD
2267 pcb->pcb_gs = regs->r_gs;
2268 return (0);
2269}
2270
2271#ifdef CPU_ENABLE_SSE
2272static void
2273fill_fpregs_xmm(sv_xmm, sv_87)
2274 struct savexmm *sv_xmm;
2275 struct save87 *sv_87;
2276{
2277 register struct env87 *penv_87 = &sv_87->sv_env;
2278 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2279 int i;
2280
2281 /* FPU control/status */
2282 penv_87->en_cw = penv_xmm->en_cw;
2283 penv_87->en_sw = penv_xmm->en_sw;
2284 penv_87->en_tw = penv_xmm->en_tw;
2285 penv_87->en_fip = penv_xmm->en_fip;
2286 penv_87->en_fcs = penv_xmm->en_fcs;
2287 penv_87->en_opcode = penv_xmm->en_opcode;
2288 penv_87->en_foo = penv_xmm->en_foo;
2289 penv_87->en_fos = penv_xmm->en_fos;
2290
2291 /* FPU registers */
2292 for (i = 0; i < 8; ++i)
2293 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2294
2295 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2296}
2297
2298static void
2299set_fpregs_xmm(sv_87, sv_xmm)
2300 struct save87 *sv_87;
2301 struct savexmm *sv_xmm;
2302{
2303 register struct env87 *penv_87 = &sv_87->sv_env;
2304 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2305 int i;
2306
2307 /* FPU control/status */
2308 penv_xmm->en_cw = penv_87->en_cw;
2309 penv_xmm->en_sw = penv_87->en_sw;
2310 penv_xmm->en_tw = penv_87->en_tw;
2311 penv_xmm->en_fip = penv_87->en_fip;
2312 penv_xmm->en_fcs = penv_87->en_fcs;
2313 penv_xmm->en_opcode = penv_87->en_opcode;
2314 penv_xmm->en_foo = penv_87->en_foo;
2315 penv_xmm->en_fos = penv_87->en_fos;
2316
2317 /* FPU registers */
2318 for (i = 0; i < 8; ++i)
2319 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2320
2321 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2322}
2323#endif /* CPU_ENABLE_SSE */
2324
2325int
2326fill_fpregs(p, fpregs)
2327 struct proc *p;
2328 struct fpreg *fpregs;
2329{
2330#ifdef CPU_ENABLE_SSE
2331 if (cpu_fxsr) {
b7c628e4 2332 fill_fpregs_xmm(&p->p_thread->td_pcb->pcb_save.sv_xmm,
984263bc
MD
2333 (struct save87 *)fpregs);
2334 return (0);
2335 }
2336#endif /* CPU_ENABLE_SSE */
b7c628e4 2337 bcopy(&p->p_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2338 return (0);
2339}
2340
2341int
2342set_fpregs(p, fpregs)
2343 struct proc *p;
2344 struct fpreg *fpregs;
2345{
2346#ifdef CPU_ENABLE_SSE
2347 if (cpu_fxsr) {
2348 set_fpregs_xmm((struct save87 *)fpregs,
b7c628e4 2349 &p->p_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2350 return (0);
2351 }
2352#endif /* CPU_ENABLE_SSE */
b7c628e4 2353 bcopy(fpregs, &p->p_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2354 return (0);
2355}
2356
2357int
2358fill_dbregs(p, dbregs)
2359 struct proc *p;
2360 struct dbreg *dbregs;
2361{
2362 struct pcb *pcb;
2363
2364 if (p == NULL) {
2365 dbregs->dr0 = rdr0();
2366 dbregs->dr1 = rdr1();
2367 dbregs->dr2 = rdr2();
2368 dbregs->dr3 = rdr3();
2369 dbregs->dr4 = rdr4();
2370 dbregs->dr5 = rdr5();
2371 dbregs->dr6 = rdr6();
2372 dbregs->dr7 = rdr7();
2373 }
2374 else {
b7c628e4 2375 pcb = p->p_thread->td_pcb;
984263bc
MD
2376 dbregs->dr0 = pcb->pcb_dr0;
2377 dbregs->dr1 = pcb->pcb_dr1;
2378 dbregs->dr2 = pcb->pcb_dr2;
2379 dbregs->dr3 = pcb->pcb_dr3;
2380 dbregs->dr4 = 0;
2381 dbregs->dr5 = 0;
2382 dbregs->dr6 = pcb->pcb_dr6;
2383 dbregs->dr7 = pcb->pcb_dr7;
2384 }
2385 return (0);
2386}
2387
2388int
2389set_dbregs(p, dbregs)
2390 struct proc *p;
2391 struct dbreg *dbregs;
2392{
2393 struct pcb *pcb;
2394 int i;
2395 u_int32_t mask1, mask2;
2396
2397 if (p == NULL) {
2398 load_dr0(dbregs->dr0);
2399 load_dr1(dbregs->dr1);
2400 load_dr2(dbregs->dr2);
2401 load_dr3(dbregs->dr3);
2402 load_dr4(dbregs->dr4);
2403 load_dr5(dbregs->dr5);
2404 load_dr6(dbregs->dr6);
2405 load_dr7(dbregs->dr7);
2406 }
2407 else {
2408 /*
2409 * Don't let an illegal value for dr7 get set. Specifically,
2410 * check for undefined settings. Setting these bit patterns
2411 * result in undefined behaviour and can lead to an unexpected
2412 * TRCTRAP.
2413 */
2414 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2415 i++, mask1 <<= 2, mask2 <<= 2)
2416 if ((dbregs->dr7 & mask1) == mask2)
2417 return (EINVAL);
2418
b7c628e4 2419 pcb = p->p_thread->td_pcb;
984263bc
MD
2420
2421 /*
2422 * Don't let a process set a breakpoint that is not within the
2423 * process's address space. If a process could do this, it
2424 * could halt the system by setting a breakpoint in the kernel
2425 * (if ddb was enabled). Thus, we need to check to make sure
2426 * that no breakpoints are being enabled for addresses outside
2427 * process's address space, unless, perhaps, we were called by
2428 * uid 0.
2429 *
2430 * XXX - what about when the watched area of the user's
2431 * address space is written into from within the kernel
2432 * ... wouldn't that still cause a breakpoint to be generated
2433 * from within kernel mode?
2434 */
2435
dadab5e9 2436 if (suser_cred(p->p_ucred, 0) != 0) {
984263bc
MD
2437 if (dbregs->dr7 & 0x3) {
2438 /* dr0 is enabled */
2439 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2440 return (EINVAL);
2441 }
2442
2443 if (dbregs->dr7 & (0x3<<2)) {
2444 /* dr1 is enabled */
2445 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2446 return (EINVAL);
2447 }
2448
2449 if (dbregs->dr7 & (0x3<<4)) {
2450 /* dr2 is enabled */
2451 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2452 return (EINVAL);
2453 }
2454
2455 if (dbregs->dr7 & (0x3<<6)) {
2456 /* dr3 is enabled */
2457 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2458 return (EINVAL);
2459 }
2460 }
2461
2462 pcb->pcb_dr0 = dbregs->dr0;
2463 pcb->pcb_dr1 = dbregs->dr1;
2464 pcb->pcb_dr2 = dbregs->dr2;
2465 pcb->pcb_dr3 = dbregs->dr3;
2466 pcb->pcb_dr6 = dbregs->dr6;
2467 pcb->pcb_dr7 = dbregs->dr7;
2468
2469 pcb->pcb_flags |= PCB_DBREGS;
2470 }
2471
2472 return (0);
2473}
2474
2475/*
2476 * Return > 0 if a hardware breakpoint has been hit, and the
2477 * breakpoint was in user space. Return 0, otherwise.
2478 */
2479int
2480user_dbreg_trap(void)
2481{
2482 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2483 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2484 int nbp; /* number of breakpoints that triggered */
2485 caddr_t addr[4]; /* breakpoint addresses */
2486 int i;
2487
2488 dr7 = rdr7();
2489 if ((dr7 & 0x000000ff) == 0) {
2490 /*
2491 * all GE and LE bits in the dr7 register are zero,
2492 * thus the trap couldn't have been caused by the
2493 * hardware debug registers
2494 */
2495 return 0;
2496 }
2497
2498 nbp = 0;
2499 dr6 = rdr6();
2500 bp = dr6 & 0x0000000f;
2501
2502 if (!bp) {
2503 /*
2504 * None of the breakpoint bits are set meaning this
2505 * trap was not caused by any of the debug registers
2506 */
2507 return 0;
2508 }
2509
2510 /*
2511 * at least one of the breakpoints were hit, check to see
2512 * which ones and if any of them are user space addresses
2513 */
2514
2515 if (bp & 0x01) {
2516 addr[nbp++] = (caddr_t)rdr0();
2517 }
2518 if (bp & 0x02) {
2519 addr[nbp++] = (caddr_t)rdr1();
2520 }
2521 if (bp & 0x04) {
2522 addr[nbp++] = (caddr_t)rdr2();
2523 }
2524 if (bp & 0x08) {
2525 addr[nbp++] = (caddr_t)rdr3();
2526 }
2527
2528 for (i=0; i<nbp; i++) {
2529 if (addr[i] <
2530 (caddr_t)VM_MAXUSER_ADDRESS) {
2531 /*
2532 * addr[i] is in user space
2533 */
2534 return nbp;
2535 }
2536 }
2537
2538 /*
2539 * None of the breakpoints are in user space.
2540 */
2541 return 0;
2542}
2543
2544
2545#ifndef DDB
2546void
2547Debugger(const char *msg)
2548{
2549 printf("Debugger(\"%s\") called.\n", msg);
2550}
2551#endif /* no DDB */
2552
2553#include <sys/disklabel.h>
2554
2555/*
2556 * Determine the size of the transfer, and make sure it is
2557 * within the boundaries of the partition. Adjust transfer
2558 * if needed, and signal errors or early completion.
2559 */
2560int
2561bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2562{
2563 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2564 int labelsect = lp->d_partitions[0].p_offset;
2565 int maxsz = p->p_size,
2566 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2567
2568 /* overwriting disk label ? */
2569 /* XXX should also protect bootstrap in first 8K */
2570 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2571#if LABELSECTOR != 0
2572 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2573#endif
2574 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2575 bp->b_error = EROFS;
2576 goto bad;
2577 }
2578
2579#if defined(DOSBBSECTOR) && defined(notyet)
2580 /* overwriting master boot record? */
2581 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2582 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2583 bp->b_error = EROFS;
2584 goto bad;
2585 }
2586#endif
2587
2588 /* beyond partition? */
2589 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2590 /* if exactly at end of disk, return an EOF */
2591 if (bp->b_blkno == maxsz) {
2592 bp->b_resid = bp->b_bcount;
2593 return(0);
2594 }
2595 /* or truncate if part of it fits */
2596 sz = maxsz - bp->b_blkno;
2597 if (sz <= 0) {
2598 bp->b_error = EINVAL;
2599 goto bad;
2600 }
2601 bp->b_bcount = sz << DEV_BSHIFT;
2602 }
2603
2604 bp->b_pblkno = bp->b_blkno + p->p_offset;
2605 return(1);
2606
2607bad:
2608 bp->b_flags |= B_ERROR;
2609 return(-1);
2610}
2611
2612#ifdef DDB
2613
2614/*
2615 * Provide inb() and outb() as functions. They are normally only
2616 * available as macros calling inlined functions, thus cannot be
2617 * called inside DDB.
2618 *
2619 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2620 */
2621
2622#undef inb
2623#undef outb
2624
2625/* silence compiler warnings */
2626u_char inb(u_int);
2627void outb(u_int, u_char);
2628
2629u_char
2630inb(u_int port)
2631{
2632 u_char data;
2633 /*
2634 * We use %%dx and not %1 here because i/o is done at %dx and not at
2635 * %edx, while gcc generates inferior code (movw instead of movl)
2636 * if we tell it to load (u_short) port.
2637 */
2638 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2639 return (data);
2640}
2641
2642void
2643outb(u_int port, u_char data)
2644{
2645 u_char al;
2646 /*
2647 * Use an unnecessary assignment to help gcc's register allocator.
2648 * This make a large difference for gcc-1.40 and a tiny difference
2649 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2650 * best results. gcc-2.6.0 can't handle this.
2651 */
2652 al = data;
2653 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2654}
2655
2656#endif /* DDB */