kernel: Replace the remaining __amd64__ with __x86_64__ for consistency.
[dragonfly.git] / sys / dev / netif / ixgbe / ixgbe_osdep.h
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1/******************************************************************************
2
3 Copyright (c) 2001-2012, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
ce451236 33/*$FreeBSD: src/sys/dev/ixgbe/ixgbe_osdep.h,v 1.13 2012/07/05 20:51:44 jfv Exp $*/
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34
35#ifndef _IXGBE_OS_H_
36#define _IXGBE_OS_H_
37
38#include <sys/types.h>
39#include <sys/param.h>
40#include <sys/endian.h>
41#include <sys/systm.h>
42#include <sys/mbuf.h>
43#include <sys/protosw.h>
44#include <sys/socket.h>
45#include <sys/malloc.h>
46#include <sys/kernel.h>
47#include <sys/bus.h>
48#include <sys/rman.h>
49#include <vm/vm.h>
50#include <vm/pmap.h>
51#include <machine/clock.h>
52#include <bus/pci/pcivar.h>
53#include <bus/pci/pcireg.h>
54
55#define ASSERT(x) if(!(x)) panic("IXGBE: x")
ce451236 56#define EWARN(H, W, S) kprintf(W)
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57
58/* The happy-fun DELAY macro is defined in /usr/src/sys/i386/include/clock.h */
59#define usec_delay(x) DELAY(x)
60#define msec_delay(x) DELAY(1000*(x))
61
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62#define DBG 0
63#define MSGOUT(S, A, B) kprintf(S "\n", A, B)
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64#define DEBUGFUNC(F) DEBUGOUT(F);
65#if DBG
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66 #define DEBUGOUT(S) kprintf(S "\n")
67 #define DEBUGOUT1(S,A) kprintf(S "\n",A)
68 #define DEBUGOUT2(S,A,B) kprintf(S "\n",A,B)
69 #define DEBUGOUT3(S,A,B,C) kprintf(S "\n",A,B,C)
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70 #define DEBUGOUT4(S,A,B,C,D) kprintf(S "\n",A,B,C,D)
71 #define DEBUGOUT5(S,A,B,C,D,E) kprintf(S "\n",A,B,C,D,E)
72 #define DEBUGOUT6(S,A,B,C,D,E,F) kprintf(S "\n",A,B,C,D,E,F)
5b016eae 73 #define DEBUGOUT7(S,A,B,C,D,E,F,G) kprintf(S "\n",A,B,C,D,E,F,G)
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74#else
75 #define DEBUGOUT(S)
76 #define DEBUGOUT1(S,A)
77 #define DEBUGOUT2(S,A,B)
78 #define DEBUGOUT3(S,A,B,C)
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79 #define DEBUGOUT4(S,A,B,C,D)
80 #define DEBUGOUT5(S,A,B,C,D,E)
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81 #define DEBUGOUT6(S,A,B,C,D,E,F)
82 #define DEBUGOUT7(S,A,B,C,D,E,F,G)
83#endif
84
85#define FALSE 0
86#define false 0 /* shared code requires this */
87#define TRUE 1
88#define true 1
89#define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
90#define PCI_COMMAND_REGISTER PCIR_COMMAND
91
92/* Bunch of defines for shared code bogosity */
93#define UNREFERENCED_PARAMETER(_p)
94#define UNREFERENCED_1PARAMETER(_p)
95#define UNREFERENCED_2PARAMETER(_p, _q)
96#define UNREFERENCED_3PARAMETER(_p, _q, _r)
97#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
98
99
100#define IXGBE_NTOHL(_i) ntohl(_i)
101#define IXGBE_NTOHS(_i) ntohs(_i)
102
103/* XXX these need to be revisited */
104#define IXGBE_CPU_TO_LE32 le32toh
105#define IXGBE_LE32_TO_CPUS le32dec
106
107typedef uint8_t u8;
108typedef int8_t s8;
109typedef uint16_t u16;
110typedef uint32_t u32;
111typedef int32_t s32;
112typedef uint64_t u64;
113#ifndef __bool_true_false_are_defined
114typedef boolean_t bool;
115#endif
116
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117/* shared code requires this */
118#define __le16 u16
119#define __le32 u32
120#define __le64 u64
121#define __be16 u16
122#define __be32 u32
123#define __be64 u64
124
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125#define le16_to_cpu
126
dbefba87 127#if defined(__i386__) || defined(__x86_64__)
9407f759 128#define wmb() __asm volatile("sfence" ::: "memory")
9407f759 129#else
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130#define wmb()
131#endif
9407f759 132
dbefba87 133#if defined(__i386__) || defined(__x86_64__)
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134static __inline
135void prefetch(void *x)
136{
137 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
138}
139#else
140#define prefetch(x)
141#endif
142
143struct ixgbe_osdep
144{
145 bus_space_tag_t mem_bus_space_tag;
146 bus_space_handle_t mem_bus_space_handle;
147 struct device *dev;
148};
149
150/* These routines are needed by the shared code */
151struct ixgbe_hw;
152extern u16 ixgbe_read_pci_cfg(struct ixgbe_hw *, u32);
153#define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
154
155extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, u32, u16);
156#define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
157
158#define IXGBE_WRITE_FLUSH(a) IXGBE_READ_REG(a, IXGBE_STATUS)
159
160#define IXGBE_READ_REG(a, reg) (\
161 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
162 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
163 reg))
164
165#define IXGBE_WRITE_REG(a, reg, value) (\
166 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
167 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
168 reg, value))
169
170
171#define IXGBE_READ_REG_ARRAY(a, reg, offset) (\
172 bus_space_read_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
173 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
174 (reg + ((offset) << 2))))
175
176#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) (\
177 bus_space_write_4( ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_tag, \
178 ((struct ixgbe_osdep *)(a)->back)->mem_bus_space_handle, \
179 (reg + ((offset) << 2)), value))
180
181
182#endif /* _IXGBE_OS_H_ */