EST's module was being installed before the module list got initialized,
[dragonfly.git] / sys / kern / kern_intr.c
CommitLineData
984263bc 1/*
033a4603 2 * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved.
ef0fdad1 3 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved.
984263bc
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4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
ba39e2e0 27 * $DragonFly: src/sys/kern/kern_intr.c,v 1.47 2007/04/30 07:18:53 dillon Exp $
984263bc
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28 *
29 */
30
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31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/malloc.h>
34#include <sys/kernel.h>
35#include <sys/sysctl.h>
ef0fdad1
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36#include <sys/thread.h>
37#include <sys/proc.h>
38#include <sys/thread2.h>
7e071e7a 39#include <sys/random.h>
477d3c1c 40#include <sys/serialize.h>
a7231bde 41#include <sys/interrupt.h>
477d3c1c 42#include <sys/bus.h>
37e7efec 43#include <sys/machintr.h>
984263bc 44
477d3c1c 45#include <machine/frame.h>
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46
47#include <sys/interrupt.h>
48
9d522d14
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49struct info_info;
50
ef0fdad1
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51typedef struct intrec {
52 struct intrec *next;
9d522d14 53 struct intr_info *info;
ef0fdad1
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54 inthand2_t *handler;
55 void *argument;
477d3c1c 56 char *name;
ef0fdad1 57 int intr;
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58 int intr_flags;
59 struct lwkt_serialize *serializer;
60} *intrec_t;
61
62struct intr_info {
63 intrec_t i_reclist;
64 struct thread i_thread;
65 struct random_softc i_random;
66 int i_running;
862f2618
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67 long i_count; /* interrupts dispatched */
68 int i_mplock_required;
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69 int i_fast;
70 int i_slow;
f33e9c1c 71 int i_state;
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72} intr_info_ary[MAX_INTS];
73
74int max_installed_hard_intr;
75int max_installed_soft_intr;
477d3c1c 76
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77#define EMERGENCY_INTR_POLLING_FREQ_MAX 20000
78
79static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS);
80static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS);
81static void emergency_intr_timer_callback(systimer_t, struct intrframe *);
82static void ithread_handler(void *arg);
83static void ithread_emergency(void *arg);
84
477d3c1c 85int intr_info_size = sizeof(intr_info_ary) / sizeof(intr_info_ary[0]);
37d44089 86
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87static struct systimer emergency_intr_timer;
88static struct thread emergency_intr_thread;
89
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90#define ISTATE_NOTHREAD 0
91#define ISTATE_NORMAL 1
92#define ISTATE_LIVELOCKED 2
37d44089 93
0e6beaa3 94#ifdef SMP
862f2618 95static int intr_mpsafe = 0;
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96TUNABLE_INT("kern.intr_mpsafe", &intr_mpsafe);
97SYSCTL_INT(_kern, OID_AUTO, intr_mpsafe,
98 CTLFLAG_RW, &intr_mpsafe, 0, "Run INTR_MPSAFE handlers without the BGL");
0e6beaa3
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99#endif
100static int livelock_limit = 50000;
101static int livelock_lowater = 20000;
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102SYSCTL_INT(_kern, OID_AUTO, livelock_limit,
103 CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit");
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104SYSCTL_INT(_kern, OID_AUTO, livelock_lowater,
105 CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore");
984263bc 106
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107static int emergency_intr_enable = 0; /* emergency interrupt polling */
108TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable);
109SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW,
110 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable");
111
112static int emergency_intr_freq = 10; /* emergency polling frequency */
113TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq);
114SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW,
115 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency");
116
117/*
118 * Sysctl support routines
119 */
120static int
121sysctl_emergency_enable(SYSCTL_HANDLER_ARGS)
122{
123 int error, enabled;
124
125 enabled = emergency_intr_enable;
126 error = sysctl_handle_int(oidp, &enabled, 0, req);
127 if (error || req->newptr == NULL)
128 return error;
129 emergency_intr_enable = enabled;
130 if (emergency_intr_enable) {
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131 systimer_adjust_periodic(&emergency_intr_timer,
132 emergency_intr_freq);
a9d00ec1 133 } else {
ba39e2e0 134 systimer_adjust_periodic(&emergency_intr_timer, 1);
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135 }
136 return 0;
137}
138
139static int
140sysctl_emergency_freq(SYSCTL_HANDLER_ARGS)
141{
142 int error, phz;
143
144 phz = emergency_intr_freq;
145 error = sysctl_handle_int(oidp, &phz, 0, req);
146 if (error || req->newptr == NULL)
147 return error;
148 if (phz <= 0)
149 return EINVAL;
150 else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX)
151 phz = EMERGENCY_INTR_POLLING_FREQ_MAX;
152
153 emergency_intr_freq = phz;
154 if (emergency_intr_enable) {
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155 systimer_adjust_periodic(&emergency_intr_timer,
156 emergency_intr_freq);
a9d00ec1 157 } else {
ba39e2e0 158 systimer_adjust_periodic(&emergency_intr_timer, 1);
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159 }
160 return 0;
161}
984263bc 162
45d76888
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163/*
164 * Register an SWI or INTerrupt handler.
45d76888 165 */
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166void *
167register_swi(int intr, inthand2_t *handler, void *arg, const char *name,
168 struct lwkt_serialize *serializer)
984263bc 169{
5f456c40 170 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
ef0fdad1 171 panic("register_swi: bad intr %d", intr);
477d3c1c 172 return(register_int(intr, handler, arg, name, serializer, 0));
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173}
174
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175void *
176register_int(int intr, inthand2_t *handler, void *arg, const char *name,
177 struct lwkt_serialize *serializer, int intr_flags)
984263bc 178{
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179 struct intr_info *info;
180 struct intrec **list;
181 intrec_t rec;
ef0fdad1 182
5f456c40 183 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 184 panic("register_int: bad intr %d", intr);
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185 if (name == NULL)
186 name = "???";
187 info = &intr_info_ary[intr];
188
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189 /*
190 * Construct an interrupt handler record
191 */
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192 rec = kmalloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT);
193 rec->name = kmalloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT);
477d3c1c 194 strcpy(rec->name, name);
ef0fdad1 195
9d522d14 196 rec->info = info;
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197 rec->handler = handler;
198 rec->argument = arg;
ef0fdad1 199 rec->intr = intr;
477d3c1c 200 rec->intr_flags = intr_flags;
ef0fdad1 201 rec->next = NULL;
477d3c1c 202 rec->serializer = serializer;
ef0fdad1 203
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204 /*
205 * Create an emergency polling thread and set up a systimer to wake
206 * it up.
207 */
208 if (emergency_intr_thread.td_kstack == NULL) {
209 lwkt_create(ithread_emergency, NULL, NULL,
210 &emergency_intr_thread, TDF_STOPREQ|TDF_INTTHREAD, -1,
211 "ithread emerg");
212 systimer_init_periodic_nq(&emergency_intr_timer,
213 emergency_intr_timer_callback, &emergency_intr_thread,
214 (emergency_intr_enable ? emergency_intr_freq : 1));
215 }
216
ef0fdad1
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217 /*
218 * Create an interrupt thread if necessary, leave it in an unscheduled
45d76888 219 * state.
ef0fdad1 220 */
f33e9c1c
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221 if (info->i_state == ISTATE_NOTHREAD) {
222 info->i_state = ISTATE_NORMAL;
477d3c1c 223 lwkt_create((void *)ithread_handler, (void *)intr, NULL,
862f2618 224 &info->i_thread, TDF_STOPREQ|TDF_INTTHREAD|TDF_MPSAFE, -1,
75cdbe6c 225 "ithread %d", intr);
5f456c40 226 if (intr >= FIRST_SOFTINT)
477d3c1c 227 lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM);
4b5f931b 228 else
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MD
229 lwkt_setpri(&info->i_thread, TDPRI_INT_MED);
230 info->i_thread.td_preemptable = lwkt_preempt;
ef0fdad1
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231 }
232
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233 list = &info->i_reclist;
234
ef0fdad1 235 /*
9d522d14 236 * Keep track of how many fast and slow interrupts we have.
862f2618
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237 * Set i_mplock_required if any handler in the chain requires
238 * the MP lock to operate.
ef0fdad1 239 */
862f2618
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240 if ((intr_flags & INTR_MPSAFE) == 0)
241 info->i_mplock_required = 1;
9d522d14
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242 if (intr_flags & INTR_FAST)
243 ++info->i_fast;
244 else
245 ++info->i_slow;
246
8b3ec75a
MD
247 /*
248 * Enable random number generation keying off of this interrupt.
249 */
250 if ((intr_flags & INTR_NOENTROPY) == 0 && info->i_random.sc_enabled == 0) {
251 info->i_random.sc_enabled = 1;
252 info->i_random.sc_intr = intr;
253 }
254
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255 /*
256 * Add the record to the interrupt list.
257 */
258 crit_enter();
ef0fdad1
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259 while (*list != NULL)
260 list = &(*list)->next;
261 *list = rec;
262 crit_exit();
5f456c40
MD
263
264 /*
265 * Update max_installed_hard_intr to make the emergency intr poll
266 * a bit more efficient.
267 */
268 if (intr < FIRST_SOFTINT) {
269 if (max_installed_hard_intr <= intr)
270 max_installed_hard_intr = intr + 1;
271 } else {
272 if (max_installed_soft_intr <= intr)
273 max_installed_soft_intr = intr + 1;
274 }
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275
276 /*
277 * Setup the machine level interrupt vector
cd2cd928
MD
278 *
279 * XXX temporary workaround for some ACPI brokedness. ACPI installs
280 * its interrupt too early, before the IOAPICs have been configured,
281 * which means the IOAPIC is not enabled by the registration of the
282 * ACPI interrupt. Anything else sharing that IRQ will wind up not
283 * being enabled. Temporarily work around the problem by always
284 * installing and enabling on every new interrupt handler, even
285 * if one has already been setup on that irq.
9d522d14 286 */
cd2cd928 287 if (intr < FIRST_SOFTINT /* && info->i_slow + info->i_fast == 1*/) {
9d522d14 288 if (machintr_vector_setup(intr, intr_flags))
6ea70f76 289 kprintf("machintr_vector_setup: failed on irq %d\n", intr);
9d522d14
MD
290 }
291
477d3c1c 292 return(rec);
ef0fdad1 293}
984263bc 294
9d522d14 295void
477d3c1c 296unregister_swi(void *id)
ef0fdad1 297{
9d522d14 298 unregister_int(id);
984263bc
MD
299}
300
9d522d14 301void
477d3c1c 302unregister_int(void *id)
984263bc 303{
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MD
304 struct intr_info *info;
305 struct intrec **list;
306 intrec_t rec;
307 int intr;
308
309 intr = ((intrec_t)id)->intr;
ef0fdad1 310
5f456c40 311 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 312 panic("register_int: bad intr %d", intr);
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MD
313
314 info = &intr_info_ary[intr];
315
316 /*
9d522d14
MD
317 * Remove the interrupt descriptor, adjust the descriptor count,
318 * and teardown the machine level vector if this was the last interrupt.
477d3c1c 319 */
ef0fdad1 320 crit_enter();
477d3c1c 321 list = &info->i_reclist;
ef0fdad1 322 while ((rec = *list) != NULL) {
9d522d14 323 if (rec == id)
ef0fdad1 324 break;
ef0fdad1
MD
325 list = &rec->next;
326 }
9d522d14 327 if (rec) {
acf7409e
SZ
328 intrec_t rec0;
329
9d522d14
MD
330 *list = rec->next;
331 if (rec->intr_flags & INTR_FAST)
332 --info->i_fast;
333 else
334 --info->i_slow;
e8727dce 335 if (intr < FIRST_SOFTINT && info->i_fast + info->i_slow == 0)
9d522d14 336 machintr_vector_teardown(intr);
862f2618 337
acf7409e
SZ
338 /*
339 * Clear i_mplock_required if no handlers in the chain require the
340 * MP lock.
341 */
342 for (rec0 = info->i_reclist; rec0; rec0 = rec0->next) {
343 if ((rec0->intr_flags & INTR_MPSAFE) == 0)
344 break;
345 }
346 if (rec0 == NULL)
862f2618 347 info->i_mplock_required = 0;
acf7409e 348 }
862f2618 349
ef0fdad1 350 crit_exit();
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MD
351
352 /*
9d522d14 353 * Free the record.
477d3c1c 354 */
ef0fdad1 355 if (rec != NULL) {
efda3bd0
MD
356 kfree(rec->name, M_DEVBUF);
357 kfree(rec, M_DEVBUF);
ef0fdad1 358 } else {
6ea70f76 359 kprintf("warning: unregister_int: int %d handler for %s not found\n",
477d3c1c 360 intr, ((intrec_t)id)->name);
ef0fdad1 361 }
477d3c1c
MD
362}
363
364const char *
365get_registered_name(int intr)
366{
367 intrec_t rec;
368
5f456c40 369 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
370 panic("register_int: bad intr %d", intr);
371
372 if ((rec = intr_info_ary[intr].i_reclist) == NULL)
373 return(NULL);
374 else if (rec->next)
375 return("mux");
376 else
377 return(rec->name);
984263bc
MD
378}
379
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380int
381count_registered_ints(int intr)
382{
383 struct intr_info *info;
384
5f456c40 385 if (intr < 0 || intr >= MAX_INTS)
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MD
386 panic("register_int: bad intr %d", intr);
387 info = &intr_info_ary[intr];
388 return(info->i_fast + info->i_slow);
389}
390
391long
392get_interrupt_counter(int intr)
393{
394 struct intr_info *info;
395
5f456c40 396 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
397 panic("register_int: bad intr %d", intr);
398 info = &intr_info_ary[intr];
399 return(info->i_count);
400}
401
402
4b5f931b
MD
403void
404swi_setpriority(int intr, int pri)
405{
477d3c1c 406 struct intr_info *info;
4b5f931b 407
5f456c40 408 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
4b5f931b 409 panic("register_swi: bad intr %d", intr);
477d3c1c 410 info = &intr_info_ary[intr];
f33e9c1c 411 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 412 lwkt_setpri(&info->i_thread, pri);
4b5f931b
MD
413}
414
7e071e7a
MD
415void
416register_randintr(int intr)
417{
477d3c1c
MD
418 struct intr_info *info;
419
5f456c40 420 if (intr < 0 || intr >= MAX_INTS)
417c990a 421 panic("register_randintr: bad intr %d", intr);
477d3c1c
MD
422 info = &intr_info_ary[intr];
423 info->i_random.sc_intr = intr;
424 info->i_random.sc_enabled = 1;
7e071e7a
MD
425}
426
427void
428unregister_randintr(int intr)
429{
477d3c1c
MD
430 struct intr_info *info;
431
5f456c40 432 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
433 panic("register_swi: bad intr %d", intr);
434 info = &intr_info_ary[intr];
8b3ec75a 435 info->i_random.sc_enabled = -1;
7e071e7a
MD
436}
437
5f456c40
MD
438int
439next_registered_randintr(int intr)
440{
441 struct intr_info *info;
442
443 if (intr < 0 || intr >= MAX_INTS)
444 panic("register_swi: bad intr %d", intr);
445 while (intr < MAX_INTS) {
446 info = &intr_info_ary[intr];
8b3ec75a 447 if (info->i_random.sc_enabled > 0)
5f456c40
MD
448 break;
449 ++intr;
450 }
451 return(intr);
452}
453
ef0fdad1 454/*
b68b7282
MD
455 * Dispatch an interrupt. If there's nothing to do we have a stray
456 * interrupt and can just return, leaving the interrupt masked.
96728c05 457 *
477d3c1c 458 * We need to schedule the interrupt and set its i_running bit. If
96728c05
MD
459 * we are not on the interrupt thread's cpu we have to send a message
460 * to the correct cpu that will issue the desired action (interlocking
f33e9c1c
MD
461 * with the interrupt thread's critical section). We do NOT attempt to
462 * reschedule interrupts whos i_running bit is already set because
463 * this would prematurely wakeup a livelock-limited interrupt thread.
464 *
465 * i_running is only tested/set on the same cpu as the interrupt thread.
96728c05
MD
466 *
467 * We are NOT in a critical section, which will allow the scheduled
71ef2f5c 468 * interrupt to preempt us. The MP lock might *NOT* be held here.
ef0fdad1 469 */
b8a98473
MD
470#ifdef SMP
471
96728c05
MD
472static void
473sched_ithd_remote(void *arg)
474{
475 sched_ithd((int)arg);
476}
477
b8a98473
MD
478#endif
479
ef0fdad1
MD
480void
481sched_ithd(int intr)
482{
477d3c1c 483 struct intr_info *info;
ef0fdad1 484
477d3c1c
MD
485 info = &intr_info_ary[intr];
486
487 ++info->i_count;
f33e9c1c 488 if (info->i_state != ISTATE_NOTHREAD) {
477d3c1c 489 if (info->i_reclist == NULL) {
6ea70f76 490 kprintf("sched_ithd: stray interrupt %d\n", intr);
b68b7282 491 } else {
b8a98473 492#ifdef SMP
477d3c1c 493 if (info->i_thread.td_gd == mycpu) {
f33e9c1c
MD
494 if (info->i_running == 0) {
495 info->i_running = 1;
496 if (info->i_state != ISTATE_LIVELOCKED)
497 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
498 }
96728c05 499 } else {
477d3c1c
MD
500 lwkt_send_ipiq(info->i_thread.td_gd,
501 sched_ithd_remote, (void *)intr);
96728c05 502 }
b8a98473 503#else
f33e9c1c
MD
504 if (info->i_running == 0) {
505 info->i_running = 1;
506 if (info->i_state != ISTATE_LIVELOCKED)
507 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
508 }
b8a98473 509#endif
b68b7282 510 }
ef0fdad1 511 } else {
6ea70f76 512 kprintf("sched_ithd: stray interrupt %d\n", intr);
ef0fdad1
MD
513 }
514}
515
37d44089
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516/*
517 * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL
518 * might not be held).
519 */
520static void
477d3c1c 521ithread_livelock_wakeup(systimer_t st)
37d44089 522{
477d3c1c 523 struct intr_info *info;
37d44089 524
477d3c1c 525 info = &intr_info_ary[(int)st->data];
f33e9c1c 526 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 527 lwkt_schedule(&info->i_thread);
37d44089
MD
528}
529
67b9bb39 530/*
477d3c1c
MD
531 * This function is called drectly from the ICU or APIC vector code assembly
532 * to process an interrupt. The critical section and interrupt deferral
533 * checks have already been done but the function is entered WITHOUT
534 * a critical section held. The BGL may or may not be held.
535 *
536 * Must return non-zero if we do not want the vector code to re-enable
537 * the interrupt (which we don't if we have to schedule the interrupt)
67b9bb39 538 */
c7eb0589 539int ithread_fast_handler(struct intrframe *frame);
477d3c1c
MD
540
541int
c7eb0589 542ithread_fast_handler(struct intrframe *frame)
477d3c1c
MD
543{
544 int intr;
545 struct intr_info *info;
546 struct intrec **list;
547 int must_schedule;
548#ifdef SMP
549 int got_mplock;
550#endif
551 intrec_t rec, next_rec;
552 globaldata_t gd;
553
c7eb0589 554 intr = frame->if_vec;
477d3c1c
MD
555 gd = mycpu;
556
557 info = &intr_info_ary[intr];
558
559 /*
560 * If we are not processing any FAST interrupts, just schedule the thing.
561 * (since we aren't in a critical section, this can result in a
562 * preemption)
563 */
564 if (info->i_fast == 0) {
565 sched_ithd(intr);
566 return(1);
567 }
568
569 /*
570 * This should not normally occur since interrupts ought to be
571 * masked if the ithread has been scheduled or is running.
572 */
573 if (info->i_running)
574 return(1);
575
576 /*
577 * Bump the interrupt nesting level to process any FAST interrupts.
578 * Obtain the MP lock as necessary. If the MP lock cannot be obtained,
579 * schedule the interrupt thread to deal with the issue instead.
580 *
581 * To reduce overhead, just leave the MP lock held once it has been
582 * obtained.
583 */
584 crit_enter_gd(gd);
585 ++gd->gd_intr_nesting_level;
586 ++gd->gd_cnt.v_intr;
587 must_schedule = info->i_slow;
588#ifdef SMP
589 got_mplock = 0;
590#endif
591
592 list = &info->i_reclist;
593 for (rec = *list; rec; rec = next_rec) {
594 next_rec = rec->next; /* rec may be invalid after call */
595
596 if (rec->intr_flags & INTR_FAST) {
597#ifdef SMP
598 if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) {
599 if (try_mplock() == 0) {
afd7b1c0
MD
600 int owner;
601
477d3c1c 602 /*
afd7b1c0
MD
603 * If we couldn't get the MP lock try to forward it
604 * to the cpu holding the MP lock, setting must_schedule
605 * to -1 so we do not schedule and also do not unmask
606 * the interrupt. Otherwise just schedule it.
477d3c1c 607 */
afd7b1c0
MD
608 owner = owner_mplock();
609 if (owner >= 0 && owner != gd->gd_cpuid) {
610 lwkt_send_ipiq_bycpu(owner, forward_fastint_remote,
7e2d9bde 611 (void *)intr);
afd7b1c0
MD
612 must_schedule = -1;
613 ++gd->gd_cnt.v_forwarded_ints;
614 } else {
615 must_schedule = 1;
616 }
477d3c1c
MD
617 break;
618 }
619 got_mplock = 1;
620 }
621#endif
622 if (rec->serializer) {
623 must_schedule += lwkt_serialize_handler_try(
624 rec->serializer, rec->handler,
c7eb0589 625 rec->argument, frame);
477d3c1c 626 } else {
c7eb0589 627 rec->handler(rec->argument, frame);
477d3c1c
MD
628 }
629 }
630 }
631
632 /*
633 * Cleanup
634 */
635 --gd->gd_intr_nesting_level;
636#ifdef SMP
637 if (got_mplock)
638 rel_mplock();
639#endif
640 crit_exit_gd(gd);
641
642 /*
643 * If we had a problem, schedule the thread to catch the missed
644 * records (it will just re-run all of them). A return value of 0
645 * indicates that all handlers have been run and the interrupt can
646 * be re-enabled, and a non-zero return indicates that the interrupt
647 * thread controls re-enablement.
648 */
afd7b1c0 649 if (must_schedule > 0)
477d3c1c 650 sched_ithd(intr);
afd7b1c0 651 else if (must_schedule == 0)
477d3c1c
MD
652 ++info->i_count;
653 return(must_schedule);
654}
655
656#if 0
657
6586: ; \
659 /* could not get the MP lock, forward the interrupt */ \
660 movl mp_lock, %eax ; /* check race */ \
661 cmpl $MP_FREE_LOCK,%eax ; \
662 je 2b ; \
663 incl PCPU(cnt)+V_FORWARDED_INTS ; \
664 subl $12,%esp ; \
665 movl $irq_num,8(%esp) ; \
666 movl $forward_fastint_remote,4(%esp) ; \
667 movl %eax,(%esp) ; \
668 call lwkt_send_ipiq_bycpu ; \
669 addl $12,%esp ; \
670 jmp 5f ;
671
672#endif
67b9bb39 673
37d44089 674
b68b7282 675/*
45d76888
MD
676 * Interrupt threads run this as their main loop.
677 *
678 * The handler begins execution outside a critical section and with the BGL
679 * held.
37d44089 680 *
477d3c1c 681 * The i_running state starts at 0. When an interrupt occurs, the hardware
37d44089
MD
682 * interrupt is disabled and sched_ithd() The HW interrupt remains disabled
683 * until all routines have run. We then call ithread_done() to reenable
45d76888
MD
684 * the HW interrupt and deschedule us until the next interrupt.
685 *
477d3c1c 686 * We are responsible for atomically checking i_running and ithread_done()
45d76888 687 * is responsible for atomically checking for platform-specific delayed
477d3c1c 688 * interrupts. i_running for our irq is only set in the context of our cpu,
45d76888 689 * so a critical section is a sufficient interlock.
b68b7282 690 */
93781523
MD
691#define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */
692
ef0fdad1
MD
693static void
694ithread_handler(void *arg)
695{
477d3c1c 696 struct intr_info *info;
f33e9c1c
MD
697 int use_limit;
698 int lticks;
699 int lcount;
477d3c1c 700 int intr;
9d522d14 701 int mpheld;
477d3c1c
MD
702 struct intrec **list;
703 intrec_t rec, nrec;
f33e9c1c 704 globaldata_t gd;
67b9bb39 705 struct systimer ill_timer; /* enforced freq. timer */
f33e9c1c 706 u_int ill_count; /* interrupt livelock counter */
45d76888 707
f33e9c1c
MD
708 ill_count = 0;
709 lticks = ticks;
710 lcount = 0;
477d3c1c
MD
711 intr = (int)arg;
712 info = &intr_info_ary[intr];
713 list = &info->i_reclist;
714 gd = mycpu;
715
45d76888 716 /*
862f2618
MD
717 * The loop must be entered with one critical section held. The thread
718 * is created with TDF_MPSAFE so the MP lock is not held on start.
45d76888
MD
719 */
720 crit_enter_gd(gd);
862f2618 721 mpheld = 0;
ef0fdad1 722
ef0fdad1 723 for (;;) {
862f2618
MD
724 /*
725 * The chain is only considered MPSAFE if all its interrupt handlers
726 * are MPSAFE. However, if intr_mpsafe has been turned off we
727 * always operate with the BGL.
728 */
0e6beaa3 729#ifdef SMP
862f2618
MD
730 if (intr_mpsafe == 0) {
731 if (mpheld == 0) {
732 get_mplock();
733 mpheld = 1;
734 }
735 } else if (info->i_mplock_required != mpheld) {
736 if (info->i_mplock_required) {
737 KKASSERT(mpheld == 0);
738 get_mplock();
739 mpheld = 1;
740 } else {
741 KKASSERT(mpheld != 0);
742 rel_mplock();
743 mpheld = 0;
744 }
745 }
0e6beaa3 746#endif
862f2618 747
93781523 748 /*
f33e9c1c
MD
749 * If an interrupt is pending, clear i_running and execute the
750 * handlers. Note that certain types of interrupts can re-trigger
751 * and set i_running again.
45d76888 752 *
f33e9c1c 753 * Each handler is run in a critical section. Note that we run both
862f2618 754 * FAST and SLOW designated service routines.
93781523 755 */
f33e9c1c
MD
756 if (info->i_running) {
757 ++ill_count;
758 info->i_running = 0;
9d522d14 759
f33e9c1c
MD
760 for (rec = *list; rec; rec = nrec) {
761 nrec = rec->next;
762 if (rec->serializer) {
763 lwkt_serialize_handler_call(rec->serializer, rec->handler,
764 rec->argument, NULL);
765 } else {
766 rec->handler(rec->argument, NULL);
767 }
477d3c1c 768 }
ef0fdad1 769 }
37d44089
MD
770
771 /*
772 * This is our interrupt hook to add rate randomness to the random
773 * number generator.
774 */
8b3ec75a 775 if (info->i_random.sc_enabled > 0)
96728c05 776 add_interrupt_randomness(intr);
37d44089
MD
777
778 /*
f33e9c1c
MD
779 * Unmask the interrupt to allow it to trigger again. This only
780 * applies to certain types of interrupts (typ level interrupts).
781 * This can result in the interrupt retriggering, but the retrigger
782 * will not be processed until we cycle our critical section.
363d922a
MD
783 *
784 * Only unmask interrupts while handlers are installed. It is
785 * possible to hit a situation where no handlers are installed
786 * due to a device driver livelocking and then tearing down its
787 * interrupt on close (the parallel bus being a good example).
37d44089 788 */
363d922a 789 if (*list)
37e7efec 790 machintr_intren(intr);
f33e9c1c
MD
791
792 /*
793 * Do a quick exit/enter to catch any higher-priority interrupt
794 * sources, such as the statclock, so thread time accounting
795 * will still work. This may also cause an interrupt to re-trigger.
796 */
797 crit_exit_gd(gd);
798 crit_enter_gd(gd);
799
800 /*
801 * LIVELOCK STATE MACHINE
802 */
803 switch(info->i_state) {
804 case ISTATE_NORMAL:
805 /*
806 * Calculate a running average every tick.
807 */
808 if (lticks != ticks) {
809 lticks = ticks;
810 ill_count -= ill_count / hz;
811 }
812
813 /*
814 * If we did not exceed the frequency limit, we are done.
815 * If the interrupt has not retriggered we deschedule ourselves.
816 */
817 if (ill_count <= livelock_limit) {
818 if (info->i_running == 0) {
819 lwkt_deschedule_self(gd->gd_curthread);
820 lwkt_switch();
821 }
37d44089 822 break;
f33e9c1c
MD
823 }
824
825 /*
826 * Otherwise we are livelocked. Set up a periodic systimer
827 * to wake the thread up at the limit frequency.
828 */
6ea70f76 829 kprintf("intr %d at %d > %d hz, livelocked limit engaged!\n",
59d9413f 830 intr, ill_count, livelock_limit);
f33e9c1c
MD
831 info->i_state = ISTATE_LIVELOCKED;
832 if ((use_limit = livelock_limit) < 100)
833 use_limit = 100;
834 else if (use_limit > 500000)
835 use_limit = 500000;
836 systimer_init_periodic(&ill_timer, ithread_livelock_wakeup,
837 (void *)intr, use_limit);
838 lcount = 0;
37d44089 839 /* fall through */
f33e9c1c 840 case ISTATE_LIVELOCKED:
37d44089 841 /*
f33e9c1c
MD
842 * Wait for our periodic timer to go off. Since the interrupt
843 * has re-armed it can still set i_running, but it will not
844 * reschedule us while we are in a livelocked state.
37d44089 845 */
f33e9c1c 846 lwkt_deschedule_self(gd->gd_curthread);
37d44089 847 lwkt_switch();
93781523 848
37d44089 849 /*
f33e9c1c
MD
850 * Check to see if the livelock condition no longer applies.
851 * The interrupt must be able to operate normally for one
852 * full second before we restore normal operation.
37d44089 853 */
f33e9c1c
MD
854 if (lticks != ticks) {
855 lticks = ticks;
856 if (ill_count < livelock_lowater) {
857 if (++lcount >= hz) {
858 info->i_state = ISTATE_NORMAL;
859 systimer_del(&ill_timer);
6ea70f76 860 kprintf("intr %d at %d < %d hz, livelock removed\n",
f33e9c1c
MD
861 intr, ill_count, livelock_lowater);
862 }
863 } else {
864 lcount = 0;
865 }
866 ill_count -= ill_count / hz;
37d44089
MD
867 }
868 break;
869 }
ef0fdad1 870 }
e43a034f 871 /* not reached */
ef0fdad1
MD
872}
873
a9d00ec1
MD
874/*
875 * Emergency interrupt polling thread. The thread begins execution
876 * outside a critical section with the BGL held.
877 *
878 * If emergency interrupt polling is enabled, this thread will
879 * execute all system interrupts not marked INTR_NOPOLL at the
880 * specified polling frequency.
881 *
882 * WARNING! This thread runs *ALL* interrupt service routines that
883 * are not marked INTR_NOPOLL, which basically means everything except
884 * the 8254 clock interrupt and the ATA interrupt. It has very high
885 * overhead and should only be used in situations where the machine
886 * cannot otherwise be made to work. Due to the severe performance
887 * degredation, it should not be enabled on production machines.
888 */
889static void
890ithread_emergency(void *arg __unused)
891{
892 struct intr_info *info;
893 intrec_t rec, nrec;
894 int intr;
895
896 for (;;) {
5f456c40 897 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
a9d00ec1
MD
898 info = &intr_info_ary[intr];
899 for (rec = info->i_reclist; rec; rec = nrec) {
900 if ((rec->intr_flags & INTR_NOPOLL) == 0) {
901 if (rec->serializer) {
902 lwkt_serialize_handler_call(rec->serializer,
903 rec->handler, rec->argument, NULL);
904 } else {
905 rec->handler(rec->argument, NULL);
906 }
907 }
908 nrec = rec->next;
909 }
910 }
911 lwkt_deschedule_self(curthread);
912 lwkt_switch();
913 }
914}
915
916/*
917 * Systimer callback - schedule the emergency interrupt poll thread
918 * if emergency polling is enabled.
919 */
920static
921void
922emergency_intr_timer_callback(systimer_t info, struct intrframe *frame __unused)
923{
924 if (emergency_intr_enable)
925 lwkt_schedule(info->data);
926}
927
984263bc
MD
928/*
929 * Sysctls used by systat and others: hw.intrnames and hw.intrcnt.
930 * The data for this machine dependent, and the declarations are in machine
931 * dependent code. The layout of intrnames and intrcnt however is machine
932 * independent.
933 *
934 * We do not know the length of intrcnt and intrnames at compile time, so
935 * calculate things at run time.
936 */
477d3c1c 937
984263bc
MD
938static int
939sysctl_intrnames(SYSCTL_HANDLER_ARGS)
940{
477d3c1c
MD
941 struct intr_info *info;
942 intrec_t rec;
943 int error = 0;
944 int len;
945 int intr;
946 char buf[64];
947
5f456c40 948 for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) {
477d3c1c
MD
949 info = &intr_info_ary[intr];
950
951 len = 0;
952 buf[0] = 0;
953 for (rec = info->i_reclist; rec; rec = rec->next) {
f8c7a42d 954 ksnprintf(buf + len, sizeof(buf) - len, "%s%s",
477d3c1c
MD
955 (len ? "/" : ""), rec->name);
956 len += strlen(buf + len);
957 }
958 if (len == 0) {
f8c7a42d 959 ksnprintf(buf, sizeof(buf), "irq%d", intr);
477d3c1c
MD
960 len = strlen(buf);
961 }
962 error = SYSCTL_OUT(req, buf, len + 1);
963 }
964 return (error);
984263bc
MD
965}
966
477d3c1c 967
984263bc
MD
968SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD,
969 NULL, 0, sysctl_intrnames, "", "Interrupt Names");
970
971static int
972sysctl_intrcnt(SYSCTL_HANDLER_ARGS)
973{
477d3c1c
MD
974 struct intr_info *info;
975 int error = 0;
976 int intr;
977
5f456c40 978 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
477d3c1c
MD
979 info = &intr_info_ary[intr];
980
981 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
982 if (error)
5f456c40
MD
983 goto failed;
984 }
985 for (intr = FIRST_SOFTINT; intr < max_installed_soft_intr; ++intr) {
986 info = &intr_info_ary[intr];
987
988 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
989 if (error)
990 goto failed;
477d3c1c 991 }
5f456c40 992failed:
477d3c1c 993 return(error);
984263bc
MD
994}
995
996SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD,
997 NULL, 0, sysctl_intrcnt, "", "Interrupt Counts");
477d3c1c 998