As bridge_rtupdate() can be called from interrupt context and must not
[dragonfly.git] / sys / dev / sound / pci / neomagic.h
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1/*
2 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
3 * All rights reserved.
4 *
5 * Derived from the public domain Linux driver
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THEPOSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: src/sys/dev/sound/pci/neomagic.h,v 1.1.2.2 2002/04/22 15:49:32 cg Exp $
1de703da 29 * $DragonFly: src/sys/dev/sound/pci/neomagic.h,v 1.2 2003/06/17 04:28:30 dillon Exp $
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30 */
31
32#ifndef _NM256_H_
33#define _NM256_H_
34
35/* The BIOS signature. */
36#define NM_SIGNATURE 0x4e4d0000
37/* Signature mask. */
38#define NM_SIG_MASK 0xffff0000
39
40/* Size of the second memory area. */
41#define NM_PORT2_SIZE 4096
42
43/* The base offset of the mixer in the second memory area. */
44#define NM_MIXER_OFFSET 0x600
45
46/* The base offset for the AC97 test */
47#define NM_MIXER_PRESENCE 0xa06
48#define NM_PRESENCE_MASK 0x050
49#define NM_PRESENCE_VALUE 0x040
50
51/* The maximum size of a coefficient entry. */
52#define NM_MAX_COEFFICIENT 0x5000
53
54/* The interrupt register. */
55#define NM_INT_REG 0xa04
56/* And its bits. */
57#define NM_PLAYBACK_INT 0x40
58#define NM_RECORD_INT 0x100
59#define NM_MISC_INT_1 0x4000
60#define NM_MISC_INT_2 0x1
61
62/* The AV's "mixer ready" status bit and location. */
63#define NM_MIXER_STATUS_OFFSET 0xa04
64#define NM_MIXER_READY_MASK 0x0800
65
66/*
67 * For the ZX. It uses the same interrupt register, but it holds 32
68 * bits instead of 16.
69 */
70#define NM2_PLAYBACK_INT 0x10000
71#define NM2_RECORD_INT 0x80000
72#define NM2_MISC_INT_1 0x8
73#define NM2_MISC_INT_2 0x2
74
75/* The ZX's "mixer ready" status bit and location. */
76#define NM2_MIXER_STATUS_OFFSET 0xa06
77#define NM2_MIXER_READY_MASK 0x0800
78
79/* The playback registers start from here. */
80#define NM_PLAYBACK_REG_OFFSET 0x0
81/* The record registers start from here. */
82#define NM_RECORD_REG_OFFSET 0x200
83
84/* The rate register is located 2 bytes from the start of the register area. */
85#define NM_RATE_REG_OFFSET 2
86
87/* Mono/stereo flag, number of bits on playback, and rate mask. */
88#define NM_RATE_STEREO 1
89#define NM_RATE_BITS_16 2
90#define NM_RATE_MASK 0xf0
91
92/* Playback enable register. */
93#define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
94#define NM_PLAYBACK_ENABLE_FLAG 1
95#define NM_PLAYBACK_ONESHOT 2
96#define NM_PLAYBACK_FREERUN 4
97
98/* Mutes the audio output. */
99#define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
100#define NM_AUDIO_MUTE_LEFT 0x8000
101#define NM_AUDIO_MUTE_RIGHT 0x0080
102#define NM_AUDIO_MUTE_BOTH 0x8080
103
104/* Recording enable register. */
105#define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
106#define NM_RECORD_ENABLE_FLAG 1
107#define NM_RECORD_FREERUN 2
108
109#define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
110#define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
111#define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
112#define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
113
114#define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
115#define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
116#define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
117#define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
118
119
120#endif