Rename printf -> kprintf in sys/ and add some defines where necessary
[dragonfly.git] / sys / dev / netif / an / if_an.c
CommitLineData
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1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: src/sys/dev/an/if_an.c,v 1.2.2.13 2003/02/11 03:32:48 ambrisko Exp $
e3869ec7 33 * $DragonFly: src/sys/dev/netif/an/if_an.c,v 1.41 2006/12/22 23:26:18 swildner Exp $
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34 */
35
36/*
37 * Aironet 4500/4800 802.11 PCMCIA/ISA/PCI driver for FreeBSD.
38 *
39 * Written by Bill Paul <wpaul@ctr.columbia.edu>
40 * Electrical Engineering Department
41 * Columbia University, New York City
42 */
43
44/*
45 * The Aironet 4500/4800 series cards come in PCMCIA, ISA and PCI form.
46 * This driver supports all three device types (PCI devices are supported
47 * through an extra PCI shim: /sys/dev/an/if_an_pci.c). ISA devices can be
48 * supported either using hard-coded IO port/IRQ settings or via Plug
49 * and Play. The 4500 series devices support 1Mbps and 2Mbps data rates.
50 * The 4800 devices support 1, 2, 5.5 and 11Mbps rates.
51 *
52 * Like the WaveLAN/IEEE cards, the Aironet NICs are all essentially
53 * PCMCIA devices. The ISA and PCI cards are a combination of a PCMCIA
54 * device and a PCMCIA to ISA or PCMCIA to PCI adapter card. There are
55 * a couple of important differences though:
56 *
57 * - Lucent ISA card looks to the host like a PCMCIA controller with
58 * a PCMCIA WaveLAN card inserted. This means that even desktop
59 * machines need to be configured with PCMCIA support in order to
60 * use WaveLAN/IEEE ISA cards. The Aironet cards on the other hand
61 * actually look like normal ISA and PCI devices to the host, so
62 * no PCMCIA controller support is needed
63 *
64 * The latter point results in a small gotcha. The Aironet PCMCIA
65 * cards can be configured for one of two operating modes depending
66 * on how the Vpp1 and Vpp2 programming voltages are set when the
67 * card is activated. In order to put the card in proper PCMCIA
68 * operation (where the CIS table is visible and the interface is
69 * programmed for PCMCIA operation), both Vpp1 and Vpp2 have to be
70 * set to 5 volts. FreeBSD by default doesn't set the Vpp voltages,
71 * which leaves the card in ISA/PCI mode, which prevents it from
72 * being activated as an PCMCIA device.
73 *
74 * Note that some PCMCIA controller software packages for Windows NT
75 * fail to set the voltages as well.
76 *
77 * The Aironet devices can operate in both station mode and access point
78 * mode. Typically, when programmed for station mode, the card can be set
79 * to automatically perform encapsulation/decapsulation of Ethernet II
80 * and 802.3 frames within 802.11 frames so that the host doesn't have
81 * to do it itself. This driver doesn't program the card that way: the
82 * driver handles all of the encapsulation/decapsulation itself.
83 */
84
85#include "opt_inet.h"
86
87#ifdef INET
88#define ANCACHE /* enable signal strength cache */
89#endif
90
91#include <sys/param.h>
92#include <sys/systm.h>
93#include <sys/sockio.h>
94#include <sys/mbuf.h>
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95#include <sys/kernel.h>
96#include <sys/proc.h>
97#include <sys/ucred.h>
98#include <sys/socket.h>
99#ifdef ANCACHE
100#include <sys/syslog.h>
101#endif
102#include <sys/sysctl.h>
41d6c56f 103#include <sys/thread2.h>
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104
105#include <sys/module.h>
106#include <sys/sysctl.h>
107#include <sys/bus.h>
984263bc 108#include <sys/rman.h>
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109#include <sys/malloc.h>
110
111#include <net/if.h>
38de8487 112#include <net/ifq_var.h>
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113#include <net/if_arp.h>
114#include <net/ethernet.h>
115#include <net/if_dl.h>
116#include <net/if_types.h>
984263bc 117#include <net/if_media.h>
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118#include <netproto/802_11/ieee80211.h>
119#include <netproto/802_11/ieee80211_ioctl.h>
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120
121#ifdef INET
122#include <netinet/in.h>
123#include <netinet/in_systm.h>
124#include <netinet/in_var.h>
125#include <netinet/ip.h>
126#endif
127
128#include <net/bpf.h>
129
130#include <machine/md_var.h>
131
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132#include "if_aironet_ieee.h"
133#include "if_anreg.h"
984263bc 134
984263bc 135/* These are global because we need them in sys/pci/if_an_p.c. */
b5101a88 136static void an_reset (struct an_softc *);
1c70eebf 137static int an_init_mpi350_desc (struct an_softc *);
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138static int an_ioctl (struct ifnet *, u_long, caddr_t,
139 struct ucred *);
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140static void an_init (void *);
141static int an_init_tx_ring (struct an_softc *);
142static void an_start (struct ifnet *);
143static void an_watchdog (struct ifnet *);
144static void an_rxeof (struct an_softc *);
145static void an_txeof (struct an_softc *, int);
146
147static void an_promisc (struct an_softc *, int);
148static int an_cmd (struct an_softc *, int, int);
149static int an_cmd_struct (struct an_softc *, struct an_command *,
150 struct an_reply *);
151static int an_read_record (struct an_softc *, struct an_ltv_gen *);
152static int an_write_record (struct an_softc *, struct an_ltv_gen *);
153static int an_read_data (struct an_softc *, int,
154 int, caddr_t, int);
155static int an_write_data (struct an_softc *, int,
156 int, caddr_t, int);
157static int an_seek (struct an_softc *, int, int, int);
158static int an_alloc_nicmem (struct an_softc *, int, int *);
159static int an_dma_malloc (struct an_softc *, bus_size_t,
160 struct an_dma_alloc *, int);
161static void an_dma_free (struct an_softc *,
162 struct an_dma_alloc *);
163static void an_dma_malloc_cb (void *, bus_dma_segment_t *, int, int);
164static void an_stats_update (void *);
165static void an_setdef (struct an_softc *, struct an_req *);
984263bc 166#ifdef ANCACHE
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167static void an_cache_store (struct an_softc *, struct mbuf *,
168 uint8_t, uint8_t);
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169#endif
170
171/* function definitions for use with the Cisco's Linux configuration
172 utilities
173*/
174
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175static int readrids (struct ifnet*, struct aironet_ioctl*);
176static int writerids (struct ifnet*, struct aironet_ioctl*);
177static int flashcard (struct ifnet*, struct aironet_ioctl*);
984263bc 178
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179static int cmdreset (struct ifnet *);
180static int setflashmode (struct ifnet *);
181static int flashgchar (struct ifnet *,int,int);
182static int flashpchar (struct ifnet *,int,int);
183static int flashputbuf (struct ifnet *);
184static int flashrestart (struct ifnet *);
185static int WaitBusy (struct ifnet *, int);
186static int unstickbusy (struct ifnet *);
984263bc 187
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188static void an_dump_record (struct an_softc *,struct an_ltv_gen *,
189 char *);
984263bc 190
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191static int an_media_change (struct ifnet *);
192static void an_media_status (struct ifnet *, struct ifmediareq *);
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193
194static int an_dump = 0;
195static int an_cache_mode = 0;
196
197#define DBM 0
198#define PERCENT 1
199#define RAW 2
200
201static char an_conf[256];
202static char an_conf_cache[256];
203
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204DECLARE_DUMMY_MODULE(if_an);
205
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206/* sysctl vars */
207
208SYSCTL_NODE(_hw, OID_AUTO, an, CTLFLAG_RD, 0, "Wireless driver parameters");
209
210static int
211sysctl_an_dump(SYSCTL_HANDLER_ARGS)
212{
213 int error, r, last;
214 char *s = an_conf;
215
216 last = an_dump;
217
218 switch (an_dump) {
219 case 0:
220 strcpy(an_conf, "off");
221 break;
222 case 1:
223 strcpy(an_conf, "type");
224 break;
225 case 2:
226 strcpy(an_conf, "dump");
227 break;
228 default:
f8c7a42d 229 ksnprintf(an_conf, 5, "%x", an_dump);
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230 break;
231 }
232
233 error = sysctl_handle_string(oidp, an_conf, sizeof(an_conf), req);
234
235 if (strncmp(an_conf,"off", 3) == 0) {
236 an_dump = 0;
237 }
238 if (strncmp(an_conf,"dump", 4) == 0) {
239 an_dump = 1;
240 }
241 if (strncmp(an_conf,"type", 4) == 0) {
242 an_dump = 2;
243 }
244 if (*s == 'f') {
245 r = 0;
246 for (;;s++) {
247 if ((*s >= '0') && (*s <= '9')) {
248 r = r * 16 + (*s - '0');
249 } else if ((*s >= 'a') && (*s <= 'f')) {
250 r = r * 16 + (*s - 'a' + 10);
251 } else {
252 break;
253 }
254 }
255 an_dump = r;
256 }
257 if (an_dump != last)
e3869ec7 258 kprintf("Sysctl changed for Aironet driver\n");
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259
260 return error;
261}
262
263SYSCTL_PROC(_hw_an, OID_AUTO, an_dump, CTLTYPE_STRING | CTLFLAG_RW,
264 0, sizeof(an_conf), sysctl_an_dump, "A", "");
265
266static int
267sysctl_an_cache_mode(SYSCTL_HANDLER_ARGS)
268{
269 int error, last;
270
271 last = an_cache_mode;
272
273 switch (an_cache_mode) {
274 case 1:
275 strcpy(an_conf_cache, "per");
276 break;
277 case 2:
278 strcpy(an_conf_cache, "raw");
279 break;
280 default:
281 strcpy(an_conf_cache, "dbm");
282 break;
283 }
284
285 error = sysctl_handle_string(oidp, an_conf_cache,
286 sizeof(an_conf_cache), req);
287
288 if (strncmp(an_conf_cache,"dbm", 3) == 0) {
289 an_cache_mode = 0;
290 }
291 if (strncmp(an_conf_cache,"per", 3) == 0) {
292 an_cache_mode = 1;
293 }
294 if (strncmp(an_conf_cache,"raw", 3) == 0) {
295 an_cache_mode = 2;
296 }
297
298 return error;
299}
300
301SYSCTL_PROC(_hw_an, OID_AUTO, an_cache_mode, CTLTYPE_STRING | CTLFLAG_RW,
302 0, sizeof(an_conf_cache), sysctl_an_cache_mode, "A", "");
303
304/*
305 * We probe for an Aironet 4500/4800 card by attempting to
306 * read the default SSID list. On reset, the first entry in
307 * the SSID list will contain the name "tsunami." If we don't
308 * find this, then there's no card present.
309 */
310int
c436375a 311an_probe(device_t dev)
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312{
313 struct an_softc *sc = device_get_softc(dev);
537b8fd3 314 struct an_ltv_ssidlist_new ssid;
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315 int error;
316
317 bzero((char *)&ssid, sizeof(ssid));
318
319 error = an_alloc_port(dev, 0, AN_IOSIZ);
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320 if (error)
321 return (error);
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322
323 /* can't do autoprobing */
324 if (rman_get_start(sc->port_res) == -1)
902f6373 325 return(ENXIO);
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326
327 /*
328 * We need to fake up a softc structure long enough
329 * to be able to issue commands and call some of the
330 * other routines.
331 */
332 sc->an_bhandle = rman_get_bushandle(sc->port_res);
333 sc->an_btag = rman_get_bustag(sc->port_res);
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334
335 ssid.an_len = sizeof(ssid);
336 ssid.an_type = AN_RID_SSIDLIST;
337
338 /* Make sure interrupts are disabled. */
537b8fd3 339 sc->mpi350 = 0;
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340 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
341 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), 0xFFFF);
342
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343 if_initname(&sc->arpcom.ac_if, device_get_name(dev),
344 device_get_unit(dev));
984263bc 345 an_reset(sc);
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346
347 if (an_cmd(sc, AN_CMD_READCFG, 0))
902f6373 348 return(ENXIO);
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349
350 if (an_read_record(sc, (struct an_ltv_gen *)&ssid))
902f6373 351 return(ENXIO);
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352
353 /* See if the ssid matches what we expect ... but doesn't have to */
537b8fd3 354 if (strcmp(ssid.an_entry[0].an_ssid, AN_DEF_SSID))
902f6373 355 return(ENXIO);
984263bc 356
902f6373 357 return(0);
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358}
359
360/*
361 * Allocate a port resource with the given resource id.
362 */
363int
c436375a 364an_alloc_port(device_t dev, int rid, int size)
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365{
366 struct an_softc *sc = device_get_softc(dev);
367 struct resource *res;
368
369 res = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
370 0ul, ~0ul, size, RF_ACTIVE);
371 if (res) {
372 sc->port_rid = rid;
373 sc->port_res = res;
374 return (0);
375 } else {
376 return (ENOENT);
377 }
378}
379
380/*
381 * Allocate a memory resource with the given resource id.
382 */
c436375a
SW
383int
384an_alloc_memory(device_t dev, int rid, int size)
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385{
386 struct an_softc *sc = device_get_softc(dev);
387 struct resource *res;
388
389 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
390 0ul, ~0ul, size, RF_ACTIVE);
391 if (res) {
392 sc->mem_rid = rid;
393 sc->mem_res = res;
394 sc->mem_used = size;
395 return (0);
396 } else {
397 return (ENOENT);
398 }
399}
400
401/*
402 * Allocate a auxilary memory resource with the given resource id.
403 */
7b9f668c
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404int
405an_alloc_aux_memory(device_t dev, int rid, int size)
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406{
407 struct an_softc *sc = device_get_softc(dev);
408 struct resource *res;
409
410 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
411 0ul, ~0ul, size, RF_ACTIVE);
412 if (res) {
413 sc->mem_aux_rid = rid;
414 sc->mem_aux_res = res;
415 sc->mem_aux_used = size;
416 return (0);
417 } else {
418 return (ENOENT);
419 }
420}
421
422/*
423 * Allocate an irq resource with the given resource id.
424 */
425int
c436375a 426an_alloc_irq(device_t dev, int rid, int flags)
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427{
428 struct an_softc *sc = device_get_softc(dev);
429 struct resource *res;
430
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431 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
432 (RF_ACTIVE | flags));
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433 if (res) {
434 sc->irq_rid = rid;
435 sc->irq_res = res;
436 return (0);
437 } else {
438 return (ENOENT);
439 }
440}
441
442static void
c436375a 443an_dma_malloc_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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444{
445 bus_addr_t *paddr = (bus_addr_t*) arg;
446 *paddr = segs->ds_addr;
447}
448
449/*
450 * Alloc DMA memory and set the pointer to it
451 */
452static int
c436375a
SW
453an_dma_malloc(struct an_softc *sc, bus_size_t size, struct an_dma_alloc *dma,
454 int mapflags)
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455{
456 int r;
457
c45c9d6a 458 r = bus_dmamap_create(sc->an_dtag, 0, &dma->an_dma_map);
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459 if (r != 0)
460 goto fail_0;
461
462 r = bus_dmamem_alloc(sc->an_dtag, (void**) &dma->an_dma_vaddr,
c45c9d6a 463 BUS_DMA_WAITOK, &dma->an_dma_map);
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464 if (r != 0)
465 goto fail_1;
466
467 r = bus_dmamap_load(sc->an_dtag, dma->an_dma_map, dma->an_dma_vaddr,
468 size,
469 an_dma_malloc_cb,
470 &dma->an_dma_paddr,
c45c9d6a 471 mapflags);
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472 if (r != 0)
473 goto fail_2;
474
475 dma->an_dma_size = size;
476 return (0);
477
478fail_2:
479 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
480fail_1:
481 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
482fail_0:
483 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
484 dma->an_dma_map = NULL;
485 return (r);
486}
487
488static void
c436375a 489an_dma_free(struct an_softc *sc, struct an_dma_alloc *dma)
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490{
491 bus_dmamap_unload(sc->an_dtag, dma->an_dma_map);
492 bus_dmamem_free(sc->an_dtag, dma->an_dma_vaddr, dma->an_dma_map);
b92f9c1c 493 dma->an_dma_vaddr = NULL;
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494 bus_dmamap_destroy(sc->an_dtag, dma->an_dma_map);
495}
496
497/*
498 * Release all resources
499 */
500void
c436375a 501an_release_resources(device_t dev)
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502{
503 struct an_softc *sc = device_get_softc(dev);
504 int i;
505
506 if (sc->port_res) {
507 bus_release_resource(dev, SYS_RES_IOPORT,
508 sc->port_rid, sc->port_res);
509 sc->port_res = 0;
510 }
511 if (sc->mem_res) {
512 bus_release_resource(dev, SYS_RES_MEMORY,
513 sc->mem_rid, sc->mem_res);
514 sc->mem_res = 0;
515 }
516 if (sc->mem_aux_res) {
517 bus_release_resource(dev, SYS_RES_MEMORY,
518 sc->mem_aux_rid, sc->mem_aux_res);
519 sc->mem_aux_res = 0;
520 }
521 if (sc->irq_res) {
522 bus_release_resource(dev, SYS_RES_IRQ,
523 sc->irq_rid, sc->irq_res);
524 sc->irq_res = 0;
525 }
526 if (sc->an_rid_buffer.an_dma_paddr) {
527 an_dma_free(sc, &sc->an_rid_buffer);
528 }
529 for (i = 0; i < AN_MAX_RX_DESC; i++)
530 if (sc->an_rx_buffer[i].an_dma_paddr) {
531 an_dma_free(sc, &sc->an_rx_buffer[i]);
532 }
533 for (i = 0; i < AN_MAX_TX_DESC; i++)
534 if (sc->an_tx_buffer[i].an_dma_paddr) {
535 an_dma_free(sc, &sc->an_tx_buffer[i]);
536 }
537 if (sc->an_dtag) {
538 bus_dma_tag_destroy(sc->an_dtag);
539 }
540
541}
542
543int
c436375a 544an_init_mpi350_desc(struct an_softc *sc)
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545{
546 struct an_command cmd_struct;
547 struct an_reply reply;
548 struct an_card_rid_desc an_rid_desc;
549 struct an_card_rx_desc an_rx_desc;
550 struct an_card_tx_desc an_tx_desc;
551 int i, desc;
552
553 if(!sc->an_rid_buffer.an_dma_paddr)
554 an_dma_malloc(sc, AN_RID_BUFFER_SIZE,
555 &sc->an_rid_buffer, 0);
556 for (i = 0; i < AN_MAX_RX_DESC; i++)
557 if(!sc->an_rx_buffer[i].an_dma_paddr)
558 an_dma_malloc(sc, AN_RX_BUFFER_SIZE,
559 &sc->an_rx_buffer[i], 0);
560 for (i = 0; i < AN_MAX_TX_DESC; i++)
561 if(!sc->an_tx_buffer[i].an_dma_paddr)
562 an_dma_malloc(sc, AN_TX_BUFFER_SIZE,
563 &sc->an_tx_buffer[i], 0);
564
565 /*
566 * Allocate RX descriptor
567 */
568 bzero(&reply,sizeof(reply));
569 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
570 cmd_struct.an_parm0 = AN_DESCRIPTOR_RX;
571 cmd_struct.an_parm1 = AN_RX_DESC_OFFSET;
572 cmd_struct.an_parm2 = AN_MAX_RX_DESC;
573 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
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574 if_printf(&sc->arpcom.ac_if,
575 "failed to allocate RX descriptor\n");
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576 return(EIO);
577 }
578
579 for (desc = 0; desc < AN_MAX_RX_DESC; desc++) {
580 bzero(&an_rx_desc, sizeof(an_rx_desc));
581 an_rx_desc.an_valid = 1;
582 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
583 an_rx_desc.an_done = 0;
584 an_rx_desc.an_phys = sc->an_rx_buffer[desc].an_dma_paddr;
585
586 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
587 CSR_MEM_AUX_WRITE_4(sc, AN_RX_DESC_OFFSET
588 + (desc * sizeof(an_rx_desc))
589 + (i * 4),
590 ((u_int32_t*)&an_rx_desc)[i]);
591 }
592
593 /*
594 * Allocate TX descriptor
595 */
596
597 bzero(&reply,sizeof(reply));
598 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
599 cmd_struct.an_parm0 = AN_DESCRIPTOR_TX;
600 cmd_struct.an_parm1 = AN_TX_DESC_OFFSET;
601 cmd_struct.an_parm2 = AN_MAX_TX_DESC;
602 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
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603 if_printf(&sc->arpcom.ac_if,
604 "failed to allocate TX descriptor\n");
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605 return(EIO);
606 }
607
608 for (desc = 0; desc < AN_MAX_TX_DESC; desc++) {
609 bzero(&an_tx_desc, sizeof(an_tx_desc));
610 an_tx_desc.an_offset = 0;
611 an_tx_desc.an_eoc = 0;
612 an_tx_desc.an_valid = 0;
613 an_tx_desc.an_len = 0;
614 an_tx_desc.an_phys = sc->an_tx_buffer[desc].an_dma_paddr;
615
616 for (i = 0; i < sizeof(an_tx_desc) / 4; i++)
617 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
618 + (desc * sizeof(an_tx_desc))
619 + (i * 4),
620 ((u_int32_t*)&an_tx_desc)[i]);
621 }
622
623 /*
624 * Allocate RID descriptor
625 */
626
627 bzero(&reply,sizeof(reply));
628 cmd_struct.an_cmd = AN_CMD_ALLOC_DESC;
629 cmd_struct.an_parm0 = AN_DESCRIPTOR_HOSTRW;
630 cmd_struct.an_parm1 = AN_HOST_DESC_OFFSET;
631 cmd_struct.an_parm2 = 1;
632 if (an_cmd_struct(sc, &cmd_struct, &reply)) {
1c70eebf
JS
633 if_printf(&sc->arpcom.ac_if,
634 "failed to allocate host descriptor\n");
984263bc
MD
635 return(EIO);
636 }
637
638 bzero(&an_rid_desc, sizeof(an_rid_desc));
639 an_rid_desc.an_valid = 1;
640 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
641 an_rid_desc.an_rid = 0;
642 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
643
644 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
645 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
646 ((u_int32_t*)&an_rid_desc)[i]);
647
648 return(0);
649}
650
651int
c436375a 652an_attach(struct an_softc *sc, device_t dev, int flags)
984263bc
MD
653{
654 struct ifnet *ifp = &sc->arpcom.ac_if;
655 int error;
656
89c0f216 657 callout_init(&sc->an_stat_timer);
984263bc
MD
658 sc->an_associated = 0;
659 sc->an_monitor = 0;
660 sc->an_was_monitor = 0;
661 sc->an_flash_buffer = NULL;
662
1c70eebf
JS
663 ifp->if_softc = sc;
664 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
665
984263bc
MD
666 /* Reset the NIC. */
667 an_reset(sc);
668 if (sc->mpi350) {
669 error = an_init_mpi350_desc(sc);
670 if (error)
671 return(error);
672 }
673
674 /* Load factory config */
675 if (an_cmd(sc, AN_CMD_READCFG, 0)) {
1c70eebf 676 device_printf(dev, "failed to load config data\n");
984263bc
MD
677 return(EIO);
678 }
679
680 /* Read the current configuration */
681 sc->an_config.an_type = AN_RID_GENCONFIG;
682 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
683 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 684 device_printf(dev, "read record failed\n");
984263bc
MD
685 return(EIO);
686 }
687
688 /* Read the card capabilities */
689 sc->an_caps.an_type = AN_RID_CAPABILITIES;
690 sc->an_caps.an_len = sizeof(struct an_ltv_caps);
691 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_caps)) {
1c70eebf 692 device_printf(dev, "read record failed\n");
984263bc
MD
693 return(EIO);
694 }
695
696 /* Read ssid list */
697 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 698 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 699 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 700 device_printf(dev, "read record failed\n");
984263bc
MD
701 return(EIO);
702 }
703
704 /* Read AP list */
705 sc->an_aplist.an_type = AN_RID_APLIST;
706 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
707 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 708 device_printf(dev, "read record failed\n");
984263bc
MD
709 return(EIO);
710 }
711
712#ifdef ANCACHE
713 /* Read the RSSI <-> dBm map */
714 sc->an_have_rssimap = 0;
715 if (sc->an_caps.an_softcaps & 8) {
716 sc->an_rssimap.an_type = AN_RID_RSSI_MAP;
717 sc->an_rssimap.an_len = sizeof(struct an_ltv_rssi_map);
718 if (an_read_record(sc, (struct an_ltv_gen *)&sc->an_rssimap)) {
1c70eebf 719 device_printf(dev, "unable to get RSSI <-> dBM map\n");
984263bc 720 } else {
1c70eebf 721 device_printf(dev, "got RSSI <-> dBM map\n");
984263bc
MD
722 sc->an_have_rssimap = 1;
723 }
724 } else {
1c70eebf 725 device_printf(dev, "no RSSI <-> dBM map\n");
984263bc
MD
726 }
727#endif
728
984263bc
MD
729 ifp->if_mtu = ETHERMTU;
730 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
731 ifp->if_ioctl = an_ioctl;
984263bc
MD
732 ifp->if_start = an_start;
733 ifp->if_watchdog = an_watchdog;
734 ifp->if_init = an_init;
735 ifp->if_baudrate = 10000000;
38de8487
JS
736 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
737 ifq_set_ready(&ifp->if_snd);
984263bc
MD
738
739 bzero(sc->an_config.an_nodename, sizeof(sc->an_config.an_nodename));
740 bcopy(AN_DEFAULT_NODENAME, sc->an_config.an_nodename,
741 sizeof(AN_DEFAULT_NODENAME) - 1);
742
537b8fd3
JS
743 bzero(sc->an_ssidlist.an_entry[0].an_ssid,
744 sizeof(sc->an_ssidlist.an_entry[0].an_ssid));
745 bcopy(AN_DEFAULT_NETNAME, sc->an_ssidlist.an_entry[0].an_ssid,
746 sizeof(AN_DEFAULT_NETNAME) - 1);
747 sc->an_ssidlist.an_entry[0].an_len = strlen(AN_DEFAULT_NETNAME);
984263bc
MD
748
749 sc->an_config.an_opmode =
750 AN_OPMODE_INFRASTRUCTURE_STATION;
751
752 sc->an_tx_rate = 0;
753 bzero((char *)&sc->an_stats, sizeof(sc->an_stats));
754
755 ifmedia_init(&sc->an_ifmedia, 0, an_media_change, an_media_status);
756#define ADD(m, c) ifmedia_add(&sc->an_ifmedia, (m), (c), NULL)
757 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1,
758 IFM_IEEE80211_ADHOC, 0), 0);
759 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS1, 0, 0), 0);
760 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2,
761 IFM_IEEE80211_ADHOC, 0), 0);
762 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS2, 0, 0), 0);
763 if (sc->an_caps.an_rates[2] == AN_RATE_5_5MBPS) {
764 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5,
765 IFM_IEEE80211_ADHOC, 0), 0);
766 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS5, 0, 0), 0);
767 }
768 if (sc->an_caps.an_rates[3] == AN_RATE_11MBPS) {
769 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11,
770 IFM_IEEE80211_ADHOC, 0), 0);
771 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_IEEE80211_DS11, 0, 0), 0);
772 }
773 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
774 IFM_IEEE80211_ADHOC, 0), 0);
775 ADD(IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO, 0, 0), 0);
776#undef ADD
777 ifmedia_set(&sc->an_ifmedia, IFM_MAKEWORD(IFM_IEEE80211, IFM_AUTO,
778 0, 0));
779
780 /*
781 * Call MI attach routine.
782 */
78195a76 783 ether_ifattach(ifp, sc->an_caps.an_oemaddr, NULL);
984263bc
MD
784
785 return(0);
786}
787
fcb0f42c
JS
788int
789an_detach(device_t dev)
790{
791 struct an_softc *sc = device_get_softc(dev);
792 struct ifnet *ifp = &sc->arpcom.ac_if;
793
78195a76 794 lwkt_serialize_enter(ifp->if_serializer);
fcb0f42c 795 an_stop(sc);
cdf89432
SZ
796 bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
797 lwkt_serialize_exit(ifp->if_serializer);
798
fcb0f42c
JS
799 ifmedia_removeall(&sc->an_ifmedia);
800 ether_ifdetach(ifp);
fcb0f42c
JS
801 an_release_resources(dev);
802 return 0;
803}
804
984263bc 805static void
c436375a 806an_rxeof(struct an_softc *sc)
984263bc
MD
807{
808 struct ifnet *ifp;
809 struct ether_header *eh;
810 struct ieee80211_frame *ih;
811 struct an_rxframe rx_frame;
812 struct an_rxframe_802_3 rx_frame_802_3;
813 struct mbuf *m;
814 int len, id, error = 0, i, count = 0;
815 int ieee80211_header_len;
816 u_char *bpf_buf;
817 u_short fc1;
818 struct an_card_rx_desc an_rx_desc;
819 u_int8_t *buf;
820
821 ifp = &sc->arpcom.ac_if;
822
823 if (!sc->mpi350) {
824 id = CSR_READ_2(sc, AN_RX_FID);
825
826 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
827 /* read raw 802.11 packet */
828 bpf_buf = sc->buf_802_11;
829
830 /* read header */
831 if (an_read_data(sc, id, 0x0, (caddr_t)&rx_frame,
832 sizeof(rx_frame))) {
833 ifp->if_ierrors++;
834 return;
835 }
836
837 /*
838 * skip beacon by default since this increases the
839 * system load a lot
840 */
841
842 if (!(sc->an_monitor & AN_MONITOR_INCLUDE_BEACON) &&
843 (rx_frame.an_frame_ctl &
844 IEEE80211_FC0_SUBTYPE_BEACON)) {
845 return;
846 }
847
848 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
849 len = rx_frame.an_rx_payload_len
850 + sizeof(rx_frame);
851 /* Check for insane frame length */
852 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
853 if_printf(ifp,
854 "oversized packet received "
855 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
856 ifp->if_ierrors++;
857 return;
858 }
859
860 bcopy((char *)&rx_frame,
861 bpf_buf, sizeof(rx_frame));
862
863 error = an_read_data(sc, id, sizeof(rx_frame),
864 (caddr_t)bpf_buf+sizeof(rx_frame),
865 rx_frame.an_rx_payload_len);
866 } else {
867 fc1=rx_frame.an_frame_ctl >> 8;
868 ieee80211_header_len =
869 sizeof(struct ieee80211_frame);
870 if ((fc1 & IEEE80211_FC1_DIR_TODS) &&
871 (fc1 & IEEE80211_FC1_DIR_FROMDS)) {
872 ieee80211_header_len += ETHER_ADDR_LEN;
873 }
874
875 len = rx_frame.an_rx_payload_len
876 + ieee80211_header_len;
877 /* Check for insane frame length */
878 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
879 if_printf(ifp,
880 "oversized packet received "
881 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
882 ifp->if_ierrors++;
883 return;
884 }
885
886 ih = (struct ieee80211_frame *)bpf_buf;
887
888 bcopy((char *)&rx_frame.an_frame_ctl,
889 (char *)ih, ieee80211_header_len);
890
891 error = an_read_data(sc, id, sizeof(rx_frame) +
892 rx_frame.an_gaplen,
893 (caddr_t)ih +ieee80211_header_len,
894 rx_frame.an_rx_payload_len);
895 }
7600679e 896 BPF_TAP(ifp, bpf_buf, len);
984263bc 897 } else {
17b71a59 898 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
899 if (m == NULL) {
900 ifp->if_ierrors++;
901 return;
902 }
984263bc
MD
903 m->m_pkthdr.rcvif = ifp;
904 /* Read Ethernet encapsulated packet */
905
906#ifdef ANCACHE
907 /* Read NIC frame header */
908 if (an_read_data(sc, id, 0, (caddr_t)&rx_frame,
909 sizeof(rx_frame))) {
910 ifp->if_ierrors++;
911 return;
912 }
913#endif
914 /* Read in the 802_3 frame header */
915 if (an_read_data(sc, id, 0x34,
916 (caddr_t)&rx_frame_802_3,
917 sizeof(rx_frame_802_3))) {
918 ifp->if_ierrors++;
919 return;
920 }
921 if (rx_frame_802_3.an_rx_802_3_status != 0) {
922 ifp->if_ierrors++;
923 return;
924 }
925 /* Check for insane frame length */
926 len = rx_frame_802_3.an_rx_802_3_payload_len;
927 if (len > sizeof(sc->buf_802_11)) {
1c70eebf
JS
928 if_printf(ifp,
929 "oversized packet received (%d, %d)\n",
930 len, MCLBYTES);
984263bc
MD
931 ifp->if_ierrors++;
932 return;
933 }
934 m->m_pkthdr.len = m->m_len =
935 rx_frame_802_3.an_rx_802_3_payload_len + 12;
936
937 eh = mtod(m, struct ether_header *);
938
939 bcopy((char *)&rx_frame_802_3.an_rx_dst_addr,
940 (char *)&eh->ether_dhost, ETHER_ADDR_LEN);
941 bcopy((char *)&rx_frame_802_3.an_rx_src_addr,
942 (char *)&eh->ether_shost, ETHER_ADDR_LEN);
943
944 /* in mbuf header type is just before payload */
945 error = an_read_data(sc, id, 0x44,
946 (caddr_t)&(eh->ether_type),
947 rx_frame_802_3.an_rx_802_3_payload_len);
948
949 if (error) {
950 m_freem(m);
951 ifp->if_ierrors++;
952 return;
953 }
954 ifp->if_ipackets++;
955
984263bc 956#ifdef ANCACHE
3013ac0e 957 an_cache_store(sc, m,
984263bc
MD
958 rx_frame.an_rx_signal_strength,
959 rx_frame.an_rsvd0);
960#endif
78195a76 961 ifp->if_input(ifp, m);
984263bc
MD
962 }
963
964 } else { /* MPI-350 */
965 for (count = 0; count < AN_MAX_RX_DESC; count++){
966 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
967 ((u_int32_t*)&an_rx_desc)[i]
968 = CSR_MEM_AUX_READ_4(sc,
969 AN_RX_DESC_OFFSET
970 + (count * sizeof(an_rx_desc))
971 + (i * 4));
972
973 if (an_rx_desc.an_done && !an_rx_desc.an_valid) {
974 buf = sc->an_rx_buffer[count].an_dma_vaddr;
975
17b71a59 976 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
984263bc
MD
977 if (m == NULL) {
978 ifp->if_ierrors++;
979 return;
980 }
984263bc
MD
981 m->m_pkthdr.rcvif = ifp;
982 /* Read Ethernet encapsulated packet */
983
984 /*
985 * No ANCACHE support since we just get back
986 * an Ethernet packet no 802.11 info
987 */
988#if 0
989#ifdef ANCACHE
990 /* Read NIC frame header */
991 bcopy(buf, (caddr_t)&rx_frame,
992 sizeof(rx_frame));
993#endif
994#endif
995 /* Check for insane frame length */
996 len = an_rx_desc.an_len + 12;
997 if (len > MCLBYTES) {
1c70eebf
JS
998 if_printf(ifp,
999 "oversized packet received "
1000 "(%d, %d)\n", len, MCLBYTES);
984263bc
MD
1001 ifp->if_ierrors++;
1002 return;
1003 }
1004
1005 m->m_pkthdr.len = m->m_len =
1006 an_rx_desc.an_len + 12;
1007
1008 eh = mtod(m, struct ether_header *);
1009
1010 bcopy(buf, (char *)eh,
1011 m->m_pkthdr.len);
1012
1013 ifp->if_ipackets++;
1014
984263bc
MD
1015#if 0
1016#ifdef ANCACHE
3013ac0e 1017 an_cache_store(sc, m,
984263bc
MD
1018 rx_frame.an_rx_signal_strength,
1019 rx_frame.an_rsvd0);
1020#endif
1021#endif
78195a76 1022 ifp->if_input(ifp, m);
984263bc
MD
1023
1024 an_rx_desc.an_valid = 1;
1025 an_rx_desc.an_len = AN_RX_BUFFER_SIZE;
1026 an_rx_desc.an_done = 0;
1027 an_rx_desc.an_phys =
1028 sc->an_rx_buffer[count].an_dma_paddr;
1029
1030 for (i = 0; i < sizeof(an_rx_desc) / 4; i++)
1031 CSR_MEM_AUX_WRITE_4(sc,
1032 AN_RX_DESC_OFFSET
1033 + (count * sizeof(an_rx_desc))
1034 + (i * 4),
1035 ((u_int32_t*)&an_rx_desc)[i]);
1036
1037 } else {
1c70eebf
JS
1038 if_printf(ifp, "Didn't get valid RX packet "
1039 "%x %x %d\n",
1040 an_rx_desc.an_done,
1041 an_rx_desc.an_valid,
1042 an_rx_desc.an_len);
984263bc
MD
1043 }
1044 }
1045 }
1046}
1047
1048static void
c436375a 1049an_txeof(struct an_softc *sc, int status)
984263bc
MD
1050{
1051 struct ifnet *ifp;
1052 int id, i;
1053
1054 ifp = &sc->arpcom.ac_if;
1055
1056 ifp->if_timer = 0;
1057 ifp->if_flags &= ~IFF_OACTIVE;
1058
1059 if (!sc->mpi350) {
537b8fd3 1060 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
984263bc
MD
1061
1062 if (status & AN_EV_TX_EXC) {
1063 ifp->if_oerrors++;
1064 } else
1065 ifp->if_opackets++;
1066
1067 for (i = 0; i < AN_TX_RING_CNT; i++) {
1068 if (id == sc->an_rdata.an_tx_ring[i]) {
1069 sc->an_rdata.an_tx_ring[i] = 0;
1070 break;
1071 }
1072 }
1073
1074 AN_INC(sc->an_rdata.an_tx_cons, AN_TX_RING_CNT);
1075 } else { /* MPI 350 */
537b8fd3
JS
1076 id = CSR_READ_2(sc, AN_TX_CMP_FID(sc->mpi350));
1077 if (!sc->an_rdata.an_tx_empty){
1078 if (status & AN_EV_TX_EXC) {
1079 ifp->if_oerrors++;
1080 } else
1081 ifp->if_opackets++;
1082 AN_INC(sc->an_rdata.an_tx_cons, AN_MAX_TX_DESC);
1083 if (sc->an_rdata.an_tx_prod ==
1084 sc->an_rdata.an_tx_cons)
1085 sc->an_rdata.an_tx_empty = 1;
1086 }
984263bc 1087 }
984263bc
MD
1088}
1089
1090/*
1091 * We abuse the stats updater to check the current NIC status. This
1092 * is important because we don't want to allow transmissions until
1093 * the NIC has synchronized to the current cell (either as the master
1094 * in an ad-hoc group, or as a station connected to an access point).
1095 */
1096static void
c436375a 1097an_stats_update(void *xsc)
984263bc
MD
1098{
1099 struct an_softc *sc;
1100 struct ifnet *ifp;
984263bc
MD
1101
1102 sc = xsc;
1103 ifp = &sc->arpcom.ac_if;
1104
78195a76 1105 lwkt_serialize_enter(sc->arpcom.ac_if.if_serializer);
41d6c56f 1106
984263bc
MD
1107 sc->an_status.an_type = AN_RID_STATUS;
1108 sc->an_status.an_len = sizeof(struct an_ltv_status);
1109 an_read_record(sc, (struct an_ltv_gen *)&sc->an_status);
1110
1111 if (sc->an_status.an_opmode & AN_STATUS_OPMODE_IN_SYNC)
1112 sc->an_associated = 1;
1113 else
1114 sc->an_associated = 0;
1115
41d6c56f
JS
1116 /* Don't do this while we're not transmitting */
1117 if ((ifp->if_flags & IFF_OACTIVE) == 0) {
1118 sc->an_stats.an_len = sizeof(struct an_ltv_stats);
1119 sc->an_stats.an_type = AN_RID_32BITS_CUM;
1120 an_read_record(sc, (struct an_ltv_gen *)&sc->an_stats.an_len);
984263bc
MD
1121 }
1122
89c0f216 1123 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc 1124
78195a76 1125 lwkt_serialize_exit(sc->arpcom.ac_if.if_serializer);
984263bc
MD
1126}
1127
1128void
c436375a 1129an_intr(void *xsc)
984263bc
MD
1130{
1131 struct an_softc *sc;
1132 struct ifnet *ifp;
1133 u_int16_t status;
1134
1135 sc = (struct an_softc*)xsc;
1136
984263bc
MD
1137 ifp = &sc->arpcom.ac_if;
1138
1139 /* Disable interrupts. */
1140 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
1141
1142 status = CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350));
537b8fd3 1143 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), ~AN_INTRS(sc->mpi350));
984263bc 1144
537b8fd3
JS
1145 if (status & AN_EV_MIC)
1146 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_MIC);
984263bc
MD
1147
1148 if (status & AN_EV_LINKSTAT) {
1149 if (CSR_READ_2(sc, AN_LINKSTAT(sc->mpi350))
1150 == AN_LINKSTAT_ASSOCIATED)
1151 sc->an_associated = 1;
1152 else
1153 sc->an_associated = 0;
1154 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_LINKSTAT);
1155 }
1156
1157 if (status & AN_EV_RX) {
1158 an_rxeof(sc);
1159 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_RX);
1160 }
1161
537b8fd3
JS
1162 if (sc->mpi350 && status & AN_EV_TX_CPY) {
1163 an_txeof(sc, status);
1164 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_CPY);
1165 }
1166
984263bc
MD
1167 if (status & AN_EV_TX) {
1168 an_txeof(sc, status);
1169 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX);
1170 }
1171
1172 if (status & AN_EV_TX_EXC) {
1173 an_txeof(sc, status);
1174 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_TX_EXC);
1175 }
1176
1177 if (status & AN_EV_ALLOC)
1178 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1179
1180 /* Re-enable interrupts. */
537b8fd3 1181 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc 1182
38de8487 1183 if ((ifp->if_flags & IFF_UP) && !ifq_is_empty(&ifp->if_snd))
984263bc
MD
1184 an_start(ifp);
1185
1186 return;
1187}
1188
1189static int
c436375a
SW
1190an_cmd_struct(struct an_softc *sc, struct an_command *cmd,
1191 struct an_reply *reply)
984263bc
MD
1192{
1193 int i;
1194
1195 for (i = 0; i != AN_TIMEOUT; i++) {
1196 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
1197 DELAY(1000);
1198 } else
1199 break;
1200 }
1201 if( i == AN_TIMEOUT) {
e3869ec7 1202 kprintf("BUSY\n");
984263bc
MD
1203 return(ETIMEDOUT);
1204 }
1205
1206 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), cmd->an_parm0);
1207 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), cmd->an_parm1);
1208 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), cmd->an_parm2);
1209 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd->an_cmd);
1210
1211 for (i = 0; i < AN_TIMEOUT; i++) {
1212 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1213 break;
1214 DELAY(1000);
1215 }
1216
1217 reply->an_resp0 = CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1218 reply->an_resp1 = CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1219 reply->an_resp2 = CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1220 reply->an_status = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1221
1222 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1223 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1224
1225 /* Ack the command */
1226 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1227
1228 if (i == AN_TIMEOUT)
1229 return(ETIMEDOUT);
1230
1231 return(0);
1232}
1233
1234static int
c436375a 1235an_cmd(struct an_softc *sc, int cmd, int val)
984263bc
MD
1236{
1237 int i, s = 0;
1238
1239 CSR_WRITE_2(sc, AN_PARAM0(sc->mpi350), val);
1240 CSR_WRITE_2(sc, AN_PARAM1(sc->mpi350), 0);
1241 CSR_WRITE_2(sc, AN_PARAM2(sc->mpi350), 0);
1242 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1243
1244 for (i = 0; i < AN_TIMEOUT; i++) {
1245 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_CMD)
1246 break;
1247 else {
1248 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) == cmd)
1249 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), cmd);
1250 }
1251 }
1252
1253 for (i = 0; i < AN_TIMEOUT; i++) {
1254 CSR_READ_2(sc, AN_RESP0(sc->mpi350));
1255 CSR_READ_2(sc, AN_RESP1(sc->mpi350));
1256 CSR_READ_2(sc, AN_RESP2(sc->mpi350));
1257 s = CSR_READ_2(sc, AN_STATUS(sc->mpi350));
1258 if ((s & AN_STAT_CMD_CODE) == (cmd & AN_STAT_CMD_CODE))
1259 break;
1260 }
1261
1262 /* Ack the command */
1263 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CMD);
1264
1265 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY)
1266 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_CLR_STUCK_BUSY);
1267
1268 if (i == AN_TIMEOUT)
1269 return(ETIMEDOUT);
1270
1271 return(0);
1272}
1273
1274/*
1275 * This reset sequence may look a little strange, but this is the
1276 * most reliable method I've found to really kick the NIC in the
1277 * head and force it to reboot correctly.
1278 */
1279static void
c436375a 1280an_reset(struct an_softc *sc)
984263bc 1281{
984263bc
MD
1282 an_cmd(sc, AN_CMD_ENABLE, 0);
1283 an_cmd(sc, AN_CMD_FW_RESTART, 0);
1284 an_cmd(sc, AN_CMD_NOOP2, 0);
1285
1286 if (an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0) == ETIMEDOUT)
1c70eebf 1287 if_printf(&sc->arpcom.ac_if, "reset failed\n");
984263bc
MD
1288
1289 an_cmd(sc, AN_CMD_DISABLE, 0);
1290
1291 return;
1292}
1293
1294/*
1295 * Read an LTV record from the NIC.
1296 */
1297static int
c436375a 1298an_read_record(struct an_softc *sc, struct an_ltv_gen *ltv)
984263bc
MD
1299{
1300 struct an_ltv_gen *an_ltv;
1301 struct an_card_rid_desc an_rid_desc;
1302 struct an_command cmd;
1303 struct an_reply reply;
1304 u_int16_t *ptr;
1305 u_int8_t *ptr2;
1306 int i, len;
1307
1308 if (ltv->an_len < 4 || ltv->an_type == 0)
1309 return(EINVAL);
1310
1311 if (!sc->mpi350){
1312 /* Tell the NIC to enter record read mode. */
1313 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type)) {
1c70eebf 1314 if_printf(&sc->arpcom.ac_if, "RID access failed\n");
984263bc
MD
1315 return(EIO);
1316 }
1317
1318 /* Seek to the record. */
1319 if (an_seek(sc, ltv->an_type, 0, AN_BAP1)) {
1c70eebf 1320 if_printf(&sc->arpcom.ac_if, "seek to record failed\n");
984263bc
MD
1321 return(EIO);
1322 }
1323
1324 /*
1325 * Read the length and record type and make sure they
1326 * match what we expect (this verifies that we have enough
1327 * room to hold all of the returned data).
1328 * Length includes type but not length.
1329 */
1330 len = CSR_READ_2(sc, AN_DATA1);
1331 if (len > (ltv->an_len - 2)) {
1c70eebf
JS
1332 if_printf(&sc->arpcom.ac_if,
1333 "record length mismatch -- expected %d, "
1334 "got %d for Rid %x\n",
1335 ltv->an_len - 2, len, ltv->an_type);
984263bc
MD
1336 len = ltv->an_len - 2;
1337 } else {
1338 ltv->an_len = len + 2;
1339 }
1340
1341 /* Now read the data. */
1342 len -= 2; /* skip the type */
1343 ptr = &ltv->an_val;
1344 for (i = len; i > 1; i -= 2)
1345 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1346 if (i) {
1347 ptr2 = (u_int8_t *)ptr;
1348 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1349 }
1350 } else { /* MPI-350 */
b92f9c1c
JS
1351 if (sc->an_rid_buffer.an_dma_vaddr == NULL)
1352 return(EIO);
984263bc
MD
1353 an_rid_desc.an_valid = 1;
1354 an_rid_desc.an_len = AN_RID_BUFFER_SIZE;
1355 an_rid_desc.an_rid = 0;
1356 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1357 bzero(sc->an_rid_buffer.an_dma_vaddr, AN_RID_BUFFER_SIZE);
1358
1359 bzero(&cmd, sizeof(cmd));
1360 bzero(&reply, sizeof(reply));
1361 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_READ;
1362 cmd.an_parm0 = ltv->an_type;
1363
1364 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1365 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1366 ((u_int32_t*)&an_rid_desc)[i]);
1367
1368 if (an_cmd_struct(sc, &cmd, &reply)
1369 || reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1370 if_printf(&sc->arpcom.ac_if,
1371 "failed to read RID %x %x %x %x %x, %d\n",
1372 ltv->an_type,
1373 reply.an_status,
1374 reply.an_resp0,
1375 reply.an_resp1,
1376 reply.an_resp2,
1377 i);
984263bc
MD
1378 return(EIO);
1379 }
1380
1381 an_ltv = (struct an_ltv_gen *)sc->an_rid_buffer.an_dma_vaddr;
1382 if (an_ltv->an_len + 2 < an_rid_desc.an_len) {
1383 an_rid_desc.an_len = an_ltv->an_len;
1384 }
1385
b92f9c1c
JS
1386 len = an_rid_desc.an_len;
1387 if (len > (ltv->an_len - 2)) {
1388 if_printf(&sc->arpcom.ac_if,
1389 "record length mismatch -- expected %d, "
1390 "got %d for Rid %x\n",
1391 ltv->an_len - 2, len, ltv->an_type);
1392 len = ltv->an_len - 2;
1393 } else {
1394 ltv->an_len = len + 2;
1395 }
1396 bcopy(&an_ltv->an_type, &ltv->an_val, len);
984263bc
MD
1397 }
1398
1399 if (an_dump)
1400 an_dump_record(sc, ltv, "Read");
1401
1402 return(0);
1403}
1404
1405/*
1406 * Same as read, except we inject data instead of reading it.
1407 */
1408static int
c436375a 1409an_write_record(struct an_softc *sc, struct an_ltv_gen *ltv)
984263bc
MD
1410{
1411 struct an_card_rid_desc an_rid_desc;
1412 struct an_command cmd;
1413 struct an_reply reply;
1414 char *buf;
1415 u_int16_t *ptr;
1416 u_int8_t *ptr2;
1417 int i, len;
1418
1419 if (an_dump)
1420 an_dump_record(sc, ltv, "Write");
1421
1422 if (!sc->mpi350){
1423 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_READ, ltv->an_type))
1424 return(EIO);
1425
1426 if (an_seek(sc, ltv->an_type, 0, AN_BAP1))
1427 return(EIO);
1428
1429 /*
1430 * Length includes type but not length.
1431 */
1432 len = ltv->an_len - 2;
1433 CSR_WRITE_2(sc, AN_DATA1, len);
1434
1435 len -= 2; /* skip the type */
1436 ptr = &ltv->an_val;
1437 for (i = len; i > 1; i -= 2)
1438 CSR_WRITE_2(sc, AN_DATA1, *ptr++);
1439 if (i) {
1440 ptr2 = (u_int8_t *)ptr;
1441 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1442 }
1443
1444 if (an_cmd(sc, AN_CMD_ACCESS|AN_ACCESS_WRITE, ltv->an_type))
1445 return(EIO);
1446 } else {
1447 /* MPI-350 */
1448
1449 for (i = 0; i != AN_TIMEOUT; i++) {
1450 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350))
1451 & AN_CMD_BUSY) {
1452 DELAY(10);
1453 } else
1454 break;
1455 }
1456 if (i == AN_TIMEOUT) {
e3869ec7 1457 kprintf("BUSY\n");
984263bc
MD
1458 }
1459
1460 an_rid_desc.an_valid = 1;
1461 an_rid_desc.an_len = ltv->an_len - 2;
1462 an_rid_desc.an_rid = ltv->an_type;
1463 an_rid_desc.an_phys = sc->an_rid_buffer.an_dma_paddr;
1464
1465 bcopy(&ltv->an_type, sc->an_rid_buffer.an_dma_vaddr,
1466 an_rid_desc.an_len);
1467
1468 bzero(&cmd,sizeof(cmd));
1469 bzero(&reply,sizeof(reply));
1470 cmd.an_cmd = AN_CMD_ACCESS|AN_ACCESS_WRITE;
1471 cmd.an_parm0 = ltv->an_type;
1472
1473 for (i = 0; i < sizeof(an_rid_desc) / 4; i++)
1474 CSR_MEM_AUX_WRITE_4(sc, AN_HOST_DESC_OFFSET + i * 4,
1475 ((u_int32_t*)&an_rid_desc)[i]);
1476
1477 if ((i = an_cmd_struct(sc, &cmd, &reply))) {
1c70eebf
JS
1478 if_printf(&sc->arpcom.ac_if,
1479 "failed to write RID 1 %x %x %x %x %x, %d\n",
1480 ltv->an_type,
984263bc
MD
1481 reply.an_status,
1482 reply.an_resp0,
1483 reply.an_resp1,
1484 reply.an_resp2,
1485 i);
1486 return(EIO);
1487 }
1488
1489 ptr = (u_int16_t *)buf;
1490
1491 if (reply.an_status & AN_CMD_QUAL_MASK) {
1c70eebf
JS
1492 if_printf(&sc->arpcom.ac_if,
1493 "failed to write RID 2 %x %x %x %x %x, %d\n",
1494 ltv->an_type,
984263bc
MD
1495 reply.an_status,
1496 reply.an_resp0,
1497 reply.an_resp1,
1498 reply.an_resp2,
1499 i);
1500 return(EIO);
1501 }
1502 }
1503
1504 return(0);
1505}
1506
1507static void
c436375a 1508an_dump_record(struct an_softc *sc, struct an_ltv_gen *ltv, char *string)
984263bc
MD
1509{
1510 u_int8_t *ptr2;
1511 int len;
1512 int i;
1513 int count = 0;
1514 char buf[17], temp;
1515
1516 len = ltv->an_len - 4;
1c70eebf
JS
1517 if_printf(&sc->arpcom.ac_if, "RID %4x, Length %4d, Mode %s\n",
1518 ltv->an_type, ltv->an_len - 4, string);
984263bc
MD
1519
1520 if (an_dump == 1 || (an_dump == ltv->an_type)) {
1c70eebf 1521 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1522 bzero(buf,sizeof(buf));
1523
1524 ptr2 = (u_int8_t *)&ltv->an_val;
1525 for (i = len; i > 0; i--) {
e3869ec7 1526 kprintf("%02x ", *ptr2);
984263bc
MD
1527
1528 temp = *ptr2++;
1529 if (temp >= ' ' && temp <= '~')
1530 buf[count] = temp;
1531 else if (temp >= 'A' && temp <= 'Z')
1532 buf[count] = temp;
1533 else
1534 buf[count] = '.';
1535 if (++count == 16) {
1536 count = 0;
e3869ec7 1537 kprintf("%s\n",buf);
1c70eebf 1538 if_printf(&sc->arpcom.ac_if, "\t");
984263bc
MD
1539 bzero(buf,sizeof(buf));
1540 }
1541 }
1542 for (; count != 16; count++) {
e3869ec7 1543 kprintf(" ");
984263bc 1544 }
e3869ec7 1545 kprintf(" %s\n",buf);
984263bc
MD
1546 }
1547}
1548
1549static int
c436375a 1550an_seek(struct an_softc *sc, int id, int off, int chan)
984263bc
MD
1551{
1552 int i;
1553 int selreg, offreg;
1554
1555 switch (chan) {
1556 case AN_BAP0:
1557 selreg = AN_SEL0;
1558 offreg = AN_OFF0;
1559 break;
1560 case AN_BAP1:
1561 selreg = AN_SEL1;
1562 offreg = AN_OFF1;
1563 break;
1564 default:
1c70eebf 1565 if_printf(&sc->arpcom.ac_if, "invalid data path: %x\n", chan);
984263bc
MD
1566 return(EIO);
1567 }
1568
1569 CSR_WRITE_2(sc, selreg, id);
1570 CSR_WRITE_2(sc, offreg, off);
1571
1572 for (i = 0; i < AN_TIMEOUT; i++) {
1573 if (!(CSR_READ_2(sc, offreg) & (AN_OFF_BUSY|AN_OFF_ERR)))
1574 break;
1575 }
1576
1577 if (i == AN_TIMEOUT)
1578 return(ETIMEDOUT);
1579
1580 return(0);
1581}
1582
1583static int
c436375a 1584an_read_data(struct an_softc *sc, int id, int off, caddr_t buf, int len)
984263bc
MD
1585{
1586 int i;
1587 u_int16_t *ptr;
1588 u_int8_t *ptr2;
1589
1590 if (off != -1) {
1591 if (an_seek(sc, id, off, AN_BAP1))
1592 return(EIO);
1593 }
1594
1595 ptr = (u_int16_t *)buf;
1596 for (i = len; i > 1; i -= 2)
1597 *ptr++ = CSR_READ_2(sc, AN_DATA1);
1598 if (i) {
1599 ptr2 = (u_int8_t *)ptr;
1600 *ptr2 = CSR_READ_1(sc, AN_DATA1);
1601 }
1602
1603 return(0);
1604}
1605
1606static int
c436375a 1607an_write_data(struct an_softc *sc, int id, int off, caddr_t buf, int len)
984263bc
MD
1608{
1609 int i;
1610 u_int16_t *ptr;
1611 u_int8_t *ptr2;
1612
1613 if (off != -1) {
1614 if (an_seek(sc, id, off, AN_BAP0))
1615 return(EIO);
1616 }
1617
1618 ptr = (u_int16_t *)buf;
1619 for (i = len; i > 1; i -= 2)
1620 CSR_WRITE_2(sc, AN_DATA0, *ptr++);
1621 if (i) {
1622 ptr2 = (u_int8_t *)ptr;
1623 CSR_WRITE_1(sc, AN_DATA0, *ptr2);
1624 }
1625
1626 return(0);
1627}
1628
1629/*
1630 * Allocate a region of memory inside the NIC and zero
1631 * it out.
1632 */
1633static int
c436375a 1634an_alloc_nicmem(struct an_softc *sc, int len, int *id)
984263bc
MD
1635{
1636 int i;
1637
1638 if (an_cmd(sc, AN_CMD_ALLOC_MEM, len)) {
1c70eebf
JS
1639 if_printf(&sc->arpcom.ac_if,
1640 "failed to allocate %d bytes on NIC\n", len);
984263bc
MD
1641 return(ENOMEM);
1642 }
1643
1644 for (i = 0; i < AN_TIMEOUT; i++) {
1645 if (CSR_READ_2(sc, AN_EVENT_STAT(sc->mpi350)) & AN_EV_ALLOC)
1646 break;
1647 }
1648
1649 if (i == AN_TIMEOUT)
1650 return(ETIMEDOUT);
1651
1652 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
1653 *id = CSR_READ_2(sc, AN_ALLOC_FID);
1654
1655 if (an_seek(sc, *id, 0, AN_BAP0))
1656 return(EIO);
1657
1658 for (i = 0; i < len / 2; i++)
1659 CSR_WRITE_2(sc, AN_DATA0, 0);
1660
1661 return(0);
1662}
1663
1664static void
c436375a 1665an_setdef(struct an_softc *sc, struct an_req *areq)
984263bc 1666{
984263bc
MD
1667 struct ifnet *ifp;
1668 struct an_ltv_genconfig *cfg;
537b8fd3 1669 struct an_ltv_ssidlist_new *ssid;
984263bc
MD
1670 struct an_ltv_aplist *ap;
1671 struct an_ltv_gen *sp;
1672
1673 ifp = &sc->arpcom.ac_if;
1674
1675 switch (areq->an_type) {
1676 case AN_RID_GENCONFIG:
1677 cfg = (struct an_ltv_genconfig *)areq;
1678
984263bc
MD
1679 bcopy((char *)&cfg->an_macaddr, (char *)&sc->arpcom.ac_enaddr,
1680 ETHER_ADDR_LEN);
f2682cb9 1681 bcopy((char *)&cfg->an_macaddr, IF_LLADDR(ifp), ETHER_ADDR_LEN);
984263bc
MD
1682
1683 bcopy((char *)cfg, (char *)&sc->an_config,
1684 sizeof(struct an_ltv_genconfig));
1685 break;
1686 case AN_RID_SSIDLIST:
537b8fd3 1687 ssid = (struct an_ltv_ssidlist_new *)areq;
984263bc 1688 bcopy((char *)ssid, (char *)&sc->an_ssidlist,
537b8fd3 1689 sizeof(struct an_ltv_ssidlist_new));
984263bc
MD
1690 break;
1691 case AN_RID_APLIST:
1692 ap = (struct an_ltv_aplist *)areq;
1693 bcopy((char *)ap, (char *)&sc->an_aplist,
1694 sizeof(struct an_ltv_aplist));
1695 break;
1696 case AN_RID_TX_SPEED:
1697 sp = (struct an_ltv_gen *)areq;
1698 sc->an_tx_rate = sp->an_val;
1699
1700 /* Read the current configuration */
1701 sc->an_config.an_type = AN_RID_GENCONFIG;
1702 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1703 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
1704 cfg = &sc->an_config;
1705
1706 /* clear other rates and set the only one we want */
1707 bzero(cfg->an_rates, sizeof(cfg->an_rates));
1708 cfg->an_rates[0] = sc->an_tx_rate;
1709
1710 /* Save the new rate */
1711 sc->an_config.an_type = AN_RID_GENCONFIG;
1712 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
1713 break;
1714 case AN_RID_WEP_TEMP:
1715 /* Cache the temp keys */
1716 bcopy(areq,
1717 &sc->an_temp_keys[((struct an_ltv_key *)areq)->kindex],
1718 sizeof(struct an_ltv_key));
1719 case AN_RID_WEP_PERM:
1720 case AN_RID_LEAPUSERNAME:
1721 case AN_RID_LEAPPASSWORD:
537b8fd3
JS
1722 an_init(sc);
1723
984263bc
MD
1724 /* Disable the MAC. */
1725 an_cmd(sc, AN_CMD_DISABLE, 0);
1726
1727 /* Write the key */
1728 an_write_record(sc, (struct an_ltv_gen *)areq);
1729
1730 /* Turn the MAC back on. */
1731 an_cmd(sc, AN_CMD_ENABLE, 0);
1732
1733 break;
1734 case AN_RID_MONITOR_MODE:
1735 cfg = (struct an_ltv_genconfig *)areq;
1736 bpfdetach(ifp);
1737 if (ng_ether_detach_p != NULL)
1738 (*ng_ether_detach_p) (ifp);
1739 sc->an_monitor = cfg->an_len;
1740
1741 if (sc->an_monitor & AN_MONITOR) {
1742 if (sc->an_monitor & AN_MONITOR_AIRONET_HEADER) {
1743 bpfattach(ifp, DLT_AIRONET_HEADER,
1744 sizeof(struct ether_header));
1745 } else {
1746 bpfattach(ifp, DLT_IEEE802_11,
1747 sizeof(struct ether_header));
1748 }
1749 } else {
1750 bpfattach(ifp, DLT_EN10MB,
1751 sizeof(struct ether_header));
1752 if (ng_ether_attach_p != NULL)
1753 (*ng_ether_attach_p) (ifp);
1754 }
1755 break;
1756 default:
1c70eebf 1757 if_printf(ifp, "unknown RID: %x\n", areq->an_type);
984263bc 1758 return;
984263bc
MD
1759 }
1760
1761
1762 /* Reinitialize the card. */
1763 if (ifp->if_flags)
1764 an_init(sc);
1765
1766 return;
1767}
1768
1769/*
1770 * Derived from Linux driver to enable promiscious mode.
1771 */
1772
1773static void
c436375a 1774an_promisc(struct an_softc *sc, int promisc)
984263bc
MD
1775{
1776 if (sc->an_was_monitor)
1777 an_reset(sc);
1c70eebf
JS
1778 if (sc->mpi350)
1779 an_init_mpi350_desc(sc);
984263bc
MD
1780 if (sc->an_monitor || sc->an_was_monitor)
1781 an_init(sc);
1782
1783 sc->an_was_monitor = sc->an_monitor;
1784 an_cmd(sc, AN_CMD_SET_MODE, promisc ? 0xffff : 0);
1785
1786 return;
1787}
1788
1789static int
c436375a 1790an_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
984263bc 1791{
41d6c56f 1792 int error = 0;
984263bc 1793 int len;
537b8fd3 1794 int i, max;
984263bc
MD
1795 struct an_softc *sc;
1796 struct ifreq *ifr;
984263bc
MD
1797 struct ieee80211req *ireq;
1798 u_int8_t tmpstr[IEEE80211_NWID_LEN*2];
1799 u_int8_t *tmpptr;
1800 struct an_ltv_genconfig *config;
1801 struct an_ltv_key *key;
1802 struct an_ltv_status *status;
537b8fd3 1803 struct an_ltv_ssidlist_new *ssids;
984263bc
MD
1804 int mode;
1805 struct aironet_ioctl l_ioctl;
1806
1807 sc = ifp->if_softc;
984263bc
MD
1808 ifr = (struct ifreq *)data;
1809 ireq = (struct ieee80211req *)data;
1810
1811 config = (struct an_ltv_genconfig *)&sc->areq;
1812 key = (struct an_ltv_key *)&sc->areq;
1813 status = (struct an_ltv_status *)&sc->areq;
537b8fd3 1814 ssids = (struct an_ltv_ssidlist_new *)&sc->areq;
984263bc 1815
984263bc 1816 switch (command) {
984263bc
MD
1817 case SIOCSIFFLAGS:
1818 if (ifp->if_flags & IFF_UP) {
1819 if (ifp->if_flags & IFF_RUNNING &&
1820 ifp->if_flags & IFF_PROMISC &&
1821 !(sc->an_if_flags & IFF_PROMISC)) {
1822 an_promisc(sc, 1);
1823 } else if (ifp->if_flags & IFF_RUNNING &&
1824 !(ifp->if_flags & IFF_PROMISC) &&
1825 sc->an_if_flags & IFF_PROMISC) {
1826 an_promisc(sc, 0);
1827 } else
1828 an_init(sc);
1829 } else {
1830 if (ifp->if_flags & IFF_RUNNING)
1831 an_stop(sc);
1832 }
1833 sc->an_if_flags = ifp->if_flags;
1834 error = 0;
1835 break;
1836 case SIOCSIFMEDIA:
1837 case SIOCGIFMEDIA:
1838 error = ifmedia_ioctl(ifp, ifr, &sc->an_ifmedia, command);
1839 break;
1840 case SIOCADDMULTI:
1841 case SIOCDELMULTI:
1842 /* The Aironet has no multicast filter. */
1843 error = 0;
1844 break;
1845 case SIOCGAIRONET:
1846 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1847 if (error != 0)
1848 break;
1849#ifdef ANCACHE
1850 if (sc->areq.an_type == AN_RID_ZERO_CACHE) {
bd4539cc 1851 error = suser_cred(cr, NULL_CRED_OKAY);
984263bc
MD
1852 if (error)
1853 break;
1854 sc->an_sigitems = sc->an_nextitem = 0;
1855 break;
1856 } else if (sc->areq.an_type == AN_RID_READ_CACHE) {
1857 char *pt = (char *)&sc->areq.an_val;
1858 bcopy((char *)&sc->an_sigitems, (char *)pt,
1859 sizeof(int));
1860 pt += sizeof(int);
1861 sc->areq.an_len = sizeof(int) / 2;
1862 bcopy((char *)&sc->an_sigcache, (char *)pt,
1863 sizeof(struct an_sigcache) * sc->an_sigitems);
1864 sc->areq.an_len += ((sizeof(struct an_sigcache) *
1865 sc->an_sigitems) / 2) + 1;
1866 } else
1867#endif
1868 if (an_read_record(sc, (struct an_ltv_gen *)&sc->areq)) {
1869 error = EINVAL;
1870 break;
1871 }
1872 error = copyout(&sc->areq, ifr->ifr_data, sizeof(sc->areq));
1873 break;
1874 case SIOCSAIRONET:
bd4539cc 1875 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1876 break;
984263bc
MD
1877 error = copyin(ifr->ifr_data, &sc->areq, sizeof(sc->areq));
1878 if (error != 0)
1879 break;
1880 an_setdef(sc, &sc->areq);
1881 break;
1882 case SIOCGPRIVATE_0: /* used by Cisco client utility */
bd4539cc 1883 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1884 break;
984263bc
MD
1885 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1886 mode = l_ioctl.command;
1887
1888 if (mode >= AIROGCAP && mode <= AIROGSTATSD32) {
1889 error = readrids(ifp, &l_ioctl);
1890 } else if (mode >= AIROPCAP && mode <= AIROPLEAPUSR) {
1891 error = writerids(ifp, &l_ioctl);
1892 } else if (mode >= AIROFLSHRST && mode <= AIRORESTART) {
1893 error = flashcard(ifp, &l_ioctl);
1894 } else {
1895 error =-1;
1896 }
1897
1898 /* copy out the updated command info */
1899 copyout(&l_ioctl, ifr->ifr_data, sizeof(l_ioctl));
1900
1901 break;
1902 case SIOCGPRIVATE_1: /* used by Cisco client utility */
bd4539cc 1903 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 1904 break;
984263bc
MD
1905 copyin(ifr->ifr_data, &l_ioctl, sizeof(l_ioctl));
1906 l_ioctl.command = 0;
1907 error = AIROMAGIC;
1908 copyout(&error, l_ioctl.data, sizeof(error));
1909 error = 0;
1910 break;
1911 case SIOCG80211:
1912 sc->areq.an_len = sizeof(sc->areq);
1913 /* was that a good idea DJA we are doing a short-cut */
1914 switch (ireq->i_type) {
1915 case IEEE80211_IOC_SSID:
1916 if (ireq->i_val == -1) {
1917 sc->areq.an_type = AN_RID_STATUS;
1918 if (an_read_record(sc,
1919 (struct an_ltv_gen *)&sc->areq)) {
1920 error = EINVAL;
1921 break;
1922 }
1923 len = status->an_ssidlen;
1924 tmpptr = status->an_ssid;
1925 } else if (ireq->i_val >= 0) {
1926 sc->areq.an_type = AN_RID_SSIDLIST;
1927 if (an_read_record(sc,
1928 (struct an_ltv_gen *)&sc->areq)) {
1929 error = EINVAL;
1930 break;
1931 }
537b8fd3
JS
1932 max = (sc->areq.an_len - 4)
1933 / sizeof(struct an_ltv_ssid_entry);
1934 if ( max > MAX_SSIDS ) {
e3869ec7 1935 kprintf("To many SSIDs only using "
537b8fd3
JS
1936 "%d of %d\n",
1937 MAX_SSIDS, max);
1938 max = MAX_SSIDS;
1939 }
1940 if (ireq->i_val > max) {
984263bc
MD
1941 error = EINVAL;
1942 break;
537b8fd3
JS
1943 } else {
1944 len = ssids->an_entry[ireq->i_val].an_len;
1945 tmpptr = ssids->an_entry[ireq->i_val].an_ssid;
984263bc
MD
1946 }
1947 } else {
1948 error = EINVAL;
1949 break;
1950 }
1951 if (len > IEEE80211_NWID_LEN) {
1952 error = EINVAL;
1953 break;
1954 }
1955 ireq->i_len = len;
1956 bzero(tmpstr, IEEE80211_NWID_LEN);
1957 bcopy(tmpptr, tmpstr, len);
1958 error = copyout(tmpstr, ireq->i_data,
1959 IEEE80211_NWID_LEN);
1960 break;
1961 case IEEE80211_IOC_NUMSSIDS:
537b8fd3
JS
1962 sc->areq.an_len = sizeof(sc->areq);
1963 sc->areq.an_type = AN_RID_SSIDLIST;
1964 if (an_read_record(sc,
1965 (struct an_ltv_gen *)&sc->areq)) {
1966 error = EINVAL;
1967 break;
1968 }
1969 max = (sc->areq.an_len - 4)
1970 / sizeof(struct an_ltv_ssid_entry);
1971 if (max > MAX_SSIDS) {
e3869ec7 1972 kprintf("To many SSIDs only using "
537b8fd3
JS
1973 "%d of %d\n",
1974 MAX_SSIDS, max);
1975 max = MAX_SSIDS;
1976 }
1977 ireq->i_val = max;
984263bc
MD
1978 break;
1979 case IEEE80211_IOC_WEP:
1980 sc->areq.an_type = AN_RID_ACTUALCFG;
1981 if (an_read_record(sc,
1982 (struct an_ltv_gen *)&sc->areq)) {
1983 error = EINVAL;
1984 break;
1985 }
1986 if (config->an_authtype & AN_AUTHTYPE_PRIVACY_IN_USE) {
1987 if (config->an_authtype &
1988 AN_AUTHTYPE_ALLOW_UNENCRYPTED)
1989 ireq->i_val = IEEE80211_WEP_MIXED;
1990 else
1991 ireq->i_val = IEEE80211_WEP_ON;
1992 } else {
1993 ireq->i_val = IEEE80211_WEP_OFF;
1994 }
1995 break;
1996 case IEEE80211_IOC_WEPKEY:
1997 /*
1998 * XXX: I'm not entierly convinced this is
1999 * correct, but it's what is implemented in
2000 * ancontrol so it will have to do until we get
2001 * access to actual Cisco code.
2002 */
2003 if (ireq->i_val < 0 || ireq->i_val > 8) {
2004 error = EINVAL;
2005 break;
2006 }
2007 len = 0;
2008 if (ireq->i_val < 5) {
2009 sc->areq.an_type = AN_RID_WEP_TEMP;
2010 for (i = 0; i < 5; i++) {
2011 if (an_read_record(sc,
2012 (struct an_ltv_gen *)&sc->areq)) {
2013 error = EINVAL;
2014 break;
2015 }
2016 if (key->kindex == 0xffff)
2017 break;
2018 if (key->kindex == ireq->i_val)
2019 len = key->klen;
2020 /* Required to get next entry */
2021 sc->areq.an_type = AN_RID_WEP_PERM;
2022 }
2023 if (error != 0)
2024 break;
2025 }
2026 /* We aren't allowed to read the value of the
2027 * key from the card so we just output zeros
2028 * like we would if we could read the card, but
2029 * denied the user access.
2030 */
2031 bzero(tmpstr, len);
2032 ireq->i_len = len;
2033 error = copyout(tmpstr, ireq->i_data, len);
2034 break;
2035 case IEEE80211_IOC_NUMWEPKEYS:
2036 ireq->i_val = 9; /* include home key */
2037 break;
2038 case IEEE80211_IOC_WEPTXKEY:
2039 /*
2040 * For some strange reason, you have to read all
2041 * keys before you can read the txkey.
2042 */
2043 sc->areq.an_type = AN_RID_WEP_TEMP;
2044 for (i = 0; i < 5; i++) {
2045 if (an_read_record(sc,
2046 (struct an_ltv_gen *) &sc->areq)) {
2047 error = EINVAL;
2048 break;
2049 }
2050 if (key->kindex == 0xffff)
2051 break;
2052 /* Required to get next entry */
2053 sc->areq.an_type = AN_RID_WEP_PERM;
2054 }
2055 if (error != 0)
2056 break;
2057
2058 sc->areq.an_type = AN_RID_WEP_PERM;
2059 key->kindex = 0xffff;
2060 if (an_read_record(sc,
2061 (struct an_ltv_gen *)&sc->areq)) {
2062 error = EINVAL;
2063 break;
2064 }
2065 ireq->i_val = key->mac[0];
2066 /*
2067 * Check for home mode. Map home mode into
2068 * 5th key since that is how it is stored on
2069 * the card
2070 */
2071 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2072 sc->areq.an_type = AN_RID_GENCONFIG;
2073 if (an_read_record(sc,
2074 (struct an_ltv_gen *)&sc->areq)) {
2075 error = EINVAL;
2076 break;
2077 }
2078 if (config->an_home_product & AN_HOME_NETWORK)
2079 ireq->i_val = 4;
2080 break;
2081 case IEEE80211_IOC_AUTHMODE:
2082 sc->areq.an_type = AN_RID_ACTUALCFG;
2083 if (an_read_record(sc,
2084 (struct an_ltv_gen *)&sc->areq)) {
2085 error = EINVAL;
2086 break;
2087 }
2088 if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2089 AN_AUTHTYPE_NONE) {
2090 ireq->i_val = IEEE80211_AUTH_NONE;
2091 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2092 AN_AUTHTYPE_OPEN) {
2093 ireq->i_val = IEEE80211_AUTH_OPEN;
2094 } else if ((config->an_authtype & AN_AUTHTYPE_MASK) ==
2095 AN_AUTHTYPE_SHAREDKEY) {
2096 ireq->i_val = IEEE80211_AUTH_SHARED;
2097 } else
2098 error = EINVAL;
2099 break;
2100 case IEEE80211_IOC_STATIONNAME:
2101 sc->areq.an_type = AN_RID_ACTUALCFG;
2102 if (an_read_record(sc,
2103 (struct an_ltv_gen *)&sc->areq)) {
2104 error = EINVAL;
2105 break;
2106 }
2107 ireq->i_len = sizeof(config->an_nodename);
2108 tmpptr = config->an_nodename;
2109 bzero(tmpstr, IEEE80211_NWID_LEN);
2110 bcopy(tmpptr, tmpstr, ireq->i_len);
2111 error = copyout(tmpstr, ireq->i_data,
2112 IEEE80211_NWID_LEN);
2113 break;
2114 case IEEE80211_IOC_CHANNEL:
2115 sc->areq.an_type = AN_RID_STATUS;
2116 if (an_read_record(sc,
2117 (struct an_ltv_gen *)&sc->areq)) {
2118 error = EINVAL;
2119 break;
2120 }
2121 ireq->i_val = status->an_cur_channel;
2122 break;
2123 case IEEE80211_IOC_POWERSAVE:
2124 sc->areq.an_type = AN_RID_ACTUALCFG;
2125 if (an_read_record(sc,
2126 (struct an_ltv_gen *)&sc->areq)) {
2127 error = EINVAL;
2128 break;
2129 }
2130 if (config->an_psave_mode == AN_PSAVE_NONE) {
2131 ireq->i_val = IEEE80211_POWERSAVE_OFF;
2132 } else if (config->an_psave_mode == AN_PSAVE_CAM) {
2133 ireq->i_val = IEEE80211_POWERSAVE_CAM;
2134 } else if (config->an_psave_mode == AN_PSAVE_PSP) {
2135 ireq->i_val = IEEE80211_POWERSAVE_PSP;
2136 } else if (config->an_psave_mode == AN_PSAVE_PSP_CAM) {
2137 ireq->i_val = IEEE80211_POWERSAVE_PSP_CAM;
2138 } else
2139 error = EINVAL;
2140 break;
2141 case IEEE80211_IOC_POWERSAVESLEEP:
2142 sc->areq.an_type = AN_RID_ACTUALCFG;
2143 if (an_read_record(sc,
2144 (struct an_ltv_gen *)&sc->areq)) {
2145 error = EINVAL;
2146 break;
2147 }
2148 ireq->i_val = config->an_listen_interval;
2149 break;
2150 }
2151 break;
2152 case SIOCS80211:
bd4539cc 2153 if ((error = suser_cred(cr, NULL_CRED_OKAY)))
41d6c56f 2154 break;
984263bc
MD
2155 sc->areq.an_len = sizeof(sc->areq);
2156 /*
2157 * We need a config structure for everything but the WEP
2158 * key management and SSIDs so we get it now so avoid
2159 * duplicating this code every time.
2160 */
2161 if (ireq->i_type != IEEE80211_IOC_SSID &&
2162 ireq->i_type != IEEE80211_IOC_WEPKEY &&
2163 ireq->i_type != IEEE80211_IOC_WEPTXKEY) {
2164 sc->areq.an_type = AN_RID_GENCONFIG;
2165 if (an_read_record(sc,
2166 (struct an_ltv_gen *)&sc->areq)) {
2167 error = EINVAL;
2168 break;
2169 }
2170 }
2171 switch (ireq->i_type) {
2172 case IEEE80211_IOC_SSID:
537b8fd3 2173 sc->areq.an_len = sizeof(sc->areq);
984263bc
MD
2174 sc->areq.an_type = AN_RID_SSIDLIST;
2175 if (an_read_record(sc,
2176 (struct an_ltv_gen *)&sc->areq)) {
2177 error = EINVAL;
2178 break;
2179 }
2180 if (ireq->i_len > IEEE80211_NWID_LEN) {
2181 error = EINVAL;
2182 break;
2183 }
537b8fd3
JS
2184 max = (sc->areq.an_len - 4)
2185 / sizeof(struct an_ltv_ssid_entry);
2186 if (max > MAX_SSIDS) {
e3869ec7 2187 kprintf("To many SSIDs only using "
537b8fd3
JS
2188 "%d of %d\n",
2189 MAX_SSIDS, max);
2190 max = MAX_SSIDS;
984263bc 2191 }
537b8fd3
JS
2192 if (ireq->i_val > max) {
2193 error = EINVAL;
2194 break;
2195 } else {
2196 error = copyin(ireq->i_data,
2197 ssids->an_entry[ireq->i_val].an_ssid,
2198 ireq->i_len);
2199 ssids->an_entry[ireq->i_val].an_len
2200 = ireq->i_len;
2201 break;
2202 }
984263bc
MD
2203 break;
2204 case IEEE80211_IOC_WEP:
2205 switch (ireq->i_val) {
2206 case IEEE80211_WEP_OFF:
2207 config->an_authtype &=
2208 ~(AN_AUTHTYPE_PRIVACY_IN_USE |
2209 AN_AUTHTYPE_ALLOW_UNENCRYPTED);
2210 break;
2211 case IEEE80211_WEP_ON:
2212 config->an_authtype |=
2213 AN_AUTHTYPE_PRIVACY_IN_USE;
2214 config->an_authtype &=
2215 ~AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2216 break;
2217 case IEEE80211_WEP_MIXED:
2218 config->an_authtype |=
2219 AN_AUTHTYPE_PRIVACY_IN_USE |
2220 AN_AUTHTYPE_ALLOW_UNENCRYPTED;
2221 break;
2222 default:
2223 error = EINVAL;
2224 break;
2225 }
2226 break;
2227 case IEEE80211_IOC_WEPKEY:
2228 if (ireq->i_val < 0 || ireq->i_val > 8 ||
2229 ireq->i_len > 13) {
2230 error = EINVAL;
2231 break;
2232 }
2233 error = copyin(ireq->i_data, tmpstr, 13);
2234 if (error != 0)
2235 break;
2236 /*
2237 * Map the 9th key into the home mode
2238 * since that is how it is stored on
2239 * the card
2240 */
2241 bzero(&sc->areq, sizeof(struct an_ltv_key));
2242 sc->areq.an_len = sizeof(struct an_ltv_key);
2243 key->mac[0] = 1; /* The others are 0. */
2244 if (ireq->i_val < 4) {
2245 sc->areq.an_type = AN_RID_WEP_TEMP;
2246 key->kindex = ireq->i_val;
2247 } else {
2248 sc->areq.an_type = AN_RID_WEP_PERM;
2249 key->kindex = ireq->i_val - 4;
2250 }
2251 key->klen = ireq->i_len;
2252 bcopy(tmpstr, key->key, key->klen);
2253 break;
2254 case IEEE80211_IOC_WEPTXKEY:
2255 if (ireq->i_val < 0 || ireq->i_val > 4) {
2256 error = EINVAL;
2257 break;
2258 }
2259
2260 /*
2261 * Map the 5th key into the home mode
2262 * since that is how it is stored on
2263 * the card
2264 */
2265 sc->areq.an_len = sizeof(struct an_ltv_genconfig);
2266 sc->areq.an_type = AN_RID_ACTUALCFG;
2267 if (an_read_record(sc,
2268 (struct an_ltv_gen *)&sc->areq)) {
2269 error = EINVAL;
2270 break;
2271 }
2272 if (ireq->i_val == 4) {
2273 config->an_home_product |= AN_HOME_NETWORK;
2274 ireq->i_val = 0;
2275 } else {
2276 config->an_home_product &= ~AN_HOME_NETWORK;
2277 }
2278
2279 sc->an_config.an_home_product
2280 = config->an_home_product;
2281
2282 /* update configuration */
2283 an_init(sc);
2284
2285 bzero(&sc->areq, sizeof(struct an_ltv_key));
2286 sc->areq.an_len = sizeof(struct an_ltv_key);
2287 sc->areq.an_type = AN_RID_WEP_PERM;
2288 key->kindex = 0xffff;
2289 key->mac[0] = ireq->i_val;
2290 break;
2291 case IEEE80211_IOC_AUTHMODE:
2292 switch (ireq->i_val) {
2293 case IEEE80211_AUTH_NONE:
2294 config->an_authtype = AN_AUTHTYPE_NONE |
2295 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2296 break;
2297 case IEEE80211_AUTH_OPEN:
2298 config->an_authtype = AN_AUTHTYPE_OPEN |
2299 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2300 break;
2301 case IEEE80211_AUTH_SHARED:
2302 config->an_authtype = AN_AUTHTYPE_SHAREDKEY |
2303 (config->an_authtype & ~AN_AUTHTYPE_MASK);
2304 break;
2305 default:
2306 error = EINVAL;
2307 }
2308 break;
2309 case IEEE80211_IOC_STATIONNAME:
2310 if (ireq->i_len > 16) {
2311 error = EINVAL;
2312 break;
2313 }
2314 bzero(config->an_nodename, 16);
2315 error = copyin(ireq->i_data,
2316 config->an_nodename, ireq->i_len);
2317 break;
2318 case IEEE80211_IOC_CHANNEL:
2319 /*
2320 * The actual range is 1-14, but if you set it
2321 * to 0 you get the default so we let that work
2322 * too.
2323 */
2324 if (ireq->i_val < 0 || ireq->i_val >14) {
2325 error = EINVAL;
2326 break;
2327 }
2328 config->an_ds_channel = ireq->i_val;
2329 break;
2330 case IEEE80211_IOC_POWERSAVE:
2331 switch (ireq->i_val) {
2332 case IEEE80211_POWERSAVE_OFF:
2333 config->an_psave_mode = AN_PSAVE_NONE;
2334 break;
2335 case IEEE80211_POWERSAVE_CAM:
2336 config->an_psave_mode = AN_PSAVE_CAM;
2337 break;
2338 case IEEE80211_POWERSAVE_PSP:
2339 config->an_psave_mode = AN_PSAVE_PSP;
2340 break;
2341 case IEEE80211_POWERSAVE_PSP_CAM:
2342 config->an_psave_mode = AN_PSAVE_PSP_CAM;
2343 break;
2344 default:
2345 error = EINVAL;
2346 break;
2347 }
2348 break;
2349 case IEEE80211_IOC_POWERSAVESLEEP:
2350 config->an_listen_interval = ireq->i_val;
2351 break;
2352 }
2353
2354 if (!error)
2355 an_setdef(sc, &sc->areq);
2356 break;
2357 default:
4cde4dd5 2358 error = ether_ioctl(ifp, command, data);
984263bc
MD
2359 break;
2360 }
41d6c56f 2361
984263bc
MD
2362 return(error != 0);
2363}
2364
2365static int
c436375a 2366an_init_tx_ring(struct an_softc *sc)
984263bc
MD
2367{
2368 int i;
2369 int id;
2370
984263bc
MD
2371 if (!sc->mpi350) {
2372 for (i = 0; i < AN_TX_RING_CNT; i++) {
2373 if (an_alloc_nicmem(sc, 1518 +
2374 0x44, &id))
2375 return(ENOMEM);
2376 sc->an_rdata.an_tx_fids[i] = id;
2377 sc->an_rdata.an_tx_ring[i] = 0;
2378 }
2379 }
2380
2381 sc->an_rdata.an_tx_prod = 0;
2382 sc->an_rdata.an_tx_cons = 0;
2383 sc->an_rdata.an_tx_empty = 1;
2384
2385 return(0);
2386}
2387
2388static void
c436375a 2389an_init(void *xsc)
984263bc
MD
2390{
2391 struct an_softc *sc = xsc;
2392 struct ifnet *ifp = &sc->arpcom.ac_if;
984263bc 2393
984263bc
MD
2394 if (ifp->if_flags & IFF_RUNNING)
2395 an_stop(sc);
2396
2397 sc->an_associated = 0;
2398
2399 /* Allocate the TX buffers */
2400 if (an_init_tx_ring(sc)) {
2401 an_reset(sc);
2402 if (sc->mpi350)
2403 an_init_mpi350_desc(sc);
2404 if (an_init_tx_ring(sc)) {
1c70eebf 2405 if_printf(ifp, "tx buffer allocation failed\n");
984263bc
MD
2406 return;
2407 }
2408 }
2409
2410 /* Set our MAC address. */
2411 bcopy((char *)&sc->arpcom.ac_enaddr,
2412 (char *)&sc->an_config.an_macaddr, ETHER_ADDR_LEN);
2413
2414 if (ifp->if_flags & IFF_BROADCAST)
2415 sc->an_config.an_rxmode = AN_RXMODE_BC_ADDR;
2416 else
2417 sc->an_config.an_rxmode = AN_RXMODE_ADDR;
2418
2419 if (ifp->if_flags & IFF_MULTICAST)
2420 sc->an_config.an_rxmode = AN_RXMODE_BC_MC_ADDR;
2421
2422 if (ifp->if_flags & IFF_PROMISC) {
2423 if (sc->an_monitor & AN_MONITOR) {
2424 if (sc->an_monitor & AN_MONITOR_ANY_BSS) {
2425 sc->an_config.an_rxmode |=
2426 AN_RXMODE_80211_MONITOR_ANYBSS |
2427 AN_RXMODE_NO_8023_HEADER;
2428 } else {
2429 sc->an_config.an_rxmode |=
2430 AN_RXMODE_80211_MONITOR_CURBSS |
2431 AN_RXMODE_NO_8023_HEADER;
2432 }
2433 }
2434 }
2435
2436 if (sc->an_have_rssimap)
2437 sc->an_config.an_rxmode |= AN_RXMODE_NORMALIZED_RSSI;
2438
2439 /* Set the ssid list */
2440 sc->an_ssidlist.an_type = AN_RID_SSIDLIST;
537b8fd3 2441 sc->an_ssidlist.an_len = sizeof(struct an_ltv_ssidlist_new);
984263bc 2442 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_ssidlist)) {
1c70eebf 2443 if_printf(ifp, "failed to set ssid list\n");
984263bc
MD
2444 return;
2445 }
2446
2447 /* Set the AP list */
2448 sc->an_aplist.an_type = AN_RID_APLIST;
2449 sc->an_aplist.an_len = sizeof(struct an_ltv_aplist);
2450 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_aplist)) {
1c70eebf 2451 if_printf(ifp, "failed to set AP list\n");
984263bc
MD
2452 return;
2453 }
2454
2455 /* Set the configuration in the NIC */
2456 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2457 sc->an_config.an_type = AN_RID_GENCONFIG;
2458 if (an_write_record(sc, (struct an_ltv_gen *)&sc->an_config)) {
1c70eebf 2459 if_printf(ifp, "failed to set configuration\n");
984263bc
MD
2460 return;
2461 }
2462
2463 /* Enable the MAC */
2464 if (an_cmd(sc, AN_CMD_ENABLE, 0)) {
1c70eebf 2465 if_printf(ifp, "failed to enable MAC\n");
984263bc
MD
2466 return;
2467 }
2468
2469 if (ifp->if_flags & IFF_PROMISC)
2470 an_cmd(sc, AN_CMD_SET_MODE, 0xffff);
2471
2472 /* enable interrupts */
537b8fd3 2473 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD
2474
2475 ifp->if_flags |= IFF_RUNNING;
2476 ifp->if_flags &= ~IFF_OACTIVE;
2477
89c0f216 2478 callout_reset(&sc->an_stat_timer, hz, an_stats_update, sc);
984263bc
MD
2479}
2480
2481static void
c436375a 2482an_start(struct ifnet *ifp)
984263bc
MD
2483{
2484 struct an_softc *sc;
2485 struct mbuf *m0 = NULL;
2486 struct an_txframe_802_3 tx_frame_802_3;
2487 struct ether_header *eh;
2488 int id, idx, i;
2489 unsigned char txcontrol;
2490 struct an_card_tx_desc an_tx_desc;
984263bc
MD
2491 u_int8_t *buf;
2492
2493 sc = ifp->if_softc;
2494
984263bc
MD
2495 if (ifp->if_flags & IFF_OACTIVE)
2496 return;
2497
2498 if (!sc->an_associated)
2499 return;
2500
2501 /* We can't send in monitor mode so toss any attempts. */
2502 if (sc->an_monitor && (ifp->if_flags & IFF_PROMISC)) {
38de8487 2503 ifq_purge(&ifp->if_snd);
984263bc
MD
2504 return;
2505 }
2506
2507 idx = sc->an_rdata.an_tx_prod;
2508
2509 if (!sc->mpi350) {
2510 bzero((char *)&tx_frame_802_3, sizeof(tx_frame_802_3));
2511
2512 while (sc->an_rdata.an_tx_ring[idx] == 0) {
d2c71fa0 2513 m0 = ifq_dequeue(&ifp->if_snd, NULL);
984263bc
MD
2514 if (m0 == NULL)
2515 break;
2516
2517 id = sc->an_rdata.an_tx_fids[idx];
2518 eh = mtod(m0, struct ether_header *);
2519
2520 bcopy((char *)&eh->ether_dhost,
2521 (char *)&tx_frame_802_3.an_tx_dst_addr,
2522 ETHER_ADDR_LEN);
2523 bcopy((char *)&eh->ether_shost,
2524 (char *)&tx_frame_802_3.an_tx_src_addr,
2525 ETHER_ADDR_LEN);
2526
2527 /* minus src/dest mac & type */
2528 tx_frame_802_3.an_tx_802_3_payload_len =
2529 m0->m_pkthdr.len - 12;
2530
2531 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2532 tx_frame_802_3.an_tx_802_3_payload_len,
2533 (caddr_t)&sc->an_txbuf);
2534
2535 txcontrol = AN_TXCTL_8023;
2536 /* write the txcontrol only */
2537 an_write_data(sc, id, 0x08, (caddr_t)&txcontrol,
2538 sizeof(txcontrol));
2539
2540 /* 802_3 header */
2541 an_write_data(sc, id, 0x34, (caddr_t)&tx_frame_802_3,
2542 sizeof(struct an_txframe_802_3));
2543
2544 /* in mbuf header type is just before payload */
2545 an_write_data(sc, id, 0x44, (caddr_t)&sc->an_txbuf,
2546 tx_frame_802_3.an_tx_802_3_payload_len);
2547
7600679e 2548 BPF_MTAP(ifp, m0);
984263bc
MD
2549
2550 m_freem(m0);
2551 m0 = NULL;
2552
2553 sc->an_rdata.an_tx_ring[idx] = id;
2554 if (an_cmd(sc, AN_CMD_TX, id))
1c70eebf 2555 if_printf(ifp, "xmit failed\n");
984263bc
MD
2556
2557 AN_INC(idx, AN_TX_RING_CNT);
537b8fd3
JS
2558
2559 /*
2560 * Set a timeout in case the chip goes out to lunch.
2561 */
2562 ifp->if_timer = 5;
984263bc
MD
2563 }
2564 } else { /* MPI-350 */
2da352b0
JS
2565 /* Disable interrupts. */
2566 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2567
984263bc
MD
2568 while (sc->an_rdata.an_tx_empty ||
2569 idx != sc->an_rdata.an_tx_cons) {
d2c71fa0 2570 m0 = ifq_dequeue(&ifp->if_snd, NULL);
984263bc
MD
2571 if (m0 == NULL) {
2572 break;
2573 }
2574 buf = sc->an_tx_buffer[idx].an_dma_vaddr;
2575
2576 eh = mtod(m0, struct ether_header *);
2577
2578 /* DJA optimize this to limit bcopy */
2579 bcopy((char *)&eh->ether_dhost,
2580 (char *)&tx_frame_802_3.an_tx_dst_addr,
2581 ETHER_ADDR_LEN);
2582 bcopy((char *)&eh->ether_shost,
2583 (char *)&tx_frame_802_3.an_tx_src_addr,
2584 ETHER_ADDR_LEN);
2585
2586 /* minus src/dest mac & type */
2587 tx_frame_802_3.an_tx_802_3_payload_len =
2588 m0->m_pkthdr.len - 12;
2589
2590 m_copydata(m0, sizeof(struct ether_header) - 2 ,
2591 tx_frame_802_3.an_tx_802_3_payload_len,
2592 (caddr_t)&sc->an_txbuf);
2593
2594 txcontrol = AN_TXCTL_8023;
2595 /* write the txcontrol only */
2596 bcopy((caddr_t)&txcontrol, &buf[0x08],
2597 sizeof(txcontrol));
2598
2599 /* 802_3 header */
2600 bcopy((caddr_t)&tx_frame_802_3, &buf[0x34],
2601 sizeof(struct an_txframe_802_3));
2602
2603 /* in mbuf header type is just before payload */
2604 bcopy((caddr_t)&sc->an_txbuf, &buf[0x44],
2605 tx_frame_802_3.an_tx_802_3_payload_len);
2606
2607
2608 bzero(&an_tx_desc, sizeof(an_tx_desc));
2609 an_tx_desc.an_offset = 0;
2610 an_tx_desc.an_eoc = 1;
2611 an_tx_desc.an_valid = 1;
2612 an_tx_desc.an_len = 0x44 +
2613 tx_frame_802_3.an_tx_802_3_payload_len;
2614 an_tx_desc.an_phys = sc->an_tx_buffer[idx].an_dma_paddr;
537b8fd3
JS
2615 for (i = 0; i < sizeof(an_tx_desc) / 4 ; i++) {
2616 CSR_MEM_AUX_WRITE_4(sc, AN_TX_DESC_OFFSET
2617 /* zero for now */
2618 + (0 * sizeof(an_tx_desc))
2619 + (i * 4),
2620 ((u_int32_t*)&an_tx_desc)[i]);
2621 }
984263bc 2622
7600679e 2623 BPF_MTAP(ifp, m0);
984263bc
MD
2624
2625 m_freem(m0);
2626 m0 = NULL;
2627
984263bc
MD
2628 AN_INC(idx, AN_MAX_TX_DESC);
2629 sc->an_rdata.an_tx_empty = 0;
537b8fd3
JS
2630
2631 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350), AN_EV_ALLOC);
2632
2633 /*
2634 * Set a timeout in case the chip goes out to lunch.
2635 */
2636 ifp->if_timer = 5;
984263bc 2637 }
2da352b0
JS
2638
2639 /* Re-enable interrupts. */
2640 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), AN_INTRS(sc->mpi350));
984263bc
MD
2641 }
2642
2643 if (m0 != NULL)
2644 ifp->if_flags |= IFF_OACTIVE;
2645
2646 sc->an_rdata.an_tx_prod = idx;
984263bc
MD
2647}
2648
2649void
c436375a 2650an_stop(struct an_softc *sc)
984263bc
MD
2651{
2652 struct ifnet *ifp;
2653 int i;
984263bc 2654
984263bc
MD
2655 ifp = &sc->arpcom.ac_if;
2656
2657 an_cmd(sc, AN_CMD_FORCE_SYNCLOSS, 0);
2658 CSR_WRITE_2(sc, AN_INT_EN(sc->mpi350), 0);
2659 an_cmd(sc, AN_CMD_DISABLE, 0);
2660
2661 for (i = 0; i < AN_TX_RING_CNT; i++)
2662 an_cmd(sc, AN_CMD_DEALLOC_MEM, sc->an_rdata.an_tx_fids[i]);
2663
89c0f216 2664 callout_stop(&sc->an_stat_timer);
984263bc
MD
2665
2666 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
2667
2668 if (sc->an_flash_buffer) {
efda3bd0 2669 kfree(sc->an_flash_buffer, M_DEVBUF);
984263bc
MD
2670 sc->an_flash_buffer = NULL;
2671 }
984263bc
MD
2672}
2673
2674static void
c436375a 2675an_watchdog(struct ifnet *ifp)
984263bc
MD
2676{
2677 struct an_softc *sc;
984263bc
MD
2678
2679 sc = ifp->if_softc;
984263bc
MD
2680
2681 an_reset(sc);
2682 if (sc->mpi350)
2683 an_init_mpi350_desc(sc);
2684 an_init(sc);
2685
2686 ifp->if_oerrors++;
984263bc 2687
41d6c56f 2688 if_printf(ifp, "device timeout\n");
984263bc
MD
2689}
2690
2691void
c436375a 2692an_shutdown(device_t dev)
984263bc
MD
2693{
2694 struct an_softc *sc;
2695
2696 sc = device_get_softc(dev);
2697 an_stop(sc);
2698
2699 return;
2700}
2701
2702void
c436375a 2703an_resume(device_t dev)
984263bc
MD
2704{
2705 struct an_softc *sc;
2706 struct ifnet *ifp;
2707 int i;
2708
2709 sc = device_get_softc(dev);
2710 ifp = &sc->arpcom.ac_if;
2711
2712 an_reset(sc);
2713 if (sc->mpi350)
2714 an_init_mpi350_desc(sc);
2715 an_init(sc);
2716
2717 /* Recovery temporary keys */
2718 for (i = 0; i < 4; i++) {
2719 sc->areq.an_type = AN_RID_WEP_TEMP;
2720 sc->areq.an_len = sizeof(struct an_ltv_key);
2721 bcopy(&sc->an_temp_keys[i],
2722 &sc->areq, sizeof(struct an_ltv_key));
2723 an_setdef(sc, &sc->areq);
2724 }
2725
2726 if (ifp->if_flags & IFF_UP)
2727 an_start(ifp);
2728
2729 return;
2730}
2731
2732#ifdef ANCACHE
2733/* Aironet signal strength cache code.
2734 * store signal/noise/quality on per MAC src basis in
2735 * a small fixed cache. The cache wraps if > MAX slots
2736 * used. The cache may be zeroed out to start over.
2737 * Two simple filters exist to reduce computation:
2738 * 1. ip only (literally 0x800, ETHERTYPE_IP) which may be used
2739 * to ignore some packets. It defaults to ip only.
2740 * it could be used to focus on broadcast, non-IP 802.11 beacons.
2741 * 2. multicast/broadcast only. This may be used to
2742 * ignore unicast packets and only cache signal strength
2743 * for multicast/broadcast packets (beacons); e.g., Mobile-IP
2744 * beacons and not unicast traffic.
2745 *
2746 * The cache stores (MAC src(index), IP src (major clue), signal,
2747 * quality, noise)
2748 *
2749 * No apologies for storing IP src here. It's easy and saves much
2750 * trouble elsewhere. The cache is assumed to be INET dependent,
2751 * although it need not be.
2752 *
2753 * Note: the Aironet only has a single byte of signal strength value
2754 * in the rx frame header, and it's not scaled to anything sensible.
2755 * This is kind of lame, but it's all we've got.
2756 */
2757
2758#ifdef documentation
2759
2760int an_sigitems; /* number of cached entries */
2761struct an_sigcache an_sigcache[MAXANCACHE]; /* array of cache entries */
2762int an_nextitem; /* index/# of entries */
2763
2764
2765#endif
2766
2767/* control variables for cache filtering. Basic idea is
2768 * to reduce cost (e.g., to only Mobile-IP agent beacons
2769 * which are broadcast or multicast). Still you might
2770 * want to measure signal strength anth unicast ping packets
2771 * on a pt. to pt. ant. setup.
2772 */
2773/* set true if you want to limit cache items to broadcast/mcast
2774 * only packets (not unicast). Useful for mobile-ip beacons which
2775 * are broadcast/multicast at network layer. Default is all packets
2776 * so ping/unicast anll work say anth pt. to pt. antennae setup.
2777 */
2778static int an_cache_mcastonly = 0;
2779SYSCTL_INT(_hw_an, OID_AUTO, an_cache_mcastonly, CTLFLAG_RW,
2780 &an_cache_mcastonly, 0, "");
2781
2782/* set true if you want to limit cache items to IP packets only
2783*/
2784static int an_cache_iponly = 1;
2785SYSCTL_INT(_hw_an, OID_AUTO, an_cache_iponly, CTLFLAG_RW,
2786 &an_cache_iponly, 0, "");
2787
2788/*
2789 * an_cache_store, per rx packet store signal
2790 * strength in MAC (src) indexed cache.
2791 */
2792static void
c436375a
SW
2793an_cache_store (struct an_softc *sc, struct mbuf *m, u_int8_t rx_rssi,
2794 u_int8_t rx_quality)
984263bc 2795{
3013ac0e
JS
2796 struct ether_header *eh = mtod(m, struct ether_header *);
2797 struct ip *ip = NULL;
984263bc
MD
2798 int i;
2799 static int cache_slot = 0; /* use this cache entry */
2800 static int wrapindex = 0; /* next "free" cache entry */
984263bc
MD
2801
2802 /* filters:
2803 * 1. ip only
2804 * 2. configurable filter to throw out unicast packets,
2805 * keep multicast only.
2806 */
2807
3013ac0e
JS
2808 if ((ntohs(eh->ether_type) == ETHERTYPE_IP))
2809 ip = (struct ip *)(mtod(m, uint8_t *) + ETHER_HDR_LEN);
2810 else if (an_cache_iponly)
984263bc 2811 return;
984263bc
MD
2812
2813 /* filter for broadcast/multicast only
2814 */
2815 if (an_cache_mcastonly && ((eh->ether_dhost[0] & 1) == 0)) {
2816 return;
2817 }
2818
2819#ifdef SIGDEBUG
1c70eebf
JS
2820 if_printf(&sc->arpcom.ac_if, "q value %x (MSB=0x%x, LSB=0x%x)\n",
2821 rx_rssi & 0xffff, rx_rssi >> 8, rx_rssi & 0xff);
984263bc
MD
2822#endif
2823
984263bc
MD
2824 /* do a linear search for a matching MAC address
2825 * in the cache table
2826 * . MAC address is 6 bytes,
2827 * . var w_nextitem holds total number of entries already cached
2828 */
2829 for (i = 0; i < sc->an_nextitem; i++) {
2830 if (! bcmp(eh->ether_shost , sc->an_sigcache[i].macsrc, 6 )) {
2831 /* Match!,
2832 * so we already have this entry,
2833 * update the data
2834 */
2835 break;
2836 }
2837 }
2838
2839 /* did we find a matching mac address?
2840 * if yes, then overwrite a previously existing cache entry
2841 */
2842 if (i < sc->an_nextitem ) {
2843 cache_slot = i;
2844 }
2845 /* else, have a new address entry,so
2846 * add this new entry,
2847 * if table full, then we need to replace LRU entry
2848 */
2849 else {
2850
2851 /* check for space in cache table
2852 * note: an_nextitem also holds number of entries
2853 * added in the cache table
2854 */
2855 if ( sc->an_nextitem < MAXANCACHE ) {
2856 cache_slot = sc->an_nextitem;
2857 sc->an_nextitem++;
2858 sc->an_sigitems = sc->an_nextitem;
2859 }
2860 /* no space found, so simply wrap anth wrap index
2861 * and "zap" the next entry
2862 */
2863 else {
2864 if (wrapindex == MAXANCACHE) {
2865 wrapindex = 0;
2866 }
2867 cache_slot = wrapindex++;
2868 }
2869 }
2870
2871 /* invariant: cache_slot now points at some slot
2872 * in cache.
2873 */
2874 if (cache_slot < 0 || cache_slot >= MAXANCACHE) {
2875 log(LOG_ERR, "an_cache_store, bad index: %d of "
2876 "[0..%d], gross cache error\n",
2877 cache_slot, MAXANCACHE);
2878 return;
2879 }
2880
2881 /* store items in cache
2882 * .ip source address
2883 * .mac src
2884 * .signal, etc.
2885 */
3013ac0e 2886 if (ip != NULL) {
984263bc
MD
2887 sc->an_sigcache[cache_slot].ipsrc = ip->ip_src.s_addr;
2888 }
2889 bcopy( eh->ether_shost, sc->an_sigcache[cache_slot].macsrc, 6);
2890
2891
2892 switch (an_cache_mode) {
2893 case DBM:
2894 if (sc->an_have_rssimap) {
2895 sc->an_sigcache[cache_slot].signal =
2896 - sc->an_rssimap.an_entries[rx_rssi].an_rss_dbm;
2897 sc->an_sigcache[cache_slot].quality =
2898 - sc->an_rssimap.an_entries[rx_quality].an_rss_dbm;
2899 } else {
2900 sc->an_sigcache[cache_slot].signal = rx_rssi - 100;
2901 sc->an_sigcache[cache_slot].quality = rx_quality - 100;
2902 }
2903 break;
2904 case PERCENT:
2905 if (sc->an_have_rssimap) {
2906 sc->an_sigcache[cache_slot].signal =
2907 sc->an_rssimap.an_entries[rx_rssi].an_rss_pct;
2908 sc->an_sigcache[cache_slot].quality =
2909 sc->an_rssimap.an_entries[rx_quality].an_rss_pct;
2910 } else {
2911 if (rx_rssi > 100)
2912 rx_rssi = 100;
2913 if (rx_quality > 100)
2914 rx_quality = 100;
2915 sc->an_sigcache[cache_slot].signal = rx_rssi;
2916 sc->an_sigcache[cache_slot].quality = rx_quality;
2917 }
2918 break;
2919 case RAW:
2920 sc->an_sigcache[cache_slot].signal = rx_rssi;
2921 sc->an_sigcache[cache_slot].quality = rx_quality;
2922 break;
2923 }
2924
2925 sc->an_sigcache[cache_slot].noise = 0;
2926
2927 return;
2928}
2929#endif
2930
2931static int
c436375a 2932an_media_change(struct ifnet *ifp)
984263bc
MD
2933{
2934 struct an_softc *sc = ifp->if_softc;
2935 struct an_ltv_genconfig *cfg;
2936 int otype = sc->an_config.an_opmode;
2937 int orate = sc->an_tx_rate;
2938
984263bc
MD
2939 switch (IFM_SUBTYPE(sc->an_ifmedia.ifm_cur->ifm_media)) {
2940 case IFM_IEEE80211_DS1:
2941 sc->an_tx_rate = AN_RATE_1MBPS;
2942 break;
2943 case IFM_IEEE80211_DS2:
2944 sc->an_tx_rate = AN_RATE_2MBPS;
2945 break;
2946 case IFM_IEEE80211_DS5:
2947 sc->an_tx_rate = AN_RATE_5_5MBPS;
2948 break;
2949 case IFM_IEEE80211_DS11:
2950 sc->an_tx_rate = AN_RATE_11MBPS;
2951 break;
2952 case IFM_AUTO:
2953 sc->an_tx_rate = 0;
2954 break;
2955 }
2956
2957 if (orate != sc->an_tx_rate) {
2958 /* Read the current configuration */
2959 sc->an_config.an_type = AN_RID_GENCONFIG;
2960 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2961 an_read_record(sc, (struct an_ltv_gen *)&sc->an_config);
2962 cfg = &sc->an_config;
2963
2964 /* clear other rates and set the only one we want */
2965 bzero(cfg->an_rates, sizeof(cfg->an_rates));
2966 cfg->an_rates[0] = sc->an_tx_rate;
2967
2968 /* Save the new rate */
2969 sc->an_config.an_type = AN_RID_GENCONFIG;
2970 sc->an_config.an_len = sizeof(struct an_ltv_genconfig);
2971 }
2972
537b8fd3
JS
2973 if ((sc->an_ifmedia.ifm_cur->ifm_media & IFM_IEEE80211_ADHOC) != 0)
2974 sc->an_config.an_opmode &= ~AN_OPMODE_INFRASTRUCTURE_STATION;
2975 else
2976 sc->an_config.an_opmode |= AN_OPMODE_INFRASTRUCTURE_STATION;
2977
984263bc
MD
2978 if (otype != sc->an_config.an_opmode ||
2979 orate != sc->an_tx_rate)
2980 an_init(sc);
2981
2982 return(0);
2983}
2984
2985static void
c436375a 2986an_media_status(struct ifnet *ifp, struct ifmediareq *imr)
984263bc
MD
2987{
2988 struct an_ltv_status status;
2989 struct an_softc *sc = ifp->if_softc;
2990
2991 status.an_len = sizeof(status);
2992 status.an_type = AN_RID_STATUS;
2993 if (an_read_record(sc, (struct an_ltv_gen *)&status)) {
2994 /* If the status read fails, just lie. */
2995 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
2996 imr->ifm_status = IFM_AVALID|IFM_ACTIVE;
2997 }
2998
2999 if (sc->an_tx_rate == 0) {
3000 imr->ifm_active = IFM_IEEE80211|IFM_AUTO;
3001 if (sc->an_config.an_opmode == AN_OPMODE_IBSS_ADHOC)
3002 imr->ifm_active |= IFM_IEEE80211_ADHOC;
3003 switch (status.an_current_tx_rate) {
3004 case AN_RATE_1MBPS:
3005 imr->ifm_active |= IFM_IEEE80211_DS1;
3006 break;
3007 case AN_RATE_2MBPS:
3008 imr->ifm_active |= IFM_IEEE80211_DS2;
3009 break;
3010 case AN_RATE_5_5MBPS:
3011 imr->ifm_active |= IFM_IEEE80211_DS5;
3012 break;
3013 case AN_RATE_11MBPS:
3014 imr->ifm_active |= IFM_IEEE80211_DS11;
3015 break;
3016 }
3017 } else {
3018 imr->ifm_active = sc->an_ifmedia.ifm_cur->ifm_media;
3019 }
3020
3021 imr->ifm_status = IFM_AVALID;
3022 if (status.an_opmode & AN_STATUS_OPMODE_ASSOCIATED)
3023 imr->ifm_status |= IFM_ACTIVE;
3024}
3025
3026/********************** Cisco utility support routines *************/
3027
3028/*
3029 * ReadRids & WriteRids derived from Cisco driver additions to Ben Reed's
3030 * Linux driver
3031 */
3032
3033static int
c436375a 3034readrids(struct ifnet *ifp, struct aironet_ioctl *l_ioctl)
984263bc
MD
3035{
3036 unsigned short rid;
3037 struct an_softc *sc;
3038
3039 switch (l_ioctl->command) {
3040 case AIROGCAP:
3041 rid = AN_RID_CAPABILITIES;
3042 break;
3043 case AIROGCFG:
3044 rid = AN_RID_GENCONFIG;
3045 break;
3046 case AIROGSLIST:
3047 rid = AN_RID_SSIDLIST;
3048 break;
3049 case AIROGVLIST:
3050 rid = AN_RID_APLIST;
3051 break;
3052 case AIROGDRVNAM:
3053 rid = AN_RID_DRVNAME;
3054 break;
3055 case AIROGEHTENC:
3056 rid = AN_RID_ENCAPPROTO;
3057 break;
3058 case AIROGWEPKTMP:
3059 rid = AN_RID_WEP_TEMP;
3060 break;
3061 case AIROGWEPKNV:
3062 rid = AN_RID_WEP_PERM;
3063 break;
3064 case AIROGSTAT:
3065 rid = AN_RID_STATUS;
3066 break;
3067 case AIROGSTATSD32:
3068 rid = AN_RID_32BITS_DELTA;
3069 break;
3070 case AIROGSTATSC32:
3071 rid = AN_RID_32BITS_CUM;
3072 break;
3073 default:
3074 rid = 999;
3075 break;
3076 }
3077
3078 if (rid == 999) /* Is bad command */
3079 return -EINVAL;
3080
3081 sc = ifp->if_softc;
3082 sc->areq.an_len = AN_MAX_DATALEN;
3083 sc->areq.an_type = rid;
3084
3085 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3086
3087 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3088
3089 /* the data contains the length at first */
3090 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3091 sizeof(sc->areq.an_len))) {
3092 return -EFAULT;
3093 }
3094 /* Just copy the data back */
3095 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3096 l_ioctl->len)) {
3097 return -EFAULT;
3098 }
3099 return 0;
3100}
3101
3102static int
c436375a 3103writerids(struct ifnet *ifp, struct aironet_ioctl *l_ioctl)
984263bc
MD
3104{
3105 struct an_softc *sc;
3106 int rid, command;
3107
3108 sc = ifp->if_softc;
3109 rid = 0;
3110 command = l_ioctl->command;
3111
3112 switch (command) {
3113 case AIROPSIDS:
3114 rid = AN_RID_SSIDLIST;
3115 break;
3116 case AIROPCAP:
3117 rid = AN_RID_CAPABILITIES;
3118 break;
3119 case AIROPAPLIST:
3120 rid = AN_RID_APLIST;
3121 break;
3122 case AIROPCFG:
3123 rid = AN_RID_GENCONFIG;
3124 break;
3125 case AIROPMACON:
3126 an_cmd(sc, AN_CMD_ENABLE, 0);
3127 return 0;
3128 break;
3129 case AIROPMACOFF:
3130 an_cmd(sc, AN_CMD_DISABLE, 0);
3131 return 0;
3132 break;
3133 case AIROPSTCLR:
3134 /*
3135 * This command merely clears the counts does not actually
3136 * store any data only reads rid. But as it changes the cards
3137 * state, I put it in the writerid routines.
3138 */
3139
3140 rid = AN_RID_32BITS_DELTACLR;
3141 sc = ifp->if_softc;
3142 sc->areq.an_len = AN_MAX_DATALEN;
3143 sc->areq.an_type = rid;
3144
3145 an_read_record(sc, (struct an_ltv_gen *)&sc->areq);
3146 l_ioctl->len = sc->areq.an_len - 4; /* just data */
3147
3148 /* the data contains the length at first */
3149 if (copyout(&(sc->areq.an_len), l_ioctl->data,
3150 sizeof(sc->areq.an_len))) {
3151 return -EFAULT;
3152 }
3153 /* Just copy the data */
3154 if (copyout(&(sc->areq.an_val), l_ioctl->data + 2,
3155 l_ioctl->len)) {
3156 return -EFAULT;
3157 }
3158 return 0;
3159 break;
3160 case AIROPWEPKEY:
3161 rid = AN_RID_WEP_TEMP;
3162 break;
3163 case AIROPWEPKEYNV:
3164 rid = AN_RID_WEP_PERM;
3165 break;
3166 case AIROPLEAPUSR:
3167 rid = AN_RID_LEAPUSERNAME;
3168 break;
3169 case AIROPLEAPPWD:
3170 rid = AN_RID_LEAPPASSWORD;
3171 break;
3172 default:
3173 return -EOPNOTSUPP;
3174 }
3175
3176 if (rid) {
3177 if (l_ioctl->len > sizeof(sc->areq.an_val) + 4)
3178 return -EINVAL;
3179 sc->areq.an_len = l_ioctl->len + 4; /* add type & length */
3180 sc->areq.an_type = rid;
3181
3182 /* Just copy the data back */
3183 copyin((l_ioctl->data) + 2, &sc->areq.an_val,
3184 l_ioctl->len);
3185
3186 an_cmd(sc, AN_CMD_DISABLE, 0);
3187 an_write_record(sc, (struct an_ltv_gen *)&sc->areq);
3188 an_cmd(sc, AN_CMD_ENABLE, 0);
3189 return 0;
3190 }
3191 return -EOPNOTSUPP;
3192}
3193
3194/*
3195 * General Flash utilities derived from Cisco driver additions to Ben Reed's
3196 * Linux driver
3197 */
3198
377d4740 3199#define FLASH_DELAY(x) tsleep(ifp, 0, "flash", ((x) / hz) + 1);
984263bc
MD
3200#define FLASH_COMMAND 0x7e7e
3201#define FLASH_SIZE 32 * 1024
3202
3203static int
c436375a 3204unstickbusy(struct ifnet *ifp)
984263bc
MD
3205{
3206 struct an_softc *sc = ifp->if_softc;
3207
3208 if (CSR_READ_2(sc, AN_COMMAND(sc->mpi350)) & AN_CMD_BUSY) {
3209 CSR_WRITE_2(sc, AN_EVENT_ACK(sc->mpi350),
3210 AN_EV_CLR_STUCK_BUSY);
3211 return 1;
3212 }
3213 return 0;
3214}
3215
3216/*
3217 * Wait for busy completion from card wait for delay uSec's Return true for
3218 * success meaning command reg is clear
3219 */
3220
3221static int
c436375a 3222WaitBusy(struct ifnet *ifp, int uSec)
984263bc
MD
3223{
3224 int statword = 0xffff;
3225 int delay = 0;
3226 struct an_softc *sc = ifp->if_softc;
3227
3228 while ((statword & AN_CMD_BUSY) && delay <= (1000 * 100)) {
3229 FLASH_DELAY(10);
3230 delay += 10;
3231 statword = CSR_READ_2(sc, AN_COMMAND(sc->mpi350));
3232
3233 if ((AN_CMD_BUSY & statword) && (delay % 200)) {
3234 unstickbusy(ifp);
3235 }
3236 }
3237
3238 return 0 == (AN_CMD_BUSY & statword);
3239}
3240
3241/*
3242 * STEP 1) Disable MAC and do soft reset on card.
3243 */
3244
3245static int
c436375a 3246cmdreset(struct ifnet *ifp)
984263bc
MD
3247{
3248 int status;
3249 struct an_softc *sc = ifp->if_softc;
3250
3251 an_stop(sc);
3252
3253 an_cmd(sc, AN_CMD_DISABLE, 0);
3254
3255 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
1c70eebf 3256 if_printf(ifp, "Waitbusy hang b4 RESET =%d\n", status);
984263bc
MD
3257 return -EBUSY;
3258 }
3259 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), AN_CMD_FW_RESTART);
3260
3261 FLASH_DELAY(1000); /* WAS 600 12/7/00 */
3262
3263
3264 if (!(status = WaitBusy(ifp, 100))) {
1c70eebf 3265 if_printf(ifp, "Waitbusy hang AFTER RESET =%d\n", status);
984263bc
MD
3266 return -EBUSY;
3267 }
3268 return 0;
3269}
3270
3271/*
3272 * STEP 2) Put the card in legendary flash mode
3273 */
3274
3275static int
c436375a 3276setflashmode(struct ifnet *ifp)
984263bc
MD
3277{
3278 int status;
3279 struct an_softc *sc = ifp->if_softc;
3280
3281 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3282 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), FLASH_COMMAND);
3283 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), FLASH_COMMAND);
3284 CSR_WRITE_2(sc, AN_COMMAND(sc->mpi350), FLASH_COMMAND);
3285
3286 /*
3287 * mdelay(500); // 500ms delay
3288 */
3289
3290 FLASH_DELAY(500);
3291
3292 if (!(status = WaitBusy(ifp, AN_TIMEOUT))) {
e3869ec7 3293 kprintf("Waitbusy hang after setflash mode\n");
984263bc
MD
3294 return -EIO;
3295 }
3296 return 0;
3297}
3298
3299/*
3300 * Get a character from the card matching matchbyte Step 3)
3301 */
3302
3303static int
c436375a 3304flashgchar(struct ifnet *ifp, int matchbyte, int dwelltime)
984263bc
MD
3305{
3306 int rchar;
3307 unsigned char rbyte = 0;
3308 int success = -1;
3309 struct an_softc *sc = ifp->if_softc;
3310
3311
3312 do {
3313 rchar = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3314
3315 if (dwelltime && !(0x8000 & rchar)) {
3316 dwelltime -= 10;
3317 FLASH_DELAY(10);
3318 continue;
3319 }
3320 rbyte = 0xff & rchar;
3321
3322 if ((rbyte == matchbyte) && (0x8000 & rchar)) {
3323 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3324 success = 1;
3325 break;
3326 }
3327 if (rbyte == 0x81 || rbyte == 0x82 || rbyte == 0x83 || rbyte == 0x1a || 0xffff == rchar)
3328 break;
3329 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3330
3331 } while (dwelltime > 0);
3332 return success;
3333}
3334
3335/*
3336 * Put character to SWS0 wait for dwelltime x 50us for echo .
3337 */
3338
3339static int
c436375a 3340flashpchar(struct ifnet *ifp, int byte, int dwelltime)
984263bc
MD
3341{
3342 int echo;
3343 int pollbusy, waittime;
3344 struct an_softc *sc = ifp->if_softc;
3345
3346 byte |= 0x8000;
3347
3348 if (dwelltime == 0)
3349 dwelltime = 200;
3350
3351 waittime = dwelltime;
3352
3353 /*
3354 * Wait for busy bit d15 to go false indicating buffer empty
3355 */
3356 do {
3357 pollbusy = CSR_READ_2(sc, AN_SW0(sc->mpi350));
3358
3359 if (pollbusy & 0x8000) {
3360 FLASH_DELAY(50);
3361 waittime -= 50;
3362 continue;
3363 } else
3364 break;
3365 }
3366 while (waittime >= 0);
3367
3368 /* timeout for busy clear wait */
3369
3370 if (waittime <= 0) {
1c70eebf 3371 if_printf(ifp, "flash putchar busywait timeout!\n");
984263bc
MD
3372 return -1;
3373 }
3374 /*
3375 * Port is clear now write byte and wait for it to echo back
3376 */
3377 do {
3378 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), byte);
3379 FLASH_DELAY(50);
3380 dwelltime -= 50;
3381 echo = CSR_READ_2(sc, AN_SW1(sc->mpi350));
3382 } while (dwelltime >= 0 && echo != byte);
3383
3384
3385 CSR_WRITE_2(sc, AN_SW1(sc->mpi350), 0);
3386
3387 return echo == byte;
3388}
3389
3390/*
3391 * Transfer 32k of firmware data from user buffer to our buffer and send to
3392 * the card
3393 */
3394
3395static int
c436375a 3396flashputbuf(struct ifnet *ifp)
984263bc
MD
3397{
3398 unsigned short *bufp;
3399 int nwords;
3400 struct an_softc *sc = ifp->if_softc;
3401
3402 /* Write stuff */
3403
3404 bufp = sc->an_flash_buffer;
3405
3406 if (!sc->mpi350) {
3407 CSR_WRITE_2(sc, AN_AUX_PAGE, 0x100);
3408 CSR_WRITE_2(sc, AN_AUX_OFFSET, 0);
3409
3410 for (nwords = 0; nwords != FLASH_SIZE / 2; nwords++) {
3411 CSR_WRITE_2(sc, AN_AUX_DATA, bufp[nwords] & 0xffff);
3412 }
3413 } else {
3414 for (nwords = 0; nwords != FLASH_SIZE / 4; nwords++) {
3415 CSR_MEM_AUX_WRITE_4(sc, 0x8000,
3416 ((u_int32_t *)bufp)[nwords] & 0xffff);
3417 }
3418 }
3419
3420 CSR_WRITE_2(sc, AN_SW0(sc->mpi350), 0x8000);
3421
3422 return 0;
3423}
3424
3425/*
3426 * After flashing restart the card.
3427 */
3428
3429static int
c436375a 3430flashrestart(struct ifnet *ifp)
984263bc
MD
3431{
3432 int status = 0;
3433 struct an_softc *sc = ifp->if_softc;
3434
3435 FLASH_DELAY(1024); /* Added 12/7/00 */
3436
3437 an_init(sc);
3438
3439 FLASH_DELAY(1024); /* Added 12/7/00 */
3440 return status;
3441}
3442
3443/*
3444 * Entry point for flash ioclt.
3445 */
3446
3447static int
c436375a 3448flashcard(struct ifnet *ifp, struct aironet_ioctl *l_ioctl)
984263bc
MD
3449{
3450 int z = 0, status;
3451 struct an_softc *sc;
3452
3453 sc = ifp->if_softc;
3454 if (sc->mpi350) {
1c70eebf 3455 if_printf(ifp, "flashing not supported on MPI 350 yet\n");
984263bc
MD
3456 return(-1);
3457 }
3458 status = l_ioctl->command;
3459
3460 switch (l_ioctl->command) {
3461 case AIROFLSHRST:
3462 return cmdreset(ifp);
3463 break;
3464 case AIROFLSHSTFL:
3465 if (sc->an_flash_buffer) {
efda3bd0 3466 kfree(sc->an_flash_buffer, M_DEVBUF);
984263bc
MD
3467 sc->an_flash_buffer = NULL;
3468 }
efda3bd0 3469 sc->an_flash_buffer = kmalloc(FLASH_SIZE, M_DEVBUF, 0);
984263bc
MD
3470 if (sc->an_flash_buffer)
3471 return setflashmode(ifp);
3472 else
3473 return ENOBUFS;
3474 break;
3475 case AIROFLSHGCHR: /* Get char from aux */
3476 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3477 z = *(int *)&sc->areq;
3478 if ((status = flashgchar(ifp, z, 8000)) == 1)
3479 return 0;
3480 else
3481 return -1;
3482 break;
3483 case AIROFLSHPCHR: /* Send char to card. */
3484 copyin(l_ioctl->data, &sc->areq, l_ioctl->len);
3485 z = *(int *)&sc->areq;
3486 if ((status = flashpchar(ifp, z, 8000)) == -1)
3487 return -EIO;
3488 else
3489 return 0;
3490 break;
3491 case AIROFLPUTBUF: /* Send 32k to card */
3492 if (l_ioctl->len > FLASH_SIZE) {
1c70eebf
JS
3493 if_printf(ifp, "Buffer to big, %x %x\n",
3494 l_ioctl->len, FLASH_SIZE);
984263bc
MD
3495 return -EINVAL;
3496 }
3497 copyin(l_ioctl->data, sc->an_flash_buffer, l_ioctl->len);
3498
3499 if ((status = flashputbuf(ifp)) != 0)
3500 return -EIO;
3501 else
3502 return 0;
3503 break;
3504 case AIRORESTART:
3505 if ((status = flashrestart(ifp)) != 0) {
1c70eebf 3506 if_printf(ifp, "FLASHRESTART returned %d\n", status);
984263bc
MD
3507 return -EIO;
3508 } else
3509 return 0;
3510
3511 break;
3512 default:
3513 return -EINVAL;
3514 }
3515
3516 return -EINVAL;
3517}