[dragonfly.git] / sys / dev / misc / ppi / ppi.c

/*-
 * Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD: src/sys/dev/ppbus/ppi.c,v 1.21.2.3 2000/08/07 18:24:43 peter Exp $
 * $DragonFly: src/sys/dev/misc/ppi/ppi.c,v 1.15 2006/12/22 23:26:18 swildner Exp $
 *
 */
#include "opt_ppb_1284.h"

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/device.h>
#include <sys/kernel.h>
#include <sys/uio.h>
#include <sys/fcntl.h>
#include <sys/rman.h>

#include <machine/clock.h>

#include <bus/ppbus/ppbconf.h>
#include <bus/ppbus/ppb_msq.h>

#ifdef PERIPH_1284
#include <bus/ppbus/ppb_1284.h>
#endif

#include "ppi.h"

#include "ppbus_if.h"

#include <bus/ppbus/ppbio.h>

#define BUFSIZE		512

struct ppi_data {

    int		ppi_unit;
    int		ppi_flags;
#define HAVE_PPBUS	(1<<0)
#define HAD_PPBUS	(1<<1)

    int		ppi_count;
    int		ppi_mode;			/* IEEE1284 mode */
    char	ppi_buffer[BUFSIZE];

#ifdef PERIPH_1284
    struct resource *intr_resource;	/* interrupt resource */
    void *intr_cookie;			/* interrupt registration cookie */
#endif /* PERIPH_1284 */
};

#define DEVTOSOFTC(dev) \
	((struct ppi_data *)device_get_softc(dev))
#define UNITOSOFTC(unit) \
	((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit)))
#define UNITODEVICE(unit) \
	(devclass_get_device(ppi_devclass, (unit)))

static devclass_t ppi_devclass;

static	d_open_t	ppiopen;
static	d_close_t	ppiclose;
static	d_ioctl_t	ppiioctl;
static	d_write_t	ppiwrite;
static	d_read_t	ppiread;

#define CDEV_MAJOR 82
static struct dev_ops ppi_ops = {
	{ "ppi", CDEV_MAJOR, 0 },
	.d_open =	ppiopen,
	.d_close =	ppiclose,
	.d_read =	ppiread,
	.d_write =	ppiwrite,
	.d_ioctl =	ppiioctl,
};

#ifdef PERIPH_1284

static void
ppi_enable_intr(device_t ppidev)
{
	char r;
	device_t ppbus = device_get_parent(ppidev);

	r = ppb_rctr(ppbus);
	ppb_wctr(ppbus, r | IRQENABLE);

	return;
}

static void
ppi_disable_intr(device_t ppidev)
{
	char r;
        device_t ppbus = device_get_parent(ppidev);

	r = ppb_rctr(ppbus);
	ppb_wctr(ppbus, r & ~IRQENABLE);

	return;
}

#endif /* PERIPH_1284 */

/*
 * ppi_probe()
 */
static int
ppi_probe(device_t dev)
{
	struct ppi_data *ppi;

	/* probe is always ok */
	device_set_desc(dev, "Parallel I/O");

	ppi = DEVTOSOFTC(dev);
	bzero(ppi, sizeof(struct ppi_data));

	return (0);
}

/*
 * ppi_attach()
 */
static int
ppi_attach(device_t dev)
{
#ifdef PERIPH_1284
	uintptr_t irq;
	int zero = 0;
	struct ppi_data *ppi = DEVTOSOFTC(dev);

	/* retrive the irq */
	BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq);

	/* declare our interrupt handler */
	ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ,
						&zero, irq, irq, 1, RF_ACTIVE);
#endif /* PERIPH_1284 */

	make_dev(&ppi_ops, device_get_unit(dev),	/* XXX cleanup */
		 UID_ROOT, GID_WHEEL,
		 0600, "ppi%d", device_get_unit(dev));

	return (0);
}

#ifdef PERIPH_1284
/*
 * Cable
 * -----
 *
 * Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
 *
 * nStrobe   <-> nAck		1  <-> 10
 * nAutofd   <-> Busy		11 <-> 14
 * nSelectin <-> Select		17 <-> 13
 * nInit     <-> nFault		15 <-> 16
 *
 */
static void
ppiintr(void *arg)
{
	device_t ppidev = (device_t)arg;
        device_t ppbus = device_get_parent(ppidev);
	struct ppi_data *ppi = DEVTOSOFTC(ppidev);

	ppi_disable_intr(ppidev);

	switch (ppb_1284_get_state(ppbus)) {

	/* accept IEEE1284 negociation then wakeup an waiting process to
	 * continue negociation at process level */
	case PPB_FORWARD_IDLE:
		/* Event 1 */
		if ((ppb_rstr(ppbus) & (SELECT | nBUSY)) ==
							(SELECT | nBUSY)) {
			/* IEEE1284 negociation */
#ifdef DEBUG_1284
			kprintf("N");
#endif

			/* Event 2 - prepare for reading the ext. value */
			ppb_wctr(ppbus, (PCD | STROBE | nINIT) & ~SELECTIN);

			ppb_1284_set_state(ppbus, PPB_NEGOCIATION);

		} else {
#ifdef DEBUG_1284
			kprintf("0x%x", ppb_rstr(ppbus));
#endif
			ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
			break;
		}

		/* wake up any process waiting for negociation from
		 * remote master host */

		/* XXX should set a variable to warn the process about
		 * the interrupt */

		wakeup(ppi);
		break;
	default:
#ifdef DEBUG_1284
		kprintf("?%d", ppb_1284_get_state(ppbus));
#endif
		ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
		ppb_set_mode(ppbus, PPB_COMPATIBLE);
		break;
	}

	ppi_enable_intr(ppidev);

	return;
}
#endif /* PERIPH_1284 */

static int
ppiopen(struct dev_open_args *ap)
{
	cdev_t dev = ap->a_head.a_dev;
	u_int unit = minor(dev);
	struct ppi_data *ppi = UNITOSOFTC(unit);
	device_t ppidev = UNITODEVICE(unit);
        device_t ppbus = device_get_parent(ppidev);
	int res;

	if (!ppi)
		return (ENXIO);

	if (!(ppi->ppi_flags & HAVE_PPBUS)) {
		if ((res = ppb_request_bus(ppbus, ppidev,
			(ap->a_oflags & O_NONBLOCK) ? PPB_DONTWAIT :
						(PPB_WAIT | PPB_INTR))))
			return (res);

		ppi->ppi_flags |= HAVE_PPBUS;

#ifdef PERIPH_1284
		if (ppi->intr_resource) {
			/* register our interrupt handler */
			BUS_SETUP_INTR(device_get_parent(ppidev), ppidev,
				       ppi->intr_resource, 0,
				       ppiintr, dev, 
				       &ppi->intr_cookie, NULL);
		}
#endif /* PERIPH_1284 */
	}
	ppi->ppi_count += 1;

	return (0);
}

static int
ppiclose(struct dev_close_args *ap)
{
	cdev_t dev = ap->a_head.a_dev;
	u_int unit = minor(dev);
	struct ppi_data *ppi = UNITOSOFTC(unit);
	device_t ppidev = UNITODEVICE(unit);
        device_t ppbus = device_get_parent(ppidev);

	ppi->ppi_count --;
	if (!ppi->ppi_count) {

#ifdef PERIPH_1284
		switch (ppb_1284_get_state(ppbus)) {
		case PPB_PERIPHERAL_IDLE:
			ppb_peripheral_terminate(ppbus, 0);
			break;
		case PPB_REVERSE_IDLE:
		case PPB_EPP_IDLE:
		case PPB_ECP_FORWARD_IDLE:
		default:
			ppb_1284_terminate(ppbus);
			break;
		}
#endif /* PERIPH_1284 */

		/* unregistration of interrupt forced by release */
		ppb_release_bus(ppbus, ppidev);

		ppi->ppi_flags &= ~HAVE_PPBUS;
	}

	return (0);
}

/*
 * ppiread()
 *
 * IEEE1284 compliant read.
 *
 * First, try negociation to BYTE then NIBBLE mode
 * If no data is available, wait for it otherwise transfer as much as possible
 */
static int
ppiread(struct dev_read_args *ap)
{
#ifdef PERIPH_1284
	cdev_t dev = ap->a_head.a_dev;
	struct uio *uio = ap->a_uio;
	u_int unit = minor(dev);
	struct ppi_data *ppi = UNITOSOFTC(unit);
	device_t ppidev = UNITODEVICE(unit);
        device_t ppbus = device_get_parent(ppidev);
	int len, error = 0;

	switch (ppb_1284_get_state(ppbus)) {
	case PPB_PERIPHERAL_IDLE:
		ppb_peripheral_terminate(ppbus, 0);
		/* fall throught */

	case PPB_FORWARD_IDLE:
		/* if can't negociate NIBBLE mode then try BYTE mode,
		 * the peripheral may be a computer
		 */
		if ((ppb_1284_negociate(ppbus,
			ppi->ppi_mode = PPB_NIBBLE, 0))) {

			/* XXX Wait 2 seconds to let the remote host some
			 * time to terminate its interrupt
			 */
			tsleep(ppi, 0, "ppiread", 2*hz);
			
			if ((error = ppb_1284_negociate(ppbus,
				ppi->ppi_mode = PPB_BYTE, 0)))
				return (error);
		}
		break;

	case PPB_REVERSE_IDLE:
	case PPB_EPP_IDLE:
	case PPB_ECP_FORWARD_IDLE:
	default:
		break;
	}

#ifdef DEBUG_1284
	kprintf("N");
#endif
	/* read data */
	len = 0;
	while (uio->uio_resid) {
		error = ppb_1284_read(ppbus, ppi->ppi_mode, ppi->ppi_buffer,
				     (int)szmin(BUFSIZE, uio->uio_resid),
				     &len);
		if (error)
			goto error;

		if (!len)
			goto error;		/* no more data */

#ifdef DEBUG_1284
		kprintf("d");
#endif
		if ((error = uiomove(ppi->ppi_buffer, (size_t)len, uio)))
			goto error;
	}

error:

#else /* PERIPH_1284 */
	int error = ENODEV;
#endif

	return (error);
}

/*
 * ppiwrite()
 *
 * IEEE1284 compliant write
 *
 * Actually, this is the peripheral side of a remote IEEE1284 read
 *
 * The first part of the negociation (IEEE1284 device detection) is
 * done at interrupt level, then the remaining is done by the writing
 * process
 *
 * Once negociation done, transfer data
 */
static int
ppiwrite(struct dev_write_args *ap)
{
#ifdef PERIPH_1284
	cdev_t dev = ap->a_head.a_dev;
	struct uio *uio = ap->a_uio;
	u_int unit = minor(dev);
	struct ppi_data *ppi = UNITOSOFTC(unit);
	device_t ppidev = UNITODEVICE(unit);
        device_t ppbus = device_get_parent(ppidev);
	int len, error = 0, sent;

#if 0
	int ret;

	#define ADDRESS		MS_PARAM(0, 0, MS_TYP_PTR)
	#define LENGTH		MS_PARAM(0, 1, MS_TYP_INT)

	struct ppb_microseq msq[] = {
		  { MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
		  MS_RET(0)
	};

	/* negociate ECP mode */
	if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
		kprintf("ppiwrite: ECP negociation failed\n");
	}

	while (!error && (len = (int)szmin(uio->uio_resid, BUFSIZE))) {
		uiomove(ppi->ppi_buffer, (size_t)len, uio);

		ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);

		error = ppb_MS_microseq(ppbus, msq, &ret);
	}
#endif

	/* we have to be peripheral to be able to send data, so
	 * wait for the appropriate state
	 */
 	if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
		ppb_1284_terminate(ppbus);

 	while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
		/* XXX should check a variable before sleeping */
#ifdef DEBUG_1284
		kprintf("s");
#endif

		ppi_enable_intr(ppidev);

		/* sleep until IEEE1284 negociation starts */
		error = tsleep(ppi, PCATCH, "ppiwrite", 0);

		switch (error) {
		case 0:
			/* negociate peripheral side with BYTE mode */
			ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
			break;
		case EWOULDBLOCK:
			break;
		default:
			goto error;
		}
	}
#ifdef DEBUG_1284
	kprintf("N");
#endif

	/* negociation done, write bytes to master host */
	while ((len = (int)szmin(uio->uio_resid, BUFSIZE)) != 0) {
		uiomove(ppi->ppi_buffer, (size_t)len, uio);
		if ((error = byte_peripheral_write(ppbus,
						ppi->ppi_buffer, len, &sent)))
			goto error;
#ifdef DEBUG_1284
		kprintf("d");
#endif
	}

error:

#else /* PERIPH_1284 */
	int error = ENODEV;
#endif

	return (error);
}

static int
ppiioctl(struct dev_ioctl_args *ap)
{
	cdev_t dev = ap->a_head.a_dev;
	u_int unit = minor(dev);
	device_t ppidev = UNITODEVICE(unit);
        device_t ppbus = device_get_parent(ppidev);
	int error = 0;
	u_int8_t *val = (u_int8_t *)ap->a_data;

	switch (ap->a_cmd) {
	case PPIGDATA:			/* get data register */
		*val = ppb_rdtr(ppbus);
		break;
	case PPIGSTATUS:		/* get status bits */
		*val = ppb_rstr(ppbus);
		break;
	case PPIGCTRL:			/* get control bits */
		*val = ppb_rctr(ppbus);
		break;
	case PPIGEPPD:			/* get EPP data bits */
		*val = ppb_repp_D(ppbus);
		break;
	case PPIGECR:			/* get ECP bits */
		*val = ppb_recr(ppbus);
		break;
	case PPIGFIFO:			/* read FIFO */
		*val = ppb_rfifo(ppbus);
		break;
	case PPISDATA:			/* set data register */
		ppb_wdtr(ppbus, *val);
		break;
	case PPISSTATUS:		/* set status bits */
		ppb_wstr(ppbus, *val);
		break;
	case PPISCTRL:			/* set control bits */
		ppb_wctr(ppbus, *val);
		break;
	case PPISEPPD:			/* set EPP data bits */
		ppb_wepp_D(ppbus, *val);
		break;
	case PPISECR:			/* set ECP bits */
		ppb_wecr(ppbus, *val);
		break;
	case PPISFIFO:			/* write FIFO */
		ppb_wfifo(ppbus, *val);
		break;
	case PPIGEPPA:			/* get EPP address bits */
		*val = ppb_repp_A(ppbus);
		break;
	case PPISEPPA:			/* set EPP address bits */
		ppb_wepp_A(ppbus, *val);
		break;
	default:
		error = ENOTTY;
		break;
	}
    
	return (error);
}

/*
 * Because ppi is a static device under any attached ppbuf, and not
 * scanned by the ppbuf, we need an identify function to create the
 * device.
 */
static device_method_t ppi_methods[] = {
	/* device interface */
	DEVMETHOD(device_identify,	bus_generic_identify),
	DEVMETHOD(device_probe,		ppi_probe),
	DEVMETHOD(device_attach,	ppi_attach),

	{ 0, 0 }
};

static driver_t ppi_driver = {
	"ppi",
	ppi_methods,
	sizeof(struct ppi_data),
};
DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);
Commit	Line	Data
984263bc MD	1	/*-
	2	* Copyright (c) 1997, 1998, 1999 Nicolas Souchu, Michael Smith
	3	* All rights reserved.
	4	*
	5	* Redistribution and use in source and binary forms, with or without
	6	* modification, are permitted provided that the following conditions
	7	* are met:
	8	* 1. Redistributions of source code must retain the above copyright
	9	* notice, this list of conditions and the following disclaimer.
	10	* 2. Redistributions in binary form must reproduce the above copyright
	11	* notice, this list of conditions and the following disclaimer in the
	12	* documentation and/or other materials provided with the distribution.
	13	*
	14	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
	15	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	16	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	17	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
	18	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	19	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
	20	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
	21	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
	22	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
	23	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
	24	* SUCH DAMAGE.
	25	*
	26	* $FreeBSD: src/sys/dev/ppbus/ppi.c,v 1.21.2.3 2000/08/07 18:24:43 peter Exp $
e3869ec7	27	* $DragonFly: src/sys/dev/misc/ppi/ppi.c,v 1.15 2006/12/22 23:26:18 swildner Exp $
984263bc MD	28	*
	29	*/
	30	#include "opt_ppb_1284.h"
	31
	32	#include <sys/param.h>
	33	#include <sys/systm.h>
	34	#include <sys/module.h>
	35	#include <sys/bus.h>
	36	#include <sys/conf.h>
fef8985e	37	#include <sys/device.h>
984263bc MD	38	#include <sys/kernel.h>
	39	#include <sys/uio.h>
	40	#include <sys/fcntl.h>
1f7ab7c9	41	#include <sys/rman.h>
984263bc MD	42
984263bc MD	43	#include <machine/clock.h>
984263bc	44
1f2de5d4 MD	45	#include <bus/ppbus/ppbconf.h>
1f2de5d4 MD	46	#include <bus/ppbus/ppb_msq.h>
984263bc MD	47
984263bc MD	48	#ifdef PERIPH_1284
1f2de5d4	49	#include <bus/ppbus/ppb_1284.h>
984263bc MD	50	#endif
984263bc MD	51
1f2de5d4	52	#include "ppi.h"
984263bc MD	53
	54	#include "ppbus_if.h"
	55
1f2de5d4	56	#include <bus/ppbus/ppbio.h>
984263bc MD	57
	58	#define BUFSIZE 512
	59
	60	struct ppi_data {
	61
	62	int ppi_unit;
	63	int ppi_flags;
	64	#define HAVE_PPBUS (1<<0)
	65	#define HAD_PPBUS (1<<1)
	66
	67	int ppi_count;
	68	int ppi_mode; /* IEEE1284 mode */
	69	char ppi_buffer[BUFSIZE];
	70
	71	#ifdef PERIPH_1284
	72	struct resource intr_resource; / interrupt resource */
	73	void intr_cookie; / interrupt registration cookie */
	74	#endif /* PERIPH_1284 */
	75	};
	76
	77	#define DEVTOSOFTC(dev) \
	78	((struct ppi_data *)device_get_softc(dev))
	79	#define UNITOSOFTC(unit) \
	80	((struct ppi_data *)devclass_get_softc(ppi_devclass, (unit)))
	81	#define UNITODEVICE(unit) \
	82	(devclass_get_device(ppi_devclass, (unit)))
	83
	84	static devclass_t ppi_devclass;
	85
	86	static d_open_t ppiopen;
	87	static d_close_t ppiclose;
	88	static d_ioctl_t ppiioctl;
	89	static d_write_t ppiwrite;
	90	static d_read_t ppiread;
	91
	92	#define CDEV_MAJOR 82
fef8985e MD	93	static struct dev_ops ppi_ops = {
	94	{ "ppi", CDEV_MAJOR, 0 },
	95	.d_open = ppiopen,
	96	.d_close = ppiclose,
	97	.d_read = ppiread,
	98	.d_write = ppiwrite,
	99	.d_ioctl = ppiioctl,
984263bc MD	100	};
	101
	102	#ifdef PERIPH_1284
	103
	104	static void
	105	ppi_enable_intr(device_t ppidev)
	106	{
	107	char r;
	108	device_t ppbus = device_get_parent(ppidev);
	109
	110	r = ppb_rctr(ppbus);
	111	ppb_wctr(ppbus, r \| IRQENABLE);
	112
	113	return;
	114	}
	115
	116	static void
	117	ppi_disable_intr(device_t ppidev)
	118	{
	119	char r;
	120	device_t ppbus = device_get_parent(ppidev);
	121
	122	r = ppb_rctr(ppbus);
	123	ppb_wctr(ppbus, r & ~IRQENABLE);
	124
	125	return;
	126	}
	127
	128	#endif /* PERIPH_1284 */
	129
984263bc MD	130	/*
	131	* ppi_probe()
	132	*/
	133	static int
	134	ppi_probe(device_t dev)
	135	{
	136	struct ppi_data *ppi;
	137
	138	/* probe is always ok */
	139	device_set_desc(dev, "Parallel I/O");
	140
	141	ppi = DEVTOSOFTC(dev);
	142	bzero(ppi, sizeof(struct ppi_data));
	143
	144	return (0);
	145	}
	146
	147	/*
	148	* ppi_attach()
	149	*/
	150	static int
	151	ppi_attach(device_t dev)
	152	{
	153	#ifdef PERIPH_1284
	154	uintptr_t irq;
	155	int zero = 0;
	156	struct ppi_data *ppi = DEVTOSOFTC(dev);
	157
	158	/* retrive the irq */
	159	BUS_READ_IVAR(device_get_parent(dev), dev, PPBUS_IVAR_IRQ, &irq);
	160
	161	/* declare our interrupt handler */
	162	ppi->intr_resource = bus_alloc_resource(dev, SYS_RES_IRQ,
	163	&zero, irq, irq, 1, RF_ACTIVE);
	164	#endif /* PERIPH_1284 */
	165
fef8985e	166	make_dev(&ppi_ops, device_get_unit(dev), /* XXX cleanup */
984263bc MD	167	UID_ROOT, GID_WHEEL,
	168	0600, "ppi%d", device_get_unit(dev));
	169
	170	return (0);
	171	}
	172
	173	#ifdef PERIPH_1284
	174	/*
	175	* Cable
	176	* -----
	177	*
	178	* Use an IEEE1284 compliant (DB25/DB25) cable with the following tricks:
	179	*
	180	* nStrobe <-> nAck 1 <-> 10
	181	* nAutofd <-> Busy 11 <-> 14
	182	* nSelectin <-> Select 17 <-> 13
	183	* nInit <-> nFault 15 <-> 16
	184	*
	185	*/
	186	static void
	187	ppiintr(void *arg)
	188	{
	189	device_t ppidev = (device_t)arg;
	190	device_t ppbus = device_get_parent(ppidev);
	191	struct ppi_data *ppi = DEVTOSOFTC(ppidev);
	192
	193	ppi_disable_intr(ppidev);
	194
	195	switch (ppb_1284_get_state(ppbus)) {
	196
	197	/* accept IEEE1284 negociation then wakeup an waiting process to
	198	* continue negociation at process level */
	199	case PPB_FORWARD_IDLE:
	200	/* Event 1 */
	201	if ((ppb_rstr(ppbus) & (SELECT \| nBUSY)) ==
	202	(SELECT \| nBUSY)) {
	203	/* IEEE1284 negociation */
	204	#ifdef DEBUG_1284
e3869ec7	205	kprintf("N");
984263bc MD	206	#endif
	207
	208	/* Event 2 - prepare for reading the ext. value */
	209	ppb_wctr(ppbus, (PCD \| STROBE \| nINIT) & ~SELECTIN);
	210
	211	ppb_1284_set_state(ppbus, PPB_NEGOCIATION);
	212
	213	} else {
	214	#ifdef DEBUG_1284
e3869ec7	215	kprintf("0x%x", ppb_rstr(ppbus));
984263bc MD	216	#endif
	217	ppb_peripheral_terminate(ppbus, PPB_DONTWAIT);
	218	break;
	219	}
	220
	221	/* wake up any process waiting for negociation from
	222	* remote master host */
	223
	224	/* XXX should set a variable to warn the process about
	225	* the interrupt */
	226
	227	wakeup(ppi);
	228	break;
	229	default:
	230	#ifdef DEBUG_1284
e3869ec7	231	kprintf("?%d", ppb_1284_get_state(ppbus));
984263bc MD	232	#endif
	233	ppb_1284_set_state(ppbus, PPB_FORWARD_IDLE);
	234	ppb_set_mode(ppbus, PPB_COMPATIBLE);
	235	break;
	236	}
	237
	238	ppi_enable_intr(ppidev);
	239
	240	return;
	241	}
	242	#endif /* PERIPH_1284 */
	243
	244	static int
fef8985e	245	ppiopen(struct dev_open_args *ap)
984263bc	246	{
b13267a5	247	cdev_t dev = ap->a_head.a_dev;
984263bc MD	248	u_int unit = minor(dev);
	249	struct ppi_data *ppi = UNITOSOFTC(unit);
	250	device_t ppidev = UNITODEVICE(unit);
	251	device_t ppbus = device_get_parent(ppidev);
	252	int res;
	253
	254	if (!ppi)
	255	return (ENXIO);
	256
	257	if (!(ppi->ppi_flags & HAVE_PPBUS)) {
	258	if ((res = ppb_request_bus(ppbus, ppidev,
fef8985e	259	(ap->a_oflags & O_NONBLOCK) ? PPB_DONTWAIT :
984263bc MD	260	(PPB_WAIT \| PPB_INTR))))
	261	return (res);
	262
	263	ppi->ppi_flags \|= HAVE_PPBUS;
	264
	265	#ifdef PERIPH_1284
	266	if (ppi->intr_resource) {
	267	/* register our interrupt handler */
e9cb6d99	268	BUS_SETUP_INTR(device_get_parent(ppidev), ppidev,
ee61f228	269	ppi->intr_resource, 0,
e9cb6d99 MD	270	ppiintr, dev,
e9cb6d99 MD	271	&ppi->intr_cookie, NULL);
984263bc MD	272	}
	273	#endif /* PERIPH_1284 */
	274	}
	275	ppi->ppi_count += 1;
	276
	277	return (0);
	278	}
	279
	280	static int
fef8985e	281	ppiclose(struct dev_close_args *ap)
984263bc	282	{
b13267a5	283	cdev_t dev = ap->a_head.a_dev;
984263bc MD	284	u_int unit = minor(dev);
	285	struct ppi_data *ppi = UNITOSOFTC(unit);
	286	device_t ppidev = UNITODEVICE(unit);
	287	device_t ppbus = device_get_parent(ppidev);
	288
	289	ppi->ppi_count --;
	290	if (!ppi->ppi_count) {
	291
	292	#ifdef PERIPH_1284
	293	switch (ppb_1284_get_state(ppbus)) {
	294	case PPB_PERIPHERAL_IDLE:
	295	ppb_peripheral_terminate(ppbus, 0);
	296	break;
	297	case PPB_REVERSE_IDLE:
	298	case PPB_EPP_IDLE:
	299	case PPB_ECP_FORWARD_IDLE:
	300	default:
	301	ppb_1284_terminate(ppbus);
	302	break;
	303	}
	304	#endif /* PERIPH_1284 */
	305
	306	/* unregistration of interrupt forced by release */
	307	ppb_release_bus(ppbus, ppidev);
	308
	309	ppi->ppi_flags &= ~HAVE_PPBUS;
	310	}
	311
	312	return (0);
	313	}
	314
	315	/*
	316	* ppiread()
	317	*
	318	* IEEE1284 compliant read.
	319	*
	320	* First, try negociation to BYTE then NIBBLE mode
	321	* If no data is available, wait for it otherwise transfer as much as possible
	322	*/
	323	static int
fef8985e	324	ppiread(struct dev_read_args *ap)
984263bc MD	325	{
984263bc MD	326	#ifdef PERIPH_1284
b13267a5	327	cdev_t dev = ap->a_head.a_dev;
fef8985e	328	struct uio *uio = ap->a_uio;
984263bc MD	329	u_int unit = minor(dev);
	330	struct ppi_data *ppi = UNITOSOFTC(unit);
	331	device_t ppidev = UNITODEVICE(unit);
	332	device_t ppbus = device_get_parent(ppidev);
	333	int len, error = 0;
	334
	335	switch (ppb_1284_get_state(ppbus)) {
	336	case PPB_PERIPHERAL_IDLE:
	337	ppb_peripheral_terminate(ppbus, 0);
	338	/* fall throught */
	339
	340	case PPB_FORWARD_IDLE:
	341	/* if can't negociate NIBBLE mode then try BYTE mode,
	342	* the peripheral may be a computer
	343	*/
	344	if ((ppb_1284_negociate(ppbus,
	345	ppi->ppi_mode = PPB_NIBBLE, 0))) {
	346
	347	/* XXX Wait 2 seconds to let the remote host some
	348	* time to terminate its interrupt
	349	*/
377d4740	350	tsleep(ppi, 0, "ppiread", 2*hz);
984263bc MD	351
	352	if ((error = ppb_1284_negociate(ppbus,
	353	ppi->ppi_mode = PPB_BYTE, 0)))
	354	return (error);
	355	}
	356	break;
	357
	358	case PPB_REVERSE_IDLE:
	359	case PPB_EPP_IDLE:
	360	case PPB_ECP_FORWARD_IDLE:
	361	default:
	362	break;
	363	}
	364
	365	#ifdef DEBUG_1284
e3869ec7	366	kprintf("N");
984263bc MD	367	#endif
	368	/* read data */
	369	len = 0;
	370	while (uio->uio_resid) {
e54488bb MD	371	error = ppb_1284_read(ppbus, ppi->ppi_mode, ppi->ppi_buffer,
	372	(int)szmin(BUFSIZE, uio->uio_resid),
	373	&len);
	374	if (error)
984263bc	375	goto error;
984263bc MD	376
	377	if (!len)
	378	goto error; /* no more data */
	379
	380	#ifdef DEBUG_1284
e3869ec7	381	kprintf("d");
984263bc	382	#endif
e54488bb	383	if ((error = uiomove(ppi->ppi_buffer, (size_t)len, uio)))
984263bc MD	384	goto error;
	385	}
	386
	387	error:
	388
	389	#else /* PERIPH_1284 */
	390	int error = ENODEV;
	391	#endif
	392
	393	return (error);
	394	}
	395
	396	/*
	397	* ppiwrite()
	398	*
	399	* IEEE1284 compliant write
	400	*
	401	* Actually, this is the peripheral side of a remote IEEE1284 read
	402	*
	403	* The first part of the negociation (IEEE1284 device detection) is
	404	* done at interrupt level, then the remaining is done by the writing
	405	* process
	406	*
	407	* Once negociation done, transfer data
	408	*/
	409	static int
fef8985e	410	ppiwrite(struct dev_write_args *ap)
984263bc MD	411	{
984263bc MD	412	#ifdef PERIPH_1284
b13267a5	413	cdev_t dev = ap->a_head.a_dev;
fef8985e	414	struct uio *uio = ap->a_uio;
984263bc MD	415	u_int unit = minor(dev);
	416	struct ppi_data *ppi = UNITOSOFTC(unit);
	417	device_t ppidev = UNITODEVICE(unit);
	418	device_t ppbus = device_get_parent(ppidev);
	419	int len, error = 0, sent;
	420
	421	#if 0
	422	int ret;
	423
	424	#define ADDRESS MS_PARAM(0, 0, MS_TYP_PTR)
	425	#define LENGTH MS_PARAM(0, 1, MS_TYP_INT)
	426
	427	struct ppb_microseq msq[] = {
	428	{ MS_OP_PUT, { MS_UNKNOWN, MS_UNKNOWN, MS_UNKNOWN } },
	429	MS_RET(0)
	430	};
	431
	432	/* negociate ECP mode */
	433	if (ppb_1284_negociate(ppbus, PPB_ECP, 0)) {
e3869ec7	434	kprintf("ppiwrite: ECP negociation failed\n");
984263bc MD	435	}
984263bc MD	436
e54488bb MD	437	while (!error && (len = (int)szmin(uio->uio_resid, BUFSIZE))) {
e54488bb MD	438	uiomove(ppi->ppi_buffer, (size_t)len, uio);
984263bc MD	439
	440	ppb_MS_init_msq(msq, 2, ADDRESS, ppi->ppi_buffer, LENGTH, len);
	441
	442	error = ppb_MS_microseq(ppbus, msq, &ret);
	443	}
	444	#endif
	445
	446	/* we have to be peripheral to be able to send data, so
	447	* wait for the appropriate state
	448	*/
	449	if (ppb_1284_get_state(ppbus) < PPB_PERIPHERAL_NEGOCIATION)
	450	ppb_1284_terminate(ppbus);
	451
	452	while (ppb_1284_get_state(ppbus) != PPB_PERIPHERAL_IDLE) {
	453	/* XXX should check a variable before sleeping */
	454	#ifdef DEBUG_1284
e3869ec7	455	kprintf("s");
984263bc MD	456	#endif
	457
	458	ppi_enable_intr(ppidev);
	459
	460	/* sleep until IEEE1284 negociation starts */
377d4740	461	error = tsleep(ppi, PCATCH, "ppiwrite", 0);
984263bc MD	462
	463	switch (error) {
	464	case 0:
	465	/* negociate peripheral side with BYTE mode */
	466	ppb_peripheral_negociate(ppbus, PPB_BYTE, 0);
	467	break;
	468	case EWOULDBLOCK:
	469	break;
	470	default:
	471	goto error;
	472	}
	473	}
	474	#ifdef DEBUG_1284
e3869ec7	475	kprintf("N");
984263bc MD	476	#endif
	477
	478	/* negociation done, write bytes to master host */
e54488bb MD	479	while ((len = (int)szmin(uio->uio_resid, BUFSIZE)) != 0) {
e54488bb MD	480	uiomove(ppi->ppi_buffer, (size_t)len, uio);
984263bc MD	481	if ((error = byte_peripheral_write(ppbus,
	482	ppi->ppi_buffer, len, &sent)))
	483	goto error;
	484	#ifdef DEBUG_1284
e3869ec7	485	kprintf("d");
984263bc MD	486	#endif
	487	}
	488
	489	error:
	490
	491	#else /* PERIPH_1284 */
	492	int error = ENODEV;
	493	#endif
	494
	495	return (error);
	496	}
	497
	498	static int
fef8985e	499	ppiioctl(struct dev_ioctl_args *ap)
984263bc	500	{
b13267a5	501	cdev_t dev = ap->a_head.a_dev;
984263bc MD	502	u_int unit = minor(dev);
	503	device_t ppidev = UNITODEVICE(unit);
	504	device_t ppbus = device_get_parent(ppidev);
	505	int error = 0;
fef8985e	506	u_int8_t val = (u_int8_t )ap->a_data;
984263bc	507
fef8985e	508	switch (ap->a_cmd) {
984263bc MD	509	case PPIGDATA: /* get data register */
	510	*val = ppb_rdtr(ppbus);
	511	break;
	512	case PPIGSTATUS: /* get status bits */
	513	*val = ppb_rstr(ppbus);
	514	break;
	515	case PPIGCTRL: /* get control bits */
	516	*val = ppb_rctr(ppbus);
	517	break;
	518	case PPIGEPPD: /* get EPP data bits */
	519	*val = ppb_repp_D(ppbus);
	520	break;
	521	case PPIGECR: /* get ECP bits */
	522	*val = ppb_recr(ppbus);
	523	break;
	524	case PPIGFIFO: /* read FIFO */
	525	*val = ppb_rfifo(ppbus);
	526	break;
	527	case PPISDATA: /* set data register */
	528	ppb_wdtr(ppbus, *val);
	529	break;
	530	case PPISSTATUS: /* set status bits */
	531	ppb_wstr(ppbus, *val);
	532	break;
	533	case PPISCTRL: /* set control bits */
	534	ppb_wctr(ppbus, *val);
	535	break;
	536	case PPISEPPD: /* set EPP data bits */
	537	ppb_wepp_D(ppbus, *val);
	538	break;
	539	case PPISECR: /* set ECP bits */
	540	ppb_wecr(ppbus, *val);
	541	break;
	542	case PPISFIFO: /* write FIFO */
	543	ppb_wfifo(ppbus, *val);
	544	break;
	545	case PPIGEPPA: /* get EPP address bits */
	546	*val = ppb_repp_A(ppbus);
	547	break;
	548	case PPISEPPA: /* set EPP address bits */
	549	ppb_wepp_A(ppbus, *val);
	550	break;
	551	default:
	552	error = ENOTTY;
	553	break;
	554	}
	555
	556	return (error);
	557	}
	558
39b5d600 MD	559	/*
	560	* Because ppi is a static device under any attached ppbuf, and not
	561	* scanned by the ppbuf, we need an identify function to create the
	562	* device.
	563	*/
984263bc MD	564	static device_method_t ppi_methods[] = {
984263bc MD	565	/* device interface */
39b5d600	566	DEVMETHOD(device_identify, bus_generic_identify),
984263bc MD	567	DEVMETHOD(device_probe, ppi_probe),
	568	DEVMETHOD(device_attach, ppi_attach),
	569
	570	{ 0, 0 }
	571	};
	572
	573	static driver_t ppi_driver = {
	574	"ppi",
	575	ppi_methods,
	576	sizeof(struct ppi_data),
	577	};
	578	DRIVER_MODULE(ppi, ppbus, ppi_driver, ppi_devclass, 0, 0);