AMD64 - Adjust _pmap_allocpte() to handle races.
[dragonfly.git] / sys / platform / pc64 / amd64 / pmap.c
CommitLineData
d7f50089 1/*
d7f50089 2 * Copyright (c) 1991 Regents of the University of California.
d7f50089 3 * Copyright (c) 1994 John S. Dyson
d7f50089 4 * Copyright (c) 1994 David Greenman
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5 * Copyright (c) 2003 Peter Wemm
6 * Copyright (c) 2005-2008 Alan L. Cox <alc@cs.rice.edu>
7 * Copyright (c) 2008, 2009 The DragonFly Project.
8 * Copyright (c) 2008, 2009 Jordan Gordeev.
d7f50089 9 * All rights reserved.
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10 *
11 * This code is derived from software contributed to Berkeley by
12 * the Systems Programming Group of the University of Utah Computer
13 * Science Department and William Jolitz of UUNET Technologies Inc.
14 *
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15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
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18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
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21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. All advertising materials mentioning features or use of this software
24 * must display the following acknowledgement:
25 * This product includes software developed by the University of
26 * California, Berkeley and its contributors.
27 * 4. Neither the name of the University nor the names of its contributors
28 * may be used to endorse or promote products derived from this software
29 * without specific prior written permission.
30 *
31 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
32 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
35 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
39 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
40 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
d7f50089 41 * SUCH DAMAGE.
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42 *
43 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
d7f50089 44 * $FreeBSD: src/sys/i386/i386/pmap.c,v 1.250.2.18 2002/03/06 22:48:53 silby Exp $
c8fe38ae 45 * $DragonFly: src/sys/platform/pc64/amd64/pmap.c,v 1.3 2008/08/29 17:07:10 dillon Exp $
d7f50089 46 */
c8fe38ae 47
d7f50089 48/*
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49 * Manages physical address maps.
50 *
51 * In addition to hardware address maps, this
52 * module is called upon to provide software-use-only
53 * maps which may or may not be stored in the same
54 * form as hardware maps. These pseudo-maps are
55 * used to store intermediate results from copy
56 * operations to and from address spaces.
57 *
58 * Since the information managed by this module is
59 * also stored by the logical address mapping module,
60 * this module may throw away valid virtual-to-physical
61 * mappings at almost any time. However, invalidations
62 * of virtual-to-physical mappings must be done as
63 * requested.
64 *
65 * In order to cope with hardware architectures which
66 * make virtual-to-physical map invalidates expensive,
67 * this module may delay invalidate or reduced protection
68 * operations until such time as they are actually
69 * necessary. This module is given full information as
70 * to which processors are currently using which maps,
71 * and to when physical maps must be made correct.
72 */
73
74#if JG
75#include "opt_disable_pse.h"
76#include "opt_pmap.h"
77#endif
78#include "opt_msgbuf.h"
d7f50089 79
c8fe38ae 80#include <sys/param.h>
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81#include <sys/systm.h>
82#include <sys/kernel.h>
d7f50089 83#include <sys/proc.h>
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84#include <sys/msgbuf.h>
85#include <sys/vmmeter.h>
86#include <sys/mman.h>
d7f50089 87
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88#include <vm/vm.h>
89#include <vm/vm_param.h>
90#include <sys/sysctl.h>
91#include <sys/lock.h>
d7f50089 92#include <vm/vm_kern.h>
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93#include <vm/vm_page.h>
94#include <vm/vm_map.h>
d7f50089 95#include <vm/vm_object.h>
c8fe38ae 96#include <vm/vm_extern.h>
d7f50089 97#include <vm/vm_pageout.h>
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98#include <vm/vm_pager.h>
99#include <vm/vm_zone.h>
100
101#include <sys/user.h>
102#include <sys/thread2.h>
103#include <sys/sysref2.h>
d7f50089 104
c8fe38ae 105#include <machine/cputypes.h>
d7f50089 106#include <machine/md_var.h>
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107#include <machine/specialreg.h>
108#include <machine/smp.h>
109#include <machine_base/apic/apicreg.h>
d7f50089 110#include <machine/globaldata.h>
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111#include <machine/pmap.h>
112#include <machine/pmap_inval.h>
113
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114#include <ddb/ddb.h>
115
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116#define PMAP_KEEP_PDIRS
117#ifndef PMAP_SHPGPERPROC
118#define PMAP_SHPGPERPROC 200
119#endif
120
121#if defined(DIAGNOSTIC)
122#define PMAP_DIAGNOSTIC
123#endif
124
125#define MINPV 2048
126
127#if !defined(PMAP_DIAGNOSTIC)
128#define PMAP_INLINE __inline
129#else
130#define PMAP_INLINE
131#endif
132
133/*
134 * Get PDEs and PTEs for user/kernel address space
135 */
48ffc236 136static pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va);
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137#define pdir_pde(m, v) (m[(vm_offset_t)(v) >> PDRSHIFT])
138
139#define pmap_pde_v(pte) ((*(pd_entry_t *)pte & PG_V) != 0)
140#define pmap_pte_w(pte) ((*(pt_entry_t *)pte & PG_W) != 0)
141#define pmap_pte_m(pte) ((*(pt_entry_t *)pte & PG_M) != 0)
142#define pmap_pte_u(pte) ((*(pt_entry_t *)pte & PG_A) != 0)
143#define pmap_pte_v(pte) ((*(pt_entry_t *)pte & PG_V) != 0)
144
145
146/*
147 * Given a map and a machine independent protection code,
148 * convert to a vax protection code.
149 */
150#define pte_prot(m, p) \
151 (protection_codes[p & (VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE)])
152static int protection_codes[8];
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153
154struct pmap kernel_pmap;
c8fe38ae 155static TAILQ_HEAD(,pmap) pmap_list = TAILQ_HEAD_INITIALIZER(pmap_list);
d7f50089 156
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157vm_paddr_t avail_start; /* PA of first available physical page */
158vm_paddr_t avail_end; /* PA of last available physical page */
159vm_offset_t virtual_start; /* VA of first avail page (after kernel bss) */
160vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
161vm_offset_t KvaStart; /* VA start of KVA space */
162vm_offset_t KvaEnd; /* VA end of KVA space (non-inclusive) */
163vm_offset_t KvaSize; /* max size of kernel virtual address space */
164static boolean_t pmap_initialized = FALSE; /* Has pmap_init completed? */
165static int pgeflag; /* PG_G or-in */
166static int pseflag; /* PG_PS or-in */
d7f50089 167
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168static vm_object_t kptobj;
169
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170static int ndmpdp;
171static vm_paddr_t dmaplimit;
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172static int nkpt;
173vm_offset_t kernel_vm_end;
d7f50089 174
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175static uint64_t KPDphys; /* phys addr of kernel level 2 */
176uint64_t KPDPphys; /* phys addr of kernel level 3 */
177uint64_t KPML4phys; /* phys addr of kernel level 4 */
178
179static uint64_t DMPDphys; /* phys addr of direct mapped level 2 */
180static uint64_t DMPDPphys; /* phys addr of direct mapped level 3 */
181
d7f50089 182/*
c8fe38ae 183 * Data for the pv entry allocation mechanism
d7f50089 184 */
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185static vm_zone_t pvzone;
186static struct vm_zone pvzone_store;
187static struct vm_object pvzone_obj;
188static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0;
189static int pmap_pagedaemon_waken = 0;
190static struct pv_entry *pvinit;
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191
192/*
c8fe38ae 193 * All those kernel PT submaps that BSD is so fond of
d7f50089 194 */
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195pt_entry_t *CMAP1 = 0, *ptmmap;
196caddr_t CADDR1 = 0, ptvmmap = 0;
197static pt_entry_t *msgbufmap;
198struct msgbuf *msgbufp=0;
d7f50089 199
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200/*
201 * Crashdump maps.
d7f50089 202 */
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203static pt_entry_t *pt_crashdumpmap;
204static caddr_t crashdumpmap;
205
206extern uint64_t KPTphys;
207extern pt_entry_t *SMPpt;
208extern uint64_t SMPptpa;
209
210#define DISABLE_PSE
211
212static PMAP_INLINE void free_pv_entry (pv_entry_t pv);
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213static pv_entry_t get_pv_entry (void);
214static void i386_protection_init (void);
215static __inline void pmap_clearbit (vm_page_t m, int bit);
216
217static void pmap_remove_all (vm_page_t m);
218static void pmap_enter_quick (pmap_t pmap, vm_offset_t va, vm_page_t m);
219static int pmap_remove_pte (struct pmap *pmap, pt_entry_t *ptq,
220 vm_offset_t sva, pmap_inval_info_t info);
221static void pmap_remove_page (struct pmap *pmap,
222 vm_offset_t va, pmap_inval_info_t info);
223static int pmap_remove_entry (struct pmap *pmap, vm_page_t m,
224 vm_offset_t va, pmap_inval_info_t info);
225static boolean_t pmap_testbit (vm_page_t m, int bit);
226static void pmap_insert_entry (pmap_t pmap, vm_offset_t va,
227 vm_page_t mpte, vm_page_t m);
228
229static vm_page_t pmap_allocpte (pmap_t pmap, vm_offset_t va);
230
231static int pmap_release_free_page (pmap_t pmap, vm_page_t p);
232static vm_page_t _pmap_allocpte (pmap_t pmap, vm_pindex_t ptepindex);
233static pt_entry_t * pmap_pte_quick (pmap_t pmap, vm_offset_t va);
234static vm_page_t pmap_page_lookup (vm_object_t object, vm_pindex_t pindex);
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235static int pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m,
236 pmap_inval_info_t info);
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237static int pmap_unuse_pt (pmap_t, vm_offset_t, vm_page_t, pmap_inval_info_t);
238static vm_offset_t pmap_kmem_choose(vm_offset_t addr);
239
240static unsigned pdir4mb;
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241
242/*
c8fe38ae 243 * Move the kernel virtual free pointer to the next
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244 * 2MB. This is used to help improve performance
245 * by using a large (2MB) page for much of the kernel
c8fe38ae 246 * (.text, .data, .bss)
d7f50089 247 */
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248static vm_offset_t
249pmap_kmem_choose(vm_offset_t addr)
d7f50089 250{
c8fe38ae 251 vm_offset_t newaddr = addr;
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252
253 newaddr = (addr + (NBPDR - 1)) & ~(NBPDR - 1);
c8fe38ae 254 return newaddr;
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255}
256
d7f50089 257/*
c8fe38ae 258 * pmap_pte_quick:
d7f50089 259 *
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260 * Super fast pmap_pte routine best used when scanning the pv lists.
261 * This eliminates many course-grained invltlb calls. Note that many of
262 * the pv list scans are across different pmaps and it is very wasteful
263 * to do an entire invltlb when checking a single mapping.
264 *
265 * Should only be called while in a critical section.
266 */
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267static __inline pt_entry_t *pmap_pte(pmap_t pmap, vm_offset_t va);
268
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269static pt_entry_t *
270pmap_pte_quick(pmap_t pmap, vm_offset_t va)
271{
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272 return pmap_pte(pmap, va);
273}
274
275/* Return a non-clipped PD index for a given VA */
276static __inline vm_pindex_t
277pmap_pde_pindex(vm_offset_t va)
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278{
279 return va >> PDRSHIFT;
280}
281
282/* Return various clipped indexes for a given VA */
283static __inline vm_pindex_t
284pmap_pte_index(vm_offset_t va)
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285{
286
287 return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
288}
289
290static __inline vm_pindex_t
291pmap_pde_index(vm_offset_t va)
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292{
293
294 return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
295}
296
297static __inline vm_pindex_t
298pmap_pdpe_index(vm_offset_t va)
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299{
300
301 return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
302}
303
304static __inline vm_pindex_t
305pmap_pml4e_index(vm_offset_t va)
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306{
307
308 return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
309}
310
311/* Return a pointer to the PML4 slot that corresponds to a VA */
312static __inline pml4_entry_t *
313pmap_pml4e(pmap_t pmap, vm_offset_t va)
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314{
315
316 return (&pmap->pm_pml4[pmap_pml4e_index(va)]);
317}
318
319/* Return a pointer to the PDP slot that corresponds to a VA */
320static __inline pdp_entry_t *
321pmap_pml4e_to_pdpe(pml4_entry_t *pml4e, vm_offset_t va)
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322{
323 pdp_entry_t *pdpe;
324
325 pdpe = (pdp_entry_t *)PHYS_TO_DMAP(*pml4e & PG_FRAME);
326 return (&pdpe[pmap_pdpe_index(va)]);
327}
328
329/* Return a pointer to the PDP slot that corresponds to a VA */
330static __inline pdp_entry_t *
331pmap_pdpe(pmap_t pmap, vm_offset_t va)
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332{
333 pml4_entry_t *pml4e;
334
335 pml4e = pmap_pml4e(pmap, va);
336 if ((*pml4e & PG_V) == 0)
337 return NULL;
338 return (pmap_pml4e_to_pdpe(pml4e, va));
339}
340
341/* Return a pointer to the PD slot that corresponds to a VA */
342static __inline pd_entry_t *
343pmap_pdpe_to_pde(pdp_entry_t *pdpe, vm_offset_t va)
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344{
345 pd_entry_t *pde;
346
347 pde = (pd_entry_t *)PHYS_TO_DMAP(*pdpe & PG_FRAME);
348 return (&pde[pmap_pde_index(va)]);
349}
350
351/* Return a pointer to the PD slot that corresponds to a VA */
352static __inline pd_entry_t *
353pmap_pde(pmap_t pmap, vm_offset_t va)
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354{
355 pdp_entry_t *pdpe;
356
357 pdpe = pmap_pdpe(pmap, va);
358 if (pdpe == NULL || (*pdpe & PG_V) == 0)
359 return NULL;
360 return (pmap_pdpe_to_pde(pdpe, va));
361}
362
363/* Return a pointer to the PT slot that corresponds to a VA */
364static __inline pt_entry_t *
365pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
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366{
367 pt_entry_t *pte;
368
369 pte = (pt_entry_t *)PHYS_TO_DMAP(*pde & PG_FRAME);
370 return (&pte[pmap_pte_index(va)]);
371}
372
373/* Return a pointer to the PT slot that corresponds to a VA */
374static __inline pt_entry_t *
375pmap_pte(pmap_t pmap, vm_offset_t va)
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376{
377 pd_entry_t *pde;
378
379 pde = pmap_pde(pmap, va);
380 if (pde == NULL || (*pde & PG_V) == 0)
381 return NULL;
382 if ((*pde & PG_PS) != 0) /* compat with i386 pmap_pte() */
383 return ((pt_entry_t *)pde);
384 return (pmap_pde_to_pte(pde, va));
385}
386
387
388PMAP_INLINE pt_entry_t *
389vtopte(vm_offset_t va)
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390{
391 uint64_t mask = ((1ul << (NPTEPGSHIFT + NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
392
393 return (PTmap + ((va >> PAGE_SHIFT) & mask));
c8fe38ae 394}
d7f50089 395
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396static __inline pd_entry_t *
397vtopde(vm_offset_t va)
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398{
399 uint64_t mask = ((1ul << (NPDEPGSHIFT + NPDPEPGSHIFT + NPML4EPGSHIFT)) - 1);
400
401 return (PDmap + ((va >> PDRSHIFT) & mask));
402}
c8fe38ae 403
48ffc236 404static uint64_t
c8fe38ae 405allocpages(vm_paddr_t *firstaddr, int n)
d7f50089 406{
48ffc236 407 uint64_t ret;
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408
409 ret = *firstaddr;
410 bzero((void *)ret, n * PAGE_SIZE);
411 *firstaddr += n * PAGE_SIZE;
412 return (ret);
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413}
414
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415void
416create_pagetables(vm_paddr_t *firstaddr)
417{
418 int i;
419 int count;
420 uint64_t cpu0pp, cpu0idlestk;
421 int idlestk_page_offset = offsetof(struct privatespace, idlestack) / PAGE_SIZE;
422
423 /* we are running (mostly) V=P at this point */
424
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425 /* Allocate pages */
426 KPTphys = allocpages(firstaddr, NKPT);
427 KPML4phys = allocpages(firstaddr, 1);
428 KPDPphys = allocpages(firstaddr, NKPML4E);
429 KPDphys = allocpages(firstaddr, NKPDPE);
430
431 ndmpdp = (ptoa(Maxmem) + NBPDP - 1) >> PDPSHIFT;
432 if (ndmpdp < 4) /* Minimum 4GB of dirmap */
433 ndmpdp = 4;
434 DMPDPphys = allocpages(firstaddr, NDMPML4E);
435 if ((amd_feature & AMDID_PAGE1GB) == 0)
436 DMPDphys = allocpages(firstaddr, ndmpdp);
437 dmaplimit = (vm_paddr_t)ndmpdp << PDPSHIFT;
438
439 /* Fill in the underlying page table pages */
440 /* Read-only from zero to physfree */
441 /* XXX not fully used, underneath 2M pages */
442 for (i = 0; (i << PAGE_SHIFT) < *firstaddr; i++) {
443 ((pt_entry_t *)KPTphys)[i] = i << PAGE_SHIFT;
444 ((pt_entry_t *)KPTphys)[i] |= PG_RW | PG_V | PG_G;
445 }
446
447 /* Now map the page tables at their location within PTmap */
448 for (i = 0; i < NKPT; i++) {
449 ((pd_entry_t *)KPDphys)[i] = KPTphys + (i << PAGE_SHIFT);
450 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V;
451 }
452
453 /* Map from zero to end of allocations under 2M pages */
454 /* This replaces some of the KPTphys entries above */
455 for (i = 0; (i << PDRSHIFT) < *firstaddr; i++) {
456 ((pd_entry_t *)KPDphys)[i] = i << PDRSHIFT;
457 ((pd_entry_t *)KPDphys)[i] |= PG_RW | PG_V | PG_PS | PG_G;
458 }
459
460 /* And connect up the PD to the PDP */
461 for (i = 0; i < NKPDPE; i++) {
462 ((pdp_entry_t *)KPDPphys)[i + KPDPI] = KPDphys +
463 (i << PAGE_SHIFT);
464 ((pdp_entry_t *)KPDPphys)[i + KPDPI] |= PG_RW | PG_V | PG_U;
465 }
466
467 /* Now set up the direct map space using either 2MB or 1GB pages */
468 /* Preset PG_M and PG_A because demotion expects it */
469 if ((amd_feature & AMDID_PAGE1GB) == 0) {
470 for (i = 0; i < NPDEPG * ndmpdp; i++) {
471 ((pd_entry_t *)DMPDphys)[i] = (vm_paddr_t)i << PDRSHIFT;
472 ((pd_entry_t *)DMPDphys)[i] |= PG_RW | PG_V | PG_PS |
473 PG_G | PG_M | PG_A;
474 }
475 /* And the direct map space's PDP */
476 for (i = 0; i < ndmpdp; i++) {
477 ((pdp_entry_t *)DMPDPphys)[i] = DMPDphys +
478 (i << PAGE_SHIFT);
479 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_U;
480 }
481 } else {
482 for (i = 0; i < ndmpdp; i++) {
483 ((pdp_entry_t *)DMPDPphys)[i] =
484 (vm_paddr_t)i << PDPSHIFT;
485 ((pdp_entry_t *)DMPDPphys)[i] |= PG_RW | PG_V | PG_PS |
486 PG_G | PG_M | PG_A;
487 }
488 }
489
490 /* And recursively map PML4 to itself in order to get PTmap */
491 ((pdp_entry_t *)KPML4phys)[PML4PML4I] = KPML4phys;
492 ((pdp_entry_t *)KPML4phys)[PML4PML4I] |= PG_RW | PG_V | PG_U;
493
494 /* Connect the Direct Map slot up to the PML4 */
495 ((pdp_entry_t *)KPML4phys)[DMPML4I] = DMPDPphys;
496 ((pdp_entry_t *)KPML4phys)[DMPML4I] |= PG_RW | PG_V | PG_U;
497
498 /* Connect the KVA slot up to the PML4 */
499 ((pdp_entry_t *)KPML4phys)[KPML4I] = KPDPphys;
500 ((pdp_entry_t *)KPML4phys)[KPML4I] |= PG_RW | PG_V | PG_U;
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501}
502
503void
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504init_paging(vm_paddr_t *firstaddr)
505{
c8fe38ae 506 create_pagetables(firstaddr);
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507}
508
509/*
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510 * Bootstrap the system enough to run with virtual memory.
511 *
512 * On the i386 this is called after mapping has already been enabled
513 * and just syncs the pmap module with what has already been done.
514 * [We can't call it easily with mapping off since the kernel is not
515 * mapped with PA == VA, hence we would have to relocate every address
516 * from the linked base (virtual) address "KERNBASE" to the actual
517 * (physical) address starting relative to 0]
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518 */
519void
48ffc236 520pmap_bootstrap(vm_paddr_t *firstaddr)
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521{
522 vm_offset_t va;
523 pt_entry_t *pte;
524 struct mdglobaldata *gd;
525 int i;
526 int pg;
527
48ffc236
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528 KvaStart = VM_MIN_KERNEL_ADDRESS;
529 KvaEnd = VM_MAX_KERNEL_ADDRESS;
530 KvaSize = KvaEnd - KvaStart;
531
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532 avail_start = *firstaddr;
533
534 /*
48ffc236 535 * Create an initial set of page tables to run the kernel in.
c8fe38ae 536 */
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537 create_pagetables(firstaddr);
538
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539 virtual_start = (vm_offset_t) PTOV_OFFSET + *firstaddr;
540 virtual_start = pmap_kmem_choose(virtual_start);
48ffc236
JG
541
542 virtual_end = VM_MAX_KERNEL_ADDRESS;
543
544 /* XXX do %cr0 as well */
545 load_cr4(rcr4() | CR4_PGE | CR4_PSE);
546 load_cr3(KPML4phys);
c8fe38ae
MD
547
548 /*
549 * Initialize protection array.
550 */
551 i386_protection_init();
552
553 /*
554 * The kernel's pmap is statically allocated so we don't have to use
555 * pmap_create, which is unlikely to work correctly at this part of
556 * the boot sequence (XXX and which no longer exists).
557 */
48ffc236 558 kernel_pmap.pm_pml4 = (pdp_entry_t *) (PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
559 kernel_pmap.pm_count = 1;
560 kernel_pmap.pm_active = (cpumask_t)-1; /* don't allow deactivation */
561 TAILQ_INIT(&kernel_pmap.pm_pvlist);
562 nkpt = NKPT;
563
564 /*
565 * Reserve some special page table entries/VA space for temporary
566 * mapping of pages.
567 */
568#define SYSMAP(c, p, v, n) \
569 v = (c)va; va += ((n)*PAGE_SIZE); p = pte; pte += (n);
570
571 va = virtual_start;
48ffc236 572#ifdef JG
c8fe38ae 573 pte = (pt_entry_t *) pmap_pte(&kernel_pmap, va);
48ffc236
JG
574#else
575 pte = vtopte(va);
576#endif
c8fe38ae
MD
577
578 /*
579 * CMAP1/CMAP2 are used for zeroing and copying pages.
580 */
581 SYSMAP(caddr_t, CMAP1, CADDR1, 1)
582
583 /*
584 * Crashdump maps.
585 */
586 SYSMAP(caddr_t, pt_crashdumpmap, crashdumpmap, MAXDUMPPGS);
587
588 /*
589 * ptvmmap is used for reading arbitrary physical pages via
590 * /dev/mem.
591 */
592 SYSMAP(caddr_t, ptmmap, ptvmmap, 1)
593
594 /*
595 * msgbufp is used to map the system message buffer.
596 * XXX msgbufmap is not used.
597 */
598 SYSMAP(struct msgbuf *, msgbufmap, msgbufp,
599 atop(round_page(MSGBUF_SIZE)))
600
601 virtual_start = va;
602
603 *CMAP1 = 0;
c8fe38ae
MD
604
605 /*
606 * PG_G is terribly broken on SMP because we IPI invltlb's in some
607 * cases rather then invl1pg. Actually, I don't even know why it
608 * works under UP because self-referential page table mappings
609 */
610#ifdef SMP
611 pgeflag = 0;
612#else
613 if (cpu_feature & CPUID_PGE)
614 pgeflag = PG_G;
615#endif
616
617/*
618 * Initialize the 4MB page size flag
619 */
620 pseflag = 0;
621/*
622 * The 4MB page version of the initial
623 * kernel page mapping.
624 */
625 pdir4mb = 0;
626
627#if !defined(DISABLE_PSE)
628 if (cpu_feature & CPUID_PSE) {
629 pt_entry_t ptditmp;
630 /*
631 * Note that we have enabled PSE mode
632 */
633 pseflag = PG_PS;
634 ptditmp = *(PTmap + amd64_btop(KERNBASE));
635 ptditmp &= ~(NBPDR - 1);
636 ptditmp |= PG_V | PG_RW | PG_PS | PG_U | pgeflag;
637 pdir4mb = ptditmp;
638
639#ifndef SMP
640 /*
641 * Enable the PSE mode. If we are SMP we can't do this
642 * now because the APs will not be able to use it when
643 * they boot up.
644 */
645 load_cr4(rcr4() | CR4_PSE);
646
647 /*
648 * We can do the mapping here for the single processor
649 * case. We simply ignore the old page table page from
650 * now on.
651 */
652 /*
653 * For SMP, we still need 4K pages to bootstrap APs,
654 * PSE will be enabled as soon as all APs are up.
655 */
656 PTD[KPTDI] = (pd_entry_t)ptditmp;
c8fe38ae
MD
657 cpu_invltlb();
658#endif
659 }
660#endif
661#ifdef SMP
662 if (cpu_apic_address == 0)
663 panic("pmap_bootstrap: no local apic!");
c8fe38ae
MD
664#endif
665
666 /*
667 * We need to finish setting up the globaldata page for the BSP.
668 * locore has already populated the page table for the mdglobaldata
669 * portion.
670 */
671 pg = MDGLOBALDATA_BASEALLOC_PAGES;
672 gd = &CPU_prvspace[0].mdglobaldata;
673 gd->gd_CMAP1 = &SMPpt[pg + 0];
674 gd->gd_CMAP2 = &SMPpt[pg + 1];
675 gd->gd_CMAP3 = &SMPpt[pg + 2];
676 gd->gd_PMAP1 = &SMPpt[pg + 3];
677 gd->gd_CADDR1 = CPU_prvspace[0].CPAGE1;
678 gd->gd_CADDR2 = CPU_prvspace[0].CPAGE2;
679 gd->gd_CADDR3 = CPU_prvspace[0].CPAGE3;
680 gd->gd_PADDR1 = (pt_entry_t *)CPU_prvspace[0].PPAGE1;
681
682 cpu_invltlb();
d7f50089
YY
683}
684
c8fe38ae 685#ifdef SMP
d7f50089 686/*
c8fe38ae 687 * Set 4mb pdir for mp startup
d7f50089
YY
688 */
689void
c8fe38ae
MD
690pmap_set_opt(void)
691{
692 if (pseflag && (cpu_feature & CPUID_PSE)) {
693 load_cr4(rcr4() | CR4_PSE);
694 if (pdir4mb && mycpu->gd_cpuid == 0) { /* only on BSP */
c8fe38ae
MD
695 cpu_invltlb();
696 }
697 }
d7f50089 698}
c8fe38ae 699#endif
d7f50089 700
c8fe38ae
MD
701/*
702 * Initialize the pmap module.
703 * Called by vm_init, to initialize any structures that the pmap
704 * system needs to map virtual memory.
705 * pmap_init has been enhanced to support in a fairly consistant
706 * way, discontiguous physical memory.
d7f50089
YY
707 */
708void
c8fe38ae 709pmap_init(void)
d7f50089 710{
c8fe38ae
MD
711 int i;
712 int initial_pvs;
713
714 /*
715 * object for kernel page table pages
716 */
48ffc236
JG
717 /* JG I think the number can be arbitrary */
718 kptobj = vm_object_allocate(OBJT_DEFAULT, 5);
c8fe38ae
MD
719
720 /*
721 * Allocate memory for random pmap data structures. Includes the
722 * pv_head_table.
723 */
724
725 for(i = 0; i < vm_page_array_size; i++) {
726 vm_page_t m;
727
728 m = &vm_page_array[i];
729 TAILQ_INIT(&m->md.pv_list);
730 m->md.pv_list_count = 0;
731 }
732
733 /*
734 * init the pv free list
735 */
736 initial_pvs = vm_page_array_size;
737 if (initial_pvs < MINPV)
738 initial_pvs = MINPV;
739 pvzone = &pvzone_store;
740 pvinit = (struct pv_entry *) kmem_alloc(&kernel_map,
741 initial_pvs * sizeof (struct pv_entry));
742 zbootinit(pvzone, "PV ENTRY", sizeof (struct pv_entry), pvinit,
743 initial_pvs);
744
745 /*
746 * Now it is safe to enable pv_table recording.
747 */
748 pmap_initialized = TRUE;
d887674b 749#ifdef SMP
057877ac 750 lapic = pmap_mapdev_uncacheable(cpu_apic_address, sizeof(struct LAPIC));
d887674b 751#endif
d7f50089
YY
752}
753
c8fe38ae
MD
754/*
755 * Initialize the address space (zone) for the pv_entries. Set a
756 * high water mark so that the system can recover from excessive
757 * numbers of pv entries.
758 */
d7f50089 759void
c8fe38ae 760pmap_init2(void)
d7f50089 761{
c8fe38ae
MD
762 int shpgperproc = PMAP_SHPGPERPROC;
763
764 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
765 pv_entry_max = shpgperproc * maxproc + vm_page_array_size;
766 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
767 pv_entry_high_water = 9 * (pv_entry_max / 10);
768 zinitna(pvzone, &pvzone_obj, NULL, 0, pv_entry_max, ZONE_INTERRUPT, 1);
d7f50089
YY
769}
770
c8fe38ae
MD
771
772/***************************************************
773 * Low level helper routines.....
774 ***************************************************/
775
776#if defined(PMAP_DIAGNOSTIC)
d7f50089
YY
777
778/*
c8fe38ae
MD
779 * This code checks for non-writeable/modified pages.
780 * This should be an invalid condition.
d7f50089 781 */
c8fe38ae 782static int
48ffc236 783pmap_nw_modified(pt_entry_t pte)
d7f50089 784{
c8fe38ae
MD
785 if ((pte & (PG_M|PG_RW)) == PG_M)
786 return 1;
787 else
788 return 0;
d7f50089 789}
c8fe38ae
MD
790#endif
791
d7f50089 792
c8fe38ae
MD
793/*
794 * this routine defines the region(s) of memory that should
795 * not be tested for the modified bit.
796 */
797static PMAP_INLINE int
798pmap_track_modified(vm_offset_t va)
d7f50089 799{
c8fe38ae
MD
800 if ((va < clean_sva) || (va >= clean_eva))
801 return 1;
802 else
803 return 0;
d7f50089
YY
804}
805
d7f50089 806/*
c8fe38ae
MD
807 * pmap_extract:
808 *
809 * Extract the physical page address associated with the map/VA pair.
810 *
811 * This function may not be called from an interrupt if the pmap is
812 * not kernel_pmap.
d7f50089 813 */
c8fe38ae
MD
814vm_paddr_t
815pmap_extract(pmap_t pmap, vm_offset_t va)
d7f50089 816{
48ffc236
JG
817 vm_paddr_t rtval;
818 pt_entry_t *pte;
819 pd_entry_t pde, *pdep;
c8fe38ae 820
48ffc236
JG
821 rtval = 0;
822 pdep = pmap_pde(pmap, va);
823 if (pdep != NULL) {
824 pde = *pdep;
825 if (pde) {
826 if ((pde & PG_PS) != 0) {
827 rtval = (pde & PG_PS_FRAME) | (va & PDRMASK);
828 } else {
829 pte = pmap_pde_to_pte(pdep, va);
830 rtval = (*pte & PG_FRAME) | (va & PAGE_MASK);
831 }
c8fe38ae 832 }
c8fe38ae 833 }
48ffc236
JG
834 return rtval;
835}
836
837/*
838 * Routine: pmap_kextract
839 * Function:
840 * Extract the physical page address associated
841 * kernel virtual address.
842 */
843vm_paddr_t
844pmap_kextract(vm_offset_t va)
48ffc236
JG
845{
846 pd_entry_t pde;
847 vm_paddr_t pa;
848
849 if (va >= DMAP_MIN_ADDRESS && va < DMAP_MAX_ADDRESS) {
850 pa = DMAP_TO_PHYS(va);
851 } else {
852 pde = *vtopde(va);
853 if (pde & PG_PS) {
854 pa = (pde & PG_PS_FRAME) | (va & PDRMASK);
855 } else {
856 /*
857 * Beware of a concurrent promotion that changes the
858 * PDE at this point! For example, vtopte() must not
859 * be used to access the PTE because it would use the
860 * new PDE. It is, however, safe to use the old PDE
861 * because the page table page is preserved by the
862 * promotion.
863 */
864 pa = *pmap_pde_to_pte(&pde, va);
865 pa = (pa & PG_FRAME) | (va & PAGE_MASK);
866 }
867 }
868 return pa;
d7f50089
YY
869}
870
c8fe38ae
MD
871/***************************************************
872 * Low level mapping routines.....
873 ***************************************************/
874
d7f50089 875/*
c8fe38ae
MD
876 * Routine: pmap_kenter
877 * Function:
878 * Add a wired page to the KVA
879 * NOTE! note that in order for the mapping to take effect -- you
880 * should do an invltlb after doing the pmap_kenter().
d7f50089 881 */
c8fe38ae 882void
d7f50089
YY
883pmap_kenter(vm_offset_t va, vm_paddr_t pa)
884{
c8fe38ae
MD
885 pt_entry_t *pte;
886 pt_entry_t npte;
887 pmap_inval_info info;
888
889 pmap_inval_init(&info);
890 npte = pa | PG_RW | PG_V | pgeflag;
891 pte = vtopte(va);
892 pmap_inval_add(&info, &kernel_pmap, va);
893 *pte = npte;
894 pmap_inval_flush(&info);
d7f50089
YY
895}
896
897/*
c8fe38ae
MD
898 * Routine: pmap_kenter_quick
899 * Function:
900 * Similar to pmap_kenter(), except we only invalidate the
901 * mapping on the current CPU.
d7f50089 902 */
c8fe38ae
MD
903void
904pmap_kenter_quick(vm_offset_t va, vm_paddr_t pa)
905{
906 pt_entry_t *pte;
907 pt_entry_t npte;
908
909 npte = pa | PG_RW | PG_V | pgeflag;
910 pte = vtopte(va);
911 *pte = npte;
912 cpu_invlpg((void *)va);
913}
914
d7f50089
YY
915void
916pmap_kenter_sync(vm_offset_t va)
917{
c8fe38ae
MD
918 pmap_inval_info info;
919
920 pmap_inval_init(&info);
921 pmap_inval_add(&info, &kernel_pmap, va);
922 pmap_inval_flush(&info);
d7f50089
YY
923}
924
d7f50089
YY
925void
926pmap_kenter_sync_quick(vm_offset_t va)
927{
c8fe38ae 928 cpu_invlpg((void *)va);
d7f50089
YY
929}
930
d7f50089 931/*
c8fe38ae 932 * remove a page from the kernel pagetables
d7f50089
YY
933 */
934void
c8fe38ae 935pmap_kremove(vm_offset_t va)
d7f50089 936{
c8fe38ae
MD
937 pt_entry_t *pte;
938 pmap_inval_info info;
939
940 pmap_inval_init(&info);
941 pte = vtopte(va);
942 pmap_inval_add(&info, &kernel_pmap, va);
943 *pte = 0;
944 pmap_inval_flush(&info);
945}
946
947void
948pmap_kremove_quick(vm_offset_t va)
949{
950 pt_entry_t *pte;
951 pte = vtopte(va);
952 *pte = 0;
953 cpu_invlpg((void *)va);
d7f50089
YY
954}
955
956/*
c8fe38ae 957 * XXX these need to be recoded. They are not used in any critical path.
d7f50089
YY
958 */
959void
c8fe38ae 960pmap_kmodify_rw(vm_offset_t va)
d7f50089 961{
c8fe38ae
MD
962 *vtopte(va) |= PG_RW;
963 cpu_invlpg((void *)va);
d7f50089
YY
964}
965
c8fe38ae
MD
966void
967pmap_kmodify_nc(vm_offset_t va)
968{
969 *vtopte(va) |= PG_N;
970 cpu_invlpg((void *)va);
971}
d7f50089
YY
972
973/*
c8fe38ae
MD
974 * Used to map a range of physical addresses into kernel
975 * virtual address space.
976 *
977 * For now, VM is already on, we only need to map the
978 * specified memory.
d7f50089
YY
979 */
980vm_offset_t
981pmap_map(vm_offset_t virt, vm_paddr_t start, vm_paddr_t end, int prot)
982{
8fdd3267 983 return PHYS_TO_DMAP(start);
d7f50089
YY
984}
985
c8fe38ae 986
d7f50089 987/*
c8fe38ae
MD
988 * Add a list of wired pages to the kva
989 * this routine is only used for temporary
990 * kernel mappings that do not need to have
991 * page modification or references recorded.
992 * Note that old mappings are simply written
993 * over. The page *must* be wired.
d7f50089
YY
994 */
995void
c8fe38ae 996pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
d7f50089 997{
c8fe38ae
MD
998 vm_offset_t end_va;
999
1000 end_va = va + count * PAGE_SIZE;
1001
1002 while (va < end_va) {
1003 pt_entry_t *pte;
1004
1005 pte = vtopte(va);
1006 *pte = VM_PAGE_TO_PHYS(*m) | PG_RW | PG_V | pgeflag;
1007 cpu_invlpg((void *)va);
1008 va += PAGE_SIZE;
1009 m++;
1010 }
1011#ifdef SMP
1012 smp_invltlb(); /* XXX */
1013#endif
1014}
1015
1016void
1017pmap_qenter2(vm_offset_t va, vm_page_t *m, int count, cpumask_t *mask)
1018{
1019 vm_offset_t end_va;
1020 cpumask_t cmask = mycpu->gd_cpumask;
1021
1022 end_va = va + count * PAGE_SIZE;
1023
1024 while (va < end_va) {
1025 pt_entry_t *pte;
1026 pt_entry_t pteval;
1027
1028 /*
1029 * Install the new PTE. If the pte changed from the prior
1030 * mapping we must reset the cpu mask and invalidate the page.
1031 * If the pte is the same but we have not seen it on the
1032 * current cpu, invlpg the existing mapping. Otherwise the
1033 * entry is optimal and no invalidation is required.
1034 */
1035 pte = vtopte(va);
1036 pteval = VM_PAGE_TO_PHYS(*m) | PG_A | PG_RW | PG_V | pgeflag;
1037 if (*pte != pteval) {
1038 *mask = 0;
1039 *pte = pteval;
1040 cpu_invlpg((void *)va);
1041 } else if ((*mask & cmask) == 0) {
1042 cpu_invlpg((void *)va);
1043 }
1044 va += PAGE_SIZE;
1045 m++;
1046 }
1047 *mask |= cmask;
d7f50089
YY
1048}
1049
1050/*
7155fc7d 1051 * This routine jerks page mappings from the
c8fe38ae 1052 * kernel -- it is meant only for temporary mappings.
7155fc7d
MD
1053 *
1054 * MPSAFE, INTERRUPT SAFE (cluster callback)
d7f50089 1055 */
c8fe38ae
MD
1056void
1057pmap_qremove(vm_offset_t va, int count)
d7f50089 1058{
c8fe38ae
MD
1059 vm_offset_t end_va;
1060
48ffc236 1061 end_va = va + count * PAGE_SIZE;
c8fe38ae
MD
1062
1063 while (va < end_va) {
1064 pt_entry_t *pte;
1065
1066 pte = vtopte(va);
1067 *pte = 0;
1068 cpu_invlpg((void *)va);
1069 va += PAGE_SIZE;
1070 }
1071#ifdef SMP
1072 smp_invltlb();
1073#endif
d7f50089
YY
1074}
1075
1076/*
c8fe38ae
MD
1077 * This routine works like vm_page_lookup() but also blocks as long as the
1078 * page is busy. This routine does not busy the page it returns.
1079 *
1080 * Unless the caller is managing objects whos pages are in a known state,
1081 * the call should be made with a critical section held so the page's object
1082 * association remains valid on return.
d7f50089 1083 */
c8fe38ae
MD
1084static vm_page_t
1085pmap_page_lookup(vm_object_t object, vm_pindex_t pindex)
d7f50089 1086{
c8fe38ae
MD
1087 vm_page_t m;
1088
1089 do {
1090 m = vm_page_lookup(object, pindex);
1091 } while (m && vm_page_sleep_busy(m, FALSE, "pplookp"));
1092
1093 return(m);
d7f50089
YY
1094}
1095
1096/*
c8fe38ae
MD
1097 * Create a new thread and optionally associate it with a (new) process.
1098 * NOTE! the new thread's cpu may not equal the current cpu.
d7f50089
YY
1099 */
1100void
c8fe38ae 1101pmap_init_thread(thread_t td)
d7f50089 1102{
c8fe38ae
MD
1103 /* enforce pcb placement */
1104 td->td_pcb = (struct pcb *)(td->td_kstack + td->td_kstack_size) - 1;
1105 td->td_savefpu = &td->td_pcb->pcb_save;
48ffc236 1106 td->td_sp = (char *)td->td_pcb - 16; /* JG is -16 needed on amd64? */
d7f50089
YY
1107}
1108
1109/*
c8fe38ae 1110 * This routine directly affects the fork perf for a process.
d7f50089
YY
1111 */
1112void
c8fe38ae 1113pmap_init_proc(struct proc *p)
d7f50089
YY
1114{
1115}
1116
1117/*
c8fe38ae
MD
1118 * Dispose the UPAGES for a process that has exited.
1119 * This routine directly impacts the exit perf of a process.
d7f50089
YY
1120 */
1121void
c8fe38ae 1122pmap_dispose_proc(struct proc *p)
d7f50089 1123{
c8fe38ae 1124 KASSERT(p->p_lock == 0, ("attempt to dispose referenced proc! %p", p));
d7f50089
YY
1125}
1126
c8fe38ae
MD
1127/***************************************************
1128 * Page table page management routines.....
1129 ***************************************************/
1130
d7f50089 1131/*
c8fe38ae
MD
1132 * This routine unholds page table pages, and if the hold count
1133 * drops to zero, then it decrements the wire count.
d7f50089 1134 */
c8fe38ae 1135static int
48ffc236 1136_pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, pmap_inval_info_t info)
c8fe38ae
MD
1137{
1138 /*
1139 * Wait until we can busy the page ourselves. We cannot have
1140 * any active flushes if we block.
1141 */
1142 if (m->flags & PG_BUSY) {
1143 pmap_inval_flush(info);
1144 while (vm_page_sleep_busy(m, FALSE, "pmuwpt"))
1145 ;
1146 }
1147 KASSERT(m->queue == PQ_NONE,
1148 ("_pmap_unwire_pte_hold: %p->queue != PQ_NONE", m));
1149
1150 if (m->hold_count == 1) {
1151 /*
1152 * Unmap the page table page
1153 */
1154 vm_page_busy(m);
1155 pmap_inval_add(info, pmap, -1);
48ffc236
JG
1156
1157 if (m->pindex >= (NUPDE + NUPDPE)) {
1158 /* PDP page */
1159 pml4_entry_t *pml4;
1160 pml4 = pmap_pml4e(pmap, va);
1161 *pml4 = 0;
1162 } else if (m->pindex >= NUPDE) {
1163 /* PD page */
1164 pdp_entry_t *pdp;
1165 pdp = pmap_pdpe(pmap, va);
1166 *pdp = 0;
1167 } else {
3535204a 1168 /* PT page */
48ffc236
JG
1169 pd_entry_t *pd;
1170 pd = pmap_pde(pmap, va);
1171 *pd = 0;
1172 }
c8fe38ae
MD
1173
1174 KKASSERT(pmap->pm_stats.resident_count > 0);
1175 --pmap->pm_stats.resident_count;
1176
1177 if (pmap->pm_ptphint == m)
1178 pmap->pm_ptphint = NULL;
1179
48ffc236
JG
1180 if (m->pindex < NUPDE) {
1181 /* We just released a PT, unhold the matching PD */
1182 vm_page_t pdpg;
1183
1184 pdpg = PHYS_TO_VM_PAGE(*pmap_pdpe(pmap, va) & PG_FRAME);
1185 pmap_unwire_pte_hold(pmap, va, pdpg, info);
1186 }
1187 if (m->pindex >= NUPDE && m->pindex < (NUPDE + NUPDPE)) {
1188 /* We just released a PD, unhold the matching PDP */
1189 vm_page_t pdppg;
1190
1191 pdppg = PHYS_TO_VM_PAGE(*pmap_pml4e(pmap, va) & PG_FRAME);
1192 pmap_unwire_pte_hold(pmap, va, pdppg, info);
1193 }
48ffc236 1194
c8fe38ae
MD
1195 /*
1196 * This was our last hold, the page had better be unwired
1197 * after we decrement wire_count.
1198 *
1199 * FUTURE NOTE: shared page directory page could result in
1200 * multiple wire counts.
1201 */
1202 vm_page_unhold(m);
1203 --m->wire_count;
1204 KKASSERT(m->wire_count == 0);
1205 --vmstats.v_wire_count;
1206 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1207 vm_page_flash(m);
1208 vm_page_free_zero(m);
1209 return 1;
1210 } else {
1b2e0b92 1211 /* JG Can we get here? */
c8fe38ae
MD
1212 KKASSERT(m->hold_count > 1);
1213 vm_page_unhold(m);
1214 return 0;
1215 }
1216}
1217
1218static PMAP_INLINE int
48ffc236 1219pmap_unwire_pte_hold(pmap_t pmap, vm_offset_t va, vm_page_t m, pmap_inval_info_t info)
d7f50089 1220{
c8fe38ae
MD
1221 KKASSERT(m->hold_count > 0);
1222 if (m->hold_count > 1) {
1223 vm_page_unhold(m);
1224 return 0;
1225 } else {
48ffc236 1226 return _pmap_unwire_pte_hold(pmap, va, m, info);
c8fe38ae 1227 }
d7f50089
YY
1228}
1229
c8fe38ae
MD
1230/*
1231 * After removing a page table entry, this routine is used to
1232 * conditionally free the page, and manage the hold/wire counts.
d7f50089 1233 */
c8fe38ae
MD
1234static int
1235pmap_unuse_pt(pmap_t pmap, vm_offset_t va, vm_page_t mpte,
1236 pmap_inval_info_t info)
1237{
48ffc236 1238 /* JG Use FreeBSD/amd64 or FreeBSD/i386 ptepde approaches? */
c8fe38ae 1239 vm_pindex_t ptepindex;
48ffc236 1240 if (va >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
1241 return 0;
1242
1243 if (mpte == NULL) {
48ffc236
JG
1244 ptepindex = pmap_pde_pindex(va);
1245#if JGHINT
c8fe38ae
MD
1246 if (pmap->pm_ptphint &&
1247 (pmap->pm_ptphint->pindex == ptepindex)) {
1248 mpte = pmap->pm_ptphint;
1249 } else {
48ffc236 1250#endif
c8fe38ae 1251 pmap_inval_flush(info);
48ffc236 1252 mpte = pmap_page_lookup(pmap->pm_pteobj, ptepindex);
c8fe38ae 1253 pmap->pm_ptphint = mpte;
48ffc236 1254#if JGHINT
c8fe38ae 1255 }
48ffc236 1256#endif
c8fe38ae
MD
1257 }
1258
48ffc236 1259 return pmap_unwire_pte_hold(pmap, va, mpte, info);
c8fe38ae 1260}
d7f50089
YY
1261
1262/*
c8fe38ae
MD
1263 * Initialize pmap0/vmspace0. This pmap is not added to pmap_list because
1264 * it, and IdlePTD, represents the template used to update all other pmaps.
1265 *
1266 * On architectures where the kernel pmap is not integrated into the user
1267 * process pmap, this pmap represents the process pmap, not the kernel pmap.
1268 * kernel_pmap should be used to directly access the kernel_pmap.
d7f50089
YY
1269 */
1270void
c8fe38ae 1271pmap_pinit0(struct pmap *pmap)
d7f50089 1272{
48ffc236 1273 pmap->pm_pml4 = (pml4_entry_t *)(PTOV_OFFSET + KPML4phys);
c8fe38ae
MD
1274 pmap->pm_count = 1;
1275 pmap->pm_active = 0;
1276 pmap->pm_ptphint = NULL;
1277 TAILQ_INIT(&pmap->pm_pvlist);
1278 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
d7f50089
YY
1279}
1280
1281/*
c8fe38ae
MD
1282 * Initialize a preallocated and zeroed pmap structure,
1283 * such as one in a vmspace structure.
d7f50089
YY
1284 */
1285void
c8fe38ae 1286pmap_pinit(struct pmap *pmap)
d7f50089 1287{
c8fe38ae
MD
1288 vm_page_t ptdpg;
1289
1290 /*
1291 * No need to allocate page table space yet but we do need a valid
1292 * page directory table.
1293 */
48ffc236
JG
1294 if (pmap->pm_pml4 == NULL) {
1295 pmap->pm_pml4 =
1296 (pml4_entry_t *)kmem_alloc_pageable(&kernel_map, PAGE_SIZE);
c8fe38ae
MD
1297 }
1298
1299 /*
1300 * Allocate an object for the ptes
1301 */
1302 if (pmap->pm_pteobj == NULL)
0a5c555b 1303 pmap->pm_pteobj = vm_object_allocate(OBJT_DEFAULT, NUPDE + NUPDPE + PML4PML4I + 1);
c8fe38ae
MD
1304
1305 /*
1306 * Allocate the page directory page, unless we already have
1307 * one cached. If we used the cached page the wire_count will
1308 * already be set appropriately.
1309 */
1310 if ((ptdpg = pmap->pm_pdirm) == NULL) {
0a5c555b 1311 ptdpg = vm_page_grab(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I,
c8fe38ae
MD
1312 VM_ALLOC_NORMAL | VM_ALLOC_RETRY);
1313 pmap->pm_pdirm = ptdpg;
1314 vm_page_flag_clear(ptdpg, PG_MAPPED | PG_BUSY);
1315 ptdpg->valid = VM_PAGE_BITS_ALL;
1316 ptdpg->wire_count = 1;
1317 ++vmstats.v_wire_count;
48ffc236 1318 pmap_kenter((vm_offset_t)pmap->pm_pml4, VM_PAGE_TO_PHYS(ptdpg));
c8fe38ae
MD
1319 }
1320 if ((ptdpg->flags & PG_ZERO) == 0)
48ffc236 1321 bzero(pmap->pm_pml4, PAGE_SIZE);
c8fe38ae 1322
48ffc236
JG
1323 pmap->pm_pml4[KPML4I] = KPDPphys | PG_RW | PG_V | PG_U;
1324 pmap->pm_pml4[DMPML4I] = DMPDPphys | PG_RW | PG_V | PG_U;
c8fe38ae
MD
1325
1326 /* install self-referential address mapping entry */
48ffc236 1327 pmap->pm_pml4[PML4PML4I] = VM_PAGE_TO_PHYS(ptdpg) | PG_V | PG_RW | PG_A | PG_M;
c8fe38ae
MD
1328
1329 pmap->pm_count = 1;
1330 pmap->pm_active = 0;
1331 pmap->pm_ptphint = NULL;
1332 TAILQ_INIT(&pmap->pm_pvlist);
1333 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1334 pmap->pm_stats.resident_count = 1;
d7f50089
YY
1335}
1336
1337/*
c8fe38ae
MD
1338 * Clean up a pmap structure so it can be physically freed. This routine
1339 * is called by the vmspace dtor function. A great deal of pmap data is
1340 * left passively mapped to improve vmspace management so we have a bit
1341 * of cleanup work to do here.
d7f50089
YY
1342 */
1343void
c8fe38ae 1344pmap_puninit(pmap_t pmap)
d7f50089 1345{
c8fe38ae
MD
1346 vm_page_t p;
1347
1348 KKASSERT(pmap->pm_active == 0);
1349 if ((p = pmap->pm_pdirm) != NULL) {
48ffc236
JG
1350 KKASSERT(pmap->pm_pml4 != NULL);
1351 KKASSERT(pmap->pm_pml4 != (PTOV_OFFSET + KPML4phys));
1352 pmap_kremove((vm_offset_t)pmap->pm_pml4);
c8fe38ae
MD
1353 p->wire_count--;
1354 vmstats.v_wire_count--;
1355 KKASSERT((p->flags & PG_BUSY) == 0);
1356 vm_page_busy(p);
1357 vm_page_free_zero(p);
1358 pmap->pm_pdirm = NULL;
1359 }
48ffc236
JG
1360 if (pmap->pm_pml4) {
1361 KKASSERT(pmap->pm_pml4 != (PTOV_OFFSET + KPML4phys));
1362 kmem_free(&kernel_map, (vm_offset_t)pmap->pm_pml4, PAGE_SIZE);
1363 pmap->pm_pml4 = NULL;
c8fe38ae
MD
1364 }
1365 if (pmap->pm_pteobj) {
1366 vm_object_deallocate(pmap->pm_pteobj);
1367 pmap->pm_pteobj = NULL;
1368 }
d7f50089
YY
1369}
1370
1371/*
c8fe38ae
MD
1372 * Wire in kernel global address entries. To avoid a race condition
1373 * between pmap initialization and pmap_growkernel, this procedure
1374 * adds the pmap to the master list (which growkernel scans to update),
1375 * then copies the template.
d7f50089
YY
1376 */
1377void
c8fe38ae 1378pmap_pinit2(struct pmap *pmap)
d7f50089 1379{
c8fe38ae
MD
1380 crit_enter();
1381 TAILQ_INSERT_TAIL(&pmap_list, pmap, pm_pmnode);
1382 /* XXX copies current process, does not fill in MPPTDI */
c8fe38ae 1383 crit_exit();
d7f50089
YY
1384}
1385
1386/*
c8fe38ae
MD
1387 * Attempt to release and free a vm_page in a pmap. Returns 1 on success,
1388 * 0 on failure (if the procedure had to sleep).
d7f50089 1389 *
c8fe38ae
MD
1390 * When asked to remove the page directory page itself, we actually just
1391 * leave it cached so we do not have to incur the SMP inval overhead of
1392 * removing the kernel mapping. pmap_puninit() will take care of it.
d7f50089
YY
1393 */
1394static int
c8fe38ae 1395pmap_release_free_page(struct pmap *pmap, vm_page_t p)
d7f50089 1396{
48ffc236 1397 pml4_entry_t *pml4 = pmap->pm_pml4;
c8fe38ae
MD
1398 /*
1399 * This code optimizes the case of freeing non-busy
1400 * page-table pages. Those pages are zero now, and
1401 * might as well be placed directly into the zero queue.
1402 */
1403 if (vm_page_sleep_busy(p, FALSE, "pmaprl"))
d7f50089 1404 return 0;
d7f50089 1405
c8fe38ae
MD
1406 vm_page_busy(p);
1407
1408 /*
1409 * Remove the page table page from the processes address space.
1410 */
4a4ea614
MD
1411 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1412 /*
1413 * We are the pml4 table itself.
1414 */
1415 /* XXX anything to do here? */
1416 } else if (p->pindex >= (NUPDE + NUPDPE)) {
1b2e0b92
JG
1417 /*
1418 * We are a PDP page.
1419 * We look for the PML4 entry that points to us.
1420 */
1421 vm_page_t m4 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + PML4PML4I);
1422 KKASSERT(m4 != NULL);
1423 pml4_entry_t *pml4 = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m4));
1424 int idx = (p->pindex - (NUPDE + NUPDPE)) % NPML4EPG;
1425 KKASSERT(pml4[idx] != 0);
1426 pml4[idx] = 0;
1427 m4->hold_count--;
1428 /* JG What about wire_count? */
1429 } else if (p->pindex >= NUPDE) {
1430 /*
1431 * We are a PD page.
1432 * We look for the PDP entry that points to us.
1433 */
1434 vm_page_t m3 = vm_page_lookup(pmap->pm_pteobj, NUPDE + NUPDPE + (p->pindex - NUPDE) / NPDPEPG);
1435 KKASSERT(m3 != NULL);
1436 pdp_entry_t *pdp = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m3));
1437 int idx = (p->pindex - NUPDE) % NPDPEPG;
1438 KKASSERT(pdp[idx] != 0);
1439 pdp[idx] = 0;
1440 m3->hold_count--;
1441 /* JG What about wire_count? */
1442 } else {
1443 /* We are a PT page.
1444 * We look for the PD entry that points to us.
1445 */
1446 vm_page_t m2 = vm_page_lookup(pmap->pm_pteobj, NUPDE + p->pindex / NPDEPG);
1447 KKASSERT(m2 != NULL);
1448 pd_entry_t *pd = PHYS_TO_DMAP(VM_PAGE_TO_PHYS(m2));
1449 int idx = p->pindex % NPDEPG;
1450 pd[idx] = 0;
1451 m2->hold_count--;
1452 /* JG What about wire_count? */
1453 }
c8fe38ae
MD
1454 KKASSERT(pmap->pm_stats.resident_count > 0);
1455 --pmap->pm_stats.resident_count;
1456
1457 if (p->hold_count) {
1458 panic("pmap_release: freeing held page table page");
1459 }
1460 if (pmap->pm_ptphint && (pmap->pm_ptphint->pindex == p->pindex))
1461 pmap->pm_ptphint = NULL;
1462
1b2e0b92
JG
1463 /*
1464 * We leave the top-level page table page cached, wired, and mapped in
1465 * the pmap until the dtor function (pmap_puninit()) gets called.
1466 * However, still clean it up so we can set PG_ZERO.
1467 */
1468 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
1469 bzero(pmap->pm_pml4, PAGE_SIZE);
1470 vm_page_flag_set(p, PG_ZERO);
1471 vm_page_wakeup(p);
1472 } else {
1473 p->wire_count--;
1474 vmstats.v_wire_count--;
1475 /* JG eventually revert to using vm_page_free_zero() */
1476 vm_page_free(p);
1477 }
c8fe38ae
MD
1478 return 1;
1479}
d7f50089
YY
1480
1481/*
e8510e54
MD
1482 * This routine is called when various levels in the page table need to
1483 * be populated. This routine cannot fail.
d7f50089
YY
1484 */
1485static vm_page_t
c8fe38ae
MD
1486_pmap_allocpte(pmap_t pmap, vm_pindex_t ptepindex)
1487{
e8510e54 1488 vm_page_t m;
c8fe38ae
MD
1489
1490 /*
e8510e54 1491 * Find or fabricate a new pagetable page. This will busy the page.
c8fe38ae
MD
1492 */
1493 m = vm_page_grab(pmap->pm_pteobj, ptepindex,
1494 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
1495
48ffc236
JG
1496
1497 if ((m->flags & PG_ZERO) == 0) {
1498 pmap_zero_page(VM_PAGE_TO_PHYS(m));
1499 }
1500
c8fe38ae
MD
1501 KASSERT(m->queue == PQ_NONE,
1502 ("_pmap_allocpte: %p->queue != PQ_NONE", m));
1503
1504 /*
1505 * Increment the hold count for the page we will be returning to
1506 * the caller.
1507 */
1508 m->hold_count++;
c8fe38ae
MD
1509 if (m->wire_count == 0)
1510 vmstats.v_wire_count++;
1511 m->wire_count++;
1512
c8fe38ae
MD
1513 /*
1514 * Map the pagetable page into the process address space, if
1515 * it isn't already there.
e8510e54
MD
1516 *
1517 * It is possible that someone else got in and mapped the page
1518 * directory page while we were blocked, if so just unbusy and
1519 * return the held page.
c8fe38ae 1520 */
c8fe38ae
MD
1521 ++pmap->pm_stats.resident_count;
1522
48ffc236 1523 if (ptepindex >= (NUPDE + NUPDPE)) {
e8510e54
MD
1524 /*
1525 * Wire up a new PDP page in the PML4
1526 */
48ffc236
JG
1527 pml4_entry_t *pml4;
1528 vm_pindex_t pml4index;
1529
48ffc236
JG
1530 pml4index = ptepindex - (NUPDE + NUPDPE);
1531 pml4 = &pmap->pm_pml4[pml4index];
e8510e54
MD
1532 if (*pml4 & PG_V) {
1533 --m->wire_count;
1534 vm_page_wakeup(m);
1535 return(m);
1536 }
48ffc236 1537 *pml4 = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
48ffc236 1538 } else if (ptepindex >= NUPDE) {
e8510e54
MD
1539 /*
1540 * Wire up a new PD page in the PDP
1541 */
48ffc236
JG
1542 vm_pindex_t pml4index;
1543 vm_pindex_t pdpindex;
e8510e54 1544 vm_page_t pdppg;
48ffc236
JG
1545 pml4_entry_t *pml4;
1546 pdp_entry_t *pdp;
1547
48ffc236
JG
1548 pdpindex = ptepindex - NUPDE;
1549 pml4index = pdpindex >> NPML4EPGSHIFT;
1550
1551 pml4 = &pmap->pm_pml4[pml4index];
1552 if ((*pml4 & PG_V) == 0) {
e8510e54
MD
1553 /*
1554 * Have to allocate a new PDP page, recurse.
1555 * This always succeeds. Returned page will
1556 * be held.
1557 */
1558 pdppg = _pmap_allocpte(pmap,
1559 NUPDE + NUPDPE + pml4index);
48ffc236 1560 } else {
e8510e54
MD
1561 /*
1562 * Add a held reference to the PDP page.
1563 */
48ffc236 1564 pdppg = PHYS_TO_VM_PAGE(*pml4 & PG_FRAME);
1b2e0b92 1565 pdppg->hold_count++;
48ffc236 1566 }
c8fe38ae 1567
e8510e54
MD
1568 /*
1569 * Now find the pdp_entry and map the PDP. If the PDP
1570 * has already been mapped unwind and return the
1571 * already-mapped PDP held.
1572 */
1573 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
48ffc236 1574 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
e8510e54
MD
1575 if (*pdp & PG_V) {
1576 vm_page_unhold(pdppg);
1577 --m->wire_count;
1578 vm_page_wakeup(m);
1579 return(m);
1580 }
48ffc236 1581 *pdp = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW | PG_V | PG_A | PG_M;
48ffc236 1582 } else {
e8510e54
MD
1583 /*
1584 * Wire up the new PT page in the PD
1585 */
48ffc236
JG
1586 vm_pindex_t pml4index;
1587 vm_pindex_t pdpindex;
1588 pml4_entry_t *pml4;
1589 pdp_entry_t *pdp;
1590 pd_entry_t *pd;
e8510e54 1591 vm_page_t pdpg;
48ffc236 1592
48ffc236
JG
1593 pdpindex = ptepindex >> NPDPEPGSHIFT;
1594 pml4index = pdpindex >> NPML4EPGSHIFT;
1595
e8510e54
MD
1596 /*
1597 * Locate the PDP page in the PML4, then the PD page in
1598 * the PDP. If either does not exist we simply recurse
1599 * to allocate them.
1600 *
1601 * We can just recurse on the PD page as it will recurse
1602 * on the PDP if necessary.
1603 */
48ffc236
JG
1604 pml4 = &pmap->pm_pml4[pml4index];
1605 if ((*pml4 & PG_V) == 0) {
e8510e54 1606 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex);
48ffc236
JG
1607 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1608 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
c8fe38ae 1609 } else {
48ffc236
JG
1610 pdp = (pdp_entry_t *)PHYS_TO_DMAP(*pml4 & PG_FRAME);
1611 pdp = &pdp[pdpindex & ((1ul << NPDPEPGSHIFT) - 1)];
1612 if ((*pdp & PG_V) == 0) {
e8510e54 1613 pdpg = _pmap_allocpte(pmap, NUPDE + pdpindex);
48ffc236 1614 } else {
48ffc236 1615 pdpg = PHYS_TO_VM_PAGE(*pdp & PG_FRAME);
1b2e0b92 1616 pdpg->hold_count++;
48ffc236 1617 }
c8fe38ae 1618 }
48ffc236 1619
e8510e54
MD
1620 /*
1621 * Now fill in the pte in the PD. If the pte already exists
1622 * (again, if we raced the grab), unhold pdpg and unwire
1623 * m, returning a held m.
1624 */
1625 pd = (pd_entry_t *)PHYS_TO_DMAP(*pdp & PG_FRAME);
48ffc236 1626 pd = &pd[ptepindex & ((1ul << NPDEPGSHIFT) - 1)];
e8510e54
MD
1627 if (*pd == 0) {
1628 *pd = VM_PAGE_TO_PHYS(m) | PG_U | PG_RW |
1629 PG_V | PG_A | PG_M;
1630 } else {
1631 vm_page_unhold(pdpg);
1632 --m->wire_count;
1633 vm_page_wakeup(m);
1634 return(m);
1635 }
c8fe38ae
MD
1636 }
1637
48ffc236 1638 /*
e8510e54
MD
1639 * We successfully loaded a PDP, PD, or PTE. Set the page table hint,
1640 * valid bits, mapped flag, unbusy, and we're done.
48ffc236
JG
1641 */
1642 pmap->pm_ptphint = m;
1643
c8fe38ae
MD
1644 m->valid = VM_PAGE_BITS_ALL;
1645 vm_page_flag_clear(m, PG_ZERO);
1646 vm_page_flag_set(m, PG_MAPPED);
1647 vm_page_wakeup(m);
1648
e8510e54 1649 return (m);
c8fe38ae
MD
1650}
1651
1652static vm_page_t
1653pmap_allocpte(pmap_t pmap, vm_offset_t va)
d7f50089 1654{
c8fe38ae 1655 vm_pindex_t ptepindex;
48ffc236 1656 pd_entry_t *pd;
c8fe38ae
MD
1657 vm_page_t m;
1658
1659 /*
1660 * Calculate pagetable page index
1661 */
48ffc236 1662 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
1663
1664 /*
1665 * Get the page directory entry
1666 */
48ffc236 1667 pd = pmap_pde(pmap, va);
c8fe38ae
MD
1668
1669 /*
48ffc236 1670 * This supports switching from a 2MB page to a
c8fe38ae
MD
1671 * normal 4K page.
1672 */
48ffc236 1673 if (pd != NULL && (*pd & (PG_PS | PG_V)) == (PG_PS | PG_V)) {
1b2e0b92 1674 panic("no promotion/demotion yet");
48ffc236
JG
1675 *pd = 0;
1676 pd = NULL;
c8fe38ae
MD
1677 cpu_invltlb();
1678 smp_invltlb();
1679 }
1680
1681 /*
1682 * If the page table page is mapped, we just increment the
1683 * hold count, and activate it.
1684 */
48ffc236
JG
1685 if (pd != NULL && (*pd & PG_V) != 0) {
1686 /* YYY hint is used here on i386 */
1687 m = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
1688 pmap->pm_ptphint = m;
c8fe38ae
MD
1689 m->hold_count++;
1690 return m;
1691 }
1692 /*
1693 * Here if the pte page isn't mapped, or if it has been deallocated.
1694 */
1695 return _pmap_allocpte(pmap, ptepindex);
d7f50089
YY
1696}
1697
c8fe38ae
MD
1698
1699/***************************************************
1700 * Pmap allocation/deallocation routines.
1701 ***************************************************/
1702
d7f50089 1703/*
c8fe38ae
MD
1704 * Release any resources held by the given physical map.
1705 * Called when a pmap initialized by pmap_pinit is being released.
1706 * Should only be called if the map contains no valid mappings.
d7f50089 1707 */
c8fe38ae 1708static int pmap_release_callback(struct vm_page *p, void *data);
d7f50089 1709
c8fe38ae
MD
1710void
1711pmap_release(struct pmap *pmap)
d7f50089 1712{
c8fe38ae
MD
1713 vm_object_t object = pmap->pm_pteobj;
1714 struct rb_vm_page_scan_info info;
1715
1716 KASSERT(pmap->pm_active == 0, ("pmap still active! %08x", pmap->pm_active));
1717#if defined(DIAGNOSTIC)
1718 if (object->ref_count != 1)
1719 panic("pmap_release: pteobj reference count != 1");
1720#endif
1721
1722 info.pmap = pmap;
1723 info.object = object;
1724 crit_enter();
1725 TAILQ_REMOVE(&pmap_list, pmap, pm_pmnode);
1726 crit_exit();
1727
1728 do {
1729 crit_enter();
1730 info.error = 0;
1731 info.mpte = NULL;
1732 info.limit = object->generation;
1733
1734 vm_page_rb_tree_RB_SCAN(&object->rb_memq, NULL,
1735 pmap_release_callback, &info);
1736 if (info.error == 0 && info.mpte) {
1737 if (!pmap_release_free_page(pmap, info.mpte))
1738 info.error = 1;
1739 }
1740 crit_exit();
1741 } while (info.error);
d7f50089
YY
1742}
1743
d7f50089 1744static int
c8fe38ae 1745pmap_release_callback(struct vm_page *p, void *data)
d7f50089 1746{
c8fe38ae
MD
1747 struct rb_vm_page_scan_info *info = data;
1748
0a5c555b 1749 if (p->pindex == NUPDE + NUPDPE + PML4PML4I) {
c8fe38ae
MD
1750 info->mpte = p;
1751 return(0);
1752 }
1753 if (!pmap_release_free_page(info->pmap, p)) {
1754 info->error = 1;
1755 return(-1);
1756 }
1757 if (info->object->generation != info->limit) {
1758 info->error = 1;
1759 return(-1);
1760 }
1761 return(0);
d7f50089
YY
1762}
1763
1764/*
c8fe38ae 1765 * Grow the number of kernel page table entries, if needed.
d7f50089 1766 */
c8fe38ae
MD
1767
1768void
1769pmap_growkernel(vm_offset_t addr)
d7f50089 1770{
48ffc236 1771 vm_paddr_t paddr;
c8fe38ae
MD
1772 struct pmap *pmap;
1773 vm_offset_t ptppaddr;
1774 vm_page_t nkpg;
48ffc236
JG
1775 pd_entry_t *pde, newpdir;
1776 pdp_entry_t newpdp;
c8fe38ae
MD
1777
1778 crit_enter();
1779 if (kernel_vm_end == 0) {
1780 kernel_vm_end = KERNBASE;
1781 nkpt = 0;
48ffc236 1782 while ((*pmap_pde(&kernel_pmap, kernel_vm_end) & PG_V) != 0) {
c8fe38ae
MD
1783 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1784 nkpt++;
48ffc236
JG
1785 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1786 kernel_vm_end = kernel_map.max_offset;
1787 break;
1788 }
c8fe38ae
MD
1789 }
1790 }
48ffc236
JG
1791 addr = roundup2(addr, PAGE_SIZE * NPTEPG);
1792 if (addr - 1 >= kernel_map.max_offset)
1793 addr = kernel_map.max_offset;
c8fe38ae 1794 while (kernel_vm_end < addr) {
48ffc236
JG
1795 pde = pmap_pde(&kernel_pmap, kernel_vm_end);
1796 if (pde == NULL) {
1797 /* We need a new PDP entry */
1798 nkpg = vm_page_alloc(kptobj, nkpt,
1799 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM
1800 | VM_ALLOC_INTERRUPT);
1801 if (nkpg == NULL)
1802 panic("pmap_growkernel: no memory to grow kernel");
48ffc236 1803 paddr = VM_PAGE_TO_PHYS(nkpg);
7f2a2740
MD
1804 if ((nkpg->flags & PG_ZERO) == 0)
1805 pmap_zero_page(paddr);
1806 vm_page_flag_clear(nkpg, PG_ZERO);
48ffc236
JG
1807 newpdp = (pdp_entry_t)
1808 (paddr | PG_V | PG_RW | PG_A | PG_M);
1809 *pmap_pdpe(&kernel_pmap, kernel_vm_end) = newpdp;
7f2a2740 1810 nkpt++;
48ffc236
JG
1811 continue; /* try again */
1812 }
1813 if ((*pde & PG_V) != 0) {
c8fe38ae 1814 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
48ffc236
JG
1815 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1816 kernel_vm_end = kernel_map.max_offset;
1817 break;
1818 }
c8fe38ae
MD
1819 continue;
1820 }
1821
1822 /*
1823 * This index is bogus, but out of the way
1824 */
48ffc236 1825 nkpg = vm_page_alloc(kptobj, nkpt,
c8fe38ae
MD
1826 VM_ALLOC_NORMAL | VM_ALLOC_SYSTEM | VM_ALLOC_INTERRUPT);
1827 if (nkpg == NULL)
1828 panic("pmap_growkernel: no memory to grow kernel");
1829
1830 vm_page_wire(nkpg);
1831 ptppaddr = VM_PAGE_TO_PHYS(nkpg);
1832 pmap_zero_page(ptppaddr);
7f2a2740 1833 vm_page_flag_clear(nkpg, PG_ZERO);
c8fe38ae 1834 newpdir = (pd_entry_t) (ptppaddr | PG_V | PG_RW | PG_A | PG_M);
c8fe38ae
MD
1835 *pmap_pde(&kernel_pmap, kernel_vm_end) = newpdir;
1836 nkpt++;
1837
48ffc236
JG
1838 kernel_vm_end = (kernel_vm_end + PAGE_SIZE * NPTEPG) & ~(PAGE_SIZE * NPTEPG - 1);
1839 if (kernel_vm_end - 1 >= kernel_map.max_offset) {
1840 kernel_vm_end = kernel_map.max_offset;
1841 break;
c8fe38ae 1842 }
c8fe38ae
MD
1843 }
1844 crit_exit();
d7f50089
YY
1845}
1846
1847/*
c8fe38ae
MD
1848 * Retire the given physical map from service.
1849 * Should only be called if the map contains
1850 * no valid mappings.
d7f50089 1851 */
c8fe38ae
MD
1852void
1853pmap_destroy(pmap_t pmap)
d7f50089 1854{
c8fe38ae
MD
1855 int count;
1856
1857 if (pmap == NULL)
1858 return;
1859
1860 count = --pmap->pm_count;
1861 if (count == 0) {
1862 pmap_release(pmap);
1863 panic("destroying a pmap is not yet implemented");
1864 }
d7f50089
YY
1865}
1866
1867/*
c8fe38ae 1868 * Add a reference to the specified pmap.
d7f50089 1869 */
c8fe38ae
MD
1870void
1871pmap_reference(pmap_t pmap)
d7f50089 1872{
c8fe38ae
MD
1873 if (pmap != NULL) {
1874 pmap->pm_count++;
1875 }
d7f50089
YY
1876}
1877
c8fe38ae
MD
1878/***************************************************
1879* page management routines.
1880 ***************************************************/
d7f50089
YY
1881
1882/*
1883 * free the pv_entry back to the free list. This function may be
1884 * called from an interrupt.
1885 */
c8fe38ae 1886static PMAP_INLINE void
d7f50089
YY
1887free_pv_entry(pv_entry_t pv)
1888{
c8fe38ae 1889 pv_entry_count--;
48ffc236 1890 KKASSERT(pv_entry_count >= 0);
c8fe38ae 1891 zfree(pvzone, pv);
d7f50089
YY
1892}
1893
1894/*
1895 * get a new pv_entry, allocating a block from the system
1896 * when needed. This function may be called from an interrupt.
1897 */
1898static pv_entry_t
1899get_pv_entry(void)
1900{
c8fe38ae
MD
1901 pv_entry_count++;
1902 if (pv_entry_high_water &&
48ffc236
JG
1903 (pv_entry_count > pv_entry_high_water) &&
1904 (pmap_pagedaemon_waken == 0)) {
c8fe38ae 1905 pmap_pagedaemon_waken = 1;
48ffc236 1906 wakeup(&vm_pages_needed);
c8fe38ae
MD
1907 }
1908 return zalloc(pvzone);
d7f50089
YY
1909}
1910
1911/*
1912 * This routine is very drastic, but can save the system
1913 * in a pinch.
1914 */
1915void
1916pmap_collect(void)
1917{
c8fe38ae
MD
1918 int i;
1919 vm_page_t m;
1920 static int warningdone=0;
1921
1922 if (pmap_pagedaemon_waken == 0)
1923 return;
1924
1925 if (warningdone < 5) {
1926 kprintf("pmap_collect: collecting pv entries -- suggest increasing PMAP_SHPGPERPROC\n");
1927 warningdone++;
1928 }
1929
1930 for(i = 0; i < vm_page_array_size; i++) {
1931 m = &vm_page_array[i];
1932 if (m->wire_count || m->hold_count || m->busy ||
1933 (m->flags & PG_BUSY))
1934 continue;
1935 pmap_remove_all(m);
1936 }
48ffc236 1937 pmap_pagedaemon_waken = 0;
d7f50089
YY
1938}
1939
c8fe38ae 1940
d7f50089
YY
1941/*
1942 * If it is the first entry on the list, it is actually
1943 * in the header and we must copy the following entry up
1944 * to the header. Otherwise we must search the list for
1945 * the entry. In either case we free the now unused entry.
1946 */
1947static int
c8fe38ae
MD
1948pmap_remove_entry(struct pmap *pmap, vm_page_t m,
1949 vm_offset_t va, pmap_inval_info_t info)
1950{
1951 pv_entry_t pv;
1952 int rtval;
1953
1954 crit_enter();
1955 if (m->md.pv_list_count < pmap->pm_stats.resident_count) {
1956 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1957 if (pmap == pv->pv_pmap && va == pv->pv_va)
1958 break;
1959 }
1960 } else {
1961 TAILQ_FOREACH(pv, &pmap->pm_pvlist, pv_plist) {
1962 if (va == pv->pv_va)
1963 break;
1964 }
1965 }
1966
1967 rtval = 0;
48ffc236 1968 /* JGXXX When can 'pv' be NULL? */
c8fe38ae
MD
1969 if (pv) {
1970 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1971 m->md.pv_list_count--;
48ffc236 1972 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
1973 if (TAILQ_EMPTY(&m->md.pv_list))
1974 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
1975 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
1976 ++pmap->pm_generation;
1977 rtval = pmap_unuse_pt(pmap, va, pv->pv_ptem, info);
1978 free_pv_entry(pv);
1979 }
1980 crit_exit();
1981 return rtval;
d7f50089
YY
1982}
1983
1984/*
c8fe38ae
MD
1985 * Create a pv entry for page at pa for
1986 * (pmap, va).
d7f50089
YY
1987 */
1988static void
1989pmap_insert_entry(pmap_t pmap, vm_offset_t va, vm_page_t mpte, vm_page_t m)
1990{
c8fe38ae
MD
1991 pv_entry_t pv;
1992
1993 crit_enter();
1994 pv = get_pv_entry();
1995 pv->pv_va = va;
1996 pv->pv_pmap = pmap;
1997 pv->pv_ptem = mpte;
1998
1999 TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist);
2000 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2001 m->md.pv_list_count++;
2002
2003 crit_exit();
d7f50089
YY
2004}
2005
2006/*
2007 * pmap_remove_pte: do the things to unmap a page in a process
2008 */
2009static int
c8fe38ae
MD
2010pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
2011 pmap_inval_info_t info)
2012{
2013 pt_entry_t oldpte;
2014 vm_page_t m;
2015
2016 pmap_inval_add(info, pmap, va);
2017 oldpte = pte_load_clear(ptq);
2018 if (oldpte & PG_W)
2019 pmap->pm_stats.wired_count -= 1;
2020 /*
2021 * Machines that don't support invlpg, also don't support
2022 * PG_G. XXX PG_G is disabled for SMP so don't worry about
2023 * the SMP case.
2024 */
2025 if (oldpte & PG_G)
2026 cpu_invlpg((void *)va);
2027 KKASSERT(pmap->pm_stats.resident_count > 0);
2028 --pmap->pm_stats.resident_count;
2029 if (oldpte & PG_MANAGED) {
2030 m = PHYS_TO_VM_PAGE(oldpte);
2031 if (oldpte & PG_M) {
2032#if defined(PMAP_DIAGNOSTIC)
2033 if (pmap_nw_modified((pt_entry_t) oldpte)) {
2034 kprintf(
48ffc236 2035 "pmap_remove: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2036 va, oldpte);
2037 }
2038#endif
2039 if (pmap_track_modified(va))
2040 vm_page_dirty(m);
2041 }
2042 if (oldpte & PG_A)
2043 vm_page_flag_set(m, PG_REFERENCED);
2044 return pmap_remove_entry(pmap, m, va, info);
2045 } else {
2046 return pmap_unuse_pt(pmap, va, NULL, info);
2047 }
2048
d7f50089
YY
2049 return 0;
2050}
2051
2052/*
2053 * pmap_remove_page:
2054 *
2055 * Remove a single page from a process address space.
2056 *
2057 * This function may not be called from an interrupt if the pmap is
2058 * not kernel_pmap.
2059 */
2060static void
c8fe38ae
MD
2061pmap_remove_page(struct pmap *pmap, vm_offset_t va, pmap_inval_info_t info)
2062{
48ffc236 2063 pt_entry_t *pte;
c8fe38ae 2064
48ffc236
JG
2065 pte = pmap_pte(pmap, va);
2066 if (pte == NULL)
2067 return;
2068 if ((*pte & PG_V) == 0)
2069 return;
2070 pmap_remove_pte(pmap, pte, va, info);
d7f50089
YY
2071}
2072
2073/*
2074 * pmap_remove:
2075 *
2076 * Remove the given range of addresses from the specified map.
2077 *
2078 * It is assumed that the start and end are properly
2079 * rounded to the page size.
2080 *
2081 * This function may not be called from an interrupt if the pmap is
2082 * not kernel_pmap.
2083 */
2084void
2085pmap_remove(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva)
2086{
48ffc236
JG
2087 vm_offset_t va_next;
2088 pml4_entry_t *pml4e;
2089 pdp_entry_t *pdpe;
2090 pd_entry_t ptpaddr, *pde;
2091 pt_entry_t *pte;
c8fe38ae
MD
2092 struct pmap_inval_info info;
2093
2094 if (pmap == NULL)
2095 return;
2096
2097 if (pmap->pm_stats.resident_count == 0)
2098 return;
2099
2100 pmap_inval_init(&info);
2101
2102 /*
2103 * special handling of removing one page. a very
2104 * common operation and easy to short circuit some
2105 * code.
2106 */
48ffc236
JG
2107 if (sva + PAGE_SIZE == eva) {
2108 pde = pmap_pde(pmap, sva);
2109 if (pde && (*pde & PG_PS) == 0) {
2110 pmap_remove_page(pmap, sva, &info);
2111 pmap_inval_flush(&info);
2112 return;
2113 }
c8fe38ae
MD
2114 }
2115
48ffc236
JG
2116 for (; sva < eva; sva = va_next) {
2117 pml4e = pmap_pml4e(pmap, sva);
2118 if ((*pml4e & PG_V) == 0) {
2119 va_next = (sva + NBPML4) & ~PML4MASK;
2120 if (va_next < sva)
2121 va_next = eva;
2122 continue;
2123 }
c8fe38ae 2124
48ffc236
JG
2125 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2126 if ((*pdpe & PG_V) == 0) {
2127 va_next = (sva + NBPDP) & ~PDPMASK;
2128 if (va_next < sva)
2129 va_next = eva;
2130 continue;
2131 }
c8fe38ae
MD
2132
2133 /*
2134 * Calculate index for next page table.
2135 */
48ffc236
JG
2136 va_next = (sva + NBPDR) & ~PDRMASK;
2137 if (va_next < sva)
2138 va_next = eva;
c8fe38ae 2139
48ffc236
JG
2140 pde = pmap_pdpe_to_pde(pdpe, sva);
2141 ptpaddr = *pde;
c8fe38ae
MD
2142
2143 /*
48ffc236 2144 * Weed out invalid mappings.
c8fe38ae
MD
2145 */
2146 if (ptpaddr == 0)
2147 continue;
2148
48ffc236
JG
2149 /*
2150 * Check for large page.
2151 */
2152 if ((ptpaddr & PG_PS) != 0) {
2153 /* JG FreeBSD has more complex treatment here */
2154 pmap_inval_add(&info, pmap, -1);
2155 *pde = 0;
2156 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2157 continue;
2158 }
2159
c8fe38ae
MD
2160 /*
2161 * Limit our scan to either the end of the va represented
2162 * by the current page table page, or to the end of the
2163 * range being removed.
2164 */
48ffc236
JG
2165 if (va_next > eva)
2166 va_next = eva;
c8fe38ae
MD
2167
2168 /*
2169 * NOTE: pmap_remove_pte() can block.
2170 */
48ffc236
JG
2171 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2172 sva += PAGE_SIZE) {
2173 if (*pte == 0)
c8fe38ae 2174 continue;
48ffc236 2175 if (pmap_remove_pte(pmap, pte, sva, &info))
c8fe38ae
MD
2176 break;
2177 }
2178 }
2179 pmap_inval_flush(&info);
d7f50089
YY
2180}
2181
2182/*
2183 * pmap_remove_all:
2184 *
c8fe38ae
MD
2185 * Removes this physical page from all physical maps in which it resides.
2186 * Reflects back modify bits to the pager.
d7f50089 2187 *
c8fe38ae 2188 * This routine may not be called from an interrupt.
d7f50089 2189 */
c8fe38ae 2190
d7f50089
YY
2191static void
2192pmap_remove_all(vm_page_t m)
2193{
c8fe38ae
MD
2194 struct pmap_inval_info info;
2195 pt_entry_t *pte, tpte;
2196 pv_entry_t pv;
2197
2198 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
2199 return;
2200
2201 pmap_inval_init(&info);
2202 crit_enter();
2203 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2204 KKASSERT(pv->pv_pmap->pm_stats.resident_count > 0);
2205 --pv->pv_pmap->pm_stats.resident_count;
2206
2207 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
2208 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
2209 tpte = pte_load_clear(pte);
2210
2211 if (tpte & PG_W)
2212 pv->pv_pmap->pm_stats.wired_count--;
2213
2214 if (tpte & PG_A)
2215 vm_page_flag_set(m, PG_REFERENCED);
2216
2217 /*
2218 * Update the vm_page_t clean and reference bits.
2219 */
2220 if (tpte & PG_M) {
2221#if defined(PMAP_DIAGNOSTIC)
48ffc236 2222 if (pmap_nw_modified(tpte)) {
c8fe38ae 2223 kprintf(
48ffc236 2224 "pmap_remove_all: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2225 pv->pv_va, tpte);
2226 }
2227#endif
2228 if (pmap_track_modified(pv->pv_va))
2229 vm_page_dirty(m);
2230 }
2231 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2232 TAILQ_REMOVE(&pv->pv_pmap->pm_pvlist, pv, pv_plist);
2233 ++pv->pv_pmap->pm_generation;
2234 m->md.pv_list_count--;
48ffc236 2235 KKASSERT(m->md.pv_list_count >= 0);
c8fe38ae
MD
2236 if (TAILQ_EMPTY(&m->md.pv_list))
2237 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
2238 pmap_unuse_pt(pv->pv_pmap, pv->pv_va, pv->pv_ptem, &info);
2239 free_pv_entry(pv);
2240 }
2241 crit_exit();
2242 KKASSERT((m->flags & (PG_MAPPED|PG_WRITEABLE)) == 0);
2243 pmap_inval_flush(&info);
d7f50089
YY
2244}
2245
2246/*
2247 * pmap_protect:
2248 *
2249 * Set the physical protection on the specified range of this map
2250 * as requested.
2251 *
2252 * This function may not be called from an interrupt if the map is
2253 * not the kernel_pmap.
2254 */
2255void
2256pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2257{
48ffc236
JG
2258 vm_offset_t va_next;
2259 pml4_entry_t *pml4e;
2260 pdp_entry_t *pdpe;
2261 pd_entry_t ptpaddr, *pde;
2262 pt_entry_t *pte;
c8fe38ae
MD
2263 pmap_inval_info info;
2264
48ffc236
JG
2265 /* JG review for NX */
2266
c8fe38ae
MD
2267 if (pmap == NULL)
2268 return;
2269
2270 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
2271 pmap_remove(pmap, sva, eva);
2272 return;
2273 }
2274
2275 if (prot & VM_PROT_WRITE)
2276 return;
2277
2278 pmap_inval_init(&info);
2279
48ffc236 2280 for (; sva < eva; sva = va_next) {
c8fe38ae 2281
48ffc236
JG
2282 pml4e = pmap_pml4e(pmap, sva);
2283 if ((*pml4e & PG_V) == 0) {
2284 va_next = (sva + NBPML4) & ~PML4MASK;
2285 if (va_next < sva)
2286 va_next = eva;
2287 continue;
2288 }
c8fe38ae 2289
48ffc236
JG
2290 pdpe = pmap_pml4e_to_pdpe(pml4e, sva);
2291 if ((*pdpe & PG_V) == 0) {
2292 va_next = (sva + NBPDP) & ~PDPMASK;
2293 if (va_next < sva)
2294 va_next = eva;
2295 continue;
2296 }
c8fe38ae 2297
48ffc236
JG
2298 va_next = (sva + NBPDR) & ~PDRMASK;
2299 if (va_next < sva)
2300 va_next = eva;
c8fe38ae 2301
48ffc236
JG
2302 pde = pmap_pdpe_to_pde(pdpe, sva);
2303 ptpaddr = *pde;
c8fe38ae 2304
48ffc236
JG
2305 /*
2306 * Check for large page.
2307 */
2308 if ((ptpaddr & PG_PS) != 0) {
c8fe38ae 2309 pmap_inval_add(&info, pmap, -1);
48ffc236 2310 *pde &= ~(PG_M|PG_RW);
c8fe38ae
MD
2311 pmap->pm_stats.resident_count -= NBPDR / PAGE_SIZE;
2312 continue;
2313 }
2314
2315 /*
2316 * Weed out invalid mappings. Note: we assume that the page
2317 * directory table is always allocated, and in kernel virtual.
2318 */
2319 if (ptpaddr == 0)
2320 continue;
2321
48ffc236
JG
2322 if (va_next > eva)
2323 va_next = eva;
c8fe38ae 2324
48ffc236
JG
2325 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2326 sva += PAGE_SIZE) {
2327 pt_entry_t obits, pbits;
c8fe38ae
MD
2328 vm_page_t m;
2329
2330 /*
2331 * XXX non-optimal. Note also that there can be
2332 * no pmap_inval_flush() calls until after we modify
2333 * ptbase[sindex] (or otherwise we have to do another
2334 * pmap_inval_add() call).
2335 */
48ffc236
JG
2336 pmap_inval_add(&info, pmap, sva);
2337 obits = pbits = *pte;
2338 if ((pbits & PG_V) == 0)
2339 continue;
c8fe38ae
MD
2340 if (pbits & PG_MANAGED) {
2341 m = NULL;
2342 if (pbits & PG_A) {
48ffc236 2343 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2344 vm_page_flag_set(m, PG_REFERENCED);
2345 pbits &= ~PG_A;
2346 }
2347 if (pbits & PG_M) {
48ffc236 2348 if (pmap_track_modified(sva)) {
c8fe38ae 2349 if (m == NULL)
3cfe1a9f 2350 m = PHYS_TO_VM_PAGE(pbits & PG_FRAME);
c8fe38ae
MD
2351 vm_page_dirty(m);
2352 pbits &= ~PG_M;
2353 }
2354 }
2355 }
2356
2357 pbits &= ~PG_RW;
2358
48ffc236
JG
2359 if (pbits != obits) {
2360 *pte = pbits;
c8fe38ae
MD
2361 }
2362 }
2363 }
2364 pmap_inval_flush(&info);
d7f50089
YY
2365}
2366
2367/*
c8fe38ae
MD
2368 * Insert the given physical page (p) at
2369 * the specified virtual address (v) in the
2370 * target physical map with the protection requested.
d7f50089 2371 *
c8fe38ae
MD
2372 * If specified, the page will be wired down, meaning
2373 * that the related pte can not be reclaimed.
d7f50089 2374 *
c8fe38ae
MD
2375 * NB: This is the only routine which MAY NOT lazy-evaluate
2376 * or lose information. That is, this routine must actually
2377 * insert this page into the given map NOW.
d7f50089
YY
2378 */
2379void
2380pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot,
2381 boolean_t wired)
2382{
c8fe38ae 2383 vm_paddr_t pa;
48ffc236 2384 pd_entry_t *pde;
c8fe38ae
MD
2385 pt_entry_t *pte;
2386 vm_paddr_t opa;
48ffc236 2387 pt_entry_t origpte, newpte;
c8fe38ae
MD
2388 vm_page_t mpte;
2389 pmap_inval_info info;
2390
2391 if (pmap == NULL)
2392 return;
2393
48ffc236 2394 va = trunc_page(va);
c8fe38ae
MD
2395#ifdef PMAP_DIAGNOSTIC
2396 if (va >= KvaEnd)
2397 panic("pmap_enter: toobig");
2398 if ((va >= UPT_MIN_ADDRESS) && (va < UPT_MAX_ADDRESS))
48ffc236 2399 panic("pmap_enter: invalid to pmap_enter page table pages (va: 0x%lx)", va);
c8fe38ae
MD
2400#endif
2401 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2402 kprintf("Warning: pmap_enter called on UVA with kernel_pmap\n");
48ffc236
JG
2403#ifdef DDB
2404 db_print_backtrace();
2405#endif
c8fe38ae
MD
2406 }
2407 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2408 kprintf("Warning: pmap_enter called on KVA without kernel_pmap\n");
48ffc236
JG
2409#ifdef DDB
2410 db_print_backtrace();
2411#endif
c8fe38ae
MD
2412 }
2413
2414 /*
2415 * In the case that a page table page is not
2416 * resident, we are creating it here.
2417 */
48ffc236 2418 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2419 mpte = pmap_allocpte(pmap, va);
2420 else
2421 mpte = NULL;
2422
2423 pmap_inval_init(&info);
48ffc236
JG
2424 pde = pmap_pde(pmap, va);
2425 if (pde != NULL && (*pde & PG_V) != 0) {
2426 if ((*pde & PG_PS) != 0)
2427 panic("pmap_enter: attempted pmap_enter on 2MB page");
2428 pte = pmap_pde_to_pte(pde, va);
2429 } else
2430 panic("pmap_enter: invalid page directory va=%#lx", va);
2431
2432 KKASSERT(pte != NULL);
2433 pa = VM_PAGE_TO_PHYS(m);
48ffc236 2434 origpte = *pte;
c8fe38ae
MD
2435 opa = origpte & PG_FRAME;
2436
c8fe38ae
MD
2437 /*
2438 * Mapping has not changed, must be protection or wiring change.
2439 */
2440 if (origpte && (opa == pa)) {
2441 /*
2442 * Wiring change, just update stats. We don't worry about
2443 * wiring PT pages as they remain resident as long as there
2444 * are valid mappings in them. Hence, if a user page is wired,
2445 * the PT page will be also.
2446 */
2447 if (wired && ((origpte & PG_W) == 0))
2448 pmap->pm_stats.wired_count++;
2449 else if (!wired && (origpte & PG_W))
2450 pmap->pm_stats.wired_count--;
2451
2452#if defined(PMAP_DIAGNOSTIC)
48ffc236 2453 if (pmap_nw_modified(origpte)) {
c8fe38ae 2454 kprintf(
48ffc236 2455 "pmap_enter: modified page not writable: va: 0x%lx, pte: 0x%lx\n",
c8fe38ae
MD
2456 va, origpte);
2457 }
2458#endif
2459
2460 /*
2461 * Remove the extra pte reference. Note that we cannot
2462 * optimize the RO->RW case because we have adjusted the
2463 * wiring count above and may need to adjust the wiring
2464 * bits below.
2465 */
2466 if (mpte)
2467 mpte->hold_count--;
2468
2469 /*
2470 * We might be turning off write access to the page,
2471 * so we go ahead and sense modify status.
2472 */
2473 if (origpte & PG_MANAGED) {
2474 if ((origpte & PG_M) && pmap_track_modified(va)) {
2475 vm_page_t om;
2476 om = PHYS_TO_VM_PAGE(opa);
2477 vm_page_dirty(om);
2478 }
2479 pa |= PG_MANAGED;
2480 KKASSERT(m->flags & PG_MAPPED);
2481 }
2482 goto validate;
2483 }
2484 /*
2485 * Mapping has changed, invalidate old range and fall through to
2486 * handle validating new mapping.
2487 */
2488 if (opa) {
2489 int err;
2490 err = pmap_remove_pte(pmap, pte, va, &info);
2491 if (err)
48ffc236 2492 panic("pmap_enter: pte vanished, va: 0x%lx", va);
c8fe38ae
MD
2493 }
2494
2495 /*
2496 * Enter on the PV list if part of our managed memory. Note that we
2497 * raise IPL while manipulating pv_table since pmap_enter can be
2498 * called at interrupt time.
2499 */
2500 if (pmap_initialized &&
2501 (m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2502 pmap_insert_entry(pmap, va, mpte, m);
2503 pa |= PG_MANAGED;
2504 vm_page_flag_set(m, PG_MAPPED);
2505 }
2506
2507 /*
2508 * Increment counters
2509 */
2510 ++pmap->pm_stats.resident_count;
2511 if (wired)
2512 pmap->pm_stats.wired_count++;
2513
2514validate:
2515 /*
2516 * Now validate mapping with desired protection/wiring.
2517 */
48ffc236 2518 newpte = (pt_entry_t) (pa | pte_prot(pmap, prot) | PG_V);
c8fe38ae
MD
2519
2520 if (wired)
2521 newpte |= PG_W;
48ffc236 2522 if (va < VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2523 newpte |= PG_U;
2524 if (pmap == &kernel_pmap)
2525 newpte |= pgeflag;
2526
2527 /*
2528 * if the mapping or permission bits are different, we need
2529 * to update the pte.
2530 */
2531 if ((origpte & ~(PG_M|PG_A)) != newpte) {
2532 pmap_inval_add(&info, pmap, va);
2533 *pte = newpte | PG_A;
2534 if (newpte & PG_RW)
2535 vm_page_flag_set(m, PG_WRITEABLE);
2536 }
2537 KKASSERT((newpte & PG_MANAGED) == 0 || (m->flags & PG_MAPPED));
2538 pmap_inval_flush(&info);
d7f50089
YY
2539}
2540
2541/*
c8fe38ae
MD
2542 * This code works like pmap_enter() but assumes VM_PROT_READ and not-wired.
2543 * This code also assumes that the pmap has no pre-existing entry for this
2544 * VA.
d7f50089 2545 *
c8fe38ae 2546 * This code currently may only be used on user pmaps, not kernel_pmap.
d7f50089 2547 */
c8fe38ae
MD
2548static void
2549pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m)
d7f50089 2550{
c8fe38ae
MD
2551 pt_entry_t *pte;
2552 vm_paddr_t pa;
2553 vm_page_t mpte;
2554 vm_pindex_t ptepindex;
48ffc236 2555 pd_entry_t *ptepa;
c8fe38ae
MD
2556 pmap_inval_info info;
2557
2558 pmap_inval_init(&info);
2559
2560 if (va < UPT_MAX_ADDRESS && pmap == &kernel_pmap) {
2561 kprintf("Warning: pmap_enter_quick called on UVA with kernel_pmap\n");
48ffc236
JG
2562#ifdef DDB
2563 db_print_backtrace();
2564#endif
c8fe38ae
MD
2565 }
2566 if (va >= UPT_MAX_ADDRESS && pmap != &kernel_pmap) {
2567 kprintf("Warning: pmap_enter_quick called on KVA without kernel_pmap\n");
48ffc236
JG
2568#ifdef DDB
2569 db_print_backtrace();
2570#endif
c8fe38ae
MD
2571 }
2572
2573 KKASSERT(va < UPT_MIN_ADDRESS); /* assert used on user pmaps only */
2574
2575 /*
2576 * Calculate the page table page (mpte), allocating it if necessary.
2577 *
2578 * A held page table page (mpte), or NULL, is passed onto the
2579 * section following.
2580 */
48ffc236 2581 if (va < VM_MAX_USER_ADDRESS) {
c8fe38ae
MD
2582 /*
2583 * Calculate pagetable page index
2584 */
48ffc236 2585 ptepindex = pmap_pde_pindex(va);
c8fe38ae
MD
2586
2587 do {
2588 /*
2589 * Get the page directory entry
2590 */
48ffc236 2591 ptepa = pmap_pde(pmap, va);
c8fe38ae
MD
2592
2593 /*
2594 * If the page table page is mapped, we just increment
2595 * the hold count, and activate it.
2596 */
48ffc236
JG
2597 if (ptepa && (*ptepa & PG_V) != 0) {
2598 if (*ptepa & PG_PS)
2599 panic("pmap_enter_quick: unexpected mapping into 2MB page");
2600// if (pmap->pm_ptphint &&
2601// (pmap->pm_ptphint->pindex == ptepindex)) {
2602// mpte = pmap->pm_ptphint;
2603// } else {
c8fe38ae
MD
2604 mpte = pmap_page_lookup( pmap->pm_pteobj, ptepindex);
2605 pmap->pm_ptphint = mpte;
48ffc236 2606// }
c8fe38ae
MD
2607 if (mpte)
2608 mpte->hold_count++;
2609 } else {
2610 mpte = _pmap_allocpte(pmap, ptepindex);
2611 }
2612 } while (mpte == NULL);
2613 } else {
2614 mpte = NULL;
2615 /* this code path is not yet used */
2616 }
2617
2618 /*
2619 * With a valid (and held) page directory page, we can just use
2620 * vtopte() to get to the pte. If the pte is already present
2621 * we do not disturb it.
2622 */
2623 pte = vtopte(va);
2624 if (*pte & PG_V) {
2625 if (mpte)
48ffc236 2626 pmap_unwire_pte_hold(pmap, va, mpte, &info);
c8fe38ae
MD
2627 pa = VM_PAGE_TO_PHYS(m);
2628 KKASSERT(((*pte ^ pa) & PG_FRAME) == 0);
2629 return;
2630 }
2631
2632 /*
2633 * Enter on the PV list if part of our managed memory
2634 */
2635 if ((m->flags & (PG_FICTITIOUS|PG_UNMANAGED)) == 0) {
2636 pmap_insert_entry(pmap, va, mpte, m);
2637 vm_page_flag_set(m, PG_MAPPED);
2638 }
2639
2640 /*
2641 * Increment counters
2642 */
2643 ++pmap->pm_stats.resident_count;
2644
2645 pa = VM_PAGE_TO_PHYS(m);
2646
2647 /*
2648 * Now validate mapping with RO protection
2649 */
2650 if (m->flags & (PG_FICTITIOUS|PG_UNMANAGED))
2651 *pte = pa | PG_V | PG_U;
2652 else
2653 *pte = pa | PG_V | PG_U | PG_MANAGED;
2654/* pmap_inval_add(&info, pmap, va); shouldn't be needed inval->valid */
2655 pmap_inval_flush(&info);
d7f50089
YY
2656}
2657
2658/*
c8fe38ae
MD
2659 * Make a temporary mapping for a physical address. This is only intended
2660 * to be used for panic dumps.
d7f50089 2661 */
48ffc236 2662/* JG Needed on amd64? */
c8fe38ae
MD
2663void *
2664pmap_kenter_temporary(vm_paddr_t pa, int i)
d7f50089 2665{
c8fe38ae
MD
2666 pmap_kenter((vm_offset_t)crashdumpmap + (i * PAGE_SIZE), pa);
2667 return ((void *)crashdumpmap);
d7f50089
YY
2668}
2669
c8fe38ae
MD
2670#define MAX_INIT_PT (96)
2671
d7f50089
YY
2672/*
2673 * This routine preloads the ptes for a given object into the specified pmap.
2674 * This eliminates the blast of soft faults on process startup and
2675 * immediately after an mmap.
2676 */
2677static int pmap_object_init_pt_callback(vm_page_t p, void *data);
2678
2679void
2680pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_prot_t prot,
2681 vm_object_t object, vm_pindex_t pindex,
2682 vm_size_t size, int limit)
2683{
c8fe38ae
MD
2684 struct rb_vm_page_scan_info info;
2685 struct lwp *lp;
48ffc236 2686 vm_size_t psize;
c8fe38ae
MD
2687
2688 /*
2689 * We can't preinit if read access isn't set or there is no pmap
2690 * or object.
2691 */
2692 if ((prot & VM_PROT_READ) == 0 || pmap == NULL || object == NULL)
2693 return;
2694
2695 /*
2696 * We can't preinit if the pmap is not the current pmap
2697 */
2698 lp = curthread->td_lwp;
2699 if (lp == NULL || pmap != vmspace_pmap(lp->lwp_vmspace))
2700 return;
2701
2702 psize = amd64_btop(size);
2703
2704 if ((object->type != OBJT_VNODE) ||
2705 ((limit & MAP_PREFAULT_PARTIAL) && (psize > MAX_INIT_PT) &&
2706 (object->resident_page_count > MAX_INIT_PT))) {
2707 return;
2708 }
2709
2710 if (psize + pindex > object->size) {
2711 if (object->size < pindex)
2712 return;
2713 psize = object->size - pindex;
2714 }
2715
2716 if (psize == 0)
2717 return;
2718
2719 /*
2720 * Use a red-black scan to traverse the requested range and load
2721 * any valid pages found into the pmap.
2722 *
2723 * We cannot safely scan the object's memq unless we are in a
2724 * critical section since interrupts can remove pages from objects.
2725 */
2726 info.start_pindex = pindex;
2727 info.end_pindex = pindex + psize - 1;
2728 info.limit = limit;
2729 info.mpte = NULL;
2730 info.addr = addr;
2731 info.pmap = pmap;
2732
2733 crit_enter();
2734 vm_page_rb_tree_RB_SCAN(&object->rb_memq, rb_vm_page_scancmp,
2735 pmap_object_init_pt_callback, &info);
2736 crit_exit();
d7f50089
YY
2737}
2738
2739static
2740int
2741pmap_object_init_pt_callback(vm_page_t p, void *data)
2742{
c8fe38ae
MD
2743 struct rb_vm_page_scan_info *info = data;
2744 vm_pindex_t rel_index;
2745 /*
2746 * don't allow an madvise to blow away our really
2747 * free pages allocating pv entries.
2748 */
2749 if ((info->limit & MAP_PREFAULT_MADVISE) &&
2750 vmstats.v_free_count < vmstats.v_free_reserved) {
2751 return(-1);
2752 }
2753 if (((p->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2754 (p->busy == 0) && (p->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2755 if ((p->queue - p->pc) == PQ_CACHE)
2756 vm_page_deactivate(p);
2757 vm_page_busy(p);
2758 rel_index = p->pindex - info->start_pindex;
2759 pmap_enter_quick(info->pmap,
2760 info->addr + amd64_ptob(rel_index), p);
2761 vm_page_wakeup(p);
2762 }
d7f50089
YY
2763 return(0);
2764}
2765
2766/*
2767 * pmap_prefault provides a quick way of clustering pagefaults into a
2768 * processes address space. It is a "cousin" of pmap_object_init_pt,
2769 * except it runs at page fault time instead of mmap time.
2770 */
2771#define PFBAK 4
2772#define PFFOR 4
2773#define PAGEORDER_SIZE (PFBAK+PFFOR)
2774
2775static int pmap_prefault_pageorder[] = {
2776 -PAGE_SIZE, PAGE_SIZE,
2777 -2 * PAGE_SIZE, 2 * PAGE_SIZE,
2778 -3 * PAGE_SIZE, 3 * PAGE_SIZE,
2779 -4 * PAGE_SIZE, 4 * PAGE_SIZE
2780};
2781
2782void
2783pmap_prefault(pmap_t pmap, vm_offset_t addra, vm_map_entry_t entry)
2784{
c8fe38ae
MD
2785 int i;
2786 vm_offset_t starta;
2787 vm_offset_t addr;
2788 vm_pindex_t pindex;
2789 vm_page_t m;
2790 vm_object_t object;
2791 struct lwp *lp;
2792
2793 /*
2794 * We do not currently prefault mappings that use virtual page
2795 * tables. We do not prefault foreign pmaps.
2796 */
2797 if (entry->maptype == VM_MAPTYPE_VPAGETABLE)
2798 return;
2799 lp = curthread->td_lwp;
2800 if (lp == NULL || (pmap != vmspace_pmap(lp->lwp_vmspace)))
2801 return;
2802
2803 object = entry->object.vm_object;
2804
2805 starta = addra - PFBAK * PAGE_SIZE;
2806 if (starta < entry->start)
2807 starta = entry->start;
2808 else if (starta > addra)
2809 starta = 0;
2810
2811 /*
2812 * critical section protection is required to maintain the
2813 * page/object association, interrupts can free pages and remove
2814 * them from their objects.
2815 */
2816 crit_enter();
2817 for (i = 0; i < PAGEORDER_SIZE; i++) {
2818 vm_object_t lobject;
2819 pt_entry_t *pte;
665d7d25 2820 pd_entry_t *pde;
c8fe38ae
MD
2821
2822 addr = addra + pmap_prefault_pageorder[i];
2823 if (addr > addra + (PFFOR * PAGE_SIZE))
2824 addr = 0;
2825
2826 if (addr < starta || addr >= entry->end)
2827 continue;
2828
665d7d25
MD
2829 pde = pmap_pde(pmap, addr);
2830 if (pde == NULL || *pde == 0)
c8fe38ae
MD
2831 continue;
2832
2833 pte = vtopte(addr);
2834 if (*pte)
2835 continue;
2836
2837 pindex = ((addr - entry->start) + entry->offset) >> PAGE_SHIFT;
2838 lobject = object;
2839
2840 for (m = vm_page_lookup(lobject, pindex);
2841 (!m && (lobject->type == OBJT_DEFAULT) &&
2842 (lobject->backing_object));
2843 lobject = lobject->backing_object
2844 ) {
2845 if (lobject->backing_object_offset & PAGE_MASK)
2846 break;
2847 pindex += (lobject->backing_object_offset >> PAGE_SHIFT);
2848 m = vm_page_lookup(lobject->backing_object, pindex);
2849 }
2850
2851 /*
2852 * give-up when a page is not in memory
2853 */
2854 if (m == NULL)
2855 break;
2856
2857 if (((m->valid & VM_PAGE_BITS_ALL) == VM_PAGE_BITS_ALL) &&
2858 (m->busy == 0) &&
2859 (m->flags & (PG_BUSY | PG_FICTITIOUS)) == 0) {
2860
2861 if ((m->queue - m->pc) == PQ_CACHE) {
2862 vm_page_deactivate(m);
2863 }
2864 vm_page_busy(m);
2865 pmap_enter_quick(pmap, addr, m);
2866 vm_page_wakeup(m);
2867 }
2868 }
2869 crit_exit();
d7f50089
YY
2870}
2871
2872/*
2873 * Routine: pmap_change_wiring
2874 * Function: Change the wiring attribute for a map/virtual-address
2875 * pair.
2876 * In/out conditions:
2877 * The mapping must already exist in the pmap.
2878 */
2879void
2880pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
2881{
c8fe38ae
MD
2882 pt_entry_t *pte;
2883
2884 if (pmap == NULL)
2885 return;
2886
2887 pte = pmap_pte(pmap, va);
2888
2889 if (wired && !pmap_pte_w(pte))
2890 pmap->pm_stats.wired_count++;
2891 else if (!wired && pmap_pte_w(pte))
2892 pmap->pm_stats.wired_count--;
2893
2894 /*
2895 * Wiring is not a hardware characteristic so there is no need to
2896 * invalidate TLB. However, in an SMP environment we must use
2897 * a locked bus cycle to update the pte (if we are not using
2898 * the pmap_inval_*() API that is)... it's ok to do this for simple
2899 * wiring changes.
2900 */
2901#ifdef SMP
2902 if (wired)
71577ce5 2903 atomic_set_long(pte, PG_W);
c8fe38ae 2904 else
71577ce5 2905 atomic_clear_long(pte, PG_W);
c8fe38ae
MD
2906#else
2907 if (wired)
71577ce5 2908 atomic_set_long_nonlocked(pte, PG_W);
c8fe38ae 2909 else
71577ce5 2910 atomic_clear_long_nonlocked(pte, PG_W);
c8fe38ae 2911#endif
d7f50089
YY
2912}
2913
c8fe38ae
MD
2914
2915
d7f50089
YY
2916/*
2917 * Copy the range specified by src_addr/len
2918 * from the source map to the range dst_addr/len
2919 * in the destination map.
2920 *
2921 * This routine is only advisory and need not do anything.
2922 */
2923void
2924pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
2925 vm_size_t len, vm_offset_t src_addr)
2926{
c8fe38ae
MD
2927 pmap_inval_info info;
2928 vm_offset_t addr;
2929 vm_offset_t end_addr = src_addr + len;
2930 vm_offset_t pdnxt;
2931 pd_entry_t src_frame, dst_frame;
2932 vm_page_t m;
2933
2934 if (dst_addr != src_addr)
2935 return;
2936 /*
2937 * XXX BUGGY. Amoung other things srcmpte is assumed to remain
2938 * valid through blocking calls, and that's just not going to
2939 * be the case.
2940 *
2941 * FIXME!
2942 */
2943 return;
2944
f81851b8 2945#if 0
48ffc236 2946#if JGPMAP32
c8fe38ae
MD
2947 src_frame = src_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
2948 if (src_frame != (PTDpde & PG_FRAME)) {
2949 return;
2950 }
2951
2952 dst_frame = dst_pmap->pm_pdir[PTDPTDI] & PG_FRAME;
2953 if (dst_frame != (APTDpde & PG_FRAME)) {
2954 APTDpde = (pd_entry_t) (dst_frame | PG_RW | PG_V);
2955 /* The page directory is not shared between CPUs */
2956 cpu_invltlb();
2957 }
48ffc236 2958#endif
c8fe38ae
MD
2959 pmap_inval_init(&info);
2960 pmap_inval_add(&info, dst_pmap, -1);
2961 pmap_inval_add(&info, src_pmap, -1);
2962
2963 /*
2964 * critical section protection is required to maintain the page/object
2965 * association, interrupts can free pages and remove them from
2966 * their objects.
2967 */
2968 crit_enter();
2969 for (addr = src_addr; addr < end_addr; addr = pdnxt) {
2970 pt_entry_t *src_pte, *dst_pte;
2971 vm_page_t dstmpte, srcmpte;
2972 vm_offset_t srcptepaddr;
2973 vm_pindex_t ptepindex;
2974
2975 if (addr >= UPT_MIN_ADDRESS)
2976 panic("pmap_copy: invalid to pmap_copy page tables\n");
2977
2978 /*
2979 * Don't let optional prefaulting of pages make us go
2980 * way below the low water mark of free pages or way
2981 * above high water mark of used pv entries.
2982 */
2983 if (vmstats.v_free_count < vmstats.v_free_reserved ||
2984 pv_entry_count > pv_entry_high_water)
2985 break;
2986
2987 pdnxt = ((addr + PAGE_SIZE*NPTEPG) & ~(PAGE_SIZE*NPTEPG - 1));
2988 ptepindex = addr >> PDRSHIFT;
2989
48ffc236 2990#if JGPMAP32
c8fe38ae 2991 srcptepaddr = (vm_offset_t) src_pmap->pm_pdir[ptepindex];
48ffc236 2992#endif
c8fe38ae
MD
2993 if (srcptepaddr == 0)
2994 continue;
2995
2996 if (srcptepaddr & PG_PS) {
48ffc236 2997#if JGPMAP32
c8fe38ae
MD
2998 if (dst_pmap->pm_pdir[ptepindex] == 0) {
2999 dst_pmap->pm_pdir[ptepindex] = (pd_entry_t) srcptepaddr;
3000 dst_pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE;
3001 }
48ffc236 3002#endif
c8fe38ae
MD
3003 continue;
3004 }
3005
3006 srcmpte = vm_page_lookup(src_pmap->pm_pteobj, ptepindex);
3007 if ((srcmpte == NULL) || (srcmpte->hold_count == 0) ||
3008 (srcmpte->flags & PG_BUSY)) {
3009 continue;
3010 }
3011
3012 if (pdnxt > end_addr)
3013 pdnxt = end_addr;
3014
3015 src_pte = vtopte(addr);
48ffc236 3016#if JGPMAP32
c8fe38ae 3017 dst_pte = avtopte(addr);
48ffc236 3018#endif
c8fe38ae
MD
3019 while (addr < pdnxt) {
3020 pt_entry_t ptetemp;
3021
3022 ptetemp = *src_pte;
3023 /*
3024 * we only virtual copy managed pages
3025 */
3026 if ((ptetemp & PG_MANAGED) != 0) {
3027 /*
3028 * We have to check after allocpte for the
3029 * pte still being around... allocpte can
3030 * block.
3031 *
3032 * pmap_allocpte() can block. If we lose
3033 * our page directory mappings we stop.
3034 */
3035 dstmpte = pmap_allocpte(dst_pmap, addr);
3036
48ffc236 3037#if JGPMAP32
c8fe38ae
MD
3038 if (src_frame != (PTDpde & PG_FRAME) ||
3039 dst_frame != (APTDpde & PG_FRAME)
3040 ) {
3041 kprintf("WARNING: pmap_copy: detected and corrected race\n");
3042 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3043 goto failed;
3044 } else if ((*dst_pte == 0) &&
3045 (ptetemp = *src_pte) != 0 &&
3046 (ptetemp & PG_MANAGED)) {
3047 /*
3048 * Clear the modified and
3049 * accessed (referenced) bits
3050 * during the copy.
3051 */
3052 m = PHYS_TO_VM_PAGE(ptetemp);
3053 *dst_pte = ptetemp & ~(PG_M | PG_A);
3054 ++dst_pmap->pm_stats.resident_count;
3055 pmap_insert_entry(dst_pmap, addr,
3056 dstmpte, m);
3057 KKASSERT(m->flags & PG_MAPPED);
3058 } else {
3059 kprintf("WARNING: pmap_copy: dst_pte race detected and corrected\n");
3060 pmap_unwire_pte_hold(dst_pmap, dstmpte, &info);
3061 goto failed;
3062 }
48ffc236 3063#endif
c8fe38ae
MD
3064 if (dstmpte->hold_count >= srcmpte->hold_count)
3065 break;
3066 }
3067 addr += PAGE_SIZE;
3068 src_pte++;
3069 dst_pte++;
3070 }
3071 }
3072failed:
3073 crit_exit();
3074 pmap_inval_flush(&info);
f81851b8 3075#endif
d7f50089
YY
3076}
3077
3078/*
3079 * pmap_zero_page:
3080 *
48ffc236 3081 * Zero the specified physical page.
d7f50089
YY
3082 *
3083 * This function may be called from an interrupt and no locking is
3084 * required.
3085 */
3086void
3087pmap_zero_page(vm_paddr_t phys)
3088{
48ffc236 3089 vm_offset_t va = PHYS_TO_DMAP(phys);
c8fe38ae 3090
48ffc236 3091 pagezero((void *)va);
d7f50089
YY
3092}
3093
3094/*
3095 * pmap_page_assertzero:
3096 *
3097 * Assert that a page is empty, panic if it isn't.
3098 */
3099void
3100pmap_page_assertzero(vm_paddr_t phys)
3101{
c8fe38ae
MD
3102 struct mdglobaldata *gd = mdcpu;
3103 int i;
3104
3105 crit_enter();
48ffc236
JG
3106 vm_offset_t virt = PHYS_TO_DMAP(phys);
3107
c8fe38ae 3108 for (i = 0; i < PAGE_SIZE; i += sizeof(int)) {
48ffc236 3109 if (*(int *)((char *)virt + i) != 0) {
c8fe38ae 3110 panic("pmap_page_assertzero() @ %p not zero!\n",
48ffc236 3111 (void *)virt);
c8fe38ae
MD
3112 }
3113 }
c8fe38ae 3114 crit_exit();
d7f50089
YY
3115}
3116
3117/*
3118 * pmap_zero_page:
3119 *
3120 * Zero part of a physical page by mapping it into memory and clearing
3121 * its contents with bzero.
3122 *
3123 * off and size may not cover an area beyond a single hardware page.
3124 */
3125void
3126pmap_zero_page_area(vm_paddr_t phys, int off, int size)
3127{
c8fe38ae
MD
3128 struct mdglobaldata *gd = mdcpu;
3129
3130 crit_enter();
48ffc236
JG
3131 vm_offset_t virt = PHYS_TO_DMAP(phys);
3132 bzero((char *)virt + off, size);
c8fe38ae 3133 crit_exit();
d7f50089
YY
3134}
3135
3136/*
3137 * pmap_copy_page:
3138 *
3139 * Copy the physical page from the source PA to the target PA.
3140 * This function may be called from an interrupt. No locking
3141 * is required.
3142 */
3143void
3144pmap_copy_page(vm_paddr_t src, vm_paddr_t dst)
3145{
48ffc236 3146 vm_offset_t src_virt, dst_virt;
c8fe38ae
MD
3147
3148 crit_enter();
48ffc236
JG
3149 src_virt = PHYS_TO_DMAP(src);
3150 dst_virt = PHYS_TO_DMAP(dst);
3151 bcopy(src_virt, dst_virt, PAGE_SIZE);
c8fe38ae 3152 crit_exit();
d7f50089
YY
3153}
3154
3155/*
3156 * pmap_copy_page_frag:
3157 *
3158 * Copy the physical page from the source PA to the target PA.
3159 * This function may be called from an interrupt. No locking
3160 * is required.
3161 */
3162void
3163pmap_copy_page_frag(vm_paddr_t src, vm_paddr_t dst, size_t bytes)
3164{
48ffc236 3165 vm_offset_t src_virt, dst_virt;
c8fe38ae
MD
3166
3167 crit_enter();
48ffc236
JG
3168 src_virt = PHYS_TO_DMAP(src);
3169 dst_virt = PHYS_TO_DMAP(dst);
3170 bcopy((char *)src_virt + (src & PAGE_MASK),
3171 (char *)dst_virt + (dst & PAGE_MASK),
c8fe38ae 3172 bytes);
c8fe38ae 3173 crit_exit();
d7f50089
YY
3174}
3175
3176/*
3177 * Returns true if the pmap's pv is one of the first
3178 * 16 pvs linked to from this page. This count may
3179 * be changed upwards or downwards in the future; it
3180 * is only necessary that true be returned for a small
3181 * subset of pmaps for proper page aging.
3182 */
3183boolean_t
3184pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
3185{
c8fe38ae
MD
3186 pv_entry_t pv;
3187 int loops = 0;
3188
3189 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3190 return FALSE;
3191
3192 crit_enter();
3193
3194 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3195 if (pv->pv_pmap == pmap) {
3196 crit_exit();
3197 return TRUE;
3198 }
3199 loops++;
3200 if (loops >= 16)
3201 break;
3202 }
3203 crit_exit();
d7f50089
YY
3204 return (FALSE);
3205}
3206
3207/*
3208 * Remove all pages from specified address space
3209 * this aids process exit speeds. Also, this code
3210 * is special cased for current process only, but
3211 * can have the more generic (and slightly slower)
3212 * mode enabled. This is much faster than pmap_remove
3213 * in the case of running down an entire address space.
3214 */
3215void
3216pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
3217{
c8fe38ae
MD
3218 struct lwp *lp;
3219 pt_entry_t *pte, tpte;
3220 pv_entry_t pv, npv;
3221 vm_page_t m;
3222 pmap_inval_info info;
3223 int iscurrentpmap;
48ffc236 3224 int save_generation;
c8fe38ae
MD
3225
3226 lp = curthread->td_lwp;
3227 if (lp && pmap == vmspace_pmap(lp->lwp_vmspace))
3228 iscurrentpmap = 1;
3229 else
3230 iscurrentpmap = 0;
3231
3232 pmap_inval_init(&info);
3233 crit_enter();
3234 for (pv = TAILQ_FIRST(&pmap->pm_pvlist); pv; pv = npv) {
3235 if (pv->pv_va >= eva || pv->pv_va < sva) {
3236 npv = TAILQ_NEXT(pv, pv_plist);
3237 continue;
3238 }
3239
3240 KKASSERT(pmap == pv->pv_pmap);
3241
3242 if (iscurrentpmap)
3243 pte = vtopte(pv->pv_va);
3244 else
3245 pte = pmap_pte_quick(pmap, pv->pv_va);
3246 if (pmap->pm_active)
3247 pmap_inval_add(&info, pmap, pv->pv_va);
3248
3249 /*
3250 * We cannot remove wired pages from a process' mapping
3251 * at this time
3252 */
3253 if (*pte & PG_W) {
3254 npv = TAILQ_NEXT(pv, pv_plist);
3255 continue;
3256 }
3257 tpte = pte_load_clear(pte);
3258
48ffc236 3259 m = PHYS_TO_VM_PAGE(tpte & PG_FRAME);
c8fe38ae
MD
3260
3261 KASSERT(m < &vm_page_array[vm_page_array_size],
48ffc236 3262 ("pmap_remove_pages: bad tpte %lx", tpte));
c8fe38ae
MD
3263
3264 KKASSERT(pmap->pm_stats.resident_count > 0);
3265 --pmap->pm_stats.resident_count;
3266
3267 /*
3268 * Update the vm_page_t clean and reference bits.
3269 */
3270 if (tpte & PG_M) {
3271 vm_page_dirty(m);
3272 }
3273
3274 npv = TAILQ_NEXT(pv, pv_plist);
3275 TAILQ_REMOVE(&pmap->pm_pvlist, pv, pv_plist);
3276 save_generation = ++pmap->pm_generation;
3277
3278 m->md.pv_list_count--;
3279 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3280 if (TAILQ_EMPTY(&m->md.pv_list))
3281 vm_page_flag_clear(m, PG_MAPPED | PG_WRITEABLE);
3282
3283 pmap_unuse_pt(pmap, pv->pv_va, pv->pv_ptem, &info);
3284 free_pv_entry(pv);
3285
3286 /*
3287 * Restart the scan if we blocked during the unuse or free
3288 * calls and other removals were made.
3289 */
3290 if (save_generation != pmap->pm_generation) {
3291 kprintf("Warning: pmap_remove_pages race-A avoided\n");
3292 pv = TAILQ_FIRST(&pmap->pm_pvlist);
3293 }
3294 }
3295 pmap_inval_flush(&info);
3296 crit_exit();
d7f50089
YY
3297}
3298
3299/*
c8fe38ae
MD
3300 * pmap_testbit tests bits in pte's
3301 * note that the testbit/clearbit routines are inline,
3302 * and a lot of things compile-time evaluate.
d7f50089
YY
3303 */
3304static boolean_t
3305pmap_testbit(vm_page_t m, int bit)
3306{
c8fe38ae
MD
3307 pv_entry_t pv;
3308 pt_entry_t *pte;
3309
3310 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3311 return FALSE;
3312
3313 if (TAILQ_FIRST(&m->md.pv_list) == NULL)
3314 return FALSE;
3315
3316 crit_enter();
3317
3318 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3319 /*
3320 * if the bit being tested is the modified bit, then
3321 * mark clean_map and ptes as never
3322 * modified.
3323 */
3324 if (bit & (PG_A|PG_M)) {
3325 if (!pmap_track_modified(pv->pv_va))
3326 continue;
3327 }
3328
3329#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3330 if (pv->pv_pmap == NULL) {
3331 kprintf("Null pmap (tb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3332 continue;
3333 }
3334#endif
3335 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3336 if (*pte & bit) {
3337 crit_exit();
3338 return TRUE;
3339 }
3340 }
3341 crit_exit();
d7f50089
YY
3342 return (FALSE);
3343}
3344
3345/*
c8fe38ae 3346 * this routine is used to modify bits in ptes
d7f50089
YY
3347 */
3348static __inline void
3349pmap_clearbit(vm_page_t m, int bit)
3350{
c8fe38ae
MD
3351 struct pmap_inval_info info;
3352 pv_entry_t pv;
3353 pt_entry_t *pte;
3354 pt_entry_t pbits;
3355
3356 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3357 return;
3358
3359 pmap_inval_init(&info);
3360 crit_enter();
3361
3362 /*
3363 * Loop over all current mappings setting/clearing as appropos If
3364 * setting RO do we need to clear the VAC?
3365 */
3366 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3367 /*
3368 * don't write protect pager mappings
3369 */
3370 if (bit == PG_RW) {
3371 if (!pmap_track_modified(pv->pv_va))
3372 continue;
3373 }
3374
3375#if defined(PMAP_DIAGNOSTIC)
48ffc236
JG
3376 if (pv->pv_pmap == NULL) {
3377 kprintf("Null pmap (cb) at va: 0x%lx\n", pv->pv_va);
c8fe38ae
MD
3378 continue;
3379 }
3380#endif
3381
3382 /*
3383 * Careful here. We can use a locked bus instruction to
3384 * clear PG_A or PG_M safely but we need to synchronize
3385 * with the target cpus when we mess with PG_RW.
3386 *
3387 * We do not have to force synchronization when clearing
3388 * PG_M even for PTEs generated via virtual memory maps,
3389 * because the virtual kernel will invalidate the pmap
3390 * entry when/if it needs to resynchronize the Modify bit.
3391 */
3392 if (bit & PG_RW)
3393 pmap_inval_add(&info, pv->pv_pmap, pv->pv_va);
3394 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3395again:
3396 pbits = *pte;
3397 if (pbits & bit) {
3398 if (bit == PG_RW) {
3399 if (pbits & PG_M) {
3400 vm_page_dirty(m);
48ffc236 3401 atomic_clear_long(pte, PG_M|PG_RW);
c8fe38ae
MD
3402 } else {
3403 /*
3404 * The cpu may be trying to set PG_M
3405 * simultaniously with our clearing
3406 * of PG_RW.
3407 */
48ffc236 3408 if (!atomic_cmpset_long(pte, pbits,
c8fe38ae
MD
3409 pbits & ~PG_RW))
3410 goto again;
3411 }
3412 } else if (bit == PG_M) {
3413 /*
3414 * We could also clear PG_RW here to force
3415 * a fault on write to redetect PG_M for
3416 * virtual kernels, but it isn't necessary
3417 * since virtual kernels invalidate the pte
3418 * when they clear the VPTE_M bit in their
3419 * virtual page tables.
3420 */
48ffc236 3421 atomic_clear_long(pte, PG_M);
c8fe38ae 3422 } else {
48ffc236 3423 atomic_clear_long(pte, bit);
c8fe38ae
MD
3424 }
3425 }
3426 }
3427 pmap_inval_flush(&info);
3428 crit_exit();
d7f50089
YY
3429}
3430
3431/*
3432 * pmap_page_protect:
3433 *
3434 * Lower the permission for all mappings to a given page.
3435 */
3436void
3437pmap_page_protect(vm_page_t m, vm_prot_t prot)
3438{
48ffc236 3439 /* JG NX support? */
c8fe38ae
MD
3440 if ((prot & VM_PROT_WRITE) == 0) {
3441 if (prot & (VM_PROT_READ | VM_PROT_EXECUTE)) {
3442 pmap_clearbit(m, PG_RW);
3443 vm_page_flag_clear(m, PG_WRITEABLE);
3444 } else {
3445 pmap_remove_all(m);
3446 }
3447 }
d7f50089
YY
3448}
3449
3450vm_paddr_t
c8fe38ae 3451pmap_phys_address(vm_pindex_t ppn)
d7f50089 3452{
c8fe38ae 3453 return (amd64_ptob(ppn));
d7f50089
YY
3454}
3455
3456/*
3457 * pmap_ts_referenced:
3458 *
3459 * Return a count of reference bits for a page, clearing those bits.
3460 * It is not necessary for every reference bit to be cleared, but it
3461 * is necessary that 0 only be returned when there are truly no
3462 * reference bits set.
3463 *
3464 * XXX: The exact number of bits to check and clear is a matter that
3465 * should be tested and standardized at some point in the future for
3466 * optimal aging of shared pages.
3467 */
3468int
3469pmap_ts_referenced(vm_page_t m)
3470{
c8fe38ae
MD
3471 pv_entry_t pv, pvf, pvn;
3472 pt_entry_t *pte;
3473 int rtval = 0;
3474
3475 if (!pmap_initialized || (m->flags & PG_FICTITIOUS))
3476 return (rtval);
3477
3478 crit_enter();
3479
3480 if ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
3481
3482 pvf = pv;
3483
3484 do {
3485 pvn = TAILQ_NEXT(pv, pv_list);
3486
3487 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
3488
3489 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
3490
3491 if (!pmap_track_modified(pv->pv_va))
3492 continue;
3493
3494 pte = pmap_pte_quick(pv->pv_pmap, pv->pv_va);
3495
3496 if (pte && (*pte & PG_A)) {
3497#ifdef SMP
48ffc236 3498 atomic_clear_long(pte, PG_A);
c8fe38ae 3499#else
48ffc236 3500 atomic_clear_long_nonlocked(pte, PG_A);
c8fe38ae
MD
3501#endif
3502 rtval++;
3503 if (rtval > 4) {
3504 break;
3505 }
3506 }
3507 } while ((pv = pvn) != NULL && pv != pvf);
3508 }
3509 crit_exit();
3510
3511 return (rtval);
d7f50089
YY
3512}
3513
3514/*
3515 * pmap_is_modified:
3516 *
3517 * Return whether or not the specified physical page was modified
3518 * in any physical maps.
3519 */
3520boolean_t
3521pmap_is_modified(vm_page_t m)
3522{
c8fe38ae 3523 return pmap_testbit(m, PG_M);
d7f50089
YY
3524}
3525
3526/*
3527 * Clear the modify bits on the specified physical page.
3528 */
3529void
3530pmap_clear_modify(vm_page_t m)
3531{
c8fe38ae 3532 pmap_clearbit(m, PG_M);
d7f50089
YY
3533}
3534
3535/*
3536 * pmap_clear_reference:
3537 *
3538 * Clear the reference bit on the specified physical page.
3539 */
3540void
3541pmap_clear_reference(vm_page_t m)
3542{
c8fe38ae 3543 pmap_clearbit(m, PG_A);
d7f50089
YY
3544}
3545
d7f50089
YY
3546/*
3547 * Miscellaneous support routines follow
3548 */
3549
3550static void
3551i386_protection_init(void)
3552{
3553 int *kp, prot;
3554
48ffc236 3555 /* JG NX support may go here; No VM_PROT_EXECUTE ==> set NX bit */
d7f50089
YY
3556 kp = protection_codes;
3557 for (prot = 0; prot < 8; prot++) {
c8fe38ae
MD
3558 switch (prot) {
3559 case VM_PROT_NONE | VM_PROT_NONE | VM_PROT_NONE:
3560 /*
3561 * Read access is also 0. There isn't any execute bit,
3562 * so just make it readable.
3563 */
3564 case VM_PROT_READ | VM_PROT_NONE | VM_PROT_NONE:
3565 case VM_PROT_READ | VM_PROT_NONE | VM_PROT_EXECUTE:
3566 case VM_PROT_NONE | VM_PROT_NONE | VM_PROT_EXECUTE:
3567 *kp++ = 0;
3568 break;
3569 case VM_PROT_NONE | VM_PROT_WRITE | VM_PROT_NONE:
3570 case VM_PROT_NONE | VM_PROT_WRITE | VM_PROT_EXECUTE:
3571 case VM_PROT_READ | VM_PROT_WRITE | VM_PROT_NONE:
3572 case VM_PROT_READ | VM_PROT_WRITE | VM_PROT_EXECUTE:
3573 *kp++ = PG_RW;
3574 break;
3575 }
d7f50089
YY
3576 }
3577}
3578
3579/*
3580 * Map a set of physical memory pages into the kernel virtual
3581 * address space. Return a pointer to where it is mapped. This
3582 * routine is intended to be used for mapping device memory,
3583 * NOT real memory.
3584 *
3585 * NOTE: we can't use pgeflag unless we invalidate the pages one at
3586 * a time.
3587 */
3588void *
3589pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3590{
3591 vm_offset_t va, tmpva, offset;
c8fe38ae 3592 pt_entry_t *pte;
d7f50089
YY
3593
3594 offset = pa & PAGE_MASK;
3595 size = roundup(offset + size, PAGE_SIZE);
3596
3597 va = kmem_alloc_nofault(&kernel_map, size);
48ffc236 3598 if (va == 0)
d7f50089
YY
3599 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3600
48ffc236 3601 pa = pa & ~PAGE_MASK;
d7f50089 3602 for (tmpva = va; size > 0;) {
c8fe38ae
MD
3603 pte = vtopte(tmpva);
3604 *pte = pa | PG_RW | PG_V; /* | pgeflag; */
d7f50089
YY
3605 size -= PAGE_SIZE;
3606 tmpva += PAGE_SIZE;
3607 pa += PAGE_SIZE;
3608 }
3609 cpu_invltlb();
3610 smp_invltlb();
3611
057877ac
JG
3612 return ((void *)(va + offset));
3613}
3614
3615void *
3616pmap_mapdev_uncacheable(vm_paddr_t pa, vm_size_t size)
057877ac
JG
3617{
3618 vm_offset_t va, tmpva, offset;
3619 pt_entry_t *pte;
3620
3621 offset = pa & PAGE_MASK;
3622 size = roundup(offset + size, PAGE_SIZE);
3623
3624 va = kmem_alloc_nofault(&kernel_map, size);
3625 if (va == 0)
3626 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3627
3628 pa = pa & ~PAGE_MASK;
3629 for (tmpva = va; size > 0;) {
3630 pte = vtopte(tmpva);
3631 *pte = pa | PG_RW | PG_V | PG_N; /* | pgeflag; */
3632 size -= PAGE_SIZE;
3633 tmpva += PAGE_SIZE;
3634 pa += PAGE_SIZE;
3635 }
3636 cpu_invltlb();
3637 smp_invltlb();
3638
d7f50089
YY
3639 return ((void *)(va + offset));
3640}
3641
3642void
3643pmap_unmapdev(vm_offset_t va, vm_size_t size)
3644{
3645 vm_offset_t base, offset;
3646
48ffc236 3647 base = va & ~PAGE_MA