Do not try to set up hardware vectors for software interrupts.
[dragonfly.git] / sys / platform / pc32 / i386 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * William Jolitz.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
cb7f4ab1 39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.83 2005/11/16 02:24:28 dillon Exp $
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40 */
41
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42#include "use_apm.h"
43#include "use_ether.h"
44#include "use_npx.h"
45#include "use_isa.h"
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46#include "opt_atalk.h"
47#include "opt_compat.h"
48#include "opt_cpu.h"
49#include "opt_ddb.h"
50#include "opt_directio.h"
51#include "opt_inet.h"
52#include "opt_ipx.h"
53#include "opt_maxmem.h"
54#include "opt_msgbuf.h"
55#include "opt_perfmon.h"
56#include "opt_swap.h"
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57#include "opt_userconfig.h"
58
59#include <sys/param.h>
60#include <sys/systm.h>
61#include <sys/sysproto.h>
62#include <sys/signalvar.h>
63#include <sys/kernel.h>
64#include <sys/linker.h>
65#include <sys/malloc.h>
66#include <sys/proc.h>
67#include <sys/buf.h>
68#include <sys/reboot.h>
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69#include <sys/mbuf.h>
70#include <sys/msgbuf.h>
71#include <sys/sysent.h>
72#include <sys/sysctl.h>
73#include <sys/vmmeter.h>
74#include <sys/bus.h>
a722be49 75#include <sys/upcall.h>
cb7f4ab1 76#include <sys/usched.h>
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77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
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88#include <sys/thread2.h>
89
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90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
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96#include <machine/cpu.h>
97#include <machine/reg.h>
98#include <machine/clock.h>
99#include <machine/specialreg.h>
100#include <machine/bootinfo.h>
101#include <machine/ipl.h>
102#include <machine/md_var.h>
103#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
85100692 104#include <machine/globaldata.h> /* CPU_prvspace */
984263bc 105#include <machine/smp.h>
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106#ifdef PERFMON
107#include <machine/perfmon.h>
108#endif
109#include <machine/cputypes.h>
110
111#ifdef OLD_BUS_ARCH
1f2de5d4 112#include <bus/isa/i386/isa_device.h>
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113#endif
114#include <i386/isa/intr_machdep.h>
1f2de5d4 115#include <bus/isa/rtc.h>
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116#include <machine/vm86.h>
117#include <sys/random.h>
118#include <sys/ptrace.h>
119#include <machine/sigframe.h>
120
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121#define PHYSMAP_ENTRIES 10
122
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123extern void init386 (int first);
124extern void dblfault_handler (void);
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125
126extern void printcpuinfo(void); /* XXX header file */
127extern void finishidentcpu(void);
128extern void panicifcpuunsupported(void);
129extern void initializecpu(void);
130
3ae0cd58 131static void cpu_startup (void *);
642a6e88 132#ifndef CPU_DISABLE_SSE
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133static void set_fpregs_xmm (struct save87 *, struct savexmm *);
134static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
642a6e88 135#endif /* CPU_DISABLE_SSE */
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136#ifdef DIRECTIO
137extern void ffs_rawread_setup(void);
138#endif /* DIRECTIO */
8a8d5d85 139static void init_locks(void);
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140
141SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
142
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143int _udatasel, _ucodesel;
144u_int atdevbase;
145
146#if defined(SWTCH_OPTIM_STATS)
147extern int swtch_optim_stats;
148SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
149 CTLFLAG_RD, &swtch_optim_stats, 0, "");
150SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
151 CTLFLAG_RD, &tlb_flush_count, 0, "");
152#endif
153
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154int physmem = 0;
155int cold = 1;
156
157static int
158sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
159{
160 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
161 return (error);
162}
163
164SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
165 0, 0, sysctl_hw_physmem, "IU", "");
166
167static int
168sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
169{
170 int error = sysctl_handle_int(oidp, 0,
12e4aaff 171 ctob(physmem - vmstats.v_wire_count), req);
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172 return (error);
173}
174
175SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
176 0, 0, sysctl_hw_usermem, "IU", "");
177
178static int
179sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
180{
181 int error = sysctl_handle_int(oidp, 0,
182 i386_btop(avail_end - avail_start), req);
183 return (error);
184}
185
186SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
187 0, 0, sysctl_hw_availpages, "I", "");
188
189static int
190sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
191{
192 int error;
193
194 /* Unwind the buffer, so that it's linear (possibly starting with
195 * some initial nulls).
196 */
197 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
198 msgbufp->msg_size-msgbufp->msg_bufr,req);
199 if(error) return(error);
200 if(msgbufp->msg_bufr>0) {
201 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
202 msgbufp->msg_bufr,req);
203 }
204 return(error);
205}
206
207SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
208 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
209
210static int msgbuf_clear;
211
212static int
213sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
214{
215 int error;
216 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
217 req);
218 if (!error && req->newptr) {
219 /* Clear the buffer and reset write pointer */
220 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
221 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
222 msgbuf_clear=0;
223 }
224 return (error);
225}
226
227SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
228 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
229 "Clear kernel message buffer");
230
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231int bootverbose = 0;
232vm_paddr_t Maxmem = 0;
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233long dumplo;
234
ff1a75a1 235vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
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236
237static vm_offset_t buffer_sva, buffer_eva;
238vm_offset_t clean_sva, clean_eva;
239static vm_offset_t pager_sva, pager_eva;
240static struct trapframe proc0_tf;
241
242static void
243cpu_startup(dummy)
244 void *dummy;
245{
c9faf524 246 caddr_t v;
cb840899 247 vm_offset_t minaddr;
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248 vm_offset_t maxaddr;
249 vm_size_t size = 0;
250 int firstaddr;
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251
252 if (boothowto & RB_VERBOSE)
253 bootverbose++;
254
255 /*
256 * Good {morning,afternoon,evening,night}.
257 */
258 printf("%s", version);
259 startrtclock();
260 printcpuinfo();
261 panicifcpuunsupported();
262#ifdef PERFMON
263 perfmon_init();
264#endif
6ef943a3 265 printf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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266 /*
267 * Display any holes after the first chunk of extended memory.
268 */
269 if (bootverbose) {
270 int indx;
271
272 printf("Physical memory chunk(s):\n");
273 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
6ef943a3 274 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
984263bc 275
6ef943a3 276 printf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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277 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
278 size1 / PAGE_SIZE);
279 }
280 }
281
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282 /*
283 * Allocate space for system data structures.
284 * The first available kernel virtual address is in "v".
285 * As pages of kernel virtual memory are allocated, "v" is incremented.
286 * As pages of memory are allocated and cleared,
287 * "firstaddr" is incremented.
288 * An index into the kernel page table corresponding to the
289 * virtual memory address maintained in "v" is kept in "mapaddr".
290 */
291
292 /*
293 * Make two passes. The first pass calculates how much memory is
294 * needed and allocates it. The second pass assigns virtual
295 * addresses to the various data structures.
296 */
297 firstaddr = 0;
298again:
299 v = (caddr_t)firstaddr;
300
301#define valloc(name, type, num) \
302 (name) = (type *)v; v = (caddr_t)((name)+(num))
303#define valloclim(name, type, num, lim) \
304 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
305
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306 /*
307 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
308 * For the first 64MB of ram nominally allocate sufficient buffers to
309 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
310 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
311 * the buffer cache we limit the eventual kva reservation to
312 * maxbcache bytes.
313 *
314 * factor represents the 1/4 x ram conversion.
315 */
316 if (nbuf == 0) {
317 int factor = 4 * BKVASIZE / 1024;
318 int kbytes = physmem * (PAGE_SIZE / 1024);
319
320 nbuf = 50;
321 if (kbytes > 4096)
322 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
323 if (kbytes > 65536)
324 nbuf += (kbytes - 65536) * 2 / (factor * 5);
325 if (maxbcache && nbuf > maxbcache / BKVASIZE)
326 nbuf = maxbcache / BKVASIZE;
327 }
328
329 /*
330 * Do not allow the buffer_map to be more then 1/2 the size of the
331 * kernel_map.
332 */
333 if (nbuf > (kernel_map->max_offset - kernel_map->min_offset) /
334 (BKVASIZE * 2)) {
335 nbuf = (kernel_map->max_offset - kernel_map->min_offset) /
336 (BKVASIZE * 2);
337 printf("Warning: nbufs capped at %d\n", nbuf);
338 }
339
340 nswbuf = max(min(nbuf/4, 256), 16);
341#ifdef NSWBUF_MIN
342 if (nswbuf < NSWBUF_MIN)
343 nswbuf = NSWBUF_MIN;
344#endif
345#ifdef DIRECTIO
346 ffs_rawread_setup();
347#endif
348
349 valloc(swbuf, struct buf, nswbuf);
350 valloc(buf, struct buf, nbuf);
351 v = bufhashinit(v);
352
353 /*
354 * End of first pass, size has been calculated so allocate memory
355 */
356 if (firstaddr == 0) {
357 size = (vm_size_t)(v - firstaddr);
358 firstaddr = (int)kmem_alloc(kernel_map, round_page(size));
359 if (firstaddr == 0)
360 panic("startup: no room for tables");
361 goto again;
362 }
363
364 /*
365 * End of second pass, addresses have been assigned
366 */
367 if ((vm_size_t)(v - firstaddr) != size)
368 panic("startup: table size inconsistency");
369
370 clean_map = kmem_suballoc(kernel_map, &clean_sva, &clean_eva,
371 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
372 buffer_map = kmem_suballoc(clean_map, &buffer_sva, &buffer_eva,
373 (nbuf*BKVASIZE));
374 buffer_map->system_map = 1;
375 pager_map = kmem_suballoc(clean_map, &pager_sva, &pager_eva,
376 (nswbuf*MAXPHYS) + pager_map_size);
377 pager_map->system_map = 1;
378 exec_map = kmem_suballoc(kernel_map, &minaddr, &maxaddr,
379 (16*(ARG_MAX+(PAGE_SIZE*3))));
380
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381#if defined(USERCONFIG)
382 userconfig();
383 cninit(); /* the preferred console may have changed */
384#endif
385
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386 printf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
387 ptoa(vmstats.v_free_count) / 1024);
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388
389 /*
390 * Set up buffers, so they can be used to read disk labels.
391 */
392 bufinit();
393 vm_pager_bufferinit();
394
395#ifdef SMP
396 /*
397 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
398 */
399 mp_start(); /* fire up the APs and APICs */
400 mp_announce();
401#endif /* SMP */
402 cpu_setregs();
403}
404
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405/*
406 * Send an interrupt to process.
407 *
408 * Stack is set up to allow sigcode stored
409 * at top to call routine, followed by kcall
410 * to sigreturn routine below. After sigreturn
411 * resets the signal mask, the stack, and the
412 * frame pointer, it returns to the user
413 * specified pc, psl.
414 */
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415void
416sendsig(catcher, sig, mask, code)
417 sig_t catcher;
418 int sig;
419 sigset_t *mask;
420 u_long code;
421{
065b709a
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422 struct lwp *lp = curthread->td_lwp;
423 struct proc *p = lp->lwp_proc;
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424 struct trapframe *regs;
425 struct sigacts *psp = p->p_sigacts;
426 struct sigframe sf, *sfp;
427 int oonstack;
428
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SS
429 regs = lp->lwp_md.md_regs;
430 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
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431
432 /* save user context */
433 bzero(&sf, sizeof(struct sigframe));
434 sf.sf_uc.uc_sigmask = *mask;
065b709a 435 sf.sf_uc.uc_stack = lp->lwp_sigstk;
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436 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
437 sf.sf_uc.uc_mcontext.mc_gs = rgs();
438 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(struct trapframe));
439
440 /* Allocate and validate space for the signal handler context. */
065b709a 441 /* XXX lwp flags */
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442 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
443 SIGISMEMBER(psp->ps_sigonstack, sig)) {
065b709a
SS
444 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
445 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
446 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
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447 }
448 else
449 sfp = (struct sigframe *)regs->tf_esp - 1;
450
451 /* Translate the signal is appropriate */
452 if (p->p_sysent->sv_sigtbl) {
453 if (sig <= p->p_sysent->sv_sigsize)
454 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
455 }
456
457 /* Build the argument list for the signal handler. */
458 sf.sf_signum = sig;
459 sf.sf_ucontext = (register_t)&sfp->sf_uc;
065b709a 460 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
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461 /* Signal handler installed with SA_SIGINFO. */
462 sf.sf_siginfo = (register_t)&sfp->sf_si;
463 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
464
465 /* fill siginfo structure */
466 sf.sf_si.si_signo = sig;
467 sf.sf_si.si_code = code;
468 sf.sf_si.si_addr = (void*)regs->tf_err;
469 }
470 else {
471 /* Old FreeBSD-style arguments. */
472 sf.sf_siginfo = code;
473 sf.sf_addr = regs->tf_err;
474 sf.sf_ahu.sf_handler = catcher;
475 }
476
477 /*
478 * If we're a vm86 process, we want to save the segment registers.
479 * We also change eflags to be our emulated eflags, not the actual
480 * eflags.
481 */
482 if (regs->tf_eflags & PSL_VM) {
483 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
065b709a 484 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
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485
486 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
487 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
488 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
489 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
490
491 if (vm86->vm86_has_vme == 0)
492 sf.sf_uc.uc_mcontext.mc_eflags =
493 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
494 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
495
496 /*
497 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
498 * syscalls made by the signal handler. This just avoids
499 * wasting time for our lazy fixup of such faults. PSL_NT
500 * does nothing in vm86 mode, but vm86 programs can set it
501 * almost legitimately in probes for old cpu types.
502 */
503 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
504 }
505
506 /*
507 * Copy the sigframe out to the user's stack.
508 */
509 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
510 /*
511 * Something is wrong with the stack pointer.
512 * ...Kill the process.
513 */
514 sigexit(p, SIGILL);
515 }
516
517 regs->tf_esp = (int)sfp;
518 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
519 regs->tf_eflags &= ~PSL_T;
520 regs->tf_cs = _ucodesel;
521 regs->tf_ds = _udatasel;
522 regs->tf_es = _udatasel;
523 regs->tf_fs = _udatasel;
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524 regs->tf_ss = _udatasel;
525}
526
527/*
65957d54 528 * sigreturn(ucontext_t *sigcntxp)
41c20dac 529 *
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530 * System call to cleanup state after a signal
531 * has been taken. Reset signal mask and
532 * stack state from context left by sendsig (above).
533 * Return to previous pc and psl as specified by
534 * context left by sendsig. Check carefully to
535 * make sure that the user has not modified the
536 * state to gain improper privileges.
537 */
538#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
539#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
540
984263bc 541int
41c20dac 542sigreturn(struct sigreturn_args *uap)
984263bc 543{
065b709a 544 struct lwp *lp = curthread->td_lwp;
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545 struct trapframe *regs;
546 ucontext_t *ucp;
547 int cs, eflags;
548
549 ucp = uap->sigcntxp;
550
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551 if (!useracc((caddr_t)ucp, sizeof(ucontext_t), VM_PROT_READ))
552 return (EFAULT);
553
065b709a 554 regs = lp->lwp_md.md_regs;
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555 eflags = ucp->uc_mcontext.mc_eflags;
556
557 if (eflags & PSL_VM) {
558 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
559 struct vm86_kernel *vm86;
560
561 /*
562 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
563 * set up the vm86 area, and we can't enter vm86 mode.
564 */
065b709a 565 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
984263bc 566 return (EINVAL);
065b709a 567 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
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568 if (vm86->vm86_inited == 0)
569 return (EINVAL);
570
571 /* go back to user mode if both flags are set */
572 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
065b709a 573 trapsignal(lp->lwp_proc, SIGBUS, 0);
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574
575 if (vm86->vm86_has_vme) {
576 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
577 (eflags & VME_USERCHANGE) | PSL_VM;
578 } else {
579 vm86->vm86_eflags = eflags; /* save VIF, VIP */
580 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
581 }
582 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
583 tf->tf_eflags = eflags;
584 tf->tf_vm86_ds = tf->tf_ds;
585 tf->tf_vm86_es = tf->tf_es;
586 tf->tf_vm86_fs = tf->tf_fs;
587 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
588 tf->tf_ds = _udatasel;
589 tf->tf_es = _udatasel;
590 tf->tf_fs = _udatasel;
591 } else {
592 /*
593 * Don't allow users to change privileged or reserved flags.
594 */
595 /*
596 * XXX do allow users to change the privileged flag PSL_RF.
597 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
598 * should sometimes set it there too. tf_eflags is kept in
599 * the signal context during signal handling and there is no
600 * other place to remember it, so the PSL_RF bit may be
601 * corrupted by the signal handler without us knowing.
602 * Corruption of the PSL_RF bit at worst causes one more or
603 * one less debugger trap, so allowing it is fairly harmless.
604 */
605 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
606 printf("sigreturn: eflags = 0x%x\n", eflags);
607 return(EINVAL);
608 }
609
610 /*
611 * Don't allow users to load a valid privileged %cs. Let the
612 * hardware check for invalid selectors, excess privilege in
613 * other selectors, invalid %eip's and invalid %esp's.
614 */
615 cs = ucp->uc_mcontext.mc_cs;
616 if (!CS_SECURE(cs)) {
617 printf("sigreturn: cs = 0x%x\n", cs);
065b709a 618 trapsignal(lp->lwp_proc, SIGBUS, T_PROTFLT);
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619 return(EINVAL);
620 }
621 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(struct trapframe));
622 }
623
624 if (ucp->uc_mcontext.mc_onstack & 1)
065b709a 625 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
984263bc 626 else
065b709a 627 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
984263bc 628
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629 lp->lwp_sigmask = ucp->uc_sigmask;
630 SIG_CANTMASK(lp->lwp_sigmask);
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631 return(EJUSTRETURN);
632}
633
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634/*
635 * Stack frame on entry to function. %eax will contain the function vector,
636 * %ecx will contain the function data. flags, ecx, and eax will have
637 * already been pushed on the stack.
638 */
639struct upc_frame {
640 register_t eax;
641 register_t ecx;
0a455ac5 642 register_t edx;
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643 register_t flags;
644 register_t oldip;
645};
646
647void
648sendupcall(struct vmupcall *vu, int morepending)
649{
065b709a 650 struct lwp *lp = curthread->td_lwp;
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651 struct trapframe *regs;
652 struct upcall upcall;
653 struct upc_frame upc_frame;
6e58b5df 654 int crit_count = 0;
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655
656 /*
657 * Get the upcall data structure
658 */
065b709a 659 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
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660 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
661 ) {
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662 vu->vu_pending = 0;
663 printf("bad upcall address\n");
664 return;
665 }
666
667 /*
668 * If the data structure is already marked pending or has a critical
669 * section count, mark the data structure as pending and return
670 * without doing an upcall. vu_pending is left set.
671 */
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672 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
673 if (upcall.upc_pending < vu->vu_pending) {
674 upcall.upc_pending = vu->vu_pending;
065b709a 675 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
6e58b5df 676 sizeof(upcall.upc_pending));
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677 }
678 return;
679 }
680
681 /*
682 * We can run this upcall now, clear vu_pending.
683 *
684 * Bump our critical section count and set or clear the
685 * user pending flag depending on whether more upcalls are
686 * pending. The user will be responsible for calling
687 * upc_dispatch(-1) to process remaining upcalls.
688 */
689 vu->vu_pending = 0;
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690 upcall.upc_pending = morepending;
691 crit_count += TDPRI_CRIT;
065b709a 692 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
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693 sizeof(upcall.upc_pending));
694 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
695 sizeof(int));
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696
697 /*
698 * Construct a stack frame and issue the upcall
699 */
065b709a 700 regs = lp->lwp_md.md_regs;
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701 upc_frame.eax = regs->tf_eax;
702 upc_frame.ecx = regs->tf_ecx;
0a455ac5 703 upc_frame.edx = regs->tf_edx;
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704 upc_frame.flags = regs->tf_eflags;
705 upc_frame.oldip = regs->tf_eip;
706 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
707 sizeof(upc_frame)) != 0) {
708 printf("bad stack on upcall\n");
709 } else {
710 regs->tf_eax = (register_t)vu->vu_func;
711 regs->tf_ecx = (register_t)vu->vu_data;
065b709a 712 regs->tf_edx = (register_t)lp->lwp_upcall;
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713 regs->tf_eip = (register_t)vu->vu_ctx;
714 regs->tf_esp -= sizeof(upc_frame);
715 }
716}
717
718/*
719 * fetchupcall occurs in the context of a system call, which means that
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720 * we have to return EJUSTRETURN in order to prevent eax and edx from
721 * being overwritten by the syscall return value.
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722 *
723 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
724 * and the function pointer in %eax.
725 */
726int
0a455ac5 727fetchupcall (struct vmupcall *vu, int morepending, void *rsp)
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728{
729 struct upc_frame upc_frame;
065b709a 730 struct lwp *lp = curthread->td_lwp;
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731 struct trapframe *regs;
732 int error;
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733 struct upcall upcall;
734 int crit_count;
a722be49 735
065b709a 736 regs = lp->lwp_md.md_regs;
a722be49 737
065b709a 738 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
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739 if (error == 0) {
740 if (vu) {
741 /*
742 * This jumps us to the next ready context.
743 */
744 vu->vu_pending = 0;
065b709a 745 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
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746 crit_count = 0;
747 if (error == 0)
748 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
749 crit_count += TDPRI_CRIT;
a722be49 750 if (error == 0)
6e58b5df 751 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
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752 regs->tf_eax = (register_t)vu->vu_func;
753 regs->tf_ecx = (register_t)vu->vu_data;
065b709a 754 regs->tf_edx = (register_t)lp->lwp_upcall;
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755 regs->tf_eip = (register_t)vu->vu_ctx;
756 regs->tf_esp = (register_t)rsp;
757 } else {
758 /*
759 * This returns us to the originally interrupted code.
760 */
761 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
762 regs->tf_eax = upc_frame.eax;
763 regs->tf_ecx = upc_frame.ecx;
0a455ac5 764 regs->tf_edx = upc_frame.edx;
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765 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
766 (upc_frame.flags & PSL_USERCHANGE);
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767 regs->tf_eip = upc_frame.oldip;
768 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
769 }
770 }
771 if (error == 0)
772 error = EJUSTRETURN;
773 return(error);
774}
775
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776/*
777 * Machine dependent boot() routine
778 *
779 * I haven't seen anything to put here yet
780 * Possibly some stuff might be grafted back here from boot()
781 */
782void
783cpu_boot(int howto)
784{
785}
786
787/*
788 * Shutdown the CPU as much as possible
789 */
790void
791cpu_halt(void)
792{
793 for (;;)
794 __asm__ ("hlt");
795}
796
797/*
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798 * cpu_idle() represents the idle LWKT. You cannot return from this function
799 * (unless you want to blow things up!). Instead we look for runnable threads
800 * and loop or halt as appropriate. Giant is not held on entry to the thread.
984263bc 801 *
26a0694b 802 * The main loop is entered with a critical section held, we must release
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803 * the critical section before doing anything else. lwkt_switch() will
804 * check for pending interrupts due to entering and exiting its own
805 * critical section.
26a0694b 806 *
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807 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
808 * to wake a HLTed cpu up. However, there are cases where the idlethread
809 * will be entered with the possibility that no IPI will occur and in such
810 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
984263bc 811 */
96728c05 812static int cpu_idle_hlt = 1;
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813static int cpu_idle_hltcnt;
814static int cpu_idle_spincnt;
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815SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
816 &cpu_idle_hlt, 0, "Idle loop HLT enable");
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817SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
818 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
819SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
820 &cpu_idle_spincnt, 0, "Idle loop entry spins");
984263bc 821
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822static void
823cpu_idle_default_hook(void)
824{
825 /*
826 * We must guarentee that hlt is exactly the instruction
827 * following the sti.
828 */
829 __asm __volatile("sti; hlt");
830}
831
832/* Other subsystems (e.g., ACPI) can hook this later. */
833void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
834
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835void
836cpu_idle(void)
837{
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838 struct thread *td = curthread;
839
26a0694b 840 crit_exit();
a2a5ad0d 841 KKASSERT(td->td_pri < TDPRI_CRIT);
8ad65e08 842 for (;;) {
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843 /*
844 * See if there are any LWKTs ready to go.
845 */
8ad65e08 846 lwkt_switch();
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847
848 /*
849 * If we are going to halt call splz unconditionally after
850 * CLIing to catch any interrupt races. Note that we are
851 * at SPL0 and interrupts are enabled.
852 */
853 if (cpu_idle_hlt && !lwkt_runnable() &&
854 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
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855 __asm __volatile("cli");
856 splz();
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857 if (!lwkt_runnable())
858 cpu_idle_hook();
859#ifdef SMP
860 else
861 __asm __volatile("pause");
862#endif
60f945af 863 ++cpu_idle_hltcnt;
8ad65e08 864 } else {
a2a5ad0d 865 td->td_flags &= ~TDF_IDLE_NOHLT;
60f945af 866 splz();
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867#ifdef SMP
868 __asm __volatile("sti; pause");
869#else
8ad65e08 870 __asm __volatile("sti");
8b6d0f3f 871#endif
60f945af 872 ++cpu_idle_spincnt;
8ad65e08 873 }
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874 }
875}
876
877/*
878 * Clear registers on exec
879 */
880void
881setregs(p, entry, stack, ps_strings)
882 struct proc *p;
883 u_long entry;
884 u_long stack;
885 u_long ps_strings;
886{
887 struct trapframe *regs = p->p_md.md_regs;
b7c628e4 888 struct pcb *pcb = p->p_thread->td_pcb;
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889
890 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
891 pcb->pcb_gs = _udatasel;
892 load_gs(_udatasel);
893
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894 /* was i386_user_cleanup() in NetBSD */
895 user_ldt_free(pcb);
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896
897 bzero((char *)regs, sizeof(struct trapframe));
898 regs->tf_eip = entry;
899 regs->tf_esp = stack;
900 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
901 regs->tf_ss = _udatasel;
902 regs->tf_ds = _udatasel;
903 regs->tf_es = _udatasel;
904 regs->tf_fs = _udatasel;
905 regs->tf_cs = _ucodesel;
906
907 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
908 regs->tf_ebx = ps_strings;
909
910 /*
911 * Reset the hardware debug registers if they were in use.
912 * They won't have any meaning for the newly exec'd process.
913 */
914 if (pcb->pcb_flags & PCB_DBREGS) {
915 pcb->pcb_dr0 = 0;
916 pcb->pcb_dr1 = 0;
917 pcb->pcb_dr2 = 0;
918 pcb->pcb_dr3 = 0;
919 pcb->pcb_dr6 = 0;
920 pcb->pcb_dr7 = 0;
b7c628e4 921 if (pcb == curthread->td_pcb) {
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922 /*
923 * Clear the debug registers on the running
924 * CPU, otherwise they will end up affecting
925 * the next process we switch to.
926 */
927 reset_dbregs();
928 }
929 pcb->pcb_flags &= ~PCB_DBREGS;
930 }
931
932 /*
933 * Initialize the math emulator (if any) for the current process.
934 * Actually, just clear the bit that says that the emulator has
935 * been initialized. Initialization is delayed until the process
936 * traps to the emulator (if it is done at all) mainly because
937 * emulators don't provide an entry point for initialization.
938 */
b7c628e4 939 p->p_thread->td_pcb->pcb_flags &= ~FP_SOFTFP;
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940
941 /*
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942 * note: do not set CR0_TS here. npxinit() must do it after clearing
943 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
944 * in npxdna().
984263bc 945 */
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946 crit_enter();
947 load_cr0(rcr0() | CR0_MP);
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948
949#if NNPX > 0
950 /* Initialize the npx (if any) for the current process. */
951 npxinit(__INITIAL_NPXCW__);
952#endif
a02705a9 953 crit_exit();
984263bc 954
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955 /*
956 * note: linux emulator needs edx to be 0x0 on entry, which is
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957 * handled in execve simply by setting the 64 bit syscall
958 * return value to 0.
90b9818c 959 */
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960}
961
962void
963cpu_setregs(void)
964{
965 unsigned int cr0;
966
967 cr0 = rcr0();
968 cr0 |= CR0_NE; /* Done by npxinit() */
969 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
970#ifdef I386_CPU
971 if (cpu_class != CPUCLASS_386)
972#endif
973 cr0 |= CR0_WP | CR0_AM;
974 load_cr0(cr0);
975 load_gs(_udatasel);
976}
977
978static int
979sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
980{
981 int error;
982 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
983 req);
984 if (!error && req->newptr)
985 resettodr();
986 return (error);
987}
988
989SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
990 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
991
992SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
993 CTLFLAG_RW, &disable_rtc_set, 0, "");
994
995SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
996 CTLFLAG_RD, &bootinfo, bootinfo, "");
997
998SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
999 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1000
1001extern u_long bootdev; /* not a dev_t - encoding is different */
1002SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1003 CTLFLAG_RD, &bootdev, 0, "Boot device (not in dev_t format)");
1004
1005/*
1006 * Initialize 386 and configure to run kernel
1007 */
1008
1009/*
1010 * Initialize segments & interrupt table
1011 */
1012
1013int _default_ldt;
1014union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1015static struct gate_descriptor idt0[NIDT];
1016struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1017union descriptor ldt[NLDT]; /* local descriptor table */
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1018
1019/* table descriptors - used to load tables by cpu */
984263bc 1020struct region_descriptor r_gdt, r_idt;
984263bc 1021
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1022#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1023extern int has_f00f_bug;
1024#endif
1025
1026static struct i386tss dblfault_tss;
1027static char dblfault_stack[PAGE_SIZE];
1028
1029extern struct user *proc0paddr;
1030
1031
1032/* software prototypes -- in more palatable form */
1033struct soft_segment_descriptor gdt_segs[] = {
1034/* GNULL_SEL 0 Null Descriptor */
1035{ 0x0, /* segment base address */
1036 0x0, /* length */
1037 0, /* segment type */
1038 0, /* segment descriptor priority level */
1039 0, /* segment descriptor present */
1040 0, 0,
1041 0, /* default 32 vs 16 bit size */
1042 0 /* limit granularity (byte/page units)*/ },
1043/* GCODE_SEL 1 Code Descriptor for kernel */
1044{ 0x0, /* segment base address */
1045 0xfffff, /* length - all address space */
1046 SDT_MEMERA, /* segment type */
1047 0, /* segment descriptor priority level */
1048 1, /* segment descriptor present */
1049 0, 0,
1050 1, /* default 32 vs 16 bit size */
1051 1 /* limit granularity (byte/page units)*/ },
1052/* GDATA_SEL 2 Data Descriptor for kernel */
1053{ 0x0, /* segment base address */
1054 0xfffff, /* length - all address space */
1055 SDT_MEMRWA, /* segment type */
1056 0, /* segment descriptor priority level */
1057 1, /* segment descriptor present */
1058 0, 0,
1059 1, /* default 32 vs 16 bit size */
1060 1 /* limit granularity (byte/page units)*/ },
1061/* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1062{ 0x0, /* segment base address */
1063 0xfffff, /* length - all address space */
1064 SDT_MEMRWA, /* segment type */
1065 0, /* segment descriptor priority level */
1066 1, /* segment descriptor present */
1067 0, 0,
1068 1, /* default 32 vs 16 bit size */
1069 1 /* limit granularity (byte/page units)*/ },
1070/* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1071{
1072 0x0, /* segment base address */
1073 sizeof(struct i386tss)-1,/* length - all address space */
1074 SDT_SYS386TSS, /* segment type */
1075 0, /* segment descriptor priority level */
1076 1, /* segment descriptor present */
1077 0, 0,
1078 0, /* unused - default 32 vs 16 bit size */
1079 0 /* limit granularity (byte/page units)*/ },
1080/* GLDT_SEL 5 LDT Descriptor */
1081{ (int) ldt, /* segment base address */
1082 sizeof(ldt)-1, /* length - all address space */
1083 SDT_SYSLDT, /* segment type */
1084 SEL_UPL, /* segment descriptor priority level */
1085 1, /* segment descriptor present */
1086 0, 0,
1087 0, /* unused - default 32 vs 16 bit size */
1088 0 /* limit granularity (byte/page units)*/ },
1089/* GUSERLDT_SEL 6 User LDT Descriptor per process */
1090{ (int) ldt, /* segment base address */
1091 (512 * sizeof(union descriptor)-1), /* length */
1092 SDT_SYSLDT, /* segment type */
1093 0, /* segment descriptor priority level */
1094 1, /* segment descriptor present */
1095 0, 0,
1096 0, /* unused - default 32 vs 16 bit size */
1097 0 /* limit granularity (byte/page units)*/ },
1098/* GTGATE_SEL 7 Null Descriptor - Placeholder */
1099{ 0x0, /* segment base address */
1100 0x0, /* length - all address space */
1101 0, /* segment type */
1102 0, /* segment descriptor priority level */
1103 0, /* segment descriptor present */
1104 0, 0,
1105 0, /* default 32 vs 16 bit size */
1106 0 /* limit granularity (byte/page units)*/ },
1107/* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1108{ 0x400, /* segment base address */
1109 0xfffff, /* length */
1110 SDT_MEMRWA, /* segment type */
1111 0, /* segment descriptor priority level */
1112 1, /* segment descriptor present */
1113 0, 0,
1114 1, /* default 32 vs 16 bit size */
1115 1 /* limit granularity (byte/page units)*/ },
1116/* GPANIC_SEL 9 Panic Tss Descriptor */
1117{ (int) &dblfault_tss, /* segment base address */
1118 sizeof(struct i386tss)-1,/* length - all address space */
1119 SDT_SYS386TSS, /* segment type */
1120 0, /* segment descriptor priority level */
1121 1, /* segment descriptor present */
1122 0, 0,
1123 0, /* unused - default 32 vs 16 bit size */
1124 0 /* limit granularity (byte/page units)*/ },
1125/* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1126{ 0, /* segment base address (overwritten) */
1127 0xfffff, /* length */
1128 SDT_MEMERA, /* segment type */
1129 0, /* segment descriptor priority level */
1130 1, /* segment descriptor present */
1131 0, 0,
1132 0, /* default 32 vs 16 bit size */
1133 1 /* limit granularity (byte/page units)*/ },
1134/* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1135{ 0, /* segment base address (overwritten) */
1136 0xfffff, /* length */
1137 SDT_MEMERA, /* segment type */
1138 0, /* segment descriptor priority level */
1139 1, /* segment descriptor present */
1140 0, 0,
1141 0, /* default 32 vs 16 bit size */
1142 1 /* limit granularity (byte/page units)*/ },
1143/* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1144{ 0, /* segment base address (overwritten) */
1145 0xfffff, /* length */
1146 SDT_MEMRWA, /* segment type */
1147 0, /* segment descriptor priority level */
1148 1, /* segment descriptor present */
1149 0, 0,
1150 1, /* default 32 vs 16 bit size */
1151 1 /* limit granularity (byte/page units)*/ },
1152/* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1153{ 0, /* segment base address (overwritten) */
1154 0xfffff, /* length */
1155 SDT_MEMRWA, /* segment type */
1156 0, /* segment descriptor priority level */
1157 1, /* segment descriptor present */
1158 0, 0,
1159 0, /* default 32 vs 16 bit size */
1160 1 /* limit granularity (byte/page units)*/ },
1161/* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1162{ 0, /* segment base address (overwritten) */
1163 0xfffff, /* length */
1164 SDT_MEMRWA, /* segment type */
1165 0, /* segment descriptor priority level */
1166 1, /* segment descriptor present */
1167 0, 0,
1168 0, /* default 32 vs 16 bit size */
1169 1 /* limit granularity (byte/page units)*/ },
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MD
1170/* GTLS_START 15 TLS */
1171{ 0x0, /* segment base address */
1172 0x0, /* length */
1173 0, /* segment type */
1174 0, /* segment descriptor priority level */
1175 0, /* segment descriptor present */
1176 0, 0,
1177 0, /* default 32 vs 16 bit size */
1178 0 /* limit granularity (byte/page units)*/ },
1179/* GTLS_START+1 16 TLS */
1180{ 0x0, /* segment base address */
1181 0x0, /* length */
1182 0, /* segment type */
1183 0, /* segment descriptor priority level */
1184 0, /* segment descriptor present */
1185 0, 0,
1186 0, /* default 32 vs 16 bit size */
1187 0 /* limit granularity (byte/page units)*/ },
1188/* GTLS_END 17 TLS */
1189{ 0x0, /* segment base address */
1190 0x0, /* length */
1191 0, /* segment type */
1192 0, /* segment descriptor priority level */
1193 0, /* segment descriptor present */
1194 0, 0,
1195 0, /* default 32 vs 16 bit size */
1196 0 /* limit granularity (byte/page units)*/ },
984263bc
MD
1197};
1198
1199static struct soft_segment_descriptor ldt_segs[] = {
1200 /* Null Descriptor - overwritten by call gate */
1201{ 0x0, /* segment base address */
1202 0x0, /* length - all address space */
1203 0, /* segment type */
1204 0, /* segment descriptor priority level */
1205 0, /* segment descriptor present */
1206 0, 0,
1207 0, /* default 32 vs 16 bit size */
1208 0 /* limit granularity (byte/page units)*/ },
1209 /* Null Descriptor - overwritten by call gate */
1210{ 0x0, /* segment base address */
1211 0x0, /* length - all address space */
1212 0, /* segment type */
1213 0, /* segment descriptor priority level */
1214 0, /* segment descriptor present */
1215 0, 0,
1216 0, /* default 32 vs 16 bit size */
1217 0 /* limit granularity (byte/page units)*/ },
1218 /* Null Descriptor - overwritten by call gate */
1219{ 0x0, /* segment base address */
1220 0x0, /* length - all address space */
1221 0, /* segment type */
1222 0, /* segment descriptor priority level */
1223 0, /* segment descriptor present */
1224 0, 0,
1225 0, /* default 32 vs 16 bit size */
1226 0 /* limit granularity (byte/page units)*/ },
1227 /* Code Descriptor for user */
1228{ 0x0, /* segment base address */
1229 0xfffff, /* length - all address space */
1230 SDT_MEMERA, /* segment type */
1231 SEL_UPL, /* segment descriptor priority level */
1232 1, /* segment descriptor present */
1233 0, 0,
1234 1, /* default 32 vs 16 bit size */
1235 1 /* limit granularity (byte/page units)*/ },
1236 /* Null Descriptor - overwritten by call gate */
1237{ 0x0, /* segment base address */
1238 0x0, /* length - all address space */
1239 0, /* segment type */
1240 0, /* segment descriptor priority level */
1241 0, /* segment descriptor present */
1242 0, 0,
1243 0, /* default 32 vs 16 bit size */
1244 0 /* limit granularity (byte/page units)*/ },
1245 /* Data Descriptor for user */
1246{ 0x0, /* segment base address */
1247 0xfffff, /* length - all address space */
1248 SDT_MEMRWA, /* segment type */
1249 SEL_UPL, /* segment descriptor priority level */
1250 1, /* segment descriptor present */
1251 0, 0,
1252 1, /* default 32 vs 16 bit size */
1253 1 /* limit granularity (byte/page units)*/ },
1254};
1255
1256void
1257setidt(idx, func, typ, dpl, selec)
1258 int idx;
1259 inthand_t *func;
1260 int typ;
1261 int dpl;
1262 int selec;
1263{
1264 struct gate_descriptor *ip;
1265
1266 ip = idt + idx;
1267 ip->gd_looffset = (int)func;
1268 ip->gd_selector = selec;
1269 ip->gd_stkcpy = 0;
1270 ip->gd_xx = 0;
1271 ip->gd_type = typ;
1272 ip->gd_dpl = dpl;
1273 ip->gd_p = 1;
1274 ip->gd_hioffset = ((int)func)>>16 ;
1275}
1276
1277#define IDTVEC(name) __CONCAT(X,name)
1278
1279extern inthand_t
1280 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1281 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1282 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
f7bc9806
MD
1283 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1284 IDTVEC(xmm), IDTVEC(syscall),
1285 IDTVEC(rsvd0);
a64ba182 1286extern inthand_t
7062f5b4
EN
1287 IDTVEC(int0x80_syscall), IDTVEC(int0x81_syscall),
1288 IDTVEC(int0x82_syscall);
984263bc 1289
f7bc9806
MD
1290#ifdef DEBUG_INTERRUPTS
1291extern inthand_t *Xrsvdary[256];
1292#endif
1293
984263bc
MD
1294void
1295sdtossd(sd, ssd)
1296 struct segment_descriptor *sd;
1297 struct soft_segment_descriptor *ssd;
1298{
1299 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1300 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1301 ssd->ssd_type = sd->sd_type;
1302 ssd->ssd_dpl = sd->sd_dpl;
1303 ssd->ssd_p = sd->sd_p;
1304 ssd->ssd_def32 = sd->sd_def32;
1305 ssd->ssd_gran = sd->sd_gran;
1306}
1307
984263bc
MD
1308/*
1309 * Populate the (physmap) array with base/bound pairs describing the
1310 * available physical memory in the system, then test this memory and
1311 * build the phys_avail array describing the actually-available memory.
1312 *
1313 * If we cannot accurately determine the physical memory map, then use
1314 * value from the 0xE801 call, and failing that, the RTC.
1315 *
1316 * Total memory size may be set by the kernel environment variable
1317 * hw.physmem or the compile-time define MAXMEM.
1318 */
1319static void
1320getmemsize(int first)
1321{
1322 int i, physmap_idx, pa_indx;
1323 int hasbrokenint12;
1324 u_int basemem, extmem;
1325 struct vm86frame vmf;
1326 struct vm86context vmc;
ff1a75a1
MD
1327 vm_offset_t pa;
1328 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
b5b32410 1329 pt_entry_t *pte;
984263bc
MD
1330 const char *cp;
1331 struct {
1332 u_int64_t base;
1333 u_int64_t length;
1334 u_int32_t type;
1335 } *smap;
28abdbbb 1336 quad_t dcons_addr, dcons_size;
984263bc
MD
1337
1338 hasbrokenint12 = 0;
1339 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1340 bzero(&vmf, sizeof(struct vm86frame));
1341 bzero(physmap, sizeof(physmap));
1342 basemem = 0;
1343
1344 /*
1345 * Some newer BIOSes has broken INT 12H implementation which cause
1346 * kernel panic immediately. In this case, we need to scan SMAP
1347 * with INT 15:E820 first, then determine base memory size.
1348 */
1349 if (hasbrokenint12) {
1350 goto int15e820;
1351 }
1352
1353 /*
7febcc6e
MD
1354 * Perform "base memory" related probes & setup. If we get a crazy
1355 * value give the bios some scribble space just in case.
984263bc
MD
1356 */
1357 vm86_intcall(0x12, &vmf);
1358 basemem = vmf.vmf_ax;
1359 if (basemem > 640) {
7febcc6e
MD
1360 printf("Preposterous BIOS basemem of %uK, "
1361 "truncating to < 640K\n", basemem);
1362 basemem = 636;
984263bc
MD
1363 }
1364
1365 /*
1366 * XXX if biosbasemem is now < 640, there is a `hole'
1367 * between the end of base memory and the start of
1368 * ISA memory. The hole may be empty or it may
1369 * contain BIOS code or data. Map it read/write so
1370 * that the BIOS can write to it. (Memory from 0 to
1371 * the physical end of the kernel is mapped read-only
1372 * to begin with and then parts of it are remapped.
1373 * The parts that aren't remapped form holes that
1374 * remain read-only and are unused by the kernel.
1375 * The base memory area is below the physical end of
1376 * the kernel and right now forms a read-only hole.
1377 * The part of it from PAGE_SIZE to
1378 * (trunc_page(biosbasemem * 1024) - 1) will be
1379 * remapped and used by the kernel later.)
1380 *
1381 * This code is similar to the code used in
1382 * pmap_mapdev, but since no memory needs to be
1383 * allocated we simply change the mapping.
1384 */
1385 for (pa = trunc_page(basemem * 1024);
1386 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1387 pte = vtopte(pa + KERNBASE);
984263bc
MD
1388 *pte = pa | PG_RW | PG_V;
1389 }
1390
1391 /*
1392 * if basemem != 640, map pages r/w into vm86 page table so
1393 * that the bios can scribble on it.
1394 */
b5b32410 1395 pte = vm86paddr;
984263bc
MD
1396 for (i = basemem / 4; i < 160; i++)
1397 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1398
1399int15e820:
1400 /*
1401 * map page 1 R/W into the kernel page table so we can use it
1402 * as a buffer. The kernel will unmap this page later.
1403 */
b5b32410 1404 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
984263bc
MD
1405 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1406
1407 /*
1408 * get memory map with INT 15:E820
1409 */
1410#define SMAPSIZ sizeof(*smap)
1411#define SMAP_SIG 0x534D4150 /* 'SMAP' */
1412
1413 vmc.npages = 0;
1414 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1415 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1416
1417 physmap_idx = 0;
1418 vmf.vmf_ebx = 0;
1419 do {
1420 vmf.vmf_eax = 0xE820;
1421 vmf.vmf_edx = SMAP_SIG;
1422 vmf.vmf_ecx = SMAPSIZ;
1423 i = vm86_datacall(0x15, &vmf, &vmc);
1424 if (i || vmf.vmf_eax != SMAP_SIG)
1425 break;
1426 if (boothowto & RB_VERBOSE)
1427 printf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1428 smap->type,
1429 *(u_int32_t *)((char *)&smap->base + 4),
1430 (u_int32_t)smap->base,
1431 *(u_int32_t *)((char *)&smap->length + 4),
1432 (u_int32_t)smap->length);
1433
1434 if (smap->type != 0x01)
1435 goto next_run;
1436
1437 if (smap->length == 0)
1438 goto next_run;
1439
1440 if (smap->base >= 0xffffffff) {
1441 printf("%uK of memory above 4GB ignored\n",
1442 (u_int)(smap->length / 1024));
1443 goto next_run;
1444 }
1445
1446 for (i = 0; i <= physmap_idx; i += 2) {
1447 if (smap->base < physmap[i + 1]) {
1448 if (boothowto & RB_VERBOSE)
1449 printf(
1450 "Overlapping or non-montonic memory region, ignoring second region\n");
1451 goto next_run;
1452 }
1453 }
1454
1455 if (smap->base == physmap[physmap_idx + 1]) {
1456 physmap[physmap_idx + 1] += smap->length;
1457 goto next_run;
1458 }
1459
1460 physmap_idx += 2;
ff1a75a1 1461 if (physmap_idx == PHYSMAP_ENTRIES*2) {
984263bc
MD
1462 printf(
1463 "Too many segments in the physical address map, giving up\n");
1464 break;
1465 }
1466 physmap[physmap_idx] = smap->base;
1467 physmap[physmap_idx + 1] = smap->base + smap->length;
1468next_run:
6b08710e 1469 ; /* fix GCC3.x warning */
984263bc
MD
1470 } while (vmf.vmf_ebx != 0);
1471
1472 /*
1473 * Perform "base memory" related probes & setup based on SMAP
1474 */
1475 if (basemem == 0) {
1476 for (i = 0; i <= physmap_idx; i += 2) {
1477 if (physmap[i] == 0x00000000) {
1478 basemem = physmap[i + 1] / 1024;
1479 break;
1480 }
1481 }
1482
1483 if (basemem == 0) {
1484 basemem = 640;
1485 }
1486
1487 if (basemem > 640) {
1488 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1489 basemem);
1490 basemem = 640;
1491 }
1492
1493 for (pa = trunc_page(basemem * 1024);
1494 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
b5b32410 1495 pte = vtopte(pa + KERNBASE);
984263bc
MD
1496 *pte = pa | PG_RW | PG_V;
1497 }
1498
b5b32410 1499 pte = vm86paddr;
984263bc
MD
1500 for (i = basemem / 4; i < 160; i++)
1501 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1502 }
1503
1504 if (physmap[1] != 0)
1505 goto physmap_done;
1506
1507 /*
1508 * If we failed above, try memory map with INT 15:E801
1509 */
1510 vmf.vmf_ax = 0xE801;
1511 if (vm86_intcall(0x15, &vmf) == 0) {
1512 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1513 } else {
1514#if 0
1515 vmf.vmf_ah = 0x88;
1516 vm86_intcall(0x15, &vmf);
1517 extmem = vmf.vmf_ax;
1518#else
1519 /*
1520 * Prefer the RTC value for extended memory.
1521 */
1522 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1523#endif
1524 }
1525
1526 /*
1527 * Special hack for chipsets that still remap the 384k hole when
1528 * there's 16MB of memory - this really confuses people that
1529 * are trying to use bus mastering ISA controllers with the
1530 * "16MB limit"; they only have 16MB, but the remapping puts
1531 * them beyond the limit.
1532 *
1533 * If extended memory is between 15-16MB (16-17MB phys address range),
1534 * chop it to 15MB.
1535 */
1536 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1537 extmem = 15 * 1024;
1538
1539 physmap[0] = 0;
1540 physmap[1] = basemem * 1024;
1541 physmap_idx = 2;
1542 physmap[physmap_idx] = 0x100000;
1543 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1544
1545physmap_done:
1546 /*
1547 * Now, physmap contains a map of physical memory.
1548 */
1549
1550#ifdef SMP
17a9f566 1551 /* make hole for AP bootstrap code YYY */
984263bc
MD
1552 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1553
1554 /* look for the MP hardware - needed for apic addresses */
1555 mp_probe();
1556#endif
1557
1558 /*
1559 * Maxmem isn't the "maximum memory", it's one larger than the
1560 * highest page of the physical address space. It should be
1561 * called something like "Maxphyspage". We may adjust this
1562 * based on ``hw.physmem'' and the results of the memory test.
1563 */
1564 Maxmem = atop(physmap[physmap_idx + 1]);
1565
1566#ifdef MAXMEM
1567 Maxmem = MAXMEM / 4;
1568#endif
1569
1570 /*
eb7d35b8 1571 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
984263bc
MD
1572 * for the appropriate modifiers. This overrides MAXMEM.
1573 */
1574 if ((cp = getenv("hw.physmem")) != NULL) {
1575 u_int64_t AllowMem, sanity;
1576 char *ep;
1577
1578 sanity = AllowMem = strtouq(cp, &ep, 0);
1579 if ((ep != cp) && (*ep != 0)) {
1580 switch(*ep) {
1581 case 'g':
1582 case 'G':
1583 AllowMem <<= 10;
1584 case 'm':
1585 case 'M':
1586 AllowMem <<= 10;
1587 case 'k':
1588 case 'K':
1589 AllowMem <<= 10;
1590 break;
1591 default:
1592 AllowMem = sanity = 0;
1593 }
1594 if (AllowMem < sanity)
1595 AllowMem = 0;
1596 }
1597 if (AllowMem == 0)
1598 printf("Ignoring invalid memory size of '%s'\n", cp);
1599 else
1600 Maxmem = atop(AllowMem);
1601 }
1602
1603 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1604 (boothowto & RB_VERBOSE))
6ef943a3 1605 printf("Physical memory use set to %lluK\n", Maxmem * 4);
984263bc
MD
1606
1607 /*
1608 * If Maxmem has been increased beyond what the system has detected,
1609 * extend the last memory segment to the new limit.
1610 */
1611 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1612 physmap[physmap_idx + 1] = ptoa(Maxmem);
1613
1614 /* call pmap initialization to make new kernel address space */
1615 pmap_bootstrap(first, 0);
1616
1617 /*
1618 * Size up each available chunk of physical memory.
1619 */
1620 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1621 pa_indx = 0;
1622 phys_avail[pa_indx++] = physmap[0];
1623 phys_avail[pa_indx] = physmap[0];
b5b32410 1624 pte = CMAP1;
984263bc 1625
28abdbbb
HS
1626 /*
1627 * Get dcons buffer address
1628 */
1629 if (getenv_quad("dcons.addr", &dcons_addr) == 0 ||
1630 getenv_quad("dcons.size", &dcons_size) == 0)
1631 dcons_addr = 0;
1632
984263bc
MD
1633 /*
1634 * physmap is in bytes, so when converting to page boundaries,
1635 * round up the start address and round down the end address.
1636 */
1637 for (i = 0; i <= physmap_idx; i += 2) {
1638 vm_offset_t end;
1639
1640 end = ptoa(Maxmem);
1641 if (physmap[i + 1] < end)
1642 end = trunc_page(physmap[i + 1]);
1643 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1644 int tmp, page_bad;
1645#if 0
1646 int *ptr = 0;
1647#else
1648 int *ptr = (int *)CADDR1;
1649#endif
1650
1651 /*
1652 * block out kernel memory as not available.
1653 */
1654 if (pa >= 0x100000 && pa < first)
1655 continue;
1656
28abdbbb
HS
1657 /*
1658 * block out dcons buffer
1659 */
1660 if (dcons_addr > 0
1661 && pa >= trunc_page(dcons_addr)
1662 && pa < dcons_addr + dcons_size)
1663 continue;
1664
984263bc
MD
1665 page_bad = FALSE;
1666
1667 /*
1668 * map page into kernel: valid, read/write,non-cacheable
1669 */
1670 *pte = pa | PG_V | PG_RW | PG_N;
0f7a3396 1671 cpu_invltlb();
984263bc
MD
1672
1673 tmp = *(int *)ptr;
1674 /*
1675 * Test for alternating 1's and 0's
1676 */
1677 *(volatile int *)ptr = 0xaaaaaaaa;
1678 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1679 page_bad = TRUE;
1680 }
1681 /*
1682 * Test for alternating 0's and 1's
1683 */
1684 *(volatile int *)ptr = 0x55555555;
1685 if (*(volatile int *)ptr != 0x55555555) {
1686 page_bad = TRUE;
1687 }
1688 /*
1689 * Test for all 1's
1690 */
1691 *(volatile int *)ptr = 0xffffffff;
1692 if (*(volatile int *)ptr != 0xffffffff) {
1693 page_bad = TRUE;
1694 }
1695 /*
1696 * Test for all 0's
1697 */
1698 *(volatile int *)ptr = 0x0;
1699 if (*(volatile int *)ptr != 0x0) {
1700 page_bad = TRUE;
1701 }
1702 /*
1703 * Restore original value.
1704 */
1705 *(int *)ptr = tmp;
1706
1707 /*
1708 * Adjust array of valid/good pages.
1709 */
1710 if (page_bad == TRUE) {
1711 continue;
1712 }
1713 /*
1714 * If this good page is a continuation of the
1715 * previous set of good pages, then just increase
1716 * the end pointer. Otherwise start a new chunk.
1717 * Note that "end" points one higher than end,
1718 * making the range >= start and < end.
1719 * If we're also doing a speculative memory
1720 * test and we at or past the end, bump up Maxmem
1721 * so that we keep going. The first bad page
1722 * will terminate the loop.
1723 */
1724 if (phys_avail[pa_indx] == pa) {
1725 phys_avail[pa_indx] += PAGE_SIZE;
1726 } else {
1727 pa_indx++;
ff1a75a1 1728 if (pa_indx >= PHYSMAP_ENTRIES*2) {
984263bc
MD
1729 printf("Too many holes in the physical address space, giving up\n");
1730 pa_indx--;
1731 break;
1732 }
1733 phys_avail[pa_indx++] = pa; /* start */
1734 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1735 }
1736 physmem++;
1737 }
1738 }
1739 *pte = 0;
0f7a3396 1740 cpu_invltlb();
984263bc
MD
1741
1742 /*
1743 * XXX
1744 * The last chunk must contain at least one page plus the message
1745 * buffer to avoid complicating other code (message buffer address
1746 * calculation, etc.).
1747 */
1748 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1749 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1750 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1751 phys_avail[pa_indx--] = 0;
1752 phys_avail[pa_indx--] = 0;
1753 }
1754
1755 Maxmem = atop(phys_avail[pa_indx]);
1756
1757 /* Trim off space for the message buffer. */
1758 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1759
1760 avail_end = phys_avail[pa_indx];
1761}
1762
f7bc9806
MD
1763/*
1764 * IDT VECTORS:
1765 * 0 Divide by zero
1766 * 1 Debug
1767 * 2 NMI
1768 * 3 BreakPoint
1769 * 4 OverFlow
1770 * 5 Bound-Range
1771 * 6 Invalid OpCode
1772 * 7 Device Not Available (x87)
1773 * 8 Double-Fault
1774 * 9 Coprocessor Segment overrun (unsupported, reserved)
1775 * 10 Invalid-TSS
1776 * 11 Segment not present
1777 * 12 Stack
1778 * 13 General Protection
1779 * 14 Page Fault
1780 * 15 Reserved
1781 * 16 x87 FP Exception pending
1782 * 17 Alignment Check
1783 * 18 Machine Check
1784 * 19 SIMD floating point
1785 * 20-31 reserved
1786 * 32-255 INTn/external sources
1787 */
984263bc 1788void
17a9f566 1789init386(int first)
984263bc
MD
1790{
1791 struct gate_descriptor *gdp;
1792 int gsel_tss, metadata_missing, off, x;
85100692 1793 struct mdglobaldata *gd;
984263bc
MD
1794
1795 /*
1796 * Prevent lowering of the ipl if we call tsleep() early.
1797 */
85100692 1798 gd = &CPU_prvspace[0].mdglobaldata;
8a8d5d85 1799 bzero(gd, sizeof(*gd));
984263bc 1800
85100692 1801 gd->mi.gd_curthread = &thread0;
984263bc
MD
1802
1803 atdevbase = ISA_HOLE_START + KERNBASE;
1804
1805 metadata_missing = 0;
1806 if (bootinfo.bi_modulep) {
1807 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1808 preload_bootstrap_relocate(KERNBASE);
1809 } else {
1810 metadata_missing = 1;
1811 }
1812 if (bootinfo.bi_envp)
1813 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1814
c5cc06e3
MD
1815 /*
1816 * start with one cpu. Note: ncpus2_shift and ncpus2_mask are left
1817 * at 0.
1818 */
4e8e646b 1819 ncpus = 1;
c5cc06e3 1820 ncpus2 = 1;
984263bc
MD
1821 /* Init basic tunables, hz etc */
1822 init_param1();
1823
1824 /*
1825 * make gdt memory segments, the code segment goes up to end of the
1826 * page with etext in it, the data segment goes to the end of
1827 * the address space
1828 */
1829 /*
1830 * XXX text protection is temporarily (?) disabled. The limit was
1831 * i386_btop(round_page(etext)) - 1.
1832 */
1833 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1834 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
17a9f566 1835
984263bc
MD
1836 gdt_segs[GPRIV_SEL].ssd_limit =
1837 atop(sizeof(struct privatespace) - 1);
8ad65e08 1838 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
984263bc 1839 gdt_segs[GPROC0_SEL].ssd_base =
85100692 1840 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
17a9f566 1841
85100692 1842 gd->mi.gd_prvspace = &CPU_prvspace[0];
17a9f566 1843
84b592ba
MD
1844 /*
1845 * Note: on both UP and SMP curthread must be set non-NULL
1846 * early in the boot sequence because the system assumes
1847 * that 'curthread' is never NULL.
1848 */
984263bc
MD
1849
1850 for (x = 0; x < NGDT; x++) {
1851#ifdef BDE_DEBUGGER
1852 /* avoid overwriting db entries with APM ones */
1853 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1854 continue;
1855#endif
1856 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1857 }
1858
1859 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1860 r_gdt.rd_base = (int) gdt;
1861 lgdt(&r_gdt);
1862
73e4f7b9
MD
1863 mi_gdinit(&gd->mi, 0);
1864 cpu_gdinit(gd, 0);
f470d0c8 1865 lwkt_init_thread(&thread0, proc0paddr, LWKT_THREAD_STACK, 0, &gd->mi);
73e4f7b9
MD
1866 lwkt_set_comm(&thread0, "thread0");
1867 proc0.p_addr = (void *)thread0.td_kstack;
065b709a
SS
1868 LIST_INIT(&proc0.p_lwps);
1869 LIST_INSERT_HEAD(&proc0.p_lwps, &proc0.p_lwp, lwp_list);
1870 proc0.p_lwp.lwp_thread = &thread0;
1871 proc0.p_lwp.lwp_proc = &proc0;
cb7f4ab1 1872 proc0.p_usched = usched_init();
98a7f915 1873 varsymset_init(&proc0.p_varsymset, NULL);
d9eea1a5 1874 thread0.td_flags |= TDF_RUNNING;
73e4f7b9 1875 thread0.td_proc = &proc0;
ef09c3ed 1876 thread0.td_lwp = &proc0.p_lwp;
73e4f7b9 1877 thread0.td_switch = cpu_heavy_switch; /* YYY eventually LWKT */
e43a034f 1878 safepri = TDPRI_MAX;
73e4f7b9 1879
984263bc
MD
1880 /* make ldt memory segments */
1881 /*
1882 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
1883 * should be spelled ...MAX_USER...
1884 */
1885 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1886 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
1887 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1888 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1889
1890 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1891 lldt(_default_ldt);
17a9f566 1892 gd->gd_currentldt = _default_ldt;
8a8d5d85
MD
1893 /* spinlocks and the BGL */
1894 init_locks();
984263bc
MD
1895
1896 /* exceptions */
f7bc9806
MD
1897 for (x = 0; x < NIDT; x++) {
1898#ifdef DEBUG_INTERRUPTS
1899 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1900#else
1901 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1902#endif
1903 }
984263bc
MD
1904 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1905 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1906 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1907 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1908 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1909 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1910 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1911 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1912 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1913 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1914 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1915 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1916 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1917 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1918 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
f7bc9806 1919 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1920 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1921 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1922 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1923 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1924 setidt(0x80, &IDTVEC(int0x80_syscall),
1925 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
a64ba182
MD
1926 setidt(0x81, &IDTVEC(int0x81_syscall),
1927 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
7062f5b4
EN
1928 setidt(0x82, &IDTVEC(int0x82_syscall),
1929 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
984263bc
MD
1930
1931 r_idt.rd_limit = sizeof(idt0) - 1;
1932 r_idt.rd_base = (int) idt;
1933 lidt(&r_idt);
1934
1935 /*
1936 * Initialize the console before we print anything out.
1937 */
1938 cninit();
1939
1940 if (metadata_missing)
1941 printf("WARNING: loader(8) metadata is missing!\n");
1942
984263bc
MD
1943#if NISA >0
1944 isa_defaultirq();
1945#endif
1946 rand_initialize();
1947
1948#ifdef DDB
1949 kdb_init();
1950 if (boothowto & RB_KDB)
1951 Debugger("Boot flags requested debugger");
1952#endif
1953
1954 finishidentcpu(); /* Final stage of CPU initialization */
1955 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1956 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1957 initializecpu(); /* Initialize CPU registers */
1958
b7c628e4
MD
1959 /*
1960 * make an initial tss so cpu can get interrupt stack on syscall!
1961 * The 16 bytes is to save room for a VM86 context.
1962 */
17a9f566
MD
1963 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1964 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
984263bc 1965 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
17a9f566
MD
1966 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1967 gd->gd_common_tssd = *gd->gd_tss_gdt;
85100692 1968 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
984263bc
MD
1969 ltr(gsel_tss);
1970
1971 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1972 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
1973 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
1974 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
1975 dblfault_tss.tss_cr3 = (int)IdlePTD;
1976 dblfault_tss.tss_eip = (int) dblfault_handler;
1977 dblfault_tss.tss_eflags = PSL_KERNEL;
1978 dblfault_tss.tss_ds = dblfault_tss.tss_es =
1979 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
1980 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
1981 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
1982 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
1983
1984 vm86_initialize();
1985 getmemsize(first);
1986 init_param2(physmem);
1987
1988 /* now running on new page tables, configured,and u/iom is accessible */
1989
1990 /* Map the message buffer. */
1991 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1992 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1993
1994 msgbufinit(msgbufp, MSGBUF_SIZE);
1995
1996 /* make a call gate to reenter kernel with */
1997 gdp = &ldt[LSYS5CALLS_SEL].gd;
1998
1999 x = (int) &IDTVEC(syscall);
2000 gdp->gd_looffset = x++;
2001 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2002 gdp->gd_stkcpy = 1;
2003 gdp->gd_type = SDT_SYS386CGT;
2004 gdp->gd_dpl = SEL_UPL;
2005 gdp->gd_p = 1;
2006 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2007
2008 /* XXX does this work? */
2009 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2010 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2011
2012 /* transfer to user mode */
2013
2014 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2015 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2016
2017 /* setup proc 0's pcb */
b7c628e4
MD
2018 thread0.td_pcb->pcb_flags = 0;
2019 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
b7c628e4 2020 thread0.td_pcb->pcb_ext = 0;
065b709a 2021 proc0.p_lwp.lwp_md.md_regs = &proc0_tf;
984263bc
MD
2022}
2023
8ad65e08 2024/*
17a9f566
MD
2025 * Initialize machine-dependant portions of the global data structure.
2026 * Note that the global data area and cpu0's idlestack in the private
2027 * data space were allocated in locore.
ef0fdad1
MD
2028 *
2029 * Note: the idlethread's cpl is 0
73e4f7b9
MD
2030 *
2031 * WARNING! Called from early boot, 'mycpu' may not work yet.
8ad65e08
MD
2032 */
2033void
85100692 2034cpu_gdinit(struct mdglobaldata *gd, int cpu)
8ad65e08 2035{
7d0bac62 2036 if (cpu)
a2a5ad0d 2037 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
17a9f566 2038
f470d0c8
MD
2039 lwkt_init_thread(&gd->mi.gd_idlethread,
2040 gd->mi.gd_prvspace->idlestack,
2041 sizeof(gd->mi.gd_prvspace->idlestack), 0, &gd->mi);
a2a5ad0d
MD
2042 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2043 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2044 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2045 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
8ad65e08
MD
2046}
2047
0cd275af
MD
2048int
2049is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2050{
2051 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2052 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2053 return (TRUE);
2054 }
2055 return (FALSE);
2056}
2057
12e4aaff
MD
2058struct globaldata *
2059globaldata_find(int cpu)
2060{
2061 KKASSERT(cpu >= 0 && cpu < ncpus);
2062 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2063}
2064
984263bc
MD
2065#if defined(I586_CPU) && !defined(NO_F00F_HACK)
2066static void f00f_hack(void *unused);
2067SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2068
2069static void
17a9f566
MD
2070f00f_hack(void *unused)
2071{
984263bc 2072 struct gate_descriptor *new_idt;
984263bc
MD
2073 vm_offset_t tmp;
2074
2075 if (!has_f00f_bug)
2076 return;
2077
2078 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2079
2080 r_idt.rd_limit = sizeof(idt0) - 1;
2081
2082 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2083 if (tmp == 0)
2084 panic("kmem_alloc returned 0");
2085 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2086 panic("kmem_alloc returned non-page-aligned memory");
2087 /* Put the first seven entries in the lower page */
2088 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2089 bcopy(idt, new_idt, sizeof(idt0));
2090 r_idt.rd_base = (int)new_idt;
2091 lidt(&r_idt);
2092 idt = new_idt;
2093 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2094 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2095 panic("vm_map_protect failed");
2096 return;
2097}
2098#endif /* defined(I586_CPU) && !NO_F00F_HACK */
2099
2100int
2101ptrace_set_pc(p, addr)
2102 struct proc *p;
2103 unsigned long addr;
2104{
2105 p->p_md.md_regs->tf_eip = addr;
2106 return (0);
2107}
2108
2109int
e9182c58 2110ptrace_single_step(struct lwp *lp)
984263bc 2111{
e9182c58 2112 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
984263bc
MD
2113 return (0);
2114}
2115
2116int ptrace_read_u_check(p, addr, len)
2117 struct proc *p;
2118 vm_offset_t addr;
2119 size_t len;
2120{
2121 vm_offset_t gap;
2122
2123 if ((vm_offset_t) (addr + len) < addr)
2124 return EPERM;
2125 if ((vm_offset_t) (addr + len) <= sizeof(struct user))
2126 return 0;
2127
2128 gap = (char *) p->p_md.md_regs - (char *) p->p_addr;
2129
2130 if ((vm_offset_t) addr < gap)
2131 return EPERM;
2132 if ((vm_offset_t) (addr + len) <=
2133 (vm_offset_t) (gap + sizeof(struct trapframe)))
2134 return 0;
2135 return EPERM;
2136}
2137
2138int ptrace_write_u(p, off, data)
2139 struct proc *p;
2140 vm_offset_t off;
2141 long data;
2142{
2143 struct trapframe frame_copy;
2144 vm_offset_t min;
2145 struct trapframe *tp;
2146
2147 /*
2148 * Privileged kernel state is scattered all over the user area.
2149 * Only allow write access to parts of regs and to fpregs.
2150 */
2151 min = (char *)p->p_md.md_regs - (char *)p->p_addr;
2152 if (off >= min && off <= min + sizeof(struct trapframe) - sizeof(int)) {
2153 tp = p->p_md.md_regs;
2154 frame_copy = *tp;
2155 *(int *)((char *)&frame_copy + (off - min)) = data;
2156 if (!EFL_SECURE(frame_copy.tf_eflags, tp->tf_eflags) ||
2157 !CS_SECURE(frame_copy.tf_cs))
2158 return (EINVAL);
2159 *(int*)((char *)p->p_addr + off) = data;
2160 return (0);
2161 }
b7c628e4
MD
2162
2163 /*
2164 * The PCB is at the end of the user area YYY
2165 */
2166 min = (char *)p->p_thread->td_pcb - (char *)p->p_addr;
2167 min += offsetof(struct pcb, pcb_save);
984263bc
MD
2168 if (off >= min && off <= min + sizeof(union savefpu) - sizeof(int)) {
2169 *(int*)((char *)p->p_addr + off) = data;
2170 return (0);
2171 }
2172 return (EFAULT);
2173}
2174
2175int
e9182c58 2176fill_regs(struct lwp *lp, struct reg *regs)
984263bc
MD
2177{
2178 struct pcb *pcb;
2179 struct trapframe *tp;
2180
e9182c58 2181 tp = lp->lwp_md.md_regs;
984263bc
MD
2182 regs->r_fs = tp->tf_fs;
2183 regs->r_es = tp->tf_es;
2184 regs->r_ds = tp->tf_ds;
2185 regs->r_edi = tp->tf_edi;
2186 regs->r_esi = tp->tf_esi;
2187 regs->r_ebp = tp->tf_ebp;
2188 regs->r_ebx = tp->tf_ebx;
2189 regs->r_edx = tp->tf_edx;
2190 regs->r_ecx = tp->tf_ecx;
2191 regs->r_eax = tp->tf_eax;
2192 regs->r_eip = tp->tf_eip;
2193 regs->r_cs = tp->tf_cs;
2194 regs->r_eflags = tp->tf_eflags;
2195 regs->r_esp = tp->tf_esp;
2196 regs->r_ss = tp->tf_ss;
e9182c58 2197 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2198 regs->r_gs = pcb->pcb_gs;
2199 return (0);
2200}
2201
2202int
e9182c58 2203set_regs(struct lwp *lp, struct reg *regs)
984263bc
MD
2204{
2205 struct pcb *pcb;
2206 struct trapframe *tp;
2207
e9182c58 2208 tp = lp->lwp_md.md_regs;
984263bc
MD
2209 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2210 !CS_SECURE(regs->r_cs))
2211 return (EINVAL);
2212 tp->tf_fs = regs->r_fs;
2213 tp->tf_es = regs->r_es;
2214 tp->tf_ds = regs->r_ds;
2215 tp->tf_edi = regs->r_edi;
2216 tp->tf_esi = regs->r_esi;
2217 tp->tf_ebp = regs->r_ebp;
2218 tp->tf_ebx = regs->r_ebx;
2219 tp->tf_edx = regs->r_edx;
2220 tp->tf_ecx = regs->r_ecx;
2221 tp->tf_eax = regs->r_eax;
2222 tp->tf_eip = regs->r_eip;
2223 tp->tf_cs = regs->r_cs;
2224 tp->tf_eflags = regs->r_eflags;
2225 tp->tf_esp = regs->r_esp;
2226 tp->tf_ss = regs->r_ss;
e9182c58 2227 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2228 pcb->pcb_gs = regs->r_gs;
2229 return (0);
2230}
2231
642a6e88 2232#ifndef CPU_DISABLE_SSE
984263bc
MD
2233static void
2234fill_fpregs_xmm(sv_xmm, sv_87)
2235 struct savexmm *sv_xmm;
2236 struct save87 *sv_87;
2237{
c9faf524
RG
2238 struct env87 *penv_87 = &sv_87->sv_env;
2239 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2240 int i;
2241
2242 /* FPU control/status */
2243 penv_87->en_cw = penv_xmm->en_cw;
2244 penv_87->en_sw = penv_xmm->en_sw;
2245 penv_87->en_tw = penv_xmm->en_tw;
2246 penv_87->en_fip = penv_xmm->en_fip;
2247 penv_87->en_fcs = penv_xmm->en_fcs;
2248 penv_87->en_opcode = penv_xmm->en_opcode;
2249 penv_87->en_foo = penv_xmm->en_foo;
2250 penv_87->en_fos = penv_xmm->en_fos;
2251
2252 /* FPU registers */
2253 for (i = 0; i < 8; ++i)
2254 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2255
2256 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2257}
2258
2259static void
2260set_fpregs_xmm(sv_87, sv_xmm)
2261 struct save87 *sv_87;
2262 struct savexmm *sv_xmm;
2263{
c9faf524
RG
2264 struct env87 *penv_87 = &sv_87->sv_env;
2265 struct envxmm *penv_xmm = &sv_xmm->sv_env;
984263bc
MD
2266 int i;
2267
2268 /* FPU control/status */
2269 penv_xmm->en_cw = penv_87->en_cw;
2270 penv_xmm->en_sw = penv_87->en_sw;
2271 penv_xmm->en_tw = penv_87->en_tw;
2272 penv_xmm->en_fip = penv_87->en_fip;
2273 penv_xmm->en_fcs = penv_87->en_fcs;
2274 penv_xmm->en_opcode = penv_87->en_opcode;
2275 penv_xmm->en_foo = penv_87->en_foo;
2276 penv_xmm->en_fos = penv_87->en_fos;
2277
2278 /* FPU registers */
2279 for (i = 0; i < 8; ++i)
2280 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2281
2282 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2283}
642a6e88 2284#endif /* CPU_DISABLE_SSE */
984263bc
MD
2285
2286int
e9182c58 2287fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
984263bc 2288{
642a6e88 2289#ifndef CPU_DISABLE_SSE
984263bc 2290 if (cpu_fxsr) {
e9182c58
SZ
2291 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2292 (struct save87 *)fpregs);
984263bc
MD
2293 return (0);
2294 }
642a6e88 2295#endif /* CPU_DISABLE_SSE */
e9182c58 2296 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
984263bc
MD
2297 return (0);
2298}
2299
2300int
e9182c58 2301set_fpregs(struct lwp *lp, struct fpreg *fpregs)
984263bc 2302{
642a6e88 2303#ifndef CPU_DISABLE_SSE
984263bc
MD
2304 if (cpu_fxsr) {
2305 set_fpregs_xmm((struct save87 *)fpregs,
e9182c58 2306 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
984263bc
MD
2307 return (0);
2308 }
642a6e88 2309#endif /* CPU_DISABLE_SSE */
e9182c58 2310 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
984263bc
MD
2311 return (0);
2312}
2313
2314int
e9182c58 2315fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
984263bc 2316{
e9182c58 2317 if (lp == NULL) {
984263bc
MD
2318 dbregs->dr0 = rdr0();
2319 dbregs->dr1 = rdr1();
2320 dbregs->dr2 = rdr2();
2321 dbregs->dr3 = rdr3();
2322 dbregs->dr4 = rdr4();
2323 dbregs->dr5 = rdr5();
2324 dbregs->dr6 = rdr6();
2325 dbregs->dr7 = rdr7();
e9182c58
SZ
2326 } else {
2327 struct pcb *pcb;
2328
2329 pcb = lp->lwp_thread->td_pcb;
984263bc
MD
2330 dbregs->dr0 = pcb->pcb_dr0;
2331 dbregs->dr1 = pcb->pcb_dr1;
2332 dbregs->dr2 = pcb->pcb_dr2;
2333 dbregs->dr3 = pcb->pcb_dr3;
2334 dbregs->dr4 = 0;
2335 dbregs->dr5 = 0;
2336 dbregs->dr6 = pcb->pcb_dr6;
2337 dbregs->dr7 = pcb->pcb_dr7;
2338 }
2339 return (0);
2340}
2341
2342int
e9182c58 2343set_dbregs(struct lwp *lp, struct dbreg *dbregs)
984263bc 2344{
e9182c58 2345 if (lp == NULL) {
984263bc
MD
2346 load_dr0(dbregs->dr0);
2347 load_dr1(dbregs->dr1);
2348 load_dr2(dbregs->dr2);
2349 load_dr3(dbregs->dr3);
2350 load_dr4(dbregs->dr4);
2351 load_dr5(dbregs->dr5);
2352 load_dr6(dbregs->dr6);
2353 load_dr7(dbregs->dr7);
e9182c58
SZ
2354 } else {
2355 struct pcb *pcb;
2356 struct ucred *ucred;
2357 int i;
2358 uint32_t mask1, mask2;
2359
984263bc
MD
2360 /*
2361 * Don't let an illegal value for dr7 get set. Specifically,
2362 * check for undefined settings. Setting these bit patterns
2363 * result in undefined behaviour and can lead to an unexpected
2364 * TRCTRAP.
2365 */
2366 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2367 i++, mask1 <<= 2, mask2 <<= 2)
2368 if ((dbregs->dr7 & mask1) == mask2)
2369 return (EINVAL);
2370
e9182c58
SZ
2371 pcb = lp->lwp_thread->td_pcb;
2372 ucred = lp->lwp_proc->p_ucred;
2373
984263bc
MD
2374 /*
2375 * Don't let a process set a breakpoint that is not within the
2376 * process's address space. If a process could do this, it
2377 * could halt the system by setting a breakpoint in the kernel
2378 * (if ddb was enabled). Thus, we need to check to make sure
2379 * that no breakpoints are being enabled for addresses outside
2380 * process's address space, unless, perhaps, we were called by
2381 * uid 0.
2382 *
2383 * XXX - what about when the watched area of the user's
2384 * address space is written into from within the kernel
2385 * ... wouldn't that still cause a breakpoint to be generated
2386 * from within kernel mode?
2387 */
e9182c58
SZ
2388
2389 if (suser_cred(ucred, 0) != 0) {
984263bc
MD
2390 if (dbregs->dr7 & 0x3) {
2391 /* dr0 is enabled */
2392 if (dbregs->dr0 >= VM_MAXUSER_ADDRESS)
2393 return (EINVAL);
2394 }
e9182c58 2395
984263bc
MD
2396 if (dbregs->dr7 & (0x3<<2)) {
2397 /* dr1 is enabled */
2398 if (dbregs->dr1 >= VM_MAXUSER_ADDRESS)
2399 return (EINVAL);
2400 }
e9182c58 2401
984263bc
MD
2402 if (dbregs->dr7 & (0x3<<4)) {
2403 /* dr2 is enabled */
2404 if (dbregs->dr2 >= VM_MAXUSER_ADDRESS)
2405 return (EINVAL);
2406 }
e9182c58 2407
984263bc
MD
2408 if (dbregs->dr7 & (0x3<<6)) {
2409 /* dr3 is enabled */
2410 if (dbregs->dr3 >= VM_MAXUSER_ADDRESS)
2411 return (EINVAL);
2412 }
2413 }
e9182c58 2414
984263bc
MD
2415 pcb->pcb_dr0 = dbregs->dr0;
2416 pcb->pcb_dr1 = dbregs->dr1;
2417 pcb->pcb_dr2 = dbregs->dr2;
2418 pcb->pcb_dr3 = dbregs->dr3;
2419 pcb->pcb_dr6 = dbregs->dr6;
2420 pcb->pcb_dr7 = dbregs->dr7;
e9182c58 2421
984263bc
MD
2422 pcb->pcb_flags |= PCB_DBREGS;
2423 }
2424
2425 return (0);
2426}
2427
2428/*
2429 * Return > 0 if a hardware breakpoint has been hit, and the
2430 * breakpoint was in user space. Return 0, otherwise.
2431 */
2432int
2433user_dbreg_trap(void)
2434{
2435 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2436 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2437 int nbp; /* number of breakpoints that triggered */
2438 caddr_t addr[4]; /* breakpoint addresses */
2439 int i;
2440
2441 dr7 = rdr7();
2442 if ((dr7 & 0x000000ff) == 0) {
2443 /*
2444 * all GE and LE bits in the dr7 register are zero,
2445 * thus the trap couldn't have been caused by the
2446 * hardware debug registers
2447 */
2448 return 0;
2449 }
2450
2451 nbp = 0;
2452 dr6 = rdr6();
2453 bp = dr6 & 0x0000000f;
2454
2455 if (!bp) {
2456 /*
2457 * None of the breakpoint bits are set meaning this
2458 * trap was not caused by any of the debug registers
2459 */
2460 return 0;
2461 }
2462
2463 /*
2464 * at least one of the breakpoints were hit, check to see
2465 * which ones and if any of them are user space addresses
2466 */
2467
2468 if (bp & 0x01) {
2469 addr[nbp++] = (caddr_t)rdr0();
2470 }
2471 if (bp & 0x02) {
2472 addr[nbp++] = (caddr_t)rdr1();
2473 }
2474 if (bp & 0x04) {
2475 addr[nbp++] = (caddr_t)rdr2();
2476 }
2477 if (bp & 0x08) {
2478 addr[nbp++] = (caddr_t)rdr3();
2479 }
2480
2481 for (i=0; i<nbp; i++) {
2482 if (addr[i] <
2483 (caddr_t)VM_MAXUSER_ADDRESS) {
2484 /*
2485 * addr[i] is in user space
2486 */
2487 return nbp;
2488 }
2489 }
2490
2491 /*
2492 * None of the breakpoints are in user space.
2493 */
2494 return 0;
2495}
2496
2497
2498#ifndef DDB
2499void
2500Debugger(const char *msg)
2501{
2502 printf("Debugger(\"%s\") called.\n", msg);
2503}
2504#endif /* no DDB */
2505
2506#include <sys/disklabel.h>
2507
2508/*
2509 * Determine the size of the transfer, and make sure it is
2510 * within the boundaries of the partition. Adjust transfer
2511 * if needed, and signal errors or early completion.
2512 */
2513int
2514bounds_check_with_label(struct buf *bp, struct disklabel *lp, int wlabel)
2515{
2516 struct partition *p = lp->d_partitions + dkpart(bp->b_dev);
2517 int labelsect = lp->d_partitions[0].p_offset;
2518 int maxsz = p->p_size,
2519 sz = (bp->b_bcount + DEV_BSIZE - 1) >> DEV_BSHIFT;
2520
2521 /* overwriting disk label ? */
2522 /* XXX should also protect bootstrap in first 8K */
2523 if (bp->b_blkno + p->p_offset <= LABELSECTOR + labelsect &&
2524#if LABELSECTOR != 0
2525 bp->b_blkno + p->p_offset + sz > LABELSECTOR + labelsect &&
2526#endif
2527 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2528 bp->b_error = EROFS;
2529 goto bad;
2530 }
2531
2532#if defined(DOSBBSECTOR) && defined(notyet)
2533 /* overwriting master boot record? */
2534 if (bp->b_blkno + p->p_offset <= DOSBBSECTOR &&
2535 (bp->b_flags & B_READ) == 0 && wlabel == 0) {
2536 bp->b_error = EROFS;
2537 goto bad;
2538 }
2539#endif
2540
2541 /* beyond partition? */
2542 if (bp->b_blkno < 0 || bp->b_blkno + sz > maxsz) {
2543 /* if exactly at end of disk, return an EOF */
2544 if (bp->b_blkno == maxsz) {
2545 bp->b_resid = bp->b_bcount;
2546 return(0);
2547 }
2548 /* or truncate if part of it fits */
2549 sz = maxsz - bp->b_blkno;
2550 if (sz <= 0) {
2551 bp->b_error = EINVAL;
2552 goto bad;
2553 }
2554 bp->b_bcount = sz << DEV_BSHIFT;
2555 }
2556
2557 bp->b_pblkno = bp->b_blkno + p->p_offset;
2558 return(1);
2559
2560bad:
2561 bp->b_flags |= B_ERROR;
2562 return(-1);
2563}
2564
2565#ifdef DDB
2566
2567/*
2568 * Provide inb() and outb() as functions. They are normally only
2569 * available as macros calling inlined functions, thus cannot be
2570 * called inside DDB.
2571 *
2572 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2573 */
2574
2575#undef inb
2576#undef outb
2577
2578/* silence compiler warnings */
2579u_char inb(u_int);
2580void outb(u_int, u_char);
2581
2582u_char
2583inb(u_int port)
2584{
2585 u_char data;
2586 /*
2587 * We use %%dx and not %1 here because i/o is done at %dx and not at
2588 * %edx, while gcc generates inferior code (movw instead of movl)
2589 * if we tell it to load (u_short) port.
2590 */
2591 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2592 return (data);
2593}
2594
2595void
2596outb(u_int port, u_char data)
2597{
2598 u_char al;
2599 /*
2600 * Use an unnecessary assignment to help gcc's register allocator.
2601 * This make a large difference for gcc-1.40 and a tiny difference
2602 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2603 * best results. gcc-2.6.0 can't handle this.
2604 */
2605 al = data;
2606 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2607}
2608
2609#endif /* DDB */
8a8d5d85
MD
2610
2611
2612
2613#include "opt_cpu.h"
8a8d5d85
MD
2614
2615
2616/*
2617 * initialize all the SMP locks
2618 */
2619
97359a5b 2620/* critical region when masking or unmasking interupts */
b1af91cb 2621struct spinlock_deprecated imen_spinlock;
8a8d5d85
MD
2622
2623/* Make FAST_INTR() routines sequential */
b1af91cb 2624struct spinlock_deprecated fast_intr_spinlock;
8a8d5d85
MD
2625
2626/* critical region for old style disable_intr/enable_intr */
b1af91cb 2627struct spinlock_deprecated mpintr_spinlock;
8a8d5d85
MD
2628
2629/* critical region around INTR() routines */
b1af91cb 2630struct spinlock_deprecated intr_spinlock;
8a8d5d85
MD
2631
2632/* lock region used by kernel profiling */
b1af91cb 2633struct spinlock_deprecated mcount_spinlock;
8a8d5d85
MD
2634
2635/* locks com (tty) data/hardware accesses: a FASTINTR() */
b1af91cb 2636struct spinlock_deprecated com_spinlock;
8a8d5d85
MD
2637
2638/* locks kernel printfs */
b1af91cb 2639struct spinlock_deprecated cons_spinlock;
8a8d5d85
MD
2640
2641/* lock regions around the clock hardware */
b1af91cb 2642struct spinlock_deprecated clock_spinlock;
8a8d5d85
MD
2643
2644/* lock around the MP rendezvous */
b1af91cb 2645struct spinlock_deprecated smp_rv_spinlock;
8a8d5d85
MD
2646
2647static void
2648init_locks(void)
2649{
2650 /*
2651 * mp_lock = 0; BSP already owns the MP lock
2652 */
2653 /*
2654 * Get the initial mp_lock with a count of 1 for the BSP.
2655 * This uses a LOGICAL cpu ID, ie BSP == 0.
2656 */
2657#ifdef SMP
2658 cpu_get_initial_mplock();
2659#endif
41a01a4d 2660 /* DEPRECATED */
8a8d5d85
MD
2661 spin_lock_init(&mcount_spinlock);
2662 spin_lock_init(&fast_intr_spinlock);
2663 spin_lock_init(&intr_spinlock);
2664 spin_lock_init(&mpintr_spinlock);
2665 spin_lock_init(&imen_spinlock);
2666 spin_lock_init(&smp_rv_spinlock);
2667 spin_lock_init(&com_spinlock);
2668 spin_lock_init(&clock_spinlock);
2669 spin_lock_init(&cons_spinlock);
41a01a4d
MD
2670
2671 /* our token pool needs to work early */
2672 lwkt_token_pool_init();
8a8d5d85
MD
2673}
2674