There are two possible causes which will make vr(4) stall:
[dragonfly.git] / sys / kern / kern_intr.c
CommitLineData
984263bc 1/*
033a4603 2 * Copyright (c) 2003 Matthew Dillon <dillon@backplane.com> All rights reserved.
ef0fdad1 3 * Copyright (c) 1997, Stefan Esser <se@freebsd.org> All rights reserved.
984263bc
MD
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/kern/kern_intr.c,v 1.24.2.1 2001/10/14 20:05:50 luigi Exp $
7e2d9bde 27 * $DragonFly: src/sys/kern/kern_intr.c,v 1.33 2005/11/04 08:17:19 dillon Exp $
984263bc
MD
28 *
29 */
30
984263bc
MD
31#include <sys/param.h>
32#include <sys/systm.h>
33#include <sys/malloc.h>
34#include <sys/kernel.h>
35#include <sys/sysctl.h>
ef0fdad1
MD
36#include <sys/thread.h>
37#include <sys/proc.h>
38#include <sys/thread2.h>
7e071e7a 39#include <sys/random.h>
477d3c1c
MD
40#include <sys/serialize.h>
41#include <sys/bus.h>
37e7efec 42#include <sys/machintr.h>
984263bc
MD
43
44#include <machine/ipl.h>
477d3c1c 45#include <machine/frame.h>
984263bc
MD
46
47#include <sys/interrupt.h>
48
ef0fdad1
MD
49typedef struct intrec {
50 struct intrec *next;
51 inthand2_t *handler;
52 void *argument;
477d3c1c 53 char *name;
ef0fdad1 54 int intr;
477d3c1c
MD
55 int intr_flags;
56 struct lwkt_serialize *serializer;
57} *intrec_t;
58
59struct intr_info {
60 intrec_t i_reclist;
61 struct thread i_thread;
62 struct random_softc i_random;
63 int i_running;
64 long i_count;
65 int i_fast;
66 int i_slow;
f33e9c1c 67 int i_state;
5f456c40
MD
68} intr_info_ary[MAX_INTS];
69
70int max_installed_hard_intr;
71int max_installed_soft_intr;
477d3c1c 72
a9d00ec1
MD
73#define EMERGENCY_INTR_POLLING_FREQ_MAX 20000
74
75static int sysctl_emergency_freq(SYSCTL_HANDLER_ARGS);
76static int sysctl_emergency_enable(SYSCTL_HANDLER_ARGS);
77static void emergency_intr_timer_callback(systimer_t, struct intrframe *);
78static void ithread_handler(void *arg);
79static void ithread_emergency(void *arg);
80
477d3c1c 81int intr_info_size = sizeof(intr_info_ary) / sizeof(intr_info_ary[0]);
37d44089 82
a9d00ec1
MD
83static struct systimer emergency_intr_timer;
84static struct thread emergency_intr_thread;
85
f33e9c1c
MD
86#define ISTATE_NOTHREAD 0
87#define ISTATE_NORMAL 1
88#define ISTATE_LIVELOCKED 2
37d44089 89
93781523 90static int livelock_limit = 50000;
f33e9c1c 91static int livelock_lowater = 20000;
37d44089
MD
92SYSCTL_INT(_kern, OID_AUTO, livelock_limit,
93 CTLFLAG_RW, &livelock_limit, 0, "Livelock interrupt rate limit");
f33e9c1c
MD
94SYSCTL_INT(_kern, OID_AUTO, livelock_lowater,
95 CTLFLAG_RW, &livelock_lowater, 0, "Livelock low-water mark restore");
984263bc 96
a9d00ec1
MD
97static int emergency_intr_enable = 0; /* emergency interrupt polling */
98TUNABLE_INT("kern.emergency_intr_enable", &emergency_intr_enable);
99SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_enable, CTLTYPE_INT | CTLFLAG_RW,
100 0, 0, sysctl_emergency_enable, "I", "Emergency Interrupt Poll Enable");
101
102static int emergency_intr_freq = 10; /* emergency polling frequency */
103TUNABLE_INT("kern.emergency_intr_freq", &emergency_intr_freq);
104SYSCTL_PROC(_kern, OID_AUTO, emergency_intr_freq, CTLTYPE_INT | CTLFLAG_RW,
105 0, 0, sysctl_emergency_freq, "I", "Emergency Interrupt Poll Frequency");
106
107/*
108 * Sysctl support routines
109 */
110static int
111sysctl_emergency_enable(SYSCTL_HANDLER_ARGS)
112{
113 int error, enabled;
114
115 enabled = emergency_intr_enable;
116 error = sysctl_handle_int(oidp, &enabled, 0, req);
117 if (error || req->newptr == NULL)
118 return error;
119 emergency_intr_enable = enabled;
120 if (emergency_intr_enable) {
121 emergency_intr_timer.periodic =
122 sys_cputimer->fromhz(emergency_intr_freq);
123 } else {
124 emergency_intr_timer.periodic = sys_cputimer->fromhz(1);
125 }
126 return 0;
127}
128
129static int
130sysctl_emergency_freq(SYSCTL_HANDLER_ARGS)
131{
132 int error, phz;
133
134 phz = emergency_intr_freq;
135 error = sysctl_handle_int(oidp, &phz, 0, req);
136 if (error || req->newptr == NULL)
137 return error;
138 if (phz <= 0)
139 return EINVAL;
140 else if (phz > EMERGENCY_INTR_POLLING_FREQ_MAX)
141 phz = EMERGENCY_INTR_POLLING_FREQ_MAX;
142
143 emergency_intr_freq = phz;
144 if (emergency_intr_enable) {
145 emergency_intr_timer.periodic =
146 sys_cputimer->fromhz(emergency_intr_freq);
147 } else {
148 emergency_intr_timer.periodic = sys_cputimer->fromhz(1);
149 }
150 return 0;
151}
984263bc 152
45d76888
MD
153/*
154 * Register an SWI or INTerrupt handler.
45d76888 155 */
477d3c1c
MD
156void *
157register_swi(int intr, inthand2_t *handler, void *arg, const char *name,
158 struct lwkt_serialize *serializer)
984263bc 159{
5f456c40 160 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
ef0fdad1 161 panic("register_swi: bad intr %d", intr);
477d3c1c 162 return(register_int(intr, handler, arg, name, serializer, 0));
984263bc
MD
163}
164
477d3c1c
MD
165void *
166register_int(int intr, inthand2_t *handler, void *arg, const char *name,
167 struct lwkt_serialize *serializer, int intr_flags)
984263bc 168{
477d3c1c
MD
169 struct intr_info *info;
170 struct intrec **list;
171 intrec_t rec;
ef0fdad1 172
5f456c40 173 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 174 panic("register_int: bad intr %d", intr);
477d3c1c
MD
175 if (name == NULL)
176 name = "???";
177 info = &intr_info_ary[intr];
178
179 rec = malloc(sizeof(struct intrec), M_DEVBUF, M_INTWAIT);
180 rec->name = malloc(strlen(name) + 1, M_DEVBUF, M_INTWAIT);
181 strcpy(rec->name, name);
ef0fdad1 182
ef0fdad1
MD
183 rec->handler = handler;
184 rec->argument = arg;
ef0fdad1 185 rec->intr = intr;
477d3c1c 186 rec->intr_flags = intr_flags;
ef0fdad1 187 rec->next = NULL;
477d3c1c 188 rec->serializer = serializer;
ef0fdad1 189
477d3c1c
MD
190 list = &info->i_reclist;
191
192 /*
193 * Keep track of how many fast and slow interrupts we have.
194 */
195 if (intr_flags & INTR_FAST)
196 ++info->i_fast;
197 else
198 ++info->i_slow;
ef0fdad1 199
a9d00ec1
MD
200 /*
201 * Create an emergency polling thread and set up a systimer to wake
202 * it up.
203 */
204 if (emergency_intr_thread.td_kstack == NULL) {
205 lwkt_create(ithread_emergency, NULL, NULL,
206 &emergency_intr_thread, TDF_STOPREQ|TDF_INTTHREAD, -1,
207 "ithread emerg");
208 systimer_init_periodic_nq(&emergency_intr_timer,
209 emergency_intr_timer_callback, &emergency_intr_thread,
210 (emergency_intr_enable ? emergency_intr_freq : 1));
211 }
212
ef0fdad1
MD
213 /*
214 * Create an interrupt thread if necessary, leave it in an unscheduled
45d76888 215 * state.
ef0fdad1 216 */
f33e9c1c
MD
217 if (info->i_state == ISTATE_NOTHREAD) {
218 info->i_state = ISTATE_NORMAL;
477d3c1c
MD
219 lwkt_create((void *)ithread_handler, (void *)intr, NULL,
220 &info->i_thread, TDF_STOPREQ|TDF_INTTHREAD, -1,
75cdbe6c 221 "ithread %d", intr);
5f456c40 222 if (intr >= FIRST_SOFTINT)
477d3c1c 223 lwkt_setpri(&info->i_thread, TDPRI_SOFT_NORM);
4b5f931b 224 else
477d3c1c
MD
225 lwkt_setpri(&info->i_thread, TDPRI_INT_MED);
226 info->i_thread.td_preemptable = lwkt_preempt;
ef0fdad1
MD
227 }
228
229 /*
230 * Add the record to the interrupt list
231 */
232 crit_enter(); /* token */
233 while (*list != NULL)
234 list = &(*list)->next;
235 *list = rec;
236 crit_exit();
5f456c40
MD
237
238 /*
239 * Update max_installed_hard_intr to make the emergency intr poll
240 * a bit more efficient.
241 */
242 if (intr < FIRST_SOFTINT) {
243 if (max_installed_hard_intr <= intr)
244 max_installed_hard_intr = intr + 1;
245 } else {
246 if (max_installed_soft_intr <= intr)
247 max_installed_soft_intr = intr + 1;
248 }
477d3c1c 249 return(rec);
ef0fdad1 250}
984263bc 251
477d3c1c
MD
252int
253unregister_swi(void *id)
ef0fdad1 254{
477d3c1c 255 return(unregister_int(id));
984263bc
MD
256}
257
477d3c1c
MD
258int
259unregister_int(void *id)
984263bc 260{
477d3c1c
MD
261 struct intr_info *info;
262 struct intrec **list;
263 intrec_t rec;
264 int intr;
265
266 intr = ((intrec_t)id)->intr;
ef0fdad1 267
5f456c40 268 if (intr < 0 || intr >= MAX_INTS)
ef0fdad1 269 panic("register_int: bad intr %d", intr);
477d3c1c
MD
270
271 info = &intr_info_ary[intr];
272
273 /*
274 * Remove the interrupt descriptor
275 */
ef0fdad1 276 crit_enter();
477d3c1c 277 list = &info->i_reclist;
ef0fdad1 278 while ((rec = *list) != NULL) {
477d3c1c 279 if (rec == id) {
ef0fdad1
MD
280 *list = rec->next;
281 break;
984263bc 282 }
ef0fdad1
MD
283 list = &rec->next;
284 }
285 crit_exit();
477d3c1c
MD
286
287 /*
288 * Free it, adjust interrupt type counts
289 */
ef0fdad1 290 if (rec != NULL) {
477d3c1c
MD
291 if (rec->intr_flags & INTR_FAST)
292 --info->i_fast;
293 else
294 --info->i_slow;
295 free(rec->name, M_DEVBUF);
ef0fdad1
MD
296 free(rec, M_DEVBUF);
297 } else {
477d3c1c
MD
298 printf("warning: unregister_int: int %d handler for %s not found\n",
299 intr, ((intrec_t)id)->name);
ef0fdad1 300 }
477d3c1c
MD
301
302 /*
303 * Return the number of interrupt vectors still registered on this intr
304 */
305 return(info->i_fast + info->i_slow);
306}
307
308int
309get_registered_intr(void *id)
310{
311 return(((intrec_t)id)->intr);
312}
313
314const char *
315get_registered_name(int intr)
316{
317 intrec_t rec;
318
5f456c40 319 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
320 panic("register_int: bad intr %d", intr);
321
322 if ((rec = intr_info_ary[intr].i_reclist) == NULL)
323 return(NULL);
324 else if (rec->next)
325 return("mux");
326 else
327 return(rec->name);
984263bc
MD
328}
329
477d3c1c
MD
330int
331count_registered_ints(int intr)
332{
333 struct intr_info *info;
334
5f456c40 335 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
336 panic("register_int: bad intr %d", intr);
337 info = &intr_info_ary[intr];
338 return(info->i_fast + info->i_slow);
339}
340
341long
342get_interrupt_counter(int intr)
343{
344 struct intr_info *info;
345
5f456c40 346 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
347 panic("register_int: bad intr %d", intr);
348 info = &intr_info_ary[intr];
349 return(info->i_count);
350}
351
352
4b5f931b
MD
353void
354swi_setpriority(int intr, int pri)
355{
477d3c1c 356 struct intr_info *info;
4b5f931b 357
5f456c40 358 if (intr < FIRST_SOFTINT || intr >= MAX_INTS)
4b5f931b 359 panic("register_swi: bad intr %d", intr);
477d3c1c 360 info = &intr_info_ary[intr];
f33e9c1c 361 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 362 lwkt_setpri(&info->i_thread, pri);
4b5f931b
MD
363}
364
7e071e7a
MD
365void
366register_randintr(int intr)
367{
477d3c1c
MD
368 struct intr_info *info;
369
5f456c40 370 if (intr < 0 || intr >= MAX_INTS)
417c990a 371 panic("register_randintr: bad intr %d", intr);
477d3c1c
MD
372 info = &intr_info_ary[intr];
373 info->i_random.sc_intr = intr;
374 info->i_random.sc_enabled = 1;
7e071e7a
MD
375}
376
377void
378unregister_randintr(int intr)
379{
477d3c1c
MD
380 struct intr_info *info;
381
5f456c40 382 if (intr < 0 || intr >= MAX_INTS)
477d3c1c
MD
383 panic("register_swi: bad intr %d", intr);
384 info = &intr_info_ary[intr];
385 info->i_random.sc_enabled = 0;
7e071e7a
MD
386}
387
5f456c40
MD
388int
389next_registered_randintr(int intr)
390{
391 struct intr_info *info;
392
393 if (intr < 0 || intr >= MAX_INTS)
394 panic("register_swi: bad intr %d", intr);
395 while (intr < MAX_INTS) {
396 info = &intr_info_ary[intr];
397 if (info->i_random.sc_enabled)
398 break;
399 ++intr;
400 }
401 return(intr);
402}
403
ef0fdad1 404/*
b68b7282
MD
405 * Dispatch an interrupt. If there's nothing to do we have a stray
406 * interrupt and can just return, leaving the interrupt masked.
96728c05 407 *
477d3c1c 408 * We need to schedule the interrupt and set its i_running bit. If
96728c05
MD
409 * we are not on the interrupt thread's cpu we have to send a message
410 * to the correct cpu that will issue the desired action (interlocking
f33e9c1c
MD
411 * with the interrupt thread's critical section). We do NOT attempt to
412 * reschedule interrupts whos i_running bit is already set because
413 * this would prematurely wakeup a livelock-limited interrupt thread.
414 *
415 * i_running is only tested/set on the same cpu as the interrupt thread.
96728c05
MD
416 *
417 * We are NOT in a critical section, which will allow the scheduled
71ef2f5c 418 * interrupt to preempt us. The MP lock might *NOT* be held here.
ef0fdad1 419 */
b8a98473
MD
420#ifdef SMP
421
96728c05
MD
422static void
423sched_ithd_remote(void *arg)
424{
425 sched_ithd((int)arg);
426}
427
b8a98473
MD
428#endif
429
ef0fdad1
MD
430void
431sched_ithd(int intr)
432{
477d3c1c 433 struct intr_info *info;
ef0fdad1 434
477d3c1c
MD
435 info = &intr_info_ary[intr];
436
437 ++info->i_count;
f33e9c1c 438 if (info->i_state != ISTATE_NOTHREAD) {
477d3c1c 439 if (info->i_reclist == NULL) {
ef0fdad1 440 printf("sched_ithd: stray interrupt %d\n", intr);
b68b7282 441 } else {
b8a98473 442#ifdef SMP
477d3c1c 443 if (info->i_thread.td_gd == mycpu) {
f33e9c1c
MD
444 if (info->i_running == 0) {
445 info->i_running = 1;
446 if (info->i_state != ISTATE_LIVELOCKED)
447 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
448 }
96728c05 449 } else {
477d3c1c
MD
450 lwkt_send_ipiq(info->i_thread.td_gd,
451 sched_ithd_remote, (void *)intr);
96728c05 452 }
b8a98473 453#else
f33e9c1c
MD
454 if (info->i_running == 0) {
455 info->i_running = 1;
456 if (info->i_state != ISTATE_LIVELOCKED)
457 lwkt_schedule(&info->i_thread); /* MIGHT PREEMPT */
458 }
b8a98473 459#endif
b68b7282 460 }
ef0fdad1
MD
461 } else {
462 printf("sched_ithd: stray interrupt %d\n", intr);
463 }
464}
465
37d44089
MD
466/*
467 * This is run from a periodic SYSTIMER (and thus must be MP safe, the BGL
468 * might not be held).
469 */
470static void
477d3c1c 471ithread_livelock_wakeup(systimer_t st)
37d44089 472{
477d3c1c 473 struct intr_info *info;
37d44089 474
477d3c1c 475 info = &intr_info_ary[(int)st->data];
f33e9c1c 476 if (info->i_state != ISTATE_NOTHREAD)
477d3c1c 477 lwkt_schedule(&info->i_thread);
37d44089
MD
478}
479
67b9bb39 480/*
477d3c1c
MD
481 * This function is called drectly from the ICU or APIC vector code assembly
482 * to process an interrupt. The critical section and interrupt deferral
483 * checks have already been done but the function is entered WITHOUT
484 * a critical section held. The BGL may or may not be held.
485 *
486 * Must return non-zero if we do not want the vector code to re-enable
487 * the interrupt (which we don't if we have to schedule the interrupt)
67b9bb39 488 */
477d3c1c
MD
489int ithread_fast_handler(struct intrframe frame);
490
491int
492ithread_fast_handler(struct intrframe frame)
493{
494 int intr;
495 struct intr_info *info;
496 struct intrec **list;
497 int must_schedule;
498#ifdef SMP
499 int got_mplock;
500#endif
501 intrec_t rec, next_rec;
502 globaldata_t gd;
503
504 intr = frame.if_vec;
505 gd = mycpu;
506
507 info = &intr_info_ary[intr];
508
509 /*
510 * If we are not processing any FAST interrupts, just schedule the thing.
511 * (since we aren't in a critical section, this can result in a
512 * preemption)
513 */
514 if (info->i_fast == 0) {
515 sched_ithd(intr);
516 return(1);
517 }
518
519 /*
520 * This should not normally occur since interrupts ought to be
521 * masked if the ithread has been scheduled or is running.
522 */
523 if (info->i_running)
524 return(1);
525
526 /*
527 * Bump the interrupt nesting level to process any FAST interrupts.
528 * Obtain the MP lock as necessary. If the MP lock cannot be obtained,
529 * schedule the interrupt thread to deal with the issue instead.
530 *
531 * To reduce overhead, just leave the MP lock held once it has been
532 * obtained.
533 */
534 crit_enter_gd(gd);
535 ++gd->gd_intr_nesting_level;
536 ++gd->gd_cnt.v_intr;
537 must_schedule = info->i_slow;
538#ifdef SMP
539 got_mplock = 0;
540#endif
541
542 list = &info->i_reclist;
543 for (rec = *list; rec; rec = next_rec) {
544 next_rec = rec->next; /* rec may be invalid after call */
545
546 if (rec->intr_flags & INTR_FAST) {
547#ifdef SMP
548 if ((rec->intr_flags & INTR_MPSAFE) == 0 && got_mplock == 0) {
549 if (try_mplock() == 0) {
afd7b1c0
MD
550 int owner;
551
477d3c1c 552 /*
afd7b1c0
MD
553 * If we couldn't get the MP lock try to forward it
554 * to the cpu holding the MP lock, setting must_schedule
555 * to -1 so we do not schedule and also do not unmask
556 * the interrupt. Otherwise just schedule it.
477d3c1c 557 */
afd7b1c0
MD
558 owner = owner_mplock();
559 if (owner >= 0 && owner != gd->gd_cpuid) {
560 lwkt_send_ipiq_bycpu(owner, forward_fastint_remote,
7e2d9bde 561 (void *)intr);
afd7b1c0
MD
562 must_schedule = -1;
563 ++gd->gd_cnt.v_forwarded_ints;
564 } else {
565 must_schedule = 1;
566 }
477d3c1c
MD
567 break;
568 }
569 got_mplock = 1;
570 }
571#endif
572 if (rec->serializer) {
573 must_schedule += lwkt_serialize_handler_try(
574 rec->serializer, rec->handler,
575 rec->argument, &frame);
576 } else {
577 rec->handler(rec->argument, &frame);
578 }
579 }
580 }
581
582 /*
583 * Cleanup
584 */
585 --gd->gd_intr_nesting_level;
586#ifdef SMP
587 if (got_mplock)
588 rel_mplock();
589#endif
590 crit_exit_gd(gd);
591
592 /*
593 * If we had a problem, schedule the thread to catch the missed
594 * records (it will just re-run all of them). A return value of 0
595 * indicates that all handlers have been run and the interrupt can
596 * be re-enabled, and a non-zero return indicates that the interrupt
597 * thread controls re-enablement.
598 */
afd7b1c0 599 if (must_schedule > 0)
477d3c1c 600 sched_ithd(intr);
afd7b1c0 601 else if (must_schedule == 0)
477d3c1c
MD
602 ++info->i_count;
603 return(must_schedule);
604}
605
606#if 0
607
6086: ; \
609 /* could not get the MP lock, forward the interrupt */ \
610 movl mp_lock, %eax ; /* check race */ \
611 cmpl $MP_FREE_LOCK,%eax ; \
612 je 2b ; \
613 incl PCPU(cnt)+V_FORWARDED_INTS ; \
614 subl $12,%esp ; \
615 movl $irq_num,8(%esp) ; \
616 movl $forward_fastint_remote,4(%esp) ; \
617 movl %eax,(%esp) ; \
618 call lwkt_send_ipiq_bycpu ; \
619 addl $12,%esp ; \
620 jmp 5f ;
621
622#endif
67b9bb39 623
37d44089 624
b68b7282 625/*
45d76888
MD
626 * Interrupt threads run this as their main loop.
627 *
628 * The handler begins execution outside a critical section and with the BGL
629 * held.
37d44089 630 *
477d3c1c 631 * The i_running state starts at 0. When an interrupt occurs, the hardware
37d44089
MD
632 * interrupt is disabled and sched_ithd() The HW interrupt remains disabled
633 * until all routines have run. We then call ithread_done() to reenable
45d76888
MD
634 * the HW interrupt and deschedule us until the next interrupt.
635 *
477d3c1c 636 * We are responsible for atomically checking i_running and ithread_done()
45d76888 637 * is responsible for atomically checking for platform-specific delayed
477d3c1c 638 * interrupts. i_running for our irq is only set in the context of our cpu,
45d76888 639 * so a critical section is a sufficient interlock.
b68b7282 640 */
93781523
MD
641#define LIVELOCK_TIMEFRAME(freq) ((freq) >> 2) /* 1/4 second */
642
ef0fdad1
MD
643static void
644ithread_handler(void *arg)
645{
477d3c1c 646 struct intr_info *info;
f33e9c1c
MD
647 int use_limit;
648 int lticks;
649 int lcount;
477d3c1c 650 int intr;
477d3c1c
MD
651 struct intrec **list;
652 intrec_t rec, nrec;
f33e9c1c 653 globaldata_t gd;
67b9bb39 654 struct systimer ill_timer; /* enforced freq. timer */
f33e9c1c 655 u_int ill_count; /* interrupt livelock counter */
45d76888 656
f33e9c1c
MD
657 ill_count = 0;
658 lticks = ticks;
659 lcount = 0;
477d3c1c
MD
660 intr = (int)arg;
661 info = &intr_info_ary[intr];
662 list = &info->i_reclist;
663 gd = mycpu;
664
45d76888
MD
665 /*
666 * The loop must be entered with one critical section held.
667 */
668 crit_enter_gd(gd);
ef0fdad1 669
ef0fdad1 670 for (;;) {
93781523 671 /*
f33e9c1c
MD
672 * If an interrupt is pending, clear i_running and execute the
673 * handlers. Note that certain types of interrupts can re-trigger
674 * and set i_running again.
45d76888 675 *
f33e9c1c 676 * Each handler is run in a critical section. Note that we run both
477d3c1c 677 * FAST and SLOW designated service routines.
93781523 678 */
f33e9c1c
MD
679 if (info->i_running) {
680 ++ill_count;
681 info->i_running = 0;
682 for (rec = *list; rec; rec = nrec) {
683 nrec = rec->next;
684 if (rec->serializer) {
685 lwkt_serialize_handler_call(rec->serializer, rec->handler,
686 rec->argument, NULL);
687 } else {
688 rec->handler(rec->argument, NULL);
689 }
477d3c1c 690 }
ef0fdad1 691 }
37d44089
MD
692
693 /*
694 * This is our interrupt hook to add rate randomness to the random
695 * number generator.
696 */
477d3c1c 697 if (info->i_random.sc_enabled)
96728c05 698 add_interrupt_randomness(intr);
37d44089
MD
699
700 /*
f33e9c1c
MD
701 * Unmask the interrupt to allow it to trigger again. This only
702 * applies to certain types of interrupts (typ level interrupts).
703 * This can result in the interrupt retriggering, but the retrigger
704 * will not be processed until we cycle our critical section.
363d922a
MD
705 *
706 * Only unmask interrupts while handlers are installed. It is
707 * possible to hit a situation where no handlers are installed
708 * due to a device driver livelocking and then tearing down its
709 * interrupt on close (the parallel bus being a good example).
37d44089 710 */
363d922a 711 if (*list)
37e7efec 712 machintr_intren(intr);
f33e9c1c
MD
713
714 /*
715 * Do a quick exit/enter to catch any higher-priority interrupt
716 * sources, such as the statclock, so thread time accounting
717 * will still work. This may also cause an interrupt to re-trigger.
718 */
719 crit_exit_gd(gd);
720 crit_enter_gd(gd);
721
722 /*
723 * LIVELOCK STATE MACHINE
724 */
725 switch(info->i_state) {
726 case ISTATE_NORMAL:
727 /*
728 * Calculate a running average every tick.
729 */
730 if (lticks != ticks) {
731 lticks = ticks;
732 ill_count -= ill_count / hz;
733 }
734
735 /*
736 * If we did not exceed the frequency limit, we are done.
737 * If the interrupt has not retriggered we deschedule ourselves.
738 */
739 if (ill_count <= livelock_limit) {
740 if (info->i_running == 0) {
741 lwkt_deschedule_self(gd->gd_curthread);
742 lwkt_switch();
743 }
37d44089 744 break;
f33e9c1c
MD
745 }
746
747 /*
748 * Otherwise we are livelocked. Set up a periodic systimer
749 * to wake the thread up at the limit frequency.
750 */
751 printf("intr %d at %d > %d hz, livelocked limit engaged!\n",
752 intr, livelock_limit, ill_count);
753 info->i_state = ISTATE_LIVELOCKED;
754 if ((use_limit = livelock_limit) < 100)
755 use_limit = 100;
756 else if (use_limit > 500000)
757 use_limit = 500000;
758 systimer_init_periodic(&ill_timer, ithread_livelock_wakeup,
759 (void *)intr, use_limit);
760 lcount = 0;
37d44089 761 /* fall through */
f33e9c1c 762 case ISTATE_LIVELOCKED:
37d44089 763 /*
f33e9c1c
MD
764 * Wait for our periodic timer to go off. Since the interrupt
765 * has re-armed it can still set i_running, but it will not
766 * reschedule us while we are in a livelocked state.
37d44089 767 */
f33e9c1c 768 lwkt_deschedule_self(gd->gd_curthread);
37d44089 769 lwkt_switch();
93781523 770
37d44089 771 /*
f33e9c1c
MD
772 * Check to see if the livelock condition no longer applies.
773 * The interrupt must be able to operate normally for one
774 * full second before we restore normal operation.
37d44089 775 */
f33e9c1c
MD
776 if (lticks != ticks) {
777 lticks = ticks;
778 if (ill_count < livelock_lowater) {
779 if (++lcount >= hz) {
780 info->i_state = ISTATE_NORMAL;
781 systimer_del(&ill_timer);
782 printf("intr %d at %d < %d hz, livelock removed\n",
783 intr, ill_count, livelock_lowater);
784 }
785 } else {
786 lcount = 0;
787 }
788 ill_count -= ill_count / hz;
37d44089
MD
789 }
790 break;
791 }
ef0fdad1 792 }
e43a034f 793 /* not reached */
ef0fdad1
MD
794}
795
a9d00ec1
MD
796/*
797 * Emergency interrupt polling thread. The thread begins execution
798 * outside a critical section with the BGL held.
799 *
800 * If emergency interrupt polling is enabled, this thread will
801 * execute all system interrupts not marked INTR_NOPOLL at the
802 * specified polling frequency.
803 *
804 * WARNING! This thread runs *ALL* interrupt service routines that
805 * are not marked INTR_NOPOLL, which basically means everything except
806 * the 8254 clock interrupt and the ATA interrupt. It has very high
807 * overhead and should only be used in situations where the machine
808 * cannot otherwise be made to work. Due to the severe performance
809 * degredation, it should not be enabled on production machines.
810 */
811static void
812ithread_emergency(void *arg __unused)
813{
814 struct intr_info *info;
815 intrec_t rec, nrec;
816 int intr;
817
818 for (;;) {
5f456c40 819 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
a9d00ec1
MD
820 info = &intr_info_ary[intr];
821 for (rec = info->i_reclist; rec; rec = nrec) {
822 if ((rec->intr_flags & INTR_NOPOLL) == 0) {
823 if (rec->serializer) {
824 lwkt_serialize_handler_call(rec->serializer,
825 rec->handler, rec->argument, NULL);
826 } else {
827 rec->handler(rec->argument, NULL);
828 }
829 }
830 nrec = rec->next;
831 }
832 }
833 lwkt_deschedule_self(curthread);
834 lwkt_switch();
835 }
836}
837
838/*
839 * Systimer callback - schedule the emergency interrupt poll thread
840 * if emergency polling is enabled.
841 */
842static
843void
844emergency_intr_timer_callback(systimer_t info, struct intrframe *frame __unused)
845{
846 if (emergency_intr_enable)
847 lwkt_schedule(info->data);
848}
849
984263bc
MD
850/*
851 * Sysctls used by systat and others: hw.intrnames and hw.intrcnt.
852 * The data for this machine dependent, and the declarations are in machine
853 * dependent code. The layout of intrnames and intrcnt however is machine
854 * independent.
855 *
856 * We do not know the length of intrcnt and intrnames at compile time, so
857 * calculate things at run time.
858 */
477d3c1c 859
984263bc
MD
860static int
861sysctl_intrnames(SYSCTL_HANDLER_ARGS)
862{
477d3c1c
MD
863 struct intr_info *info;
864 intrec_t rec;
865 int error = 0;
866 int len;
867 int intr;
868 char buf[64];
869
5f456c40 870 for (intr = 0; error == 0 && intr < MAX_INTS; ++intr) {
477d3c1c
MD
871 info = &intr_info_ary[intr];
872
873 len = 0;
874 buf[0] = 0;
875 for (rec = info->i_reclist; rec; rec = rec->next) {
876 snprintf(buf + len, sizeof(buf) - len, "%s%s",
877 (len ? "/" : ""), rec->name);
878 len += strlen(buf + len);
879 }
880 if (len == 0) {
881 snprintf(buf, sizeof(buf), "irq%d", intr);
882 len = strlen(buf);
883 }
884 error = SYSCTL_OUT(req, buf, len + 1);
885 }
886 return (error);
984263bc
MD
887}
888
477d3c1c 889
984263bc
MD
890SYSCTL_PROC(_hw, OID_AUTO, intrnames, CTLTYPE_OPAQUE | CTLFLAG_RD,
891 NULL, 0, sysctl_intrnames, "", "Interrupt Names");
892
893static int
894sysctl_intrcnt(SYSCTL_HANDLER_ARGS)
895{
477d3c1c
MD
896 struct intr_info *info;
897 int error = 0;
898 int intr;
899
5f456c40 900 for (intr = 0; intr < max_installed_hard_intr; ++intr) {
477d3c1c
MD
901 info = &intr_info_ary[intr];
902
903 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
904 if (error)
5f456c40
MD
905 goto failed;
906 }
907 for (intr = FIRST_SOFTINT; intr < max_installed_soft_intr; ++intr) {
908 info = &intr_info_ary[intr];
909
910 error = SYSCTL_OUT(req, &info->i_count, sizeof(info->i_count));
911 if (error)
912 goto failed;
477d3c1c 913 }
5f456c40 914failed:
477d3c1c 915 return(error);
984263bc
MD
916}
917
918SYSCTL_PROC(_hw, OID_AUTO, intrcnt, CTLTYPE_OPAQUE | CTLFLAG_RD,
919 NULL, 0, sysctl_intrcnt, "", "Interrupt Counts");
477d3c1c 920